GB2128367A - Photocopying machine - Google Patents

Abstract

In a photocopying machine, information is transferred between microprocessor controlled systems by means of a microprocessor input/output communication bus. One or more peripheral devices, such as automatic overlay, each including its hardware and an auxiliary microprocessor for controlling the auxiliary function is attached to the basic photocopying machine. The auxiliary cpu communicates with a central cpu in the basic machine by means of a parallel data bus. Noise in the system is substantially eliminated by transmitting messages in accordance with a strict protocol wherein each message contains a given number of bytes, a first instruction byte being provided for identification, a last byte being provided for checking (at least the first and last bytes having predetermined logic levels), intermediate bytes containing data and the start and finish of each byte being substantially synchronised with a given clock frequency. Noise is further reduced by voltage conversion of the messages transmitted to and received by each microprocessor. A predetermined waiting period after each transmitted message enables retransmission of a message if a receiving microprocessor is engaged.

Description

SPECIFICATION Photocopying machine This invention relates to a photocopying machine and, more particularly, to a photocopying machine in which information is transferred between microprocessor controlled systems by means of a microprocessor input/output (I/O) communication bus. The invention facilitates the conversion of a photocopying machine of a basic type, i.e. one capable of performing a basic photocopying function whereby one or more copies can be made from a master document, into a more complex machine having one or more other functions which may be selected from a variety of functions in accordance with a user's requirements. Such other functions may include, for example, automatic overlay, a security-card terminal, a stitcher/stacker etc.By facilitating conversion of a basic machine to a more complex machine, the invention enables a modular approach to be adopted and it also provides a drastic reduction in harnessing (interconnecting wiring) compared with the conventional conversion of a basic machine to one of a more complex design.

A photocopying machine of a "basic type" is one having a central or main microprocessor (hereinafter called a central cpu") which controls at least a basic copying function. However, the basic type of machine may further include the necessary means to perform functions such as sorting and stacking. In accordance with the invention the basic type of machine can be adapted to communicate with one or more peripheral device, each peripheral device including the appropriate hardware and its own microprocessor for controlling the hardware (hereinafter called "an auxiliary cpu"), the auxiliary cpu having its own dedicated communication link with the main cpu of the basic machine.For example, a peripheral device may be an automatic overlay device (hereinafter called "an AOD") which has the appropriate mechanisms and circuitry to perform an automatic overlay function and to provide copies of respective master documents which are transported into addressable bins.

The AOD provides a choice of overlays namely, either fully transparent substrates or transparent substrates which each contain, for example, printed information in given locations. This enables base mode copying through the fully transparent overlay, forms printing from a selected overlay, or composite imaged copying in which a backing sheet containing variable information is placed in registry with a selected overlay containing standard information. The AOD may be either of known construction, or it may be as described in our copending British patent application, filed jointly herewith.

Any one or more of a variety of peripheral devices may be used in conjunction with the basic photocopying machine and the peripheral device may be a sorter, i.e. where the basic machine is not constructed with this facility. In any event, one of the features of the invention is that each peripheral device includes an auxiliary cpu having its own dedicated communication link with the central cpu of the basic photocopying machine.

With general regard to enabling intelligent communication between microprocessors, use may be made of any one of a variety of local networking systems. Some such systems produced by the Xerox Corporation are known under the collective term "Ethernet". A particular type of Ethernet system, known as "Lotus" enables the transfer of information over relatively short distances between a network of microprocessors (cpu's) which are serially wired as a "daisy chain". The latter system, or generally systems of the serially connected type, are not desirable for use with a photocopying machine, because failure of any sub-system in the network will break the chain hence shutting down the entire system.One of the problems facing the invention is to provide a photocopying machine having a local networking system which will enable continued use of the basic copying function without a shutdown due to failure of a peripheral device.

Another type of Ethernet system employs a common communication bus (coaxial cable) which receives data transmissions from each of a network of cpu's.

The data transmissions contain addresses which ensure that only the addressed device receives and then acts on the relevant transmitted information. The bit transmission rate (eg 10 megabits/seconds) is fairly high to accommodate relatively fast exchange of information, and the networking system includes appropriate address handling means to route information to the correct locations. Whilst such systems can avoid the shut-down problems mentioned above (due to series connected systems), they have the disadvantages of expense and complexity and they may be susceptible to noise (on the communication links) which can lead to control errors.Within a casing of a photocopying machine, only a limited amount of confined space is available to accommodate circuitry and wiring and a lot of noise may enter the communication system due to the proximity of wiring to power supplies and switching circuits and due to the use of unshielded wiring. Thus, a further problem faced by at least a preferred form of the invention is to provide a relatively less expensive and less complex networking system in which noise can be reduced or preferably substantially eliminated.

The present invention generally provides a photocopying machine of a basic type, including means for producing copies of a document and a central cpu for controlling the latter means, the photocopying machine being supplemented by one or more peripheral devices for performing auxiliary functions, the invention being characterised in that each of the peripheral devices includes an auxiliary cpu having its own dedicated communication link with the central cpu.

Since parallel data transmission is used between each of the peripheral devices in the central cpu, the photocopying machine may be readily converted, in a modular fashion, to provide the required peripheral functions, ie in addition to the basic copying function. Such parallel data transmission thereby facilitates hardware implementation. It further provides the advantages of avoiding control problems (e.g.

each cpu does not "hang up" another cpu when a sub-system fails) and of making possible relatively long intercommunication lines.

Preferably, the communication networking system in a machine according to the invention is implemented by detaching the central cpu from a circuit board in the basic machine and then fitting a so-called "piggy back" board containing super LCC, i.e. a microprocessor which is capable of enhanced or improved processing, together with additional ROM and RAM capacity, for the required additional functions.

After detatching the original central cpu from its terminals on the circuit board, the enhanced cpu is connected, by means of a flat cable, to the same terminals and additional input/output ports are provided to enable communication between one or more auxiliary cpu's (dedicated to the additional functions) and the central cpu for controlling the basic machine. The appropriate hardware is also fitted to the basic machine and the auxiliary cpu's are connected to the central enhanced cpu. Thus, if a basic photocopying machine is purchased by a user who subsequently wishes to update this machine by adding the AOD facility, the machine may be readily converted by fitting the mechanism to provide automatic overlays and the circuitry which provides the respective control and processing functions.The "piggy back" board may be either adapted for a particular peripheral device, such as an AOD, or it may be capable of handling other functions whereby, together with the appropriate input and output ports, further and/or different peripheral devices may be attached to the basic machine.

The arrangement is preferably such that on powering up the machine, the or each peripheral device communicates an identification code to the central cup, which then recognises the attachment of a correctly functioning peripheral device and thereby modifies its control function accordingly. If more than one peripheral device is attached to the basic machine, the central cpu will identify each correctly functioning peripheral device, in turn, on powering up, and thereby alter its control function accordingly. If any one or more of the peripheral devices is not operating correctly, its (auxiliary) cpu will communicate an error or failure to the central cpu, whereby the central cpu will consider that the relevant peripheral device is absent and will adjust its control function accordingly.The machine can then continue with at least the basic copying function, but also with any auxiliary function for any peripheral device which is connected and which is operating correctly. This is a particular advantage in that the basic copying function is unaffected by an error or a failure in any of the peripheral subsystems.

In order to substantially eliminate noise, communication between the central cpu and the auxiliary cpu's is carried out under conditions of strict protocol.

In other words, each message transmitted or received by the central or auxiliary cpu's is of a certain form which requires various checks to be carried out before the message is recognised as a true message. As noted above, a lot of noise is present on photocopying machines, especially in view of the use of unshielded cable. Clearly, it would be advantageous to avoid any need for shielded cable, since this will contribute to the expense on the system. Therefore, by using a strict protocol, noise on the system will be rejected and there will be no need to employ shielded wiring.

In a preferred embodiment of the invention, each message transceived by the cpu's in the system is of a form in which (a) the message includes a given number of bytes, (b) at least the first and last bytes have predetermined logic levels (eg the first byte being provided for identification and the last byte being provided for checking), and (c) the start and finish of each byte is substantially synchronised with a given clock frequency (i.e. within a predetermined range).

An additional reduction in noise is achieved in the preferred embodiment of the invention, by using relatively high voltage (e.g. 12 volt DC) levels for the transmitted information, and by transposing the high levels to relatively lower levels (e.g. 5 volt DC), and vice versa, at the communication inputs and outputs of the cpu's.

In order to avoid errors due to data collision, there is preferably a predetermined waiting period after each transmission of data in which the transmitting cpu checks to determine whether or not there is a request for retransmission from the receiving cpu.

Such a request is made if the receiving cpu is already engaged. If the transmitting cpu receives a "retransmit-request", the message is retransmitted by the transmitting cpu after expiry of the waiting period.

An example of the invention will now be described with reference to the accompanying schematic drawings in which: Figure 1 is a block diagram illustrating the general layout of the control system in a photocopying machine according to an embodiment of the invention, Figure 2 is a diagram illustrating the relative timing of messages in order to carry out a check on transmission, Figures 3(a) and 3(b) are diagrams illustrating the transmission checking sequence, and Figure 4 is a fragment of a schematic circuit of an AOD controller board to illustrate means for transposing voltage levels.

In order to simplify the description of an example of the invention, detailed descriptions of known components of hardware and circuitry in a photocopying machine will be omitted. For example, the specific embodiment of the invention now to be described was developed for use with the Rank Xerox Copier, type 3400, which is a photocopying machine of a basic type, having a central cpu control system and a sorter.

Peripheral devices, such as AOD devices, I/D terminals, stitcher/stackers etc. of either known construction, or as described in our copending application (i.e. with regard to the AOD) may be employed as modules to supplement the basic copying machine.

Referring to Figure 1, this schematically illustrates an example of the invention in which a basic photocopying machine is provided with a central cpu 1 which normally communicates with a document handler 2. The document handler 2 includes known hardware, circuitry and control systems whereby, for example, one or more copies of a master document can be reproduced.

A sorter 3 forms part of the basic machine in this example and an automatic overlay device (AOD) 4 is an example of a peripheral device having an auxiliary cpu (not shown) connected to the central cpu of the basic machine.

Compared with the Rank Xerox Copier, type 3400, the basic type of photocopying machine according to this embodiment of the invention has no semi-automatic document handler, but it has a programmable sorter.

It is capable of the following operating modes: Base Mode Copying: in which an operator places an original document in registry on an auxiliary platen using a platen cover.

Forms Printing: in which an operator places a prepared master document in registry on an AOD platen glass using a platen cover to produce composite imaged copies from a manually selected overlay/frame.

Automatic Forms Printing: in which the operator places a prepared master document in registry on the AOD platen using the platen cover to produce composite imaged copies from a pre-programmed selection of overlay frames.

In a Sorter Set Mode, each copy of an original or overlay will be sorted in increasing sequence so that the content of each bin is a single reflection of the set of originals or overlay.

In the Sorter Stack Mode, the total amount of copies from a predefined number of overlays will be put into one sorter bin. Copies from the next predefined number of overlays will be put into the next sequential bin. In a Sorter Addressable Mode, all copies of a specific overlay can be directed to any bin.

The type 3400 copier is converted into a machine embodying the invention by removing the semi-automatic document handling device and by adding the AOD. The central cpu is also replaced by a "piggy-back" board containing the enhanced processor which communicates with the auxiliary processor of the AOD. Additional RAM and ROM and input/output ports are also provided as necessary. The auxiliary cpu of the AOD controller is connected to the central cpu of the basic machine by means of a 10 wire flat cable in the transmitting and receiving directions, one wire providing ground connection, another wire providing synchronisation (to enable synchronous 8-bit word transfer), and the remaining wires transmitting data bits.Each message contains 4 Bytes in accordance with a strict protocol (see beiow). The use of a separate transmit/receive channel allows full duplex communication.

The circuitry can be implemented in low-cost commercial integrated circuits, compared with the much more complex and unique communication processors used in the Ethernet (Lotus) system.

The message transfer rate is lower than in the Lotus system, i.e. 10 messages per second (1 message=4 bytes). The transfer rate is therefore 320 baud. However, this transfer rate is more than sufficient because high level information is transferred, e.g. a high level command transfer may be "sort a job of 20 copies in the set mode".

In the Lotus system, some peripheral controllers are just input/output-controllers and this means that every input/output-action is communicated to/from the control cpu. This requires a high transfer rate (1.5 Mbaud) in real-time systems.

The high level command protocol used in this particular example incorporates 4 different parallel bytes including an instruction byte followed by 2 data bytes, followed by a checksom byte. A typical message is schematically illustrated in the timing/synchronisation diagram of Figure 2.

In Figure 2, (a) and (b) represent respective transmission and receive synchronisation pulses which are derived from a crystal controlled timing circuit initiated from the mains frequency. The duration between the rise and fall of each pulse represents 4 Msec/div.

Transmit and receive messages are represented by (b) and (d) respectively. In each 4 byte transmitted message, the first and last bytes have predetermined logic levels.

In the particular example, bit number 7 (b7) of the first or instruction byte must be a 0 and bit number 7 (b7) of the last byte must be a 1 to clearly identify the first and last bytes. The receiver checks the b7 bits to ensure bytesynchrone operation. The start and finish of each byte is substantially synchronised with the given clock frequency, i.e. the start and finish of each byte must be received within the period between the falling edge and next rising edge of the clock pulse as shown in the timing diagram in order to be recognised as a valid message. The number of synchronisation pulses used ensures that only messages containing the predetermined number (4) of bytes are recognised as true messages. In addition, the first or instruction byte transmitted must meet certain predefined timing limits, e.g.

the first low bit (bit 7) of the first byte must be received within a predetermined timing period relative to the trailing edge of the first synchronisation pulse, (i.e. the first low bit is received between certain specified values of time), in order for the first byte to be recognised as a valid start byte. Thus, the receiver starts a receiving cycle only when the first byte transmitted meets the predetermined timing limits. The cycle will then proceed and all further bytes are then checked for correct timing. In view of the requirement to receive the first low bit of the first byte within a narrow time slot, the receiver cycle is not likely to start on system noise. However, if it does start, the other bytes will probably not meet the timing requirements set in the system. The last byte contains a 7 bit inverted CRC (cyclic redundancy check) as a further precaution.An inverted checksom byte is used to ensure correct hardware operation, e.g. O signal levels will always be inverted to high logic levels and therefore be significant.

After every transmitted message there is a predetermined waiting period (40 Msec in this example) before a further message is transmitted.

This enables the receiver, if already engaged, or if an error is detected, to signal a retransmission request to the transmitter. The transmitter checks on a retranmission request during the waiting period and, if such a request is received, the original message is transmitted. Each cpu is provided with a receive buffer which causes a retransmission request to be transmitted if the receiver is already engaged either in a receiving, or in a transmitting mode.

Figures 3(a) and 3(b) are diagrams schematically illustrating part of a checking sequence performed by controllers, Contr 1 and Contr 2 which respectively relate to transmitters and receivers TR 1, RC 1 and2, RC2.

A message M is transmitted from TR1. If receiver RC2 detects a checksom (CHS) error, then a retranmission flag (RETRMS-FLG) is set. If transmitter TR2 is available, direct retransmission of M is requested from controller 1 via the retransmission (RETRM) message. In this case, transmitterTR2 transmits the same message again without any intermessage stop. The transmission flag (TRM-FLG) then stays at zero.

If transmitter TR2 is not available, controller 2 will wait until it is free. When TRM-FLG=O, the retransmission message (RETRM D) is transmitted to controller 1.

"RETRM D" is only then accepted by transmitterTR1, controller 1, if no message transmission is in process. However, if the latter is the case, a transmit error flag (TRMERR FLG) is set to indicate to the next level that the transmission has failed. This level then decides what next to do.

If a message is received when the receiver buffer has not yet been read by the program, then the transmitter is requested to make a retransmission.

Whilst the strict protocol described above largely solves problems of noise, further noise immunity is achieved by using 12 volt DC signal levels for the transmitted information and by using means for transposing the 12 volt DC levels to 5 volt DC levels, and vice versa, at the communication input and outputs of each cpu.

Figure 4 is a fragment of a schematic circuit of an AOD controller board showing the auxiliary cpu (8243) with voltage transposing means on its input and output terminals. Communication from the central cpu is received on the left hand side of the auxiliary cpu and the communication output to the central cpu is shown on the right hand side.

Standard circuit symbols are used in this diagram and will be understood by those skilled in the art.

Regarding the general operation of the system, the arrangement is such that on powering up the photocopying machine, each peripheral device communicates its status to the central cpu. The central cpu recognises a correctly functioning peripheral device and accommodates each operational peripheral device in its control mode.

If a peripheral device is not connected or is nonfunctional, the central cpu will modify its control mode accordingly, i.e. as if the peripheral device is not part of the machine.

In summary, advantages of at least the preferred form of the invention are as follows: (a) A modular system approach is adopted, which facilitates conversion of a basic machine into one having more complex functions.

(b) Each peripheral device includes its own (auxiliary) cpu thereby providing local intelligent control.

(c) Communication is by means of high level commands, for example, sort a job of 20 copies in a set mode.

(d) The central cpu is drastically relieved from controlling tasks carried out by the cpu's of peripheral devices.

(e) Wiring between the central cpu and each peripheral device is drastically reduced and limited to power connections and the communication channel.

Claims (9)

Claims

1. A photocopying machine of a basic type, including means for producing copies of a document and a central cpu for controlling the latter means, the photocopying machine being supplemented by one or more peripheral devices for performing auxiliary functions, characterised in that each of the peripheral devices includes an auxiliary cpu having its own dedicated communication link with the central cpu.

2. A photocopying machine according to claim 1, characterised in that communication between the central cpu and each auxiliary cpu is by means of messages having a predetermined form, said form being one in which: (a) the message includes a given number of bytes, (b) at least the first and last bytes have predetermined logic levels, and (c) the start and finish of each byte is substantially synchronised with a given clock frequency.

3. A photocopying machine according to claim 2, characterised in that said first byte is an instruction byte, said last byte is a checksom byte, and intermediate bytes contain data.

4. A photocopying machine according to claim 2 or 3, characterised in that means are provided at the central cpu and each auxiliary cpu to respond to a retransmission request in a predetermined waiting period following each transmitted message, and to transmit the original message if such a request is made.

5. A photocopying machine according to any one of the preceding claims, characterised in that said messages are communicated between the central cpu and each auxiliary cpu at a relatively high logic level, means being provided for transposing said high levels to relatively lower levels, and vice versa, at communication inputs and outputs of the central and auxiliary cpu's.

6. A photocopying machine according to any one of the preceding claims, characterised in that said central cpu is conditioned to recognise any one or more of said auxiliary cpu's when the respective peripheral device is attached to the basic machine and is in an operative condition, said central cpu automatically modifying its control function in accordance with the peripheral device or devices so attached to the basic machine.

7. A photocopying machine according to any one of the preceding claims, characterised in that said machine is one which has been converted into a form for performing one or more of said auxiliary functions by having fitted thereto the relevant peripheral device or devices, including the respective hardware and auxiliary cpu's, and by the fitting of an additional circuit board including a central cpu capable of enhanced processing for communicating with the auxiliary cpu's by their own dedicated communication links.

8. A photocopying machine according to claim 7, characterised in that said additional circuit board is a "piggy back" board on which the enhanced central cpu is mounted, said enhanced cpu being connected to terminals which were normally and previously connected to a central cpu for carrying out a basic copying function.

9. A photocopying machine substantially as herein described with reference to the accompanying drawings.