JPH01113358U - - Google Patents
Info
- Publication number
- JPH01113358U JPH01113358U JP806488U JP806488U JPH01113358U JP H01113358 U JPH01113358 U JP H01113358U JP 806488 U JP806488 U JP 806488U JP 806488 U JP806488 U JP 806488U JP H01113358 U JPH01113358 U JP H01113358U
- Authority
- JP
- Japan
- Prior art keywords
- pin
- integrated circuit
- length
- line
- element according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000009977 dual effect Effects 0.000 claims 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案の第１の実施例に係る集積回路
素子を示す正面図、第２図は第２の実施例に係る
集積回路素子を示す正面図、第３図ａは従来の集
積回路素子を示す平面図、第３図ｂは従来の集積
回路素子を示す正面図、第３図ｃは従来の集積回
路素子を示す側面図である。
図面中、１，１１，２１はパツケージ、２，１
２，２２は辺、３，１３，２３はピンである。
FIG. 1 is a front view showing an integrated circuit device according to a first embodiment of the present invention, FIG. 2 is a front view showing an integrated circuit device according to a second embodiment, and FIG. 3a is a conventional integrated circuit. FIG. 3b is a front view of a conventional integrated circuit device, and FIG. 3c is a side view of a conventional integrated circuit device. In the drawing, 1, 11, 21 are package, 2, 1
2 and 22 are sides, and 3, 13, and 23 are pins.
Claims (1)
あけて備えたデユアル インライン型の集積回路
素子において、ピンを備えた２辺の一端から他端
に向うに従いピンの長さを漸次短かくしたことを
特徴とする集積回路素子。 (2) ピンを備えた各辺において各ピンの先端を
結ぶ線が直線となるようにピン長さを設定したこ
とを特徴とする請求項(1)記載の集積回路素子。 (3) ピンを備えた各辺において各ピンの先端を
結ぶ線が放物線となるようにピン長さを設定した
ことを特徴とする請求項(1)記載の集積回路素子
。 (4) ピンを備えた各辺において各ピンの先端を
結ぶ線が懸垂線となるようにピン長さを設定した
ことを特徴とする請求項(1)記載の集積回路素子
。[Claims for Utility Model Registration] (1) In a dual in-line integrated circuit device that has a plurality of pins spaced apart on two sides of a package, from one end of the two sides with pins toward the other end, An integrated circuit device characterized in that the length of the pins is gradually shortened. (2) The integrated circuit element according to claim (1), wherein the pin length is set so that a line connecting the tip of each pin on each side provided with the pin is a straight line. (3) The integrated circuit element according to claim (1), wherein the pin length is set so that a line connecting the tips of each pin on each side provided with the pin forms a parabola. (4) The integrated circuit element according to claim (1), wherein the pin length is set so that a line connecting the tip of each pin on each side provided with the pin forms a catenary line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP806488U JPH01113358U (en) | 1988-01-27 | 1988-01-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP806488U JPH01113358U (en) | 1988-01-27 | 1988-01-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01113358U true JPH01113358U (en) | 1989-07-31 |
Family
ID=31213610
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP806488U Pending JPH01113358U (en) | 1988-01-27 | 1988-01-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01113358U (en) |
-
1988
- 1988-01-27 JP JP806488U patent/JPH01113358U/ja active Pending
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