JPH01111364A - Signal changeover circuit of semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To execute a test by detecting an ordinary signal to be input to an external functional block or the like of a semiconductor integrated circuit device by a method wherein, while a signal changeover means is selecting the ordinary signal on the bais of a control signal, an output means outputs this ordinary signal also to a test-signal input terminal. CONSTITUTION:When individual unit circuits of functional blocks inside a functional-block constituting region 2 are to be tested, a control signal of 'L' is input to a control-signal input part 12. Accordingly, test signals which have been input to individual test-signal input terminals 8-11 are output at individual output lines 13-16 of signal changeover circuits 1, 1a-1c. On the other hand, when a control signal of 'H' is input to the control-signal input terminal 12 during an ordinary operation, ordinary signals which have been input to the functional blocks inside the functional-block constituting region 2 via ordinary- signal input lines 4-7 are output from the output lines 13-16 of the signal changeover circuits 1, 1a-1c. By this setup, the ordinary signals which are input to the functional blocks or a logic circuit between the functional blocks are available at the test-signal input terminal, and their test can be executed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a signal switching circuit for a semiconductor integrated circuit device, and in particular to a signal switching circuit for use in testing functional blocks and logic circuits between functional blocks constituting a semiconductor integrated circuit device. The present invention relates to a signal switching circuit for a semiconductor integrated circuit device.

[Prior Art] A semiconductor integrated circuit device is configured by a combination of functional blocks that are divided into blocks for each unit circuit and logic circuits between functional blocks (glue logic circuits). When testing the functionality of a device, a signal switching circuit is used to switch between a test signal and a normal signal. This signal switching circuit is
It is provided inside the functional block configuration area or the inter-functional block logic circuit configuration area, and allows the normal signal and the test signal to be switched and input to the functional block or the inter-functional block logic circuit.

FIG. 4 is a circuit diagram showing a conventional signal switching circuit 28 provided in a functional block configuration area or an inter-functional block logic circuit configuration area of a semiconductor integrated circuit device. The normal signal input to the semiconductor integrated circuit device is input to the signal switching circuit 28 via the normal signal input line 4. The AND circuit 22 is supplied with the normal signal input from the normal signal input line 4, and is also supplied with the control signal input terminal 12 via the buffer 25.
The control signals input from the two are given in the same phase. This control signal input terminal 12 is provided outside the semiconductor integrated circuit device. The AND circuit 22 outputs a normal signal only when the control signal is at a high level (hereinafter referred to as "H11").

Further, the AND circuit 23 is supplied with a test signal input from a test signal input terminal 8 provided outside the semiconductor integrated circuit device, and a control signal from the control signal input terminal 12 is inverted by an inverter 26. Input as a reverse phase signal.

The control signal from the AND circuit 23 is low level (hereinafter referred to as
A test signal is output only when the signal is low (referred to as “L”).

The outputs of these AND circuits 22 and 23 are input to the OR circuit 24, and from the OR circuit 24, when the control signal is "°H", a normal signal is output to the output line 13, and the control signal is "°H".
°L”, a test signal is output to the output line 13.

During normal operation of the semiconductor integrated circuit device, the control signal is “H”
A normal signal is input to the functional block or the logic circuit between the functional blocks. - On the other hand, when testing the function of this functional block or the inter-functional block logic circuit, the control signal is set to "L" and a test signal is input to the functional block or the inter-functional block logic circuit.

[Problems to be Solved by the Invention] However, this conventional signal switching circuit 28 only has the function of outputting either the normal signal or the test signal to the output line 13 based on the control signal. Normally, the signal input line 4 is wired inside the semiconductor integrated circuit device, and the output signal of the OR circuit 24 is directly input to the functional block or the inter-functional block logic circuit via the output line 13. Even if an attempt is made to test a normal signal input to a functional block or a logic circuit between functional blocks, there is a problem in that the normal signal cannot be directly detected from outside the semiconductor integrated circuit device.

The present invention has been made in view of such problems, and includes:
An object of the present invention is to provide a signal switching circuit for a semiconductor integrated circuit device that can directly detect a normal signal during normal operation of the semiconductor integrated circuit device from outside the semiconductor integrated circuit device.

[Means for Solving the Problems] The signal switching circuit of the semiconductor integrated circuit device according to the present invention includes a test signal input terminal, a control signal input terminal, and a functional block configuration area or an inter-functional block logic circuit of the semiconductor integrated circuit device. A normal signal and a test signal are input from the normal signal input line and the test signal input terminal provided in the configuration area, respectively, and one of the normal signal and the test signal is selected based on the control signal input from the control signal input terminal. a signal switching means for outputting the signal to the functional block or the logic circuit between the functional blocks; and a signal switching means for controlling conduction by the control signal, and transmitting the normal signal to the test signal input terminal when the signal switching means selects the normal signal. It is characterized by having an output means for outputting.

[Operation] In the present invention, when testing the function of a functional block or a logic circuit between functional blocks, the signal switching means inputs the test signal to the test signal input terminal via the control signal input to the control signal input terminal. select the test signal to be used. Thereby, the signal output to the functional block or the logic circuit between functional blocks becomes a test signal. In this case, the output means is rendered non-conductive by the control signal, and no normal signal is output to the test signal input terminal.

On the other hand, during normal operation, the signal switching means selects the normal signal and inputs it to the functional block or the inter-functional block logic circuit via the control signal. In this case,
The output means is rendered conductive by the control signal and outputs a normal signal to the test signal input terminal. As a result, the normal signal input to the functional block or the inter-functional block logic circuit also appears at the test signal input terminal, making it possible to test it.

[Embodiments] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a circuit diagram showing a signal switching circuit 1 of a semiconductor integrated circuit device according to a first embodiment of the present invention. A normal signal within the semiconductor integrated circuit device is inputted via a normal signal input line 4 to a signal switching circuit 1 provided inside a functional block configuration area or an inter-functional block logic circuit configuration area.

The AND circuit 22 of the signal switching circuit 1 receives a normal signal from the normal signal input line 4 and also receives a control signal from the control signal input terminal 12 via the buffer 2 and the like. This control signal input terminal 12 is provided outside the semiconductor integrated circuit device. The AND circuit 22 outputs a normal signal to the OR circuit 24 only when the control signal is 'H'.

A test signal is input to the AND circuit 23 via a test signal input terminal 8 provided outside the semiconductor integrated circuit device, and a control signal from the control signal input terminal 12 is inverted by an inverter 26 and input thereto. . AND circuit 2
3, the test signal is output to the OR circuit 24 only when the control signal is "L".

The outputs of the AND circuits 2'2' and 23 are input to the OR circuit 24, respectively, and the output end of the OR circuit 24 is connected to the output line 13. Therefore, the OR circuit 24 outputs a normal signal to the output line 13 when the control signal is "H11", and outputs a test signal when the control signal is "II L II". A normal signal or a test signal is inputted to a functional block or an inter-functional block logic circuit through the functional block.

Furthermore, a 3-state buffer 21 is connected between the normal signal input line 4 and the test signal input terminal 8.
The state buffer 21 is controlled to be conductive by a control signal from the control signal input terminal 12. In other words, the control signal is “H”
”, the 3-state buffer 21 becomes conductive,
A normal signal is output to the test signal input terminal 8. Conversely, when the control signal is “L II”, the 3-state buffer 2
1 interrupts conduction between the normal signal input line 4 and the test signal input terminal 8.

Next, the operation of the signal switching circuit of the semiconductor integrated circuit device configured as described above will be explained. When testing the function of a functional block or a logic circuit between functional blocks constituting a semiconductor integrated circuit device, the control signal is set to "L", so that the AND circuit 22 does not output a normal signal to the OR circuit 24; AND circuit 23 outputs a test signal to OR circuit 24. Thereby, the OR circuit 24 outputs a test signal to the output line 13, which becomes an input signal to the functional block or the inter-functional block logic circuit. Note that the 3-state buffer 21 is off, and electrical continuity between the normal signal input line 4 and the test signal input terminal 8 is cut off.

On the other hand, during normal operation of the semiconductor integrated circuit device, the control signal is set to "H". This makes the test signal AN
It cannot pass through the D circuit 23, and the normal signal is
It passes through circuit 22. This normal signal is outputted to the output line 13 via the OR circuit 24 and becomes an input signal to the functional block or the inter-functional block logic circuit. Also, the control signal is
Since the level is "H", the 3-state buffer 21 becomes conductive, so that the normal signal also appears at the test signal input terminal 8. Therefore, the normal signal can be detected at the test signal input terminal 8 provided outside the semiconductor integrated circuit device, and thereby the normal signal input to the functional block or the logic circuit between the functional blocks can be tested. can.

FIG. 2 is a circuit diagram showing a part of the semiconductor integrated circuit 3 in which the signal switching circuit 1 configured as described above is provided in a functional block configuration area. A plurality of signal switching circuits 1. l
A, lb, and lc are provided. signal switching circuit 1a,
lb and lc have the same configuration as the signal switching circuit 1, but
Instead of normal signal input line 4, normal signal input line 5, 6.7
are connected to each other, and instead of the test signal input terminal 8, a test signal input terminal 9 provided outside the semiconductor integrated circuit device is used.
．． 10.11 are connected to each other, and instead of the output line 13, output lines 14 and 15.16 are connected to each other. Signal switching circuit 1. la, lb.

A control signal is input to the IC from a control signal input terminal 12. Output signals of the functional blocks are outputted from the functional block output lines 17 to 20.

In the semiconductor integrated circuit device configured in this way,
When testing each unit circuit of the functional blocks in the functional block configuration area 2, connect "'L" to the control signal input terminal 12.
” control signal is input. As a result, the signal switching circuit 1
．． 1 a + 1 b, 1 c Fuyuyama force line 13 to 1
6, the test signals input to test signal input terminals 8 to 11, respectively, are output. This becomes an input signal to each unit circuit configuring the functional blocks in the functional block configuration area 2, and is processed by each unit circuit and output to the functional block output lines 17 to 20.

On the other hand, during normal operation, by inputting an "H" control signal to the control signal input terminal 12, the normal signal input lines 4 to 7 are connected to the functional blocks in the functional block configuration area 2.
The normal signal input via the signal switching circuit 1.1
It is output from output lines 13 to 16 of a, lb, and lc.

This becomes an input signal for the functional blocks in the functional block configuration area 2, and the outputs of the functional blocks during normal operation appear on the functional block output lines 17 to 20. Further, the normal signals of the normal signal input lines 4 to 7 are connected to test signal input terminals 8, respectively.
to 11 are also output. Since the test signal input terminals 8 to 11 are provided outside the semiconductor integrated circuit device, normal signals can be easily detected. In addition, 3
A similar effect can be obtained by using a 3-state inverter, a transfer gate, or the like instead of the state buffer.

FIG. 3 is a circuit diagram showing a signal switching circuit 27 of a semiconductor integrated circuit device according to a second embodiment of the present invention. In FIG. 3, the same parts as in FIG. 1 are denoted by the same reference numerals, and their explanation will be omitted. In this embodiment, instead of the 3-state buffer 21 shown in FIG. 1, a 3-state buffer 29 whose conduction is controlled by a control signal is connected between the output line 13 and the test signal input terminal 8. This 3-state buffer 2
9 is conductive when the control signal is "H" and is non-conductive when the control signal is "L".

Now, when testing the functional blocks and the logic circuits between the functional blocks, a control signal of "L'' is inputted to the control signal input terminal 12. As a result, a test signal is outputted to the output line 13. In this case, the 3-state buffer 2
9 is in a non-conductive state.

During normal operation, the control signal is set to "H", so
A normal signal is output to the output line 13.

The normal signal on the output line 13 becomes an input signal for the functional blocks and the inter-functional block logic circuit, and is also output to the test signal input terminal 8 via the 3-state buffer 29.

When the normal signal passes through the AND circuit 22 and the OR circuit 24, it is slightly delayed and output to the output line 13. Therefore, in the first embodiment, there is a slight time lag between the normal signal input to the functional block etc. and the normal signal output to the test signal input terminal 8. However, in this embodiment, the normal signal that has passed through the AND circuit 22 and the OR circuit 24 is output to the test signal input terminal 8. It has the advantage of being able to detect signals.

Note that similar to the first embodiment, the same effect can be obtained by using a 3-state inverter, a transfer gate, or the like instead of the 3-state buffer.

[Effects of the Invention] As explained above, according to the present invention, when the signal switching means selects the normal signal based on the control signal, the output means also outputs this normal signal to the test signal input terminal. Therefore, the normal signal input to the functional block or the logic circuit between functional blocks is also output to the test signal input terminal.

This makes it possible to detect and test normal signals input to functional blocks and the like outside the semiconductor integrated circuit device.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a signal switching circuit of a semiconductor integrated circuit device according to a first embodiment of the present invention, and FIG. 2 is a circuit diagram showing a part of the semiconductor integrated circuit in which the circuit of the first embodiment is provided. figure,
FIG. 3 is a circuit diagram showing a signal switching circuit of a semiconductor integrated circuit device according to a second embodiment of the present invention, and FIG. 4 is a circuit diagram showing a signal switching circuit of a conventional semiconductor integrated circuit device. 1.27, 28; Signal switching circuit, 2; Functional block configuration area, 3; Semiconductor integrated circuit device, 4-7; Normal signal input line, 8-11; Test signal input terminal, 12; Control signal input terminal, 13 ~16; Output line, 17~20; Functional block output line, 21°29; 3-state buffer, 22.2
3; AND circuit, 24; OR circuit, 25; buffer, 2
6; Inverter

Claims (3)

[Claims] (1) A test signal input terminal and a control signal input terminal, and a normal signal input line and a test signal provided in a functional block configuration area or an inter-functional block logic circuit configuration area of a semiconductor integrated circuit device and a normal signal input terminal and a test signal input terminal, respectively. a signal switching means for selecting one of the normal signal and the test signal and outputting the selected signal to the functional block or the inter-functional block logic circuit based on the control signal inputted from the control signal input terminal; A signal switching circuit for a semiconductor integrated circuit device, comprising: output means that is conduction-controlled by a signal and outputs the normal signal to the test signal input terminal when the signal switching means selects the normal signal. . (2) The output means includes a 3-state buffer connected between the normal signal input line and the test signal input terminal;
The signal switching circuit for a semiconductor integrated circuit device according to claim 1, wherein the signal switching circuit is a state inverter or a transfer gate. (3) The output means is a 3-state buffer, a 3-state inverter, or a transfer gate connected between the output terminal of the signal switching means and the test signal input terminal. A signal switching circuit for a semiconductor integrated circuit device according to paragraph 1.