JPH01102880U - - Google Patents

Info

Publication number
JPH01102880U
JPH01102880U JP20109887U JP20109887U JPH01102880U JP H01102880 U JPH01102880 U JP H01102880U JP 20109887 U JP20109887 U JP 20109887U JP 20109887 U JP20109887 U JP 20109887U JP H01102880 U JPH01102880 U JP H01102880U
Authority
JP
Japan
Prior art keywords
surface mount
mount package
connector
pin
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20109887U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP20109887U priority Critical patent/JPH01102880U/ja
Publication of JPH01102880U publication Critical patent/JPH01102880U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係るIC搭載プリント板の一
実施例を示す図、第2図は第1図のコネクタ2に
接続されるコネクタ手段を示す図である。 1……表面実装パツケージIC、1a……端子
ピン、2,4……テスト用コネクタ、2a,4a
……ピン、3……接続パターン、10……プリン
ト板。
FIG. 1 is a diagram showing an embodiment of an IC-mounted printed board according to the present invention, and FIG. 2 is a diagram showing a connector means connected to the connector 2 of FIG. 1. 1...Surface mount package IC, 1a...Terminal pin, 2, 4...Test connector, 2a, 4a
...Pin, 3...Connection pattern, 10...Printed board.

Claims (1)

【実用新案登録請求の範囲】 表面実装パケージのICが組込まれたプリント
板において、 コネクタの各ピンが表面実装パツケージICの
総べての端子ピンとそれぞれ接続されたテスト用
コネクタ手段を設けたIC搭載プリント板。
[Claim for Utility Model Registration] A printed circuit board incorporating a surface mount package IC, which is equipped with a test connector means in which each pin of the connector is connected to all terminal pins of the surface mount package IC. printed board.
JP20109887U 1987-12-28 1987-12-28 Pending JPH01102880U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20109887U JPH01102880U (en) 1987-12-28 1987-12-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20109887U JPH01102880U (en) 1987-12-28 1987-12-28

Publications (1)

Publication Number Publication Date
JPH01102880U true JPH01102880U (en) 1989-07-11

Family

ID=31491475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20109887U Pending JPH01102880U (en) 1987-12-28 1987-12-28

Country Status (1)

Country Link
JP (1) JPH01102880U (en)

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