JPH0399438U - - Google Patents
Info
- Publication number
- JPH0399438U JPH0399438U JP884690U JP884690U JPH0399438U JP H0399438 U JPH0399438 U JP H0399438U JP 884690 U JP884690 U JP 884690U JP 884690 U JP884690 U JP 884690U JP H0399438 U JPH0399438 U JP H0399438U
- Authority
- JP
- Japan
- Prior art keywords
- socket
- connection
- terminal
- insulating substrate
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 4
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Description
第1図a,bは本考案の一実施例を示す平面図
及び側面図、第2図a,bは、従来のテストボー
ドの一例を示す平面図及び側面図である。
1…IC、2…ICソケツト、3…絶縁基板、
4…コネクタ、5…配線、7,8…接続ピン、9
…電源端子ピン、10…接続ブロツク。
1A and 1B are a plan view and a side view showing an embodiment of the present invention, and FIGS. 2A and 2B are a plan view and a side view showing an example of a conventional test board. 1...IC, 2...IC socket, 3...insulating substrate,
4... Connector, 5... Wiring, 7, 8... Connection pin, 9
...Power terminal pin, 10...Connection block.
Claims (1)
ソケツトの端子の夫々に対応して前記絶縁基板上
に設けたテスタ接続用のコネクタと、前記ICソ
ケツトの端子の夫々に対応して前記絶縁基板上に
設けた各1対の接続ピンと、前記ICソケツトの
各端子と一方の前記接続ピンとの間及び他方の前
記接続ピンと前記コヌクタとの間の夫々を接続す
る配線と、前記接続ピンに挿入して前記1対の接
続ピンの間を電気的に接続する接続ブロツクとを
備えたことを特徴とするテストボード。 An IC socket provided on an insulating substrate and the IC
a tester connection connector provided on the insulating substrate corresponding to each terminal of the socket; a pair of connection pins provided on the insulating substrate corresponding to each terminal of the IC socket; Wiring that connects each terminal of the socket and one of the connecting pins and between the other connecting pin and the connector, and a wiring that is inserted into the connecting pin and electrically connects between the pair of connecting pins. A test board characterized by comprising a connection block for connection.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP884690U JPH0399438U (en) | 1990-01-30 | 1990-01-30 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP884690U JPH0399438U (en) | 1990-01-30 | 1990-01-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0399438U true JPH0399438U (en) | 1991-10-17 |
Family
ID=31512463
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP884690U Pending JPH0399438U (en) | 1990-01-30 | 1990-01-30 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0399438U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020246300A1 (en) * | 2019-06-04 | 2020-12-10 | 株式会社クオルテック | Semiconductor element testing device and testing method for semiconductor element |
-
1990
- 1990-01-30 JP JP884690U patent/JPH0399438U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020246300A1 (en) * | 2019-06-04 | 2020-12-10 | 株式会社クオルテック | Semiconductor element testing device and testing method for semiconductor element |
US11994551B2 (en) | 2019-06-04 | 2024-05-28 | Qualtec Co., Ltd. | Semiconductor component test device and method of testing semiconductor components |
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