JP7798105B2 - データキャッシュ装置およびプログラム - Google Patents

データキャッシュ装置およびプログラム

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Publication number
JP7798105B2
JP7798105B2 JP2023540369A JP2023540369A JP7798105B2 JP 7798105 B2 JP7798105 B2 JP 7798105B2 JP 2023540369 A JP2023540369 A JP 2023540369A JP 2023540369 A JP2023540369 A JP 2023540369A JP 7798105 B2 JP7798105 B2 JP 7798105B2
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JP
Japan
Prior art keywords
data
unit
read
interface unit
prediction table
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2023540369A
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English (en)
Japanese (ja)
Other versions
JPWO2023013649A1 (https=
Inventor
崇 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
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Publication date
Application filed by Denso Corp filed Critical Denso Corp
Publication of JPWO2023013649A1 publication Critical patent/JPWO2023013649A1/ja
Application granted granted Critical
Publication of JP7798105B2 publication Critical patent/JP7798105B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/126—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2023540369A 2021-08-06 2022-08-02 データキャッシュ装置およびプログラム Active JP7798105B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021129531 2021-08-06
JP2021129531 2021-08-06
PCT/JP2022/029689 WO2023013649A1 (ja) 2021-08-06 2022-08-02 データキャッシュ装置およびプログラム

Publications (2)

Publication Number Publication Date
JPWO2023013649A1 JPWO2023013649A1 (https=) 2023-02-09
JP7798105B2 true JP7798105B2 (ja) 2026-01-14

Family

ID=85155661

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023540369A Active JP7798105B2 (ja) 2021-08-06 2022-08-02 データキャッシュ装置およびプログラム

Country Status (2)

Country Link
JP (1) JP7798105B2 (https=)
WO (1) WO2023013649A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2025134368A (ja) * 2024-03-04 2025-09-17 キオクシア株式会社 キャッシュサーバおよびコンテンツ配信システム

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004192403A (ja) 2002-12-12 2004-07-08 Fuji Xerox Co Ltd キャッシュメモリのデータ管理方法、及び情報処理装置
JP2015525940A (ja) 2012-09-28 2015-09-07 インテル コーポレイション 不揮発性メモリにコードをキャッシュする方法、システムおよび装置
JP2019114013A (ja) 2017-12-22 2019-07-11 株式会社富士通アドバンストエンジニアリング 演算処理装置及び演算処理装置の制御方法
US20200327061A1 (en) 2017-12-29 2020-10-15 Huawei Technologies Co., Ltd. Data prefetching method and apparatus, and storage device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0844625A (ja) * 1994-07-28 1996-02-16 Nec Software Ltd バッファキャッシュ機構
JP6791540B2 (ja) * 2019-02-28 2020-11-25 Ｎｅｃプラットフォームズ株式会社 畳み込み演算処理装置および畳み込み演算処理方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004192403A (ja) 2002-12-12 2004-07-08 Fuji Xerox Co Ltd キャッシュメモリのデータ管理方法、及び情報処理装置
JP2015525940A (ja) 2012-09-28 2015-09-07 インテル コーポレイション 不揮発性メモリにコードをキャッシュする方法、システムおよび装置
JP2019114013A (ja) 2017-12-22 2019-07-11 株式会社富士通アドバンストエンジニアリング 演算処理装置及び演算処理装置の制御方法
US20200327061A1 (en) 2017-12-29 2020-10-15 Huawei Technologies Co., Ltd. Data prefetching method and apparatus, and storage device

Also Published As

Publication number Publication date
WO2023013649A1 (ja) 2023-02-09
JPWO2023013649A1 (https=) 2023-02-09

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