JP7705897B2 - 超伝導集積回路を製造する方法 - Google Patents
超伝導集積回路を製造する方法 Download PDFInfo
- Publication number
- JP7705897B2 JP7705897B2 JP2022579787A JP2022579787A JP7705897B2 JP 7705897 B2 JP7705897 B2 JP 7705897B2 JP 2022579787 A JP2022579787 A JP 2022579787A JP 2022579787 A JP2022579787 A JP 2022579787A JP 7705897 B2 JP7705897 B2 JP 7705897B2
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- Prior art keywords
- superconducting
- layer
- superconducting metal
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- metal layer
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
- H10D48/383—Quantum effect devices, e.g. of devices using quantum reflection, diffraction or interference effects
- H10D48/3835—Semiconductor qubit devices comprising a plurality of quantum mechanically interacting semiconductor quantum dots, e.g. Loss-DiVincenzo spin qubits
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0912—Manufacture or treatment of Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/10—Junction-based devices
- H10N60/12—Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- General Engineering & Computer Science (AREA)
- Data Mining & Analysis (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computing Systems (AREA)
- Evolutionary Computation (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Computational Mathematics (AREA)
- Artificial Intelligence (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US202063042865P | 2020-06-23 | 2020-06-23 | |
| US63/042,865 | 2020-06-23 | ||
| PCT/US2021/038519 WO2021262741A1 (en) | 2020-06-23 | 2021-06-22 | Methods for fabricating superconducting integrated circuits |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2023531986A JP2023531986A (ja) | 2023-07-26 |
| JP2023531986A5 JP2023531986A5 (https=) | 2024-06-26 |
| JP7705897B2 true JP7705897B2 (ja) | 2025-07-10 |
Family
ID=79281777
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022579787A Active JP7705897B2 (ja) | 2020-06-23 | 2021-06-22 | 超伝導集積回路を製造する方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20230240154A1 (https=) |
| JP (1) | JP7705897B2 (https=) |
| WO (1) | WO2021262741A1 (https=) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9768371B2 (en) | 2012-03-08 | 2017-09-19 | D-Wave Systems Inc. | Systems and methods for fabrication of superconducting integrated circuits |
| EP4443484A3 (en) | 2017-02-01 | 2025-01-08 | D-Wave Systems Inc. | Systems and methods for fabrication of superconducting integrated circuits |
| US20200152851A1 (en) | 2018-11-13 | 2020-05-14 | D-Wave Systems Inc. | Systems and methods for fabricating superconducting integrated circuits |
| WO2020168097A1 (en) | 2019-02-15 | 2020-08-20 | D-Wave Systems Inc. | Kinetic inductance for couplers and compact qubits |
| US12367412B2 (en) | 2019-12-05 | 2025-07-22 | 1372934 B.C. Ltd. | Systems and methods for fabricating flux trap mitigating superconducting integrated circuits |
| US12376501B2 (en) | 2020-05-11 | 2025-07-29 | 1372934 B.C. Ltd. | Kinetic inductance devices, methods for fabricating kinetic inductance devices, and articles employing the same |
| JP2024526085A (ja) | 2021-06-11 | 2024-07-17 | シーク, インコーポレイテッド | 超伝導量子回路のための磁束バイアスのシステム及び方法 |
| US12392823B2 (en) | 2021-11-05 | 2025-08-19 | D-Wave Systems Inc. | Systems and methods for on-chip noise measurements |
| US20240145537A1 (en) * | 2022-10-31 | 2024-05-02 | Wolfspeed, Inc. | Semiconductor devices with additional mesa structures for reduced surface roughness |
| CN117460398B (zh) * | 2023-10-30 | 2026-01-13 | 本源量子计算科技(合肥)股份有限公司 | 超导线路及其制造方法 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004235252A (ja) | 2003-01-28 | 2004-08-19 | Fujitsu Ltd | 超伝導素子及び超伝導機器 |
| US20180337138A1 (en) | 2017-05-17 | 2018-11-22 | Northrop Grumman Systems Corporation | Preclean and deposition methodology for superconductor interconnects |
| WO2019036081A2 (en) | 2017-06-02 | 2019-02-21 | Northrop Grumman Systems Corporation | DEPOSIT METHODOLOGY FOR SUPERCONDUCTING INTERCONNECTIONS |
| JP2019528577A (ja) | 2016-08-23 | 2019-10-10 | ノースロップ グラマン システムズ コーポレイションNorthrop Grumman Systems Corporation | 超伝導デバイスの相互接続 |
| JP2020509608A (ja) | 2017-02-01 | 2020-03-26 | ディー−ウェイブ システムズ インコーポレイテッド | 超伝導集積回路の製造のためのシステム及び方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS613481A (ja) * | 1984-06-15 | 1986-01-09 | Nippon Telegr & Teleph Corp <Ntt> | トンネル型ジヨセフソン素子及びその作製方法 |
| US5290761A (en) * | 1992-10-19 | 1994-03-01 | E. I. Du Pont De Nemours And Company | Process for making oxide superconducting films by pulsed excimer laser ablation |
| JP3395299B2 (ja) * | 1993-11-08 | 2003-04-07 | ソニー株式会社 | 半導体装置の配線構造及び配線形成方法 |
| JPH0936112A (ja) * | 1995-07-24 | 1997-02-07 | Oki Electric Ind Co Ltd | Al配線の形成方法 |
| EP3098865B1 (en) * | 2009-02-27 | 2018-10-03 | D-Wave Systems Inc. | Method for fabricating a superconducting integrated circuit |
| US11276727B1 (en) * | 2017-06-19 | 2022-03-15 | Rigetti & Co, Llc | Superconducting vias for routing electrical signals through substrates and their methods of manufacture |
| US10243132B1 (en) * | 2018-03-23 | 2019-03-26 | International Business Machines Corporation | Vertical josephson junction superconducting device |
| US20200152851A1 (en) * | 2018-11-13 | 2020-05-14 | D-Wave Systems Inc. | Systems and methods for fabricating superconducting integrated circuits |
-
2021
- 2021-06-22 JP JP2022579787A patent/JP7705897B2/ja active Active
- 2021-06-22 US US18/010,283 patent/US20230240154A1/en active Pending
- 2021-06-22 WO PCT/US2021/038519 patent/WO2021262741A1/en not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004235252A (ja) | 2003-01-28 | 2004-08-19 | Fujitsu Ltd | 超伝導素子及び超伝導機器 |
| JP2019528577A (ja) | 2016-08-23 | 2019-10-10 | ノースロップ グラマン システムズ コーポレイションNorthrop Grumman Systems Corporation | 超伝導デバイスの相互接続 |
| JP2020509608A (ja) | 2017-02-01 | 2020-03-26 | ディー−ウェイブ システムズ インコーポレイテッド | 超伝導集積回路の製造のためのシステム及び方法 |
| US20180337138A1 (en) | 2017-05-17 | 2018-11-22 | Northrop Grumman Systems Corporation | Preclean and deposition methodology for superconductor interconnects |
| WO2019036081A2 (en) | 2017-06-02 | 2019-02-21 | Northrop Grumman Systems Corporation | DEPOSIT METHODOLOGY FOR SUPERCONDUCTING INTERCONNECTIONS |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2021262741A1 (en) | 2021-12-30 |
| US20230240154A1 (en) | 2023-07-27 |
| JP2023531986A (ja) | 2023-07-26 |
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