JP7436413B2 - Noise filter - Google Patents

Description

The technology disclosed in this specification relates to a noise filter.

Patent Document 1 discloses an output noise reduction device. The output noise reduction device reduces noise mixed into an output signal output from an electronic device housed in a metal housing to a supply device. The output noise reduction device includes a conductive bar connected to an electronic device, a magnetic core made of a magnetic material and penetrated by the conductive bar, and a first mounting board. The first mounting board includes a first fixed part fixed between the magnetic core and the conductive bar, a second fixed part connected to the metal casing, and a space between the first fixed part and the second fixed part. and a connection portion that connects the two with a capacitive element. The first mounting board is placed outside the metal casing. The capacitive element is connected to the conductive bar and the metal casing.

International Publication 2016/039414

In the above technology, the electronic device is housed in a metal casing, while the first mounting board on which the capacitive element is placed is placed outside the metal casing. Therefore, the distance between the electronic device, which is a noise source, and the capacitive element increases. As a result, parasitic inductance generated between the capacitive element and the electronic device increases. This reduces the noise reduction effect of the noise filter.

This specification provides a technique for suppressing parasitic inductance between a noise source and a capacitive element in a noise filter attached to a metal housing.

The noise filter disclosed in this specification includes a mounting part attached to a metal casing in which a noise source is housed, a conductive part attached to the mounting part and penetrating the metal casing, and a conductive part attached to the metal casing. A capacitor part is attached to the attachment part on the outside of the body and electrically connected to the conductive part. The conductive part includes an output terminal exposed from the metal casing, a first conductor connected to the power source and the capacitor part, and a first conductor connected to the first conductor and the output terminal. 2 conductors. The first conductor and the second conductor are arranged to generate mutual inductance.

In this configuration, each of the first conductor and the second conductor functions as an inductor of the noise filter. According to this configuration, mutual inductance can be generated between the first conductor and the second conductor, which are inductors of the noise filter, by the first conductor and the second conductor. As a result, parasitic inductance can be reduced by mutual inductance.

The first conductor has a first bus bar having a conductive flat plate portion, the second conductor has a conductive flat plate portion, and a second bus bar facing the first bus bar with a gap therebetween. It may have a bus bar.

According to this configuration, mutual inductance can be adjusted by adjusting the interval between the first bus bar and the second bus bar.

The capacitor section may include a substrate on which a plurality of chip capacitors are arranged.

According to this configuration, by arranging the substrate on which the plurality of chip capacitors are arranged along the outer wall of the metal casing, the size of the noise filter protruding from the metal casing can be reduced.

FIG. 3 is a perspective view of the noise filter of the embodiment attached to a metal housing. FIG. 3 is a perspective view of a conductive part in an example. FIG. 3 is a perspective view of the upper bus bar of the conductive part of the embodiment. FIG. 3 is a perspective view of the lower bus bar of the conductive part of the embodiment. FIG. 3 is a vertical cross-sectional view of an upper bus bar and a lower bus bar in a conductive part of an example. FIG. 3 is a perspective view of the noise filter of the embodiment with the resin portion removed. FIG. 2 is a perspective view of a noise filter according to an embodiment. FIG. 3 is a circuit diagram of a noise filter according to an embodiment. The equivalent circuit diagram of the noise filter of an Example. Graph showing the filter performance of the noise filter of the example.

Hereinafter, noise filters 10 according to a plurality of embodiments disclosed in this specification will be described with reference to the drawings.

As shown in FIG. 1, the noise filter 10 is connected to a power converter 4 (see FIG. 8) such as a converter or an inverter that is a noise source, and suppresses noise generated from the power converter 4. Noise filter 10 is attached to the side wall of metal casing 2 in which power converter 4 is housed. The noise filter 10 is fixed to the metal casing 2 while being inserted into a through hole penetrating the side wall of the metal casing 2 . The noise filter 10 includes a conductive part 12, a capacitor part 14, a resin part 16, and a pair of ground connection parts 18 and 19.

As shown in FIG. 2, the conductive section 12 includes an upper bus bar 40, a lower bus bar 42, and an output terminal 44. As shown in FIG. 3, the upper bus bar 40 is made by bending a flat plate of conductive material. In FIG. 3, arrows indicate the direction of current when the noise filter 10 is energized. The upper bus bar 40 includes a pair of connecting portions 40a and 40c, an opposing portion 40b, and a terminal attachment portion 40d. The opposing portion 40b is inserted into a through hole of the metal housing 2. The opposing portion 40b has a flat plate shape that is arranged along the axial direction of the through hole of the metal housing 2.

Each of the pair of connecting portions 40a, 40c is curved upward from the edge of the opposing portion 40b. The pair of connecting portions 40a and 40c are arranged opposite to each other. Each of the pair of connecting portions 40a, 40c has a flat plate shape above the opposing portion 40b and perpendicular to the opposing portion 40b.

The terminal attachment portion 40d is curved upward from the tip of the opposing portion 40b. The terminal attachment portion 40d has a flat plate shape above the opposing portion 40b and perpendicular to the opposing portion 40b. The terminal attachment portion 40d is arranged on the outside of the metal housing 2. The output terminal 44 is attached to the attachment hole penetrating the terminal attachment portion 40d. The output terminal 44 protrudes to the outside of the metal housing 2.

As shown in FIG. 2, a lower bus bar 42 is arranged below the upper bus bar 40. As shown in FIG. As shown in FIG. 4, the lower bus bar 42 is made by bending a flat plate of conductive material. In FIG. 4, arrows indicate the direction of current when the noise filter 10 is energized. The lower bus bar 42 includes a pair of connecting portions 42a and 42c and an opposing portion 42b. The opposing portion 42b is disposed on the lower surface of the opposing portion 40b with a gap therebetween. The opposing portion 42b has a flat plate shape arranged parallel to the opposing portion 40b. A connection hole for connecting to the power converter 4 is arranged at the end of the opposing portion 42b.

Each of the pair of connecting portions 42a, 42c is curved upward from the edge of the opposing portion 42b. The pair of connecting portions 42a and 42c are arranged opposite to each other. The pair of connecting portions 42a and 42c have a flat plate shape above the opposing portion 42b and perpendicular to the opposing portion 42b. As shown in FIG. 2, each of the pair of connection parts 42a, 42c is arranged on the outside of each of the pair of connection parts 40a, 40c, and is fixed by welding to the outer surface of each of the pair of connection parts 40a, 40c. has been done.

As shown in FIG. 5, the facing portion 40b and the facing portion 42b are arranged with a gap C1 in between. A thin insulating paper (for example, 0.1 mm thick) is placed in the gap C1, and the distance of the gap C1 is managed.

As shown in FIG. 6, a capacitor section 14 is attached to the conductive section 12. The capacitor section 14 is arranged outside the metal casing 2. The capacitor section 14 includes a plurality of chip capacitors 20 and a substrate 24. The substrate 24 has a flat plate shape and is arranged along the side wall of the metal casing 2 . A wiring pattern 22 is arranged on the surface of the substrate 24 opposite to the metal casing 2. The plurality of chip capacitors 20 are arranged in line according to the wiring pattern 22.

The substrate 24 has an opening 24a in the center. The substrate 24 is arranged so that the opening 24a overlaps the through hole of the metal housing 2. The upper bus bar 40 is inserted into the opening 24a. The terminal attaching portion 40d of the upper bus bar 40 is arranged on the outer side of the metal casing 2 than the board 24. Each of the pair of connecting portions 42a and 42c of the lower bus bar 42 penetrates the substrate 24 near the opening 24a. Each of the pair of connection parts 42a and 42c is a part that penetrates the substrate 24 and is electrically connected to the wiring pattern 22. Thereby, the lower bus bar 42 is electrically connected to the plurality of chip capacitors 20.

The capacitor section 14 is attached to a pair of ground connection sections 18 and 19. Ground connections 18, 19 are made of conductive material. The ground connection portion 18 includes a fixed portion 18a and a connecting portion 18b. The fixed portion 18a is attached to the metal casing 2 via a fastening member such as a bolt. Thereby, the fixed portion 18a is electrically connected to the metal casing 2. The ground connection portion 18 is electrically connected to the metal casing 2 and is set to a reference potential that is the same potential as the metal casing 2 .

The connecting portion 18b extends from the fixed portion 18a toward the substrate 24. The connecting portion 18b penetrates the substrate 24 at the edge of the substrate 24. The connecting portion 18b is a portion that penetrates the substrate 24 and is electrically connected to the wiring pattern 22. Thereby, the ground connection portion 18 is electrically connected to the plurality of chip capacitors 20. The ground connection portion 19 has the same configuration as the ground connection portion 18.

An O-ring 50 is arranged on the surface of the substrate 24 on the metal housing 2 side. As shown in FIG. 7, the noise filter 10 includes a resin part 16 that covers a part of the conductive part 12, the capacitor part 14, and the ground connection parts 18 and 19. The resin portion 16 is made of resin. The resin part 16 includes a covering part 16a that covers a part of the conductive part 12, that is, a part of the conductive part 12 that does not need to be exposed to the outside, and a covering part 16a that covers a part of the conductive part 12 that does not need to be exposed to the outside. A covering portion 16b is provided to cover a portion that does not need to be exposed. Note that the covering portion 16b may cover the substrate 24 from the side opposite to the metal housing 2.

The noise filter 10 is used with the lower bus bar 42 connected to the power converter 4 and the output terminal 44 connected to an electronic device or the like. As shown by the arrow in FIG. 4, when power is supplied from the power converter 4 toward the output terminal 44, a current flows from the opposing portion 42b of the lower bus bar 42 to each of the pair of connecting portions 42a, 42c. The current flows from each of the pair of connection parts 42a and 42c toward the upper bus bar 40 and the capacitor part 14, respectively. As shown by the arrows in FIG. 3, in the upper bus bar 40, current flows from each of the pair of connecting portions 40a and 40c to the output terminal 44 through the opposing portion 40b. As a result, the directions of the currents match in the opposing portions 40b and 42b.

The noise filter 10 is represented by a circuit diagram as shown in FIG. In FIG. 8, the direction in which the current flows is indicated by an arrow. In the noise filter 10, the lower bus bar 42 and the upper bus bar 40 function as an inductor. The noise filter 10 includes inductances of the lower bus bar 42 and the upper bus bar 40, and a plurality of chip capacitors 20 of the capacitor section 14. In the conductive part 12, since the lower bus bar 42 and the upper bus bar 40 are arranged with a small gap, mutual inductance occurs between the lower bus bar 42 and the upper bus bar 40 when current flows. The lower bus bar 42 and the upper bus bar 40 have positive mutual inductance because current flows in the same direction.

FIG. 9 shows an equivalent circuit of the noise filter 10. The noise filter 10 includes an upper bus bar 40 and a lower bus bar 42 that are two inductors connected in series, and a capacitor section 14 that is connected between the two inductors to ground connection sections 18 and 19 that are at a reference potential. It consists of and. The inductance of the lower bus bar 42 is _L1 , and the inductance of the upper bus bar 40 is _L2 . The capacitance of the capacitor section 14 is C. The inductor L3 is the sum of the equivalent series inductance (ESL) of the capacitor section 14 and the parasitic inductance of the wiring of the capacitor section 14, and has an inductance of _L3 . Z ₁ is the internal impedance of the noise source (ie, the power converter 4), and Z ₂ is the impedance of the load circuit (ie, the electronic device 6). In this noise filter 10, the upper bus bar 40 and the lower bus bar 42 are magnetically coupled, and assuming that currents I ₁ and I ₂ flowing through the upper bus bar 40 and the lower bus bar 42 flow in the directions shown in the figure, the upper bus bar 40 and the lower bus bar 42 are magnetically coupled. A positive mutual inductance M is generated between the lower bus bar 42 and the lower bus bar 42 . Assuming that the noise voltage is V _noise , the noise voltage V _L applied to the load circuit is expressed by the following equation.

Z _L1 : Impedance of the lower bus bar 42 (jω(L ₁ +M))
Z _L2 : Impedance of the upper bus bar 40 (jω(L ₂ +M))
Z _L3 : Impedance (jω(L ₃ - M)) consisting of the sum of the equivalent series inductor of the capacitor section 14 and the parasitic inductor of the wiring to which the capacitor C is connected
Z _C : Impedance of capacitor section 14 (1/jωC)
ω: Angular frequency (2πf)

As shown in Equation 1 above, in order to reduce the noise voltage V _L , it is important to reduce the numerator Z _L3 +Z _C. In order to reduce Z _L3 +Z _C , the mutual inductance M is adjusted to be the same as or approximate to the inductance L ₃ which is the sum of the equivalent series inductance of the capacitor section 14 and the parasitic inductance of the wiring of the capacitor section 14 . Thereby, the filter performance against noise in a high frequency band can be improved.

FIG. 10 shows the results of a simulation for confirming the filter performance of the noise filter 10. Note that the filter performance was calculated by 20×log ₁₀ (V _L /V _noise ) (dB). As shown in FIG. 10, the filter performance 104 of the noise filter of the comparative example configured so that mutual inductance does not occur between the upper bus bar 40 and the lower bus bar 42 is such that the filter performance against noise in the high frequency band deteriorates. are doing. On the other hand, the filter performance 102 of the noise filter 10 of this embodiment has significantly improved filter performance against noise in a high frequency band.

In the noise filter 10, each of the upper bus bar 40 and the lower bus bar 42 functions as an inductor of the noise filter 10. According to this configuration, mutual inductance can be generated between the upper bus bar 40 and the lower bus bar 42. As a result, by adjusting the mutual inductance between the upper bus bar 40 and the lower bus bar 42, parasitic inductance can be reduced.

The mutual inductance between the upper bus bar 40 and the lower bus bar 42 can be adjusted by adjusting the gap between the opposing portions 40b and 42b. Thereby, the mutual inductance between the upper bus bar 40 and the lower bus bar 42 can be easily adjusted. In addition, since the noise filter 10 can improve filter performance, it is possible to exhibit sufficient filter performance without arranging a magnetic material. Thereby, the size and cost of the noise filter 10 can be reduced.

In the capacitor section 14, a plurality of chip capacitors 20 are arranged on a substrate 24. Thereby, by arranging the substrate 24 along the side wall of the metal casing 2, it is possible to prevent the noise filter 10 from protruding largely from the metal casing 2.

Note that, for example, at least one of the upper bus bar 40 and the lower bus bar 42 of the conductive part 12 may not be a bus bar, but may be a conductive member such as a conductive wire that functions as an inductor. In this case, the two inductors may be arranged so that mutual inductance occurs.

Further, the structure of the noise filter 10 may be LCL type, LCLCL type, etc., and there is no limit to the number of inductors and capacitors. By reducing the parasitic inductance of the most downstream capacitor, the filter performance of the noise filter 10 can be improved. Note that since the filter performance of the noise filter 10 can be improved, the filter performance can be ensured without increasing the number of inductors and capacitors. Thereby, the size and cost of the noise filter 10 can be reduced.

Although specific examples of the present invention have been described in detail above, these are merely illustrative and do not limit the scope of the claims. The techniques described in the claims include various modifications and changes to the specific examples illustrated above. Further, the technical elements described in this specification or the drawings exhibit technical usefulness singly or in various combinations, and are not limited to the combinations described in the claims as filed. Furthermore, the techniques illustrated in this specification or the drawings can achieve multiple objectives simultaneously, and achieving one of the objectives has technical utility in itself.

2: Metal housing 4: Power converter 6: Electronic device 10: Noise filter 12: Conductive section 14: Capacitor section 16: Resin section 18, 19: Ground connection section 20: Chip capacitor 24: Substrate 40: Upper bus bar 40a, 40c: Connecting portion 40b: Opposing portion 40d: Terminal mounting portion 42: Lower bus bar 42a, 42c: Connecting portion 42b: Opposing portion 44: Output terminal

Claims (2)

A noise filter,
a mounting portion that is attached to a metal housing in which the noise source is housed;
a conductive part attached to the mounting part and penetrating the metal casing;
a capacitor part attached to the mounting part on the outside of the metal casing and electrically connected to the conductive part,
The conductive part is
an output terminal exposed from the metal casing;
a first conductor connected to the noise source and the capacitor section;
a second conductor connected to the first conductor and the output terminal,
The first conductor and the second conductor are arranged to generate mutual inductance,
The first conductor has a first bus bar having a conductive flat plate portion,
A noise filter , wherein the second conductor has a conductive flat plate portion, and has a second bus bar facing the first bus bar with a gap therebetween. The noise filter according to claim 1 , wherein the capacitor section includes a substrate on which a plurality of chip capacitors are arranged.

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