JP7415329B2 - Light emitting device and method for manufacturing the light emitting device - Google Patents

Description

The present invention relates to a light emitting device and a method for manufacturing the light emitting device.

Patent Document 1 discloses that a surface-emitting laser that emits single transverse mode linearly polarized light in a direction perpendicular to the substrate and a waveguide that guides light horizontally to the substrate are provided on the same semiconductor substrate. An optical functional element characterized in that the optical axes of waveguides intersect is disclosed.

Patent Document 2 describes a first mirror, an active layer formed above the first mirror, a second mirror formed above the active layer, and a current confinement layer formed above or below the active layer. The second mirror has a plurality of recesses arranged in a plane perpendicular to the light emission direction, and the light confinement region surrounded by the recesses is surrounded by a current confinement layer in plan view. A surface-emitting semiconductor laser is disclosed in which the surface-emitting semiconductor laser is formed inside a closed region.

Patent Document 3 discloses a light emitting section formed on a substrate and emitting laser light in a direction perpendicular to the substrate, and a light emitting section formed on the substrate that propagates part of the light emitted by the light emitting section in a direction horizontal to the substrate. The light propagating section includes a low equivalent refractive index region having an equivalent refractive index smaller than an equivalent refractive index of the light emitting region; A surface-emitting semiconductor laser is disclosed that includes a high-value refractive index region having a higher equivalent refractive index than the low-equivalent refractive index region, which is disposed between the low-equivalent refractive index region and a light amount adjusting means.

Japanese Patent Application Publication No. 11-274640 Japanese Patent Application Publication No. 2007-189033 JP2012-049180A

An object of the present invention is to provide a light emitting element in which deterioration of band characteristics is suppressed, and a method for manufacturing the light emitting element.

The light emitting device according to the first aspect includes a conductive region, a first non-conductive region having a first length and a second non-conductive region having a second length shorter than the first length, which are provided surrounding the conductive region. A first columnar body sharing a non-conductive region including a non-conductive region and having a resonator structure arranged in this order in a predetermined direction; a coupling portion; and a second columnar body having a resonator structure. , the length of a portion of the second non-conductive region in the direction intersecting the predetermined direction in the second columnar body is shorter than the length of the other second non-conductive region. be.

The light-emitting element according to the second aspect is the light-emitting element according to the first aspect, in which the second non-conductive region is not arranged in a part of the direction intersecting the predetermined direction.

A light emitting device according to a third aspect is the light emitting device according to the first aspect or the second aspect, in which the resonator structure includes a first multilayer film reflector, an active region, and a second multilayer film formed on the substrate in this order. a multilayer reflective mirror, the active region forming a part of the conductive region, and provided in a plurality of layers of at least one of the first multilayer reflective mirror and the second multilayer reflective mirror. An oxide layer forms the non-conductive region.

A light emitting element according to a fourth aspect is the light emitting element according to the third aspect, in which the second non-conductive region is formed of a plurality of oxide layers.

The method for manufacturing a light emitting device according to the fifth aspect includes preparing a substrate on which a multilayer film structure in which a first multilayer film reflector, an active region, and a second multilayer film reflector are laminated in this order is formed. and a step of forming, in the multilayer film structure, a first columnar body having a resonator structure, a coupling portion, and a second columnar body having a resonator structure arranged in this order in a predetermined direction. and oxidizing side surfaces of a plurality of layers included in the multilayer film structure to form a first non-conductive region with a first length and a second non-conductive region with a second length shorter than the first length. a step of forming a non-conductive region including a non-conductive region; and a step of deleting a part of the second non-conductive region in a direction intersecting the predetermined direction in the second columnar body. It is something that

According to the first and fifth aspects, it is possible to provide a light emitting element in which deterioration of band characteristics is suppressed and a method for manufacturing the light emitting element.

According to the second aspect, the effect of suppressing deterioration of band characteristics more reliably compared to the case where the second non-conductive region is arranged in a part of the direction intersecting a predetermined direction is achieved. play.

According to the third aspect, it is possible to suppress deterioration of band characteristics in a surface-emitting light emitting element having a coupled resonator structure.

According to the fourth aspect, there is an effect that deterioration of band characteristics is suppressed in a surface-emitting light emitting element having a coupled resonator structure that achieves higher speed.

1A is a cross-sectional view, and FIG. 1B is a plan view, showing an example of the configuration of a light emitting element according to an embodiment. FIG. 3 is a cross-sectional view illustrating the operation of the light emitting element according to the embodiment. 1 is a part of a cross-sectional view showing a method for manufacturing a light emitting element according to an embodiment. 1 is a part of a cross-sectional view showing a method for manufacturing a light emitting element according to an embodiment. (a) is a cross-sectional view showing the configuration of a light emitting element according to a comparative example, and (b) is a plan view showing the cutting position of the second oxidized region of the control mesa.

Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings. In the following embodiments, as a light emitting element according to the present invention, a coupled resonator is used in which a mesa forming a driving section (light emitting section) and a mesa forming a control section (feedback section) are coupled at a coupling section. A vertical cavity surface emitting semiconductor laser (VCSEL) having a structure will be exemplified and explained.

An example of the configuration of the light emitting element 10 according to the present embodiment will be described with reference to FIG. 1. FIG. 1(a) is a cross-sectional view of the light emitting device 10 according to this embodiment, and FIG. 1(b) is a plan view of the light emitting device 10. The cross-sectional view shown in FIG. 1(a) is a cross-sectional view taken along the line A-A' in the plan view shown in FIG. 1(b).

As shown in FIG. 1A, the light emitting device 10 includes an n-type GaAs contact layer 14 formed on a semi-insulating GaAs (gallium arsenide) substrate 12, a lower DBR (Distributed Bragg Reflector) 16, and an active layer. It is configured to include a region 24, a first oxidized region 32a, a second oxidized region 32b, a non-oxidized region 32c, an upper DBR 26, a p-side electrode 36, an n-side electrode 30, and a current blocking region 60. A current confinement layer 32 is formed by the first oxidized region 32a and the non-oxidized region 32c. Note that in FIG. 1, the insulating film covering the light emitting element 10, the wiring between the p-side electrode 36 and the p-side electrode pad, the wiring between the n-side electrode 30 and the n-side electrode pad, etc. are omitted. I'm drawing. Here, the first oxidized region 32a and the second oxidized region 32b are an example of a "non-conductive region" according to the present invention, and the non-oxidized region 32c is an example of a "conductive region" according to the present invention. Furthermore, as shown in FIG. 1A, in this embodiment, the length of the second oxidized region 32b is shorter than the length of the first oxidized region 32a, for example.

In this embodiment, a mode in which there are a plurality of second oxidized regions 32b (three in the example of FIG. Two pieces is fine. Further, in this embodiment, a mode in which the lengths of the plurality of second oxidized regions 32b are equal will be exemplified and explained, but the length is not limited to this, and each length may be different. For example, the length of each of the plurality of second oxidized regions 32b may be configured to become shorter as the distance from the active region 24 increases.

As shown in FIG. 1(b), the light emitting element 10 has two mesas (columnar bodies, also referred to as posts), each having a substantially rectangular shape, a mesa M1 that constitutes a drive section 62, and a mesa M1 that constitutes a control section 64. Equipped with M2. Furthermore, the light emitting element 10 has a coupling portion 40 at a portion where the mesa M1 and the mesa M2 are connected. The coupling portion 40 according to the present embodiment is provided in the constricted portion of the semiconductor layer formed by connecting the mesa M1 and the mesa M2. Each of mesa M1 and mesa M2 includes a lower DBR 16, an active region 24, a current confinement layer 32, and an upper DBR 26 that are commonly formed on the contact layer 14.

On the other hand, a current blocking region 60 formed within the upper DBR 26 is disposed between the mesa M1 and the mesa M2, that is, at the coupling portion 40. The current blocking region 60 according to the present embodiment is formed, for example, by implanting H+ (proton) ions from the top surface of the mesas M1 and M2 to the current confinement layer 32 (that is, to a depth that does not reach the active region 24). This is a high resistance region that electrically separates the mesa M1 of the drive section 62 and the mesa M2 of the control section 64. Note that the current blocking region 60 is configured to ensure separation between the drive section 62 and the control section 64, and depending on the tolerance of the separation, the current blocking region 60 may not be used. Alternatively, grooves may be formed instead of introducing impurities. The coupled resonator structure type light emitting device 10 according to the present embodiment includes the drive section 62 (mesa M1), the control section 64 (mesa M2), and the coupling section 40 having the above configuration.

Next, the operation of the light emitting element 10 will be explained with reference to FIG. 2(a). The drive unit 62 is a VCSEL type light emitting unit, and basically emits light by vertical resonance (resonance in the Z-axis direction) between the lower DBR 16 and the upper DBR 26, and outputs output light Lo. Note that when the drive unit 62 emits light, the positive electrode of the power source is connected to the p-side electrode 36 and the negative electrode is connected to the n-side electrode 30, and a driving current is passed in the -Z direction.

Here, a part of the light generated by the vertical resonance (hereinafter sometimes referred to as "oscillation light Lv") oozes out in the +X direction (direction parallel to the substrate 12) shown in FIG. 62 and propagates to the control unit 64 via the coupling unit 40 (hereinafter, this light may be referred to as “propagating light”). The propagating light is so-called slow light light that propagates while being repeatedly reflected between the lower DBR 16 and the upper DBR 26. On the other hand, as shown in FIG. 1A, in the light emitting element 10, the first oxidized regions 32a are formed in both mesas M1 and M2. However, although the second oxidized region 32b is formed in the mesa M1, there is a portion where it is not formed in the mesa M2. That is, as shown in FIG. 1(b), the boundary 18, which is the interface between the tip of the first oxidized region 32a and the non-oxidized region 32c, is formed over the entire mesas M1 and M2. On the other hand, a boundary 20, which is an interface between the second oxidized region 32b and the non-oxidized layer, is formed in the entire mesa M1 and a part of the mesa M2. That is, there is a region in mesa M2 in which the second oxidized region 32b is not formed. In other words, the interface of the mesa M2 that intersects with the propagation direction of the propagating light (that is, the +X direction) is an end surface S on which the second oxidized region 32b is not formed.

As a result, the propagated light that propagated from the drive section 62 to the control section 64 is reflected at the end surface S of the mesa M2 (hereinafter, the light reflected at the end surface S may be referred to as "reflected light Lr"), and is transmitted to the drive section 62. return. The reflected light Lr returned to the drive section 62 is superimposed on the oscillation light Lv, improving the modulation characteristics of the drive section 62 (expanding the modulation band). The above is the operating principle of the light emitting element 10 having a coupled resonator structure.

Next, referring again to FIG. 1, the configuration of the light emitting element 10 will be described in more detail. As an example, a semi-insulating GaAs substrate is used as the substrate 12 according to this embodiment. A semi-insulating GaAs substrate is a GaAs substrate that is not doped with impurities. A semi-insulating GaAs substrate has a very high resistivity, and its sheet resistance value is on the order of several MΩ.

The contact layer 14 formed on the substrate 12 is formed of, for example, a GaAs layer doped with Si. One end of the contact layer 14 is connected to the n-type lower DBR 16, and the other end is connected to the n-side electrode 30. That is, the contact layer 14 is interposed between the lower DBR 16 and the n-side electrode 30, and has a function of applying a constant potential to the semiconductor layer composed of the mesas M1 and M2. Note that the contact layer 14 may also serve as a buffer layer provided to improve the crystallinity of the substrate surface after thermal cleaning.

The n-type lower DBR 16 formed on the contact layer 14 has a film thickness of 0.25λ/n, where λ is the oscillation wavelength of the light emitting element 10 and n is the refractive index of the medium (semiconductor layer). It is a multilayer film reflecting mirror formed by alternately and repeatedly stacking two semiconductor layers having different refractive indexes. Specifically, the lower DBR 16 alternately includes an n-type low refractive index layer made of Al _0.90 Ga _0.1 As and an n-type high refractive index layer made of Al _0.15 Ga _0.85 As. It is constructed by repeatedly laminating layers. Note that in the light emitting device 10 according to the present embodiment, the oscillation wavelength λ is approximately 850 nm, as an example.

The active region 24 according to this embodiment may include, for example, a lower spacer layer, a quantum well active layer, and an upper spacer layer (not shown). The quantum well active layer according to the present embodiment includes, for example, four barrier layers made of Al _0.3 Ga _0.7 As and three quantum well layers made of GaAs provided therebetween. may be done. The lower spacer layer and the upper spacer layer are arranged between the quantum well active layer and the lower DBR 16 and between the quantum well active layer and the upper DBR 26, respectively, so that they have the function of adjusting the length of the resonator. , also has the function of a cladding layer for confining carriers. In the light emitting device 10, since the mesa M1 constitutes a VCSEL, the active region 24 in the mesa M1 functions as a light emitting layer.

The p-type current confinement layer 32 provided on the active region 24 has a function of constricting the current flowing from the p-side electrode 36 toward the n-side electrode 30 using the non-oxidized region 32c. As described above, the boundary 18 shown in FIG. 1(b) represents the interface between the non-oxidized region 32c and the first oxidized region 32a. As shown in FIG. 1B, the non-oxidized region 32c according to the present embodiment, which is divided by the boundary 18, has a constricted shape at the joint portion 40. As shown in FIG. Note that the second oxidized region 32b is provided as a means for improving the band of the light emitting element 10, as will be described later.

The upper DBR 26 formed on the current confinement layer 32 is a multilayer film reflecting mirror formed by alternately and repeatedly stacking two semiconductor layers each having a film thickness of 0.25λ/n and having different refractive indexes. . Specifically, the upper DBR 26 alternately includes a p-type low refractive index layer made of Al _0.90 Ga _0.1 As and a p-type high refractive index layer made of Al _0.15 Ga _0.85 As. It is constructed by repeatedly laminating layers.

An exit surface protection film 38 is provided on the upper DBR 26 to protect the light exit surface (see FIG. 4(e)). The emission surface protection film 38 is formed by depositing a silicon nitride film, for example.

Here, with reference to FIG. 5, the reason why a region in which the second oxidized region 32b is not arranged in the light emitting element 10 is provided on the mesa M2 side will be explained.

By the way, in a general VCSEL (VCSEL with a single mesa), one method for increasing the speed is to reduce the parasitic capacitance within the mesa. Furthermore, there is a method of forming a multilayer oxide layer as a method of reducing parasitic capacitance within the mesa. The parasitic capacitance is reduced by forming a multilayer oxide layer because the equivalent distance between the P electrode and the N electrode becomes longer. On the other hand, in a VCSEL having a coupled resonator structure having a driving mesa and a control mesa, as described above, the end face of the control mesa that intersects with the propagation direction of the slow light beam serves as a reflecting surface for the slow light beam.

FIG. 5A shows a light emitting device 100 according to a comparative example in which second oxide regions 32b and 32b', which are multilayer oxide layers, are introduced into a VCSEL having a coupled resonator structure in the same way as a general VCSEL. FIG. 5(b) shows a plan view of the light emitting element 100, and FIG. 5(a) shows a cross-sectional view along line B-B' in FIG. 5(b). As shown in FIG. 5A, the light emitting device 100 includes mesas M1 and M2', and a second oxidized region 32b' is also formed in mesa M2'. When the second oxidized region 32b' is formed in the mesa M2', the refractive index at the second oxidized region 32b is lowered compared to the end surface S of the mesa M2 where the second oxidized region 32b' is not formed. As a result, the propagating light is scattered as shown as scattered light Ls in FIG. 5(a), and the amount of reflected light that does not return to the mesa M1, which is the driving section, increases. Therefore, the band improvement effect due to reflected light is limited.

Therefore, in the present invention, the second oxidized region 32b' in the direction crossing the propagation direction of the slow light light (the second oxidized region 32b' located on the reflective surface of the slow light light) is removed by etching etc. in the manufacturing process. did. However, the oxide layer (first oxidized region 32a) constituting the current confinement layer (current confinement layer 32) is left. The line CC' shown in FIG. 5(b) indicates the position where mesa M2' is to be deleted. In the example shown in FIG. 5B, the second oxidized region 32b' is removed up to the boundary 20 of the mesa M2' along the sides H1 and H2. However, the deletion range of the mesa M2' in plan view is not limited to this, and may be a narrower range or a wider range depending on the generation range of the reflected light Lr. Further, the second oxidized region 32b' does not need to be completely removed, and may be left depending on the degree of scattered light Ls.

Next, a method for manufacturing the light emitting device 10 according to this embodiment will be described with reference to FIGS. 3 and 4. In this embodiment, a plurality of light emitting elements 10 are formed on one wafer, and one of the light emitting elements 10 will be illustrated and described below.

As shown in FIG. 3(a), first, an n-type contact layer 14, an n-type lower DBR 16, an active region 24, and a p-type upper DBR 26 are epitaxially grown in this order on a semi-insulating GaAs substrate 12. Prepare the wafer.

At this time, the n-type contact layer 14 is formed to have a carrier concentration of about 2×10 ¹⁸ cm ⁻³ and a film thickness of about 2 μm, for example. In addition, the n-type lower DBR 16 includes, for example, an Al _0.15 Ga _0.85 As layer and an Al _0.9 Ga _0.1 layer, each of which has a thickness of 1/4 of the medium wavelength λ/n. It is formed by alternately stacking As layers for 37.5 periods. The carrier concentration of the Al _0.3 Ga _0.7 As layer and the carrier concentration of the Al _0.9 Ga _0.1 As layer are each approximately 2×10 ¹⁸ cm ⁻³ , and the total film thickness of the lower DBR 16 is approximately 4 μm. It is said that Furthermore, as an example of the n-type carrier, Si (silicon) is used.

The active region 24 includes, for example, a lower spacer layer made of a non-doped Al _0.6 Ga _0.4 As layer, a non-doped quantum well active layer, and an upper part made of a non-doped Al _0.6 Ga _0.4 As layer. It is formed with a spacer layer. The quantum well active layer is composed of, for example, four barrier layers made of Al _0.3 Ga _0.7 As and three quantum well layers made of GaAs provided between the barrier layers. The thickness of each barrier layer made of Al _0.3 Ga _0.7 As is about 8 nm, the thickness of each quantum well layer made of GaAs is about 8 nm, and the thickness of the entire active region 24 is equal to the wavelength in the medium λ/ n.

For example, the p-type upper DBR 26 includes an Al _0.15 Ga _0.85 As layer and an Al _0.9 Ga _0.1 As layer, each of which has a thickness of 1/4 of the medium wavelength λ/n. It is formed by laminating 25 cycles of these alternately. At this time, the carrier concentration of the Al _0.15 Ga _0.85 As layer and the carrier concentration of the Al _0.9 Ga _0.1 As layer are each about 4×10 ¹⁸ cm ⁻³ , and the total film thickness of the upper DBR 26 is approximately 3 μm. Moreover, as a p-type carrier, C (carbon) is used as an example. Furthermore, the layer of the upper DBR 26 includes a layer (not shown; the composition is different from each layer of the upper DBR 26) for forming a first oxidized region 32a and a second oxidized region 32b in a step described later. Further, the uppermost layer of the upper DBR 26 is used as a contact layer (not shown) for forming ohmic contact with the p-side electrode 36.

Next, after forming a mask by photolithography, ions such as protons H+ are implanted into the upper DBR 26 to form a current blocking region 60 as shown in FIG. 3(b).

Next, after forming a film of a material to become an exit surface protective film on the upper DBR 26, the material is dry-etched using, for example, a photolithographic mask, so that the exit surface protective film 38 is formed as shown in FIG. 3C. form. As a material for the output surface protection film 38, a silicon nitride film is used, for example.

Next, after forming an electrode material on the contact layer (not shown) which is the uppermost layer of the upper DBR 26, the material is dry etched using a photolithographic mask, as shown in FIG. 3(d). , a p-side electrode 36 connected to the p-side electrode wiring 42 (see FIG. 4(e)) is formed. The p-side electrode 36 is formed using a Ti/Au stacked film, for example.

Next, a mask is formed on the wafer surface by photolithography and etching, and dry etching, for example, is performed using the mask to form a mesa M3 as shown in FIG. 3(e). The shape of mesa M3 in plan view corresponds to mesa M1 and M2' shown in FIG. 5(b).

Next, the wafer is subjected to an oxidation treatment to oxidize the mesa M3 from the side, thereby forming a first oxidized region 32a, second oxidized regions 32b and 32b' in the mesa M3, as shown in FIG. 3(f). At this time, the unoxidized region of the layer of the first oxidized region 32a becomes the unoxidized region 32c, and the first oxidized region 32a and the unoxidized region 32c form the current confinement layer 32. The non-oxidized region 32c is continuously formed from mesa M1 to M2' as shown in FIG. 3(f). Note that in this embodiment, in order to make the length of the second oxidized region 32b in the X-axis direction shorter than the length of the first oxidized region 32a in the X-axis direction, the layer forming the second oxidized region 32b and the The composition is made different from that of the layer forming the 1-oxide region 32a. More specifically, for example, the composition ratio of Al (aluminum) is different between the two.

Next, a mask is formed on the wafer surface by photolithography and etching, and dry etching, for example, is performed using the mask to form mesas M1 and M2 as shown in FIG. 4(a). That is, a portion of the lower DBR 16 and the active region 24 are etched to expose a portion of the contact layer 14, and a portion of the upper DBR 26 is further etched to remove the second oxide region 32b'. The end surface S of the mesa M2 from which the second oxidized region 32b' has been removed serves as a reflective surface for the propagating light propagating from the drive section 62. By this etching, the shape corresponding to mesa M2' becomes the shape corresponding to mesa M2. Note that during the main etching, it is not necessarily necessary to remove the entire second oxidized region 32b', and a portion may be left in consideration of the intensity of the reflected light Lr, etc. Furthermore, in this example, the deletion position of the lower DBR 16 and the active region 24 is different from the deletion position of the upper DBR 26 (a step is provided in the mesa M2). However, it is assumed that both deletion positions are the same position. (See FIG. 1(a)). Further, in this example, a mode in which the p-side electrode 36 is formed on the mesa M2 will be explained, but the invention is not limited to this, and the p-side electrode 36 may not be formed on the mesa M2 side (see FIG. 1(a)). .

Next, a mask is formed on the wafer surface by photolithography and etching, and the contact layer 14 is dry-etched using the mask to perform element isolation as shown in FIG. 4(b). In this embodiment, "element isolation" refers to separating the contact layer 14 between adjacent light emitting elements 10.

Next, after forming an electrode material on the contact layer 14, the material is dry-etched using, for example, a photolithographic mask to form the n-side electrode wiring 44 (FIG. 4(c)). Form an n-side electrode 30 connected to (see e)). For example, the n-side electrode 30 is formed using a stacked film of AuGe/Ni/Au.

Next, as shown in FIG. 4D, an insulating film 34 made of a silicon nitride film is formed in a region of the wafer excluding the exit surface protective film 38, the p-side electrode 36, and the n-side electrode 30. The insulating film 34 according to this embodiment is formed of, for example, a silicon nitride film (SiN film). Note that the material of the insulating film 34 is not limited to a silicon nitride film, and may be, for example, a silicon oxide film (SiO ₂ film), a silicon oxynitride film (SiON film), or the like.

Next, after forming an electrode material on the wafer surface, the electrode material is dry-etched using, for example, a photolithography mask, and as shown in FIG. A side electrode wiring 42 and an n-side electrode wiring 44 connected to the n-side electrode 30 are formed. The p-side electrode wiring 42 is connected to a p-side electrode pad (not shown), and the n-side electrode wiring 44 is connected to an n-side electrode pad (not shown). The p-side electrode wiring 42 and the n-side electrode wiring 44 are formed using a Ti/Au laminated film, for example.

Next, the wafer is diced in a dicing area (not shown) to separate the light emitting elements 10 into individual pieces. Through the above steps, the light emitting device 10 according to this embodiment is manufactured.

In the above embodiment, the two mesas M1 and M2 of the light emitting element 10 are described as having a substantially rectangular shape as an example. You can also use it as Furthermore, it is not necessary that mesas M1 and M2 have the same shape.

Further, in the above embodiment, the multilayer oxide layer (second oxide region 32b) is formed in the upper DBR 26, but the multilayer oxide layer (second oxidation region 32b) may be formed in the lower DBR 16 without being limited thereto.

Further, in each of the embodiments described above, the configuration of a single light-emitting element has been described as an example, but the present invention is not limited to this, and a light-emitting element array in which a plurality of light-emitting elements according to each of the embodiments described above is formed on a single substrate. It may also be in the form of

Further, in the above embodiments, a GaAs-based light emitting element using a semi-insulating GaAs substrate was exemplified and explained; It is also possible to use a substrate according to the present invention.

Further, in the above embodiments, an example in which an n-type contact layer is formed on the substrate has been described, but the present invention is not limited to this, and a mode in which a p-type contact layer is formed on the substrate may be used. In that case, in the above description, n-type and p-type may be read interchangeably.

10, 100 Light emitting element 12 Substrate 14 Contact layer 16 Lower DBR
18 boundary 20 boundary 24 active region 26 upper DBR
30 N-side electrode 32 Current confinement layer 32a First oxidized region 32b, 32b' Second oxidized region 32c Non-oxidized region 34 Insulating film 36 P-side electrode 38 Output surface protective film 40 Coupling portion 42 P-side electrode wiring 44 N-side electrode wiring 60 Current blocking region 62 Drive section 64 Control section H1, H2 Side Lr Reflected light Lo Output light Ls Scattered light Lv Oscillation light S End face M1, M2, M2', M3 Mesa

Claims (4)

A non-conductive region including a conductive region, a first non-conductive region having a first length provided surrounding the conductive region, and a second non-conductive region having a second length shorter than the first length. a first columnar body having a resonator structure, a coupling portion, and a second columnar body having a resonator structure, which are shared and arranged in this order in a predetermined direction;
The first length and the second length are the lengths of the first columnar body and the second columnar body in a cross section including the conductive region along the predetermined direction in a plan view. It's sad,
The light oscillated by the first columnar body is reflected by the second columnar body and output from the first columnar body,
A boundary indicating an interface between the second non-conductive region and a non-oxidized layer different from the conductive region is formed in the entire first columnar body and a part of the second columnar body,
Light emitting element. The resonator structure includes a first multilayer reflector, an active region, and a second multilayer reflector formed in this order on a substrate,
The active region forms a part of the conductive region, and the oxide layer provided on a plurality of layers of at least one of the first multilayer mirror and the second multilayer mirror forms a part of the non-conductive region. The light emitting device according to claim 1 . The light emitting device according to claim 2, wherein the second non-conductive region is formed of a plurality of oxide layers. preparing a substrate on which a multilayer film structure is formed in which a first multilayer film reflector, an active region, and a second multilayer film reflector are stacked in this order;
forming in the multilayer film structure a first columnar body having a resonator structure, a coupling portion, and a second columnar body having a resonator structure arranged in this order in a predetermined direction;
Side surfaces of a plurality of layers included in the multilayer film structure are oxidized to form a first non-conductive region with a first length and a second non-conductive region with a second length shorter than the first length. forming a non-conductive region comprising a region;
a step of deleting a part of the second non-conductive region when viewed from above in the predetermined direction in the second columnar body;
The light oscillated by the first columnar body is reflected by the second columnar body and output from the first columnar body,
The first length and the second length are the lengths of the first columnar body and the second columnar body in a cross section including the conductive region along the predetermined direction in a plan view. and
A boundary indicating an interface between the second non-conductive region and a non-oxidized layer different from the conductive region is formed in the entire first columnar body and a part of the second columnar body,
A method for manufacturing a light emitting element.