JP7388911B2 - Semiconductor device and its manufacturing method - Google Patents

Description

The present invention relates to a leadless package type semiconductor device and a manufacturing method thereof.

In recent years, leadless package type semiconductor devices such as SON packages (Small Outline Non-leaded packages) and QFN packages (Quad Flat Non-leaded packages) have been provided. A leadless package type semiconductor device is advantageous in making the semiconductor device smaller and thinner because no terminal for external connection protrudes from the sealing resin that seals the semiconductor element.

A leadless package type semiconductor device includes, for example, a semiconductor element, a lead frame, and a sealing resin, and the lead frame has a die pad portion and a plurality of lead portions. The die pad portion supports the semiconductor element. Each of the plurality of lead parts is electrically connected to the semiconductor element via metal wiring, and serves as a terminal for the external connection when the semiconductor device is mounted on a circuit board of an electronic device or the like. The sealing resin covers the semiconductor element. For example, a MAP (Molded Array Packaging) method is used to manufacture such semiconductor devices. In the MAP method, after a plurality of semiconductor elements are collectively sealed with a sealing resin on a lead frame, the semiconductor elements are diced into individual pieces each having one semiconductor element.

Japanese Patent Application Publication No. 2001-257304

When manufacturing leadless package type semiconductor devices using the MAP method, a process in which multiple semiconductors sealed in resin are diced with a blade and cut into individual pieces, a load is applied to the cross section and peeling occurs between the metal layers. sometimes occurred. In addition, it is necessary to improve reliability during mounting, and when mounting on an automotive board, it is necessary to be able to visually check the solder joint condition from the top using automatic visual inspection equipment. ing.

The present invention has been provided in view of the above-mentioned circumstances, and it eliminates peeling of the metal layer due to dicing, improves reliability during mounting, and allows the state of solder joints to be visually checked from the top of the board. The purpose of the present invention is to provide a semiconductor device and a method for manufacturing the same that can be confirmed in the following manner.

In order to solve the above-mentioned problems, the semiconductor device according to the present application includes a semiconductor element, a wiring layer on which the semiconductor element is mounted on the main surface, a first columnar electrode formed on the back surface of the wiring layer, and a wiring layer on which the semiconductor element is mounted. A sealing resin that covers a second columnar electrode formed on a main surface, a semiconductor element, and at least a portion of a wiring layer, a first columnar electrode, and a second columnar electrode, the sealing resin covering a semiconductor device in which a wiring layer extends. A first sealing resin side face facing the width direction and a sealing resin forming a sealing resin bottom face along the back surface of the wiring layer, and the ends of the wiring layer and the side faces of the first columnar electrodes are covered with the first sealing resin. exposed from the side surface, the bottom surface of the first columnar electrode is exposed from the bottom surface of the sealing resin, and at least one of the end of the wiring layer, the side surface of the first columnar electrode, and the second columnar electrode protrudes from the side surface of the first sealing resin. It is something that

The side surface of the first columnar electrode exposed from the side surface of the first sealing resin and the bottom surface of the first columnar electrode exposed from the bottom surface of the sealing resin may intersect with each other. The side surfaces of the first columnar electrode and the second columnar electrode may be within the plane of the first sealing resin side surface, and the ends of the wiring layer may protrude from the first sealing resin side surface. The bottom surface of the first columnar electrode may be within the plane of the bottom surface of the sealing resin.

The side surface of the second columnar electrode is exposed from the side surface of the first sealing resin, and the sealing resin is disposed in the width direction when the second columnar electrode exceeds a predetermined height from the top surface of the second columnar electrode in the direction in which the second columnar electrode extends from the wiring layer. A second sealing resin side surface may be formed outside the first sealing resin side surface.

The side surface of the second columnar electrode is exposed from the side surface of the first sealing resin, and the sealing resin extends in the width direction when the second columnar electrode exceeds the height of the top surface of the first columnar electrode in the direction in which the second columnar electrode extends from the wiring layer. The second sealing resin side surface may be formed outside the first sealing resin side surface.

The side surface of the second columnar electrode is exposed from the side surface of the first sealing resin, and the sealing resin extends in the width direction when the second columnar electrode exceeds the height of the top surface of the second columnar electrode in the direction in which the second columnar electrode extends from the wiring layer. A third sealing resin side surface is formed inside the first sealing resin side surface, and when a predetermined height is exceeded from the top surface of the second columnar electrode, a second sealing resin side surface is formed outside the first sealing resin side surface in the width direction. It may also form a side surface.

When the second columnar electrode exceeds the height of the end of the wiring layer in the direction in which it extends from the wiring layer, the sealing resin reaches the tip of the end of the wiring layer outside the side surface of the first sealing resin in the width direction. A fourth sealing resin side surface may be formed, and the side surface of the second columnar electrode may be covered by the fourth sealing resin side surface.

The height of the second columnar electrode may be greater than the height of the first columnar electrode. The thickness of the wiring layer may be smaller than the height of the second columnar electrode. The first columnar electrode and the second columnar electrode contain copper, and the wiring layer may further contain titanium or tantalum nitride in addition to copper. It may further include an external electrode that covers the wiring layer, the first columnar electrode, and the second columnar electrode exposed from the sealing resin. The external electrode may be formed by laminating a Ni layer, a Pd layer, and an Au layer.

The method for manufacturing a semiconductor according to this application includes a step of forming a first columnar electrode, a step of forming a first resin layer covering and sealing the first columnar electrode, and a step of grinding the first resin layer to form a first columnar electrode. A step of exposing the end of the columnar electrode, a step of forming a wiring layer connected to the first columnar electrode, a step of forming a second columnar electrode connected to the wiring layer, and a step of mounting a semiconductor element on the wiring layer. a step of forming a second resin layer that covers and seals the wiring layer, the second columnar electrode, and the semiconductor element; and a step of grinding the first resin layer toward the second resin layer to remove the bottom surface of the sealing resin and the sealing layer. A step of forming the bottom surface of the first columnar electrode exposed from the bottom surface of the resin stopper, and a step of irradiating a laser beam in the direction from the first resin layer to the second resin layer to spread the resin between adjacent semiconductor elements to a predetermined width. Remove and cut off, and form a first sealing resin side surface so that the end of the wiring layer and the side surface of the first columnar electrode are exposed, and at least one of the end of the wiring layer and the side surface of the first columnar electrode protrudes. It includes a process.

The step of removing and separating the resin between adjacent semiconductor elements by irradiating laser light is performed in the direction from the first resin layer to the second resin layer, and the first resin layer is removed from the top surface of the second columnar electrode to a predetermined height. The resin may be removed with a width of 1, and when a predetermined height is exceeded, the resin may be removed with a second width narrower than the first width.

The step of removing and separating the resin between adjacent semiconductor elements by irradiating laser light is performed in the direction from the first resin layer to the second resin layer, up to the height of the top surface of the second columnar electrode. The resin may be removed at a width, and the resin may be removed at a second width that is narrower than the first width beyond the height of the top surface.

The step of removing and separating the resin between adjacent semiconductor elements by irradiating laser light is performed in the direction from the first resin layer to the second resin layer, and the first resin layer is removed from the top surface of the second columnar electrode to a predetermined height. When the width exceeds a predetermined height, the resin is removed using a third width that is wider than the first width up to a predetermined height. The resin may be removed in width.

The step of removing and separating the resin between adjacent semiconductor elements by irradiating a laser beam is performed in the direction from the first resin layer to the second resin layer, with the first width extending to the end of the protruding wiring layer. The resin may be removed to a width beyond the end of the wiring layer that is narrower than the first width defined by the end of the opposing wiring layer.

The step of removing and separating resin between adjacent semiconductor elements by irradiating laser light may form irradiation marks on at least one of the wiring layer, the first columnar electrode, and the second columnar electrode.

According to this invention, peeling of the metal layer does not occur due to dicing, reliability during mounting is improved, and the state of solder joints can be visually checked from the top of the board.

FIG. 1 is a plan view of a semiconductor device according to a first embodiment. FIG. 2 is a bottom view of the semiconductor device of the first embodiment. FIG. 1 is a side view of the semiconductor device of the first embodiment. FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. FIG. 5 is an enlarged cross-sectional view of a part of the cross-sectional view shown in FIG. 4; FIG. 3 is a diagram illustrating steps of the method for manufacturing a semiconductor device according to the first embodiment. FIG. 7 is a diagram illustrating the steps of the method for manufacturing the semiconductor device of the first embodiment following FIG. 6 . FIG. 8 is a diagram illustrating the steps of the method for manufacturing the semiconductor device of the first embodiment following FIG. 7; FIG. 3 is a cross-sectional view illustrating a process of dicing the semiconductor device of the first embodiment. FIG. 7 is a side view of a semiconductor device according to a second embodiment. FIG. 3 is a cross-sectional view of a semiconductor device according to a second embodiment. FIG. 7 is a cross-sectional view illustrating a process of dicing a semiconductor device according to a second embodiment. FIG. 7 is a side view of a semiconductor device according to a third embodiment. FIG. 7 is a cross-sectional view of a semiconductor device according to a third embodiment. FIG. 7 is a cross-sectional view illustrating a process of dicing a semiconductor device according to a third embodiment. FIG. 7 is a side view of a semiconductor device according to a fourth embodiment. FIG. 7 is a cross-sectional view of a semiconductor device according to a fourth embodiment. FIG. 7 is a cross-sectional view illustrating a process of dicing a semiconductor device according to a fourth embodiment. FIG. 7 is a side view of a semiconductor device according to a fifth embodiment. FIG. 7 is a cross-sectional view of a semiconductor device according to a fifth embodiment. FIG. 7 is a cross-sectional view illustrating a process of dicing a semiconductor device according to a fifth embodiment.

Next, this embodiment will be described with reference to the drawings. In this embodiment mode, a SON package in which external electrodes are formed in two directions on the side surface of the package is exemplified, but it can be similarly applied to a QFN package in which external electrodes are formed in four directions on the side surface of the package. .

[First embodiment]
1 is a plan view of the semiconductor device 1 of the first embodiment, FIG. 2 is a bottom view of the semiconductor device 1, FIG. 3 is a side view of the semiconductor device 1, and FIG. 4 is a view of the semiconductor device 1 taken along cutting line IV-IV in FIG. FIG. 5 is an enlarged sectional view of a part of the sectional view of FIG. In the plan view of FIG. 1, the sealing resin is omitted so that the internal structure of the semiconductor device 1 is clear.

The semiconductor device 1 of the first embodiment includes a wiring layer 10, a semiconductor element 21 mounted on the main surface 10a of the wiring layer 10, and a sealing resin that covers and seals the semiconductor element 21 mounted on the wiring layer 10. 20. The wiring layer 10 is composed of a metal layer having a predetermined thickness and extending in a substantially planar shape, and includes electrode pads formed on the element bottom surface 21b of the semiconductor element 21 and external electrode pads formed on the surface of the sealing resin 20. A wiring connecting the electrode 15 is formed. The semiconductor element 21 has a substantially rectangular parallelepiped shape, and a plurality of electrode pads formed on the element bottom surface 21b are connected to the main surface 10a of the wiring layer 10 via a conductive connection layer 25. The sealing resin 20 forms a slightly flat rectangular parallelepiped package that covers the semiconductor element 21 mounted on the wiring layer 10 from the top surface 21a of the element and extends along the wiring layer 10. An external electrode 15 connected to the wiring layer 10 is formed from the bottom surface 20d to the bottom surface 20d.

The wiring layer 10 is composed of a metal layer containing copper as a main component and titanium or tantalum nitride, and may have a thickness in the range of 10 to 30 μm. The semiconductor element 21 may include, for example, an integrated circuit such as an LSI or a discrete element. The sealing resin 20 is formed by laminating a second resin layer 20b on a first resin layer 20a, and a resin interface 20e exists between the first resin layer 20a and the second resin layer 20b. The sealing resin 20 may be made of electrically insulating resin, such as epoxy resin or polyimide resin. The external electrode 15 is formed by laminating a Ni layer, a Pd layer, and an Au layer, and may have a thickness in the range of 1 to 5 μm. For example, the Ni layer may have a thickness of 3 μm, the Pd layer may have a thickness of 0.1 μm, and the Au layer may have a thickness of 0.03 μm.

As shown in FIG. 5, in the semiconductor element 21, an electrode pad 22 formed on the element bottom surface 21b is connected to the main surface 10a of the wiring layer 10 via a conductive connection layer 25. The electrode pad 22 is formed in an opening of an insulating film 23 covering the element bottom surface 21b. The electrode pad 22 may be configured by laminating a first layer 22a made of aluminum and a second layer 22b made of alternately deposited Ti (titanium) layers and Cu (copper) layers. The conductive connection layer 25 is composed of a Ni layer 25a, a solder layer 25b, and a Ni layer 25c from the electrode pad 22 toward the main surface 10a of the wiring layer 10. The wiring layer 10 is formed on the upper surface of the first resin layer 20a with a seed layer 26 interposed therebetween. The seed layer 26 may be, for example, a Ti layer with a thickness of 280 nm and a Cu layer with a thickness of 600 nm laminated, and the combined thickness of the seed layer 26 and the wiring layer 10 is in the range of 10 to 30 μm. Good too.

As seen in FIGS. 3 and 4, in the semiconductor device 1, the sealing resin 20 has a side surface facing in the direction in which the wiring layer 10 extends and surrounding the outer periphery. The side surfaces of the sealing resin 20 include a lower first side surface 20f that intersects with the bottom surface 20d of the sealing resin 20, and an upper second side surface 20g that intersects with the upper surface 20c of the sealing resin 20. An external electrode 15 is formed from the first side surface 20f to the bottom surface 20d of the sealing resin 20. It covers the end portion 10c. In the wiring layer 10, the width of the end portion 10c of the wiring layer 10 in contact with the external electrode 15 may be in the range of 100 to 450 μm.

A first columnar electrode 11 is formed on the back surface 10b of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The first columnar electrode 11 is connected to the back surface 10b of the wiring layer 10 with a top surface 11a of a substantially square whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the top surface 11a. It may have a shape. The first columnar electrode 11 has a height in the range of 20 to 50 μm, and may be composed mainly of copper.

A second columnar electrode 12 is formed on the main surface 10a of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The second columnar electrode 12 is connected to the main surface 10a of the wiring layer 10 with a substantially square bottom surface 12a whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the bottom surface 12a. It may have. The second columnar electrode 12 has a height of 40 to 100 μm and may be composed of copper as a main component.

The first side surface 20f of the sealing resin 20 has a height H1 from the height of the top surface 12c of the second columnar electrode 12 in the direction in which the second columnar electrode 12 extends from the wiring layer 10 from the bottom surface 20d of the sealing resin 20. has been formed up to. The second side surface 20g of the sealing resin 20 is formed in the above direction from the height of the top surface 12c of the second columnar electrode 12 to the upper surface 20c of the sealing resin 20 exceeding the height H1. The height H1 may be in the range of 20 to 200 μm. The second side surface 20g of the sealing resin 20 projects from the first side surface 20f over a length W1 in the direction in which the wiring layer 10 extends. The length W1 may be in the range of 10 to 50 μm.

The side surface 11b of the first columnar electrode 11 is within the first side surface 20f of the sealing resin 20 and exposed from the first side surface 20f, and the bottom surface 11c is within the bottom surface 20d of the sealing resin 20 and exposed from the bottom surface 20d. There is. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are The side surface 20f and the bottom surface 20d intersect on the ridge line. The side surface 12b of the second columnar electrode 12 is also located within the first side surface 20f of the sealing resin 20 and exposed from the first side surface 20f, similarly to the side surface 11b of the first columnar electrode 11.

The wiring layer 10 is sandwiched between the top surface 11a of the first columnar electrode 11 and the bottom surface 12a of the second columnar electrode 12, and is located between the side surface 11b of the first columnar electrode 11 and the side surface 11b of the first columnar electrode 11 within the first side surface 20f of the sealing resin 20. It protrudes from the side surface 12b of the two columnar electrodes 12. The length of the end portion 10c of the wiring layer 10 protruding from the first side surface 20f of the sealing resin 20, that is, the side surface 11b of the first columnar electrode 11 and the second columnar electrode within the first side surface 20f of the sealing resin 20. The length of the end portion 10c of the wiring layer 10 protruding from the side surface 12b of the wiring layer 12 may be in the range of 10 to 20 μm.

Side surface 11b and bottom surface 11c of first columnar electrode 11 exposed from first side surface 20f and bottom surface 20d of sealing resin 20, end portion 10c of wiring layer 10 protruding from first side surface 20f of sealing resin 20, and sealing. The external electrode 15 is formed to cover the side surface 12b of the second columnar electrode 12 exposed from the first side surface 20f of the resin 20. The external electrode 15 protrudes from the first side surface 20f and the bottom surface 20d of the sealing resin 20, respectively, and largely protrudes at a portion covering the end portion 10c of the wiring layer 10 that protrudes from the first side surface 20f of the sealing resin 20.

In the semiconductor device 1 of the first embodiment, the external electrode 15 protrudes from the first side surface 20f and the bottom surface 20d of the sealing resin 20, and the external electrode 15 further protrudes at a portion covering the end portion 10c of the wiring layer 10. Therefore, reliability during solder mounting is improved, and it becomes possible to visually check the state of solder joints from above the mounted board.

In the semiconductor device 1 of the first embodiment, the upper surface 20c of the sealing resin 20 is extended above the external electrode 15 protruding from the first side surface 20f of the sealing resin 20, and the upper surface 20c of the sealing resin 20 is extended over a length W1 from the first side surface 20f. A second side surface 20g is formed. Therefore, with the semiconductor device 1 mounted on the substrate, it is possible to form a fillet with raised solder directly under the second side surface 20g.

A series of steps for manufacturing the semiconductor device 1 of the first embodiment will be explained using FIGS. 6 to 9. A series of steps of this manufacturing method will be explained by taking the semiconductor device 1 of the first embodiment as an example, but can be similarly applied to semiconductor devices of other embodiments.

In the first step shown in FIG. 6(a), metal columns 31 are formed on the upper surface of the support base material 30. A glass substrate, a silicon substrate, or the like may be used as the support base material 30. Here, it is assumed that a silicon substrate is used as the support base material 30. A metal film containing copper as a main component is formed on the upper surface of the silicon substrate by sputtering, and metal pillars 31 are formed by photolithography. The metal column 31 is processed into the first columnar electrode 11 of the semiconductor device 1 in a subsequent process, and may be referred to as the first columnar electrode 11.

In the step of FIG. 6(b), the first resin layer 20a is formed to cover the metal column 31 formed on the upper surface of the support base material 30. The first resin layer 20a constitutes the sealing resin 20 of the semiconductor device 1. The first resin layer 20a may be made of an electrically insulating resin, such as an epoxy resin or a polyimide resin.

In the step of FIG. 6(c), the first resin layer 20a is ground from the top surface, and the top surface of the metal column 31 is exposed. The ground upper surface of the first resin layer 20a becomes a resin interface 20e with the second resin layer 20b to be formed later. A grindstone may be used for grinding.

In the step of FIG. 6(d), the outer circumferences of the support base material 30 and the first resin layer 20a are circle-cut into a terrace-like shape. By cutting the circle in a terrace shape in this way, it becomes possible to cover the first resin layer 20a with the second resin layer 20b later.

In the step of FIG. 7A, the wiring layer 10 is formed on the upper surface of the first resin layer 20a. The wiring layer 10 is formed so as to be connected to the top surface of the metal column 31 exposed on the top surface of the first resin layer 20a. In this step, a metal film containing copper as a main component and optionally containing titanium or tantalum nitride is formed on the upper surface of the first resin layer 20a by sputtering, and the wiring layer 10 is formed by photolithography.

In the step of FIG. 7B, the second columnar electrode 12 is formed on the main surface of the wiring layer 10. In this step, a metal film containing copper as a main component is formed on the main surface of the wiring layer 10 by a plating method, and a second columnar electrode 12 is formed by photolithography.

In this embodiment, by separately forming the first columnar electrode 11 and the second columnar electrode 12 formed from the metal column 31, a metal layer with a height of 100 μm or more can be formed, and this metal layer It is possible to suppress the support base material 30 from warping when forming the support base material 30. Thereby, poor adhesion between the first columnar electrode 11 and the second columnar electrode 12 and the sealing resin 20 can be suppressed.

In the seventh step (c), the semiconductor element 21 is mounted on the wiring layer 10. First, the conductive connection layer 25 is formed on the main surface 10a of the wiring layer 10. The conductive connection layer 25 may include a Ni layer, a solder layer, and a Ni layer stacked on the main surface of the wiring layer 10 in this order. The conductive connection layer 25 is formed by plating and photolithography.

The semiconductor element 21 has electrode pads 22 coated with flux, and is temporarily bonded to the conductive connection layer 25 using a flip chip bonder with the element bottom surface 21b facing the wiring layer 10. Thereafter, the semiconductor element 21 is connected to the conductive connection layer 25 by melting the conductive connection layer 25 by reflow, cooling and solidifying the conductive connection layer 25.

In the step of FIG. 7D, the second resin layer 20b is formed to cover the first resin layer 20a, the wiring layer 10, the second columnar electrode 12, and the semiconductor element 21. The second resin layer 20b constitutes the sealing resin 20 together with the first resin layer 20a. A resin interface 20e is formed between the first resin layer 20a and the second resin layer 20b. The second resin layer 20b, like the first resin layer 20a, may be made of an electrically insulating resin, such as an epoxy resin or a polyimide resin.

In the step of FIG. 8A, a circle cut is performed to grind the supporting base material 30, the first resin layer 20a, and the second resin layer 20b to a predetermined distance from the outer periphery. Due to this circle cut, the first resin layer 20a covered by the second resin layer 20b is exposed to the outer periphery.

In the step of FIG. 8(b), the support base material 30 is turned over so that it faces upward, and the support base material 30 is ground and removed toward the second resin layer 20b located below, and then the first resin layer 20b is removed. 20a is also ground to a predetermined depth. By this grinding, a metal column 31 is formed on the first columnar electrode 11, and the bottom surface 11c of the first columnar electrode 11 is exposed from the first resin layer 20a. After removing the support base material 30, a dicing tape (not shown) is attached to the upper surface of the second resin layer 20b. In the dicing process, the support base material 30 is turned over, with the upper surface of the second resin layer b facing downward in the figure.

In the step of FIG. 8C, dicing is performed in which the sealing resin 20 between adjacent semiconductor elements is removed in a predetermined width by irradiation with a laser beam to separate the semiconductor elements into individual pieces. In this dicing process, the side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12 are exposed from the first resin layer 20a or the second resin layer 20b, and the end portion 10c of the wiring layer 10 is exposed. It protrudes from the first resin layer 20a and the second resin layer 20b. Note that at this time, the dicing tape is not completely cut by the laser beam. Thereby, even if the resin containing the semiconductor device 1 is diced, the semiconductor device 1 will not fall apart because it is connected by the dicing tape.

In the step of FIG. 8D, an external electrode 15 is formed to cover the exposed side surface 11b and bottom surface 11c of the first columnar electrode 11, the side surface 12b of the second columnar electrode 12, and the protruding end portion 10c of the wiring layer 10. be done. The external electrode 15 is formed by laminating a Ni layer, a Pd layer, and an Au layer in this order by plating. The dicing tape may be removed after the step of forming the external electrodes 15.

FIG. 9 is a cross-sectional view illustrating the process of dicing the semiconductor device 1 of the first embodiment using laser light. FIG. 9(a) shows the state before dicing and corresponds to FIG. 8(b). FIG. 9(b) shows the state after dicing and corresponds to FIG. 8(c). In FIG. 9, a dicing tape (not shown) is attached to the upper surface 20c of the sealing resin 20 that is constituted by the first resin layer 20a. Note that in the dicing process, the semiconductor device 1 is turned over so that the upper surface 20c is facing downward in the figure.

Dicing is performed by irradiating with laser light. Since the processing width of the laser beam to be irradiated is smaller than the width to remove the resin, the laser beam is appropriately scanned and irradiated. As the laser light source, an Nd:YAG laser or its second harmonic (SHG) laser may be used. For example, the processing width may be set to 50 μm using the SHG laser.

As shown in FIG. 9A, a pair of opposing first columnar electrodes 11 form a gap of width G11 between side surfaces 11b. Similarly, a pair of opposing second columnar electrodes 12 also form a gap of width G11 between their side surfaces 12b. The width G11 may be in the range of 50 to 150 μm. The gap between the opposing ends 10c of the wiring layer 10 is larger than the width G11 because the end 10c of the wiring layer 10 protrudes from the side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12. It's getting narrower.

First, laser light is irradiated to remove the first resin layer 20a and the second resin layer 20b by the width G11 of the gap formed by the opposing first columnar electrode 11 and second columnar electrode 12. Although the gap between the end portions 10c of the wiring layer 10 facing each other is narrow, the second resin layer 20b directly under the end portion 10c of the wiring layer 10 may also be removed by the diffracted light of the laser beam. Irradiation of the laser beam may cause unevenness of irradiation marks to be formed on the side surface 11b of the first columnar electrode 11, the end portion 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12.

In the dicing process, the first resin layer 20a between the side surfaces 11b of the first columnar electrode 11 is removed, and the second resin layer 20a between the ends 10c of the wiring layer 10 and the side surface 12b of the second columnar electrode 12 is removed. After removing the layer 20b, the second resin layer 20b is further removed with this width G11 from the top surface 12c of the second columnar electrode 12 until the height H1 is reached. As a result, the first side surface 20f of the sealing resin 20 constituted by the first resin layer 20a and the second resin layer 20b is formed. Here, in the dicing process, the semiconductor device 1 is turned upside down, and the downward direction in the figure is the direction of the top surface 12c of the second columnar electrode 12 and the height H1.

Next, the center of the diced portion having the width G11 is diced with a width G12 narrower than the width G11, and the second resin layer 20b is removed up to the upper surface 20c of the sealing resin 20. Thereby, the sealing formed by the second resin layer 20b protruding over the length W1 in the direction in which the wiring layer 10 extends from the first side surface 20f of the sealing resin 20 formed by the first resin layer 20a and the second resin layer 20b. A second side surface 20g of the resin 20 is formed.

From the first side surface 20f of the sealing resin 20 formed by dicing, the side surface 11b of the first columnar electrode 11, the end portion 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12 are exposed. The side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12 are within the first side surface 20f of the sealing resin 20, and the end portion 10c of the wiring layer 10 protrudes from the first side surface 20f of the sealing resin 20. ing. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are the first side surface of the sealing resin 20. 20f and the bottom surface 20d intersect on the ridge line.

After such a dicing process, the external electrodes 15 are formed by plating in the process shown in FIG. 8(d), and the semiconductor device 1 is finally completed. In the semiconductor device 1, the external electrode 15 protrudes from the first side surface 20f and the bottom surface 20d of the sealing resin 20. A portion of the external electrode 15 that covers the end portion 10c of the wiring layer 10 that is sandwiched between the side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12 and protrudes further protrudes.

Since the semiconductor device 1 of the first embodiment is diced by laser irradiation, no stress is placed on the cross section. Therefore, the structure of the stacked first columnar electrode 11, wiring layer 10, and second columnar electrode 12 is maintained before and after dicing, and the connection between these members is also guaranteed. In addition, if unevenness of irradiation marks is formed on the side surface 11b of the first columnar electrode 11, the end 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12 due to laser irradiation, the reliability of solder mounting may be reduced. further improves.

[Second embodiment]
FIG. 10 is a side view of the semiconductor device 2 of the second embodiment, and FIG. 11 is a cross-sectional view of the semiconductor device 2 taken along cutting line XI-XI in FIG. The semiconductor device 2 of the second embodiment is the semiconductor device of the first embodiment except for the structure of the side part of the sealing resin 20 including the first columnar electrode 11, the end 10c of the wiring layer 10, and the second columnar electrode 12. Since the semiconductor device 1 has the same structure as the semiconductor device 1 of the first embodiment, the same reference numerals are given to the same components as those of the semiconductor device 1 of the first embodiment.

In the semiconductor device 2, the sealing resin 20 has a side surface facing in the direction in which the wiring layer 10 extends and surrounding the outer periphery. The side surface of the sealing resin 20 includes a first side surface 20f extending from the bottom surface 20d to the top surface 20c of the sealing resin 20. An external electrode 15 is formed from the first side surface 20f to the bottom surface 20d of the sealing resin 20. The end portion 10c of 10 is covered.

A first columnar electrode 11 is formed on the back surface 10b of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The first columnar electrode 11 is connected to the back surface 10b of the wiring layer 10 with a top surface 11a of a substantially square whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the top surface 11a. It may have a shape.

A second columnar electrode 12 is formed on the main surface 10a of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The second columnar electrode 12 is connected to the main surface 10a of the wiring layer 10 with a substantially square bottom surface 12a whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the bottom surface 12a. It may have.

The side surface 11b of the first columnar electrode 11 is within the first side surface 20f of the sealing resin 20 and exposed from the first side surface 20f, and the bottom surface 11c is within the bottom surface 20d of the sealing resin 20 and exposed from the bottom surface 20d. There is. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are The side surface 20f and the bottom surface 20d intersect on the ridge line. The side surface 12b of the second columnar electrode 12 is also located within the first side surface 20f of the sealing resin 20 and exposed from the first side surface 20f, similarly to the side surface 11b of the first columnar electrode 11.

The wiring layer 10 is sandwiched between the top surface 11a of the first columnar electrode 11 and the bottom surface 12a of the second columnar electrode 12, and is located between the side surface 11b of the first columnar electrode 11 and the side surface 11b of the first columnar electrode 11 within the first side surface 20f of the sealing resin 20. It protrudes from the side surface 12b of the two columnar electrodes 12.

Side surface 11b and bottom surface 11c of first columnar electrode 11 exposed from first side surface 20f and bottom surface 20d of sealing resin 20, end portion 10c of wiring layer 10 protruding from first side surface 20f of sealing resin 20, and sealing. The external electrode 15 is formed to cover the side surface 12b of the second columnar electrode 12 exposed from the first side surface 20f of the resin 20. The external electrode 15 protrudes from the first side surface 20f and the bottom surface 20d of the sealing resin 20, respectively, and largely protrudes at a portion covering the end portion 10c of the wiring layer 10 that protrudes from the first side surface 20f of the sealing resin 20.

In the semiconductor device 2 of the second embodiment, the external electrode 15 protrudes from the first side surface 20f and bottom surface 20d of the sealing resin 20. Further, the external electrode 15 protrudes largely in a portion covering the end portion 10c of the wiring layer 10. By having such a structure, reliability is improved when the semiconductor device 2 is mounted on a board by soldering, and it becomes possible to visually confirm the state of the solder joint from the top of the board.

FIG. 12 is a cross-sectional view illustrating the process of dicing the semiconductor device 2 of the second embodiment using laser light. Although FIGS. 7 and 8 show a series of steps for manufacturing the semiconductor device 1 of the first embodiment, the semiconductor device 2 of the second embodiment is also manufactured by such a series of steps. FIG. 12 corresponds to the state after dicing shown in FIG. 8(c). In FIG. 12, a dicing tape (not shown) is attached to the upper surface 20c of the sealing resin 20 that is constituted by the first resin layer 20a. Note that in the dicing process, the semiconductor device 2 is turned over so that the upper surface 20c is facing downward in the figure.

Dicing is performed by irradiating with laser light. Since the processing width of the laser beam to be irradiated is smaller than the width to remove the resin, the laser beam is appropriately scanned and irradiated. As the laser light source, an Nd:YAG laser or its second harmonic (SHG) laser may be used.

A pair of opposing first columnar electrodes 11 form a gap of width G2 between side surfaces 11b. Similarly, a pair of opposing second columnar electrodes 12 form a gap of width G2 between their side surfaces 12b. The width G2 may be in the range of 50 to 150 μm. The gap between the opposing ends 10c of the wiring layer 10 is larger than the width G2 because the end 10c of the wiring layer 10 protrudes from the side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12. It's getting narrower.

In this step, laser light is irradiated to remove the first resin layer 20a and the second resin layer 20b by the width G2 of the gap formed by the opposing first columnar electrode 11 and second columnar electrode 12. Although the gap between the end portions 10c of the wiring layer 10 facing each other is narrow, the second resin layer 20b directly under the end portion 10c of the wiring layer 10 may also be removed by the diffracted light of the laser beam. Irradiation of the laser beam may cause unevenness of irradiation marks to be formed on the side surface 11b of the first columnar electrode 11, the end portion 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12.

In the dicing process, the first resin layer 20a between the side surfaces 11b of the first columnar electrode 11 is removed, and the second resin layer 20a between the ends 10c of the wiring layer 10 and the side surface 12b of the second columnar electrode 12 is removed. After removing the layer 20b, the second resin layer 20b is further removed with this width G2 until reaching the upper surface 20c of the sealing resin. As a result, the first side surface 20f of the sealing resin 20 constituted by the first resin layer 20a and the second resin layer 20b is formed. Here, in the dicing process, the semiconductor device 2 is turned over, so that the downward direction in the figure is the direction of the element top surface 21a of the semiconductor device 2.

From the first side surface 20f of the sealing resin 20 formed by dicing, the side surface 11b of the first columnar electrode 11, the end portion 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12 are exposed. The side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12 are within the first side surface 20f of the sealing resin 20, and the end portion 10c of the wiring layer 10 protrudes from the first side surface 20f of the sealing resin 20. ing. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are the first side surface of the sealing resin 20. 20f and the bottom surface 20d intersect on the ridge line.

After such a dicing process, the external electrodes 15 are formed by plating in the process shown in FIG. 8(d), and the semiconductor device 2 is finally completed. In the semiconductor device 2, the external electrode 15 protrudes from the first side surface 20f and the bottom surface 20d of the sealing resin 20. A portion of the external electrode 15 that covers the end portion 10c of the wiring layer 10 that is sandwiched between the side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12 and protrudes further protrudes.

Since the semiconductor device 2 of the second embodiment is diced by laser irradiation, no stress is placed on the cross section. Therefore, the structure of the stacked first columnar electrode 11, wiring layer 10, and second columnar electrode 12 is maintained before and after dicing, and the connection between these members is also guaranteed. In addition, if unevenness of irradiation marks is formed on the side surface 11b of the first columnar electrode 11, the end 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12 due to laser irradiation, the reliability of solder mounting may be reduced. further improves. Furthermore, in the semiconductor device 2 of the second embodiment, it is sufficient to remove the sealing resin 20 with a constant width G2 in the dicing process, so the dicing process is easy.

[Third embodiment]
13 is a side view of the semiconductor device 3 of the third embodiment, and FIG. 14 is a cross-sectional view of the semiconductor device 3 taken along cutting line XIV-XIV in FIG. The semiconductor device 3 of the third embodiment is the semiconductor device of the first embodiment except for the structure of the side part of the sealing resin 20 including the first columnar electrode 11, the end 10c of the wiring layer 10, and the second columnar electrode 12. Since the semiconductor device 1 has the same structure as the semiconductor device 1 of the first embodiment, the same reference numerals are given to the same components as those of the semiconductor device 1 of the first embodiment.

In the semiconductor device 3, the sealing resin 20 has a side surface facing in the direction in which the wiring layer 10 extends and surrounding the outer periphery. The side surfaces of the sealing resin 20 include a lower first side surface 20f that intersects with the bottom surface 20d of the sealing resin 20, and an upper second side surface 20g that intersects with the upper surface 20c of the sealing resin 20. An external electrode 15 is formed from the first side surface 20f to the bottom surface 20d of the sealing resin 20. The end portion 10c of 10 is covered.

A first columnar electrode 11 is formed on the back surface 10b of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The first columnar electrode 11 is connected to the back surface 10b of the wiring layer 10 with a top surface 11a of a substantially square whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the top surface 11a. It may have a shape.

A second columnar electrode 12 is formed on the main surface 10a of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The second columnar electrode 12 is connected to the main surface 10a of the wiring layer 10 with a substantially square bottom surface 12a whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the bottom surface 12a. It may have.

The first side surface 20f of the sealing resin 20 is formed from the bottom surface 20d of the sealing resin 20 to the height of the top surface 12c of the second columnar electrode 12 in the direction in which the second columnar electrode 12 extends from the wiring layer 10. . The second side surface 20g of the sealing resin 20 is formed in the above direction to exceed the height of the top surface 12c of the second columnar electrode 12 and reach the upper surface 20c of the sealing resin 20. The second side surface 20g of the sealing resin 20 protrudes from the first side surface 20f over a length W3 in the direction in which the wiring layer 10 extends. The length W3 may be in the range of 10 to 50 μm.

The side surface 11b of the first columnar electrode 11 is within the first side surface 20f of the sealing resin 20 and exposed from the first side surface 20f, and the bottom surface 11c is within the bottom surface 20d of the sealing resin 20 and exposed from the bottom surface 20d. There is. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are The side surface 20f and the bottom surface 20d intersect on the ridge line. The side surface 12b of the second columnar electrode 12 is also located within the first side surface 20f of the sealing resin 20 and exposed from the first side surface 20f, similarly to the side surface 11b of the first columnar electrode 11.

The wiring layer 10 is sandwiched between the top surface 11a of the first columnar electrode 11 and the bottom surface 12a of the second columnar electrode 12, and is located between the side surface 11b of the first columnar electrode 11 and the side surface 11b of the first columnar electrode 11 within the first side surface 20f of the sealing resin 20. It protrudes from the side surface 12b of the two columnar electrodes 12.

Side surface 11b and bottom surface 11c of first columnar electrode 11 exposed from first side surface 20f and bottom surface 20d of sealing resin 20, end portion 10c of wiring layer 10 protruding from first side surface 20f of sealing resin 20, and sealing. The external electrode 15 is formed to cover the side surface 12b of the second columnar electrode 12 exposed from the first side surface 20f of the resin 20. The external electrode 15 protrudes from the first side surface 20f and the bottom surface 20d of the sealing resin 20, respectively, and largely protrudes at a portion covering the end portion 10c of the wiring layer 10 that protrudes from the first side surface 20f of the sealing resin 20.

In the semiconductor device 3 of the third embodiment, the external electrode 15 protrudes from the first side surface 20f and bottom surface 20d of the sealing resin 20. Further, the external electrode 15 protrudes largely in a portion covering the end portion 10c of the wiring layer 10. By having such a structure, reliability is improved when the semiconductor device 3 is mounted on a board by soldering, and it becomes possible to visually confirm the state of the solder joint from the top of the board.

In the semiconductor device 3 of the third embodiment, the upper surface 20c of the sealing resin 20 extends above the external electrode 15 protruding from the first side surface 20f of the sealing resin 20, and the upper surface 20c of the sealing resin 20 protrudes over a length W3 from the first side surface 20f. A second side surface 20g is formed. Therefore, with the semiconductor device 3 mounted on the substrate, it is possible to form a fillet with raised solder directly under the second side surface 20g.

FIG. 15 is a cross-sectional view illustrating the process of dicing the semiconductor device 3 of the third embodiment using laser light. Although FIGS. 7 and 8 show a series of steps for manufacturing the semiconductor device 1 of the first embodiment, the semiconductor device 3 of the third embodiment is also manufactured by such a series of steps. FIG. 15 corresponds to the state after dicing shown in FIG. 8(c). In FIG. 15, a dicing tape (not shown) is attached to the upper surface 20c of the sealing resin 20 that is constituted by the first resin layer 20a. Note that in the dicing process, the semiconductor device 3 is turned over so that the upper surface 20c is facing downward in the figure.

Dicing is performed by irradiating with laser light. Since the processing width of the laser beam to be irradiated is smaller than the width to remove the resin, the laser beam is appropriately scanned and irradiated. As the laser light source, an Nd:YAG laser or its second harmonic (SHG) laser may be used.

A pair of opposing first columnar electrodes 11 form a gap of width G31 between side surfaces 11b. Similarly, a pair of opposing second columnar electrodes 12 form a gap of width G31 between their side surfaces 12b. The width G31 may be in the range of 50 to 100 μm. The gap between the opposing ends 10c of the wiring layer 10 is larger than the width G31 because the end 10c of the wiring layer 10 protrudes from the side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12. It's getting narrower.

First, a laser beam is irradiated to remove the first resin layer 20a and the second resin layer 20b by the width G31 of the gap formed by the opposing first columnar electrode 11 and second columnar electrode 12. Although the gap between the end portions 10c of the wiring layer 10 facing each other is narrow, the second resin layer 20b directly under the end portion 10c of the wiring layer 10 may also be removed by the diffracted light of the laser beam. Irradiation of the laser beam may cause unevenness of irradiation marks to be formed on the side surface 11b of the first columnar electrode 11, the end portion 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12.

In the dicing process, after removing the first resin layer 20a between the side surfaces 11b of the first columnar electrode 11, the second resin layer 20a between the ends 10c of the wiring layer 10 and the side surface 12b of the second columnar electrode 12 is removed. The layer 20b is removed, and the second resin layer 20b is removed with a width G31 until it reaches the height of the top surface 12c of the second columnar electrode 12. As a result, the first side surface 20f of the sealing resin 20 constituted by the first resin layer 20a and the second resin layer 20b is formed. Here, in the dicing process, the semiconductor device 3 is turned over so that the downward direction in the figure is in the direction of the top surface 12c of the second columnar electrode 12.

Next, the center of the diced portion of width G31 is diced to a width G32 narrower than width G31, and the second resin layer 20b is removed up to the upper surface 20c of the sealing resin 20. Thereby, the sealing formed by the second resin layer 20b protruding over a length W3 in the direction in which the wiring layer 10 extends from the first side surface 20f of the sealing resin 20 formed by the first resin layer 20a and the second resin layer 20b. A second side surface 20g of the resin 20 is formed.

From the first side surface 20f of the sealing resin 20 formed by dicing, the side surface 11b of the first columnar electrode 11, the end portion 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12 are exposed. The side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12 are within the first side surface 20f of the sealing resin 20, and the end portion 10c of the wiring layer 10 protrudes from the first side surface 20f of the sealing resin 20. ing. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are the first side surface of the sealing resin 20. 20f and the bottom surface 20d intersect on the ridge line.

After such a dicing process, the external electrodes 15 are formed by plating in the process shown in FIG. 8(d), and the semiconductor device 3 is finally completed. In the semiconductor device 3, the external electrode 15 protrudes from the first side surface 20f and the bottom surface 20d of the sealing resin 20. A portion of the external electrode 15 that covers the end portion 10c of the wiring layer 10 that is sandwiched between the side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12 and protrudes further protrudes.

Since the semiconductor device 3 of the third embodiment is diced by laser irradiation, no stress is placed on the cross section. Therefore, the structure of the stacked first columnar electrode 11, wiring layer 10, and second columnar electrode 12 is maintained before and after dicing, and the connection between these members is also guaranteed. In addition, if unevenness of irradiation marks is formed on the side surface 11b of the first columnar electrode 11, the end 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12 due to laser irradiation, the reliability of solder mounting may be reduced. further improves.

[Fourth embodiment]
16 is a side view of the semiconductor device 4 of the fourth embodiment, and FIG. 17 is a cross-sectional view of the semiconductor device 4 taken along cutting line XVII-XVII in FIG. 16. The semiconductor device 4 of the fourth embodiment is the semiconductor device of the first embodiment except for the structure of the side part of the sealing resin 20 including the first columnar electrode 11, the end 10c of the wiring layer 10, and the second columnar electrode 12. Since the semiconductor device 1 has the same structure as the semiconductor device 1 of the first embodiment, the same reference numerals are given to the same components as those of the semiconductor device 1 of the first embodiment.

In the semiconductor device 4, the sealing resin 20 has a side surface facing in the direction in which the wiring layer 10 extends and surrounding the outer periphery. The side surfaces of the sealing resin 20 include a lower first side surface 20f that intersects with the bottom surface 20d of the sealing resin 20, a second upper side surface 20g that intersects with the upper surface 20c of the sealing resin 20, and a first side surface 20f and a second side surface. It includes a first side surface 20f recessed from 20g and a third side surface 20h between the second side surface 20g. An external electrode 15 is formed from the first side surface 20f to the third side surface 20h and the bottom surface 20d of the sealing resin 20, and the external electrode 15 is formed between the side surface 11b and the bottom surface 11c of the first columnar electrode 11, and the second side surface 11b and the bottom surface 11c. Parts of the side surface 12b and top surface 12c of the columnar electrode 12 and the end portion 10c of the wiring layer 10 are covered.

A first columnar electrode 11 is formed on the back surface 10b of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The first columnar electrode 11 is connected to the back surface 10b of the wiring layer 10 with a top surface 11a of a substantially square whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the top surface 11a. It may have a shape.

A second columnar electrode 12 is formed on the main surface 10a of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The second columnar electrode 12 is connected to the main surface 10a of the wiring layer 10 with a substantially square bottom surface 12a whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the bottom surface 12a. It may have.

The first side surface 20f of the sealing resin 20 is formed from the bottom surface 20d of the sealing resin 20 to the height of the top surface 12c of the second columnar electrode 12 in the direction in which the second columnar electrode 12 extends from the wiring layer 10. . The third side surface 20h of the sealing resin 20 is formed to a height H4 from the height of the top surface 12c of the second columnar electrode 12, exceeding the height of the top surface 12c of the second columnar electrode 12 in the above direction. The second side surface 20g of the sealing resin 20 is formed in the direction above the height H4 to the upper surface 20c of the sealing resin 20. The second side surface 20g of the sealing resin 20 protrudes from the first side surface 20f over a length W41 in the direction in which the wiring layer 10 extends, and the third side surface 20h is recessed from the first side surface 20f over a length W42 in the aforementioned direction. Length W41 may be in the range of 10 to 50 μm, and length W42 may be in the range of 10 to 130 μm.

The side surface 11b of the first columnar electrode 11 is within the first side surface 20f of the sealing resin 20 and exposed from the first side surface 20f, and the bottom surface 11c is within the bottom surface 20d of the sealing resin 20 and exposed from the bottom surface 20d. There is. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are The side surface 20f and the bottom surface 20d intersect on the ridge line.

The side surface 12b of the second columnar electrode 12 is within the first side surface 20f of the sealing resin 20 and is exposed from the first side surface 20f of the sealing resin 20, and the top surface 12c is located between the first side surface 20f and the third side surface 20h. It is located within the stepped surface between and exposed from the stepped surface. The side surface 12b of the second columnar electrode 12 exposed from the first side surface 20f of the sealing resin 20 and the top surface 12c of the second columnar electrode 12 exposed from the stepped surface of the sealing resin 20 are The first side surface 20f and the stepped surface intersect on the ridge line.

The wiring layer 10 is sandwiched between the top surface 11a of the first columnar electrode 11 and the bottom surface 12a of the second columnar electrode 12, and is located between the side surface 11b of the first columnar electrode 11 and the side surface 11b of the first columnar electrode 11 within the first side surface 20f of the sealing resin 20. It protrudes from the side surface 12b of the two columnar electrodes 12.

Side surface 11b and bottom surface 11c of first columnar electrode 11 exposed from first side surface 20f and bottom surface 20d of sealing resin 20, end portion 10c of wiring layer 10 protruding from first side surface 20f of sealing resin 20, and sealing. The external electrode 15 is formed to cover the first side surface 20f of the resin 20 and the side surface 12b of the second columnar electrode 12 exposed from the stepped surface. The external electrode 15 protrudes from the step surface, the first side surface 20f, and the bottom surface 20d of the sealing resin 20, and largely protrudes at a portion covering the end portion 10c of the wiring layer 10 that protrudes from the first side surface 20f of the sealing resin 20. ing.

In the semiconductor device 4 of the fourth embodiment, the external electrode 15 protrudes from the step surface, the first side surface 20f, and the bottom surface 20d of the sealing resin 20. Further, the external electrode 15 protrudes largely in a portion covering the end portion 10c of the wiring layer 10. With such a structure, reliability is improved when the semiconductor device 4 is mounted on a board by soldering, and it becomes possible to visually confirm the state of the solder joint from the top of the board. In the semiconductor device 4 of the fourth embodiment, by forming the external electrode 15 on the stepped surface, reliability when mounting by soldering can be further improved.

In the semiconductor device 4 of the fourth embodiment, the upper surface 20c of the sealing resin 20 extends above the external electrode 15 protruding from the first side surface 20f of the sealing resin 20, and the upper surface 20c of the sealing resin 20 protrudes over a length W3 from the first side surface 20f. A second side surface 20g is formed. Therefore, with the semiconductor device 4 mounted on the substrate, it is possible to form a fillet with raised solder directly under the second side surface 20g.

FIG. 18 is a cross-sectional view illustrating the process of dicing the semiconductor device 4 of the fourth embodiment using laser light. Although FIGS. 7 and 8 show a series of steps for manufacturing the semiconductor device 1 of the first embodiment, the semiconductor device 4 of the fourth embodiment is also manufactured by such a series of steps. FIG. 18 corresponds to the state after dicing shown in FIG. 8(c). In FIG. 18, a dicing tape (not shown) is attached to the upper surface 20c of the sealing resin 20 that is constituted by the first resin layer 20a. Note that in the dicing process, the semiconductor device 4 is turned over so that the upper surface 20c is facing downward in the figure.

Dicing is performed by irradiating with laser light. Since the processing width of the laser beam to be irradiated is smaller than the width to remove the resin, the laser beam is appropriately scanned and irradiated. As the laser light source, an Nd:YAG laser or its second harmonic (SHG) laser may be used.

A pair of opposing first columnar electrodes 11 form a gap of width G41 between side surfaces 11b. Similarly, a pair of opposing second columnar electrodes 12 form a gap of width G41 between their side surfaces 12b. The width G41 may be in the range of 50 to 150 μm. The gap between the opposing ends 10c of the wiring layer 10 is larger than the width G41 because the end 10c of the wiring layer 10 protrudes from the side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12. It's getting narrower.

First, laser light is irradiated to remove the first resin layer 20a and the second resin layer 20b by the width G41 of the gap formed by the opposing first columnar electrode 11 and second columnar electrode 12. Although the gap between the end portions 10c of the wiring layer 10 facing each other is narrow, the second resin layer 20b directly under the end portion 10c of the wiring layer 10 may also be removed by the diffracted light of the laser beam. Irradiation of the laser beam may cause unevenness of irradiation marks to be formed on the side surface 11b of the first columnar electrode 11, the end portion 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12.

In the dicing process, after removing the first resin layer 20a between the side surfaces 11b of the first columnar electrode 11, the second resin layer 20a between the ends 10c of the wiring layer 10 and the side surface 12b of the second columnar electrode 12 is removed. The resin layer 20b is removed, and the second resin layer 20b is further removed with this width G41 until the height of the top surface 12c of the second columnar electrode 12 is reached. As a result, the first side surface 20f of the sealing resin 20 constituted by the first resin layer 20a and the second resin layer 20b is formed. Here, in the dicing process, the semiconductor device 4 is turned over so that the downward direction in the figure is in the direction of the top surface 12c of the second columnar electrode 12.

Next, dicing is performed with a width G42 wider than the width G41 so that the diced width G41 is in the center, and the second The resin layer 20b is removed. As a result, the sealing formed by the second resin layer 20b is recessed over a length W42 in the direction in which the wiring layer 10 extends from the first side surface 20f of the sealing resin 20 formed by the first resin layer 20a and the second resin layer 20b. A third side surface 20h of the resin 20 is formed.

Finally, the center of the diced portion of width G42 is diced to a width G43 narrower than width G42, and the second resin layer 20b is removed up to the upper surface 20c of the sealing resin 20. Thereby, the sealing formed by the second resin layer 20b protruding over the length W41 in the direction in which the wiring layer 10 extends from the first side surface 20f of the sealing resin 20 formed by the first resin layer 20a and the second resin layer 20b. A second side surface 20g of the resin 20 is formed.

From the first side surface 20f of the sealing resin 20 formed by dicing, the side surface 11b of the first columnar electrode 11, the end portion 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12 are exposed. The side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12 are within the first side surface 20f of the sealing resin 20, and the end portion 10c of the wiring layer 10 protrudes from the first side surface 20f of the sealing resin 20. ing. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are the first side surface of the sealing resin 20. 20f and the bottom surface 20d intersect on the ridge line.

Further, the top surface 12c of the second columnar electrode 12 is located within the stepped surface between the first side surface 20f and the third side surface 20h, and is exposed from the stepped surface. The side surface 12b of the second columnar electrode 12 exposed from the first side surface 20f of the sealing resin 20 and the top surface 12c of the second columnar electrode 12 exposed from the stepped surface of the sealing resin 20 are The first side surface 20f and the stepped surface intersect on the ridge line.

After such a dicing process, the external electrodes 15 are formed by plating in the process shown in FIG. 8(d), and the semiconductor device 4 is finally completed. In the semiconductor device 4, the external electrode 15 protrudes from the first side surface 20f and bottom surface 20d of the sealing resin 20. A portion of the external electrode 15 that covers the end portion 10c of the wiring layer 10 that is sandwiched between the side surface 11b of the first columnar electrode 11 and the side surface 12b of the second columnar electrode 12 and protrudes further protrudes.

Since the semiconductor device 4 of the fourth embodiment is diced by laser irradiation, no stress is placed on the cross section. Therefore, the structure of the stacked first columnar electrode 11, wiring layer 10, and second columnar electrode 12 is maintained before and after dicing, and the connection between these members is also guaranteed. In addition, if unevenness of irradiation marks is formed on the side surface 11b of the first columnar electrode 11, the end 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12 due to laser irradiation, the reliability of solder mounting may be reduced. further improves.

In the semiconductor device 4 of the fourth embodiment, since the top surface 12c of the second columnar electrode 12 is exposed from the stepped surface of the sealing resin 20, the reliability of solder mounting is improved. Furthermore, since the top surface 12c of the second columnar electrode 12 exposed from the first side surface 20f of the sealing resin 20 is in contact with the third side surface 20h that is recessed from the first side surface 20f, the top surface 12c of the second columnar electrode 12 The stress between the top surface 12c and the second resin layer 20b of the sealing resin 20 in contact with the top surface 12c is relaxed, and the occurrence of cracks and the like can be prevented.

[Fifth embodiment]
FIG. 19 is a side view of the semiconductor device 5 of the fifth embodiment, and FIG. 20 is a cross-sectional view of the semiconductor device 5 taken along cutting line XX-XX in FIG. The semiconductor device 5 of the fifth embodiment is the semiconductor device of the first embodiment except for the structure of the side part of the sealing resin 20 including the first columnar electrode 11, the end 10c of the wiring layer 10, and the second columnar electrode 12. Since the semiconductor device 1 has the same structure as the semiconductor device 1 of the first embodiment, the same reference numerals are given to the same components as those of the semiconductor device 1 of the first embodiment.

In the semiconductor device 5, the sealing resin 20 has a side surface facing in the direction in which the wiring layer 10 extends and surrounding the outer periphery. The side surfaces of the sealing resin 20 include a lower first side surface 20f that intersects with the bottom surface 20d of the sealing resin 20, a second upper side surface 20g that intersects with the upper surface 20c of the sealing resin 20, and a first side surface 20f and a second side surface. 20g and a fourth side surface 20k. An external electrode 15 is formed from the first side surface 20f to the bottom surface 20d of the sealing resin 20, and the external electrode 15 covers the side surface 11b and bottom surface 11c of the first columnar electrode 11 and the end portion 10c of the wiring layer 10.

A first columnar electrode 11 is formed on the back surface 10b of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The first columnar electrode 11 is connected to the back surface 10b of the wiring layer 10 with a top surface 11a of a substantially square whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the top surface 11a. It may have a shape.

A second columnar electrode 12 is formed on the main surface 10a of the wiring layer 10 adjacent to the end 10c of the wiring layer 10. The second columnar electrode 12 is connected to the main surface 10a of the wiring layer 10 with a substantially square bottom surface 12a whose side is the width of the wire connected to the end 10c of the wiring layer 10, and has a substantially rectangular parallelepiped shape extending from the bottom surface 12a. It may have.

The first side surface 20f of the sealing resin 20 is formed from the bottom surface 20d of the sealing resin 20 to the back surface 10b of the wiring layer 10. The fourth side surface 20k of the sealing resin 20 extends from the height of the top surface 12c of the second columnar electrode 12 beyond the back surface 10b of the wiring layer 10 in the direction in which the second columnar electrode 12 extends from the wiring layer 10. Formed up to H5. The height H5 may be in the range of 20 to 200 μm. The fourth side surface 20k of the sealing resin 20 projects from the first side surface 20f over a length W52 in the direction in which the wiring layer 10 extends. The fourth side surface 20k of the sealing resin 20 does not extend beyond the tip of the end portion 10c of the wiring layer 10 in the direction in which the wiring layer 10 extends. The length W52 is determined from a thickness such that the fourth side surface 20k of the sealing resin 20 can sufficiently cover the side surface 12b of the second columnar electrode 12 in the direction in which the wiring layer 10 extends until it reaches the tip of the wiring layer 10. It may be in the range of 0 to 20 μm.

The second side surface 20g of the sealing resin 20 is formed from the height of the top surface 12c of the second columnar electrode 12 to the upper surface 20c of the sealing resin 20 by a height exceeding H5 in the above direction. The second side surface 20g of the sealing resin 20 protrudes from the first side surface 20f over a length W51 in the direction in which the wiring layer 10 extends. The length W51 may be in the range of 30 to 50 μm.

The side surface 11b of the first columnar electrode 11 is within the first side surface 20f of the sealing resin 20 and exposed from the first side surface 20f, and the bottom surface 11c is within the bottom surface 20d of the sealing resin 20 and exposed from the bottom surface 20d. There is. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are The side surface 20f and the bottom surface 20d intersect on the ridge line. The side surface 12b of the second columnar electrode 12 is located at a depth of a length W52 from the fourth side surface 20k of the sealing resin 20, and is covered with the sealing resin 20. The side surface 12b of the second columnar electrode 12 may be within a plane extending from the first side surface 20f of the sealing resin.

The wiring layer 10 is sandwiched between the top surface 11a of the first columnar electrode 11 and the bottom surface 12a of the second columnar electrode 12, and is sealed with the side surface 11b of the first columnar electrode 11 within the first side surface 20f of the sealing resin 20. It protrudes and is sandwiched between the fourth side surface 20k of the stopper resin 20. The length of the end portion 10c of the wiring layer 10 protruding from the first side surface 20f of the sealing resin 20, that is, the length of the protrusion from the side surface 11b of the first columnar electrode 11 is the same as the length W52, It may be in the range of 0 to 20 μm.

so as to cover the side surface 11b and bottom surface 11c of the first columnar electrode 11 exposed from the first side surface 20f and bottom surface 20d of the sealing resin 20, and the end portion 10c of the wiring layer 10 protruding from the first side surface 20f of the sealing resin 20. An external electrode 15 is formed on the surface. The external electrode 15 protrudes from the first side surface 20f and the bottom surface 20d of the sealing resin 20, respectively, and largely protrudes at a portion covering the end portion 10c of the wiring layer 10 that protrudes from the first side surface 20f of the sealing resin 20.

In the semiconductor device 5 of the fifth embodiment, the external electrode 15 protrudes from the first side surface 20f and bottom surface 20d of the sealing resin 20, and the external electrode 15 further protrudes at a portion covering the end portion 10c of the wiring layer 10. Therefore, reliability during solder mounting is improved, and it becomes possible to visually check the state of solder joints from above the mounted board.

In the semiconductor device 5 of the fifth embodiment, the upper surface 20c of the sealing resin 20 extends above the external electrode 15 protruding from the first side surface 20f of the sealing resin 20, and the upper surface 20c of the sealing resin 20 protrudes over a length W51 from the first side surface 20f. A second side surface 20g is formed. Therefore, with the semiconductor device 5 mounted on the substrate, it is possible to form a fillet with raised solder directly under the second side surface 20g.

FIG. 21 is a cross-sectional view illustrating the process of dicing the semiconductor device 5 of the fifth embodiment using laser light. Although FIGS. 7 and 8 show a series of steps for manufacturing the semiconductor device 1 of the first embodiment, the semiconductor device 5 of the fifth embodiment is also manufactured by such a series of steps. FIG. 21 corresponds to the state after dicing shown in FIG. 8(c). In FIG. 21, a dicing tape (not shown) is attached to the upper surface 20c of the sealing resin 20 that is constituted by the first resin layer 20a. Note that in the dicing process, the semiconductor device 5 is turned over so that the upper surface 20c is facing downward in the figure.

Dicing is performed by irradiating with laser light. Since the processing width of the laser beam to be irradiated is smaller than the width to remove the resin, the laser beam is appropriately scanned and irradiated. As the laser light source, an Nd:YAG laser or its second harmonic (SHG) laser may be used.

A pair of opposing first columnar electrodes 11 form a gap of width G51 between side surfaces 11b. The width G51 may be in the range of 50 to 150 μm. A pair of opposing fourth side surfaces 20k of the sealing resin 20 form a gap having a width G52. Width G52 may be in the range of 50 to 70 μm. The gap between the opposing ends 10c of the wiring layer 10 is narrower than the width G51 because the end 10c of the wiring layer 10 protrudes from the side surface 11b of the first columnar electrode 11. The gap between the ends 10c of the wiring layer 10 may be the same as or narrower than the width G52 between the fourth side surfaces 20k.

First, a laser beam is irradiated to remove the first resin layer 20a and the second resin layer 20b by the width G51 of the gap formed by the opposing first columnar electrode 11 and second columnar electrode 12. As a result, the first side surface 20f of the sealing resin 20 constituted by the first resin layer 20a is formed. Here, in the dicing process, the semiconductor device 5 is turned over, so that the downward direction in the figure is in the direction of the main surface 10a of the wiring layer 10. Irradiation of the laser beam may cause unevenness of irradiation marks to be formed on the side surface 11b of the first columnar electrode 11.

Next, the center of the diced width G51 is diced with a width G52 narrower than the width G51, and the second resin layer 20b between the end portion 10c of the wiring layer 10 and the side surface 12b of the second columnar electrode 12 is removed. Then, the second resin layer 20b is removed with a width G52 from the height of the top surface 12c of the second columnar electrode 12 until it reaches a height H5. As a result, the fourth side surface 20k of the sealing resin 20 constituted by the second resin layer 20b is formed. Irradiation of the laser beam may cause unevenness of irradiation marks to be formed on the end portion 10c of the wiring layer 10.

Finally, the center of the diced width G52 is diced to a width G52 narrower than the width G51, and the second resin layer 20b is removed up to the upper surface 20c of the sealing resin 20. As a result, the second side surface of the sealing resin 20 constituted by the second resin layer 20b protruding over a length W51 in the direction in which the wiring layer 10 extends from the first side surface 20f of the sealing resin 20 constituted by the first resin layer 20a. 20 g is formed.

The side surface 11b of the first columnar electrode 11 and the end portion 10c of the wiring layer 10 are exposed from the first side surface 20f of the sealing resin 20 formed by dicing. The side surface 11b of the first columnar electrode 11 is within the first side surface 20f of the sealing resin 20, and the end portion 10c of the wiring layer 10 protrudes from the first side surface 20f of the sealing resin 20. The side surface 11b of the first columnar electrode 11 exposed from the first side surface 20f of the sealing resin 20 and the bottom surface 11c of the first columnar electrode 11 exposed from the bottom surface 20d of the sealing resin 20 are the first side surface of the sealing resin 20. 20f and the bottom surface 20d intersect on the ridge line. The side surface 12b of the second columnar electrode 12 is located at a depth of a length W52 from the fourth side surface 20k of the sealing resin 20, and is covered by the fourth side surface 20k.

After such a dicing process, the external electrodes 15 are formed by plating in the process shown in FIG. 8(d), and the semiconductor device 5 is finally completed. In the semiconductor device 5, the external electrode 15 protrudes from the first side surface 20f and bottom surface 20d of the sealing resin 20. A portion of the external electrode 15 that covers the end portion 10c of the wiring layer 10 that is sandwiched between the side surface 11b of the first columnar electrode 11 and the fourth side surface 20k of the sealing resin 20 and protrudes further protrudes.

Since the semiconductor device 5 of the fifth embodiment is diced by laser irradiation, no stress is placed on the cross section. Therefore, the structure of the stacked first columnar electrode 11, wiring layer 10, and second columnar electrode 12 is maintained before and after dicing, and the connection between these members is also guaranteed. In addition, if unevenness of irradiation marks is formed on the side surface 11b of the first columnar electrode 11, the end 10c of the wiring layer 10, and the side surface 12b of the second columnar electrode 12 due to laser irradiation, the reliability of solder mounting may be reduced. further improves.

Semiconductor devices can be used in various fields such as in-vehicle equipment, household appliances, and medical equipment.In particular, they can be used in wettable flank packages for in-vehicle use, and are designed to improve functionality, performance, quality, and reliability. , and convenience can be improved.

10 wiring layer 11 first columnar electrode 12 second columnar electrode 15 external electrode 21 semiconductor element 25 conductive connection layer 20 sealing resin

Claims (17)

A semiconductor device,
a semiconductor element;
a wiring layer on which the semiconductor element is mounted on the main surface;
a first columnar electrode formed on the back surface of the wiring layer;
a second columnar electrode formed on the main surface of the wiring layer;
a first sealing resin that covers the semiconductor element and also covers at least a portion of the wiring layer, the first columnar electrode, and the second columnar electrode, the first sealing resin extending in the width direction of the semiconductor device in which the wiring layer extends; a sealing resin forming a sealing resin side surface and a sealing resin bottom surface along the back surface of the wiring layer,
An end of the wiring layer and a side surface of the first columnar electrode are exposed from the side surface of the first sealing resin, a bottom surface of the first columnar electrode is exposed from the bottom surface of the sealing resin, an end of the wiring layer, At least one of the side surface of the first columnar electrode and the second columnar electrode protrudes from the side surface of the first sealing resin ,
In the semiconductor device, the side surfaces of the first columnar electrode and the second columnar electrode are within the plane of the first sealing resin side surface, and the ends of the wiring layer protrude from the first sealing resin side surface. 2. The semiconductor device according to claim 1, wherein a side surface of the first columnar electrode exposed from a side surface of the first sealing resin and a bottom surface of the first columnar electrode exposed from a bottom surface of the sealing resin intersect with each other. 3. The semiconductor device according to claim 1, wherein the bottom surface of the first columnar electrode is within the plane of the bottom surface of the sealing resin. The side surface of the second columnar electrode is exposed from the side surface of the first sealing resin, and the sealing resin has a predetermined height from the top surface of the second columnar electrode in the direction in which the second columnar electrode extends from the wiring layer. 4. The semiconductor device according to claim 1, wherein a second sealing resin side surface is formed outside the first sealing resin side surface in the width direction when the width exceeds the width. The side surface of the second columnar electrode is exposed from the side surface of the first sealing resin, and the sealing resin has a height of the top surface of the first columnar electrode in the direction in which the second columnar electrode extends from the wiring layer. 4. The semiconductor device according to claim 1, wherein a second sealing resin side surface is formed outside the first sealing resin side surface in the width direction when the width exceeds the width. The side surface of the second columnar electrode is exposed from the side surface of the first sealing resin, and the sealing resin has a height of the top surface of the second columnar electrode in the direction in which the second columnar electrode extends from the wiring layer. If the height exceeds a predetermined height from the top surface of the second columnar electrode, a third sealing resin side surface is formed inside the first sealing resin side surface in the width direction. 4. The semiconductor device according to claim 1 , wherein the second sealing resin side surface is formed outside of the sealing resin side surface. The sealing resin is located outside the side surface of the first sealing resin in the width direction when the second columnar electrode exceeds the height of the end of the wiring layer in the direction in which it extends from the wiring layer. 4. A fourth sealing resin side surface is formed up to a tip of an end portion of the electrode, and the side surface of the second columnar electrode is covered with the fourth sealing resin side surface. The semiconductor device described in . 8. The semiconductor device according to claim 1, wherein the height of the second columnar electrode is greater than the height of the first columnar electrode. 9. The semiconductor device according to claim 8 , wherein the thickness of the wiring layer is smaller than the height of the second columnar electrode. 10. The semiconductor device according to claim 1, wherein the first columnar electrode and the second columnar electrode contain copper, and the wiring layer further contains titanium or tantalum nitride in addition to copper. The semiconductor device according to any one of claims 1 to 10 , further comprising an external electrode that covers the wiring layer, the first columnar electrode, and the second columnar electrode exposed from the sealing resin. 12. The semiconductor device according to claim 11 , wherein the external electrode is formed by laminating a Ni layer, a Pd layer, and an Au layer. A method for manufacturing a semiconductor device, the method comprising:
forming a first columnar electrode;
forming a first resin layer that covers and seals the first columnar electrode;
Grinding the first resin layer to expose an end of the first columnar electrode;
forming a wiring layer connected to the first columnar electrode;
forming a second columnar electrode connected to the wiring layer;
a step of mounting a semiconductor element on the wiring layer;
forming a second resin layer that covers and seals the wiring layer, the second columnar electrode, and the semiconductor element;
Grinding the first resin layer toward the second resin layer to form a bottom surface of the sealing resin and a bottom surface of the first columnar electrode exposed from the bottom surface of the sealing resin;
A laser beam is irradiated in a direction from the first resin layer to the second resin layer to remove and separate the resin between adjacent semiconductor elements by a predetermined width, and the ends of the wiring layer and the first columnar forming a first sealing resin side surface so that the side surface of the electrode is exposed and at least one of the end of the wiring layer and the side surface of the first columnar electrode protrudes ;
The step of removing and separating the resin between adjacent semiconductor elements by irradiating the laser beam is performed by applying laser light to the height of the top surface of the second columnar electrode in the direction from the first resin layer to the second resin layer. Here is a method for manufacturing a semiconductor device, in which the resin is removed with a first width, and when the height of the top surface is exceeded, the resin is removed with a second width narrower than the first width. The step of removing and separating the resin between adjacent semiconductor elements by irradiating the laser beam is performed at a predetermined height from the top surface of the second columnar electrode in the direction from the first resin layer to the second resin layer. 14. The method of manufacturing a semiconductor device according to claim 13 , wherein the resin is removed with a first width when the height exceeds the predetermined height, and the resin is removed with a second width narrower than the first width when the predetermined height is exceeded. The step of removing and separating the resin between adjacent semiconductor elements by irradiating the laser beam is performed at a predetermined height from the top surface of the second columnar electrode in the direction from the first resin layer to the second resin layer. When the predetermined height is exceeded, the resin is removed with a first width, and when the predetermined height is exceeded, the resin is removed with a third width wider than the first width, and when the predetermined height is exceeded, the resin is removed with a third width. 14. The method of manufacturing a semiconductor device according to claim 13 , wherein the resin is removed with a second width narrower than the width of the second width. The step of removing and separating the resin between adjacent semiconductor elements by irradiating the laser beam is performed in a direction from the first resin layer to the second resin layer up to the protruding end of the wiring layer. 13. The resin is removed with a first width, and beyond the end of the wiring layer, the resin is removed with a width greater than or equal to that defined by the opposing end of the wiring layer, which is narrower than the first width. A method for manufacturing a semiconductor device according to. 2. The step of irradiating the laser beam to remove and separate the resin between adjacent semiconductor elements forms irradiation marks on at least one of the wiring layer, the first columnar electrode, and the second columnar electrode. 17. The method for manufacturing a semiconductor device according to any one of 13 to 16 .

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