JP7375340B2 - semiconductor equipment - Google Patents

Description

The present invention relates to the structure of an IGBT (Insulated Gate Bipolar Transistor).

IGBTs made of Si are widely used as elements capable of high-speed switching operations with high power. A typical IGBT has a configuration in which an n-channel MOSFET and a pnp-type bipolar transistor are connected in series, and its specific structure is described in, for example, Patent Document 1.

In this basic structure, an emitter electrode and a gate electrode are provided on the front side of a wafer (semiconductor substrate), and a p+ layer serving as a collector layer and a collector electrode connected to this are provided on the back side. In this case, when the MOSFET is on, current flows through the thick n-layer (drift layer) formed above the collector layer. In order to ensure the withstand voltage when off, it is preferable to form a thick drift layer that is depleted when off, and to lower the resistance when on, it is preferable to make the drift layer thin.

In the IGBT described in Patent Document 1, by providing an n layer (field stop layer: FS layer) with a higher concentration than the drift layer between the drift layer and the collector layer, even when the drift layer is thinned, the depletion layer Good switching characteristics (turn-off characteristics) can be obtained by making it difficult for holes to reach the collector layer and by limiting the amount of holes injected into the drift layer when turned on.

The FS layer can be formed, for example, by ion implantation from the back side (collector side) of the semiconductor substrate, and its position (depth) is adjusted depending on the ion species and its energy during ion implantation, and the dose at that time is adjusted. The donor concentration in the FS layer is adjusted by Patent Document 1 describes that protons (hydrogen ions) are used as the ion species in this case. Here, donors are formed not by hydrogen ions themselves, but by the interaction of point defects generated in silicon by proton implantation and oxygen present in the silicon substrate.

International Publication WO2013/108911

IGBTs may require a low on-voltage (VCEsat: collector-emitter saturation voltage). This on-voltage depends on the ease with which holes can be injected from the collector layer side to the drift layer side, and is therefore influenced by the FS layer. Although the FS layer described in Patent Document 1 is effective for the purpose of suppressing the depletion layer from reaching the collector layer side from the drift layer side as described above or improving the turn-off characteristics, the FS layer is When provided, it was difficult to reduce the on-voltage to a sufficiently low level.

For this reason, an IGBT that includes an FS layer and has a low on-state voltage has been desired.

The present invention has been made in view of these problems, and it is an object of the present invention to provide an invention that solves the above problems.

In order to solve the above problems, the present invention has the following configuration.
The semiconductor device of the present invention includes a p-type first semiconductor region, an n-type second semiconductor region formed on the first semiconductor region, and a second semiconductor region formed on the second semiconductor region and having an impurity concentration of A semiconductor device comprising a semiconductor substrate containing silicon, including a third semiconductor region of n-type lower than the semiconductor region, and a fourth semiconductor region of p-type formed on the third semiconductor region, , the distribution of the donor concentration Nd in the depth x (μm) direction from the first semiconductor region side across the second semiconductor region and the third semiconductor region is continuous from the second semiconductor region to the third semiconductor region. The distribution changes to a first region that is convex to the upper side and has a single peak having a peak value Ndmax corresponding to the second semiconductor region, and a first region that is convex to the upper side and has a single peak with a peak value Ndmax corresponding to the second semiconductor region, and Nd is Nd3 (Nd3< a second region within ±30% of Ndmax), the peak is within 10 μm from the interface between the first semiconductor region and the second semiconductor region, and Ndmax is 1×10 ¹⁵ atoms/ cm ³ or more, Nd3 is in the range of 5×10 ¹³ atom/cm ³ to 2×10 ¹⁴ atom/cm ³ , and in the first region, within a range of ±2 μm from the peak, Nd>Ndmax/2 It is characterized by being
In the semiconductor device of the present invention, when the thickness from x at which the impurity concentration in the second semiconductor region reaches Ndmax to the third semiconductor region is T0, the impurity concentration is within the second semiconductor region and at the peak. Within the range of ±T0×2/3 from x, log(Nd(x))>log(Nd3)+(log(Ndmax)−log(Nd3))/2.
The semiconductor device of the present invention is characterized in that the donor forming the distribution is activated by either oxygen or a complex of silicon crystal defects and oxygen.

Since the present invention is configured as described above, it is possible to obtain an IGBT that includes an FS layer and has a low on-state voltage.

1 is a cross-sectional view showing the structure of a semiconductor device according to an embodiment of the present invention. FIG. 3 is a diagram showing two typical examples of donor concentration distribution in the FS layer. This is an example of the forward characteristics of a pn diode corresponding to the donor concentration distribution of the n-layer. It is a donor concentration distribution in a semiconductor substrate in an example and a comparative example. FIG. 2 is an enlarged view showing the donor concentration distribution near the FS layer in the example.

A semiconductor device according to an embodiment of the present invention will be described below. This semiconductor device is an IGBT (insulated gate bipolar transistor) including a field stop layer (FS layer).

This semiconductor device (IGBT) 1 is a trench gate type IGBT, and FIG. 1 is a cross-sectional view thereof. In FIG. 1, in a semiconductor substrate 10 made of silicon, an n-type (second conductivity type) p ⁺ layer (first semiconductor region) 11, which becomes a collector region, and an n-type (second conductivity type), which becomes an FS layer, are placed on top of a p-type (first conductivity type) p An n ⁺ layer (second semiconductor region) 12 of conductivity type), an n ⁻ layer (third semiconductor region) 13 serving as a drift layer, and a p ⁻ layer (fourth semiconductor region) 14 serving as a base region are sequentially formed. There is. A trench T is formed on the front surface side of the semiconductor substrate 10, penetrating the p ⁻ layer 14 from the surface and reaching the n ⁻ layer 13. A plurality of grooves T are formed in parallel and extending in a direction perpendicular to the paper surface in FIG. An oxide film (gate insulating film) 16 is uniformly formed on the inner surface (side surface) of the trench T, and a gate electrode 21 is formed to fill the trench T.

On the front side of the semiconductor substrate 10, an n ⁺ layer 17 is formed on the sidewall of the trench T to serve as an emitter region. A collector electrode 22 is formed on the entire back surface of the semiconductor substrate 10 so as to be electrically connected to the p ⁺ layer 11 . An emitter electrode 23 is formed on the surface of the semiconductor substrate 10. However, since the interlayer insulating film 24 is formed to cover the gate electrode 21 (trench T) on the surface side of the trench T, the emitter electrode (common electrode) 23 is exposed to n ⁺ through the opening of the interlayer insulating film 24. It is electrically connected to both layer 17 and p ⁻ layer 14 and insulated from gate electrode 21 .

The above basic configuration is similar to the semiconductor device (IGBT) described in Patent Document 1 and the like. This semiconductor device 1 is particularly characterized by the donor concentration distribution in the depth direction in the n ⁺ layer (FS layer) 12 and the n ^- layer (drift layer) 13. Here, in reality, the donor concentration distribution in the depth direction changes continuously from the n ⁺ layer 12 to the n ^- layer 13. When actually manufacturing this semiconductor device 1, an n-type substrate (Si wafer) corresponding to the n ^- layer 13 is used, a p ^- layer 14 is formed on the surface side of this n-type substrate, and then A trench T, an oxide film 16, a gate electrode 21, etc. are formed on the surface. In this respect, there is no difference from conventionally known trench gate type IGBTs.

On the other hand, on the back side of the n-type substrate, an n ⁺ layer (FS layer) 12 and a p ⁺ layer (collector layer) 11 are formed. Here, this semiconductor device 1 is particularly characterized by the distribution of donors in the depth direction from the n ⁺ layer 12 to the n ^- layer 13. Such a distribution can be achieved especially by proton injection from the back side. This point will be explained in detail below.

As described in Patent Document 1 etc., by providing the FS layer (n ⁺ layer 12) with a higher concentration than the drift layer (n ^- layer 13), the depletion layer in the off state becomes the collector region (p ⁺ layer 11). ), and the amount of holes injected into the drift layer when turned on is limited, making it possible to obtain good switching characteristics (turn-off characteristics). On the other hand, in this semiconductor device 1, the on-voltage (VCEsat: collector-emitter saturation voltage) of the IGBT can be lowered by the donor distribution in the FS layer.

The situation when an IGBT turns on is similar to the situation when a pn diode is forward biased. In the configuration of FIG. 1, the p side of the pn diode in this case becomes the collector region (p ⁺ layer 11), and the n side becomes the FS layer (n ⁺ layer 12). In reality, the acceptor concentration distribution in the p ⁺ layer 11 is high and localized near the back surface of the semiconductor substrate 10. On the other hand, the n ⁺ layer 12 is formed to be sufficiently thicker than the p ⁺ layer 11 at a deeper location than the p ⁺ layer 11 when viewed from the back side, and its thickness and donor concentration distribution within it can be controlled by setting the proton implantation conditions. Can be adjusted.

In Figure 2, two typical examples ((1) and (2)) of the impurity distribution of a pn diode with a thin p-layer formed on the surface and an n-layer formed deeper than this are shown. show. Here, the horizontal axis is the depth (linear display), the vertical axis is the impurity concentration (logarithmic display), and the depth of 0 μm corresponds to the back surface of the semiconductor substrate. Here, the donor distribution in the n-layer has a single peak, and there is a region where the absolute value of the concentration gradient is particularly large in the depth direction, and this region is located shallow from the back surface of the semiconductor substrate 10, i.e. Two examples are shown: a case where the region is located close to the p-layer ((1): solid line) and a case where this region is located deep from the back surface of the semiconductor substrate 10 ((2): broken line). In donor distributions formed by ion implantation, including the donor distribution described in Patent Document 1, regions where the absolute value of the concentration gradient is large are generally formed locally. Note that the acceptor concentration in the p layer is also shown here by a dotted line, which is common in (1) and (2).

FIG. 3 schematically shows forward characteristics in I (current)-V (voltage) characteristics of a pn diode corresponding to the concentration distributions (1) and (2). In (1), since the region with a large concentration gradient is located at a shallow location, the donor concentration of the n layer at the pn junction interface becomes high. Therefore, this characteristic becomes an IV characteristic when the donor concentration of the n-layer is high, and when the forward drop voltage VF is large and V is higher than VF, I increases rapidly. When such a pn junction is formed between the collector region and the FS layer, the characteristic (1) in Figure 3 is reflected, and although the on-resistance becomes low in the large current region (VCESat becomes low), , in the low current range, the on-resistance increases (VCESat increases).

On the other hand, in the characteristic (2) of FIG. 3, conversely, VF is small, but the subsequent increase rate of I is small. When such a pn junction is formed between the collector region and the FS layer, the characteristic (2) in Figure 3 is reflected, and although the on-resistance becomes low in the low current region (VCESat becomes low), , the on-resistance becomes high (VCESat becomes high) in a large current region.

In contrast to (1) and (2) in FIG. 3, the characteristic (3) is a preferable characteristic corresponding to the case where the on-resistance is kept low in both the low current region and the large current region. This characteristic is realized by keeping the maximum donor concentration of the n-layer equal to (1) and (2) in FIG. 2 while preventing the formation of a region where the absolute value of the concentration gradient is large.

FIG. 4 is a diagram specifically showing such a donor concentration distribution shape in the semiconductor substrate 10. As shown in FIG. Here, distribution A serving as an example is shown by a solid line, distribution B is comparative example 1, and distribution C is comparative example 2. In comparative example 1 and comparative example 2, the FS layer in Patent Document 1 was formed shallowly. (FIG. 11(c) of Patent Document 1) and the case of deep formation (FIG. 3 of Patent Document 1). The distribution shown by the dotted line near the depth of 0 μm (corresponding to the back surface of the semiconductor substrate 10) shows the acceptor distribution of the collector region (p ⁺ layer 11) in the example, and from FIG. The collector region (p ⁺ layer 11)/FS layer (n ⁺ layer 12) interface has a depth of about 1 μm. Further, as described above, the donor concentration changes continuously in the depth direction, and at a predetermined depth or more from the back surface of the semiconductor substrate 10, it is equal to the donor concentration of the n-type substrate used, and this is the drift layer (n ^- The donor concentration in layer 13) is Nd3.

Further, in FIG. 4, the concentration peak (peak value Ndmax>Nd3) in distribution A (example) exists at a position with a depth of about 2 μm. Therefore, the donor concentration distribution of the example includes a first region having a single peak (peak value Ndmax) convex upward, and a second region where Nd is approximately equal to Nd3 at a deeper location than this. . The second region can be defined, for example, as a region where Nd is within ±30% of Nd3, and corresponds to the drift layer (n ⁻ layer 13). On the other hand, the first region corresponds to the FS layer (n ⁺ layer 12). In the case of distribution A, the FS layer (n ⁺ layer 12)/drift layer (n ^- layer 13) interface has a depth of 3 to 30 μm, for example, about 5 μm.

In FIG. 4, distribution B and distribution C can be considered to have a first region and a second region, similarly to distribution A. Here, as described above, distribution B is a case where the absolute value of the concentration gradient near the peak of the FS layer is formed to be large. This corresponds to (1) in FIG. In the case of distribution B, the characteristics of the pn diode formed here are as shown in (1) in FIG. 3, and as described above, the on-resistance becomes high in the low current range.

On the other hand, in the distribution C in FIG. 4, such a region where the absolute value of the concentration gradient is particularly large does not occur in the first region. However, although the thickness of the first region exceeds 20 μm, the peak is at a deep position from the back surface of the semiconductor substrate 10, and the peak is gentler on the collector region side than the peak, and the thickness on the opposite side of the collector region is lower than the peak on the collector region side. It is relatively steep. This situation corresponds to (2) in FIG. Therefore, in the case of distribution C, the characteristics of the pn diode formed here are as shown in (2) in FIG. 3, and as described above, the on-resistance becomes high in the large current range. That is, when realizing a donor distribution in which the absolute value of the concentration gradient is small, the peak position generally becomes deep, the FS layer becomes thick, and the on-resistance in a large current region becomes high.

On the other hand, in distribution A (example) in FIG. 4, the peak value in the first region is set to Ndmax, and the concentration gradient before and after this peak is set to be gentle. FIG. 5 is an enlarged view of the characteristic A in FIG. 4 in the vicinity of the first region. Here, the peak position is P, the position of the pn junction (collector region (p ⁺ layer 11)/FS layer (n ⁺ layer 12) interface) is D, and the position of the FS layer (n ⁺ layer 12)/drift layer (n ^- Layer 13) The position of the interface is E. Here, in such a distribution, the depth ^of the peak P is determined by ^the thickness ⁽ (distance between DEs), for example, 10 μm or less. The donor concentration Nd3 of the n ^- layer 13 is set to a low concentration in order to function as a drift layer, and is set in the range of 5×10 ¹³ atoms/cm ³ to 2×10 ¹⁴ atoms/cm ³ . Ndmax is set to be 1×10 ¹⁵ atoms/cm ³ or more, which is sufficiently higher than Nd3, in order to make the FS layer (n ⁺ layer 12) a depletion layer stopper. In order to make the concentration distribution in the first region gentle as described above, for example, the thickness of the FS layer (n ⁺ layer 12) is 4 μm, and Nd>Ndmax/2 is established within a range of ±2 μm from the peak. It is preferable that

Alternatively, in FIG. 5, if the donor distribution in the depth x direction is Nd(x), then the side of Nd(x) near Ndmax in a predetermined range before and after the depth P where Nd(x) reaches the peak value Ndmax. It is sufficient if the amount of change (amount of decrease) in is small. For this purpose, within the range of the FS layer (n ⁺ layer 12), the interval from the peak P to the bottom E of the FS layer (n ⁺ layer 12) is defined as T0, and T1 (T1 = T0 ×2/3), and Nd(x) should be larger than the constant value NF0 in the range of ±T1 from the peak P. This constant value NF0 is an intermediate value between Ndmax and Nd3 (log(Nd3)+(log(Ndmax)-log(Nd3))/2) considering that the vertical axis in FIG. 5 is a logarithmic scale. can be adopted. That is, Nd(x) in the n ⁺ layer 12 (FS layer: second semiconductor region) is in the range of ±T1 from the peak depth as T1 = T0 × 2/3, and the FS layer (n ⁺ layer 12) It is sufficient to satisfy Nd(x)>NF0 within the range of . In FIG. 5, since the pn junction interface D exists within the range from peak P to -T1, the lower limit of this range is the pn junction interface D.

In a pn diode having distribution A, the characteristic (3) in FIG. 3 is obtained. Therefore, in the semiconductor device 1 having the distribution A, the on-resistance can be lowered in both the low current region and the large current region.

Below, a method for actually forming the distribution A in FIG. 4 and manufacturing the above semiconductor device 10 will be described. This donor distribution is formed by proton injection and subsequent heat treatment, similar to the technique described in Patent Document 1. The donor thus formed is an activated oxygen in the semiconductor substrate 10 or a complex of oxygen and a silicon crystal defect introduced by proton implantation.

First, when manufacturing a silicon wafer that is the source of the semiconductor substrate 10, a base material formed by the Czochralski (CZ) method comes into contact with a quartz crucible, so that the oxygen content in the base material increases. Therefore, the Floating Zone (FZ) method, the Magnetic CZ method in which impurities in the base material are controlled while applying a magnetic field to molten silicon, and the CZFZ method in which the FZ method is combined after performing the CZ method are preferable for this production. This base material is processed into a wafer shape to form a desired silicon wafer. This silicon wafer is of n-type and corresponds to the above-mentioned n ⁻ layer 13, so its donor concentration is set to Nd3.

After that, the p ^- layer 14, trench T, oxide film 16, gate electrode 21, interlayer insulating film 24, etc. are formed on the front side of this wafer, and then this wafer is polished (thinned) to a desired thickness. Ru. Thereafter, proton implantation is performed from the back side in order to form the above donor distribution. The proton implantation conditions at this time are an energy of 2 to 30 MeV, preferably 2 to 8 MeV, and a dose of 1×10 ¹³ to 1×10 ¹⁵ /cm ² .

At this time, the wafer is mechanically supported by the glass support method (WSS), or the wafer is mechanically supported by the TAIKO method, in which only the outer periphery of the wafer remains thick without being thinned. This proton injection can be performed. Alternatively, protons may be implanted from the front side of the wafer (semiconductor substrate 10) as long as a similar distribution can be achieved. Further, after proton implantation, phosphorus (P) ions may be implanted from the back side of the wafer to realize a donor distribution that reinforces the donor distribution formed by proton irradiation.

Thereafter, the donor is activated by laser annealing or annealing in a furnace at 300° C. to 500° C. for 30 minutes to 3 hours, and the above distribution can be achieved. Thereafter, boron (B) is ion-implanted from the back surface side, and then activated by laser annealing to form a p ⁺ layer 11 that will become a collector layer, and a collector electrode 22 is formed. In this way, the above semiconductor device 1 is manufactured. However, this manufacturing method is just an example, and other manufacturing methods can also be used. In either case, the above-described donor distribution on the back surface side of the semiconductor substrate 10 is preferably formed particularly by proton implantation.

Although the semiconductor device 1 described above is a trench gate type IGBT, it is clear that the same structure can be applied to a planar type IGBT as another form. Further, the configuration (structure and impurity distribution) other than the FS layer and the drift layer as described above is arbitrary as long as the same operation as described above is performed. Further, in the above example, the same configuration can be applied even when all the p-type and n-type in the semiconductor substrate are reversed.

1 Semiconductor device 10 Semiconductor substrate 11 P ⁺ layer (collector region)
12 n ⁺ layer (field stop layer: FS layer)
13 n ^- layer (drift layer)
14 p ^- layer (base region)
16 Oxide film (gate insulating film)
17 n ⁺ layer 21 Gate electrode 22 Collector electrode 23 Emitter electrode 24 Interlayer insulating film T Groove (trench)

Claims (3)

a p-type first semiconductor region;
an n-type second semiconductor region formed on the first semiconductor region;
an n-type third semiconductor region formed on the second semiconductor region and having an impurity concentration lower than that of the second semiconductor region;
a p-type fourth semiconductor region formed on the third semiconductor region;
A semiconductor device comprising a semiconductor substrate containing silicon,
The distribution of the donor concentration Nd in the depth x (μm) direction from the first semiconductor region side over the second semiconductor region and the third semiconductor region is continuous from the second semiconductor region to the third semiconductor region. and the distribution is
an upwardly convex first region that corresponds to the second semiconductor region and has a single peak having a peak value Ndmax;
a second region corresponding to the third semiconductor region and having Nd within ±30% of Nd3 (Nd3<Ndmax);
Equipped with
The peak is within 10 μm from the interface between the first semiconductor region and the second semiconductor region,
Ndmax is 1×10 ¹⁵ atoms/cm ³ or more,
Nd3 is in the range of 5×10 ¹³ atoms/cm ³ to 2×10 ¹⁴ atoms/cm ³ ,
A semiconductor device characterized in that in the first region, Nd>Ndmax/2 within a range of ±2 μm from the peak. When the thickness from x where the impurity concentration in the second semiconductor region reaches Ndmax to the third semiconductor region is T0, ±T0×2 within the second semiconductor region and from x where the impurity concentration is at the peak. Within the range of /3,
log(Nd(x))>log(Nd3)+(log(Ndmax)−log(Nd3))/2
The semiconductor device according to claim 1, characterized in that: 3. The semiconductor device according to claim 1, wherein the donor forming the distribution is activated oxygen or a complex of silicon crystal defects and oxygen.

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