JP7363657B2 - Overvoltage judgment circuit - Google Patents

Description

The present invention relates to an overvoltage determination circuit.

Some sensor signal detection devices detect signals using a sensor using a resistor, such as a gas concentration sensor. This type of sensor signal detection device incorporates an overvoltage determination circuit.

A sensor signal detection device is configured by connecting a sensor to a plurality of terminals using wiring. If any of the wiring connected to these terminals short-circuits to a high-voltage power supply line or the like, any of the plurality of terminals will exceed the threshold for abnormality detection. Then, even if an abnormal state can be detected, the abnormal location cannot be identified. For this reason, the applicant has proposed a wiring abnormality detection device (for example, see Patent Document 1).

According to the technology described in Patent Document 1, there are two overvoltage detection circuits that detect overvoltage at two terminals connecting sensors, two comparators that compare the output voltages of the two overvoltage detection circuits with threshold voltages, and two overvoltage detection circuits. It includes at least a differential amplifier circuit that differentially amplifies the output voltage of the detection circuit, and two comparators that compare the output voltage of the differential amplifier circuit with two threshold voltages. This makes it possible to determine which terminal to which the sensor is connected is short-circuited to the high-voltage power supply line.

However, as described above, it is necessary to add many large-scale circuits that combine many transistors, such as comparators and differential amplifier circuits, resulting in problems of increased circuit area and increased power consumption.

JP2018-84425A

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an overvoltage determination circuit that can suppress power consumption while minimizing the circuit area.

According to the invention set forth in claim 1, when at least one of the plurality of terminals is shorted to power, the voltage of the terminal that has shorted to power (hereinafter referred to as a power shorted terminal) fluctuates, and the voltage of the other terminals that are not shorted to power is changed. The target is an overvoltage determination circuit that determines whether the ground fault terminal is present when the voltage of the ground fault terminal reaches an overvoltage, or even if the voltage of the ground fault terminal is constant, the voltage of other non-ground fault terminals reaches an overvoltage. It is said that

A pair of voltage-current conversion circuits converts voltages at two terminals among the plurality of terminals into currents, respectively. The pair of current absolute value comparison circuits perform absolute comparisons of the converted currents of the pair of voltage-current conversion circuits with reference currents, respectively. The current relative value comparison circuit relatively compares the converted currents of a pair of voltage-current conversion circuits. The determination unit determines which of the two terminals is the short-to-power terminal based on the comparison result of the pair of current absolute value comparison circuits and the comparison result of the current relative value comparison circuit.

Among these, the pair of current absolute value comparison circuit and current relative value comparison circuit is a circuit that compares based on current, so compared to large-scale circuits such as comparators and differential amplifier circuits, it requires a small number of transistors. They can be configured by combining them, reducing the number of transistors used. As a result, power consumption can be suppressed while minimizing the circuit area.

Configuration example of overvoltage determination circuit according to the first embodiment Block diagram schematically showing an example of overall configuration Block diagram schematically showing the electrical configuration of the overvoltage determination circuit Truth table showing examples of judgment criteria by short-to-ground terminal judgment section Configuration example of overvoltage determination circuit according to second embodiment Block diagram schematically showing the electrical configuration of the overvoltage determination circuit Part 1 of the truth table showing an example of judgment criteria by the short-to-ground terminal judgment unit Part 2 of the truth table showing an example of judgment criteria by the short-to-power terminal judgment unit An explanatory diagram of the relationship between the voltages of two terminals and an example of how to set the current gain This is a first example of a circuit configuration to which the overvoltage determination circuit can be applied, which illustrates the explanation of the third embodiment. Part 2 of circuit configuration example to which the overvoltage determination circuit can be applied Application example of the overvoltage determination circuit according to the fourth embodiment

Hereinafter, some embodiments will be described with reference to the drawings. In the following description, components having the same or similar functions as those described in each embodiment will be denoted by the same or similar symbols, and the description of the second embodiment and subsequent embodiments will be omitted as necessary.

(First embodiment)
1 to 4 show explanatory diagrams of the first embodiment. FIG. 2 schematically shows the electrical configuration of the signal processing system 1 of the gas concentration sensor using a block diagram. The signal processing system 1 performs various control processes for detecting the oxygen concentration in the engine exhaust gas using the A/F sensor 2, using exhaust combustion gas discharged by a vehicle engine (not shown) as a gas to be detected.

The signal processing system 1 includes a microcontroller 3 (Micro Control Unit) and an ASIC 4 (application specific IC). The microcomputer 3 includes a CPU and a memory such as a ROM or a RAM (none of which is shown), and operates based on a program stored in the memory. The internal hardware structure of the ASIC 4 is divided into various functions, including an internal power supply 5, a communication section 6, a control section 7 that also functions as a signal processing section, a heater control section 8, a sensor current detection section 9, and a diagnostic detection section. 10, a terminal drive section 11, and an overvoltage detection section 12 with a clamp (corresponding to an overvoltage determination circuit).

The internal power supply 5 receives power supply from the outside of the ASIC 4 and generates a stable DC power supply. , terminal drive section 11, and overvoltage detection section 12). The communication section 6 is capable of communicating with the microcomputer 3, and upon receiving various commands from the microcomputer 3, transmits them to the control section 7, and transmits various information from the control section 7 to the microcomputer 3.

The heater control section 8 is configured by connecting a command control line to the microcomputer 3, and is configured to drive the heater 14 through an external heater drive section 13 when receiving a command from the microcomputer 3. The heater 14 is installed close to the A/F sensor 2. When the heater control section 8 energizes the heater 14 through the heater drive section 13, the heater 14 raises the environmental temperature of the A/F sensor 2, and the temperature of the A/F sensor 2 increases. The A/F sensor 2 flows a sensor current according to the A/F of the exhaust gas and the voltage difference between the sensor terminals PIN1 and PIN2.

The terminal drive unit 11 includes buffer amplifiers 15 and 16 that apply voltages to the pair of sensor terminals PIN1 and PIN2, respectively. Buffer amplifiers 15 and 16 apply a prescribed bias voltage Vcom (for example, 2.5V=VDD/2) between the pair of sensor terminals PIN1 and PIN2. A resistor 17 is connected in series between the output of the buffer amplifier 15 and the terminal PIN1. The resistor 17 is used for phase compensation of the buffer amplifier 15. A resistor 18 is connected in series between the output of the buffer amplifier 16 and the terminal PIN2. Resistor 18 is used for sensor current detection and phase compensation.

The resistor 18 converts the current flowing through the A/F sensor 2 into a voltage. Buffer amplifier 15 is configured to supply current to A/F sensor 2 through resistors 17 and 18 and terminals PIN1 and PIN2.

The overvoltage detection section 12 constitutes an overvoltage detection circuit with a clamp, and is configured to output the overvoltage detection results of the terminals PIN1 and PIN2 to the control section 7. The overvoltage detection unit 12 functions as an overvoltage determination circuit that determines overvoltage and short circuit between one terminal PIN1 and the other terminal PIN2 connected to both sides of the A/F sensor 2. The overvoltage detection section 12 transmits voltage information when the terminal PIN1 and/or PIN2 is in an overvoltage state to the diagnostic detection section 10. The diagnostic detection section 10 receives the voltages VINT1 and VINT2 clamped by the overvoltage detection section 12, and detects diagnostic information based on these voltages VINT1 and VINT2.

The sensor current detection section 9 is configured with a built-in A/D converter, performs A/D conversion of the voltage across the shunt resistor 18, and outputs digital data of the sensor current to the control section 7. The control unit 7 receives information input from the microcomputer 3 through the communication unit 6, voltage information detected by the overvoltage detection unit 12, diagnostic information detected by the diagnostic detection unit 10, and sensor current information detected by the sensor current detection unit 9. Based on this, the terminal drive section 11 and the heater control section 8 are collectively controlled.

When the control unit 7 receives digital data of the sensor current of the A/F sensor 2 from the sensor current detection unit 9, the terminal drive unit 11 controls the energization of the A/F sensor 2 based on the digital data of the sensor current. . An increase or decrease in the element current of the A/F sensor 2 corresponds to an increase or decrease in the air-fuel ratio, that is, lean/rich. For example, when the air-fuel ratio becomes lean, the element current becomes positive, and when the air-fuel ratio becomes rich, the element current becomes negative. becomes. At this time, the direction in which the current flows from the terminal PIN1 to the terminal PIN2 is the positive direction, and the opposite direction is the negative direction.

Hereinafter, a configuration example of the overvoltage detection section 12 will be described with reference to FIGS. 1 and 3. As illustrated in FIG. 3, the overvoltage detection unit 12 includes voltage-current conversion circuits 21 and 22, current absolute value comparison circuits 23 and 24, current amplification circuits 25a and 25b, current relative value comparison circuit 26, and a power supply terminal. It can be divided into blocks by the determination unit 28.

<Description of voltage-current conversion circuit 21>
The voltage-current conversion circuit 21 shown in FIG. 3 is configured to generate a current Iout1 proportional to the value of the overvoltage -VDD when the voltage at the terminal PIN1 becomes an overvoltage exceeding the power supply voltage VDD (equivalent to a predetermined voltage). FIG. 1 illustrates a voltage-current conversion circuit 21. As shown in FIG. The voltage-current conversion circuit 21 shown in FIG. 1 is configured by connecting p-channel type MOSFET_M1, M3, M5 and n-channel type MOSFET_M2, M4 in the illustrated form.

MOSFET_M1 and M3 are set to have the same size and the same current gain. MOSFET_M2 and M4 are also set to have the same size and the same current gain.

MOSFET_M1 and M3 are configured by having their gates commonly connected to each other, and the drains of MOSFET_M3 are also commonly connected to the common connection point. Thereby, MOSFET_M1 and M3 constitute a first mirror transistor pair and constitute a first current mirror circuit 31.

MOSFET_M2 and M4 are also configured by having their gates commonly connected to each other, and the drains of MOSFET_M2 are also commonly connected to the common connection point. MOSFET_M2 and M4 are each configured by connecting a source serving as a current-carrying terminal to the ground side. Thereby, MOSFET_M2 and M4 form a second mirror transistor pair and form a second current mirror circuit 32.

A second mirror transistor pair M2, M4 of a second current mirror circuit 32 is connected in series to a first mirror transistor pair M1, M3 of the first current mirror circuit 31.

Specifically, the drain of MOSFET_M1 and the drain of MOSFET_M2 are commonly connected. The source of MOSFET_M2 is connected to ground. Furthermore, a terminal PIN1 is connected to the source of one MOSFET_M1 of the first mirror transistor pair M1 and M3 of the first current mirror circuit 31 through a resistor R1.

The drain of MOSFET_M3 and the drain of MOSFET_M4 are commonly connected. The source of MOSFET_M4 is connected to the ground, and the source of the other MOSFET_M3 of the first mirror transistor pair M1, M3 is connected to the supply node of the power supply voltage VDD, and the voltage applied to the source is connected to the power supply voltage. It is set to VDD. As a result, when a voltage exceeding the power supply voltage VDD is applied to the terminal PIN1, the node at the common connection point between the resistor R1 and the source of the MOSFET_M1 is clamped to the power supply voltage VDD.

On the other hand, MOSFET_M5 is mirror-connected to the first current mirror circuit 31 and outputs the drain current as the output current Iout1. At this time, when the voltage of the terminal PIN1 becomes an overvoltage equal to or higher than VDD, MOSFET_M5 generates and outputs a current Iout1 proportional to the value of the overvoltage.

<Description of voltage-current conversion circuit 22>
The voltage-current conversion circuit 22 shown in FIG. 3 generates a current Iout2 proportional to the value of the overvoltage -VDD when the voltage at the terminal PIN2 becomes an overvoltage exceeding the power supply voltage VDD. The voltage-current conversion circuit 22 shown in FIG. 1 is configured by connecting p-channel type MOSFET_M7, M9, M11 and n-channel type MOSFET_M8, M10 in the illustrated form.

MOSFET_M7 and M9 are set to have the same size and the same current gain. MOSFET_M8 and M10 are also set to have the same size and the same current gain.

MOSFET_M7 and M9 are configured by having their gates commonly connected to each other, and the drains of MOSFET_M9 are also commonly connected to the common connection point. Thereby, MOSFET_M7 and M9 constitute a first mirror transistor pair and a first current mirror circuit 41.

MOSFET_M8 and M10 are also configured with their gates commonly connected to each other, and the drains of MOSFET_M8 are also commonly connected to the common connection point. MOSFET_M8 and M10 are each configured by connecting a source serving as a current-carrying terminal to the ground side. Thereby, MOSFET_M8 and M10 constitute a second mirror transistor pair and a second current mirror circuit 42.

A second mirror transistor pair M8, M10 of a second current mirror circuit 42 is connected in series to a first mirror transistor pair M7, M9 of the first current mirror circuit 41.

Specifically, the drain of MOSFET_M7 and the drain of MOSFET_M8 are commonly connected. The source of MOSFET_M8 is connected to ground. Furthermore, a terminal PIN2 is connected to the source of one MOSFET_M7 of the first mirror transistor pair M7 and M9 of the first current mirror circuit 41 through a resistor R2.

The drain of MOSFET_M9 and the drain of MOSFET_M10 are commonly connected. The source of MOSFET_M10 is connected to ground. The source of the other MOSFET_M9 of the first mirror transistor pair M7 and M9 is connected to the supply node of the power supply voltage VDD, and the voltage applied to the source is set as the power supply voltage VDD. As a result, when a voltage exceeding the power supply voltage VDD is applied to the terminal PIN2, the node at the common connection point between the resistor R2 and the source of the MOSFET_M7 is clamped to the power supply voltage VDD.

On the other hand, MOSFET_M11 is mirror-connected to the first current mirror circuit 41 and outputs the drain current as the output current Iout2. At this time, when the voltage of the terminal PIN2 becomes an overvoltage equal to or higher than VDD, the MOSFET_M11 generates and outputs a current Iout2 proportional to the value of the overvoltage.

<Description of the pair of absolute current value comparison circuits 23 and 24>
The current absolute value comparison circuit 23 illustrated in FIG. 3 compares the current Iout1 with the reference current IREF and outputs the current to the short-to-ground terminal determination unit 28. The short-to-power terminal determination unit 28 includes a high-impedance input comparator, and accepts the voltage VO1 according to the input current as "H" or "L". The short-to-ground terminal determining unit 28 determines whether the current Iout1 is higher than the reference current IREF by inputting the voltage VO1, and when the current Iout1 is higher than the reference current IREF, it is accepted as "H", and the current Iout1 is the reference current. It is accepted as "L" when it is below IREF.

The current absolute value comparison circuit 23 illustrated in FIG. 1 includes a current source 33 that generates a reference current IREF. The drain of MOSFET_M5 is connected in series to the current source 33, and is configured to absolutely compare the current flowing through MOSFET_M5 with reference current IREF.

On the other hand, the current absolute value comparison circuit 24 illustrated in FIG. 3 outputs a current obtained by comparing the current Iout2 with the reference current IREF to the power supply terminal determining section 28. The short-to-power terminal determining unit 28 includes a high-impedance input comparator, and accepts the voltage VO2 according to the input current as "H" or "L". The short-to-ground terminal determining unit 28 determines whether the current Iout2 is higher than the reference current IREF by inputting the voltage VO2, and when the current Iout2 is higher than the reference current IREF, it is accepted as "H", and the current Iout2 is the reference current. Accepted as “L” when the current is below IREF. Note that the reference current IREF can be changed to an arbitrary reference value by the control section 7.

The current absolute value comparison circuit 24 illustrated in FIG. 1 includes a current source 43 that generates a reference current IREF. The drain of MOSFET_M11 is connected in series to a current source 43, and is configured to absolutely compare the current flowing through MOSFET_M11 with a reference current IREF.

<Description of current relative value comparison circuit 26>
The current relative value comparison circuit 26 illustrated in FIG. It consists of

The current amplification circuit 25a illustrated in FIG. 3 inputs the current Iout1, amplifies the current by a current gain α, and outputs the current Iout1_1 to the amplified current relative value comparison circuit 27. As illustrated in FIG. 1, the current amplification circuit 25a is configured with a p-channel MOSFET_M6 mirror-connected to the first current mirror circuit 31, and amplifies the current Iout1 by α times and outputs the amplified current Iout1_1. Similarly, the current amplification circuit 25b illustrated in FIG. 3 inputs the current Iout2, amplifies the current by a current gain α, and outputs the current Iout2_1 to the amplified current relative value comparison circuit 27.

As shown in FIG. 1, the current amplification circuit 25b includes a MOSFET_M12 mirror-connected to the first current mirror circuit 41, and a third current mirror circuit 44 that draws a current proportional to the output current of the MOSFET_M12 from the output current of the MOSFET_M6. It is composed of

The third current mirror circuit 44 is configured by connecting n-channel type MOSFET_M13 and M14 in the illustrated form, draws the drain current of MOSFET_M12, amplifies the current Iout2 by α times, and outputs the amplified current Iout2_1.

As shown in FIG. 1, the amplified current relative value comparison circuit 27 is a circuit configured by connecting the drain of MOSFET_M6 and the drain of MOSFET_M14, and is mirror-connected to the first current mirror circuits 31 and 41. The currents Iout1_1 and Iout1_2 flowing through the drains of MOSFET_M6 and M14, respectively, are compared and subtracted.

The short-to-power terminal determining unit 28 includes a high-impedance input comparator, and accepts the voltage VO3 corresponding to the current obtained by relatively subtracting the currents Iout1_1 and Iout2_1 as "H" or "L". The short-to-ground terminal determining unit 28 inputs the voltage VO3 to compare the levels of the current Iout1_1 and the current Iout2_1, accepts it as "H" when the current Iout1_1 is higher than the current IOUT2_1, and determines that the current Iout1_1 is less than or equal to the input current Iout2_1. It is accepted as "L" when

The current relative value comparison circuit 26 relatively compares the currents Iout1_1 and Iout2_1, so that even if the voltage of each terminal PIN1, PIN2 fluctuates due to so-called PVT variations due to process factors, power supply voltage factors, and temperature factors, it can be accurately It can be determined that

<Description of short-to-power terminal determination unit 28>
FIG. 4 shows the determination criteria by the short-to-ground terminal determining section 28 using a truth table. When the voltages VO1 and VO2, which are the comparison results of the pair of current absolute value comparison circuits 23 and 24, are both “L”, the power supply terminal determination unit 28 selects a current absolute value comparison circuit from the voltage-current conversion circuits 21 and 22. It can be determined that both of the currents Iout1 and Iout2 flowing into 23 and 24 are smaller than the reference current IREF. Therefore, when both the voltages VO1 and VO2 are "L", the shorted-to-power terminal determination unit 228 can determine that neither of the terminals PIN1 and PIN2 is shorted to power. At this time, the voltage VO3 may be under any voltage condition.

Furthermore, when the voltage VO1 that is the comparison result of the current absolute value comparison circuit 23 is "L" and the voltage VO2 that is the comparison result of the current absolute value comparison circuit 24 is "H", the short-to-power terminal determination unit 28 determines that: It can be determined that the current Iout1 flowing from the voltage-current conversion circuit 21 to the current absolute value comparison circuit 23 is less than the reference current IREF, and the current Iout2 flowing from the voltage-current conversion circuit 22 to the current absolute value comparison circuit 24 is greater than the reference current IREF. Therefore, when the voltage VO1 is "L" and the voltage VO2 is "H", the short-to-power terminal determining unit 28 determines that the terminal PIN2 is short to power and the terminal PIN1 is not short to power. Note that if the voltage VO1 is "L" and the voltage VO2 is "H", the voltage VO3 becomes "L" unconditionally unless the current relative value comparison circuit 26 is out of order.

Furthermore, when the voltage VO1 that is the comparison result of the current absolute value comparison circuit 23 is "H" and the voltage VO2 that is the comparison result of the current absolute value comparison circuit 24 is "L", the short-to-ground terminal determination unit 28 determines that: It can be determined that the current Iout1 flowing from the voltage-current conversion circuit 21 to the current absolute value comparison circuit 23 is greater than the reference current IREF, and the current Iout2 flowing from the voltage-current conversion circuit 22 to the current absolute value comparison circuit 24 is less than the reference current IREF.

Therefore, when the voltage VO1 is "H" and the voltage VO2 is "L", the short-to-power terminal determining unit 28 determines that the terminal PIN1 is short to power and the terminal PIN2 is not short to power. Note that if the voltage VO1 is "H" and the voltage VO2 is "L", the voltage VO3 becomes "H" unconditionally unless the current relative value comparison circuit 26 is out of order.

In this embodiment, a load by the A/F sensor 2 is connected between the pair of terminals PIN1 and PIN2, and two buffers 15 and 16 are used to drive the terminals PIN1 and PIN2. In this case, when one terminal PIN1 is shorted to power, the other terminal PIN2 becomes a voltage corresponding to a gain determined according to the impedance of the A/F sensor 2 and the values of the resistors 17 and 18. Therefore, when the absolute values of the voltages at the terminals PIN1 and PIN2 both become higher than the reference voltage, the voltages VO1 and VO2, which are the comparison results of the current absolute value comparison circuits 23 and 24, may both become "H". be.

Under such conditions, if the terminal PIN1 is shorted to power, but the terminal PIN2 is not shorted to power, current Iout1_1>current Iout2_1, so voltage VO3 becomes "H". Therefore, when the voltage VO1 is "H", the voltage VO2 is "H", and the voltage VO3 is "H", the short-to-power terminal determination unit 28 can determine that the terminal PIN1 is short to power.

Further, when the terminal PIN1 is not shorted to power supply but the terminal PIN2 is shorted to power supply, current Iout1_1<current Iout2_1, so voltage VO3 becomes "L". The short-to-power terminal determining unit 28 can determine that the terminal PIN2 is short to power when the voltage VO1 is "H", the voltage VO2 is "H", and the voltage VO3 is "L". Therefore, if only one of the terminals PIN1 and PIN2 is shorted to power, it can be determined that the terminal is shorted to power.

<Summary of this embodiment>
According to this embodiment, the voltage-current conversion circuits 21 and 22 generate currents proportional to the overvoltage -VDD of the respective terminals PIN1 and PIN2. Further, since a circuit is added that compares the overvoltage of the terminals PIN1 and PIN2 using the converted currents of the voltage-current conversion circuits 21 and 22, it is possible to detect the overvoltage of each of the terminals PIN1 and PIN2 and to determine whether the terminal is short to power. According to this embodiment, the number of additional circuits can be reduced compared to the conventional technology, the circuit configuration area can be saved, and the circuit configuration can be realized with low power consumption.

In particular, according to this embodiment, if only one of the terminals PIN1 and PIN2 is shorted to power, it can be determined that the terminal is shorted to power.

(Second embodiment)
5 to 10 show explanatory diagrams of the second embodiment. The same parts as in the first embodiment are given the same reference numerals and the explanation thereof will be omitted, and the parts different from the first embodiment will be explained.

In this embodiment, a circuit in which the current gain is changed in the current relative value comparison circuit 26 described in the first embodiment is referred to as a "first current relative value comparison circuit 2261." Further, a current relative value comparison circuit 2262 added separately from the first current relative value comparison circuit 2261 will be referred to as a "second current relative value comparison circuit 2262" in the description.

<Description of first current relative value comparison circuit 2261>
The first relative current value comparison circuit 2261 shown in FIG. Equipped with

The current amplification circuit 25a shown in FIG. 5 outputs the current Iout1_1 obtained by amplifying the current Iout1 by a current gain α (corresponding to the first gain) to the amplified current relative value comparison circuit 27. As shown in FIG. 1, the current amplification circuit 25a is configured with a p-channel MOSFET_M6 mirror-connected to the first current mirror circuit 31, and amplifies the current Iout1 by α times and outputs it as a current Iout1_1.

Similarly, the current amplification circuit 25b illustrated in FIG. 6 outputs the current Iout2_1, which is obtained by amplifying the current Iout2 by a current gain β times, to the amplified current relative value comparison circuit 27. In this embodiment, the current gain β (corresponding to the second gain) is set to a value different from the above-described current gain α. There are cases where current gain α>current gain β and cases where current gain α<current gain β, but the determination result of the power supply terminal by the power supply terminal determining unit 228 differs depending on the case, so this determination The contents will be explained later.

As shown in FIG. 5, the current amplification circuit 25b includes a MOSFET_M12 mirror-connected to the first current mirror circuit 41, and a third current mirror circuit 44 that draws a current proportional to the output current of the MOSFET_M12 from the output current of the MOSFET_M6. It is composed of

The third current mirror circuit 44 is configured by connecting n-channel type MOSFET_M13 and M14 in the illustrated form, draws the drain current of MOSFET_M12, amplifies the current Iout2 by a current gain β times, and outputs the amplified current Iout2_1.

As shown in FIG. 5, the amplified current relative value comparison circuit 27 is a circuit configured by connecting the drain of MOSFET_M6 and the drain of MOSFET_M14, and is mirror-connected to the first current mirror circuits 31 and 41. The currents Iout1_1 and Iout2_1 flowing through the drains of MOSFET_M6 and M14, respectively, are compared and subtracted.

The short-to-power terminal determining unit 228 includes a high-impedance input comparator, and accepts the voltage VO3 corresponding to the current obtained by relatively subtracting the currents Iout1_1 and Iout2_1 as "H" or "L". The short-to-ground terminal determination unit 228 determines the level of the current Iout1_1 and the current Iout2_1 by inputting the voltage VO3, accepts it as "H" when the current Iout1_1 is higher than the current IOUT2_1, and determines that the current Iout1_1 is less than or equal to the input current Iout2_1. It is accepted as "L" when

<Description of second current relative value comparison circuit 2262>
The second current relative value comparison circuit 2262 shown in FIG. Equipped with

The current amplification circuit 225a shown in FIG. 6 outputs the current Iout1_2 obtained by amplifying the current Iout1 by a current gain β times to the amplified current relative value comparison circuit 227. As shown in FIG. 5, the current amplification circuit 225a includes a p-channel MOSFET_M15 mirror-connected to the first current mirror circuit 31 and a fourth current mirror circuit 34.

The fourth current mirror circuit 34 is configured by connecting n-channel MOSFET_M16 and M17 in the illustrated manner, draws the drain current of MOSFET_M15, amplifies the current Iout1 by β times, and outputs the amplified current Iout1_2.

Similarly, the current amplification circuit 225b illustrated in FIG. 6 outputs the current Iout2_2 obtained by amplifying the current Iout2 by a current gain α times to the amplified current relative value comparison circuit 227. As shown in FIG. 5, the current amplification circuit 225b is configured by MOSFET_M18 mirror-connected to the first current mirror circuit 41. MOSFET_M8 amplifies current Iout2 by α times and outputs it as current Iout2_2.

As shown in FIG. 5, the amplified current relative value comparison circuit 227 is a circuit configured by connecting the drain of MOSFET_M18 and the drain of MOSFET_M17, and is mirror-connected to the first current mirror circuits 31 and 41. The currents Iout2_2 and Iout1_2 flowing through the drains of MOSFET_M18 and M17, respectively, are compared and subtracted.

In short, when the first relative current value comparison circuit 2261 and the second relative current value comparison circuit 2262 respectively relatively compare the converted currents of the pair of voltage-current conversion circuits 21 and 22, the pair of voltage-current conversion circuits 21, 22, By interchanging the current gains α and β of the 22 converted currents and making a relative comparison, different comparison results are output.

The short-to-power terminal determining unit 228 shown in FIG. 6 includes a high-impedance input comparator, and accepts the voltage VO4 corresponding to the current obtained by relatively subtracting the currents Iout2_2 and Iout1_2 as "H" or "L". The short-to-ground terminal determination unit 228 determines the level of the current I out2_2 and the current IOUT1_2 by inputting the voltage VO4, and when the current Iout2_2 is higher than the current IOUT1_2, it is accepted as "H", and the current Iout2_2 is equal to or less than the current Iout1_2. Sometimes accepted as "L".

The first relative current value comparison circuit 2261 relatively compares the currents Iout1_1 and Iout2_1, and the second relative current value comparison circuit 2262 relatively compares the currents Iout2_2 and Iout1_2. Even if the voltage varies due to so-called PVT variations due to process factors, power supply voltage factors, and temperature factors, accurate determination can be made.

<Description of determination operation of short-to-ground terminal determination unit 228 when current gain α>β>
FIG. 7 shows the determination criteria of the power short terminal determining section 228 under the condition of current gain α>current gain β using a truth table.

When the voltages VO1 and VO2, which are the comparison results of the pair of current absolute value comparison circuits 23 and 24, are both "L", the power supply terminal determination unit 228 selects a current absolute value comparison circuit from the voltage current conversion circuits 21 and 22. It can be determined that both of the currents Iout1 and Iout2 flowing into 23 and 24 are smaller than the reference current IREF. Therefore, the short-to-power terminal determination unit 228 can determine that neither of the terminals PIN1 and PIN2 is short-circuited to power when both the voltages VO1 and VO2 are "L". At this time, voltages VO3 and VO4 may be under any voltage conditions.

Furthermore, when the voltage VO1 that is the comparison result of the current absolute value comparison circuit 23 is “L” and the voltage VO2 that is the comparison result of the current absolute value comparison circuit 24 is “H”, the short-to-power terminal determination unit 228 determines that: It can be determined that the current Iout1 flowing from the voltage-current conversion circuit 21 to the current absolute value comparison circuit 23 is less than the reference current IREF, and the current Iout2 flowing from the voltage-current conversion circuit 22 to the current absolute value comparison circuit 24 is greater than the reference current IREF.

Therefore, when the voltage VO1 is "L" and the voltage VO2 is "H", the short-to-power terminal determining unit 228 determines that the terminal PIN2 is short to power and the terminal PIN1 is not short to power. Note that when the voltage VO1 is "L" and the voltage VO2 is "H", if both the first relative current value comparison circuit 2261 and the second relative current value comparison circuit 2262 are not malfunctioning, the voltage VO3 is unconditionally "L" and voltage VO4 becomes "H".

Furthermore, when the voltage VO1 that is the comparison result of the current absolute value comparison circuit 23 is "H" and the voltage VO2 that is the comparison result of the current absolute value comparison circuit 24 is "L", the short-to-power terminal determination unit 228 determines that: It can be determined that the current Iout1 flowing from the voltage-current conversion circuit 21 to the current absolute value comparison circuit 23 is greater than the reference current IREF, and the current Iout2 flowing from the voltage-current conversion circuit 22 to the current absolute value comparison circuit 24 is less than the reference current IREF.

Therefore, when the voltage VO1 is "H" and the voltage VO2 is "L", the short-to-power terminal determining unit 228 determines that the terminal PIN1 is short to power and the terminal PIN2 is not short to power. Note that when the voltage VO1 is "H" and the voltage VO2 is "L", if both the first relative current value comparison circuit 2261 and the second relative current value comparison circuit 2262 are not malfunctioning, the voltage VO3 is unconditionally "H" and voltage VO4 becomes "L".

Furthermore, if the absolute values of the voltages at the terminals PIN1 and PIN2 are both higher than the reference voltage, the voltages VO1 and VO2, which are the comparison results of the current absolute value comparison circuits 23 and 24, may both be "H". be.

At this time, if terminal PIN1 is not shorted to power but terminal PIN2 is shorted to power, current Iout1_1<current Iout2_1 and current Iout2_2>current Iout1_2, so voltage VO3 is "L" and VO4 is It becomes "H".

Therefore, when the voltage VO1 is "H", the voltage VO2 is "H", the voltage VO3 is "L", and the voltage VO4 is "H", the short-to-power terminal determining unit 228 determines that the terminal PIN2 is short to power, It is determined that the terminal PIN1 is not shorted to power.

Consider the condition of current gain α > current gain β. When the terminal PIN1 is shorted to power supply but the terminal PIN2 is not shorted to power supply, the voltage VO3 becomes "H" and VO4 becomes "L". Therefore, when the voltage VO1 is "H", the voltage VO2 is "H", the voltage VO3 is "H", and the voltage VO4 is "L", the short-to-power terminal determination unit 228 determines that the terminal PIN1 is short to power. It is determined that the terminal PIN2 is not shorted to power.

When both terminals PIN1 and PIN2 are shorted to power, by setting current gains α and β so that current Iout1_1>current Iout2_1 and current Iout2_2>current Iout1_2, voltage VO3 and voltage VO4 become "H". Become. Therefore, when the voltage VO1 is "H", the voltage VO2 is "H", the voltage VO3 is "H", and the voltage VO4 is "H", the short-to-power terminal determining unit 228 determines that the terminals PIN1 and PIN2 are short to power. It is determined that the

<Explanation of the judgment operation of the short-to-ground terminal judgment unit 228 when the current gain α<β>
Further, FIG. 8 shows the determination criteria of the shorted-to-ground terminal determining section 228 under the condition of current gain α<current gain β using a truth table. When both the voltages VO1 and VO2 are "L", the short-to-power terminal determination unit 228 determines that neither of the terminals PIN1 and PIN2 is short-circuited to power for the same reason as explained in FIG. 7 above. At this time, voltages VO3 and VO4 may be under any voltage conditions.

Furthermore, when the voltage VO1 that is the comparison result of the current absolute value comparison circuit 23 is “L” and the voltage VO2 that is the comparison result of the current absolute value comparison circuit 24 is “H”, the short-to-power terminal determination unit 228 determines that: It can be determined that the current Iout1 flowing from the voltage-current conversion circuit 21 to the current absolute value comparison circuit 23 is less than the reference current IREF, and the current Iout2 flowing from the voltage-current conversion circuit 22 to the current absolute value comparison circuit 24 is greater than the reference current IREF.

When the voltage VO1 is "L" and the voltage VO2 is "H", the short-to-power terminal determining unit 228 determines that the terminal PIN2 is short to power and the terminal PIN1 is not short to power. Note that when the voltage VO1 is "L" and the voltage VO2 is "H", if both the first relative current value comparison circuit 2261 and the second relative current value comparison circuit 2262 are not malfunctioning, the voltage VO3 is unconditionally "L" and voltage VO4 becomes "H".

Furthermore, when the voltage VO1 that is the comparison result of the current absolute value comparison circuit 23 is "H" and the voltage VO2 that is the comparison result of the current absolute value comparison circuit 24 is "L", the short-to-power terminal determination unit 228 determines that: It can be determined that the current Iout1 flowing from the voltage-current conversion circuit 21 to the current absolute value comparison circuit 23 is greater than the reference current IREF, and the current Iout2 flowing from the voltage-current conversion circuit 22 to the current absolute value comparison circuit 24 is less than the reference current IREF.

Therefore, when the voltage VO1 is "H" and the voltage VO2 is "L", the short-to-power terminal determining unit 228 determines that the terminal PIN2 is short to power and the terminal PIN1 is not short to power. Note that if the voltage VO3 is "H" and the voltage VO4 is "L", if both the first relative current value comparison circuit 2261 and the second relative current value comparison circuit 2262 are not malfunctioning, the voltage VO3 is unconditionally "H" and voltage VO4 becomes "L".

In this embodiment, a load by an A/F sensor 2 is connected between a pair of terminals PIN1 and PIN2, and two buffers 15 and 16 are used to drive the terminals PIN1 and PIN2. If the voltage at the terminal PIN1 increases via the impedance of the A/F sensor 2, the voltage at the terminal PIN2 also increases. In this case, when one terminal PIN1 shorts to power, the other terminal PIN2 becomes a voltage that changes depending on the gain determined according to the impedance of the A/F sensor 2 and the values of the resistors 17 and 18. Therefore, when the absolute values of the voltages at the terminals PIN1 and PIN2 both become higher than the reference voltage, the voltages VO1 and VO2, which are the comparison results of the current absolute value comparison circuits 23 and 24, may both become "H". be.

When terminals PIN1 and PIN2 are both shorted to power, under the condition of current gain α<current gain β, current Iout1_1<current Iout2_1 and current Iout2_2<current Iout1_2, so voltage VO3 becomes "L", Voltage VO4 becomes "L".

Therefore, when the voltage VO1 is "H", the voltage VO2 is "H", the voltage VO3 is "L", and the voltage VO4 is "L", the short-to-power terminal determining unit 228 determines that both the terminals PIN1 and PIN2 are short-to-power. It is determined that the

Consider the condition of current gain α < current gain β. When terminal PIN1 is shorted to power supply but terminal PIN2 is not shorted to power supply, if current gains α and β are set so that current Iout1_1>current Iout2_1 and current Iout2_2<current Iout1_2, voltage VO3 increases. "H" and voltage VO4 becomes "L". Therefore, when the voltage VO1 is "H", the voltage VO2 is "H", the voltage VO3 is "H", and the voltage VO4 is "L", the short-to-power terminal determination unit 228 determines that the terminal PIN1 is short to power. It is determined that the terminal PIN2 is not shorted to power.

Conversely, if terminal PIN1 is not shorted to power but terminal PIN2 is shorted to power, if current gains α and β are set so that current Iout1_1<current Iout2_1 and current Iout2_2>current Iout1_2, Voltage VO3 becomes "L" and voltage VO4 becomes "H". Therefore, when the voltage VO1 is "H", the voltage VO2 is "H", the voltage VO3 is "L", and the voltage VO4 is "H", the short-to-power terminal determination unit 228 determines that the terminal PIN2 is short to power. It is determined that the terminal PIN1 is not shorted to power.

Therefore, if current gain α and current gain β are different from each other, short-to-power terminal determination unit 228 determines whether one of terminals PIN1 and PIN2 has shorted to power, or both terminals PIN1 and PIN2 have shorted to power. You can determine whether Further, it is desirable that the current gain α and the current gain β are set to values whose absolute values are not the same.

<Summary of this embodiment>
According to this embodiment, the same effects as those of the embodiment described above are achieved. Further, when both terminals PIN1 and PIN2 are shorted to power, the currents are amplified with different current gains α and β so that the logics of voltages VO3 and VO4 are both “L” or “H” and match. Therefore, the short-to-power terminal determination unit 228 can determine whether one of the terminals PIN1 and PIN2 has shorted to power, or whether both terminals PIN1 and PIN2 have shorted to power.

An example of how to set the current gains α and β will be described below. If one terminal (for example, PIN1) is shorted to power, the other terminal (for example, PIN2) is The maximum value of the voltage is determined.
Therefore, under the condition where the voltage of the non-short-to-power terminal (for example, PIN2) is the maximum, either voltage VO3 or voltage VO4 will match the condition of voltages VO3 and VO4 when both terminals PIN1 and PIN2 are short-circuited to power. It is desirable to set the current gains α and β so that the logic is inverted.

An A/F sensor 2 is connected between the terminal PIN1 and the terminal PIN2, and the A/F sensor 2 can be simulated as an impedance element using a resistance. Here, the voltages of the terminals PIN1 and PIN2 are defined as terminal voltages VP1 and VP2, respectively.

FIG. 9 shows possible ranges of the terminal voltages VP1 and VP2 of the terminals PIN1 and PIN2 during normal operation, when both terminals are shorted to power, and when one terminal is shorted to power. The range RA1 is a normal operating range, and the terminal voltages VP1 and VP2 are lower than the power supply voltage VDD. A line RA2 indicates possible values of the terminal voltages VP1 and VP2 when both terminals PIN1 and PIN2 are shorted to power. In this case, terminal voltage VP1=terminal voltage VP2=short-circuit voltage.

<Terminal PIN1 short-circuit>
The range RA3 indicates the possible range of the terminal voltage VP2 of the terminal PIN2 when only the terminal PIN1 is shorted to power and the resistance of the A/F sensor 2 is infinite, that is, it is open. In this case, the influence of the short-to-power supply of the terminal PIN1 is not applied to the terminal PIN2, and the terminal voltage VP2 does not depend on the terminal voltage VP1, and the terminal voltage VP2 is in a range equivalent to the normal operating range.

The range RA4 indicates the possible range of the terminal voltage VP2 of the terminal PIN2 when only the terminal PIN1 is shorted to power and the resistance of the A/F sensor 2 is a finite value. As the resistance value of the A/F sensor 2 decreases, the terminal voltage VP2 increases under the influence of the terminal voltage VP1 of the terminal PIN1 which is shorted to power. A line RA5 indicates a possible boundary line of the terminal voltage VP2 when only the terminal PIN1 is shorted to power and the resistance of the A/F sensor 2 is the minimum value among the assumed values.

<Terminal PIN2 short to power>
The range RA6 indicates the possible range of the terminal voltage VP1 of the terminal PIN1 when only the terminal PIN2 is shorted to power and the resistance of the A/F sensor 2 is infinite, that is, it is open. In this case, the influence of the short-to-power supply of the terminal PIN2 is not exerted on the terminal PIN1, and the terminal voltage VP1 does not depend on the terminal voltage VP2, and the terminal voltage VP1 is in a range equivalent to the normal operating range.

The range RA7 indicates the possible range of the terminal voltage VP1 when only the terminal PIN2 is shorted to power and the resistance of the A/F sensor 2 is a finite value. As the resistance value of the A/F sensor 2 decreases, the terminal voltage VP1 increases under the influence of the terminal voltage VP2 of the terminal PIN1 which is shorted to power. A line RA8 indicates a possible boundary line of the terminal voltage VP1 when only the terminal PIN2 is shorted to power and the resistance of the A/F sensor 2 is the minimum value among the assumed values.

Range RA9 indicates a setting range of the relationship between terminal voltages VP1 and VP2 for determining whether only terminal PIN1 is shorted to power or both terminals PIN1 and PIN2 are shorted to power.
Further, range RA10 indicates a setting range of the relationship between terminal voltages VP1 and VP2 for determining whether only terminal PIN2 is shorted to power or both terminals PIN1 and PIN2 are shorted to power.

That is, when setting the current gain α:β and designing the parameters of each element in the overvoltage detection section 12, it is desirable to design as follows.
Assuming that the conditions of current gains α and β are α>β and that only terminal PIN1 is shorted to power, when the value of the resistance of A/F sensor 2 is changed within its variable range, the terminal voltage The current gains α and β are set so that the current Iout1_2 and the current Iout2_2 are equal when the relationship between VP1 and VP2 is within the range RA9. In other words, it is preferable to set the threshold value of the voltage VO4 to be inside the range RA9. If it is assumed that the conditions of the current gains α and β are α<β and only the terminal PIN1 is shorted to power, the threshold value of the voltage VO3 may be similarly set to be inside the range RA9.

Similarly, assuming that the conditions of current gains α and β are α>β and that only terminal PIN2 is shorted to power, when the value of the resistance of A/F sensor 2 is changed within its variable range. In addition, the current gains α and β are set so that the current Iout1_1 and the current Iout2_1 are equal when the relationship between the terminal voltages VP1 and VP2 is within the range RA10. In other words, it is preferable to set the threshold value of the voltage VO3 to be inside the range RA10. If it is assumed that the conditions of the current gains α and β are α<β and only the terminal PIN2 is shorted to power, the threshold value of the voltage VO4 may be similarly set to be inside the range RA10.
Thereby, even if only the terminal PIN1 or only the terminal PIN2 is shorted to power, the short-to-power state can be determined.

(Third embodiment)
10 and 11 show explanatory diagrams of the third embodiment. In this embodiment, various application examples will be described. The overvoltage detection section 12 described in the above embodiment may be applied to the integrated circuit device 52 of the current detection amplifier 51 illustrated in FIG. At this time, it is preferable to connect the overvoltage detection section 12 to the input terminals PIN4 and PIN5 of the integrated circuit device 52.

The circuit illustrated in FIG. 10 is configured by connecting a current detection resistor 317 with a predetermined impedance between loads 302a and 302b to which power supply voltage VDD is applied. The current detection amplifier 51 detects the current flowing through the current detection resistor 317 through a pair of terminals PIN4 and PIN5.

A current detection resistor 317 is connected between both input terminals PIN4 and PIN5 of the current detection amplifier 51. Therefore, if the voltage at one terminal PIN4 fluctuates, the voltage at the other terminal PIN5 also fluctuates depending on the voltage fluctuation at one terminal PIN4. As in the above-mentioned embodiment, the overvoltage detection unit 12 detects the voltage of these terminals PIN4 and PIN5 to check whether both terminals PIN4 and PIN5 are shorted to power or whether one terminal is It can be determined whether the terminal (for example, PIN4) is shorted to power, or whether both terminals PIN4 and PIN5 are shorted to power.

Further, the overvoltage detection section 12 described in the above embodiment may also be applied to an integrated circuit device 63 incorporating series regulators 61 and 62, as illustrated in FIG. At this time, it is preferable to connect the overvoltage detection section 12 to the output terminals PIN6 and PIN7 of the integrated circuit device 63. The integrated circuit device 63 illustrated in FIG. 11 has series regulators 61 and 62 that input a DC power supply Vin to generate a stabilized power supply, and output the stabilized power supply voltage from terminals PIN6 and PIN7 to capacitors 64 and 65, respectively. is configured.

The series regulator 61 configured on the input side of the DC power supply Vin is configured by combining an operational amplifier OP1, an output pass transistor M41, and resistors R41 and R42 in the illustrated form, and outputs a DC voltage through a terminal PIN6. The output pass transistor M41 is composed of a p-channel MOSFET, and has a body diode as a parasitic element between the drain and the source.

Further, the series regulator 62 configured on the output side is configured by combining an operational amplifier OP2, an output pass transistor M42, and resistors R43 and R44 in the illustrated form, and inputs the output voltage of the series regulator 61 to generate a DC voltage. Output through PIN7. The output pass transistor M42 is composed of a p-channel MOSFET, and has a body diode as a parasitic element between the drain and the source.

At this time, if the voltage at one terminal PIN7 increases for some reason, a current flows in the forward direction of the body diode through the pn junction between the drain of the output pass transistor M42 and the substrate, so the voltage at the other terminal PIN6 increases. will also rise. Therefore, when the voltage at the terminal PIN7 changes, the voltage at the terminal PIN6 also changes in accordance with the change in the voltage at the terminal PIN7.

As explained in the above embodiment, the overvoltage detection section 12 detects the voltage of both terminals PIN6 and PIN7, and as in the above embodiment, whether both terminals PIN6 and PIN7 are shorted to power or whether one terminal It can be determined whether the terminal (for example, PIN6) is shorted to power, or whether both terminals PIN6 and PIN7 are shorted to power.
Therefore, for example, when the terminal PIN6 is shorted to power supply, even if the voltage of the power supply terminal PIN6 fluctuates and the voltage of the non-power supply terminal PIN7 fluctuates to the point of overvoltage, one terminal (for example, , PIN6) are shorted to power, or both terminals PIN6 and PIN7 are shorted to power.

(Fourth embodiment)
FIG. 12 shows an explanatory diagram of the fourth embodiment. As described in the above embodiment, the overvoltage detection unit 12 is configured to determine whether one or both of the pair of terminals PIN1 and PIN2 is shorted to power. As illustrated in FIG. 12, by combining two or more configurations of the overvoltage detection units 412a to 412c, it is also possible to determine which of the three or more terminals PIN1, PIN2, and PIN3 is shorted to power. In the configuration illustrated in FIG. 12, overvoltage detection units 412a to 412c have the same configuration as overvoltage detection unit 12.

In the configuration illustrated in FIG. 12, the overvoltage detection section 412a determines whether one or both of the terminals PIN1 and PIN2 is shorted to power, and the overvoltage detection section 412b determines whether one or both of the terminals PIN2 and PIN3 is shorted to power. The overvoltage detection unit 412c determines whether either or both terminals PIN1 and PIN3 are shorted to power. Thereby, it is possible to determine with high reliability which one of the terminals PIN1 to PIN3 is shorted to power.

That is, even for a device having three or more terminals PIN1 to PIN3, it can be determined with high reliability whether at least one or more of the plurality of terminals PIN1 to PIN3 is shorted to power.

(Other embodiments)
The present invention is not limited to the above-mentioned embodiment, and for example, the following modifications or expansions are possible.
The circuits connected to the terminals PIN1, PIN2, etc. are not limited to circuits related to sensor elements such as the A/F sensor 2. In particular, it is suitable for a circuit used to detect overvoltage in order to suppress the occurrence of leakage current as much as possible.

Even if the voltage of a terminal (for example, PIN1) that is shorted to power is constant, but the voltage of other terminals, that is, non-shorted to power terminals, fluctuates to the point of overvoltage, the provision of the overvoltage detection section 12 can be similarly applied, and the overvoltage can be detected. It is possible to determine which terminal is causing the error (for example, only PIN1 or PIN1 and PIN2).

In the above-described embodiment, a configuration using a MOSFET as a transistor has been described, but the overvoltage detection section 12 may be configured using a bipolar transistor instead of a MOSFET. The overvoltage detection section 12 does not necessarily need to be configured as an IC.
In the first embodiment, the current amplification circuits 25a and 25b are provided, but the current amplification circuits 25a and 25b may be omitted if necessary.

The configuration may be configured by combining the plurality of embodiments described above. Further, the reference numerals in parentheses described in the claims indicate correspondence with the specific means described in the embodiment described above as one aspect of the present invention, and do not indicate the technical scope of the present invention. It is not limited. A mode in which a part of the above embodiment is omitted as long as the problem can be solved can also be regarded as an embodiment. In addition, all possible aspects can be regarded as embodiments as long as they do not depart from the essence of the invention as specified by the words set forth in the claims.

Although the present invention has been described based on the embodiments described above, it is understood that the present invention is not limited to the embodiments or structures. The present invention also includes various modifications and equivalent modifications. In addition, various combinations and configurations, as well as other combinations and configurations that include one, more, or fewer elements, fall within the scope and spirit of the present invention.

In the drawing, 12 is an overvoltage detection section (overvoltage judgment circuit), 21 and 22 are voltage-current conversion circuits, 23 and 24 are current absolute value comparison circuits, 26, 2261, and 2262 are current relative value comparison circuits, and 28 and 228 are current comparison circuits. A fault terminal determination section is shown.

Claims (6)

When at least one of multiple terminals is shorted to power, the voltage of the terminal that has shorted to power (hereinafter referred to as the power shorted terminal) fluctuates and the voltage of other non-power-faulted terminals reaches overvoltage, or An overvoltage determination circuit for determining the power supply terminal when the voltage at the power supply terminal is constant but the voltage at other non-power supply terminals fluctuates to reach an overvoltage, the circuit comprising:
a pair of voltage-current conversion circuits (21:22) that converts the voltages of two terminals among the plurality of terminals into currents, respectively;
a pair of current absolute value comparison circuits (23:24) that absolutely compare the converted currents of the pair of voltage-current conversion circuits with a reference current, respectively;
a current relative value comparison circuit (26; 2261, 2262) that relatively compares the converted currents of the pair of voltage-current conversion circuits;
a ground fault terminal determination unit ( 28; 228) and
An overvoltage determination circuit equipped with. The pair of voltage-current conversion circuits (21:22) each include:
A first current mirror circuit (31:41) consisting of a first mirror transistor pair (M1, M3: M7, M9) and a source terminal or emitter connected in series to the first mirror transistor pair of the first current mirror circuit and connected to the ground side. a second current mirror circuit (32:42) including a second mirror transistor pair (M2, M4: M8, M10) whose terminals are connected ; The source terminal or emitter terminal of one transistor (M1:M7) is connected to each of the two terminals (PIN1:PIN2) through a resistor (R1:R2), and the other second transistor of the first mirror transistor pair The voltage applied to the source terminal or emitter terminal of is a predetermined voltage (VDD),
The pair of current absolute value comparison circuits (23:24) each have
A current source (33:43) that generates the reference current; a third transistor (M5:M11) connected in series to the current source and mirror-connected to the first current mirror circuit ; configured to absolutely compare the current flowing through the three transistors (M5:M11) with the reference current,
The current relative value comparison circuit (26)
The overvoltage determination circuit according to claim 1, wherein currents flowing through fourth transistors (M6:M14) mirror-connected to the first current mirror circuit (31:41) of the pair of voltage-current conversion circuits are subtracted and compared. When one terminal (PIN1) and the other terminal (PIN2) connected to both sides of the sensor element (2) are applied as the two terminals among the plurality of terminals,
The current relative value comparison circuit includes a first relative current value comparison circuit (2261) and a second relative current value comparison circuit (2262),
When the first relative current value comparison circuit and the second relative current value comparison circuit respectively relatively compare the converted currents of the pair of voltage-current conversion circuits, the gains of the converted currents of the pair of voltage-current conversion circuits are mutually compared. By swapping and performing relative comparisons, different comparison results are output,
The short-to-ground terminal determination section determines whether the one of the current absolute value comparison circuits is the one based on the comparison results of the pair of current absolute value comparison circuits, the comparison result of the first current relative value comparison circuit, and the comparison result of the second current relative value comparison circuit. 2. The overvoltage determination circuit according to claim 1, which determines whether one of the terminal and the other terminal has shorted to power, or whether both the one terminal and the other terminal have shorted to power. The pair of voltage-current conversion circuits each include:
A first current mirror circuit (31:41) consisting of a first mirror transistor pair (M1, M3: M7, M9) and a source terminal or emitter connected in series to the first mirror transistor pair of the first current mirror circuit and connected to the ground side. a second current mirror circuit (32:42) including a second pair of mirror transistors whose terminals are connected; a source of one first transistor (M1:M7) of the first pair of mirror transistors of the first current mirror circuit; The one terminal and the other terminal (PIN1: PIN2) are respectively connected to the terminal or emitter terminal through a resistor (R1:R2), and the source terminal or emitter terminal of the other second transistor of the first mirror transistor pair is connected to the terminal or emitter terminal. The voltage applied to is a predetermined voltage (VDD),
The pair of current absolute value comparison circuits (23:24) each have
A current source (33:43) that generates the reference current; a third transistor (M5:M11) connected in series to the current source and mirror-connected to the first current mirror circuit ; configured to absolutely compare the current flowing through the three transistors (M5:M11) with the reference current,
The first current relative value comparison circuit (2261)
The current gain of the fifth transistor (25a) mirror-connected to one of the first current mirror circuits (31) of the pair of current absolute value comparison circuits is set as the first gain, and the pair of current absolute value comparison circuits are compared. By setting the current gain of the sixth transistor (25b) mirror-connected to the other first current mirror circuit (41) in the circuit as an arbitrary second gain different from the first gain, and subtracting the currents from each other. relative comparison,
The second current relative value comparison circuit includes:
The current gain of the seventh transistor (225a) mirror-connected to one of the first current mirror circuits (31) of the pair of current absolute value comparison circuits is set as the second gain, and the current gain of the pair of current absolute values is set as the second gain. 4. A relative comparison is made by subtracting each other's currents by using the current gain of an eighth transistor (225b) mirror-connected to the other first current mirror circuit (41) as the first gain in the comparison circuit. overvoltage judgment circuit. 5. The overvoltage determination circuit according to claim 4, wherein the first gain and the second gain are set to have different absolute values. Applying the two terminals to a terminal connecting a gas concentration sensor that detects the gas concentration of the detected gas ,
The short-to-power terminal determination section (28; 228) determines whether the two terminals to which the gas concentration sensor is connected are based on the comparison results of the pair of absolute current value comparison circuits and the comparison results of the current relative value comparison circuit. The overvoltage determination circuit according to any one of claims 1 to 5 , which determines which terminal is the short-to-power terminal .

Images