JP7313381B2 - ハードウェアアクセラレーションのためのハードウェアリソースの埋込みスケジューリング - Google Patents
ハードウェアアクセラレーションのためのハードウェアリソースの埋込みスケジューリング Download PDFInfo
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- JP7313381B2 JP7313381B2 JP2020565488A JP2020565488A JP7313381B2 JP 7313381 B2 JP7313381 B2 JP 7313381B2 JP 2020565488 A JP2020565488 A JP 2020565488A JP 2020565488 A JP2020565488 A JP 2020565488A JP 7313381 B2 JP7313381 B2 JP 7313381B2
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- Prior art keywords
- command
- controller
- commands
- host processor
- integrated circuit
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2209/00—Indexing scheme relating to G06F9/00
- G06F2209/50—Indexing scheme relating to G06F9/50
- G06F2209/509—Offload
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/988,900 US10877766B2 (en) | 2018-05-24 | 2018-05-24 | Embedded scheduling of hardware resources for hardware acceleration |
| US15/988,900 | 2018-05-24 | ||
| PCT/US2019/031443 WO2019226355A1 (en) | 2018-05-24 | 2019-05-09 | Embedded scheduling of hardware resources for hardware acceleration |
Publications (4)
| Publication Number | Publication Date |
|---|---|
| JP2021525420A JP2021525420A (ja) | 2021-09-24 |
| JPWO2019226355A5 JPWO2019226355A5 (https=) | 2022-05-17 |
| JP2021525420A5 JP2021525420A5 (https=) | 2022-05-17 |
| JP7313381B2 true JP7313381B2 (ja) | 2023-07-24 |
Family
ID=66641498
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2020565488A Active JP7313381B2 (ja) | 2018-05-24 | 2019-05-09 | ハードウェアアクセラレーションのためのハードウェアリソースの埋込みスケジューリング |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US10877766B2 (https=) |
| EP (1) | EP3803588A1 (https=) |
| JP (1) | JP7313381B2 (https=) |
| KR (1) | KR102668599B1 (https=) |
| CN (1) | CN112204524B (https=) |
| WO (1) | WO2019226355A1 (https=) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10761992B2 (en) * | 2018-10-31 | 2020-09-01 | Advanced Micro Devices, Inc. | Shared loads at compute units of a processor |
| US10705993B2 (en) | 2018-11-19 | 2020-07-07 | Xilinx, Inc. | Programming and controlling compute units in an integrated circuit |
| KR102737418B1 (ko) * | 2018-12-13 | 2024-12-04 | 에스케이하이닉스 주식회사 | 데이터 처리 시스템 및 그것의 동작방법 |
| US11294992B2 (en) * | 2019-03-12 | 2022-04-05 | Xilinx, Inc. | Locking execution of cores to licensed programmable devices in a data center |
| US11443018B2 (en) * | 2019-03-12 | 2022-09-13 | Xilinx, Inc. | Locking execution of cores to licensed programmable devices in a data center |
| US11500901B2 (en) | 2019-06-28 | 2022-11-15 | Nxp B.V. | Apparatuses and methods involving synchronization using data in the data/address field of a communications protocol |
| US10996950B2 (en) * | 2019-06-28 | 2021-05-04 | Nxp B.V. | Apparatuses and methods involving selective disablement of side effects caused by accessing register sets |
| US11010323B2 (en) | 2019-06-28 | 2021-05-18 | Nxp B.V. | Apparatuses and methods involving disabling address pointers |
| US10985759B2 (en) | 2019-06-28 | 2021-04-20 | Nxp B.V. | Apparatuses and methods involving a segmented source-series terminated line driver |
| US10999097B2 (en) | 2019-06-28 | 2021-05-04 | Nxp B.V. | Apparatuses and methods involving first type of transaction registers mapped to second type of transaction addresses |
| KR102787374B1 (ko) | 2019-12-20 | 2025-03-27 | 삼성전자주식회사 | 가속기, 가속기의 동작 방법 및 가속기를 포함한 디바이스 |
| US11175957B1 (en) * | 2020-09-22 | 2021-11-16 | International Business Machines Corporation | Hardware accelerator for executing a computation task |
| CN112783506B (zh) * | 2021-01-29 | 2022-09-30 | 展讯通信(上海)有限公司 | 一种模型运行方法及相关装置 |
| US11561733B2 (en) * | 2021-02-05 | 2023-01-24 | Micron Technology, Inc. | Interrupt mode or polling mode for memory devices |
| CN113032010B (zh) * | 2021-03-12 | 2022-09-20 | 歌尔科技有限公司 | 命令的传输控制方法、终端及计算机可读存储介质 |
| CN114548389B (zh) * | 2022-01-27 | 2025-10-10 | 苏州登临科技有限公司 | 异构计算中计算单元的管理方法及相应处理器 |
| US11861010B2 (en) | 2022-02-14 | 2024-01-02 | Xilinx, Inc. | Extensible device hosted root of trust architecture for integrated circuits |
| CN114637536B (zh) * | 2022-03-25 | 2025-11-07 | 苏州登临科技有限公司 | 任务处理方法、计算协处理器、芯片及计算机设备 |
| CN115168081B (zh) * | 2022-09-08 | 2022-11-15 | 井芯微电子技术(天津)有限公司 | 转换电路和报文转换方法 |
| CN115292053B (zh) * | 2022-09-30 | 2023-01-06 | 苏州速显微电子科技有限公司 | 移动端cnn的cpu、gpu、npu统一调度方法 |
Citations (5)
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| US20130031553A1 (en) | 2011-07-29 | 2013-01-31 | International Business Machines Corporation | Hardware acceleration |
| US20130117533A1 (en) | 2010-04-27 | 2013-05-09 | Jan Hayek | Coprocessor having task sequence control |
| US20140344815A1 (en) | 2012-03-30 | 2014-11-20 | Boris Ginzburg | Context switching mechanism for a processing core having a general purpose cpu core and a tightly coupled accelerator |
| US20160098365A1 (en) | 2014-10-05 | 2016-04-07 | Amazon Technologies, Inc. | Emulated endpoint configuration |
| US20160335215A1 (en) | 2011-03-31 | 2016-11-17 | International Business Machines Corporation | Accelerator engine commands submission over an interconnect link |
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-
2018
- 2018-05-24 US US15/988,900 patent/US10877766B2/en active Active
-
2019
- 2019-05-09 EP EP19726257.9A patent/EP3803588A1/en active Pending
- 2019-05-09 CN CN201980034539.XA patent/CN112204524B/zh active Active
- 2019-05-09 JP JP2020565488A patent/JP7313381B2/ja active Active
- 2019-05-09 WO PCT/US2019/031443 patent/WO2019226355A1/en not_active Ceased
- 2019-05-09 KR KR1020207037180A patent/KR102668599B1/ko active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130117533A1 (en) | 2010-04-27 | 2013-05-09 | Jan Hayek | Coprocessor having task sequence control |
| US20160335215A1 (en) | 2011-03-31 | 2016-11-17 | International Business Machines Corporation | Accelerator engine commands submission over an interconnect link |
| US20130031553A1 (en) | 2011-07-29 | 2013-01-31 | International Business Machines Corporation | Hardware acceleration |
| US20140344815A1 (en) | 2012-03-30 | 2014-11-20 | Boris Ginzburg | Context switching mechanism for a processing core having a general purpose cpu core and a tightly coupled accelerator |
| US20160098365A1 (en) | 2014-10-05 | 2016-04-07 | Amazon Technologies, Inc. | Emulated endpoint configuration |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2019226355A1 (en) | 2019-11-28 |
| KR20210011451A (ko) | 2021-02-01 |
| JP2021525420A (ja) | 2021-09-24 |
| US20190361708A1 (en) | 2019-11-28 |
| CN112204524B (zh) | 2024-07-12 |
| KR102668599B1 (ko) | 2024-05-22 |
| US10877766B2 (en) | 2020-12-29 |
| CN112204524A (zh) | 2021-01-08 |
| EP3803588A1 (en) | 2021-04-14 |
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