JP7298553B2 - Semiconductor test equipment and semiconductor device manufacturing method - Google Patents

Description

The present disclosure relates to a semiconductor testing apparatus and a method of manufacturing a semiconductor device.

Patent Literature 1 discloses a semiconductor testing apparatus. In this semiconductor testing apparatus, a semiconductor device is placed on the surface of a cooling plate, and a laminated metal foil is provided on the surface of the semiconductor device. A pressure plate presses the semiconductor device from the surface through the laminated metal foil, and a direct current is supplied between the cooling plate and the pressure plate from the current-carrying part.

JP 2016-11862 A

When a large current is applied to a semiconductor testing apparatus such as that disclosed in Patent Document 1, if the surface of the semiconductor device and the laminated metal foil are not in close contact with each other, the current will flow locally between the semiconductor device and the laminated metal foil. Sometimes. At this time, the surface electrode of the semiconductor device is locally heated to a high temperature, and there is a possibility that deterioration of the surface electrode occurs. Therefore, the reliability of the semiconductor device may deteriorate.

The present disclosure has been made to solve the above-described problems, and an object thereof is to obtain a semiconductor test apparatus and a method of manufacturing a semiconductor device that can sufficiently adhere a semiconductor device and a cushioning material.

A semiconductor testing apparatus according to a first disclosure includes a conductive stage on which a semiconductor device is mounted, a conductive first cushioning material provided on the top surface of the semiconductor device, and a conductive stage. a pressurizing mechanism for pressurizing the first cushioning material from above in a state where the first cushioning material is provided on the upper surface of the semiconductor device; and a first temperature control unit that heats the first shock absorbing material while in contact with the first shock absorbing material while no current is flowing through the semiconductor device, wherein the first temperature control A portion cools the semiconductor device .

A semiconductor testing apparatus according to a second disclosure includes a conductive stage on which a semiconductor device is mounted, a conductive first cushioning material provided on the upper surface of the semiconductor device, and a conductive stage. a pressurizing mechanism for pressurizing the first cushioning material from above in a state where the first cushioning material is provided on the upper surface of the semiconductor device; and a second temperature control part that heats the first buffer material through the stage while being in contact with the stage, and the second temperature control part cools the semiconductor device .

A method of manufacturing a semiconductor device according to a third disclosure includes steps of mounting a semiconductor device on the upper surface of a conductive stage, providing a conductive first buffer material on the upper surface of the semiconductor device, a step of heating a material; providing the semiconductor device on the stage; providing the first buffer material on the top surface of the semiconductor device; a step of applying pressure to the first buffer material from above; and an energizing step of applying current to the semiconductor device while maintaining the state of pressure applied to the first buffer material after finishing heating the first buffer material. In the energizing step, the current is supplied while the semiconductor device is cooled by maintaining the temperature of the semiconductor device at or above the temperature immediately before the energizing step.

In the semiconductor testing apparatus and semiconductor device manufacturing method according to the first to third disclosures, the Young's modulus of the first buffer material can be reduced by heating. Therefore, the semiconductor device and the cushioning material can be brought into close contact with each other.

1 is a diagram illustrating a semiconductor testing device according to a first embodiment; FIG. It is a figure explaining the semiconductor test equipment which concerns on a comparative example. FIG. 10 is a diagram illustrating a semiconductor testing apparatus according to a modification of Embodiment 1; FIG. 10 is a diagram for explaining a semiconductor testing apparatus according to a second embodiment; FIG.

A semiconductor test apparatus and a method of manufacturing a semiconductor device according to each embodiment will be described with reference to the drawings. The same reference numerals are given to the same or corresponding components, and repetition of description may be omitted.

Embodiment 1.
FIG. 1 is a diagram illustrating a semiconductor testing apparatus 100 according to Embodiment 1. FIG.

A semiconductor testing apparatus 100 is an apparatus for testing a semiconductor device 50 . The semiconductor device 50 is, for example, a switching element. The semiconductor device 50 may be a reverse conducting insulated gate bipolar transistor (RC-IGBT). The semiconductor device 50 may be a metal-oxide semiconductor field effect transistor (MOSFET), a PN diode, or a PIN diode.

A semiconductor testing apparatus 100 includes a stage 10 . The stage 10 is conductive, and a semiconductor device 50 is mounted on its upper surface. The upper surface of the stage 10 and the back surface electrode 50a of the semiconductor device 50 are in contact and electrically connected.

A first buffer material 31 is provided on the upper surface of the semiconductor device 50 . The first buffer material 31 is conductive. The first cushioning material 31 is, for example, aluminum foil. The first buffer material 31 and the upper surface electrode 50b of the semiconductor device 50 are in contact and electrically connected.

A plurality of shafts 12 are provided on the upper surface of the stage 10 . A plurality of shafts 12 are provided on both sides of the position where the semiconductor device 50 is mounted. Each of the plurality of shafts 12 is columnar and extends upward from the upper surface of the stage 10 .

A pressure mechanism 18 is provided above the stage 10 . The pressurizing mechanism 18 includes a holding portion 14 and a pressurizing portion 16 . The holding part 14 is plate-shaped, for example. The holding portion 14 is attached to the plurality of shafts 12 . Each of the plurality of shafts 12 passes through the holding portion 14 . The holder 14 moves up and down with respect to the shafts 12 as indicated by arrows 81 .

The pressurizing portion 16 is conductive. The pressurizing portion 16 is held by the holding portion 14 . The pressurizing part 16 is, for example, columnar. The pressurizing part 16 is provided above the first cushioning material 31 . A pressing surface 16 a , which is the lower surface of the pressing portion 16 , faces the semiconductor device 50 with the first cushioning material 31 interposed therebetween.

The pressurizing mechanism 18 moves downward by pressurizing the pressurizing part 16 from above. The pressurizing part 16 may be pressurized by, for example, a hydraulic jack. The pressure mechanism 18 can move to a position where the distance between the pressure surface 16a and the upper surface of the stage 10 is smaller than the sum of the thickness of the semiconductor device 50 and the thickness of the first cushioning material 31 when no pressure is applied. . As a result, the pressure unit 16 presses the first buffer material 31 from above while the first buffer material 31 is provided on the upper surface of the semiconductor device 50 .

The pressure mechanism 18 may have a different structure as long as it can press the first cushioning material 31 from above with the first cushioning material 31 provided on the upper surface of the semiconductor device 50 .

A conducting section 22 is connected between the pressure section 16 and the stage 10 . Current flows through the semiconductor device 50 via the stage 10 and the pressurizing mechanism 18 by energizing the conducting portion 22 while the pressurizing portion 16 and the first cushioning material 31 are in contact with each other.

The semiconductor testing apparatus 100 has a temperature adjustment section 20 . The temperature control units 20 are provided on the plurality of shafts 12 . The temperature control part 20 is ring-shaped, for example. In this embodiment, a series of temperature control units 20 are attached to a plurality of shafts 12 . The semiconductor testing apparatus 100 may include a plurality of temperature adjustment units 20 without being limited to this. The temperature adjustment part 20 extends from the side surface of the shaft 12 toward the first cushioning material 31 . The temperature control part 20 is in direct contact with the upper surface of the first buffer material 31 . The temperature adjustment unit 20 heats the first buffer material 31 while in contact with the first buffer material 31 .

The temperature adjustment unit 20 includes, for example, a resistance heating type heater. The temperature control unit 20 is not limited to this, and it is sufficient if it can heat the first buffer material 31 . The temperature control part 20 contacts both sides of the first buffer material 31 . As a result, the temperature of the first buffer material 31 rises.

Next, a method for manufacturing the semiconductor device 50 of this embodiment will be described. First, the semiconductor device 50 is mounted on the upper surface of the stage 10 . Next, a first buffer material 31 is provided on the upper surface of the semiconductor device 50 . Next, the temperature control unit 20 is brought into contact with the first buffer material 31 to heat the first buffer material 31 . Next, the pressing mechanism 18 is lowered to a position where the pressing portion 16 presses the first cushioning material 31 . As a result, the first cushioning material 31 is pressed from above while the first cushioning material 31 is heated. The heating time is, for example, 1 to 30 seconds, but may be longer. Also, the heating is carried out so that the temperature of the first buffer material 31 reaches, for example, 80.degree. C. to 200.degree.

Next, an energization step is performed. In the energizing step, after the heating of the first buffer material 31 is completed, the first buffer material 31 is maintained in a pressurized state and current is passed through the semiconductor device by the energizing part 22 . At this time, electricity is conducted between the upper surface and the rear surface of the semiconductor device 50 . The energization step may be, for example, a screening test in which a large current stress is applied to the semiconductor device 50 .

FIG. 2 is a diagram illustrating a semiconductor testing apparatus 800 according to a comparative example. A semiconductor testing apparatus 800 includes a stage 810 on which a semiconductor device 50 is mounted. A pressure unit 816 and a holding unit 814 that holds the pressure unit 816 are provided above the stage 810 . The holding part 814 is attached to a plurality of shafts 812 provided on the stage 810 . The pressurizing portion 816 faces the semiconductor device 50 .

The holding portion 814 and the pressing portion 816 move downward around the plurality of shafts 812 . Thereby, the pressurizing part 816 presses the semiconductor device 50 from above. During testing, a current flows through the semiconductor device 50 via the stage 810 and the pressure member 816 while the pressure member 816 and the semiconductor device 50 are in contact with each other.

In the semiconductor test apparatus 800 according to the comparative example, there is a possibility that the surface of the semiconductor device 50 and the pressure member 816 are not in close contact with each other. At this time, there is a possibility that a current locally flows between the semiconductor device 50 and the pressure member 816 and the surface electrode of the semiconductor device 50 becomes locally hot.

In contrast, in the present embodiment, a first buffer material 31 is provided between the semiconductor device 50 and the pressurizing portion 16 . Furthermore, the heating raises the temperature of the first cushioning material 31 and decreases the Young's modulus of the first cushioning material 31 . By applying a load to the first cushioning material 31 in this state, the first cushioning material 31 and the semiconductor device 50 can be brought into close contact with each other. Also, the pressing surface 16a and the first cushioning material 31 can be brought into close contact with each other.

As a result, local current flow between the semiconductor device 50 and the first buffer material 31 can be suppressed. Therefore, the upper surface electrode 50b of the semiconductor device 50 can be prevented from being locally heated to a high temperature, and deterioration of the upper surface electrode 50b and welding with the first buffer material 31 can be prevented. Therefore, deterioration in reliability of the semiconductor device 50 can be suppressed.

Further, in the present embodiment, the first buffer material 31 and the temperature control section 20 are in direct contact. Therefore, the first buffer material 31 can be reliably heated and the Young's modulus can be lowered.

Moreover, in the present embodiment, the heating of the first cushioning material 31 is started before the start of pressurization. As a result, the time from the start of pressurization to energization can be shortened.

Further, in this embodiment, the semiconductor device 50 and the stage 10 can be brought into close contact with each other by pressurization. Therefore, the heat can be efficiently released from the semiconductor device 50 to the stage 10, and the temperature rise of the semiconductor device 50 can be suppressed when the power is supplied. In addition, the first buffer material 31 can suppress damage to the semiconductor device 50 during pressurization. Therefore, deterioration in reliability of the semiconductor device 50 can be suppressed.

Semiconductor device 50 of the present embodiment may be a power MOSFET that causes a return current to flow through a body diode. A body diode is also called a parasitic diode. By using the body diode, it is possible to downsize or omit the freewheeling diode connected in parallel with the switching element. Therefore, the semiconductor device 50 can be miniaturized. Also, a power conversion circuit may be formed with such a power MOSFET.

Moreover, the semiconductor device 50 may be formed of a wide bandgap semiconductor. Wide bandgap semiconductors are silicon carbide, gallium nitride based materials or diamond. In general, it is effective to reduce the loss of semiconductor switching elements in order to save energy in power electronics equipment such as inverters. Losses are determined, for example, by conduction losses and switching losses of the elements. Such loss can be reduced by forming the semiconductor device 50 from a wide bandgap semiconductor.

Here, when a SiC semiconductor device is operated in a bipolar manner using p-type and n-type carriers, crystal defects may expand due to carrier recombination energy. This may increase resistance. This problem also occurs in SiC-MOSFETs in which return current is generally passed through the body diode. For this reason, an increase in loss or malfunction due to an increase in on-resistance may become a problem.

The semiconductor test apparatus 100 of the present embodiment may be an apparatus that applies a large current stress to such a SiC-MOSFET to extend crystal defects and screen them. In this case, the semiconductor testing apparatus 100 applies DC current to the chip-state body diode under conditions of, for example, 150 to 230° C. and 120 to 400 A/cm ² . Thereby, the semiconductor testing apparatus 100 expands the crystal defects to a saturated state. Screening is realized by determining the increased state of the forward resistance in this state. In this way, the reliability of the body diode can be ensured by extending the defects and evaluating the forward characteristics.

According to the semiconductor testing apparatus 100 of the present embodiment, it is possible to carry out the energization test as described above without impairing reliability. Therefore, the stability of the semiconductor device 50 can be ensured. Therefore, the reliability of the semiconductor device 50 in the market can be improved.

In this embodiment, after starting the heating of the first buffer material 31, the first buffer material 31 is pressurized while the heating is continued. It is preferable to heat the first buffer material 31 after the first buffer material 31 is mounted on the semiconductor device 50 until just before the energization. The timing of heating is not limited to this, and may be before or after pressurization. For example, after starting pressurization, heating may be started while maintaining the pressurized state. Moreover, if the temperature of the first buffer material 31 can be kept high, the pressurization may be started after the heating is completed. Alternatively, heating and pressurization may be started at the same time. In this way, it is sufficient that the first buffer material 31 can be pressurized from above while the temperature of the first buffer material 31 is higher than the temperature before heating or the room temperature. As a result, the first cushioning material 31 can be pressed while the Young's modulus is lowered, and the first cushioning material 31 and the semiconductor device 50 can be brought into close contact with each other.

Also, the Young's modulus of the first buffer material 31 at room temperature is preferably 100 GPa or less. It has been confirmed that good adhesion can be obtained by this. Also, the upper electrode 50b of the semiconductor device 50 is made of, for example, Al, Cu, or nitrides thereof. Also, the upper electrode 50b may be a laminated film using Al, Cu, or nitrides thereof, or an alloy. Good adhesion to the first buffer material 31 can be obtained by using such an electrode material.

Moreover, in the semiconductor test apparatus 100, it is preferable that the test is performed by pressing once. The first cushioning material 31 is deformed according to the shape of the upper surface of the chip by pressurization. If pressure is applied once, the pressure is released, and the pressure is applied again, there is a possibility that the adhesion will be reduced due to positional displacement at the micro level. Therefore, once the pressurization of the first buffer material 31 is started, it is preferable to carry out the energization while maintaining the pressurized state.

Further, in the present embodiment, power supply to the semiconductor device 50 is started after the heating of the first buffer material 31 is completed. That is, the temperature adjustment unit 20 heats the first buffer material 31 while no current is flowing through the semiconductor device 50 . The temperature adjustment unit 20 heats the first buffer material 31 without energizing the first buffer material 31 . In general, the temperature of the semiconductor device 50 rises during energization. By ending the heating before energization, it is possible to prevent the semiconductor device 50 from becoming excessively hot.

Also, the temperature adjustment unit 20 may have a function of cooling the semiconductor device 50 . In this case, in the energization step, current is passed while the semiconductor device 50 is cooled. Thereby, it is possible to adjust the temperature of the semiconductor device 50 during power supply. Further, in the energization step, the semiconductor device 50 may be cooled by maintaining the temperature of the semiconductor device 50 at or above the temperature immediately before the energization step. As a result, it is possible to prevent the semiconductor device 50 from becoming excessively hot while maintaining the Young's modulus of the first buffer material 31 lower than the room temperature.

The temperature control section 20 may be equipped with a Peltier element. Thereby, a cooling function can be realized. In addition, the stage 10 may have a cooling function regardless of the presence or absence of the cooling function of the temperature adjustment section 20 . As a result, the heat of the semiconductor device 50 can be efficiently dissipated from the back surface of the chip.

The temperature adjustment unit 20 raises the temperature by the heating function before the start of energization, and adjusts the temperature during the energization by the cooling function after the start of the energization. Also, the temperature may be increased by the temperature adjustment unit 20 before the start of the power supply, and the cooling function of the stage 10 may be used to adjust the temperature during the power supply after the start of the power supply. As a result, both good adhesion between the first buffer material 31 and the semiconductor device 50 and temperature control during energization can be achieved.

Also, the temperature adjustment part 20 may come into contact with the rear surface or the side surface of the first buffer material 31 . Also, the temperature control unit 20 may be housed in a position that does not overlap with the first cushioning material 31 in a plan view except during heating. This prevents the temperature control unit 20 from interfering with the mounting of the semiconductor device 50 and the first buffer material 31 .

FIG. 3 is a diagram illustrating a semiconductor testing apparatus 200 according to a modification of the first embodiment. The semiconductor test apparatus 200 is conductive and includes a second cushioning material 32 provided between the semiconductor device 50 and the stage 10 . The semiconductor testing apparatus 200 also includes a third buffer material 33 that is conductive and provided on the first buffer material 31 . The pressure mechanism 18 presses the third cushioning material 33 from above in a state in which the first cushioning material 31 is provided on the upper surface of the semiconductor device 50 and the third cushioning material 33 is provided on the first cushioning material 31 . pressure. The first buffer material 31 and the second buffer material 32 are, for example, aluminum foil. The third buffer material 33 is, for example, a copper plate.

With such a configuration, it is possible to further suppress damage to the semiconductor device 50 during pressurization. Also, the thermal resistance between the back surface of the semiconductor device 50 and the stage 10 can be reduced. Therefore, it is possible to efficiently cool the semiconductor device 50 that is being energized. Only one of the second cushioning material 32 and the third cushioning material 33 may be provided.

These modifications can be appropriately applied to the semiconductor testing apparatus and the semiconductor device manufacturing method according to the following embodiments. A semiconductor testing apparatus and a method of manufacturing a semiconductor device according to the following embodiments have many points in common with the first embodiment, and thus differences from the first embodiment will be mainly described.

Embodiment 2.
FIG. 4 is a diagram illustrating a semiconductor testing apparatus 300 according to the second embodiment. Semiconductor testing apparatus 300 differs from the first embodiment in the position of temperature adjusting section 320 . A temperature adjustment unit 320 is provided below the stage 10 . The temperature adjuster 320 heats the first buffer material 31 while in contact with the stage 10 . With such a configuration, the space for arranging the temperature adjustment section 320 on the upper surface side of the stage 10 can be reduced, and the semiconductor testing apparatus 300 can be miniaturized. In particular, the plurality of shafts 12 can be arranged closer to the semiconductor device 50 than in the first embodiment.

Further, in the first embodiment, the first buffer material 31 protrudes in the horizontal direction with respect to the semiconductor device 50 in order to secure a portion in contact with the temperature control unit 20 . In this embodiment, since the first buffer material 31 does not come into contact with the temperature control unit 320, the first buffer material 31 can be made smaller. Therefore, the semiconductor testing apparatus 300 can be miniaturized.

Also, the temperature adjustment unit 320 is installed away from the pressure mechanism. For this reason, compared to a structure in which the temperature adjustment section 20 is included in the pressurizing mechanism 18, for example, the operating section of the semiconductor testing apparatus 300 can be made smaller.

Note that, in the present embodiment, the first buffer material 31 is heated by the temperature control unit 320 via the stage 10 and the semiconductor device 50 .

The temperature adjustment section 320 may be provided inside the stage 10 . As described above, the step of heating the first buffer material 31 may be performed by passing a current through a resistor provided under the stage 10 or inside the stage 10 . Thereby, the semiconductor testing apparatus 300 can be made more compact.

The arrangement of the temperature adjustment unit 320 is not limited to the above. The temperature adjustment section 320 only needs to heat the first buffer material 31 via the stage 10 .

Note that the technical features described in each embodiment may be used in combination as appropriate.

Reference Signs List 100, 200, 300 semiconductor testing device 10 stage 12 shaft 31 first buffer 32 second buffer 33 third buffer 16a pressing surface 18 pressure mechanism 20, 320 temperature control unit 22 current-carrying part

Claims (8)

a conductive stage on which a semiconductor device is mounted;
a conductive first buffer material provided on the upper surface of the semiconductor device;
a pressurizing mechanism that is conductive and presses the first buffer material from above in a state where the first buffer material is provided on the upper surface of the semiconductor device;
an energizing unit that supplies current to the semiconductor device through the stage and the pressure mechanism;
a first temperature adjustment unit that heats the first buffer material while being in contact with the first buffer material in a state where no current is flowing through the semiconductor device;
with
The semiconductor test apparatus , wherein the first temperature adjustment unit cools the semiconductor device . A plurality of shafts provided on both sides of the position where the semiconductor device is mounted,
the pressurizing mechanism is attached to a plurality of the shafts and moves up and down with respect to the plurality of shafts;
2. The semiconductor testing apparatus according to claim 1, wherein said first temperature control unit is provided on a plurality of said shafts . a conductive stage on which a semiconductor device is mounted;
a conductive first buffer material provided on the upper surface of the semiconductor device;
a pressurizing mechanism that is conductive and presses the first buffer material from above in a state where the first buffer material is provided on the upper surface of the semiconductor device;
an energizing unit that supplies current to the semiconductor device through the stage and the pressure mechanism;
a second temperature control unit that heats the first buffer material via the stage while being in contact with the stage;
with
The semiconductor testing apparatus , wherein the second temperature control unit cools the semiconductor device . 4. The semiconductor testing apparatus according to any one of claims 1 to 3 , further comprising a second buffer material which is conductive and provided between said semiconductor device and said stage. A third buffer material that is conductive and provided on the first buffer material,
The pressure mechanism presses the third cushioning material from above in a state in which the first cushioning material is provided on the upper surface of the semiconductor device and the third cushioning material is provided on the first cushioning material. 5. The semiconductor testing apparatus according to any one of claims 1 to 4 , characterized by: 6. The semiconductor testing apparatus according to claim 1, wherein Young's modulus of said first buffer material at room temperature is 100 GPa or less. a step of mounting a semiconductor device on the upper surface of a conductive stage;
providing a conductive first buffer material on the upper surface of the semiconductor device;
a step of heating the first buffer material;
The semiconductor device is provided on the stage, the first buffer material is provided on an upper surface of the semiconductor device, and the first buffer material is heated from above while the temperature of the first buffer material is higher than before heating. a step of pressing;
an energizing step of applying current to the semiconductor device while maintaining the state of pressurizing the first buffer material after finishing heating the first buffer material;
with
A method of manufacturing a semiconductor device, wherein, in the energizing step, a current is supplied while the semiconductor device is cooled by maintaining a temperature of the semiconductor device equal to or higher than a temperature immediately before the energizing step. 8. The step of heating the first buffer material is a step of heating the first buffer material by applying a current to a resistor provided under the stage or inside the stage. A method of manufacturing the semiconductor device according to 1.

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