JP7292155B2 - semiconductor equipment - Google Patents

semiconductor equipment Download PDF

Info

Publication number
JP7292155B2
JP7292155B2 JP2019155452A JP2019155452A JP7292155B2 JP 7292155 B2 JP7292155 B2 JP 7292155B2 JP 2019155452 A JP2019155452 A JP 2019155452A JP 2019155452 A JP2019155452 A JP 2019155452A JP 7292155 B2 JP7292155 B2 JP 7292155B2
Authority
JP
Japan
Prior art keywords
electrode
insulating resin
metal plate
semiconductor element
intermediate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2019155452A
Other languages
Japanese (ja)
Other versions
JP2021034638A (en
Inventor
貴夫 三井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2019155452A priority Critical patent/JP7292155B2/en
Publication of JP2021034638A publication Critical patent/JP2021034638A/en
Priority to JP2023092799A priority patent/JP2023101835A/en
Application granted granted Critical
Publication of JP7292155B2 publication Critical patent/JP7292155B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73221—Strap and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Inverter Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

この発明は、第１電極、中間電極および第２電極を備えた半導体装置に関する。 The present invention relates to a semiconductor device having a first electrode, an intermediate electrode and a second electrode.

従来、第１金属板と、第１半導体素子と、第２金属板と、第２半導体素子と、第１電極と、中間電極と、第２電極と、絶縁性樹脂部とを備えた半導体装置が知られている。第１半導体素子は、第１金属板に設けられている。第２半導体素子は、第２金属板に設けられている。第１電極は、第１金属板に接続されている。中間電極は、第１半導体素子の表面と第２金属板に接続されている。第２電極は、第２半導体素子の表面に接続されている。絶縁性樹脂部は、第１金属板、第１半導体素子、第２金属板、第２半導体素子、第１電極、中間電極および第２電極に渡って設けられている。第２電極および中間電極は、互いに対向する部分を有している。互いに対向する第２電極の一部と中間電極の一部との間の距離が短くなることによって、半導体装置の配線のインダクタンスが低減される（例えば、特許文献１参照）。 Conventionally, a semiconductor device including a first metal plate, a first semiconductor element, a second metal plate, a second semiconductor element, a first electrode, an intermediate electrode, a second electrode, and an insulating resin portion It has been known. The first semiconductor element is provided on the first metal plate. The second semiconductor element is provided on the second metal plate. The first electrode is connected to the first metal plate. The intermediate electrode is connected to the surface of the first semiconductor element and the second metal plate. The second electrode is connected to the surface of the second semiconductor element. The insulating resin portion is provided over the first metal plate, the first semiconductor element, the second metal plate, the second semiconductor element, the first electrode, the intermediate electrode and the second electrode. The second electrode and the intermediate electrode have portions facing each other. By shortening the distance between the part of the second electrode and the part of the intermediate electrode that face each other, the inductance of the wiring of the semiconductor device is reduced (see, for example, Patent Document 1).

特許第５９２４１６４号公報Japanese Patent No. 5924164

しかしながら、互いに対向する第２電極の一部と中間電極の一部との間の距離が短くなることによって、互いに対向する第２電極の一部と中間電極の一部との間の領域への樹脂の注入が難しくなる。これにより、互いに対向する第２電極の一部と中間電極の一部との間の全領域に渡って絶縁性樹脂部を配置することが難しくなる。その結果、第２電極と中間電極との間の絶縁性能が低下するという課題があった。 However, by shortening the distance between the part of the second electrode and the part of the intermediate electrode that face each other, the area between the part of the second electrode and the part of the intermediate electrode that face each other Injection of resin becomes difficult. This makes it difficult to dispose the insulating resin portion over the entire region between a portion of the second electrode and a portion of the intermediate electrode that face each other. As a result, there is a problem that the insulating performance between the second electrode and the intermediate electrode is deteriorated.

この発明は、上述のような課題を解決するためになされたものであり、その目的は、半導体装置の配線のインダクタンスを低減させるとともに、第２電極と中間電極との間の絶縁性能を向上させることができる半導体装置を提供するものである。 SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and an object of the present invention is to reduce the wiring inductance of a semiconductor device and to improve insulation performance between a second electrode and an intermediate electrode. It is an object of the present invention to provide a semiconductor device capable of

この発明に係る半導体装置は、第１金属板と、第１金属板に設けられた第１半導体素子と、第１金属板から離れて設けられた第２金属板と、第２金属板に設けられた第２半導体素子と、第１金属板に接続された第１電極と、第１半導体素子の表面と第２金属板とに接続された中間電極と、第２半導体素子の表面に接続された第２電極と、第１金属板、第１半導体素子、第２金属板、第２半導体素子、第１電極、中間電極および第２電極に渡って設けられ、第１電極の一部、中間電極および第２電極の一部を覆う絶縁性樹脂部とを備え、絶縁性樹脂部に覆われた第２電極の部分である第２電極樹脂被覆部は、絶縁性樹脂部の高さ方向について中間電極から離れて設けられ、中間電極に対向する第２電極対向部を有し、第２電極対向部は、中間電極よりも絶縁性樹脂部の表面の近くに配置され、第２電極対向部と絶縁性樹脂部の表面との間の最短距離は、中間電極と第２電極対向部との間の最短距離よりも小さく、中間電極は、第２電極対向部に対向する中間電極対向部と、絶縁性樹脂部の幅方向について中間電極対向部から突出する中間電極突出部とを有している。
この発明に係る半導体装置は、第１金属板と、第１金属板に設けられた第１半導体素子と、第１金属板から離れて設けられた第２金属板と、第２金属板に設けられた第２半導体素子と、第１金属板に接続された第１電極と、第１半導体素子の表面と第２金属板とに接続された中間電極と、第２半導体素子の表面に接続された第２電極と、第１金属板、第１半導体素子、第２金属板、第２半導体素子、第１電極、中間電極および第２電極に渡って設けられ、第１電極の一部、中間電極および第２電極の一部を覆う絶縁性樹脂部とを備え、絶縁性樹脂部に覆われた第２電極の部分である第２電極樹脂被覆部は、絶縁性樹脂部の高さ方向について中間電極から離れて設けられ、中間電極に対向する第２電極対向部を有し、第２電極対向部は、中間電極よりも絶縁性樹脂部の表面の近くに配置され、第２電極対向部と絶縁性樹脂部の表面との間の最短距離は、中間電極と第２電極対向部との間の最短距離よりも小さく、絶縁性樹脂部を構成する絶縁性樹脂が供給される流入口の跡が絶縁性樹脂部に形成されており、流入口の跡は、第２金属板よりも第１金属板の近くに配置されている。
この発明に係る半導体装置は、第１金属板と、第１金属板に設けられた第１半導体素子と、第１金属板から離れて設けられた第２金属板と、第２金属板に設けられた第２半導体素子と、第１金属板に接続された第１電極と、第１半導体素子の表面と第２金属板とに接続された中間電極と、第２半導体素子の表面に接続された第２電極と、第１金属板、第１半導体素子、第２金属板、第２半導体素子、第１電極、中間電極および第２電極に渡って設けられ、第１電極の一部、中間電極および第２電極の一部を覆う絶縁性樹脂部とを備え、絶縁性樹脂部に覆われた第２電極の部分である第２電極樹脂被覆部は、絶縁性樹脂部の高さ方向について中間電極から離れて設けられ、中間電極に対向する第２電極対向部を有し、第２電極対向部は、中間電極よりも絶縁性樹脂部の表面の近くに配置され、第２電極対向部と絶縁性樹脂部の表面との間の最短距離は、中間電極と第２電極対向部との間の最短距離よりも小さく、第２電極対向部は、第２電極対向部本体と、絶縁性樹脂部の幅方向についての第２電極対向部本体の端部から絶縁性樹脂部の表面に向かって突出する第２電極突出部とを有している。
この発明に係る半導体装置は、第１金属板と、第１金属板に設けられた第１半導体素子と、第１金属板から離れて設けられた第２金属板と、第２金属板に設けられた第２半導体素子と、第１金属板に接続された第１電極と、第１半導体素子の表面と第２金属板とに接続された中間電極と、第２半導体素子の表面に接続された第２電極と、第１金属板、第１半導体素子、第２金属板、第２半導体素子、第１電極、中間電極および第２電極に渡って設けられ、第１電極の一部、中間電極および第２電極の一部を覆う絶縁性樹脂部とを備え、絶縁性樹脂部に覆われた第２電極の部分である第２電極樹脂被覆部は、絶縁性樹脂部の高さ方向について中間電極から離れて設けられ、中間電極に対向する第２電極対向部を有し、第２電極対向部は、中間電極よりも絶縁性樹脂部の表面の近くに配置され、第２電極対向部と絶縁性樹脂部の表面との間の最短距離は、中間電極と第２電極対向部との間の最短距離よりも小さく、第２電極対向部は、第２電極対向部本体と、絶縁性樹脂部の幅方向についての第２電極対向部本体の端部と絶縁性樹脂部の表面との間に設けられたブロックとを有している。 A semiconductor device according to the present invention includes a first metal plate, a first semiconductor element provided on the first metal plate, a second metal plate provided apart from the first metal plate, and a semiconductor element provided on the second metal plate. a first electrode connected to the first metal plate; an intermediate electrode connected to the surface of the first semiconductor element and the second metal plate; and a surface connected to the second semiconductor element. provided over the second electrode, the first metal plate, the first semiconductor element, the second metal plate, the second semiconductor element, the first electrode, the intermediate electrode, and the second electrode; The second electrode resin covering portion, which is a portion of the second electrode covered with the insulating resin portion, is provided with an insulating resin portion that covers a portion of the electrode and the second electrode, and the second electrode resin covering portion is arranged in the height direction of the insulating resin portion. a second electrode facing portion provided away from the intermediate electrode and facing the intermediate electrode; the second electrode facing portion being disposed closer to the surface of the insulating resin portion than the intermediate electrode; and the surface of the insulating resin portion is smaller than the shortest distance between the intermediate electrode and the second electrode facing portion, and the intermediate electrode is located at the intermediate electrode facing portion facing the second electrode facing portion. and an intermediate electrode protruding portion protruding from the intermediate electrode facing portion in the width direction of the insulating resin portion .
A semiconductor device according to the present invention includes a first metal plate, a first semiconductor element provided on the first metal plate, a second metal plate provided apart from the first metal plate, and a semiconductor element provided on the second metal plate. a first electrode connected to the first metal plate; an intermediate electrode connected to the surface of the first semiconductor element and the second metal plate; and a surface connected to the second semiconductor element. provided over the second electrode, the first metal plate, the first semiconductor element, the second metal plate, the second semiconductor element, the first electrode, the intermediate electrode, and the second electrode; The second electrode resin covering portion, which is a portion of the second electrode covered with the insulating resin portion, is provided with an insulating resin portion that covers a portion of the electrode and the second electrode, and the second electrode resin covering portion is arranged in the height direction of the insulating resin portion. a second electrode facing portion provided away from the intermediate electrode and facing the intermediate electrode; the second electrode facing portion being disposed closer to the surface of the insulating resin portion than the intermediate electrode; and the surface of the insulating resin portion is smaller than the shortest distance between the intermediate electrode and the second electrode facing portion, and the inflow port to which the insulating resin constituting the insulating resin portion is supplied. A trace is formed in the insulating resin portion, and the trace of the inlet is located closer to the first metal plate than to the second metal plate.
A semiconductor device according to the present invention includes a first metal plate, a first semiconductor element provided on the first metal plate, a second metal plate provided apart from the first metal plate, and a semiconductor element provided on the second metal plate. a first electrode connected to the first metal plate; an intermediate electrode connected to the surface of the first semiconductor element and the second metal plate; and a surface connected to the second semiconductor element. provided over the second electrode, the first metal plate, the first semiconductor element, the second metal plate, the second semiconductor element, the first electrode, the intermediate electrode, and the second electrode; The second electrode resin covering portion, which is a portion of the second electrode covered with the insulating resin portion, is provided with an insulating resin portion that covers a portion of the electrode and the second electrode, and the second electrode resin covering portion is arranged in the height direction of the insulating resin portion. a second electrode facing portion provided away from the intermediate electrode and facing the intermediate electrode; the second electrode facing portion being disposed closer to the surface of the insulating resin portion than the intermediate electrode; and the surface of the insulating resin portion is smaller than the shortest distance between the intermediate electrode and the second electrode facing portion, and the second electrode facing portion includes the second electrode facing portion main body and the insulating and a second electrode projecting portion projecting from the end portion of the second electrode facing portion main body in the width direction of the resin portion toward the surface of the insulating resin portion.
A semiconductor device according to the present invention includes a first metal plate, a first semiconductor element provided on the first metal plate, a second metal plate provided apart from the first metal plate, and a semiconductor element provided on the second metal plate. a first electrode connected to the first metal plate; an intermediate electrode connected to the surface of the first semiconductor element and the second metal plate; and a surface connected to the second semiconductor element. provided over the second electrode, the first metal plate, the first semiconductor element, the second metal plate, the second semiconductor element, the first electrode, the intermediate electrode, and the second electrode; The second electrode resin covering portion, which is a portion of the second electrode covered with the insulating resin portion, is provided with an insulating resin portion that covers a portion of the electrode and the second electrode, and the second electrode resin covering portion is provided in the height direction of the insulating resin portion. a second electrode facing portion provided away from the intermediate electrode and facing the intermediate electrode; the second electrode facing portion being disposed closer to the surface of the insulating resin portion than the intermediate electrode; and the surface of the insulating resin portion is smaller than the shortest distance between the intermediate electrode and the second electrode facing portion, and the second electrode facing portion includes the second electrode facing portion main body and the insulating It has a block provided between the end of the second electrode facing portion main body in the width direction of the resin portion and the surface of the insulating resin portion.

この発明に係る半導体装置によれば、半導体装置の配線のインダクタンスを低減させるとともに、第２電極と中間電極との間の絶縁性能を向上させることができる。 According to the semiconductor device of the present invention, it is possible to reduce the wiring inductance of the semiconductor device and improve the insulation performance between the second electrode and the intermediate electrode.

この発明の実施の形態１に係る半導体装置を備えた３相インバータ装置を示す回路図である。1 is a circuit diagram showing a three-phase inverter device including a semiconductor device according to Embodiment 1 of the present invention; FIG. 図１の半導体装置を示す平面図である。2 is a plan view showing the semiconductor device of FIG. 1; FIG. 図２のＩＩＩ－ＩＩＩ線に沿った断面図である。FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2; 図３の第２電極対向部および中間電極対向部の間の領域の寸法と半導体装置の配線のインダクタンスとの関係を示すグラフである。4 is a graph showing the relationship between the dimension of the region between the second electrode facing portion and the intermediate electrode facing portion in FIG. 3 and the inductance of the wiring of the semiconductor device; この発明の実施の形態２に係る半導体装置を示す平面図である。It is a plan view showing a semiconductor device according to Embodiment 2 of the present invention. 図５のＶＩ－ＶＩ線に沿った断面図である。FIG. 6 is a cross-sectional view taken along line VI-VI of FIG. 5; 実施の形態２に係る半導体装置の変形例を示す平面図である。FIG. 10 is a plan view showing a modification of the semiconductor device according to the second embodiment; この発明の実施の形態３に係る半導体装置を示す断面図である。It is a cross-sectional view showing a semiconductor device according to Embodiment 3 of the present invention. 図８の半導体装置の製造工程における液体樹脂の流動方向を示す図である。FIG. 9 is a diagram showing the flow direction of liquid resin in the manufacturing process of the semiconductor device of FIG. 8; 実施の形態３に係る半導体装置の変形例を示す断面図である。FIG. 14 is a cross-sectional view showing a modification of the semiconductor device according to the third embodiment;

実施の形態１．
図１は、この発明の実施の形態１に係る半導体装置を備えた３相インバータ装置を示す回路図である。３相インバータ装置は、３つの半導体装置１を備えている。３つの半導体装置１のそれぞれは、３相インバータ装置における３つの相のそれぞれに対応している。３つの半導体装置１のそれぞれは、上アーム１１と、下アーム１２とを備えている。 Embodiment 1.
FIG. 1 is a circuit diagram showing a three-phase inverter device including a semiconductor device according to Embodiment 1 of the present invention. A three-phase inverter device includes three semiconductor devices 1 . Each of the three semiconductor devices 1 corresponds to each of the three phases in the three-phase inverter device. Each of the three semiconductor devices 1 has an upper arm 11 and a lower arm 12 .

図２は、図１の半導体装置１を示す平面図である。図３は、図２のＩＩＩ－ＩＩＩ線に沿った断面図である。半導体装置１は、第１金属板である第１銅板１０１と、第２金属板である第２銅板１０２と、第１銅板１０１に設けられた第１半導体素子１０３と、第２銅板１０２に設けられた第２半導体素子１０４とを備えている。 2 is a plan view showing the semiconductor device 1 of FIG. 1. FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2. FIG. The semiconductor device 1 includes a first copper plate 101 as a first metal plate, a second copper plate 102 as a second metal plate, a first semiconductor element 103 provided on the first copper plate 101, and a semiconductor element 103 provided on the second copper plate 102. and a second semiconductor element 104 formed thereon.

第１半導体素子１０３および第２半導体素子１０４のそれぞれは、例えば、ＭＯＳＦＥＴ（Ｍｅｔａｌ Ｏｘｉｄｅ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｆｉｅｌｄ Ｅｆｆｅｃｔ Ｔｒａｎｓｉｔｏｒ）、ＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ）などから構成されている。また、第１半導体素子１０３および第２半導体素子１０４のそれぞれは、シリコン（Ｓｉ）、シリコンカーバイド（ＳｉＣ）などから構成されている。半導体装置１は、第１半導体素子１０３および第２半導体素子１０４を１個ずつ、または、複数個ずつ備えている。この例では、半導体装置１は、第１半導体素子１０３および第２半導体素子１０４を３個ずつ備えている。図１では、ダイオードを備えた半導体装置１が示されているが、第１半導体素子１０３および第２半導体素子１０４がＩＧＢＴから構成されている場合には、半導体装置１は、ダイオードを備えなくてもよい。 Each of the first semiconductor element 103 and the second semiconductor element 104 is composed of, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), or the like. Also, each of the first semiconductor element 103 and the second semiconductor element 104 is made of silicon (Si), silicon carbide (SiC), or the like. The semiconductor device 1 includes one or more of the first semiconductor element 103 and the second semiconductor element 104 . In this example, the semiconductor device 1 includes three first semiconductor elements 103 and three second semiconductor elements 104 . Although FIG. 1 shows the semiconductor device 1 having diodes, if the first semiconductor element 103 and the second semiconductor element 104 are composed of IGBTs, the semiconductor device 1 does not have diodes. good too.

図２および図３に示すように、半導体装置１は、第１銅板１０１と第１半導体素子１０３の裏面とを互いに接合させる第１接合材１０５と、第２銅板１０２と第２半導体素子１０４の裏面とを互いに接合させる第１接合材１０６とを備えている。また、半導体装置１は、第１銅板１０１に接続された第１電極１０７と、第１半導体素子１０３の表面と第２銅板１０２とに接続された中間電極１０８とを備えている。また、半導体装置１は、第２半導体素子１０４の表面に接続された第２電極１０９と、第２銅板１０２に接続された出力配線１１０とを備えている。第１電極１０７は、図示しない外部電極に接続される。第２電極１０９は、図示しない外部電極に接続される。 As shown in FIGS. 2 and 3, the semiconductor device 1 includes a first bonding material 105 for bonding the first copper plate 101 and the back surface of the first semiconductor element 103 to each other, and the second copper plate 102 and the second semiconductor element 104. and a first bonding material 106 for bonding the back surface to each other. The semiconductor device 1 also includes a first electrode 107 connected to the first copper plate 101 and an intermediate electrode 108 connected to the surface of the first semiconductor element 103 and the second copper plate 102 . The semiconductor device 1 also includes a second electrode 109 connected to the surface of the second semiconductor element 104 and an output wiring 110 connected to the second copper plate 102 . The first electrode 107 is connected to an external electrode (not shown). The second electrode 109 is connected to an external electrode (not shown).

また、半導体装置１は、第１半導体素子１０３の表面と中間電極１０８とを互いに接合させる第２接合材１１１と、第２銅板１０２と中間電極１０８と互いに接合させる第２接合材１１２と、第２半導体素子１０４の表面と第２電極１０９とを互いに接合させる第２接合材１１３とを備えている。 The semiconductor device 1 also includes a second bonding material 111 for bonding the surface of the first semiconductor element 103 and the intermediate electrode 108 together, a second bonding material 112 for bonding the second copper plate 102 and the intermediate electrode 108 together, A second bonding material 113 is provided for bonding the surface of the two semiconductor elements 104 and the second electrode 109 to each other.

また、半導体装置１は、複数の第１制御端子１１４と、複数の第１ワイヤボンド１１５と、複数の第２制御端子１１６と、複数の第２ワイヤボンド１１７とを備えている。第１ワイヤボンド１１５は、第１半導体素子１０３の表面と第１制御端子１１４とに接続されている。第２ワイヤボンド１１７は、第２半導体素子１０４の表面と第２制御端子１１６とに接続されている。第１ワイヤボンド１１５および第２ワイヤボンド１１７のそれぞれは、アルミニウムから構成されている。第１半導体素子１０３の表面および第１制御端子１１４への第１ワイヤボンド１１５の接続、および、第２半導体素子１０４の表面および第２制御端子１１６への第２ワイヤボンド１１７の接続のそれぞれは、超音波接合によって行われる。 The semiconductor device 1 also includes a plurality of first control terminals 114 , a plurality of first wire bonds 115 , a plurality of second control terminals 116 , and a plurality of second wire bonds 117 . A first wire bond 115 is connected to the surface of the first semiconductor element 103 and the first control terminal 114 . A second wire bond 117 is connected to the surface of the second semiconductor element 104 and the second control terminal 116 . Each of first wire bond 115 and second wire bond 117 is composed of aluminum. Each of the first wirebond 115 connection to the surface of the first semiconductor device 103 and the first control terminal 114 and the second wirebond 117 connection to the surface of the second semiconductor device 104 and the second control terminal 116 are , by ultrasonic bonding.

また、半導体装置１は、絶縁性樹脂部１１８を備えている。絶縁性樹脂部１１８は、第１銅板１０１、第１半導体素子１０３、第２銅板１０２、第２半導体素子１０４、第１電極１０７、中間電極１０８および第２電極１０９に渡って設けられている。また、絶縁性樹脂部１１８は、第１電極１０７の一部、中間電極１０８の全体および第２電極１０９の一部を覆っている。また、絶縁性樹脂部１１８は、第１制御端子１１４の一部、第１ワイヤボンド１１５の全体、第２制御端子１１６の一部および第２ワイヤボンド１１７の全体を覆っている。 The semiconductor device 1 also includes an insulating resin portion 118 . Insulating resin portion 118 is provided over first copper plate 101 , first semiconductor element 103 , second copper plate 102 , second semiconductor element 104 , first electrode 107 , intermediate electrode 108 and second electrode 109 . In addition, the insulating resin portion 118 covers part of the first electrode 107 , the entire intermediate electrode 108 and part of the second electrode 109 . In addition, the insulating resin portion 118 covers part of the first control terminal 114 , the entire first wire bond 115 , the part of the second control terminal 116 and the entire second wire bond 117 .

絶縁性樹脂部１１８は、エポキシ樹脂、シリコン樹脂などから構成されている。絶縁性樹脂部１１８は、トランスファーモールドまたはインジェクションモールドによって形成される。図２では、絶縁性樹脂部１１８が形成される際に液体の絶縁性樹脂が供給される流入口２が示されている。絶縁性樹脂部１１８には、流入口２にある絶縁性樹脂部１１８が切断されたことによって形成された流入口２の跡が形成される。したがって、絶縁性樹脂部１１８に対する流入口２の跡の位置が特定可能である。図２では、流入口２は、流入口２を通る液体の絶縁性樹脂の流れが絶縁性樹脂部１１８の奥行方向Ａとなるように配置されている。なお、流入口２は、例えば、流入口２を通る液体の絶縁性樹脂の流れが絶縁性樹脂部１１８の高さ方向Ｂとなるように配置されてもよい。 The insulating resin portion 118 is made of epoxy resin, silicone resin, or the like. The insulating resin portion 118 is formed by transfer molding or injection molding. FIG. 2 shows the inlet 2 through which the liquid insulating resin is supplied when the insulating resin portion 118 is formed. The insulative resin portion 118 is formed with traces of the inflow port 2 formed by cutting the insulative resin portion 118 at the inflow port 2 . Therefore, the position of the trace of the inlet 2 with respect to the insulating resin portion 118 can be specified. In FIG. 2 , the inlet 2 is arranged so that the liquid insulating resin flows through the inlet 2 in the depth direction A of the insulating resin portion 118 . The inlet 2 may be arranged, for example, so that the liquid insulating resin flows through the inlet 2 in the height direction B of the insulating resin portion 118 .

第２電極１０９における絶縁性樹脂部１１８に覆われた部分を第２電極樹脂被覆部１１９とする。第２電極樹脂被覆部１１９は、高さ方向Ｂについて中間電極１０８から離れて設けられ、中間電極１０８に対向する第２電極対向部１２０を有している。 A portion of the second electrode 109 covered with the insulating resin portion 118 is referred to as a second electrode resin covering portion 119 . The second electrode resin coating portion 119 has a second electrode facing portion 120 that is provided away from the intermediate electrode 108 in the height direction B and faces the intermediate electrode 108 .

中間電極１０８は、第２電極対向部１２０に対向する中間電極対向部１２１と、絶縁性樹脂部１１８の幅方向Ｃについて中間電極対向部１２１から突出する中間電極突出部１２２とを有している。中間電極突出部１２２は、中間電極対向部１２１よりも幅方向Ｃについて、流入口２の近くに配置されている。言い換えれば、中間電極１０８は、第２電極１０９よりも、幅方向Ｃについて、流入口２の近くに配置されている。 The intermediate electrode 108 has an intermediate electrode facing portion 121 facing the second electrode facing portion 120 and an intermediate electrode protruding portion 122 protruding from the intermediate electrode facing portion 121 in the width direction C of the insulating resin portion 118 . . The intermediate electrode protruding portion 122 is arranged closer to the inlet 2 in the width direction C than the intermediate electrode facing portion 121 . In other words, the intermediate electrode 108 is arranged closer to the inlet 2 in the width direction C than the second electrode 109 is.

第２電極対向部１２０は、中間電極対向部１２１よりも絶縁性樹脂部１１８の表面１１８Ａの近くに配置されている。高さ方向Ｂについて、第２電極対向部１２０と絶縁性樹脂部１１８の表面１１８Ａとの間の領域ａの寸法をＬ１とする。寸法Ｌ１は、第２電極対向部１２０と絶縁性樹脂部１１８の表面１１８Ａとの間の最短距離である。高さ方向Ｂについて、中間電極対向部１２１と第２電極対向部１２０との間の領域ｂの寸法をＬ２とする。寸法Ｌ２は、中間電極対向部１２１と第２電極対向部１２０との間の最短距離である。この場合に、寸法Ｌ１は、寸法Ｌ２よりも小さい。すなわち、Ｌ１＜Ｌ２が満たされている。 The second electrode facing portion 120 is arranged closer to the surface 118A of the insulating resin portion 118 than the intermediate electrode facing portion 121 is. In the height direction B, the dimension of the region a between the second electrode facing portion 120 and the surface 118A of the insulating resin portion 118 is L1. Dimension L1 is the shortest distance between second electrode facing portion 120 and surface 118A of insulating resin portion 118 . In the height direction B, the dimension of the region b between the intermediate electrode facing portion 121 and the second electrode facing portion 120 is L2. A dimension L2 is the shortest distance between the intermediate electrode facing portion 121 and the second electrode facing portion 120 . In this case, dimension L1 is smaller than dimension L2. That is, L1<L2 is satisfied.

第１電極１０７および第２電極１０９は、互いの電気的絶縁が確保可能な距離を保った状態で配置されている。第１電極１０７における絶縁性樹脂部１１８から突出する部分である第１電極露出部１０７Ａおよび第２電極１０９における絶縁性樹脂部１１８から突出する部分である第２電極露出部１０９Ａは、幅方向Ｃに互いに隣り合うように配置されている。 The first electrode 107 and the second electrode 109 are arranged with a distance that ensures electrical insulation from each other. A first electrode exposure portion 107A, which is a portion of the first electrode 107 protruding from the insulating resin portion 118, and a second electrode exposure portion 109A, which is a portion of the second electrode 109 protruding from the insulating resin portion 118, extend in the width direction C are arranged next to each other.

第１銅板１０１および第２銅板１０２は、幅方向Ｃについて、互いに隣り合うように配置されている。第１銅板１０１は、第２銅板１０２よりも幅方向Ｃについて、流入口２の近くに配置されている。言い換えれば、流入口２の跡は、第２銅板１０２よりも第１銅板１０１の近くに配置されている。 The first copper plate 101 and the second copper plate 102 are arranged adjacent to each other in the width direction C. As shown in FIG. The first copper plate 101 is arranged closer to the inlet 2 in the width direction C than the second copper plate 102 is. In other words, the trace of the inlet 2 is arranged closer to the first copper plate 101 than to the second copper plate 102 .

出力配線１１０には、図示しないモータが接続される。出力配線１１０は、第１電極露出部１０７Ａおよび第２電極露出部１０９Ａに対して、奥行方向Ａについて、互いに反対方向に絶縁性樹脂部１１８から延びている。 A motor (not shown) is connected to the output wiring 110 . The output wiring 110 extends from the insulating resin portion 118 in opposite directions with respect to the depth direction A with respect to the first electrode exposure portion 107A and the second electrode exposure portion 109A.

第１銅板１０１および第２銅板１０２は、絶縁物を介して互いに固定されてもよい。第１銅板１０１および第２銅板１０２のそれぞれは、例えば、絶縁シートに銅板が張り付けられたもの、絶縁物の銅パターンが設けられた絶縁基板などであってもよい。 The first copper plate 101 and the second copper plate 102 may be fixed to each other via an insulator. Each of the first copper plate 101 and the second copper plate 102 may be, for example, a copper plate attached to an insulating sheet, or an insulating substrate provided with an insulating copper pattern.

絶縁性樹脂部１１８の表面１１８Ａに対して垂直方向に視た場合に、上アーム１１および下アーム１２を互いに接続する中間電極１０８の部分を上下アーム接続部分１２３とする。上下アーム接続部分１２３において、中間電極１０８および第２電極１０９のそれぞれの奥行方向Ａの寸法が一致する場合に、半導体装置１における配線のインダクタンスが最も低減される。 A portion of the intermediate electrode 108 that connects the upper arm 11 and the lower arm 12 to each other when viewed in a direction perpendicular to the surface 118A of the insulating resin portion 118 is referred to as an upper and lower arm connection portion 123 . Inductance of wiring in semiconductor device 1 is most reduced when intermediate electrode 108 and second electrode 109 have the same dimension in depth direction A at upper and lower arm connecting portion 123 .

高さ方向Ｂについて、流入口２の位置は、第２電極１０９の位置と一致している。これにより、流入口２から供給された絶縁性樹脂部１１８を構成する液体の絶縁性樹脂は、第１銅板１０１の上面よりも上方から供給される。これにより、流入口２から供給された絶縁性樹脂の流れに発生する乱れが少なくなる。少なくとも、第１銅板１０１の上面よりも高さ方向Ｂについて高い位置に流入口２が配置されることによって、流入口２から注入された絶縁性樹脂が第１銅板１０１の側面に当たることが防止される。絶縁性樹脂が第１銅板１０１の側面に当たる場合には、絶縁性樹脂の流れに乱れが発生し、絶縁性樹脂が金型の全領域に行き渡ることが難しくなる。 With respect to the height direction B, the position of the inlet 2 matches the position of the second electrode 109 . As a result, the liquid insulating resin forming the insulating resin portion 118 supplied from the inlet 2 is supplied from above the upper surface of the first copper plate 101 . As a result, turbulence generated in the flow of the insulating resin supplied from the inlet 2 is reduced. By disposing the inlet 2 at a position higher than at least the top surface of the first copper plate 101 in the height direction B, the insulating resin injected from the inlet 2 is prevented from hitting the side surface of the first copper plate 101. be. When the insulating resin hits the side surface of the first copper plate 101, the flow of the insulating resin is disturbed, making it difficult for the insulating resin to spread over the entire area of the mold.

半導体装置１の配線のインダクタンスの大きさは、自己誘導による自己インダクタンスの大きさと、相互誘導による相互インダクタンスの大きさとの和となる。自己インダクタンスは、配線の長さに依存する。相互インダクタンスは、励起磁界に依存する。したがって、半導体装置１の配線のインダクタンスを低減させるためには、配線の長さを小さくすること、および、励起磁界を打ち消すことが重要となる。 The magnitude of the wiring inductance of the semiconductor device 1 is the sum of the magnitude of the self-inductance due to self-induction and the magnitude of the mutual inductance due to mutual induction. Self-inductance depends on the length of the wiring. Mutual inductance depends on the excitation magnetic field. Therefore, in order to reduce the inductance of the wiring of the semiconductor device 1, it is important to reduce the length of the wiring and cancel the excitation magnetic field.

３相インバータ装置では、図示しない制御装置によって、第１半導体素子１０３および第２半導体素子１０４のそれぞれの通電が制御される。３相インバータ装置では、第１半導体素子１０３が通電された場合に、第２半導体素子１０４への通電が遮断される。また、３相インバータ装置では、第２半導体素子１０４が通電された場合に、第１半導体素子１０３への通電が遮断される。したがって、第１半導体素子１０３および第２半導体素子１０４には、相補に通電および通電の遮断が繰り返される。これにより、第１電極１０７および第２電極１０９には、互いに逆方向の励起磁界が発生し、第２電極１０９および中間電極１０８には、互いに逆方向の励起磁界が発生する。その結果、第１電極１０７および第２電極１０９の間と、第２電極１０９および中間電極１０８の間とにおいて、互いの励起磁界が打ち消し合う。互いの励起磁界が打ち消しあうことによって、半導体装置１の配線の相互インダクタンスが低減される。その結果、半導体装置１の配線のインダクタンスが低減される。 In the three-phase inverter device, energization of each of first semiconductor element 103 and second semiconductor element 104 is controlled by a control device (not shown). In the three-phase inverter device, when the first semiconductor element 103 is energized, the energization to the second semiconductor element 104 is interrupted. Further, in the three-phase inverter device, when the second semiconductor element 104 is energized, the energization to the first semiconductor element 103 is interrupted. Therefore, first semiconductor element 103 and second semiconductor element 104 are repeatedly energized and energized in a complementary fashion. As a result, excitation magnetic fields in opposite directions are generated in the first electrode 107 and the second electrode 109 , and excitation magnetic fields in opposite directions are generated in the second electrode 109 and the intermediate electrode 108 . As a result, the excitation magnetic fields cancel each other between the first electrode 107 and the second electrode 109 and between the second electrode 109 and the intermediate electrode 108 . The mutual inductance of the wiring of the semiconductor device 1 is reduced by canceling out the mutual excitation magnetic fields. As a result, the wiring inductance of the semiconductor device 1 is reduced.

しかしながら、第２電極１０９および中間電極１０８における互いに対向する部分の間には、電気的絶縁が必要である。言い換えれば、第２電極対向部１２０と中間電極対向部１２１との間には、電気的絶縁が必要である。車載用の電力変換装置では、第２電極１０９および中間電極１０８における互いに対向する部分の間では、最大１．２ｋＶ程度の電圧に耐えられる電気的絶縁が必要である。 However, electrical isolation is required between the opposing portions of the second electrode 109 and the intermediate electrode 108 . In other words, electrical insulation is required between the second electrode facing portion 120 and the intermediate electrode facing portion 121 . In a vehicle-mounted power conversion device, electrical insulation that can withstand a maximum voltage of about 1.2 kV is required between the portions of the second electrode 109 and the intermediate electrode 108 that face each other.

第２電極１０９および中間電極１０８のそれぞれには、交流電流が流れる。したがって、第２電極対向部１２０および中間電極対向部１２１の間に放電が発生する場合に、絶縁性樹脂部１１８に劣化が発生して、半導体装置１において絶縁破壊が発生する恐れがある。そのため、第２電極対向部１２０および中間電極対向部１２１の間の絶縁性樹脂部１１８の部分では、ボイドなどの欠陥が問題となる。 An alternating current flows through each of the second electrode 109 and the intermediate electrode 108 . Therefore, when a discharge occurs between the second electrode facing portion 120 and the intermediate electrode facing portion 121 , the insulating resin portion 118 may deteriorate and dielectric breakdown may occur in the semiconductor device 1 . Therefore, in the portion of the insulating resin portion 118 between the second electrode facing portion 120 and the intermediate electrode facing portion 121, defects such as voids become a problem.

第２電極対向部１２０と中間電極対向部１２１との間を確実に絶縁するために、第２電極１０９および中間電極１０８の間に絶縁紙などの絶縁物を予め挿入することが考えられる。しかしながら、熱可塑性の絶縁性樹脂によって絶縁性樹脂部１１８が成形される時に、挿入された絶縁物が第２電極１０９と中間電極１０８との間の領域からずれないように工夫する必要がある。また、挿入された絶縁物を第２電極１０９と中間電極１０８との間に配置する場合に、絶縁物の位置決めが難しい。したがって、絶縁物を第２電極１０９と中間電極１０８との間に挿入することによって、半導体装置１の生産性が悪化する。 In order to reliably insulate between the second electrode facing portion 120 and the intermediate electrode facing portion 121, it is conceivable to insert an insulating material such as insulating paper between the second electrode 109 and the intermediate electrode 108 in advance. However, when the insulating resin portion 118 is molded with the thermoplastic insulating resin, it is necessary to devise a method so that the inserted insulator does not shift from the area between the second electrode 109 and the intermediate electrode 108 . Moreover, when the inserted insulator is arranged between the second electrode 109 and the intermediate electrode 108, it is difficult to position the insulator. Therefore, inserting an insulator between the second electrode 109 and the intermediate electrode 108 deteriorates the productivity of the semiconductor device 1 .

領域ｂへの絶縁性樹脂の注入にかかる時間は、領域ｂの高さ方向Ｂの寸法Ｌ２が小さくなるほど長くなる。領域ｂへの絶縁性樹脂の注入に長時間がかかる場合には、領域ｂへ絶縁性樹脂の注入が終わる前に、第２電極１０９の上面に絶縁性樹脂の圧力が作用する場合がある。この場合に、第２電極１０９の変形が発生する。 The time required to inject the insulating resin into the region b increases as the dimension L2 in the height direction B of the region b decreases. If it takes a long time to inject the insulating resin into the region b, the pressure of the insulating resin may act on the upper surface of the second electrode 109 before finishing the injection of the insulating resin into the region b. In this case, deformation of the second electrode 109 occurs.

実施の形態１では、高さ方向Ｂについて、領域ａの寸法Ｌ１は、領域ｂの寸法Ｌ２よりも小さい。これにより、領域ａを通る絶縁性樹脂の流動抵抗は、領域ｂを通る絶縁性樹脂の流動抵抗よりも大きくなる。したがって、領域ｂに確実に絶縁性樹脂が確実に注入される。 In Embodiment 1, the dimension L1 of the region a in the height direction B is smaller than the dimension L2 of the region b. As a result, the flow resistance of the insulating resin passing through the region a is greater than the flow resistance of the insulating resin passing through the region b. Therefore, the insulating resin is reliably injected into the region b.

また、実施の形態１では、中間電極１０８が中間電極突出部１２２を有している。中間電極突出部１２２は、流入口２から注入された絶縁性樹脂を領域ｂに導く。これにより、絶縁性樹脂が領域ｂに確実に注入される。したがって、絶縁性樹脂を注入する注型工程のみによって、第２電極１０９と中間電極１０８との間の電気的絶縁を確保することができる。 Further, in Embodiment 1, intermediate electrode 108 has intermediate electrode projecting portion 122 . The intermediate electrode projecting portion 122 guides the insulating resin injected from the inlet 2 to the region b. As a result, the insulating resin is reliably injected into the region b. Therefore, electrical insulation between the second electrode 109 and the intermediate electrode 108 can be ensured only by the casting process of injecting the insulating resin.

第２電極対向部１２０および中間電極対向部１２１における互いに対向する面の面積が小さい場合には、領域ｂに絶縁性樹脂を確実に注入することができる。また、高さ方向Ｂについての領域ｂの寸法Ｌ２が大きい場合にも、領域ｂに絶縁性樹脂を確実に注入することができる。したがって、例えば、寸法Ｌ２が１ｍｍ程度である場合には、寸法Ｌ１が寸法Ｌ２よりも大きい場合であっても、領域ｂに絶縁性樹脂を確実に注入することができる。しかしながら、第２電極対向部１２０および中間電極対向部１２１における互いに対向する面の面積が同一であっても、高さ方向についての領域ｂの寸法Ｌ２が変化することによって、半導体装置１の配線のインダクタンスが変化する。 When the areas of the surfaces of the second electrode facing portion 120 and the intermediate electrode facing portion 121 facing each other are small, the insulating resin can be reliably injected into the region b. Moreover, even when the dimension L2 of the region b in the height direction B is large, the insulating resin can be reliably injected into the region b. Therefore, for example, when the dimension L2 is approximately 1 mm, the insulating resin can be reliably injected into the region b even when the dimension L1 is larger than the dimension L2. However, even if the areas of the surfaces of the second electrode facing portion 120 and the intermediate electrode facing portion 121 facing each other are the same, the dimension L2 of the region b in the height direction changes. Inductance changes.

図４は、図３の第２電極対向部１２０および中間電極対向部１２１の間の領域ｂの寸法Ｌ２と半導体装置１の配線のインダクタンスとの関係を示すグラフである。高さ方向についての領域ｂの寸法Ｌ２が小さくなるにつれて、第２電極１０９および中間電極１０８の間における互いに励起磁界を打ち消す効果が大きくなる。したがって、高さ方向についての領域ｂの寸法Ｌ２が小さくなることによって、相互インダクタンスを低減させる効果が大きくなる。その結果、半導体装置１の配線のインダクタンスを低減させることができる。 FIG. 4 is a graph showing the relationship between the dimension L2 of the region b between the second electrode facing portion 120 and the intermediate electrode facing portion 121 in FIG. 3 and the wiring inductance of the semiconductor device 1 . As the dimension L2 of the region b in the height direction becomes smaller, the effect of canceling out the excitation magnetic fields between the second electrode 109 and the intermediate electrode 108 increases. Therefore, by reducing the dimension L2 of the region b in the height direction, the effect of reducing the mutual inductance is increased. As a result, the wiring inductance of the semiconductor device 1 can be reduced.

半導体装置１の配線のインダクタンスが低減されることによって、第１半導体素子１０３および第２半導体素子１０４がスイッチングする場合に発生するサージ電圧を低くすることができる。これにより、第１半導体素子１０３および第２半導体素子１０４に発生する電力損失が低減される。その結果、第１半導体素子１０３および第２半導体素子１０４の小型化を図ることができ、または、第１半導体素子１０３および第２半導体素子１０４のサイズを維持したまま出力を大きくすることができる。 By reducing the inductance of the wiring of the semiconductor device 1, the surge voltage generated when the first semiconductor element 103 and the second semiconductor element 104 switch can be reduced. As a result, power loss occurring in the first semiconductor element 103 and the second semiconductor element 104 is reduced. As a result, first semiconductor element 103 and second semiconductor element 104 can be miniaturized, or the output can be increased while maintaining the size of first semiconductor element 103 and second semiconductor element 104 .

第１接合材１０５、１０６の融点は、第２接合材１１１、１１２、１１３の融点よりも高い。第１接合材１０５、１０６としては、例えば、Ａｇシンターが挙げられる。第１電極１０７、中間電極１０８および第２電極１０９は、一括して接合される。第１電極１０７、中間電極１０８および第２電極１０９のそれぞれが接合される時に、第１接合材１０５および第１接合材１０６が溶融する場合には、第１半導体素子１０３が第１銅板１０１から移動し、第２半導体素子１０４が第２銅板１０２から移動する可能性がある。第１半導体素子１０３が第１銅板１０１から移動し、または、第２半導体素子１０４が第２銅板１０２から移動する場合には、第１ワイヤボンド１１５または第２ワイヤボンド１１７に影響が発生する。また、第１半導体素子１０３が第１銅板１０１から移動する場合には、第２接合材１１１または中間電極１０８が第１半導体素子１０３における他の電位のパッドに接触する可能性がある。また、第２半導体素子１０４が第２銅板１０２から移動する場合には、第２接合材１１３または第２電極１０９が第２半導体素子１０４における他の電気のパッドに接触する可能性がある。これらの場合には、半導体装置１が不良となる。 The melting points of the first bonding materials 105 and 106 are higher than the melting points of the second bonding materials 111 , 112 and 113 . Examples of the first bonding materials 105 and 106 include Ag sinter. The first electrode 107, the intermediate electrode 108 and the second electrode 109 are collectively joined. If the first bonding material 105 and the first bonding material 106 melt when the first electrode 107, the intermediate electrode 108, and the second electrode 109 are respectively bonded, the first semiconductor element 103 will be separated from the first copper plate 101. movement, the second semiconductor element 104 may move from the second copper plate 102 . If the first semiconductor element 103 moves from the first copper plate 101 or the second semiconductor element 104 moves from the second copper plate 102, the first wire bond 115 or the second wire bond 117 will be affected. Also, when the first semiconductor element 103 moves from the first copper plate 101 , there is a possibility that the second bonding material 111 or the intermediate electrode 108 contacts a pad of another potential in the first semiconductor element 103 . Also, when the second semiconductor element 104 moves from the second copper plate 102 , the second bonding material 113 or the second electrode 109 may come into contact with other electrical pads on the second semiconductor element 104 . In these cases, the semiconductor device 1 becomes defective.

第１接合材１０５、１０６としてＡｇシンターのような焼結材が用いられた場合に、第１半導体素子１０３および第２半導体素子１０４のそれぞれが接合される時に、第２接合材１１１および第２接合材１１３が溶融しない。これにより、第１半導体素子１０３および第２半導体素子１０４の位置精度が向上する。第１半導体素子１０３および第２半導体素子１０４の位置精度が向上することによって、第１電極１０７、中間電極１０８および、第２電極１０９の位置ずれに裕度ができる。その結果、半導体装置１の生産性を向上させることができる。 When a sintered material such as Ag sinter is used as the first bonding materials 105 and 106, when the first semiconductor element 103 and the second semiconductor element 104 are respectively bonded, the second bonding material 111 and the second The bonding material 113 does not melt. This improves the positional accuracy of the first semiconductor element 103 and the second semiconductor element 104 . By improving the positional accuracy of the first semiconductor element 103 and the second semiconductor element 104 , there is a margin for positional deviation of the first electrode 107 , the intermediate electrode 108 and the second electrode 109 . As a result, productivity of the semiconductor device 1 can be improved.

第１銅板１０１と中間電極１０８との間の領域ｃに対しても、液体の絶縁性樹脂を確実に注入する必要がある。領域ｂに注入された絶縁性樹脂が領域ｃに注入される。したがって、高さ方向Ｂについての領域ｃの寸法Ｌ３が、例えば、０．１ｍｍを下回る寸法でない場合には、領域ｃに絶縁性樹脂が確実に注入される。 It is also necessary to reliably inject the liquid insulating resin into the area c between the first copper plate 101 and the intermediate electrode 108 . The insulating resin injected into the region b is injected into the region c. Therefore, if the dimension L3 of the region c in the height direction B is not, for example, less than 0.1 mm, the insulating resin is reliably injected into the region c.

高さ方向Ｂについての領域ｃの寸法Ｌ３が１ｍｍを超える場合には、領域ｃに絶縁性樹脂がより確実に注入される。しかしながら、第１銅板１０１と中間電極１０８との間においても、互いに打ち消すような励起磁界が発生する。したがって、寸法Ｌ３が大きくなることによって、第１銅板１０１および中間電極１０８の間における配線のインダクタンスが増加する。また、寸法Ｌ３が大きくなることによって、半導体装置１の全体が大きくなり、また、絶縁性樹脂部１１８に用いられる絶縁性樹脂の量が多くなる。 When the dimension L3 of the region c in the height direction B exceeds 1 mm, the insulating resin is more reliably injected into the region c. However, even between the first copper plate 101 and the intermediate electrode 108, an excitation magnetic field that cancels each other is generated. Therefore, the inductance of the wiring between the first copper plate 101 and the intermediate electrode 108 increases as the dimension L3 increases. In addition, as the dimension L3 increases, the overall size of the semiconductor device 1 increases, and the amount of insulating resin used for the insulating resin portion 118 increases.

半導体装置１について実際の設計では、第１半導体素子１０３の周囲の領域であって絶縁を確保する領域の大きさ、または、必要な信頼性を満たすための第２接合材１１１の高さ方向Ｂの寸法によって、領域ｃの寸法Ｌ３が決定される。なお、絶縁性樹脂が円滑に注入されるように、第１電極１０７、中間電極１０８および第２電極１０９のそれぞれの適所に貫通孔が形成されてもよい。 In the actual design of the semiconductor device 1, the size of the region surrounding the first semiconductor element 103 to ensure insulation, or the height direction B of the second bonding material 111 to satisfy the required reliability. determines the dimension L3 of the region c. A through hole may be formed in each of the first electrode 107, the intermediate electrode 108 and the second electrode 109 so that the insulating resin can be smoothly injected.

流入口２は、幅方向Ｃについて第２銅板１０２よりも第１銅板１０１の近くに配置されている。流入口２が幅方向Ｃについて第１銅板１０１よりも第２銅板１０２の近くに配置された場合には、第２電極１０９および中間電極１０８は、流入口２から注入された絶縁性樹脂の流れを妨げる。これにより、絶縁性樹脂が流入口２から第２電極１０９および中間電極１０８に到達した時に、第２電極１０９および中間電極１０８よりも下流において、絶縁性樹脂の流れに淀みが発生する。その結果、領域ｂおよび領域ｃへ絶縁性樹脂が注入されにくくなる。 The inlet 2 is arranged closer to the first copper plate 101 than the second copper plate 102 in the width direction C. As shown in FIG. When the inlet 2 is arranged closer to the second copper plate 102 than the first copper plate 101 in the width direction C, the second electrode 109 and the intermediate electrode 108 are arranged so that the insulating resin injected from the inlet 2 flows. hinder As a result, when the insulating resin reaches the second electrode 109 and the intermediate electrode 108 from the inlet 2 , stagnation occurs in the flow of the insulating resin downstream of the second electrode 109 and the intermediate electrode 108 . As a result, it becomes difficult to inject the insulating resin into the regions b and c.

以上説明したように、この発明の実施の形態１に係る半導体装置１によれば、第２電極対向部１２０は、中間電極対向部１２１よりも絶縁性樹脂部１１８の表面１１８Ａの近くに配置されている。第２電極対向部１２０と絶縁性樹脂部１１８の表面１１８Ａとの間の最短距離は、中間電極対向部１２１と第２電極対向部１２０との間の最短距離よりも小さい。これにより、半導体装置１の配線のインダクタンスを低減させるとともに、第２電極１０９と中間電極１０８との間の絶縁性能を向上させることができる。 As described above, according to the semiconductor device 1 according to the first embodiment of the present invention, the second electrode facing portion 120 is arranged closer to the surface 118A of the insulating resin portion 118 than the intermediate electrode facing portion 121 is. ing. The shortest distance between second electrode facing portion 120 and surface 118A of insulating resin portion 118 is smaller than the shortest distance between intermediate electrode facing portion 121 and second electrode facing portion 120 . Thereby, the inductance of the wiring of the semiconductor device 1 can be reduced, and the insulation performance between the second electrode 109 and the intermediate electrode 108 can be improved.

また、中間電極１０８は、中間電極対向部１２１と、幅方向Ｃについて中間電極対向部１２１から突出する中間電極突出部１２２とを有している。これにより、第２電極対向部１２０と中間電極対向部１２１との間に絶縁性樹脂をより確実に注入することができる。 Further, the intermediate electrode 108 has an intermediate electrode facing portion 121 and an intermediate electrode protruding portion 122 protruding from the intermediate electrode facing portion 121 in the width direction C. As shown in FIG. Thereby, the insulating resin can be more reliably injected between the second electrode facing portion 120 and the intermediate electrode facing portion 121 .

また、第１接合材１０５、１０６の融点は、第２接合材１１１、１１２、１１３の融点よりも高い。これにより、第１半導体素子１０３が第１銅板１０１から移動することを抑制することができ、第２半導体素子１０４が第２銅板１０２から移動することを抑制することができる。 Also, the melting points of the first bonding materials 105 and 106 are higher than the melting points of the second bonding materials 111 , 112 and 113 . As a result, first semiconductor element 103 can be prevented from moving from first copper plate 101 , and second semiconductor element 104 can be prevented from moving from second copper plate 102 .

また、流入口２の跡は、第２銅板１０２よりも第１銅板１０１の近くに配置されている。これにより、領域ｂへの絶縁性樹脂の注入を容易にすることができる。 Also, the trace of the inlet 2 is arranged closer to the first copper plate 101 than to the second copper plate 102 . This makes it easier to inject the insulating resin into the region b.

実施の形態２．
図５は、この発明の実施の形態２に係る半導体装置を示す平面図である。図６は、図５のＶＩ－ＶＩ線に沿った矢視断面図である。絶縁性樹脂部１１８の表面１１８Ａには、凹部１２４が形成されている。凹部１２４は、表面１１８Ａに対して垂直方向に視た場合に、第１ワイヤボンド１１５および第２ワイヤボンド１１７における幅方向Ｃについて外側の部分を避けるように形成されている。言い換えれば、凹部１２４は、幅方向Ｃについて表面１１８Ａにおける中間部に形成されている。この例では、第２電極対向部１２０と絶縁性樹脂部１１８の表面１１８Ａとの間の領域ａとは、第２電極対向部１２０と凹部１２４の底面１２４Ａとの間の領域ａである。高さ方向Ｂについての領域ａの寸法Ｌ１は、第２電極対向部１２０と絶縁性樹脂部１１８の表面１１８Ａとの間の最短距離である。幅方向Ｃについての凹部１２４の側面は、Ｓ字形状となることが望ましい。凹部１２４の側面がＳ字形状である場合には、幅方向Ｃについての凹部１２４の側面と底面１２４Ａとの接続部分は湾曲しており、幅方向Ｃについての凹部１２４の側面と表面１１８Ａとの接続部分は湾曲している。 Embodiment 2.
Embodiment 2 FIG. 5 is a plan view showing a semiconductor device according to Embodiment 2 of the present invention. 6 is a cross-sectional view taken along the line VI-VI of FIG. 5. FIG. A concave portion 124 is formed in the surface 118A of the insulating resin portion 118 . The concave portion 124 is formed so as to avoid the outer portions in the width direction C of the first wire bond 115 and the second wire bond 117 when viewed in the direction perpendicular to the surface 118A. In other words, the recess 124 is formed in the intermediate portion of the surface 118A in the width direction C. As shown in FIG. In this example, the region a between the second electrode facing portion 120 and the surface 118A of the insulating resin portion 118 is the region a between the second electrode facing portion 120 and the bottom surface 124A of the recess 124 . A dimension L1 of the region a in the height direction B is the shortest distance between the second electrode facing portion 120 and the surface 118A of the insulating resin portion 118. As shown in FIG. The side surface of the recess 124 in the width direction C is preferably S-shaped. When the side surface of the recess 124 is S-shaped, the connecting portion between the side surface of the recess 124 and the bottom surface 124A in the width direction C is curved, and the connection portion between the side surface of the recess 124 in the width direction C and the surface 118A is curved. The connection part is curved.

絶縁性樹脂部１１８の表面１１８Ａに凹部１２４が形成されることによって、実施の形態１と比較して、高さ方向Ｂについての領域ａの寸法Ｌ１が小さくなっている。 By forming concave portion 124 on surface 118A of insulating resin portion 118, dimension L1 of region a in height direction B is smaller than in the first embodiment.

半導体装置１における絶縁性樹脂部１１８が形成される場合に、図示しない金型に各部品がセットされて、絶縁性樹脂が金型の内部に注入され、絶縁性樹脂に圧力がかけられて成形される。したがって、半導体装置１における絶縁性樹脂部１１８から露出する部分である配線露出部と金型との間から絶縁性樹脂が漏れることを防止するために、配線露出部と金型との間をシールする必要がある。配線露出部としては、第１電極１０７、第２電極１０９、第１制御端子１１４および第２制御端子１１６のそれぞれの部分が挙げられる。トランスファーモールド成形によって絶縁性樹脂部１１８が成形される場合には、配線露出部と金型との間のシールに高い精度が必要である。 When the insulating resin portion 118 in the semiconductor device 1 is formed, each component is set in a mold (not shown), insulating resin is injected into the mold, and pressure is applied to the insulating resin for molding. be done. Therefore, in order to prevent the insulating resin from leaking from between the wiring exposed portion, which is the portion exposed from the insulating resin portion 118 in the semiconductor device 1, and the mold, a seal is provided between the wiring exposed portion and the mold. There is a need to. The wiring exposed portions include respective portions of the first electrode 107, the second electrode 109, the first control terminal 114, and the second control terminal 116. FIG. When the insulating resin portion 118 is molded by transfer molding, high precision is required for sealing between the wiring exposed portion and the mold.

配線露出部は、１枚の銅板を板金加工することによって形成されている。これにより、配線露出部と金型との間のシールの精度を向上させることができる。また、配線露出部を金型にセットする場合に、配線露出部の位置決め精度を向上させることができる。また、配線露出部が１枚の銅板から形成されることによって、部品点数を削減することができる。 The wiring exposed portion is formed by sheet metal processing a single copper plate. As a result, it is possible to improve the accuracy of sealing between the wiring exposed portion and the mold. Moreover, when setting the wiring exposure part to a metal mold|die, the positioning precision of a wiring exposure part can be improved. In addition, the number of parts can be reduced by forming the exposed wiring portion from a single copper plate.

配線露出部が１枚の銅板から構成されることによって、第１電極１０７、第２電極１０９、第１制御端子１１４および第２制御端子１１６のそれぞれは、同一平面上に配置される。また、第１電極１０７、第２電極１０９、第１制御端子１１４および第２制御端子１１６のそれぞれは、中間電極１０８よりも絶縁性樹脂部１１８の表面１１８Ａの近くに配置される。第１制御端子１１４と第１半導体素子１０３とには、第１ワイヤボンド１１５が接続され、第２制御端子１１６と第２半導体素子１０４とには、第２ワイヤボンド１１７が接続されている。第１ワイヤボンド１１５には、第１ワイヤボンド１１５と第１制御端子１１４および第１半導体素子１０３との接合部が破断することを抑制するために、ループ１１５Ａが形成されている。第２ワイヤボンド１１７には、第２ワイヤボンド１１７と第２制御端子１１６および第２半導体素子１０４との接合部が破断することを抑制するために、ループ１１７Ａが形成されている。ループ１１５Ａおよびループ１１７Ａのそれぞれにおける頂部は、第１制御端子１１４および第２制御端子１１６よりも１ｍｍ～２ｍｍ程度上方に配置される。 Since the wiring exposed portion is made of one copper plate, the first electrode 107, the second electrode 109, the first control terminal 114 and the second control terminal 116 are arranged on the same plane. First electrode 107 , second electrode 109 , first control terminal 114 and second control terminal 116 are arranged closer to surface 118 A of insulating resin portion 118 than intermediate electrode 108 . A first wire bond 115 is connected between the first control terminal 114 and the first semiconductor element 103 , and a second wire bond 117 is connected between the second control terminal 116 and the second semiconductor element 104 . A loop 115A is formed in the first wire bond 115 in order to prevent breakage of the bonding portion between the first wire bond 115 and the first control terminal 114 and the first semiconductor element 103 . A loop 117A is formed in the second wire bond 117 in order to prevent breakage of the bonding portion between the second wire bond 117 and the second control terminal 116 and the second semiconductor element 104 . The top of each of loop 115A and loop 117A is positioned above first control terminal 114 and second control terminal 116 by about 1 mm to 2 mm.

したがって、絶縁性樹脂部１１８の表面１１８Ａに凹部１２４が形成されていない場合には、第２電極対向部１２０と絶縁性樹脂部１１８の表面１１８Ａとの間の領域ａの寸法Ｌ１は、１．５ｍｍ～２ｍｍ程度となる。この場合には、第２電極対向部１２０と中間電極対向部１２１との間の領域ｂの寸法Ｌ２は、領域ｂに絶縁性樹脂が注入できる寸法でなくてはならない。 Therefore, when the recess 124 is not formed on the surface 118A of the insulating resin portion 118, the dimension L1 of the area a between the second electrode facing portion 120 and the surface 118A of the insulating resin portion 118 is 1. It becomes about 5 mm to 2 mm. In this case, the dimension L2 of the region b between the second electrode facing portion 120 and the intermediate electrode facing portion 121 must be such that the insulating resin can be injected into the region b.

絶縁性樹脂部１１８の表面１１８Ａに凹部１２４が形成されることによって、絶縁性樹脂部１１８の表面１１８Ａにおける第２電極対向部１２０に対向する部分を絶縁性樹脂部１１８の底面側に移動させることができる。これにより、第１ワイヤボンド１１５および第２ワイヤボンド１１７が表面１１８Ａから露出することなく、寸法Ｌ１を寸法Ｌ２よりも小さくすることができる。その他の構成は、実施の形態１と同様である。 By forming the concave portion 124 on the surface 118A of the insulating resin portion 118, the portion of the surface 118A of the insulating resin portion 118 that faces the second electrode facing portion 120 is moved toward the bottom surface of the insulating resin portion 118. can be done. This allows dimension L1 to be smaller than dimension L2 without exposing first wire bond 115 and second wire bond 117 from surface 118A. Other configurations are the same as those of the first embodiment.

以上説明したように、この発明の実施の形態２に係る半導体装置１によれは、幅方向Ｃについての絶縁性樹脂部１１８の表面１１８Ａの中間部には、幅方向Ｃに延びた凹部１２４が形成されている。第２電極対向部１２０は、凹部１２４に沿って配置されている。これにより、第２電極対向部１２０と絶縁性樹脂部１１８の表面１１８Ａとの間の最短距離を、中間電極対向部１２１と第２電極対向部１２０との間の最短距離よりも容易に小さくすることができる。 As described above, according to the semiconductor device 1 according to the second embodiment of the present invention, the concave portion 124 extending in the width direction C is formed in the intermediate portion of the surface 118A of the insulating resin portion 118 in the width direction C. formed. The second electrode facing portion 120 is arranged along the recess 124 . Thereby, the shortest distance between the second electrode facing portion 120 and the surface 118A of the insulating resin portion 118 is easily made smaller than the shortest distance between the intermediate electrode facing portion 121 and the second electrode facing portion 120. be able to.

なお、実施の形態２では、絶縁性樹脂部１１８の表面１１８Ａに１つの凹部１２４が形成された構成について説明した。しかしながら、絶縁性樹脂部１１８の表面１１８Ａに複数の凹部１２４が形成された構成であってもよい。図７は、実施の形態２に係る半導体装置１の変形例を示す平面図である。図７では、絶縁性樹脂部１１８の表面１１８Ａに３つの凹部１２４が形成されている。それぞれの凹部１２４は、幅方向Ｃに延びて形成されている。また、それぞれの凹部１２４は、奥行方向Ａに並べられている。絶縁性樹脂の流入方向および凹部１２４が延びる方向は、互いに垂直となっている。凹部１２４の形状および凹部１２４の数は、半導体装置１のサイズによって決められる。なお、絶縁性樹脂部１１８の表面１１８Ａに凹部１２４が形成されることによって、半導体装置１に反りが発生する場合がある。 In the second embodiment, the configuration in which one recess 124 is formed on surface 118A of insulating resin portion 118 has been described. However, a configuration in which a plurality of recesses 124 are formed on the surface 118A of the insulating resin portion 118 may be employed. FIG. 7 is a plan view showing a modification of the semiconductor device 1 according to the second embodiment. In FIG. 7 , three recesses 124 are formed on surface 118A of insulating resin portion 118 . Each recess 124 is formed extending in the width direction C. As shown in FIG. Moreover, each recessed part 124 is arranged in the depth direction A. As shown in FIG. The inflow direction of the insulating resin and the extending direction of the recess 124 are perpendicular to each other. The shape of recess 124 and the number of recesses 124 are determined by the size of semiconductor device 1 . It should be noted that warpage may occur in the semiconductor device 1 due to the formation of the concave portion 124 on the surface 118A of the insulating resin portion 118 .

実施の形態３．
図８は、この発明の実施の形態３に係る半導体装置を示す断面図である。図９は、図８の半導体装置の製造工程における液体の絶縁性樹脂の流動方向を示す図である。第２電極対向部１２０は、第２電極対向部本体１２５と、幅方向Ｃについての第２電極対向部本体１２５の端部から絶縁性樹脂部１１８の表面１１８Ａに向かって突出する第２電極突出部１２６を有している。また、第２電極対向部１２０は、奥行方向Ａについての第２電極対向部本体１２５の端部から絶縁性樹脂部１１８の表面１１８Ａに向かって突出する第２電極突出部１２７を有している。第２電極突出部１２６、１２７は、第２電極１０９を構成する金属板を折り曲げることによって形成されている。第２電極樹脂被覆部１１９が第２電極突出部１２６、１２７を有することによって、半導体装置１の製造工程における絶縁性樹脂の流動抵抗が上昇する。 Embodiment 3.
8 is a sectional view showing a semiconductor device according to Embodiment 3 of the present invention. FIG. 9 is a diagram showing the flow direction of the liquid insulating resin in the manufacturing process of the semiconductor device of FIG. The second electrode facing portion 120 includes a second electrode facing portion main body 125 and a second electrode projection protruding from the end portion of the second electrode facing portion main body 125 in the width direction C toward the surface 118A of the insulating resin portion 118. It has a portion 126 . Further, the second electrode facing portion 120 has a second electrode projecting portion 127 that projects from the end portion of the second electrode facing portion main body 125 in the depth direction A toward the surface 118A of the insulating resin portion 118. . The second electrode protrusions 126 and 127 are formed by bending a metal plate forming the second electrode 109 . Since the second electrode resin coating portion 119 has the second electrode projecting portions 126 and 127, the flow resistance of the insulating resin in the manufacturing process of the semiconductor device 1 is increased.

第２電極突出部１２６は、幅方向Ｃについての第２電極対向部本体１２５の端部から表面１１８Ａに近づく方向へ湾曲するとともに、幅方向Ｃについて第２電極対向部本体１２５から離れるようにさらに湾曲している。言い換えれば、第２電極突出部１２６は、断面Ｓ字形状に形成されている。 The second electrode projecting portion 126 curves from the end portion of the second electrode facing portion main body 125 in the width direction C toward the surface 118A, and further extends away from the second electrode facing portion main body 125 in the width direction C. curved. In other words, the second electrode protrusion 126 is formed to have an S-shaped cross section.

第２電極突出部１２７は、奥行方向Ａについての第２電極対向部本体１２５の端部から表面１１８Ａに近づく方向へ湾曲するとともに、奥行方向Ａについて第２電極対向部本体１２５から離れるようにさらに湾曲している。言い換えれば、第２電極突出部１２７は、断面Ｓ字形状に形成されている。 The second electrode projecting portion 127 is curved from the end portion of the second electrode facing portion main body 125 in the depth direction A toward the surface 118A, and further extends away from the second electrode facing portion main body 125 in the depth direction A. curved. In other words, the second electrode protrusion 127 is formed to have an S-shaped cross section.

実施の形態３では、第２電極突出部１２６、１２７と絶縁性樹脂部１１８の表面１１８Ａとの間の領域が、第２電極対向部１２０と絶縁性樹脂部１１８の表面１１８Ａとの間の領域ａとなる。第２電極突出部１２６、１２７と絶縁性樹脂部１１８の表面１１８Ａとの間の最短距離が、第２電極対向部１２０と絶縁性樹脂部１１８の表面１１８Ａとの間の最短距離となる。領域ａの寸法Ｌ１は、領域ｂの寸法Ｌ２よりも小さい。 In Embodiment 3, the region between the second electrode protrusions 126 and 127 and the surface 118A of the insulating resin portion 118 is the region between the second electrode facing portion 120 and the surface 118A of the insulating resin portion 118. becomes a. The shortest distance between second electrode projecting portions 126 and 127 and surface 118A of insulating resin portion 118 is the shortest distance between second electrode facing portion 120 and surface 118A of insulating resin portion 118 . The dimension L1 of the region a is smaller than the dimension L2 of the region b.

第２電極突出部１２６、１２７と中間電極突出部１２２とによって、液体の絶縁性樹脂が第２電極１０９と中間電極１０８との間に導かれる。これにより、第２電極１０９と中間電極１０８との間に絶縁性樹脂をより確実に注入することができる。その他の構成は、実施の形態１または実施の形態２と同様である。 The liquid insulating resin is guided between the second electrode 109 and the intermediate electrode 108 by the second electrode protrusions 126 and 127 and the intermediate electrode protrusion 122 . Thereby, the insulating resin can be more reliably injected between the second electrode 109 and the intermediate electrode 108 . Other configurations are similar to those of the first or second embodiment.

以上説明したように、この発明の実施の形態３に係る半導体装置１によれは、第２電極対向部１２０は、幅方向Ｃについての第２電極対向部本体１２５の端部から絶縁性樹脂部１１８の表面１１８Ａに向かって突出する第２電極突出部１２６を有している。これにより、絶縁性樹脂部１１８を構成する絶縁性樹脂が第２電極１０９と中間電極１０８との間に導かれる。その結果、第２電極１０９と中間電極１０８との間の電気的絶縁を確保することができる。また、実施の形態３に係る半導体装置１は、実施の形態２と比較して、半導体装置１の反りの発生を抑制することができる。 As described above, according to the semiconductor device 1 according to the third embodiment of the present invention, the second electrode facing portion 120 extends from the end portion of the second electrode facing portion main body 125 in the width direction C to the insulating resin portion. 118 has a second electrode projection 126 projecting toward the surface 118A. Thereby, the insulating resin forming the insulating resin portion 118 is guided between the second electrode 109 and the intermediate electrode 108 . As a result, electrical insulation between the second electrode 109 and the intermediate electrode 108 can be ensured. Moreover, the semiconductor device 1 according to the third embodiment can suppress the occurrence of warping of the semiconductor device 1 as compared with the second embodiment.

また、第２電極突出部１２６は、幅方向Ｃについての第２電極対向部本体１２５の端部から表面１１８Ａに近づく方向へ湾曲するとともに、幅方向Ｃについて第２電極対向部本体１２５から離れるようにさらに湾曲している。これにより、領域ｂへの絶縁性樹脂の注入を容易にすることができ、また、隙間ａに注入される絶縁性樹脂の流動抵抗を上昇させることができる。 In addition, the second electrode projecting portion 126 is curved from the end portion of the second electrode facing portion main body 125 in the width direction C toward the surface 118A and away from the second electrode facing portion main body 125 in the width direction C. is even more curved. As a result, the insulating resin can be easily injected into the region b, and the flow resistance of the insulating resin injected into the gap a can be increased.

なお、実施の形態３では、第２電極１０９を構成する金属板が折り曲げられることによって、第２電極突出部１２６、１２７が形成される構成について説明した。図１０は、実施の形態３に係る半導体装置１の変形例を示す断面図である。第２電極１０９がブロック１２８を備えることによって、液体の絶縁性樹脂の流動抵抗を上昇させる構成であってもよい。図１０では、第２電極対向部１２０は、幅方向Ｃについての第２電極対向部本体１２５の端部と絶縁性樹脂部１１８の表面１１８Ａとの間に設けられたブロック１２８を有している。これにより、絶縁性樹脂部１１８を構成する絶縁性樹脂が第２電極１０９と中間電極１０８との間に導かれる。なお、図１０に示す半導体装置１の場合、ブロック１２８を第２電極対向部本体１２５に接合する場合に、第２電極１０９に傾きが発生し易くなる。 In addition, in Embodiment 3, the configuration in which the second electrode projecting portions 126 and 127 are formed by bending the metal plate that constitutes the second electrode 109 has been described. FIG. 10 is a cross-sectional view showing a modification of the semiconductor device 1 according to the third embodiment. The block 128 may be provided in the second electrode 109 to increase the flow resistance of the liquid insulating resin. In FIG. 10, the second electrode facing portion 120 has a block 128 provided between the end portion of the second electrode facing portion main body 125 in the width direction C and the surface 118A of the insulating resin portion 118. . Thereby, the insulating resin forming the insulating resin portion 118 is guided between the second electrode 109 and the intermediate electrode 108 . In the case of the semiconductor device 1 shown in FIG. 10, when the block 128 is joined to the second electrode facing portion main body 125, the second electrode 109 is likely to be inclined.

１ 半導体装置、２ 流入口、１１ 上アーム、１２ 下アーム、１０１ 第１銅板、１０２ 第２銅板、１０３ 第１半導体素子、１０４ 第２半導体素子、１０５、１０６ 第１接合材、１０７ 第１電極、１０８ 中間電極、１０９ 第２電極、１１０ 出力配線、１１１、１１２、１１３ 第２接合材、１１４ 第１制御端子、１１５ 第１ワイヤボンド、１１５Ａ ループ、１１６ 第２制御端子、１１７ 第２ワイヤボンド、１１７Ａ ループ、１１８ 絶縁性樹脂部、１１８Ａ 表面、１１９ 第２電極樹脂被覆部、１２０ 第２電極対向部、１２１ 中間電極対向部、１２２ 中間電極突出部、１２３ 上下アーム接続部分、１２４ 凹部、１２５ 第２電極対向部本体、１２６、１２７ 第２電極突出部、１２８ ブロック。 1 semiconductor device, 2 inlet, 11 upper arm, 12 lower arm, 101 first copper plate, 102 second copper plate, 103 first semiconductor element, 104 second semiconductor element, 105, 106 first bonding material, 107 first electrode , 108 intermediate electrode, 109 second electrode, 110 output wiring, 111, 112, 113 second bonding material, 114 first control terminal, 115 first wire bond, 115A loop, 116 second control terminal, 117 second wire bond , 117A loop, 118 insulating resin portion, 118A surface, 119 second electrode resin coating portion, 120 second electrode facing portion, 121 intermediate electrode facing portion, 122 intermediate electrode projecting portion, 123 upper and lower arm connecting portion, 124 concave portion, 125 Second electrode facing portion main body, 126, 127 Second electrode projecting portion, 128 Block.

Claims (11)

第１金属板と、
前記第１金属板に設けられた第１半導体素子と、
前記第１金属板から離れて設けられた第２金属板と、
前記第２金属板に設けられた第２半導体素子と、
前記第１金属板に接続された第１電極と、
前記第１半導体素子の表面と前記第２金属板とに接続された中間電極と、
前記第２半導体素子の表面に接続された第２電極と、
前記第１金属板、前記第１半導体素子、前記第２金属板、前記第２半導体素子、前記第１電極、前記中間電極および前記第２電極に渡って設けられ、前記第１電極の一部、前記中間電極および前記第２電極の一部を覆う絶縁性樹脂部と
を備え、
前記絶縁性樹脂部に覆われた前記第２電極の部分である第２電極樹脂被覆部は、前記絶縁性樹脂部の高さ方向について前記中間電極から離れて設けられ、前記中間電極に対向する第２電極対向部を有し、
前記第２電極対向部は、前記中間電極よりも前記絶縁性樹脂部の表面の近くに配置され、
前記第２電極対向部と前記絶縁性樹脂部の表面との間の最短距離は、前記中間電極と前記第２電極対向部との間の最短距離よりも小さく、
前記中間電極は、
前記第２電極対向部に対向する中間電極対向部と、
前記絶縁性樹脂部の幅方向について前記中間電極対向部から突出する中間電極突出部と
を有している半導体装置。 a first metal plate;
a first semiconductor element provided on the first metal plate;
a second metal plate provided apart from the first metal plate;
a second semiconductor element provided on the second metal plate;
a first electrode connected to the first metal plate;
an intermediate electrode connected to the surface of the first semiconductor element and the second metal plate;
a second electrode connected to the surface of the second semiconductor element;
provided over the first metal plate, the first semiconductor element, the second metal plate, the second semiconductor element, the first electrode, the intermediate electrode and the second electrode, and a part of the first electrode , and an insulating resin portion covering part of the intermediate electrode and the second electrode,
A second electrode resin covering portion, which is a portion of the second electrode covered with the insulating resin portion, is provided away from the intermediate electrode in the height direction of the insulating resin portion and faces the intermediate electrode. having a second electrode facing portion,
the second electrode facing portion is arranged closer to the surface of the insulating resin portion than the intermediate electrode;
the shortest distance between the second electrode facing portion and the surface of the insulating resin portion is smaller than the shortest distance between the intermediate electrode and the second electrode facing portion;
The intermediate electrode is
an intermediate electrode facing portion facing the second electrode facing portion;
an intermediate electrode protruding portion protruding from the intermediate electrode facing portion in the width direction of the insulating resin portion;
A semiconductor device having 前記絶縁性樹脂部を構成する絶縁性樹脂が供給される流入口の跡が前記絶縁性樹脂部に形成されており、The insulating resin portion is formed with a trace of an inlet through which the insulating resin constituting the insulating resin portion is supplied,
前記中間電極突出部は、前記絶縁性樹脂部の幅方向について前記中間電極対向部よりも前記流入口の跡の近くに配置されている請求項１に記載の半導体装置。2. The semiconductor device according to claim 1, wherein said intermediate electrode protruding portion is arranged closer to the trace of said inlet than said intermediate electrode facing portion in the width direction of said insulating resin portion. 前記第１金属板と前記第１半導体素子とを接合し、前記第２金属板と前記第２半導体素子とを接合する第１接合材と、
前記第１半導体素子と前記中間電極とを接合し、前記第２半導体素子と前記第２電極とを接合する第２接合材と
をさらに備え、
前記第１接合材の融点は、前記第２接合材の融点よりも高い請求項１または請求項２に記載の半導体装置。 a first bonding material that bonds the first metal plate and the first semiconductor element and bonds the second metal plate and the second semiconductor element;
a second bonding material that bonds the first semiconductor element and the intermediate electrode and that bonds the second semiconductor element and the second electrode,
3. The semiconductor device according to claim 1, wherein a melting point of said first bonding material is higher than a melting point of said second bonding material. 第１金属板と、
前記第１金属板に設けられた第１半導体素子と、
前記第１金属板から離れて設けられた第２金属板と、
前記第２金属板に設けられた第２半導体素子と、
前記第１金属板に接続された第１電極と、
前記第１半導体素子の表面と前記第２金属板とに接続された中間電極と、
前記第２半導体素子の表面に接続された第２電極と、
前記第１金属板、前記第１半導体素子、前記第２金属板、前記第２半導体素子、前記第１電極、前記中間電極および前記第２電極に渡って設けられ、前記第１電極の一部、前記中間電極および前記第２電極の一部を覆う絶縁性樹脂部と
を備え、
前記絶縁性樹脂部に覆われた前記第２電極の部分である第２電極樹脂被覆部は、前記絶縁性樹脂部の高さ方向について前記中間電極から離れて設けられ、前記中間電極に対向する第２電極対向部を有し、
前記第２電極対向部は、前記中間電極よりも前記絶縁性樹脂部の表面の近くに配置され、
前記第２電極対向部と前記絶縁性樹脂部の表面との間の最短距離は、前記中間電極と前記第２電極対向部との間の最短距離よりも小さく、
前記絶縁性樹脂部を構成する絶縁性樹脂が供給される流入口の跡が前記絶縁性樹脂部に形成されており、
前記流入口の跡は、前記第２金属板よりも前記第１金属板の近くに配置されている半導体装置。 a first metal plate;
a first semiconductor element provided on the first metal plate;
a second metal plate provided apart from the first metal plate;
a second semiconductor element provided on the second metal plate;
a first electrode connected to the first metal plate;
an intermediate electrode connected to the surface of the first semiconductor element and the second metal plate;
a second electrode connected to the surface of the second semiconductor element;
provided over the first metal plate, the first semiconductor element, the second metal plate, the second semiconductor element, the first electrode, the intermediate electrode and the second electrode, and a part of the first electrode , and an insulating resin portion covering part of the intermediate electrode and the second electrode,
A second electrode resin covering portion, which is a portion of the second electrode covered with the insulating resin portion, is provided away from the intermediate electrode in the height direction of the insulating resin portion and faces the intermediate electrode. having a second electrode facing portion,
the second electrode facing portion is arranged closer to the surface of the insulating resin portion than the intermediate electrode;
the shortest distance between the second electrode facing portion and the surface of the insulating resin portion is smaller than the shortest distance between the intermediate electrode and the second electrode facing portion;
The insulating resin portion is formed with a trace of an inlet through which the insulating resin constituting the insulating resin portion is supplied,
The semiconductor device according to claim 1, wherein the trace of the inlet is arranged closer to the first metal plate than to the second metal plate . 前記絶縁性樹脂部の幅方向についての前記絶縁性樹脂部の表面の中間部には、前記幅方向に延びた凹部が形成されており、
前記第２電極対向部は、前記凹部に沿って配置されている請求項１から請求項４までの何れか一項に記載の半導体装置。 A concave portion extending in the width direction is formed in an intermediate portion of the surface of the insulating resin portion in the width direction of the insulating resin portion,
The semiconductor device according to any one of claims 1 to 4, wherein the second electrode facing portion is arranged along the recess. 前記絶縁性樹脂部の幅方向についての前記絶縁性樹脂部の表面の中間部には、前記幅方向に延びた複数の前記凹部が形成されており、
複数の前記凹部は、前記絶縁性樹脂部の奥行方向に並べられている請求項５に記載の半導体装置。 a plurality of recesses extending in the width direction are formed in an intermediate portion of the surface of the insulating resin portion in the width direction of the insulating resin portion;
6. The semiconductor device according to claim 5, wherein said plurality of concave portions are arranged in the depth direction of said insulating resin portion. 第１金属板と、
前記第１金属板に設けられた第１半導体素子と、
前記第１金属板から離れて設けられた第２金属板と、
前記第２金属板に設けられた第２半導体素子と、
前記第１金属板に接続された第１電極と、
前記第１半導体素子の表面と前記第２金属板とに接続された中間電極と、
前記第２半導体素子の表面に接続された第２電極と、
前記第１金属板、前記第１半導体素子、前記第２金属板、前記第２半導体素子、前記第１電極、前記中間電極および前記第２電極に渡って設けられ、前記第１電極の一部、前記中間電極および前記第２電極の一部を覆う絶縁性樹脂部と
を備え、
前記絶縁性樹脂部に覆われた前記第２電極の部分である第２電極樹脂被覆部は、前記絶縁性樹脂部の高さ方向について前記中間電極から離れて設けられ、前記中間電極に対向する第２電極対向部を有し、
前記第２電極対向部は、前記中間電極よりも前記絶縁性樹脂部の表面の近くに配置され、
前記第２電極対向部と前記絶縁性樹脂部の表面との間の最短距離は、前記中間電極と前記第２電極対向部との間の最短距離よりも小さく、
前記第２電極対向部は、
第２電極対向部本体と、
前記絶縁性樹脂部の幅方向についての前記第２電極対向部本体の端部から前記絶縁性樹脂部の表面に向かって突出する第２電極突出部と
を有している半導体装置。 a first metal plate;
a first semiconductor element provided on the first metal plate;
a second metal plate provided apart from the first metal plate;
a second semiconductor element provided on the second metal plate;
a first electrode connected to the first metal plate;
an intermediate electrode connected to the surface of the first semiconductor element and the second metal plate;
a second electrode connected to the surface of the second semiconductor element;
provided over the first metal plate, the first semiconductor element, the second metal plate, the second semiconductor element, the first electrode, the intermediate electrode and the second electrode, and a part of the first electrode , and an insulating resin portion covering part of the intermediate electrode and the second electrode,
A second electrode resin covering portion, which is a portion of the second electrode covered with the insulating resin portion, is provided away from the intermediate electrode in the height direction of the insulating resin portion and faces the intermediate electrode. having a second electrode facing portion,
the second electrode facing portion is arranged closer to the surface of the insulating resin portion than the intermediate electrode;
the shortest distance between the second electrode facing portion and the surface of the insulating resin portion is smaller than the shortest distance between the intermediate electrode and the second electrode facing portion;
The second electrode facing portion is
a second electrode facing portion main body;
a second electrode projecting portion projecting toward the surface of the insulating resin portion from an end portion of the second electrode facing portion main body in the width direction of the insulating resin portion;
A semiconductor device having 前記第２電極突出部は、前記幅方向についての前記第２電極対向部本体の端部から前記表面に近づく方向へ湾曲するとともに、前記幅方向について前記第２電極対向部本体から離れるようにさらに湾曲している請求項７に記載の半導体装置。 The second electrode projecting portion is curved in a direction approaching the surface from an end portion of the second electrode facing portion main body in the width direction, and is further separated from the second electrode facing portion main body in the width direction. 8. The semiconductor device according to claim 7, which is curved. 第１金属板と、
前記第１金属板に設けられた第１半導体素子と、
前記第１金属板から離れて設けられた第２金属板と、
前記第２金属板に設けられた第２半導体素子と、
前記第１金属板に接続された第１電極と、
前記第１半導体素子の表面と前記第２金属板とに接続された中間電極と、
前記第２半導体素子の表面に接続された第２電極と、
前記第１金属板、前記第１半導体素子、前記第２金属板、前記第２半導体素子、前記第１電極、前記中間電極および前記第２電極に渡って設けられ、前記第１電極の一部、前記中間電極および前記第２電極の一部を覆う絶縁性樹脂部と
を備え、
前記絶縁性樹脂部に覆われた前記第２電極の部分である第２電極樹脂被覆部は、前記絶縁性樹脂部の高さ方向について前記中間電極から離れて設けられ、前記中間電極に対向する第２電極対向部を有し、
前記第２電極対向部は、前記中間電極よりも前記絶縁性樹脂部の表面の近くに配置され、
前記第２電極対向部と前記絶縁性樹脂部の表面との間の最短距離は、前記中間電極と前記第２電極対向部との間の最短距離よりも小さく、
前記第２電極対向部は、
第２電極対向部本体と、
前記絶縁性樹脂部の幅方向についての前記第２電極対向部本体の端部と前記絶縁性樹脂部の表面との間に設けられたブロックと
を有している半導体装置。 a first metal plate;
a first semiconductor element provided on the first metal plate;
a second metal plate provided apart from the first metal plate;
a second semiconductor element provided on the second metal plate;
a first electrode connected to the first metal plate;
an intermediate electrode connected to the surface of the first semiconductor element and the second metal plate;
a second electrode connected to the surface of the second semiconductor element;
provided over the first metal plate, the first semiconductor element, the second metal plate, the second semiconductor element, the first electrode, the intermediate electrode and the second electrode, and a part of the first electrode , and an insulating resin portion covering part of the intermediate electrode and the second electrode,
A second electrode resin covering portion, which is a portion of the second electrode covered with the insulating resin portion, is provided away from the intermediate electrode in the height direction of the insulating resin portion and faces the intermediate electrode. having a second electrode facing portion,
the second electrode facing portion is arranged closer to the surface of the insulating resin portion than the intermediate electrode;
the shortest distance between the second electrode facing portion and the surface of the insulating resin portion is smaller than the shortest distance between the intermediate electrode and the second electrode facing portion;
The second electrode facing portion is
a second electrode facing portion main body;
a block provided between an end portion of the second electrode facing portion main body and a surface of the insulating resin portion in the width direction of the insulating resin portion;
A semiconductor device having 前記第１半導体素子および前記第２半導体素子のそれぞれは、ＳｉＣから構成されている請求項１から請求項９までの何れか一項に記載の半導体装置。 10. The semiconductor device according to claim 1, wherein each of said first semiconductor element and said second semiconductor element is made of SiC. 請求項１から請求項１０までの何れか一項に記載の半導体装置を備えた３相インバータ装置。A three-phase inverter device comprising the semiconductor device according to any one of claims 1 to 10.
JP2019155452A 2019-08-28 2019-08-28 semiconductor equipment Active JP7292155B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2019155452A JP7292155B2 (en) 2019-08-28 2019-08-28 semiconductor equipment
JP2023092799A JP2023101835A (en) 2019-08-28 2023-06-06 Semiconductor device and three-phase inverter device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019155452A JP7292155B2 (en) 2019-08-28 2019-08-28 semiconductor equipment

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2023092799A Division JP2023101835A (en) 2019-08-28 2023-06-06 Semiconductor device and three-phase inverter device

Publications (2)

Publication Number Publication Date
JP2021034638A JP2021034638A (en) 2021-03-01
JP7292155B2 true JP7292155B2 (en) 2023-06-16

Family

ID=74677756

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2019155452A Active JP7292155B2 (en) 2019-08-28 2019-08-28 semiconductor equipment
JP2023092799A Pending JP2023101835A (en) 2019-08-28 2023-06-06 Semiconductor device and three-phase inverter device

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2023092799A Pending JP2023101835A (en) 2019-08-28 2023-06-06 Semiconductor device and three-phase inverter device

Country Status (1)

Country Link
JP (2) JP7292155B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2022202369A1 (en) * 2021-03-24 2022-09-29
JPWO2023017707A1 (en) * 2021-08-10 2023-02-16
JP7329583B2 (en) * 2021-12-14 2023-08-18 三菱電機株式会社 Semiconductor equipment and power conversion equipment

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008124176A (en) 2006-11-10 2008-05-29 Mitsubishi Electric Corp Power semiconductor device
JP2014017319A (en) 2012-07-06 2014-01-30 Toyota Industries Corp Semiconductor device
WO2014181426A1 (en) 2013-05-09 2014-11-13 三菱電機株式会社 Semiconductor module and semiconductor device
JP2017143207A (en) 2016-02-12 2017-08-17 株式会社豊田自動織機 Semiconductor module
WO2018021322A1 (en) 2016-07-26 2018-02-01 三菱電機株式会社 Semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008124176A (en) 2006-11-10 2008-05-29 Mitsubishi Electric Corp Power semiconductor device
JP2014017319A (en) 2012-07-06 2014-01-30 Toyota Industries Corp Semiconductor device
WO2014181426A1 (en) 2013-05-09 2014-11-13 三菱電機株式会社 Semiconductor module and semiconductor device
JP2017143207A (en) 2016-02-12 2017-08-17 株式会社豊田自動織機 Semiconductor module
WO2018021322A1 (en) 2016-07-26 2018-02-01 三菱電機株式会社 Semiconductor device

Also Published As

Publication number Publication date
JP2021034638A (en) 2021-03-01
JP2023101835A (en) 2023-07-21

Similar Documents

Publication Publication Date Title
JP2023101835A (en) Semiconductor device and three-phase inverter device
US10115658B2 (en) Semiconductor device
US8987877B2 (en) Semiconductor device
US6734551B2 (en) Semiconductor device
US10104775B2 (en) Semiconductor device and method for manufacturing the same
CN106952877B (en) Semiconductor device with a plurality of semiconductor chips
US10529656B2 (en) Semiconductor device
JP5930070B2 (en) Semiconductor device
US10959333B2 (en) Semiconductor device
US9824961B2 (en) Semiconductor device
JP5714157B1 (en) Power semiconductor device
JP6021695B2 (en) Semiconductor device manufacturing method and semiconductor device manufacturing apparatus
JP7173375B2 (en) semiconductor module
JP7459672B2 (en) semiconductor equipment
JP7413668B2 (en) Semiconductor device and its manufacturing method
CN116472610A (en) Semiconductor device with a semiconductor layer having a plurality of semiconductor layers
US20240145353A1 (en) Semiconductor module, method for manufacturing semiconductor module, semiconductor device, and vehicle
WO2022255053A1 (en) Semiconductor device
US10971414B2 (en) Semiconductor device
US11646250B2 (en) Semiconductor device
US20240234360A9 (en) Semiconductor module, semiconductor device, and vehicle
US20240136319A1 (en) Semiconductor module, semiconductor device, and vehicle
CN116798960A (en) Semiconductor module and method for manufacturing semiconductor module
JP2023076113A (en) Semiconductor device
JPWO2020079743A1 (en) Power semiconductor devices and their manufacturing methods

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20220419

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230221

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20230222

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230407

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230509

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20230606

R150 Certificate of patent or registration of utility model

Ref document number: 7292155

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150