JP7290410B2 - 指示命令処理調節システム - Google Patents

指示命令処理調節システム Download PDF

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JP7290410B2
JP7290410B2 JP2018213374A JP2018213374A JP7290410B2 JP 7290410 B2 JP7290410 B2 JP 7290410B2 JP 2018213374 A JP2018213374 A JP 2018213374A JP 2018213374 A JP2018213374 A JP 2018213374A JP 7290410 B2 JP7290410 B2 JP 7290410B2
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Japan
Prior art keywords
processor unit
skew
synchronizer
processor
register
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Japanese (ja)
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JP2019125350A5 (enExample
JP2019125350A (ja
Inventor
ウィング シー． リー，
ショーン エム． レイミー，
ロナルド ジェームズ クーンツ，
ディック ピー． ウォン，
ジャクソン チア，
アンソニー エス． フォルナバイオ，
ムラリ ランガラージャン，
クラーク エドガー ムーア，
デーヴィッド クライド シャープ，
アーノルド ダブリュ． ノードシエック，
ポール ユージーン デンゼル，
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Boeing Co
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Boeing Co
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Publication of JP2019125350A5 publication Critical patent/JP2019125350A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Hardware Redundancy (AREA)
JP2018213374A 2017-11-21 2018-11-14 指示命令処理調節システム Active JP7290410B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/819,402 2017-11-21
US15/819,402 US10528077B2 (en) 2017-11-21 2017-11-21 Instruction processing alignment system

Publications (3)

Publication Number Publication Date
JP2019125350A JP2019125350A (ja) 2019-07-25
JP2019125350A5 JP2019125350A5 (enExample) 2021-12-23
JP7290410B2 true JP7290410B2 (ja) 2023-06-13

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JP2018213374A Active JP7290410B2 (ja) 2017-11-21 2018-11-14 指示命令処理調節システム

Country Status (5)

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US (1) US10528077B2 (enExample)
EP (1) EP3486780B1 (enExample)
JP (1) JP7290410B2 (enExample)
KR (1) KR102821210B1 (enExample)
CN (1) CN109815020B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11132268B2 (en) * 2019-10-21 2021-09-28 The Boeing Company System and method for synchronizing communications between a plurality of processors
US12056084B2 (en) * 2020-12-09 2024-08-06 The Boeing Company Message synchronization system
FR3118843B1 (fr) * 2021-01-13 2025-03-07 Dassault Aviat Systeme de transfert securise de donnees numeriques d'aeronef comprenant des systemes producteurs de donnees redondants, ensemble et procede associes
US11838397B2 (en) 2021-06-17 2023-12-05 Northrop Grumman Systems Corporation Systems and methods for synchronization of processing elements
US12135970B2 (en) 2023-03-17 2024-11-05 The Boeing Company System and method for synchronizing processing between a plurality of processors

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090044044A1 (en) 2005-11-18 2009-02-12 Werner Harter Device and method for correcting errors in a system having at least two execution units having registers
US20090193229A1 (en) 2007-12-14 2009-07-30 Thales High-integrity computation architecture with multiple supervised resources
JP2010092105A (ja) 2008-10-03 2010-04-22 Fujitsu Ltd 同期制御装置，情報処理装置及び同期管理方法
US20130125137A1 (en) 2011-11-15 2013-05-16 Ge Aviation Systems Llc Method of providing high integrity processing

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0736720A (ja) * 1993-07-20 1995-02-07 Yokogawa Electric Corp 二重化コンピュータ装置
US5925099A (en) * 1995-06-15 1999-07-20 Intel Corporation Method and apparatus for transporting messages between processors in a multiple processor system
US20080163035A1 (en) * 2004-10-25 2008-07-03 Robert Bosch Gmbh Method for Data Distribution and Data Distribution Unit in a Multiprocessor System
WO2007006013A2 (en) 2005-07-05 2007-01-11 Viasat, Inc. Synchronized high-assurance circuits
US8275977B2 (en) 2009-04-08 2012-09-25 Freescale Semiconductor, Inc. Debug signaling in a multiple processor data processing system
US8560737B2 (en) * 2011-06-10 2013-10-15 International Business Machines Corporation Managing operator message buffers in a coupling facility
US9176912B2 (en) * 2011-09-07 2015-11-03 Altera Corporation Processor to message-based network interface using speculative techniques
US8924780B2 (en) 2011-11-10 2014-12-30 Ge Aviation Systems Llc Method of providing high integrity processing

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090044044A1 (en) 2005-11-18 2009-02-12 Werner Harter Device and method for correcting errors in a system having at least two execution units having registers
JP2009516277A (ja) 2005-11-18 2009-04-16 ローベルト ボッシュ ゲゼルシャフト ミット ベシュレンクテル ハフツング 少なくとも２つのレジスタ付き処理ユニットを有するシステムにおいてエラーを除去する装置および方法
US20090193229A1 (en) 2007-12-14 2009-07-30 Thales High-integrity computation architecture with multiple supervised resources
JP2010092105A (ja) 2008-10-03 2010-04-22 Fujitsu Ltd 同期制御装置，情報処理装置及び同期管理方法
US20130125137A1 (en) 2011-11-15 2013-05-16 Ge Aviation Systems Llc Method of providing high integrity processing
JP2013105494A (ja) 2011-11-15 2013-05-30 Ge Aviation Systems Llc 高整合性処理を提供する方法

Also Published As

Publication number Publication date
KR20190058288A (ko) 2019-05-29
EP3486780B1 (en) 2020-11-18
KR102821210B1 (ko) 2025-06-13
CN109815020A (zh) 2019-05-28
CN109815020B (zh) 2024-05-14
EP3486780A1 (en) 2019-05-22
US20190155325A1 (en) 2019-05-23
US10528077B2 (en) 2020-01-07
JP2019125350A (ja) 2019-07-25

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