JP7280697B2 - Manufacturing method of multilayer ceramic capacitor - Google Patents

Description

TECHNICAL FIELD The present invention relates to a method of manufacturing a laminated ceramic capacitor that can be made smaller and has a larger capacity.

2. Description of the Related Art In recent years, along with the miniaturization and high performance of electronic equipment, there has been an increasing demand for miniaturization and large-capacity multilayer ceramic capacitors used in electronic equipment. In order to increase the capacitance while keeping the size of the multilayer ceramic capacitor small, it is effective to increase the intersecting area of the internal electrodes of the multilayer ceramic capacitor (the overlapping area of the facing internal electrodes).

From the viewpoint of increasing the intersecting area of the internal electrodes, a technique is known in which after obtaining a plurality of green chips by cutting a mother block, ceramic green sheets are attached to the side surfaces of the green chips, and side margins are added later. (See Patent Document 1, for example).

Further, in Patent Documents 2 and 3, after cutting a laminate in which ceramic sheets and internal electrodes are alternately laminated, after removing the end of the internal electrode exposed from the side surface which is the cut surface, side A technique is described in which a margin portion is provided to prevent a short circuit defect between the ends of internal electrodes.

JP 2012-209539 A JP 2016-225603 A JP 2017-120880 A

However, there is no known technique for preventing defects such as peeling and cracking of the side margin portions attached later while preventing short-circuit defects on the side surfaces between the internal electrodes.

SUMMARY OF THE INVENTION In view of the circumstances as described above, an object of the present invention is to provide a method of manufacturing a multilayer ceramic capacitor capable of preventing short-circuit failures between internal electrodes and defects in side margin portions attached later. It is in.

In order to achieve the above object, a method for manufacturing a laminated ceramic capacitor according to one aspect of the present invention provides a laminated chip having side surfaces on which end portions of the internal electrodes are exposed by cutting a ceramic laminate having internal electrodes laminated thereon. including the step of making
A laser having a top-hat type output distribution includes a central portion in which the irradiation intensity distribution is uniform and a peripheral portion located around the central portion and in which the irradiation intensity gradually decreases from the central portion. A plurality of irradiation regions arranged so as to overlap each other are irradiated.
A side margin portion is provided so as to cover the side surface after the laser irradiation.

According to the manufacturing method described above, the ends of the internal electrodes exposed from the side surfaces are removed by the laser, so that even if the side surfaces are scratched or adhered, the ends of the internal electrodes are insulated by the ceramic sheets. The Rukoto. Therefore, it is possible to prevent short-circuit failure of the internal electrodes. In addition, the irradiation intensity distribution in the central portion is uniform, and the region where a plurality of irradiation regions overlap is the peripheral portion where the irradiation intensity is weak. Therefore, the intensity of the laser irradiation can be made uniform throughout, and the end portions of the internal electrodes can be prevented from being removed too deeply. As a result, the adhesion between the side surface and the side margin portion can be ensured, the peeling of the side margin portion and the generation of cracks on the side surface can be prevented, and problems when the side margin portion is retrofitted can be prevented.

Specifically, the laser may be defocused by focusing on the front side or the back side of the side surface, and the plurality of irradiation regions may be irradiated.
Thereby, the irradiation area can be irradiated with the laser.

For example, the end portion of the internal electrode may be removed from the side surface toward the inside of the laminated chip by 0.5 μm or more and 1.0 μm or less.
As a result, the ends of the internal electrodes can be removed to an appropriate depth, and peeling of the side margins from the side surfaces and cracking on the side surfaces can be more effectively prevented.

The laser may be a green laser.
As a result, the end portions of the internal electrodes can be prevented from being damaged by heat during laser processing, and the internal electrodes can be efficiently removed.

It is possible to provide a method of manufacturing a multilayer ceramic capacitor that can prevent short-circuit failures between internal electrodes and defects in side margin portions that are added later.

1 is a perspective view of a laminated ceramic capacitor according to one embodiment of the present invention; FIG. FIG. 2 is a cross-sectional view of the laminated ceramic capacitor taken along line AA'; FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line BB'; It is a figure which expands and shows a part of sectional drawing shown in FIG. 4 is a flow chart showing a method for manufacturing the laminated ceramic capacitor. It is a perspective view which shows the manufacturing process of the said laminated ceramic capacitor. It is a perspective view which shows the manufacturing process of the said laminated ceramic capacitor. It is a perspective view which shows the manufacturing process of the said laminated ceramic capacitor. It is a figure which shows typically the laser irradiation process in the said manufacturing process. FIG. 10 is a diagram showing an arrangement example of irradiation regions irradiated with a laser on a side surface of an unfired laminated chip in the manufacturing process; FIG. 11 shows only two irradiation regions in FIG. 10; 12 is a graph showing an irradiation intensity distribution example of the two irradiation regions shown in FIG. 11, in which the vertical axis represents the laser irradiation intensity and the horizontal axis represents the position in the Z-axis direction or the X-axis direction. It is a figure showing two irradiation fields concerning a comparative example of this embodiment. 14 is a graph showing an irradiation intensity distribution example of the two irradiation regions shown in FIG. 13, in which the vertical axis represents the laser irradiation intensity and the horizontal axis represents the position in the Z-axis direction or the X-axis direction.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
The drawings show mutually orthogonal X, Y and Z axes where appropriate. The X-axis, Y-axis, and Z-axis are common in all drawings.

[Structure of Multilayer Ceramic Capacitor 10]
1 to 3 are diagrams showing a multilayer ceramic capacitor 10 according to one embodiment of the present invention. FIG. 1 is a perspective view of a laminated ceramic capacitor 10. FIG. FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along line AA' in FIG. FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along line BB'.

A multilayer ceramic capacitor 10 includes an element body 11 , a first external electrode 14 and a second external electrode 15 . The element body 11 has a plurality of first internal electrodes 12 and a plurality of second internal electrodes 13 . The external electrodes 14 and 15 cover both end surfaces of the element body 11 in the X-axis direction. The first external electrode 14 is connected to the first internal electrode 12 and the second external electrode 15 is connected to the second internal electrode 13 .

The element body 11 has a laminated chip 16 , a first side margin portion 20 , a second side margin portion 21 and an offset portion 24 .

The laminated chip 16 is made of ceramics, and has a plurality of first internal electrodes 12 and a plurality of second internal electrodes 13 arranged therein. The first internal electrodes 12 and the second internal electrodes 13 are flat plates extending along the XY plane, and are alternately stacked in the Z-axis direction with ceramic layers 17 interposed therebetween. The thickness and number of layers of the ceramic layer 17 and the internal electrodes 12 and 13 are not particularly limited.

The internal electrodes 12 and 13 are each made of a conductive material and function as internal electrodes of the laminated ceramic capacitor 10 configured in a flat plate shape. As the conductive material, for example, a metal material containing nickel (Ni), copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), or alloys thereof is used.

As the ceramic material forming the ceramic layer 17, for example, a perovskite structure material containing barium (Ba) and titanium (Ti), typified by barium titanate (BaTiO ₃ ), can be used. In addition to barium titanate, the ceramic material constituting the ceramic layer 17 includes strontium titanate (SrTiO ₃ ), calcium titanate (CaTiO ₃ ), magnesium titanate (MgTiO ₃ ), and calcium zirconate. (CaZrO ₃ ), calcium zirconate titanate (Ca(Zr,Ti)O ₃ ), barium zirconate (BaZrO ₃ ), titanium oxide (TiO ₂ ), and the like.

With the above configuration, in the multilayer ceramic capacitor 10, when a voltage is applied between the first external electrode 14 and the second external electrode 15, the plurality of voltages between the first internal electrode 12 and the second internal electrode 13 A voltage is applied to the ceramic layer 17 . As a result, in the multilayer ceramic capacitor 10 , charges corresponding to the voltage between the first external electrode 14 and the second external electrode 15 are stored in the ceramic layers 17 .

The laminated chip 16 further has a first cover layer 18 and a second cover layer 19 . The first cover layer 18 is arranged above the laminated chip 16 in the Z-axis direction, and the second cover layer 19 is arranged below the laminated chip 16 in the Z-axis direction.

The side margin portions 20 and 21 are flat plates extending along the XZ plane. The first side margin portion 20 covers the side surface of the laminated chip 16 facing the Y-axis direction, and the second side margin portion 21 covers the side surface of the laminated chip 16 opposite to the first side margin portion 20 .

The cover layers 18 and 19 and the side margin portions 20 and 21 mainly have the function of protecting the internal electrodes 12 and 13 and ensuring insulation around the internal electrodes 12 and 13 . The cover layers 18 and 19 and the side margin portions 20 and 21 are also made of dielectric ceramics. The cover layers 18 and 19 and the side margin portions 20 and 21 may be made of any material as long as they have insulating properties. However, by using the same material as the ceramic layer 17, the internal stress in the element body 11 can be suppressed. .

4 is an enlarged view of a part of the cross-sectional view shown in FIG. 3. FIG. As shown in FIGS. 3 and 4, the offset portions 24 are formed between the internal electrodes 12 and 13 and the first side margin portion 20 and between the internal electrodes 12 and 13 and the second side margin portion 21. , respectively. FIG. 4 shows offset portions 24 formed between the internal electrodes 12 and 13 and the second side margin portions 21 . If the side surface of the laminated chip 16 covered with the second side margin portion 21 is defined as a side surface S2, the internal electrodes 12 and 13 have their respective ends 22 and 23 on the side surface S2 of the laminated chip 16. have.

Although illustration and description are omitted, the structures of the internal electrodes 12 and 13 and the offset portion 24 on the side surface S1 of the laminated chip 16 on the side of the first side margin portion 20 are the same as those on the side surface S2 on the side of the second side margin portion 21. is substantially the same as

The offset portion 24 is a gap provided to offset the end portions 22 and 23 of the internal electrodes 12 and 13 from the side surfaces S1 and S2 of the laminated chip 16 toward the inside of the laminated chip 16 . The offset portion 24 may be a void area (air gap). Alternatively, offset portion 24 may be an amorphous region. The amorphous region is a region made of a material that does not have a crystalline structure, and is made of glass, for example. Examples of vitreous materials include silicon oxides containing metallic elements such as Ba, Ni, and manganese (Mn).

The offset width W of the offset portion 24 is, for example, 0.5 μm or more and 1.0 μm or less. The offset width W is the distance from the side surfaces S1 and S2 of the laminated chip 16 to the end portions 22 and 23 of the internal electrodes 12 and 13 . As will be described later in detail, this makes it possible to prevent short circuits due to structural defects at the end portions of the internal electrodes 12 and 13, and also to prevent peeling of the side margin portions 20 and 21 and the occurrence of cracks on the side surfaces S1 and S2. can.

[Manufacturing Method of Multilayer Ceramic Capacitor 10]
FIG. 5 is a flow chart showing the manufacturing method of the multilayer ceramic capacitor 10. As shown in FIG. 6 to 8 are diagrams showing the manufacturing process of the multilayer ceramic capacitor 10. FIG. Hereinafter, a method for manufacturing the laminated ceramic capacitor 10 will be described along FIG. 5 with reference to FIGS. 6 to 8 as appropriate.

(Step S01: Process for producing a ceramic laminate)
In step S01, as shown in FIG. 6, a first ceramic sheet 101, a second ceramic sheet 102 and a third ceramic sheet 103 are laminated to produce a ceramic laminate 104. As shown in FIG.

Ceramic sheets 101, 102, and 103 shown in FIG. 6 are configured as unfired dielectric green sheets containing dielectric ceramics as a main component. An unfired first internal electrode 112 corresponding to the first internal electrode 12 is formed on the first ceramic sheet 101 . Unfired second internal electrodes 113 corresponding to the second internal electrodes 13 are formed on the second ceramic sheet 102 . No internal electrodes are formed on the third ceramic sheet 103 .

Each of the internal electrodes 112 and 113 has a plurality of strip-shaped electrode patterns that cross the cutting line Lx parallel to the X-axis direction and extend along the cutting line Ly parallel to the Y-axis direction. These internal electrodes 112 and 113 are formed by applying a conductive paste to the ceramic sheets 101 and 102 by a printing method or the like.

The ceramic sheets 101 and 102 are alternately laminated in the Z-axis direction as shown in FIG. The ceramic sheets 103 are laminated on the upper and lower surfaces in the Z-axis direction of the laminate of the ceramic sheets 101 and 102 . A stack of ceramic sheets 103 corresponds to the cover layers 18 and 19 .
Note that the number of laminated ceramic sheets 101, 102, 103 and the like can be appropriately adjusted.

A ceramic laminate 104 in which internal electrodes 112 and 113 are laminated is produced by pressing a laminate of ceramic sheets 101, 102 and 103 from the Z-axis direction.

(Step S02: Manufacturing process of layered chip 116)
In step S02, the laminated chip 116 is produced by cutting the ceramic laminate 104 obtained in step S01.

In this step, the ceramic laminate 104 is cut in the X-axis direction and the Y-axis direction along the cutting lines Lx and Ly. As a result, as shown in FIG. 7, the laminated chip 116 having the side surfaces Su1 and Su2 where the end portions 122 and 123 of the internal electrodes 112 and 113 are exposed is produced. The side surfaces Su1 and Su2 are cut surfaces based on the cutting line Lx and are surfaces facing the Y-axis direction.

(Step S03: laser irradiation step)
In step S03, the side surfaces Su1 and Su2 of the layered chip 116 obtained in step S02 are irradiated with a laser. As a result, the ends 122 and 123 exposed from the side surfaces Su1 and Su2 of the internal electrodes 112 and 113 are removed. Details of the laser irradiation process will be described later.

(Step S04: Side margin forming step)
In step S04, as shown in FIG. 8, the unfired first side margin portion 120 and the second side margin portion 121 are provided on the side surfaces Su1 and Su2 of the unfired laminated chip 116 after the laser irradiation. A base body 111 is produced. These side margin portions 120 and 121 may be formed, for example, by attaching a ceramic sheet, or may be formed by applying a ceramic sheet by a dipping method or the like.

In the unfired element body 111, gaps are provided between the internal electrodes 112, 113 and the first side margin portion 120 and between the internal electrodes 112, 113 and the second side margin portion 121, which will be the offset portions 24. 124.

(Step S05: Firing step)
In step S05, the unfired element body 111 obtained in step S04 is fired to fabricate the element body 11 of the multilayer ceramic capacitor 10 shown in FIGS. Firing can be performed, for example, in a reducing atmosphere or in a low oxygen partial pressure atmosphere.

Depending on the firing atmosphere, the liquid-phase glass containing the Si component contained in the ceramic layer 17 and the side margins 20 and 21 may flow into the voids 124 formed by the laser irradiation treatment. At this time, metal elements such as Ba, Ni, and Mn contained in the side margin portions 20 and 21 and the internal electrodes 112 and 113 may diffuse into this vitreous substance. As a result, offset portions 24 made of amorphous regions are formed.
In addition, when the amorphous region is not formed in the void, the offset portion 24 formed of the void region is formed.

(Step S06: External electrode forming step)
In step S06, external electrodes 14 and 15 are formed on element body 11 obtained in step S05 to fabricate multilayer ceramic capacitor 10 shown in FIGS.

In step S06, first, an unfired electrode material is applied so as to cover one X-axis direction end face of the element body 11, and an unfired electrode material is applied so as to cover the other X-axis direction end face of the element body 11. do. The coated unfired electrode material is baked in, for example, a reducing atmosphere or a low oxygen partial pressure atmosphere to form a base film on the base body 11 . Then, an intermediate film and a surface film are formed on the base film baked on the base body 11 by plating such as electrolytic plating, and the external electrodes 14 and 15 are completed.

Part of the processing in step S06 may be performed before step S05. For example, before step S05, an unfired electrode material is applied to both end surfaces of the unfired element body 111 in the X-axis direction. A base layer for the external electrodes 14 and 15 may be formed by baking. Alternatively, an unfired electrode material may be applied to the body 111 from which the binder has been removed, and these may be fired at the same time.

[Detailed Description of Laser Irradiation Step (Step S03)]
In the manufacturing process of the laminated chip 116 in step S02, when the unfired ceramic laminate 104 is cut, the ends 122, 123 of the internal electrodes 112, 113 exposed on the side surfaces Su1, Su2 may be spread or Su1 and Su2 may be scratched or attached. Due to such a structural defect of the ends 122, 123 of the internal electrodes 112, 113, the ends 122, 123 may come into contact with each other on the side surfaces Su1, Su2, causing a short circuit.

Therefore, in step S03, the side surfaces Su1 and Su2 of the laminated chip 116 are irradiated with a laser. As a result, the structural defect portions of the end portions 122, 123 of the internal electrodes 112, 113 are removed, and short-circuit failure can be prevented.

On the other hand, when the removal amount of the end portions 122 and 123 is large, it may not be possible to sufficiently secure the adhesion between the side margin portions 120 and 121 and the side surfaces Su1 and Su2 which are added later. In this case, problems such as peeling of the side margins 20 and 21 and cracks on the side surfaces Su1 and Su2 are likely to occur due to the difference in contraction rate between the element body 11 and the side margins 20 and 21 during firing.

For this reason, the ends 122 and 123 of the internal electrodes 112 and 113 are removed, for example, by 0.5 μm or more and 1.0 μm or less toward the inside of the laminated chip 116 from the side surfaces Su1 and Su2. By setting the removal amount to 0.5 μm or more, structurally defective portions of the end portions 122 and 123 of the internal electrodes 112 and 113 can be reliably removed, and short circuits can be prevented. By setting the removal amount to 1.0 μm or less, sufficient adhesion between the side surfaces Su1 and Su2 and the side margin portions 120 and 121 can be ensured, and defects such as peeling and cracking can be prevented.

The amount of removal of the end portions 122 and 123 of the internal electrodes 112 and 113 is, like the offset width W, the distance from the side surfaces Su1 and Su2 of the laminated chip 116 to the end portions of the internal electrodes 112 and 113 after removal.
The removal amount of the ends 122 and 123 can be controlled by adjusting the laser irradiation conditions and the spot shape.

The laser of this embodiment is, for example, a green laser. A green laser is a laser having a wavelength of 500 nm or more and 550 nm or less, including a wavelength band of 532 nm.

By using a green laser, heat generation during irradiation can be suppressed as compared with a laser with a longer wavelength band. When heat is generated during irradiation, the end portions 122 and 123 of the internal electrodes 112 and 113 are heated and sphered, and there is a risk that cracks will occur from these portions as starting points. Furthermore, when a crack occurs, moisture or the like enters the cracked portion, making short-circuiting likely to occur. A green laser can prevent the occurrence of such cracks and short circuits.

In addition, by using a green laser, the spot corresponding to each irradiation region R can be appropriately enlarged as compared with a laser with a shorter wavelength band. As a result, the time required for the laser treatment process can be shortened, and the production efficiency can be improved. Moreover, by using a green laser, the ends 122 and 123 can sufficiently absorb energy, and the ends 122 and 123 can be removed efficiently.

FIG. 9 is a diagram schematically showing a mode in which the laser irradiation device 200 irradiates the side surfaces Su1 and Su2 with the laser L. As shown in FIG.
As the laser irradiation device 200, for example, a pulse laser device capable of moving a laser spot by controlling the angle of a mirror that reflects the laser can be used. Although the pulse width is not particularly limited, for example, a nanosecond pulse laser, a picosecond pulse laser, a femtosecond pulse laser, or the like can be used.

FIG. 10 is a diagram showing an arrangement example of the irradiation regions R irradiated with the laser L on the side surfaces Su1 and Su2 of the laminated chip 116. As shown in FIG. In the figure, the irradiation region R is indicated by a dashed line.
The laser irradiation device 200 irradiates a plurality of irradiation regions R of the side surfaces Su1 and Su2 with a laser beam L. As shown in FIG. The figure shows an example in which five irradiation regions R arranged in the X-axis direction are arranged in two rows in the Z-axis direction. Since the spot of the laser L is smaller than the side surfaces Su1 and Su2, the energy density of the laser L can be appropriately increased, and the removal amount can be controlled within the above range.

FIG. 11 is a diagram showing only two irradiation regions R in FIG. FIG. 12 is a graph showing an irradiation intensity distribution example of the two irradiation regions R shown in FIG. 11, where the vertical axis represents laser irradiation intensity and the horizontal axis represents the position in the Z-axis direction or the X-axis direction. In FIG. 11, the center portion R1 is represented by dots having a higher density than the peripheral portion R2.

Each irradiation region R has a central portion R1 in which the irradiation intensity distribution is averaged, and a peripheral portion R2 located around the central portion R1 and in which the irradiation intensity gradually decreases from the central portion R1. The “averaged irradiation intensity distribution” part has a non-Gaussian irradiation intensity distribution, and the fluctuation of the irradiation intensity value falls within the range of -20% to +20% based on the average value. Say. As shown in FIG. 12, the irradiation intensity distribution in the irradiation region R is substantially trapezoidal.

The irradiation regions R are arranged on the side surfaces Su1 and Su2 such that the peripheral edges R2 overlap each other. As a result, the entire sides Su1 and Su2 can be evenly illuminated. The irradiation intensity of the overlap region Rv is the sum of the irradiation intensities of the two irradiation regions R (periphery R2), as indicated by the dashed line in FIG. By including the overlap region Rv in the peripheral edge portion R2 where the irradiation intensity is low, it is possible to prevent the irradiation intensity from increasing in the overlap region Rv and suppress excessive removal of the ends 122 and 123 of the internal electrodes 112 and 113 .

The irradiation region R of this embodiment can be realized by defocusing the laser L having a top-hat type output distribution. Defocusing means focusing the laser L on the front side or the back side of the side surfaces Su1 and Su2. “In front of the side surfaces Su1 and Su2” refers to a position between the side surfaces Su1 and Su2 and the emitting section 201 of the laser irradiation device 200 (see FIG. 9). “The inner side of the side surfaces Su1 and Su2” refers to a position away from the side surfaces Su1 and Su2 in the direction away from the emission unit 201 .

FIG. 13 is a diagram showing two irradiation regions R' when the laser L having the top hat type output distribution is focused on the side surfaces Su1 and Su2, ie, just focused. FIG. 14 is a graph showing an irradiation intensity distribution example of the two irradiation regions R' shown in FIG. 13, where the vertical axis represents the laser irradiation intensity and the horizontal axis represents the position in the Z-axis direction or the X-axis direction.

The top-hat type laser output intensity distribution is characterized by being averaged as a whole and being of a rectangular distribution type. Therefore, as shown in FIGS. 13 and 14, when the laser L is focused on the side surfaces Su1 and Su2, that is, when just focused, the irradiation intensity distribution is also averaged. As a result, each illuminated region R' has no or a very narrow peripheral edge where the illumination intensity gradually decreases.

When trying to irradiate the entire side surfaces Su1 and Su2 with the just-focused laser L, regions with high irradiation intensity are arranged to overlap. The overlap region R'v has an irradiation intensity about twice that of the non-overlap region R'n. In other words, areas with extremely high irradiation intensity are locally generated in the side surfaces Su1 and Su2.

Therefore, in the overlap region R'v when the laser L is just focused, the removal amount of the end portions 122 and 123 tends to be larger than 1.0 μm. Therefore, the adhesion between the side surfaces Su1, Su2 and the side margin portions 120, 121 becomes unstable. As a result, problems such as peeling of the side margin portions 120 and 121 and cracks on the side surfaces Su1 and Su2 tend to occur due to the difference in contraction rate between the side margin portions 120 and 121 and the laminated chip 116 during firing. Furthermore, short circuits are more likely to occur due to moisture intrusion into peeled or cracked portions.

On the other hand, in this embodiment, the laser L having a top-hat type output distribution is defocused. As a result, the irradiation intensity distribution can be averaged in the central portion R1 included in the non-overlap region Rn, and the irradiation intensity can be suppressed in the peripheral portion R2 including the overlap region Rv. Therefore, laser irradiation can be performed with a more uniform intensity as a whole, and the amount of removal of the ends 122 and 123 can be controlled more accurately.

Further, by adjusting the defocus amount of the laser L, the shape of the peripheral portion R2 can be controlled. The defocus amount refers to the distance between the side surfaces Su1 and Su2 and the focus position. The defocus amount can be, for example, 3 mm or more and 5 mm or less. As a result, it is possible to secure a wide peripheral portion R2 that can be overlapped, and it becomes easier to control the position of the irradiation region R for processing the entire side surfaces Su1 and Su2.

As described above, according to the laser irradiation process of the present embodiment, it becomes easy to adjust the amount of removal of the end portions 122 and 123 in the range of 0.5 μm or more and 1.0 μm or less. , 121 can be prevented from being peeled off or cracked.

Although the embodiments of the present invention have been described above, it is needless to say that the present invention is not limited to the above-described embodiments and can be modified in various ways.

DESCRIPTION OF SYMBOLS 10... Laminated ceramic capacitors 12, 13... Internal electrodes 16... Laminated chips 17... Ceramic layers 20, 21... Side margin parts 22, 23... End parts 24... Offset parts 104... Unfired laminate 111... Unfired element body 112, 113 unfired internal electrodes 116 unfired laminated chips 120, 121 unfired side margin portions 122, 123 unfired internal electrode ends Su1, Su2 unfired laminated chip side faces W ... Offset width R ... Irradiation area R1 ... Central part R2 ... Peripheral part

Claims (4)

cutting a ceramic laminate in which ceramic layers and internal electrodes are alternately laminated to produce a laminated chip having side surfaces on which ends of the internal electrodes are exposed;
A laser that has a top-hat type output distribution and irradiates the side surface of the laminated chip to leave the ceramic layer and remove the end portion of the internal electrode, and the center portion where the irradiation intensity distribution is averaged. , and a peripheral edge portion located around the central portion and from which the irradiation intensity gradually decreases from the central portion so that the peripheral edge portions overlap each other sequentially along the longitudinal direction of the internal electrodes exposed on the side surfaces. irradiate multiple irradiation areas arranged in
A method of manufacturing a multilayer ceramic capacitor, wherein a side margin portion is provided so as to cover the side surface after the laser irradiation. A method for manufacturing a multilayer ceramic capacitor according to claim 1,
A method of manufacturing a multilayer ceramic capacitor, wherein the laser is defocused by focusing on the front side or the back side of the side surface, and the plurality of irradiation regions is irradiated. A method for manufacturing a multilayer ceramic capacitor according to claim 1 or 2,
A manufacturing method of a laminated ceramic capacitor, wherein the end portion of the internal electrode is removed from the side surface toward the inner side of the laminated chip by 0.5 μm or more and 1.0 μm or less. A method for manufacturing a multilayer ceramic capacitor according to any one of claims 1 to 3,
The method for manufacturing a multilayer ceramic capacitor, wherein the laser is a green laser.

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