JP7265138B2 - Semiconductor device, computer, and method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to semiconductor devices, computers, and methods of manufacturing semiconductor devices.

Neuromorphic computing that imitates the structure of the brain is known. Among them, reservoir computing suitable for time-series information processing has attracted attention. Reservoir computing uses networked devices containing nonlinear elements called reservoirs.

For example, a neuromorphic device using polyoxometalate and carbon nanotubes is known (eg, Non-Patent Document 1). Also known are neuromorphic integrated circuits in which a plurality of conductive pins extend vertically from a semiconductor integrated circuit layer and are connected by a nanowire interconnection layer including a memristive layer (see, for example, Patent Documents 1). A known device has a structure in which an information processing unit and a vertical electrode array unit face each other, and the vertical electrodes of the vertical electrode array unit are in contact with neurons of the information processing unit or separated from each other by a predetermined distance (for example, Patent Document 2).

Japanese Patent Publication No. 2011-507232 JP 2007-226762 A

Hirofumi Tanaka, 8 others, "A molecular neuromorphic network device consisting of single-walled carbon nanotubes complexed with polyoxometalate", NATURE COMMUNICATIONS, July 12, 2018.

The device described in Non-Patent Document 1 has a configuration in which a plurality of polyoxometallates, which are nonlinear polymers, are connected by carbon nanotubes, and thus has excellent integration. However, it is difficult to connect a plurality of polyoxometalates with carbon nanotubes in a desired connection relationship. Variation in the connection relationship between the plurality of polyoxometalates, that is, the plurality of nonlinear elements, among production lots results in variations in performance.

An object of one aspect is to be able to satisfactorily control the connection relationship of a plurality of nonlinear elements.

In one aspect, a substrate and a first semiconductor layer of a first conductivity type are provided on the substrate side by side in a first direction and a second direction intersecting the first direction, and provided on the first semiconductor layer a second semiconductor layer of a second conductivity type opposite to the first conductivity type, a plurality of nanowire diodes having diameters different from each other; connected to end surfaces of the plurality of nanowire diodes; a first conductive member that electrically connects the entirety of the plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent in the second direction to each other; The conductive member includes a conductive layer connected to first end surfaces of the plurality of nanowire diodes on the substrate side, and a metal wiring layer connected to second end surfaces of the plurality of nanowire diodes opposite to the first end surfaces. , the plurality of nanowire diodes is a semiconductor device, wherein the distribution of the number of the plurality of nanowire diodes with respect to diameter is constant .

In one aspect, an input circuit, a reservoir circuit to which data is input from the input circuit, and an output circuit to which data processed by the reservoir circuit are input, the reservoir circuit includes a substrate, the A first semiconductor layer of a first conductivity type provided on a substrate in a first direction and a second direction intersecting the first direction, and a semiconductor layer opposite to the first conductivity type provided on the first semiconductor layer a plurality of nanowire diodes having diameters different from each other, and nanowire diodes connected to end surfaces of the plurality of nanowire diodes and adjacent in the first direction and the second direction. and a first conductive member that electrically connects the entirety of the plurality of nanowire diodes by connecting only some of the nanowire diodes to each other, wherein the first conductive member includes the plurality of nanowires a conductive layer connected to a first end face of the diode on the substrate side; and a metal wiring layer connected to a second end face of the plurality of nanowire diodes opposite to the first end face, the plurality of nanowire diodes comprising: A computer comprising a semiconductor device having a constant distribution of the number of said plurality of nanowire diodes with respect to diameter .

In one aspect, a first semiconductor layer of a first conductivity type and the first semiconductor layer provided on the first semiconductor layer are aligned on a substrate in a first direction and a second direction intersecting the first direction. forming a plurality of nanowire diodes having different diameters, including a second semiconductor layer of a conductivity type and a second conductivity type opposite to each other; forming a conductive member that electrically connects all of the plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent to each other in the second direction ; The conductive member includes a conductive layer connected to first end surfaces of the plurality of nanowire diodes on the substrate side, and a metal wiring layer connected to second end surfaces of the plurality of nanowire diodes opposite to the first end surfaces. and said plurality of nanowire diodes is a method of manufacturing a semiconductor device in which the distribution of the number of said plurality of nanowire diodes with respect to diameter is constant .

As one aspect, it is possible to satisfactorily control the connection relationship of a plurality of nanowire diodes (nonlinear elements).

1A is a top view of a semiconductor device according to Example 1, FIG. 1B is a cross-sectional view along AA in FIG. 1A, and FIG. ) is a cross-sectional view between BB. 2A to 2D are cross-sectional views (Part 1) showing the method of manufacturing the semiconductor device according to the first embodiment. 3A to 3C are cross-sectional views (part 2) showing the method of manufacturing the semiconductor device according to the first embodiment. 4A is a top view of a semiconductor device according to Example 2, FIG. 4B is a cross-sectional view along AA in FIG. 4A, and FIG. ) is a cross-sectional view between BB. FIG. 5 is a cross-sectional view of a semiconductor device according to Example 3. FIG. 6A to 6C are cross-sectional views (part 1) showing the method of manufacturing a semiconductor device according to the third embodiment. 7A to 7C are cross-sectional views (Part 2) showing the method of manufacturing the semiconductor device according to the third embodiment. FIG. 8(a) is a top view of a semiconductor device according to Example 4, FIG. 8(b) is a cross-sectional view along line AA in FIG. 8(a), and FIG. ) is a cross-sectional view between BB. FIG. 9 is a cross-sectional view of a semiconductor device according to Example 5. FIG. FIG. 10(a) is a top view of a semiconductor device according to Example 6, and FIG. 10(b) is a cross-sectional view taken along line AA of FIG. 10(a). FIG. 11(a) is a top view of a semiconductor device according to Example 7, FIG. 11(b) is a cross-sectional view along AA in FIG. 11(a), and FIG. ) is a cross-sectional view between BB. FIG. 12 is a block diagram of a computer according to the eighth embodiment.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

1A is a top view of a semiconductor device according to Example 1, FIG. 1B is a cross-sectional view along AA in FIG. 1A, and FIG. ) is a cross-sectional view between BB. In FIG. 1(a), the nanowire diodes 50 and the metal pillars 24 located under the metal wiring layer 26 are indicated by dotted lines (see FIGS. 4, 8(a), 10(a), and 11 below). The same applies to (a)). The semiconductor device 100 of Example 1 is a semiconductor device used as a reservoir of a reservoir computing system (the same applies to the semiconductor devices of Examples 2 to 7). As shown in FIGS. 1A to 1C, the semiconductor device 100 of Example 1 has a plurality of nanowire diodes 50 provided on the substrate 10 . The plurality of nanowire diodes 50 are arranged in a grid pattern in a first direction and in a second direction crossing (for example, perpendicular to) the first direction. Substrate 10 is, for example, a semi-insulating semiconductor substrate, but may be otherwise. Substrate 10 is, for example, a semi-insulating GaAs substrate.

The nanowire diode 50 comprises a semiconductor layer 52 of a first conductivity type (eg n-type), a semiconductor layer 54 of a second conductivity type opposite the first conductivity type (eg p-type) bonded to the semiconductor layer 52; are laminated in the longitudinal direction. That is, the nanowire diode 50 is a semiconductor diode having a pn junction in which an n-type semiconductor layer 52 and a p-type semiconductor layer 54 are joined. The n-type semiconductor layer 52 is, for example, an n-InAs layer doped with sulfur (S). The p-type semiconductor layer 54 is, for example, a p-GaAsSb layer doped with zinc (Zn). The height (length) of the nanowire diode 50 is, for example, about 1.5 μm to 2.0 μm. The plurality of nanowire diodes 50 is composed of nanowire diodes 50 having diameters of various sizes. That is, the nanowire diodes 50 have different diameters. The diameters of the plurality of nanowire diodes 50 vary, for example, within a range of approximately 20 nm to 100 nm.

A conductive layer 22 is provided between the substrate 10 and the nanowire diode 50 . The conductive layer 22 is in contact with the end face 56 of the nanowire diode 50 on the substrate 10 side. In Example 1, the conductive layer 22 is in contact with the end surface of the n-type semiconductor layer 52 forming the nanowire diode 50 . The conductive layer 22 is separated into islands so that the contact points of the plurality of nanowire diodes 50 are electrically separated from each other. The conductive layer 22 is, for example, a conductive semiconductor layer, but may be other cases such as a metal layer. The conductive layer 22 is, for example, an n-GaAs layer doped with silicon (Si). The thickness of the conductive layer 22 is, for example, about 100 nm to 200 nm.

An insulating film 12 is provided on the substrate 10 to cover the conductive layer 22 . The insulating film 12 is, for example, an inorganic insulating film such as a silicon nitride film or a silicon oxide film, but may be an organic insulating film such as a resin film. The thickness of the insulating film 12 on the conductive layer 22 is, for example, about 50 nm.

An insulating film 14 covering the side surface of the nanowire diode 50 is provided on the insulating film 12 . An end surface 58 of the nanowire diode 50 opposite to the substrate 10 is exposed from the upper surface of the insulating film 14 . In Example 1, the end surface of the p-type semiconductor layer 54 forming the nanowire diode 50 is exposed from the upper surface of the insulating film 14 . The insulating film 14 is, for example, a resin film made of BCB (Benzocyclobutene) resin, but may be another organic insulating film or an inorganic insulating film.

A metal wiring layer 26 in contact with the end surface 58 of the nanowire diode 50 is provided on the insulating film 14 . The metal wiring layer 26 has an electrode 28 in contact with the end surface 58 of the nanowire diode 50 . The electrode 28 has, for example, a circular shape, but may have another shape such as a rectangular shape. A metal pillar 24 is provided which penetrates through the insulating films 12 and 14 and has one end face in contact with the conductive layer 22 and the other end face in contact with the metal wiring layer 26 . The metal wiring layer 26 and the metal pillars 24 are made of a highly conductive metal such as copper or gold. The metal wiring layer 26 and the metal pillars 24 may be made of the same metal, or may be made of different metals. The diameter of the metal pillar 24 is, for example, about 1 μm to 5 μm. The thickness of the metal wiring layer 26 is, for example, about 1 μm to 5 μm. Here, the conductive layer 22 , the metal pillar 24 and the metal wiring layer 26 are collectively referred to as the conductive member 20 .

The plurality of nanowire diodes 50 are connected between the input terminal electrode 30 and the output terminal electrode 32, which are part of the metal wiring layer 26, and are arranged in a grid pattern in the first direction and the second direction. A signal input to the input terminal electrode 30 is output from the output terminal electrode 32 after passing through the plurality of nanowire diodes 50 . The plurality of nanowire diodes 50 are electrically connected by the conductive member 20 to be connected in a network. not physically connected. Some of the nanowire diodes 50 adjacent in the first direction and the second direction are not electrically connected by the conductive member 20, and the rest of the nanowire diodes 50 adjacent in the first direction and the second direction are conductive. They are electrically connected by the member 20 . In Example 1, the nanowire diodes 50 adjacent to each other in the first direction are electrically connected to each other by connecting the respective end faces 58 with the metal wiring layer 26 . The nanowire diodes 50 adjacent in the second direction are electrically connected to each other by connecting the end surface 56 of one nanowire diode 50 and the end surface 58 of the other nanowire diode 50 with the conductive layer 22 , the metal pillar 24 and the metal wiring layer 26 . properly connected.

The widths of the metal wiring layers 26 connecting the nanowire diodes 50 adjacent in the first direction and the second direction are the same. Moreover, the diameters of the plurality of metal pillars 24 are also the same size. Note that the same size includes substantially the same size that is different due to a manufacturing error.

Since the plurality of nanowire diodes 50 have different diameters, the plurality of nanowire diodes 50 are connected (contacted) to the electrode 28 with different connection areas (contact areas). Thus, a plurality of nanowire diodes 50 are electrically connected to electrode 28 with varying connection resistances (contact resistances). That is, since the plurality of nanowire diodes 50 have different diameters, the plurality of nanowire diodes 50 are connected (contacted) to the electrode 28 with mutually different connection areas (contact areas). Therefore, the plurality of nanowire diodes 50 are electrically connected to the electrode 28 with different connection resistances (contact areas).

In this way, the semiconductor device 100 has a plurality of nonlinear elements with different nonlinearities by including a plurality of nanowire diodes 50 having different diameters. The plurality of nanowire diodes 50 function as neuron elements when the semiconductor device 100 is used as a reservoir of a reservoir computing system. In addition, by connecting (in contact with) the end surfaces 56 and 58 of the plurality of nanowire diodes 50 having different diameters, the conductive member 20 has a connection resistance (contact resistance) between the plurality of nanowire diodes 50 and the conductive member 20. is different. Due to the difference in connection resistance between the nanowire diodes 50 and the conductive member 20, when the semiconductor device 100 is used as a reservoir, the connection weighting of the plurality of nanowire diodes 50 is achieved. Furthermore, some of the adjacent nanowire diodes 50 are not electrically connected to each other, and the rest of the nanowire diodes 50 are electrically connected to each other. . Thus, semiconductor device 100 can be used as a reservoir in a reservoir computing system.

2A to 3C are cross-sectional views showing the method of manufacturing the semiconductor device according to the first embodiment. As shown in FIG. 2A, for example, a semi-insulating GaAs substrate 10 having a crystal orientation of (111)B on the surface is deposited from n-GaAs using, for example, the MOCVD (Metal Organic Chemical Vapor Deposition) method. A conductive layer 22 is grown. Silicon (Si), for example, is used for n-type impurity doping, and the Si concentration is, for example, 1×10 ¹⁸ cm ⁻³ to 1×10 ²⁰ cm ⁻³ . The thickness of the conductive layer 22 is, for example, about 100 nm to 200 nm.

As shown in FIG. 2B, a portion of the conductive layer 22 is removed by, for example, photolithography and etching to separate the conductive layer 22 into islands.

As shown in FIG. 2C, the insulating film 12 made of, for example, a silicon nitride film is formed on the substrate 10 by using, for example, the plasma CVD method to cover the conductive layer 22 . The thickness of the insulating film 12 on the conductive layer 22 is, for example, about 50 nm. After that, the insulating film 12 in the regions where the nanowire diodes 50 are to be formed is removed using, for example, photolithography and etching to form a plurality of openings in the insulating film 12 through which the conductive layer 22 is exposed. The plurality of apertures have aperture sizes of varying sizes. After that, a plurality of metal thin films 102 are formed on the conductive layer 22 exposed through the plurality of openings of the insulating film 12 using, for example, a vacuum deposition method and a lift-off method. The metal thin film 102 is, for example, a gold (Au) film. The metal thin film 102 serves as a catalyst during nanowire growth. Since the multiple openings have different sizes, the multiple metal films 102 have different size diameters. The diameters of the plurality of metal thin films 102 vary, for example, within a range of approximately 20 nm to 100 nm.

As shown in FIG. 2D, a semiconductor layer 52 made of, for example, n-InAs and a semiconductor layer 54 made of p-GaAsSb are formed on the metal thin film 102 formed in the opening of the insulating film 12 by using, for example, MOCVD. A nanowire diode 50 is grown. The growth temperature is, for example, 400.degree. C. to 450.degree. Trimethylindium (TMIn), triethylgallium (TEGa), arsine (AsH ₃ ), and trimethylantimony (TMSb) are used as raw materials. For the n-type impurity doping, sulfur (S) is doped by supplying hydrogen sulfide (H ₂ S) during growth. The S concentration is, for example, 1×10 ¹⁸ cm ⁻³ to 1×10 ²⁰ cm ⁻³ . For the p-type impurity doping, zinc (Zn) is doped by supplying diethyl zinc (DEZn) during growth. The Zn concentration is, for example, 1×10 ¹⁸ cm ⁻³ to 1×10 ²⁰ cm ⁻³ . By properly controlling the doping concentration and bandgap, a tunnel junction can be formed and act as a backward diode. The height of the semiconductor layer 52 is, for example, about 0.5 μm to 0.7 μm, the height of the semiconductor layer 54 is, for example, about 0.8 μm to 1.5 μm, and the height of the nanowire diode 50 is, for example, about 1.5 μm to 1.5 μm. It is about 2.0 μm. Since the plurality of metal thin films 102 and the plurality of openings in the insulating film 12 in which the metal thin films 102 are formed have different sizes, a plurality of nanowire diodes 50 having different diameters are grown.

As shown in FIG. 3A, an insulating film 14 made of, for example, BCB resin is formed on the insulating film 12 in which the nanowire diode 50 is embedded. After that, the insulating film 14 is planarized by etching back until the end surface 58 of the nanowire diode 50 is exposed.

As shown in FIG. 3B, the insulating films 12 and 14 in the regions where the metal pillars 24 are to be formed are removed by, for example, photolithography and etching to form a plurality of through holes penetrating the insulating films 12 and 14. Form. After that, using, for example, a vacuum deposition method and a plating method, metal pillars 24 made of copper or gold and having a diameter of, for example, about 1 μm to 5 μm and embedded in the plurality of through holes are formed. A plurality of through holes passing through the insulating films 12 and 14 have, for example, the same diameter, and a plurality of metal pillars 24 embedded in the plurality of through holes have, for example, the same diameter. Note that the same diameter includes substantially the same diameter that is different due to a manufacturing error.

As shown in FIG. 3(c), on the insulating film 14 including the end surface 58 of the nanowire diode 50, for example, using the vacuum deposition method and the lift-off method, the electrode 28, the input and output terminal electrodes 30, 32, for example, a thick film is formed. A metal wiring layer 26 having a thickness of about 1 μm to 5 μm is formed. As described above, the semiconductor device 100 of Example 1 is formed.

According to Example 1, a plurality of nanowire diodes 50 arranged in the first direction and the second direction are provided on the substrate 10 . The plurality of nanowire diodes 50 includes an n-type semiconductor layer 52 and a p-type semiconductor layer 54 provided on the semiconductor layer 52 and have different diameters. Of the nanowire diodes 50 adjacent in the first direction and the second direction, only some of the nanowire diodes 50 are connected by the conductive member 20 that connects the end surfaces 56 and 58 of the nanowire diodes 50 . Also, the plurality of nanowire diodes 50 as a whole are electrically connected by the conductive member 20 . This allows semiconductor device 100 to be used as a reservoir in a reservoir computing system, as described above. Since the semiconductor device 100 is manufactured using semiconductor technology, compared to the case of electrically connecting nonlinear polymers with carbon nanotubes as in Non-Patent Document 1, a plurality of nanowire diodes 50 (nonlinear elements) connection relationship can be well controlled. Moreover, since the semiconductor device 100 is composed of the nanowire diode 50 and the conductive member 20, the number of parts can be reduced, and the power consumption can be kept low.

In Example 1, it is preferable that the number of the plurality of nanowire diodes 50 is constant for each size of diameter. In other words, it is preferable that the distribution of the number of nanowire diodes 50 with respect to the diameter value is constant. For example, it is preferable if the number of nanowire diodes 50 having diameters of 20 nm, 30 nm, 40 nm, . . . 90 nm, 100 nm is constant. As a result, the nonlinearity distribution of the plurality of nanowire diodes 50 becomes favorable, and the performance of the reservoir using the semiconductor device 100 can be improved. Note that the number is constant (the distribution of the number is constant) is not limited to the case where the number (distribution of the number) is completely the same, but the case where the number (distribution of the number) is different to the extent that the nonlinear distribution can be in a good state. Also includes The number of nanowire diodes 50 for each diameter should be within ±10% of the average number of nanowire diodes 50 when the plurality of nanowire diodes 50 are distributed by diameter.

Preferably, the plurality of nanowire diodes 50 are tunnel diodes. A tunnel diode is an element with strong nonlinearity, and it is easy to weaken the nonlinearity of an element with strong nonlinearity. Therefore, by using a tunnel diode as the nanowire diode 50, it is possible to increase the variation in nonlinearity of the plurality of nanowire diodes 50, and improve the performance of the reservoir using the semiconductor device 100.

In the first embodiment, as an example of the tunnel diode, the semiconductor layer 52 is made of n-InAs and the semiconductor layer 54 is made of p-GaAsSb. For example, the semiconductor layer 52 may be made of n-InGaAs and the semiconductor layer 54 may be made of p-GaAsSb. For example, the semiconductor layer 52 may be made of n-GaAs and the semiconductor layer 54 may be made of p-InSb. For example, the semiconductor layer 52 may be made of n-InGaAs and the semiconductor layer 54 may be made of p-AlInSb. Also, the nanowire diode 50 may not be a tunnel diode. In this case, for example, the semiconductor layer 52 may be made of n-GaAs and the semiconductor layer 54 may be made of p-GaAs. Also, the nanowire diode 50 may be a pin junction via an i-type semiconductor instead of a pn junction.

In the first embodiment, the case where the plurality of nanowire diodes 50 are arranged in a grid pattern in the first direction and the second direction is shown as an example. or other shapes.

4A is a top view of a semiconductor device according to Example 2, FIG. 4B is a cross-sectional view along AA in FIG. 4A, and FIG. ) is a cross-sectional view between BB. As shown in FIGS. 4A to 4C, in the semiconductor device 200 of Example 2, the plurality of metal wiring layers 26 are configured to include metal wiring layers 26 with various widths. That is, the metal wiring layer 26 connecting the nanowire diodes 50a and 50b adjacent in the first direction and the metal wiring layer 26 connecting the nanowire diodes 50b and 50c adjacent in the first direction have different widths. there is Also, the metal wiring layer 26 connecting the nanowire diodes 50d and 50e adjacent in the second direction and the metal wiring layer 26 connecting the nanowire diodes 50e and 50f adjacent in the second direction have different widths. there is Since the plurality of metal wiring layers 26 have the same thickness, the wiring widths are different, so that the cross-sectional areas perpendicular to the extending direction are different. Since other configurations are the same as those of the first embodiment, description thereof is omitted.

According to the second embodiment, the plurality of nanowire diodes 50 adjacent in the first direction and the second direction are conductive members 20 including metal wiring layers 26 having various cross-sectional areas perpendicular to the extending direction. connected by That is, the plurality of nanowire diodes 50 adjacent in the first direction and the second direction are connected by the conductive member 20 including the metal wiring layer 26 having different cross-sectional areas perpendicular to the extending direction. In Example 1, the connection weighting of the plurality of nanowire diodes 50 is realized by the connection resistance between the nanowire diodes 50 and the conductive members 20 and the layout of the conductive members 20 . In Example 2, the connection resistance of the nanowire diodes 50 and the conductive members 20 and the layout of the conductive members 20 are added to the electrical resistance of the conductive members 20 to weight the connection of the plurality of nanowire diodes 50 . Therefore, the weighting can be finely controlled, and the performance of the reservoir using the semiconductor device 200 can be improved.

In the second embodiment, the cross-sectional areas are different because the widths of the metal wiring layers 26 are different.

The diameters of the metal pillars 24 included in the plurality of conductive members 20 may be different between the conductive members 20 that connect the plurality of adjacent nanowire diodes 50 . In this case, the weighting can be controlled more finely.

FIG. 5 is a cross-sectional view of a semiconductor device according to Example 3. FIG. As shown in FIG. 5, in the semiconductor device 300 of Example 3, conductive pillars 34 having dummy nanowires 40 and metal films 36 covering the surfaces of the dummy nanowires 40 are provided instead of the metal pillars 24 . Dummy nanowires 40 have the same structure as nanowire diodes 50 . That is, the dummy nanowires 40 include a semiconductor layer 42 made of the same material as the semiconductor layer 52 and a semiconductor layer 44 provided on the semiconductor layer 42 and made of the same material as the semiconductor layer 54 . The metal film 36 is made of a highly conductive metal such as copper or gold. The metal film 36 may be made of the same material as the metal wiring layer 26, or may be made of a different material. An insulating film 60 made of an inorganic insulating film such as an aluminum oxide film is provided on the insulating film 12 . The insulating film 60 is thinner than the nanowire diodes 50 and the dummy nanowires 40 and extends from the top surface of the insulating film 12 along the side surfaces of the nanowire diodes 50 . Since other configurations are the same as those of the first embodiment, description thereof is omitted.

6A to 7C are cross-sectional views showing the method of manufacturing a semiconductor device according to the third embodiment. As shown in FIG. 6A, a conductive layer 22 is formed on the substrate 10 using, for example, the MOCVD method. For example, a photolithography method and an etching method are used to partially remove the conductive layer 22 to separate the conductive layer 22 into islands. An insulating film 12 covering the conductive layer 22 is formed on the substrate 10 by using, for example, the plasma CVD method. After that, the insulating film 12 in the regions where the nanowire diodes 50 and the dummy nanowires 40 are to be formed is removed using, for example, photolithography and etching to form a plurality of openings in the insulating film 12 through which the conductive layer 22 is exposed. A plurality of metal thin films 102 are formed on the conductive layer 22 exposed through the plurality of openings of the insulating film 12 using, for example, a vacuum deposition method and a lift-off method. The metal thin film 102 serves as a catalyst during nanowire growth.

As shown in FIG. 6B, nanowire-shaped semiconductor layers 52 and 42 made of n-InAs are grown on the metal thin film 102 formed in the opening of the insulating film 12 by, eg, MOCVD. Nanowire-shaped semiconductor layers 54 and 44 made of p-GaAsSb are grown on the semiconductor layers 52 and 42 . Nanowire diode 50 is formed by semiconductor layers 52 and 54 . Semiconductor layers 42 and 44 form a dummy nanowire 40 having the same structure as nanowire diode 50 . The diameter of the dummy nanowires 40 is smaller than the diameter of the nanowire diodes 50, for example.

After the nanowire diodes 50 and the dummy nanowires 40 are formed, the insulating film 60 is formed to cover the nanowire diodes 50 and the dummy nanowires 40 . The insulating film 60 is thinner than the nanowire diodes 50 and the dummy nanowires 40 and is formed extending from the top surface of the insulating film 12 along the surfaces of the nanowire diodes 50 and the dummy nanowires 40 . After that, the insulating films 60 and 12 around the dummy nanowires 40 are removed using, for example, photolithography and etching. As a result, the conductive layer 22 is exposed around the dummy nanowires 40 .

As shown in FIG. 6C, a metal film 36 covering the nanowire diodes 50 and the dummy nanowires 40 is formed using, for example, a sputtering method. The metal film 36 is formed in contact with the surfaces of the dummy nanowires 40 and the conductive layer 22 exposed around the dummy nanowires 40 .

As shown in FIG. 7A, a photoresist film 104 is formed covering the dummy nanowires 40 and not covering other regions such as the nanowire diodes 50 . After that, the metal film 36 is etched using the photoresist film 104 as a mask. As a result, the metal film 36 formed in contact with the surfaces of the dummy nanowires 40 remains, and the metal films 36 formed on areas other than the surfaces of the dummy nanowires 40, such as the metal film 36 covering the nanowire diodes 50, are removed. Thereby, the conductive pillars 34 having the dummy nanowires 40 and the metal film 36 covering the surfaces of the dummy nanowires 40 are formed.

As shown in FIG. 7B, after removing the photoresist film 104, the insulating film 14 for embedding the nanowire diode 50 and the conductive pillar 34 is formed on the insulating film 60. Then, as shown in FIG. After that, the insulating film 14 is etched back until the end faces 58 of the nanowire diodes 50 and the end faces of the conductive pillars 34 are exposed.

As shown in FIG. 7C, the metal wiring layer 26 is formed on the insulating film 14 including the end faces 58 of the nanowire diodes 50 and the end faces of the conductive pillars 34 using, for example, a vacuum deposition method and a lift-off method. As described above, the semiconductor device 300 of Example 3 is formed.

In the first embodiment, the case where the metal pillars 24 are provided as the conductive pillars that electrically connect the conductive layer 22 and the metal wiring layer 26 is shown as an example, but the present invention is not limited to this case. As in Example 3, the conductive layer 22 and the metal wiring layer 26 are electrically conductive pillars 34 including the dummy nanowires 40 having the same structure as the nanowire diode 50 and the metal film 36 covering the surfaces of the dummy nanowires 40. may be connected to The minimum manufacturable diameter of the metal pillars 24 is on the order of a few microns, while the conductive pillars 34 can be submicron in diameter. Therefore, the semiconductor device 300 can be miniaturized, and the amplitude of the electrical resistance of the conductive member 20 can be increased.

FIG. 8(a) is a top view of a semiconductor device according to Example 4, FIG. 8(b) is a cross-sectional view along line AA in FIG. 8(a), and FIG. ) is a cross-sectional view between BB. In FIG. 8A, the conductive layer 22 covered with the insulating films 12 and 14 is indicated by dotted lines. As shown in FIGS. 8A to 8C, in the semiconductor device 400 of Example 4, the end surfaces 56 of the nanowire diodes 50 adjacent to each other in the first direction are connected by the conductive layer 22. electrically connected to each other. Also, the conductive layer 22 connecting the nanowire diodes 50a and 50b adjacent in the first direction and the conductive layer 22 connecting the nanowire diodes 50b and 50c adjacent in the first direction have different widths. Therefore, the cross-sectional area orthogonal to the extending direction of the conductive layer 22 connecting the nanowire diodes 50a and 50b and the cross-sectional area orthogonal to the extending direction of the conductive layer 22 connecting the nanowire diodes 50b and 50c are They are different in size. Since other configurations are the same as those of the first embodiment, description thereof is omitted.

In the first embodiment, the case where the nanowire diodes 50 adjacent to each other in the first direction are connected by the metal wiring layer 26 is shown as an example. good.

Further, according to Example 4, the plurality of nanowire diodes 50 adjacent in the first direction are connected by the conductive member 20 including the conductive layers 22 having various sizes of cross-sectional areas perpendicular to the extending direction. ing. That is, the plurality of nanowire diodes 50 adjacent in the first direction are connected by the conductive member 20 including the conductive layer 22 having different cross-sectional areas perpendicular to the extending direction. Thus, as in Example 2, the electrical resistance of the conductive member 20 is added to the connection resistance between the nanowire diode 50 and the conductive member 20 and the layout of the conductive member 20 to weight the connection of the plurality of nanowire diodes 50. can be realized. Therefore, the weighting can be finely controlled, and the performance of the reservoir using the semiconductor device 400 can be improved.

In the fourth embodiment, the cross-sectional area is different because the width of the conductive layer 22 is different. However, the cross-sectional area may be different because the thickness of the conductive layer 22 is different.

FIG. 9 is a cross-sectional view of a semiconductor device according to Example 5. FIG. As shown in FIG. 9, in the semiconductor device 500 of Example 5, the nanowire diode 50g among the plurality of nanowire diodes 50 has the conductive layer 22 connected to the end surface 56 and the metal wiring layer 26 connected to the end surface 58 as metal pillars. 24 is connected. Since other configurations are the same as those of the first embodiment, description thereof is omitted.

As in Example 5, in some nanowire diodes 50 g of the plurality of nanowire diodes 50 , the conductive layer 22 connected to the end surface 56 and the metal wiring layer 26 connected to the end surface 58 are connected by the metal pillars 24 . may As a result, the nanowire diode 50g operates as a nonlinear element with a recursive loop. Therefore, the performance of the reservoir using the semiconductor device 500 can be improved.

FIG. 10(a) is a top view of a semiconductor device according to Example 6, and FIG. 10(b) is a cross-sectional view taken along line AA of FIG. 10(a). In FIG. 10A, the conductive layer 22 covered with the insulating films 12 and 14 is illustrated by dotted lines. As shown in FIGS. 10A and 10B, in the semiconductor device 600 of Example 6, a plurality of memristors 70, which are variable resistance elements, are electrically connected between the plurality of nanowire diodes 50 and the output terminal electrode 32. It is connected to the. That is, one end of the memristor 70 is connected to the nanowire diode 50 via the metal wiring layer 26 , the metal pillar 24 and the conductive layer 22 , and the other end is connected to the output electrode terminal 32 via the conductive layer 22 . The memristor 70 includes, for example, a semiconductor layer 72 formed of the same material as the semiconductor layer 52 of the nanowire diode 50, a semiconductor layer 74 provided on the semiconductor layer 72 and formed of the same material as the semiconductor layer 54, and the semiconductor layer 72. , 74 and an oxide film 76 surrounding the periphery of the semiconductor device. Note that the memristor 70 is not limited to this structure, and other structures may be used as long as they function as variable resistance elements. The oxide film 76 is, for example, a titanium oxide (TiO ₂ ) film, a nickel oxide (NiO) film, a cobalt oxide (CoO) film, or the like, but other cases may also be used. Since other configurations are the same as those of the first embodiment, description thereof is omitted.

According to Example 6, a memristor 70 is connected between the plurality of nanowire diodes 50 and the output terminal electrode 32 . The memristor 70 changes its resistance value according to the amount of current. Therefore, when current flows from the plurality of nanowire diodes 50 to the output terminal electrode 32 via the memristor 70, the resistance value of the memristor 70 changes according to the amount of current. Therefore, the memristor 70 can store the weighting information based on the resistance value corresponding to the signal strength.

FIG. 11(a) is a top view of a semiconductor device according to Example 7, FIG. 11(b) is a cross-sectional view along AA in FIG. 11(a), and FIG. ) is a cross-sectional view between BB. In FIG. 11A, the conductive layer 22 and the metal wiring layer 82 covered with the insulating film 14 and the like are indicated by dotted lines. Also, the conductive pillars 84 located below the metal wiring layer 26 are illustrated by dashed lines. As shown in FIGS. 11A to 11C , a semiconductor device 700 of Example 7 has a plurality of nanowire diodes 50 between a plurality of nanowire diodes 50 and an output terminal electrode 32, like the semiconductor device 600 of Example 6. of memristors 70 are electrically connected. A conductive member 80 is also provided to electrically connect the memristor 70 with the conductive member 20 connected to the nanowire diode 50 so that the current passing through the memristor 70 is fed back to the nanowire diode 50 . The conductive member 80 is provided on the insulating film 12 , and electrically connects the metal wiring layer 82 connected to the memristor 70 and the metal wiring layer 26 and the conductive layer 22 included in the conductive member 20 to the metal wiring layer 82 . and connecting conductive pillars 84 . The conductive pillar 84 may be, for example, a pillar in which the surface of the dummy nanowire 40 is coated with the metal film 36, or may be a metal pillar. Since other configurations are the same as those of the first embodiment, description thereof is omitted.

According to the seventh embodiment, a conductive member 80 is provided electrically connecting the memristor 70 and the conductive member 20 (eg, the metal wiring layer 26 ) such that the output from the memristor 70 is fed back to the nanowire diode 50 . As a result, data input from the input terminal electrode 30 and data fed back from the memristor 70 via the conductive member 80 are processed by the plurality of nanowire diodes 50 . Therefore, efficient learning of the reservoir circuit using the semiconductor device 700 can be made possible.

The conductive member 80 is connected to the conductive member 20 positioned closer to the input terminal electrode 30 than midway between the row of nanowire diodes 50 close to the input terminal electrode 30 and the row of nanowire diodes 50 close to the output terminal electrode 32. preferably. As a result, data fed back from the memristor 70 is input to many nanowire diodes 50 . Therefore, more preferably, the conductive member 80 is connected to the conductive member 20 located in the row of nanowire diodes 50 adjacent to the input terminal electrode 30 .

FIG. 12 is a block diagram of a computer according to the eighth embodiment. As shown in FIG. 12, the computer 800 of Example 8 includes an input circuit 90, a reservoir circuit 92, and an output circuit 94. FIG. Computer 800 may include training data circuitry 96 . During learning, the readout weighting unit 98 is adjusted based on the learning data (teacher data) input from the learning data circuit 96 so that the readout weighting unit 98 performs appropriate weighting. The learning data circuit 96 is disconnected from the reservoir circuit 92 when the computer 800 is in use. Then, data is input from the input circuit 90 to the reservoir circuit 92, and arithmetic processing of the input data is performed in the reservoir circuit 92. FIG. The result of arithmetic processing in reservoir circuit 92 is output from output circuit 94 . As the reservoir circuit 92, the semiconductor devices of Examples 1 to 7 can be used.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations can be made within the scope of the gist of the present invention described in the scope of claims. Change is possible.

Note that the following notes are further disclosed with respect to the above description.
(Supplementary Note 1) A substrate and a first semiconductor layer of a first conductivity type provided on the substrate in a first direction and a second direction intersecting the first direction, and provided on the first semiconductor layer a second semiconductor layer of a second conductivity type opposite to the first conductivity type, a plurality of nanowire diodes having diameters different from each other; a first conductive member that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes that are adjacent in the second direction.
(Appendix 2) The semiconductor device according to Appendix 1, wherein the plurality of nanowire diodes has a uniform number distribution with respect to diameter.
(Appendix 3) The semiconductor device according to Appendix 1 or 2, wherein the plurality of nanowire diodes are arranged in a grid pattern in the first direction and the second direction.
(Appendix 4) The first conductive member includes a conductive layer connected to a first end surface of the plurality of nanowire diodes on the substrate side, and a second end surface of the plurality of nanowire diodes opposite to the first end surface. and a metal wiring layer to be connected, wherein the some nanowire diodes are connected by the first conductive member including the conductive layer or the metal wiring layer having different cross-sectional areas perpendicular to the extending direction. 4. The semiconductor device according to any one of claims 1 to 3, wherein the semiconductor device is
(Appendix 5) The semiconductor device according to appendix 4, wherein the conductive layers or the metal wiring layers have different widths and different cross-sectional areas.
(Appendix 6) The first conductive member includes a conductive layer connected to a first end surface of the plurality of nanowire diodes on the substrate side, and a second end surface of the plurality of nanowire diodes opposite to the first end surface. a connecting metal wiring layer; and a conductive pillar connecting the conductive layer and the metal wiring layer, wherein the conductive pillar comprises dummy nanowires having the same structure as the plurality of nanowire diodes, and the dummy nanowires. and a metal film covering the surface of the semiconductor device according to any one of appendices 1 to 3.
(Appendix 7) The first conductive member includes a conductive layer connected to a first end surface of the plurality of nanowire diodes on the substrate side, and a second end surface of the plurality of nanowire diodes opposite to the first end surface. a connecting metal wiring layer; and a conductive pillar connecting the conductive layer and the metal wiring layer, wherein some nanowire diodes among the plurality of nanowire diodes are connected to the first end face. 4. The semiconductor device according to any one of appendices 1 to 3, wherein a conductive layer and the metal wiring layer connected to the second end surface are connected by the conductive pillar.
Clause 8. The semiconductor device of any one of Clauses 1 to 7, wherein the plurality of nanowire diodes are tunnel diodes.
(Appendix 9) Any one of Appendices 1 to 8, comprising an output terminal electrode electrically connected to the plurality of nanowire diodes, and a memristor connected between the plurality of nanowire diodes and the output terminal electrode. A semiconductor device according to any preceding claim.
(Appendix 10) The semiconductor device according to appendix 9, further comprising a second conductive member electrically connecting the memristor and the first conductive member such that an output from the memristor is fed back to the plurality of nanowire diodes. .
(Appendix 11) An input circuit, a reservoir circuit to which data is input from the input circuit, and an output circuit to which data processed by the reservoir circuit is input, wherein the reservoir circuit includes a substrate, and the substrate A first semiconductor layer of a first conductivity type and a semiconductor layer of the opposite conductivity type provided on the first semiconductor layer and provided side by side in a first direction and a second direction intersecting the first direction. a plurality of nanowire diodes including a second semiconductor layer of a second conductivity type and having different diameters; and nanowire diodes connected to end surfaces of the plurality of nanowire diodes and adjacent in the first direction and the second direction. and a first conductive member that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes to each other.
(Appendix 12) A first conductive type first semiconductor layer and the first conductive layer provided on the first semiconductor layer so as to be aligned on the substrate in a first direction and a second direction intersecting the first direction forming a plurality of nanowire diodes having different diameters, comprising a second semiconductor layer of a second conductivity type opposite to the type and having different diameters; forming a conductive member electrically connecting all of the plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent to each other in the second direction. Method.

REFERENCE SIGNS LIST 10 substrate 12, 14 insulating film 20 conductive member 22 conductive layer 24 metal pillar 26 metal wiring layer 28 electrode 30 input terminal electrode 32 output terminal electrode 34 conductive pillar 36 metal film 40 dummy nanowires 42, 44 semiconductor layer 50-50g nanowire Diodes 52 , 54 Semiconductor layers 56 , 58 End face 70 Memristors 72 , 74 Semiconductor layer 76 Oxide film 80 Conductive member 82 Metal wiring layer 84 Conductive pillar 90 Input circuit 92 Reservoir circuit 94 Output circuit 96 Learning data circuit 98 Read weighting section 100 ～700 Semiconductor devices 800 Computers

Claims (11)

a substrate;
A first semiconductor layer of a first conductivity type and the first conductivity type provided on the first semiconductor layer are arranged on the substrate in a first direction and a second direction intersecting the first direction. a plurality of nanowire diodes comprising second semiconductor layers of opposite second conductivity type and having different diameters;
connecting to the end surfaces of the plurality of nanowire diodes, and connecting only some of the nanowire diodes adjacent to each other in the first direction and the second direction to electrically connect the plurality of nanowire diodes as a whole; a connecting first conductive member;
The first conductive member includes a conductive layer connected to first end surfaces of the plurality of nanowire diodes on the substrate side, and a metal wiring connected to second end surfaces of the plurality of nanowire diodes opposite to the first end surfaces. a layer and
The semiconductor device , wherein the plurality of nanowire diodes has a uniform distribution of the number of the plurality of nanowire diodes with respect to diameter . 2. The semiconductor device of claim 1, wherein the number distribution of the plurality of nanowire diodes with respect to diameter is within ±10% of the average number of the plurality of nanowire diodes. 3. The first conductive member according to claim 1, wherein said part of said nanowire diodes are connected to each other by said first conductive member including said conductive layer or said metal wiring layer having different cross-sectional areas perpendicular to the extending direction. semiconductor device. the first conductive member includes a conductive pillar connecting the conductive layer and the metal wiring layer;
3. The semiconductor device according to claim 1, wherein said conductive pillars include dummy nanowires having the same structure as said plurality of nanowire diodes, and a metal film covering surfaces of said dummy nanowires. the first conductive member includes a conductive pillar connecting the conductive layer and the metal wiring layer;
In some nanowire diodes among the plurality of nanowire diodes, the conductive layer connected to the first end surface and the metal wiring layer connected to the second end surface are connected by the conductive pillar. Item 3. The semiconductor device according to Item 1 or 2. 6. The semiconductor device of any one of claims 1-5, wherein the plurality of nanowire diodes are tunnel diodes. an output terminal electrode electrically connected to the plurality of nanowire diodes;
7. The semiconductor device of any one of claims 1-6, comprising a memristor connected between the plurality of nanowire diodes and the output terminal electrode. 8. The semiconductor device of claim 7, comprising a second conductive member electrically connecting said memristor and said first conductive member such that output from said memristor is fed back to said plurality of nanowire diodes. 9. The semiconductor device according to any one of claims 1 to 8, wherein said conductive layer consists of n-GaAs . an input circuit;
a reservoir circuit to which data is input from the input circuit;
an output circuit to which data processed by the reservoir circuit is input,
The reservoir circuit is provided on a substrate and on the substrate side by side in a first direction and a second direction intersecting the first direction, and is provided on a first conductivity type first semiconductor layer and the first semiconductor layer. a second semiconductor layer of a second conductivity type opposite to the first conductivity type, a plurality of nanowire diodes having diameters different from each other; connected to end surfaces of the plurality of nanowire diodes; a first conductive member that electrically connects all of the plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent to each other in the second direction ; The conductive member includes a conductive layer connected to first end surfaces of the plurality of nanowire diodes on the substrate side, and a metal wiring layer connected to second end surfaces of the plurality of nanowire diodes opposite to the first end surfaces. wherein said plurality of nanowire diodes comprises a semiconductor device having a constant distribution of number of said plurality of nanowire diodes with respect to diameter . A first semiconductor layer of a first conductivity type and a semiconductor layer having a conductivity type opposite to the first conductivity type provided on the first semiconductor layer so as to be aligned on a substrate in a first direction and a second direction intersecting the first direction. forming a plurality of nanowire diodes having different diameters, including a second semiconductor layer of a second conductivity type;
connecting to the end surfaces of the plurality of nanowire diodes, and connecting only some of the nanowire diodes adjacent to each other in the first direction and the second direction to electrically connect the plurality of nanowire diodes as a whole; forming a connecting conductive member ;
The conductive member includes a conductive layer connected to first end surfaces of the plurality of nanowire diodes on the substrate side, and a metal wiring layer connected to second end surfaces of the plurality of nanowire diodes opposite to the first end surfaces. including
The method of manufacturing a semiconductor device , wherein the plurality of nanowire diodes has a constant distribution of the number of the plurality of nanowire diodes with respect to diameter .

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