JP2020181937A - Semiconductor device, computer, and manufacturing method of semiconductor device - Google Patents

Abstract

To well control a connection relationship between a plurality of nonlinear elements.SOLUTION: A semiconductor device includes: a substrate; a plurality of nanowire diodes that are provided on the substrate side by side in a first direction and a second direction intersecting the first direction, and include a first conductive type first semiconductor layer and a second conductive type second semiconductor layer opposite to the first conductive type provided on the first semiconductor layer, and have different diameters; and a first conductive member that is connected to the end faces of the plurality of nanowire diodes, that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent to each other in the first direction and the second direction.SELECTED DRAWING: Figure 1

Description

The present invention relates to semiconductor devices, computers, and methods for manufacturing semiconductor devices.

Neuromorphic computing that imitates the structure of the brain is known. Among them, reservoir computing suitable for time-series information processing is attracting attention. Reservoir computing uses network-type devices that include non-linear elements called reservoirs.

For example, a neuromorphic device using polyoxometallate and carbon nanotubes is known (for example, Non-Patent Document 1). Further, a neuromorphic integrated circuit is known in which a plurality of conductive pins extend vertically from a semiconductor integrated circuit layer and a plurality of conductive pins are connected by a nanowire interconnection layer including a memristive layer (for example, Patent Documents). 1). A device having a structure in which an information processing unit and a vertical electrode array unit face each other and the vertical electrodes of the vertical electrode array unit are in contact with neurons of the information processing unit or separated by a predetermined distance is known (for example, Patent Document 2).

Japanese Patent Publication No. 2011-507232 JP-A-2007-226762

Hirofumi Tanaka, 8 outsiders, "A molecular neuromorphic network device consisting of single-walled carbon nanotubes complexed with polyoxometalate", NATURE COMMUNICATIONS, July 12, 2018

The device described in Non-Patent Document 1 has a structure in which a plurality of polyoxometallates, which are non-linear polymers, are connected by carbon nanotubes, and thus is excellent in integration. However, it is difficult to connect a plurality of polyoxometalates with carbon nanotubes so as to have a desired connection relationship. If the connection relationship of a plurality of polyoxometallates, that is, a plurality of non-linear elements varies from production lot to production lot, the performance will vary.

On one aspect, it is an object to be able to satisfactorily control the connection relationship of a plurality of nonlinear elements.

In one embodiment, the substrate is provided side by side on the substrate in a second direction intersecting the first direction and the first direction, and is provided on the first conductive type first semiconductor layer and the first semiconductor layer. A plurality of nanowire diodes having a second semiconductor layer opposite to that of the first conductive type and having different diameters are connected to the end faces of the plurality of nanowire diodes, and the first direction and the plurality of nanowire diodes are connected to each other. The semiconductor device includes a first conductive member that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent to each other in the second direction.

In one embodiment, the reservoir circuit comprises an input circuit, a reservoir circuit into which data is input from the input circuit, and an output circuit in which data processed by the reservoir circuit is input. Opposite to the first conductive type first semiconductor layer provided on the substrate and the first conductive type provided on the first semiconductor layer, which are provided side by side in the second direction intersecting the first direction and the first direction. A plurality of nanowire diodes having different diameters and connected to the end faces of the plurality of nanowire diodes, including the second conductive type second semiconductor layer of the above, and adjacent nanowire diodes in the first direction and the second direction. A computer including a semiconductor device having a first conductive member that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes to each other.

In one embodiment, the first conductive type first semiconductor layer and the first semiconductor layer provided on the first semiconductor layer are arranged on the substrate in the second direction intersecting the first direction and the first direction. A step of forming a plurality of nanowire diodes having different diameters, including a second conductive type second semiconductor layer opposite to the conductive type, and connecting to the end faces of the plurality of nanowire diodes in the first direction and A semiconductor device comprising a step of forming a conductive member that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent to each other in the second direction. It is a manufacturing method.

As one aspect, the connection relationship between a plurality of nanowire diodes (non-linear elements) can be satisfactorily controlled.

1 (a) is a top view of the semiconductor device according to the first embodiment, FIG. 1 (b) is a sectional view between A and A of FIG. 1 (a), and FIG. 1 (c) is FIG. 1 (a). It is sectional drawing between BB of). 2 (a) to 2 (d) are cross-sectional views (No. 1) showing a method of manufacturing a semiconductor device according to the first embodiment. 3 (a) to 3 (c) are cross-sectional views (No. 2) showing a method of manufacturing a semiconductor device according to the first embodiment. 4 (a) is a top view of the semiconductor device according to the second embodiment, FIG. 4 (b) is a sectional view between A and A of FIG. 4 (a), and FIG. 4 (c) is FIG. 4 (a). It is sectional drawing between BB of). FIG. 5 is a cross-sectional view of the semiconductor device according to the third embodiment. 6 (a) to 6 (c) are cross-sectional views (No. 1) showing a method of manufacturing a semiconductor device according to the third embodiment. 7 (a) to 7 (c) are cross-sectional views (No. 2) showing a method of manufacturing a semiconductor device according to the third embodiment. 8 (a) is a top view of the semiconductor device according to the fourth embodiment, FIG. 8 (b) is a sectional view between A and A of FIG. 8 (a), and FIG. 8 (c) is FIG. 8 (a). It is sectional drawing between BB of). FIG. 9 is a cross-sectional view of the semiconductor device according to the fifth embodiment. 10 (a) is a top view of the semiconductor device according to the sixth embodiment, and FIG. 10 (b) is a cross-sectional view between A and A of FIG. 10 (a). 11 (a) is a top view of the semiconductor device according to the seventh embodiment, FIG. 11 (b) is a sectional view between A and A of FIG. 11 (a), and FIG. 11 (c) is FIG. 11 (a). It is sectional drawing between BB of). FIG. 12 is a block diagram showing a computer according to the eighth embodiment.

Hereinafter, examples of the present invention will be described with reference to the drawings.

1 (a) is a top view of the semiconductor device according to the first embodiment, FIG. 1 (b) is a sectional view between A and A of FIG. 1 (a), and FIG. 1 (c) is FIG. 1 (a). It is sectional drawing between BB of). In FIG. 1A, the nanowire diode 50 and the metal pillar 24 located below the metal wiring layer 26 are shown by dotted lines (FIGS. 4, 8 (a), 10 (a), and 11 below). The same applies to (a)). The semiconductor device 100 of the first embodiment is a semiconductor device used as a reservoir of a reservoir computing system (the same applies to the semiconductor devices of the second to seventh embodiments). As shown in FIGS. 1A to 1C, the semiconductor device 100 of the first embodiment is provided with a plurality of nanowire diodes 50 on a substrate 10. The plurality of nanowire diodes 50 are provided side by side in a grid pattern in the first direction and the second direction intersecting (for example, orthogonal to) the first direction. The substrate 10 is, for example, a semi-insulating semiconductor substrate, but other cases may be used. The substrate 10 is a semi-insulating GaAs substrate as an example.

The nanowire diode 50 includes a first conductive type (for example, n type) semiconductor layer 52 and a second conductive type (for example, p type) semiconductor layer 54 bonded to the semiconductor layer 52, which is opposite to the first conductive type. Are stacked in the longitudinal direction. That is, the nanowire diode 50 is a semiconductor diode having a pn junction in which an n-type semiconductor layer 52 and a p-type semiconductor layer 54 are bonded. The n-type semiconductor layer 52 is, for example, a sulfur (S) -doped n-InAs layer. The p-type semiconductor layer 54 is, for example, a zinc (Zn) -doped p-GaAsSb layer. The height (length) of the nanowire diode 50 is, for example, about 1.5 μm to 2.0 μm. The plurality of nanowire diodes 50 are composed of nanowire diodes 50 having various diameters. That is, the plurality of nanowire diodes 50 have different diameters from each other. The diameters of the plurality of nanowire diodes 50 vary, for example, in the range of about 20 nm to 100 nm.

A conductive layer 22 is provided between the substrate 10 and the nanowire diode 50. The conductive layer 22 is in contact with the end surface 56 of the nanowire diode 50 on the substrate 10 side. In the first embodiment, the conductive layer 22 is in contact with the end face of the n-type semiconductor layer 52 constituting the nanowire diode 50. The conductive layer 22 is separated in an island shape so that the portions where the plurality of nanowire diodes 50 are in contact with each other are electrically separated from each other. The conductive layer 22 is, for example, a conductive semiconductor layer, but may be another case such as a metal layer. The conductive layer 22 is, for example, an n-GaAs layer doped with silicon (Si). The thickness of the conductive layer 22 is, for example, about 100 nm to 200 nm.

An insulating film 12 is provided on the substrate 10 so as to cover the conductive layer 22. The insulating film 12 is, for example, an inorganic insulating film such as a silicon nitride film or a silicon oxide film, but may be an organic insulating film such as a resin film. The thickness of the insulating film 12 on the conductive layer 22 is, for example, about 50 nm.

An insulating film 14 that covers the side surface of the nanowire diode 50 is provided on the insulating film 12. The end surface 58 of the nanowire diode 50 opposite to the substrate 10 is exposed from the upper surface of the insulating film 14. In the first embodiment, the end face of the p-type semiconductor layer 54 constituting the nanowire diode 50 is exposed from the upper surface of the insulating film 14. The insulating film 14 is, for example, a resin film formed of a BCB (Benzocyclobutene) resin, but may be another organic insulating film or an inorganic insulating film.

A metal wiring layer 26 in contact with the end face 58 of the nanowire diode 50 is provided on the insulating film 14. The metal wiring layer 26 has an electrode 28 at a position where it comes into contact with the end face 58 of the nanowire diode 50. The electrode 28 has a circular shape, for example, but may have another shape such as a rectangular shape. A metal pillar 24 is provided that penetrates the insulating films 12 and 14 and has one end face in contact with the conductive layer 22 and the other end face in contact with the metal wiring layer 26. The metal wiring layer 26 and the metal pillar 24 are made of a metal having high conductivity such as copper or gold. The metal wiring layer 26 and the metal pillar 24 may be made of the same metal or may be made of different metals. The diameter of the metal pillar 24 is, for example, about 1 μm to 5 μm. The thickness of the metal wiring layer 26 is, for example, about 1 μm to 5 μm. Here, the conductive layer 22, the metal pillar 24, and the metal wiring layer 26 are collectively referred to as the conductive member 20.

The plurality of nanowire diodes 50 are connected between the input terminal electrode 30 and the output terminal electrode 32, which are a part of the metal wiring layer 26, and are provided side by side in a grid pattern in the first direction and the second direction. The signal input to the input terminal electrode 30 is output from the output terminal electrode 32 after passing through the plurality of nanowire diodes 50. The plurality of nanowire diodes 50 are connected in a network by being electrically connected by the conductive member 20, but the nanowire diodes 50 adjacent to each other in the first direction and the second direction are all electrically connected by the conductive member 20. It is not connected as a diode. Some nanowire diodes 50 adjacent to each other in the first direction and the second direction are not electrically connected by the conductive member 20, and the remaining nanowire diodes 50 adjacent to each other in the first direction and the second direction are conductive to each other. It is electrically connected by the member 20. In the first embodiment, the nanowire diodes 50 adjacent to each other in the first direction are electrically connected to each other so that their end faces 58 are connected by a metal wiring layer 26. The nanowire diodes 50 adjacent to each other in the second direction are electrically connected to each other by connecting the end face 56 of one nanowire diode 50 and the end face 58 of the other nanowire diode 50 with a conductive layer 22, a metal pillar 24, and a metal wiring layer 26. Is connected.

The widths of the metal wiring layers 26 that connect the nanowire diodes 50 adjacent to each other in the first direction and the second direction are the same. Further, the diameters of the plurality of metal pillars 24 are also the same. It should be noted that the same size includes substantially the same size that differs in degree of manufacturing error.

Since the plurality of nanowire diodes 50 have various diameters, the plurality of nanowire diodes 50 are connected (contacted) to the electrode 28 with various connection areas (contact areas). Therefore, the plurality of nanowire diodes 50 are electrically connected to the electrode 28 with various connection resistances (contact resistances). That is, since the plurality of nanowire diodes 50 have different diameters, the plurality of nanowire diodes 50 are connected (contacted) to the electrode 28 with different connection areas (contact areas). Therefore, the plurality of nanowire diodes 50 are electrically connected to the electrode 28 with different connection resistances (contact areas).

As described above, the semiconductor device 100 includes a plurality of non-linear elements having different non-linearity by including a plurality of nanowire diodes 50 having different diameters from each other. The plurality of nanowire diodes 50 function as neuron elements when the semiconductor device 100 is used as a reservoir in a reservoir computing system. Further, by connecting (contacting) the end faces 56 and 58 of the plurality of nanowire diodes 50 having different diameters of the conductive member 20, the connection resistance (contact resistance) of the plurality of nanowire diodes 50 with the conductive member 20. Is different. Due to the difference in connection resistance between the nanowire diode 50 and the conductive member 20, weighting of the connection of a plurality of nanowire diodes 50 is realized when the semiconductor device 100 is used as a reservoir. Further, the connection weighting of the plurality of nanowire diodes 50 is realized by the fact that some of the adjacent nanowire diodes 50 are not electrically connected to each other and the remaining nanowire diodes 50 are electrically connected to each other. .. Therefore, the semiconductor device 100 can be used as a reservoir of the reservoir computing system.

2 (a) to 3 (c) are cross-sectional views showing a method of manufacturing a semiconductor device according to the first embodiment. As shown in FIG. 2A, for example, on a semi-insulating GaAs substrate having a surface crystal orientation of (111) B on the substrate 10, for example, using the MOCVD (Metal Organic Chemical Vapor Deposition) method, from n-GaAs. The conductive layer 22 is grown. For example, silicon (Si) is used for doping the n-type impurities, and the Si concentration is, for example, 1 × 10 ¹⁸ cm ^-3 to 1 × 10 ²⁰ cm ^-3 . The thickness of the conductive layer 22 is, for example, about 100 nm to 200 nm.

As shown in FIG. 2B, a part of the conductive layer 22 is removed by using, for example, a photolithography method and an etching method, and the conductive layer 22 is separated into islands.

As shown in FIG. 2C, an insulating film 12 made of, for example, a silicon nitride film covering the conductive layer 22 is formed on the substrate 10 by using, for example, a plasma CVD method. The thickness of the insulating film 12 on the conductive layer 22 is, for example, about 50 nm. After that, the insulating film 12 in the region where the nanowire diode 50 is formed is removed by using, for example, a photolithography method and an etching method to form a plurality of openings in the insulating film 12 in which the conductive layer 22 is exposed. The plurality of openings have various sizes of openings. After that, a plurality of metal thin films 102 are formed on the conductive layer 22 exposed by the plurality of openings of the insulating film 12 by using, for example, a vacuum deposition method and a lift-off method. The metal thin film 102 is, for example, a gold (Au) film. The metal thin film 102 serves as a catalyst for the growth of nanowires. Since the plurality of openings have various sizes, the plurality of metal thin films 102 have diameters of various sizes. The diameters of the plurality of metal thin films 102 vary, for example, in the range of about 20 nm to 100 nm.

As shown in FIG. 2D, a semiconductor layer 52 made of, for example, n-InAs and a semiconductor layer 54 made of p-GaAsSb are included on the metal thin film 102 formed in the opening of the insulating film 12, for example, by using the MOCVD method. The nanowire diode 50 is grown. The growth temperature is, for example, 400 ° C. to 450 ° C. As a raw material, trimethylindium (TMIn), triethylgallium (TEGa), arsine (AsH ₃ ), and trimethylantimony (TMSb) are used. For doping of n-type impurities, sulfur (S) is doped by supplying hydrogen sulfide (H ₂ S) during growth. The S concentration is, for example, 1 × 10 ¹⁸ cm ^-3 to 1 × 10 ²⁰ cm ^-3 . For doping of p-type impurities, zinc (Zn) is doped by supplying diethylzinc (DEZn) during growth. The Zn concentration is, for example, 1 × 10 ¹⁸ cm ^-3 to 1 × 10 ²⁰ cm ^-3 . By properly controlling the doping concentration and bandgap, a tunnel junction can be formed and can function as a backward diode. The height of the semiconductor layer 52 is, for example, about 0.5 μm to 0.7 μm, the height of the semiconductor layer 54 is, for example, about 0.8 μm to 1.5 μm, and the height of the nanowire diode 50 is, for example, about 1.5 μm to 1.5 μm. It is about 2.0 μm. Since the plurality of openings of the plurality of metal thin films 102 and the insulating film 12 on which the metal thin films 102 are formed have various sizes, a plurality of nanowire diodes 50 having various diameters are grown.

As shown in FIG. 3A, an insulating film 14 made of, for example, a BCB resin, in which the nanowire diode 50 is embedded is formed on the insulating film 12. Then, the insulating film 14 is flattened by etchback until the end face 58 of the nanowire diode 50 is exposed.

As shown in FIG. 3B, the insulating films 12 and 14 in the region forming the metal pillar 24 are removed by using, for example, a photolithography method and an etching method, and a plurality of through holes penetrating the insulating films 12 and 14 are formed. Form. Then, for example, a vacuum vapor deposition method and a plating method are used to form a metal pillar 24 made of copper or gold having a diameter of, for example, about 1 μm to 5 μm, which is embedded in a plurality of through holes. The plurality of through holes penetrating the insulating films 12 and 14 have, for example, the same diameter, and the plurality of metal pillars 24 embedded in the plurality of through holes have, for example, the same diameter. The same diameter includes substantially the same diameter that differs in degree of manufacturing error.

As shown in FIG. 3C, the electrode 28 and the input and output terminal electrodes 30 and 32 are included on the insulating film 14 including the end face 58 of the nanowire diode 50, for example, by using a vacuum deposition method and a lift-off method, for example, a thickness. A metal wiring layer 26 having a thickness of about 1 μm to 5 μm is formed. As described above, the semiconductor device 100 of the first embodiment is formed.

According to the first embodiment, a plurality of nanowire diodes 50 arranged in the first direction and the second direction are provided on the substrate 10. The plurality of nanowire diodes 50 include an n-type semiconductor layer 52 and a p-type semiconductor layer 54 provided on the semiconductor layer 52, and have different diameters from each other. Of the nanowire diodes 50 adjacent to each other in the first direction and the second direction, only some of the nanowire diodes 50 are connected by a conductive member 20 connected to the end faces 56 and 58 of the nanowire diodes 50. Further, the entire plurality of nanowire diodes 50 are electrically connected by the conductive member 20. Thereby, as described above, the semiconductor device 100 can be used as a reservoir of the reservoir computing system. Since the semiconductor device 100 is manufactured by using semiconductor technology, a plurality of nanowire diodes 50 (non-linear elements) are compared with the case where non-linear polymers are electrically connected by carbon nanotubes as in Non-Patent Document 1. The connection relationship can be controlled well. Further, since the semiconductor device 100 is composed of the nanowire diode 50 and the conductive member 20, the number of parts can be reduced and the power consumption can be kept low.

In the first embodiment, it is preferable that the number of the plurality of nanowire diodes 50 for each size of the diameter is constant. That is, it is preferable that the distribution of the number of the plurality of nanowire diodes 50 with respect to the diameter value is constant. For example, it is preferable that the number of nanowire diodes 50 having diameters of 20 nm, 30 nm, 40 nm, ..., 90 nm and 100 nm is constant. As a result, the non-linearity distribution of the plurality of nanowire diodes 50 becomes good, and the performance of the reservoir using the semiconductor device 100 can be improved. Note that the constant number (constant number distribution) is not limited to the case where the number (number distribution) is completely the same, and the number (number distribution) is different to the extent that the non-linear distribution can be made good. Also includes. It is sufficient that the number of nanowire diodes 50 at each diameter is within the range of ± 10% of the average number of nanowire diodes 50 when a plurality of nanowire diodes 50 are distributed for each diameter.

The plurality of nanowire diodes 50 are preferably tunnel diodes. A tunnel diode is an element having strong non-linearity, and it is easy to weaken the non-linearity with respect to an element having strong non-linearity. Therefore, by using the tunnel diode for the nanowire diode 50, it is possible to increase the variation in the non-linearity of the plurality of nanowire diodes 50, and it is possible to improve the performance of the reservoir using the semiconductor device 100.

In the first embodiment, as an example of the tunnel diode, the case where the semiconductor layer 52 is made of n-InAs and the semiconductor layer 54 is made of p-GaAsSb is shown as an example, but other cases may be used. For example, the semiconductor layer 52 may be made of n-InGaAs, and the semiconductor layer 54 may be made of p-GaAsSb. For example, the semiconductor layer 52 may be made of n-GaAs, and the semiconductor layer 54 may be made of p-InSb. For example, the semiconductor layer 52 may be made of n-InGaAs and the semiconductor layer 54 may be made of p-AlInSb. Further, the nanowire diode 50 may not be a tunnel diode. In this case, for example, the semiconductor layer 52 may be made of n-GaAs, and the semiconductor layer 54 may be made of p-GaAs. Further, the nanowire diode 50 may be a pin junction via an i-type semiconductor instead of the pn junction.

In Example 1, a case where a plurality of nanowire diodes 50 are arranged in a grid pattern in the first direction and a second direction is shown as an example, but a case where the nanowire diodes 50 are arranged in a staggered pattern in the first direction and the second direction is shown as an example. And other shapes may be used.

4 (a) is a top view of the semiconductor device according to the second embodiment, FIG. 4 (b) is a sectional view between A and A of FIG. 4 (a), and FIG. 4 (c) is FIG. 4 (a). It is sectional drawing between BB of). As shown in FIGS. 4A to 4C, in the semiconductor device 200 of the second embodiment, the plurality of metal wiring layers 26 are configured to include metal wiring layers 26 having various widths. That is, the metal wiring layer 26 connecting the adjacent nanowire diodes 50a and 50b in the first direction and the metal wiring layer 26 connecting the adjacent nanowire diodes 50b and 50c in the first direction have different widths. There is. Further, the metal wiring layer 26 connecting the adjacent nanowire diodes 50d and 50e in the second direction and the metal wiring layer 26 connecting the adjacent nanowire diodes 50e and 50f in the second direction have different widths and lengths. There is. Since the plurality of metal wiring layers 26 have the same thickness, the areas of the cross sections orthogonal to the extending direction are different due to the different wiring widths. Since other configurations are the same as those in the first embodiment, the description thereof will be omitted.

According to the second embodiment, the plurality of nanowire diodes 50 adjacent to each other in the first direction and the second direction are conductive members 20 including metal wiring layers 26 having various sizes of cross-sectional areas orthogonal to the extending direction. Connected by. That is, the plurality of nanowire diodes 50 adjacent to each other in the first direction and the second direction are connected by a conductive member 20 including a metal wiring layer 26 having different cross-sectional areas orthogonal to the extending direction. In the first embodiment, the connection resistance of the nanowire diode 50 and the conductive member 20 and the layout of the conductive member 20 realize the weighting of the connection of the plurality of nanowire diodes 50. In the second embodiment, the connection resistance of the nanowire diode 50 and the conductive member 20 and the electrical resistance of the conductive member 20 can be added to the layout of the conductive member 20 to realize weighting of the connection of the plurality of nanowire diodes 50. Therefore, the weighting can be finely controlled, and the performance of the reservoir using the semiconductor device 200 can be improved.

In Example 2, the case where the cross-sectional area is different due to the difference in the width of the metal wiring layer 26 is shown as an example, but the case where the cross-sectional area is different due to the difference in the thickness of the metal wiring layer 26 may be used.

The diameters of the metal pillars 24 included in the plurality of conductive members 20 may be different from each other in the conductive members 20 connecting the plurality of adjacent nanowire diodes 50 to each other. In this case, the weighting can be controlled more finely.

FIG. 5 is a cross-sectional view of the semiconductor device according to the third embodiment. As shown in FIG. 5, in the semiconductor device 300 of the third embodiment, instead of the metal pillar 24, a conductive pillar 34 having a dummy nanowire 40 and a metal film 36 covering the surface of the dummy nanowire 40 is provided. The dummy nanowire 40 has the same structure as the nanowire diode 50. That is, the dummy nanowire 40 is configured to include a semiconductor layer 42 made of the same material as the semiconductor layer 52, and a semiconductor layer 44 provided on the semiconductor layer 42 and made of the same material as the semiconductor layer 54. The metal film 36 is made of a metal having high conductivity such as copper or gold. The metal film 36 may be formed of the same material as the metal wiring layer 26, or may be formed of a different material. Further, an insulating film 60 made of an inorganic insulating film such as an aluminum oxide film is provided on the insulating film 12. The insulating film 60 is thinner than the nanowire diode 50 and the dummy nanowire 40, and extends from the upper surface of the insulating film 12 along the side surface of the nanowire diode 50. Since other configurations are the same as those in the first embodiment, the description thereof will be omitted.

6 (a) to 7 (c) are cross-sectional views showing a method of manufacturing a semiconductor device according to the third embodiment. As shown in FIG. 6A, the conductive layer 22 is formed on the substrate 10 by using, for example, the MOCVD method. For example, a part of the conductive layer 22 is removed by using a photolithography method and an etching method, and the conductive layer 22 is separated into islands. An insulating film 12 covering the conductive layer 22 is formed on the substrate 10 by using, for example, a plasma CVD method. After that, the insulating film 12 in the region where the nanowire diode 50 and the dummy nanowire 40 are formed is removed by using, for example, a photolithography method and an etching method, and a plurality of openings in which the conductive layer 22 is exposed are formed in the insulating film 12. A plurality of metal thin films 102 are formed on the conductive layer 22 exposed by the plurality of openings of the insulating film 12 by, for example, a vacuum deposition method and a lift-off method. The metal thin film 102 serves as a catalyst for the growth of nanowires.

As shown in FIG. 6B, nanowire-shaped semiconductor layers 52 and 42 made of n-InAs are grown on the metal thin film 102 formed in the opening of the insulating film 12 by using, for example, the MOCVD method. Nanowire-shaped semiconductor layers 54 and 44 made of p-GaAsSb are grown on the semiconductor layers 52 and 42. The semiconductor layers 52 and 54 form the nanowire diode 50. The semiconductor layers 42 and 44 form a dummy nanowire 40 having the same structure as the nanowire diode 50. The diameter of the dummy nanowire 40 is smaller than, for example, the diameter of the nanowire diode 50.

After forming the nanowire diode 50 and the dummy nanowire 40, an insulating film 60 covering the nanowire diode 50 and the dummy nanowire 40 is formed. The insulating film 60 is thinner than the nanowire diode 50 and the dummy nanowire 40, and is formed so as to extend from the upper surface of the insulating film 12 along the surfaces of the nanowire diode 50 and the dummy nanowire 40. Then, the insulating films 60 and 12 around the dummy nanowire 40 are removed by using, for example, a photolithography method and an etching method. As a result, the conductive layer 22 is exposed around the dummy nanowire 40.

As shown in FIG. 6C, for example, a sputtering method is used to form a metal film 36 that covers the nanowire diode 50 and the dummy nanowire 40. The metal film 36 is formed in contact with the surface of the dummy nanowire 40 and the conductive layer 22 exposed around the dummy nanowire 40.

As shown in FIG. 7A, a photoresist film 104 that covers the dummy nanowire 40 and does not cover other regions such as the nanowire diode 50 is formed. Then, the metal film 36 is etched using the photoresist film 104 as a mask. As a result, the metal film 36 formed in contact with the surface of the dummy nanowire 40 remains, and the metal film 36 formed on the surface other than the surface of the dummy nanowire 40, such as the metal film 36 covering the nanowire diode 50, is removed. As a result, the conductive pillar 34 having the dummy nanowire 40 and the metal film 36 covering the surface of the dummy nanowire 40 is formed.

As shown in FIG. 7B, after removing the photoresist film 104, an insulating film 14 in which the nanowire diode 50 and the conductive pillar 34 are embedded is formed on the insulating film 60. Then, the insulating film 14 is etched back until the end face 58 of the nanowire diode 50 and the end face of the conductive pillar 34 are exposed.

As shown in FIG. 7C, a metal wiring layer 26 is formed on the insulating film 14 including the end face 58 of the nanowire diode 50 and the end face of the conductive pillar 34 by, for example, a vacuum deposition method and a lift-off method. As a result, the semiconductor device 300 of Example 3 is formed.

In the first embodiment, a case where the metal pillar 24 is provided as a conductive pillar for electrically connecting the conductive layer 22 and the metal wiring layer 26 is shown as an example, but the case is not limited to this case. As in the third embodiment, the conductive layer 22 and the metal wiring layer 26 are electrically formed by a conductive pillar 34 including a dummy nanowire 40 having the same structure as the nanowire diode 50 and a metal film 36 covering the surface of the dummy nanowire 40. It may be connected to. The minimum diameter of the metal pillar 24 that can be manufactured is about several μm, whereas the diameter of the conductive pillar 34 can be submicron. Therefore, the semiconductor device 300 can be miniaturized, and the swing width of the electric resistance of the conductive member 20 can be increased.

8 (a) is a top view of the semiconductor device according to the fourth embodiment, FIG. 8 (b) is a sectional view between A and A of FIG. 8 (a), and FIG. 8 (c) is FIG. 8 (a). It is sectional drawing between BB of). In FIG. 8A, the conductive layer 22 covered with the insulating films 12 and 14 is shown by a dotted line. As shown in FIGS. 8 (a) to 8 (c), in the semiconductor device 400 of the fourth embodiment, the nanowire diodes 50 adjacent to each other in the first direction are connected by the conductive layer 22 at their respective end faces 56. They are electrically connected to each other. Further, the conductive layer 22 connecting the adjacent nanowire diodes 50a and 50b in the first direction and the conductive layer 22 connecting the adjacent nanowire diodes 50b and 50c in the first direction have different widths and lengths. Therefore, the area of the cross section orthogonal to the extending direction of the conductive layer 22 connecting the nanowire diodes 50a and 50b and the area of the cross section orthogonal to the extending direction of the conductive layer 22 connecting the nanowire diodes 50b and 50c are different. The size is different. Since other configurations are the same as those in the first embodiment, the description thereof will be omitted.

In the first embodiment, the case where the nanowire diodes 50 adjacent to each other in the first direction are connected by the metal wiring layer 26 is shown as an example, but even when the nanowire diodes 50 are connected by the conductive layer 22 as in the fourth embodiment. Good.

Further, according to the fourth embodiment, the plurality of nanowire diodes 50 adjacent to each other in the first direction are connected by a conductive member 20 including a conductive layer 22 having a cross-sectional area orthogonal to the extending direction and having various sizes. ing. That is, the plurality of nanowire diodes 50 adjacent to each other in the first direction are connected by a conductive member 20 including a conductive layer 22 having different cross-sectional areas orthogonal to each other in the extending direction. As a result, as in the second embodiment, the connection resistance of the nanowire diode 50 and the conductive member 20 and the electrical resistance of the conductive member 20 are added to the layout of the conductive member 20, and the connection of the plurality of nanowire diodes 50 is weighted. Can be realized. Therefore, the weighting can be finely controlled, and the performance of the reservoir using the semiconductor device 400 can be improved.

In Example 4, the case where the cross-sectional area is different due to the difference in the width of the conductive layer 22 is shown as an example, but the case where the cross-sectional area is different due to the difference in the thickness of the conductive layer 22 may be shown.

FIG. 9 is a cross-sectional view of the semiconductor device according to the fifth embodiment. As shown in FIG. 9, in the semiconductor device 500 of the fifth embodiment, in the nanowire diode 50g among the plurality of nanowire diodes 50, the conductive layer 22 connected to the end face 56 and the metal wiring layer 26 connected to the end face 58 are metal pillars. It is connected by 24. Since other configurations are the same as those in the first embodiment, the description thereof will be omitted.

As in the fifth embodiment, in some nanowire diodes 50g among the plurality of nanowire diodes 50, the conductive layer 22 connected to the end face 56 and the metal wiring layer 26 connected to the end face 58 are connected by the metal pillar 24. You may. As a result, the nanowire diode 50 g operates as a non-linear element having a retro loop. Therefore, the performance of the reservoir using the semiconductor device 500 can be improved.

10 (a) is a top view of the semiconductor device according to the sixth embodiment, and FIG. 10 (b) is a cross-sectional view between A and A of FIG. 10 (a). In FIG. 10A, the conductive layer 22 covered with the insulating films 12 and 14 is shown by a dotted line. As shown in FIGS. 10A and 10B, in the semiconductor device 600 of the sixth embodiment, a plurality of memristors 70, which are variable resistance elements, are electrically connected between the plurality of nanowire diodes 50 and the output terminal electrodes 32. It is connected to the. That is, one end of the memristor 70 is connected to the nanowire diode 50 via the metal wiring layer 26, the metal pillar 24, and the conductive layer 22, and the other end is connected to the output electrode terminal 32 via the conductive layer 22. The memristor 70 is, for example, a semiconductor layer 72 formed of the same material as the semiconductor layer 52 of the nanowire diode 50, a semiconductor layer 74 provided on the semiconductor layer 72 and formed of the same material as the semiconductor layer 54, and a semiconductor layer 72. , 74 is provided with an oxide film 76 that covers the periphery of the film 76. The memristor 70 is not limited to this structure, and may be in other cases as long as it functions as a variable resistance element. The oxide film 76 is, for example, a titanium oxide (TiO ₂ ) film, a nickel oxide (NiO) film, a cobalt oxide (CoO) film, or the like, but other cases may be used. Since other configurations are the same as those in the first embodiment, the description thereof will be omitted.

According to the sixth embodiment, the memristor 70 is connected between the plurality of nanowire diodes 50 and the output terminal electrodes 32. The resistance value of the memristor 70 changes according to the amount of current. Therefore, when a current flows from the plurality of nanowire diodes 50 to the output terminal electrode 32 via the memristor 70, the resistance value of the memristor 70 changes according to the amount of current. Therefore, the memristor 70 can store the weighting information based on the resistance value according to the signal strength.

11 (a) is a top view of the semiconductor device according to the seventh embodiment, FIG. 11 (b) is a sectional view between A and A of FIG. 11 (a), and FIG. 11 (c) is FIG. 11 (a). It is sectional drawing between BB of). In FIG. 11A, the conductive layer 22 and the metal wiring layer 82 covered with the insulating film 14 and the like are shown by dotted lines. Further, the conductive pillar 84 located below the metal wiring layer 26 is shown by a dotted line. As shown in FIGS. 11A to 11C, the semiconductor device 700 of the seventh embodiment has a plurality of semiconductor devices 700 between the plurality of nanowire diodes 50 and the output terminal electrodes 32, similarly to the semiconductor device 600 of the sixth embodiment. Memristor 70 is electrically connected. Further, a conductive member 80 for electrically connecting the conductive member 20 connected to the nanowire diode 50 and the memristor 70 is provided so that the current passing through the memristor 70 is fed back to the nanowire diode 50. The conductive member 80 is provided on the insulating film 12, and electrically connects the metal wiring layer 82 connected to the memory star 70, and the metal wiring layer 26 and the conductive layer 22 included in the metal wiring layer 82 and the conductive member 20. Includes a conductive pillar 84 to be connected. The conductive pillar 84 may be, for example, a pillar in which the surface of the dummy nanowire 40 is coated with a metal film 36, or may be a metal pillar. Since other configurations are the same as those in the first embodiment, the description thereof will be omitted.

According to the seventh embodiment, the conductive member 80 for electrically connecting the memristor 70 and the conductive member 20 (for example, the metal wiring layer 26) is provided so that the output from the memristor 70 is fed back to the nanowire diode 50. As a result, the data input from the input terminal electrode 30 and the data fed back from the memristor 70 via the conductive member 80 are processed by the plurality of nanowire diodes 50. Therefore, it is possible to efficiently learn the reservoir circuit using the semiconductor device 700.

The conductive member 80 is connected to the conductive member 20 located closer to the input terminal electrode 30 than the middle between the row of nanowire diodes 50 close to the input terminal electrode 30 and the row of nanowire diodes 50 close to the output terminal electrode 32. It is preferable to do so. As a result, the data fed back from the memristor 70 is input to many nanowire diodes 50. Therefore, it is more preferable that the conductive member 80 is connected to the conductive member 20 located in the row of the nanowire diodes 50 close to the input terminal electrode 30.

FIG. 12 is a block diagram showing a computer according to the eighth embodiment. As shown in FIG. 12, the computer 800 of the eighth embodiment includes an input circuit 90, a reservoir circuit 92, and an output circuit 94. The computer 800 may include a learning data circuit 96. At the time of learning, the read-out weighting unit 98 is adjusted so that the read-out weighting unit 98 appropriately weights based on the learning data (teacher data) input from the learning data circuit 96. When the computer 800 is used, the learning data circuit 96 is disconnected from the reservoir circuit 92. Then, data is input from the input circuit 90 to the reservoir circuit 92, and arithmetic processing of the data input by the reservoir circuit 92 is performed. The result of the arithmetic processing in the reservoir circuit 92 is output from the output circuit 94. As the reservoir circuit 92, the semiconductor devices of Examples 1 to 7 can be used.

Although the examples of the present invention have been described in detail above, the present invention is not limited to such specific examples, and various modifications and modifications are made within the scope of the gist of the present invention described in the claims. It can be changed.

The following additional notes will be further disclosed with respect to the above description.
(Appendix 1) The substrate is provided side by side on the substrate in a second direction intersecting the first direction and the first direction, and is provided on the first conductive type first semiconductor layer and the first semiconductor layer. A plurality of nanowire diodes having a second conductive type opposite to the first conductive type and having different diameters are connected to the end faces of the plurality of nanowire diodes, and the first direction and the said. A semiconductor device comprising a first conductive member that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent to each other in the second direction.
(Appendix 2) The semiconductor device according to Appendix 1, wherein the plurality of nanowire diodes have a constant distribution of the number with respect to the diameter.
(Supplementary Note 3) The semiconductor device according to Supplementary note 1 or 2, wherein the plurality of nanowire diodes are provided side by side in a grid pattern in the first direction and the second direction.
(Appendix 4) The first conductive member is formed on a conductive layer connected to the first end surface of the plurality of nanowire diodes on the substrate side and a second end surface of the plurality of nanowire diodes on the opposite side of the first end surface. A metal wiring layer to be connected, and some of the nanowire diodes are connected to each other by the conductive layer or the first conductive member including the metal wiring layer having different cross-sectional areas perpendicular to the extending direction. The semiconductor device according to any one of Appendix 1 to 3, which is described above.
(Appendix 5) The semiconductor device according to Appendix 4, wherein the conductive layer or the metal wiring layer has different cross-sectional areas due to different widths.
(Appendix 6) The first conductive member is formed on a conductive layer connected to the first end surface of the plurality of nanowire diodes on the substrate side and a second end surface of the plurality of nanowire diodes on the opposite side of the first end surface. The conductive pillar includes a metal wiring layer to be connected and a conductive pillar connecting the conductive layer and the metal wiring layer, and the conductive pillar includes a dummy nanowire having the same structure as the plurality of nanowire diodes and the dummy nanowire. The semiconductor device according to any one of Supplementary note 1 to 3, further comprising a metal film covering the surface of the above.
(Appendix 7) The first conductive member is formed on a conductive layer connected to the first end surface of the plurality of nanowire diodes on the substrate side and a second end surface of the plurality of nanowire diodes on the opposite side of the first end surface. A metal wiring layer to be connected, a conductive pillar connecting the conductive layer and the metal wiring layer, and a part of the nanowire diodes among the plurality of nanowire diodes are connected to the first end surface. The semiconductor device according to any one of Supplementary note 1 to 3, wherein the conductive layer and the metal wiring layer connected to the second end surface are connected by the conductive pillar.
(Supplementary Note 8) The semiconductor device according to any one of Supplementary note 1 to 7, wherein the plurality of nanowire diodes are tunnel diodes.
(Supplementary note 9) Any one of Supplementary note 1 to 8, further comprising an output terminal electrode electrically connected to the plurality of nanowire diodes and a memristor connected between the plurality of nanowire diodes and the output terminal electrode. The semiconductor device described in item 1.
(Appendix 10) The semiconductor device according to Appendix 9, further comprising a second conductive member that electrically connects the memristor and the first conductive member so that the output from the memristor feeds back to the plurality of nanowire diodes. ..
(Appendix 11) An input circuit, a reservoir circuit in which data is input from the input circuit, and an output circuit in which data processed by the reservoir circuit is input are provided, and the reservoir circuit includes a substrate and the substrate. Opposite to the first conductive type first semiconductor layer and the first conductive type provided on the first semiconductor layer, which are provided side by side in the second direction intersecting the first direction and the first direction. A plurality of nanowire diodes having a second conductive type second semiconductor layer and having different diameters, and nanowire diodes connected to the end faces of the plurality of nanowire diodes and adjacent to each other in the first direction and the second direction. A semiconductor device comprising a first conductive member that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes to each other.
(Appendix 12) The first conductive type first semiconductor layer and the first conductive layer provided on the first semiconductor layer so as to line up on the substrate in the second direction intersecting the first direction and the first direction. A step of forming a plurality of nanowire diodes having different diameters including a second semiconductor layer of a second conductive type opposite to the mold, and connecting to the end faces of the plurality of nanowire diodes, the first direction and the said. Manufacture of a semiconductor device including a step of forming a conductive member that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent to each other in the second direction. Method.

10 Substrate 12, 14 Insulation film 20 Conductive member 22 Conductive layer 24 Metal pillar 26 Metal wiring layer 28 Electrode 30 Input terminal electrode 32 Output terminal electrode 34 Conductive pillar 36 Metal film 40 Dummy nanowire 42, 44 Semiconductor layer 50-50g Nanowire Diode 52, 54 Semiconductor layer 56, 58 End face 70 Memory star 72, 74 Semiconductor layer 76 Oxide film 80 Conductive member 82 Metal wiring layer 84 Conductive pillar 90 Input circuit 92 Reservoir circuit 94 Output circuit 96 Learning data circuit 98 Read weight section 100 ~ 700 Semiconductor device 800 Computer

Claims (10)

With the board
A first conductive type semiconductor layer provided on the substrate side by side in a second direction intersecting the first direction and the first conductive type provided on the first semiconductor layer. Multiple nanowire diodes containing opposite second conductive second semiconductor layers and having different diameters,
By connecting to the end faces of the plurality of nanowire diodes and connecting only some of the nanowire diodes adjacent to each other in the first direction and the second direction, the entire plurality of nanowire diodes can be electrically connected. A semiconductor device comprising a first conductive member to be connected. The semiconductor device according to claim 1, wherein the plurality of nanowire diodes have a constant distribution of the number with respect to the diameter. The first conductive member includes a conductive layer connected to a first end surface of the plurality of nanowire diodes on the substrate side, and a metal wiring connected to a second end surface of the plurality of nanowire diodes on the opposite side of the first end surface. Including layers,
The first or second aspect, wherein some of the nanowire diodes are connected to each other by the first conductive member including the conductive layer or the metal wiring layer having different cross-sectional areas orthogonal to the extending direction. Semiconductor device. The first conductive member includes a conductive layer connected to the first end surface of the plurality of nanowire diodes on the substrate side, and a metal wiring connected to the second end surface of the plurality of nanowire diodes on the opposite side of the first end surface. Includes a layer and a conductive pillar that connects the conductive layer and the metal wiring layer.
The semiconductor device according to claim 1 or 2, wherein the conductive pillar includes a dummy nanowire having the same structure as the plurality of nanowire diodes and a metal film covering the surface of the dummy nanowire. The first conductive member includes a conductive layer connected to the first end surface of the plurality of nanowire diodes on the substrate side, and a metal wiring connected to the second end surface of the plurality of nanowire diodes on the opposite side of the first end surface. Includes a layer and a conductive pillar that connects the conductive layer and the metal wiring layer.
A claim that some nanowire diodes among the plurality of nanowire diodes have a conductive layer connected to the first end face and a metal wiring layer connected to the second end face connected by the conductive pillar. Item 3. The semiconductor device according to Item 1 or 2. The semiconductor device according to any one of claims 1 to 5, wherein the plurality of nanowire diodes are tunnel diodes. Output terminal electrodes electrically connected to the plurality of nanowire diodes,
The semiconductor device according to any one of claims 1 to 6, further comprising a memristor connected between the plurality of nanowire diodes and the output terminal electrode. The semiconductor device according to claim 7, further comprising a second conductive member that electrically connects the memristor and the first conductive member so that the output from the memristor feeds back to the plurality of nanowire diodes. With the input circuit
A reservoir circuit in which data is input from the input circuit and
An output circuit for inputting data processed by the reservoir circuit is provided.
The reservoir circuit is provided side by side with the substrate in a second direction intersecting the first direction and the first direction on the substrate, and is provided on the first conductive type first semiconductor layer and the first semiconductor layer. A plurality of nanowire diodes having a second semiconductor layer opposite to the first conductive type and having different diameters, and the end faces of the plurality of nanowire diodes are connected to each other in the first direction and The semiconductor device includes a first conductive member that electrically connects the entire plurality of nanowire diodes by connecting only some of the nanowire diodes adjacent to each other in the second direction. Computer. The first conductive type first semiconductor layer and the opposite of the first conductive type provided on the first semiconductor layer so as to line up on the substrate in the second direction intersecting the first direction and the first direction. A step of forming a plurality of nanowire diodes having different diameters from each other, including a second conductive type second semiconductor layer,
By connecting to the end faces of the plurality of nanowire diodes and connecting only some of the nanowire diodes adjacent to each other in the first direction and the second direction, the entire plurality of nanowire diodes can be electrically connected. A method for manufacturing a semiconductor device, comprising a step of forming a conductive member to be connected.

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