TWI657595B - Optoelectronic semiconductor device - Google Patents

Abstract

An optoelectronic semiconductor component includes: an epitaxial stack having a first region on a surface thereof and a second region except the first region; a first electrode on the epitaxial stack And electrically connected to the epitaxial layer, wherein the first region is substantially below the first electrode; a first current dispersion layer having a body portion and an extension extending from the body portion, the extension The portion is located on the second region; and a second current dispersion layer, the second current dispersion layer and the body portion are located between the epitaxial layer and the first electrode and located on the first region.

Description

Photoelectric semiconductor component

The present invention relates to an optoelectronic semiconductor component, and more particularly to an optoelectronic semiconductor component having a current dispersion layer structure.

With the advancement of semiconductor technology, today's optoelectronic semiconductor components such as laser or light emitting diodes (LEDs) have been widely used in many fields, such as communication, lighting, display, etc., especially LEDs. With high brightness and high color rendering, coupled with power saving, small size, low voltage drive and mercury free, LEDs have been widely used to replace traditional lighting technology in display and lighting applications. . Therefore, improving the photoelectric conversion efficiency of the optoelectronic semiconductor component, for example, how to balance the luminous efficiency and the electrical conductivity of the light-emitting diode, has been one of the focuses of research and development by researchers.

The present invention provides an optoelectronic semiconductor device comprising: an epitaxial layer, a surface of one of the epitaxial layers having a first region and a second region other than the first region; a first electrode located at the epitaxial layer And electrically connected to the epitaxial layer, wherein the first region is substantially below the first electrode; a first current dispersion layer having a body portion and an extension extending from the body portion The extension portion is located on the second region; and a second current dispersion layer, the second current dispersion layer and the body portion are located between the epitaxial layer and the first electrode and located on the first region.

The present invention will be described with reference to the drawings, in which the same or the same reference numerals are used in the drawings or the description, and in the drawings, the shape or thickness of the elements may be enlarged or reduced. It is to be noted that elements not shown or described in the specification may be in a form known to those skilled in the art.

1A is a top plan view of a photoelectric semiconductor device according to a first embodiment of the present invention, FIG. 1B is a cross-sectional view taken along line II' of FIG. 1A, and FIG. 1C is a partially enlarged view of FIG. 1B. As shown in FIG. 1A to FIG. 1C , in the present embodiment, the optoelectronic semiconductor device 100 includes an epitaxial layer 110 , a first electrode 120 , and a current dispersion layer 14 disposed on the epitaxial layer 110 and the first electrode 120 . The photo-semiconductor device 100 is a light-emitting diode, but is not limited thereto. For example, in some embodiments of the present invention, the optoelectronic semiconductor device 100 can also be a laser, a photo sensor, or a solar cell. . The epitaxial layer stack 110 has a surface S including a first region R1 and a second region R2 other than the first region R1. The first region R1 is located below or directly below the first electrode 120. The epitaxial layer stack 110 includes a first type doped semiconductor layer 112 , a second type doped semiconductor layer 116 , and an active layer 114 between the first type doped semiconductor layer 112 and the second type doped semiconductor layer 116 . . The first type doped semiconductor layer 112 and the second type doped semiconductor layer 116 have different polarities depending on different carrier types therein. A portion of the first type doped semiconductor layer 112 and a portion of the active layer 114 are removed to expose the second doped semiconductor layer 116, and the epitaxial layer 110 is divided into a land portion P and a recess portion E, the platform portion P includes a first type doped semiconductor layer 112, a portion of the active layer 114, and a portion of the second type doped semiconductor layer 116, and the recess E includes another portion of the second type doped semiconductor layer 116. In one embodiment, the surface S of the epitaxial layer 110 is the upper surface of the first type doped semiconductor layer 112 of the land portion P. In this embodiment, the optoelectronic semiconductor component 100 further includes a substrate 170, and the first doped semiconductor layer 112, the active layer 114, and the second doped semiconductor layer 116 are sequentially stacked on the substrate 170, but not For example, in some embodiments of the present invention, the optoelectronic semiconductor component 100 may not include the substrate 170. The material of the first type doped semiconductor layer 112, the second type doped semiconductor layer 116, and the active layer 114 is a compound semiconductor, and may be, for example, a tri-five compound semiconductor such as GaAs, InGaAs, AlGaAs, AlInGaAs, GaP, InGaP, AlInP. AlGaInP, GaN, InGaN, AlGaN, AlInGaN, AlAsSb, InGaAsP, InGaAsN, AlGaAsP, and the like. In the embodiments of the present invention, unless otherwise specified, the chemical expressions include "chemically-accepting compounds" and "non-chemically-accepting compounds", wherein "chemically-accepting compounds" are, for example, tri-family elements. The total elemental dose is the same as the total elemental dose of the Group 5 element. Conversely, the "non-chemically-accepting compound" such as the total elemental dose of the Group III element is different from the total elemental dose of the Group V element. For example, the chemical expression is AlGaAs, which means that the tri-group element aluminum (Al) and/or gallium (Ga), and the five-element element arsenic (As), of which the tri-group elements (aluminum and/or gallium) are total. The elemental dose may be the same as or different from the total elemental dose of the Group V element (arsenic). Further, if each of the compounds represented by the chemical expression is a chemical compound, AlGaAs represents Al _x Ga _(1-x) As, wherein 0 ≦ x ≦ 1; and AlInP represents Al _x In _{(1-x )} P, wherein, 0 ≦ x ≦ 1; AlGaInP representative of _{(Al y Ga (1-y} )) 1-x In x P, wherein, 0 ≦ x ≦ 1,0 ≦ y ≦ 1; AlGaN Representative Al _x Ga _{( 1-x)} N, where 0≦x≦1; AlAsSb represents AlAs _x Sb _(1-x) , where 0≦x≦1; InGaP represents In _x Ga _1-x P, where 0≦x≦1 InGaAsP represents In _x Ga _1-x As _1-y P _y , where 0≦x≦1, 0≦y≦1; InGaAsN represents In _x Ga _1-x As _1-y N _y , where 0≦x ≦1,0≦y≦1; AlGaAsP represents Al _x Ga _1-x As _1-y P _y , where 0≦x≦1,0≦y≦1; InGaAs represents In _x Ga _1-x As, wherein 0≦x≦1. In the first embodiment, the first type doped semiconductor layer 112 may be a P type doped semiconductor layer, and the material thereof is, for example, P type gallium nitride; the second type doped semiconductor layer 116 may be an N type doped semiconductor. a layer, and the material thereof is, for example, N-type gallium nitride; the active layer 114 may comprise a plurality of quantum wells composed of a plurality of alternately stacked well layers and a barrier layer. For example, in some embodiments of the invention, the active layer 114 may also comprise a single heterostructure or a double heterostructure (double). Heterostructure) and so on. In addition, the epitaxial laminate 110 of each embodiment of the present invention can be formed by a method such as metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) or hydride vapor phase epitaxy (HVPE).

As shown in FIG. 1A to FIG. 1C, the optoelectronic semiconductor device 100 of the present embodiment further includes a second electrode 130. The first electrode 120 and the second electrode 130 are electrically connected to the first type doping of the epitaxial layer 110, respectively. a semiconductor layer 112 and a second type doped semiconductor layer 116, wherein the first electrode 120 and the second electrode 130 are disposed on the same side of the epitaxial layer 110 to form a horizontal type light emitting diode, and The first electrode 120 is located on the first type doped semiconductor layer 112 of the platform portion P and is electrically connected to the first type doped semiconductor layer 112. The second electrode 130 is located on the second type doped semiconductor layer 116 of the recessed region E. The second type doped semiconductor layer 116 is electrically connected. In another embodiment, the first electrode 120 may be disposed on the surface S of the epitaxial layer 110, and the second electrode 130 is disposed on the opposite surface of the surface S of the epitaxial layer 110 to form a vertical type (vertical) Type) Light-emitting diode (not shown). Referring to FIG. 1A, the first electrode 120 of the present embodiment includes a first electrode pad 122 and a first extension portion 124. The second electrode 130 includes a second electrode pad 132 and a second extension portion 134, and the optoelectronic semiconductor The element 100 has a first edge E1 and a second edge E2. The first electrode pad 122 and the second electrode pad 132 are respectively disposed on the epitaxial layer 110 adjacent to the second edge E2 and the first edge E1. The first extension portion 124 extends from the first electrode pad 122 to the first edge E1, and the second extension portion 134 extends from the second electrode pad 132 toward the second edge E2. The number of the first extending portions 124 and the number of the second extending portions 134 may be several, and the plurality of first extending portions 124 and the plurality of second extending portions 134 are staggered with each other on the first electrode pad 122 and the second electrode pad 132. Between the first extension 124 and the second extension 134, respectively, or the first extension 124 and the second extension 134 are respectively arranged in the embodiment. Opposite sides of the optoelectronic semiconductor component 100. In the first embodiment, the first electrode 120 and the second electrode 130 are respectively made of a metal material having a low contact resistance with the first type doped semiconductor layer 112 and the second type doped semiconductor layer 114, for example, the first The material of the electrode 120 and the second electrode 130 includes, but is not limited to, aluminum (Al), chromium (Cr), copper (Cu), tin (Sn), gold (Au), nickel (Ni), titanium (Ti), platinum ( Pt), lead (Pb), zinc (Zn), cadmium (Cd), antimony (Sb), cobalt (Co) or an alloy of the above materials. The method of forming the first electrode 120 and the second electrode 130 may include evaporation or sputtering, and the invention is not limited thereto.

Referring to FIG. 1A to FIG. 1C , in the embodiment, the current dispersion layer 14 includes a first current dispersion layer 140 and a second current dispersion layer 150 . The first current dispersion layer 140 includes a body portion 142 and an extension portion 144 connected to the body portion 142. The body portion 142 is located on the first region R1 of the epitaxial layer 110, and the extension portion 144 is outward from the body portion 142. Extending to the second region R2 of the epitaxial stack 110. The second current dispersion layer 150 and the main body portion 142 of the first current dispersion layer 140 are located between the epitaxial layer 110 and the first electrode 120, and the second current dispersion layer 150 and the body portion 142 of the first current dispersion layer 140 are Stacked on the first region R1, in one embodiment, the epitaxial layer 110 and the first electrode 120 are interposed between the second current dispersion layer 150 and the body portion 142 of the first current dispersion layer 140. Specifically, the second current dispersion layer 150 is only located on the first region R1 and does not extend to the second region R1, and the second current dispersion layer 150 is located between the first current dispersion layer 140 and the epitaxial laminate 110. In detail, referring to FIG. 1C, the second current dispersion layer 150 has a first upper surface 152 and a first side surface 154, and the first upper surface 152 is a second current dispersion layer 150 away from the epitaxial layer. The faces of the first side surface 154 are then non-coplanar with the first upper surface 152 and are connected to each other. The first current dispersion layer 140 covers at least a portion of the first upper surface 152 and the first side surface 154. In the embodiment, the first current dispersion layer 140 completely covers the first upper surface 152 of the second current dispersion layer 150. And on the first side surface 154. The first current dispersion layer 140 and the second current dispersion layer 150 have a transmittance of 85% or more for the radiation or absorption light of the active layer 114. For example, the first current dispersion layer 140 and the second current dispersion layer 150 include one. The material is selected from indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO). , gallium zinc oxide (GZO), zinc oxide (ZnO), gallium phosphide (GaP), indium zinc oxide (IZO), diamond-like carbon film (DLC), indium gallium oxide (IGO), gallium aluminum zinc oxide (GAZO) The group consisting of graphene (Graphene) is not limited thereto. In addition, the materials of the first current dispersion layer 140 and the second current dispersion layer 150 may be the same or different; in another embodiment, the conductivity of the first current dispersion layer 140 and the second current dispersion layer 150 may be the same or In another embodiment, in the stacking direction of the epitaxial layer 110, the first current dispersion layer 140 and the second current dispersion layer 150 may have the same or different thicknesses; in still another embodiment, the first current dispersion The conductivity of the layer 140 and the second current dispersion layer 150 are the same, and both have different thicknesses in the stacking direction of the epitaxial layer 110; in still another embodiment, the first current dispersion layer 140 and the second current dispersion layer 150 Different materials having different electrical conductivities, and the thickness of the first current dispersion layer 140 in the stacking direction of the epitaxial layer 110 is smaller than the thickness of the second current dispersion layer 150. The thicknesses described in the various embodiments of the present invention are measured along the stacking direction of the epitaxial stack 110, unless otherwise specified.

Referring to FIG. 1C again, in the first region R1, the main body portion 142 of the first current dispersion layer 140 has a first thickness T1, and the second current dispersion layer 150 has a second thickness T2, the first thickness T1 and the second portion. The sum of the thicknesses T2 is a third thickness T3. On the second region R2, the extension 144 of the first current dispersion layer 140 has a fourth thickness T4. In an embodiment, the fourth thickness T4 is different from the second thickness T2 of the second current dispersion layer 150, that is, the fourth thickness T4 may be smaller or larger than the second thickness T2; in still another embodiment, the fourth thickness T4 is equal to The second thickness T2 of the second current dispersion layer 150; in still another embodiment, the first current dispersion layer 140 has a uniform thickness, that is, the first thickness T1 of the body portion 142 located in the first region R1 is equal to the second region R2. The fourth thickness T4 of the extension 144. In still another embodiment, the first thickness T1 is different from the fourth thickness T4, that is, the fourth thickness T4 may be smaller or larger than the first thickness T1. In still another embodiment, the fourth thickness T4 has a non-uniform thickness, for example, the fourth thickness T4 of the extension portion 144 is gradually reduced from the main body portion 142 toward the edge of the optoelectronic semiconductor component 100, or the extension portion 144 is adjacent to the main body portion 142. The fourth thickness T4 is greater than the fourth thickness T4 of the extension portion 144 near the edge of the optoelectronic semiconductor component 100; vice versa. In an embodiment, the second thickness T2 of the second current dispersion layer 150 may be 2-3 times the first thickness T1 of the first current dispersion layer 140, and the sum of the current dispersion layer 14 under the first electrode 120. The thickness T3 is greater than the extension 144 of the first current dispersion layer 140 and has a fourth thickness T4 to achieve a better current spreading effect, but not limited thereto. For example, the second thickness T2 of the second current dispersion layer 150 may also be It is the same as the first thickness T1 of the first current dispersion layer 140.

In the first embodiment, the fourth thickness T4 is smaller than the second thickness T2, and the ratio of the third thickness T3 to the fourth thickness T4 ranges from 1.5 to 15, preferably, when the ratio ranges from 4 to 10, the photoelectric The semiconductor component 100 is capable of achieving a higher brightness enhancement. The following table shows the forward voltage (also known as the starting voltage, forward voltage/V _f ) and the brightness of the light-emitting diode under different conditions of the ratio of the third thickness T3 to the fourth thickness T4, wherein A thickness T1 and a fourth thickness T4 are fixed at 330 Å (Å), and the second thickness T2 is adjusted to 0 Å (Group A1), 1000 Å (Group A2), 2000 Å (Group A3), and 3000 Å. (Group A4). As can be seen from Table 1, with respect to the light-emitting diode (Group A1) having no second current dispersion layer 150, when the second current dispersion layer 150 having a thickness of 1000 to 3000 Å is provided, the light-emitting diode can be reduced. The forward voltage of the body enhances the brightness of the light-emitting diode, that is, the photoelectric semiconductor element of the present invention has better photoelectric conversion efficiency than the conventional technology.

Table I

As described above, in the optoelectronic semiconductor device 100 of the present embodiment, the second current dispersion layer 150 and the main body portion 142 of the first current dispersion layer 140 are located between the epitaxial layer 110 and the first electrode 120, so that the first region R1 The thickness of the current dispersion layer 14 is thicker than the thickness of the current dispersion layer 14 on the second region R2, and the ability of the carrier to laterally diffuse from the first region R1 to the second region R2 is enhanced. Therefore, the optoelectronic semiconductor component 100 of the present embodiment has a better current dispersion capability, and the forward voltage can also be reduced. In addition, in the optoelectronic semiconductor device 100 of the present embodiment, the first region R1 is located under the first electrode 120, so the light emitted from the epitaxial layer 110 to the first region R1 is shielded by the first electrode 120, so even in The thickness of the current dispersion layer 14 between the first region R1 and the first electrode 120 is relatively thick, and the optoelectronic semiconductor device 100 of the present embodiment can maintain the luminous efficiency while increasing the current dispersion, while avoiding the thick current dispersion layer 14 The effect of the shading effect.

Referring to FIG. 1A, in the embodiment, the extension portion 124 of the first electrode 120 has a first width W1 located on the first region R1 and substantially below the extension portion 124. The second current dispersion layer 150 has a second width W2, and the ratio of the second width W2 to the first width W1 is about 2 to 5, for example, the first width W1 is 3 mm, and the second width W2 is 10 mm. The ratio of the width W2 to the first width W1 is 3.33.

1A to 1C, the first current dispersion layer 140 of the present embodiment has a first inner contour 140' and a first outer contour 140'' surrounding the first inner contour 140', and the second current dispersion layer 150 has A second inner contour 150 ′ and a second outer contour 150 ′′ surround the second inner contour 150 ′, wherein the first inner contour 140 ′ and the second inner contour 150 ′ are located on the first region R1 and are located at the first Below the electrode pad 122, the first outer profile 140'' is adjacent to the first edge E1 and the second edge E2. The shapes of the first inner contour 140' and the second inner contour 150' are substantially the same or similar to the outer contour shape of the first electrode pad 122, and the second inner contour 150' surrounds the first inner contour 140', for example, for example. When the first electrode pad 122 is substantially circular from the upper side of the optoelectronic semiconductor component 100, the first inner profile 140' and the second inner profile 150' are also substantially circular in shape. In detail, the first inner contour 140' surrounds a first opening O1, and the first opening O1 exposes the first region R1 of the epitaxial layer 110, and the second inner contour 150' surrounds and forms a second opening O2. From the top of the optoelectronic semiconductor component 100, the area of the second opening O2 is larger than the area of the first opening O1. In addition, in this embodiment, a portion of the first electrode 120 is filled in the first opening O1 and electrically connected to the first type doped semiconductor layer 112.

Referring again to FIG. 1A, the outer contour 150'' of the second current dispersion layer 150 is substantially the same or similar in shape to the outer contour of the first electrode 120. In addition, from a top view, the second outer contour 150'' of the second current dispersion layer 150 is located outside the outer contour of the first electrode 120, and the surface area above the second current dispersion layer 150 is on the upper surface of the first electrode 120. The ratio of surface area ranges from 1.4 to 2.5. In the present embodiment, preferably, the ratio of the upper surface area of the second current dispersion layer 150 to the upper surface area of the first electrode 120 ranges from 1.4 to 2, more preferably from 1.6 to 1.9. In another embodiment as shown in FIG. 3, the second current dispersion layer 150 has a solid structure and does not have a second opening O2. Therefore, in particular, the second current dispersion layer of this embodiment is viewed from above. The ratio of the upper surface area of 150 to the upper surface area of the first electrode 120 ranges from 1.8 to 2.5, preferably from 2.2 to 2.4, but is not limited thereto. In the first embodiment, since the main body portion 142 and the extending portion 144 of the first current dispersion layer 140 may have the same thickness, and the second current dispersion layer 150 is disposed only on the first region R1, the upper view can be observed. A region formed by the second outer contour 150'' of the second current dispersion layer 150 around the first electrode 120 is defined as a range of the first region R1.

Referring to FIGS. 1B to 1C again, in the embodiment, the optoelectronic semiconductor component 100 further includes a current blocking layer 160 between the first electrode 120 and the epitaxial stack 110. In detail, the current blocking layer 160 of the present embodiment is located between the epitaxial layer 110 and the first current dispersion layer 140 or the second current dispersion layer 150. In addition, as shown in FIG. 1B, the current blocking layer 160 may also be selectively disposed between the second electrode 130 and the epitaxial layer stack 110. The current blocking layer 160 has a second upper surface 162 and a second side surface 164. The second upper surface 162 is a surface of the current blocking layer 160 away from the epitaxial layer 110 and the second upper surface 162 and the second side surface 164 are adjacent to each other. Connected, and the second side surface 164 is not parallel to the second upper surface 162. The second current spreading layer 150 covers the second upper surface 162 of the current blocking layer 160 and does not protrude beyond the edge of the current blocking layer 160 nor the second side surface 164 of the current blocking layer 160.

As shown in FIG. 1A, in the present embodiment, the area of the second current dispersion layer 150 is smaller than the area of the current blocking layer 160, and the position of the second current dispersion layer 150 substantially corresponds to the current blocking layer 160. The position, in particular, the second current dispersion layer 150 and the current blocking layer 160 overlap each other in the stacking direction of the epitaxial layer 110, and the second outer contour 150'' of the second current dispersion layer 150 is tied to the current The second outer contour 160' of the barrier layer 160 is surrounded by a corresponding region, in other words, as shown in FIG. 1B or 1C, the second current dispersion layer 150 does not protrude from the current blocking layer 160 in the lateral direction, that is, The edge of the second current dispersion layer 150 is prevented from being suspended, so that the photoelectric semiconductor device 100 has good electrostatic resistance and can reduce the risk of electrical failure, but the invention is not limited thereto. For example, in another embodiment, the surface area of the second current dispersion layer 150 may be greater than the surface area of the current blocking layer 160, but the second current dispersion layer 150 needs to cover the second upper surface 162 of the current blocking layer 160 at the same time. Second side surface 164. In addition, as shown in FIG. 1C, in the present embodiment, the current blocking layer 160 has a third inner contour 160' and a third outer contour 160'' surrounding the third inner contour 160', and the third inner contour 160' A third opening O3 is formed around the third opening O3, wherein the third opening O3 of the current blocking layer 160 corresponds to the second opening O2 of the second current dispersion layer 150, and the area of the second opening O2 is larger than that of the second opening O2. The area of the third opening O3. The current blocking layer 160 may include a dielectric material selected from the group consisting of cerium oxide (SiO _x ), cerium nitride (SiN _x ), cerium oxynitride (SiO _x N _y ), or titanium oxide (TiO _x ). The group, the invention is not limited thereto.

Referring to FIG. 1B , in the embodiment, the optoelectronic semiconductor component 100 further includes a substrate 170 , a reflective layer 180 , and a protective layer 190 . The substrate 170 has an opposite first side S1 and a second side S2. The epitaxial layer 110 is located on the first side S1 of the substrate 170, and the reflective layer 170 is located on the second side S2 of the substrate 170. The protective layer 190 covers the surface of the optoelectronic semiconductor component 100 and exposes at least a portion of the first electrode 120 and at least a portion of the second electrode 130 for subsequent electrical connection to an external power source. The substrate 170 of the present embodiment is a patterned substrate having a plurality of patterned structures 172 on the surface of the first side S1. In an embodiment of the invention, the substrate 170 may comprise sapphire, tantalum carbide (SiC), germanium (Si), gallium nitride (GaN), gallium arsenide (GaAs), gallium phosphide (GaP), An element such as aluminum (Al), copper (Cu), molybdenum (Mo) or tungsten (W) or a combination of these elements, the reflective layer 180 may comprise a metal layer and/or a Bragg mirror having a plurality of pairs of sub-layers ( Distributed Bragg reflector, DBR), any of the sub-layers comprising a refractive index different from the adjacent sub-layers, for example, in one embodiment, the reflective layer 180 is a Bragg mirror and comprises a plurality of layers of overlapping oxidation矽 (SiO _x ) and titanium oxide (TiO _x ). In still another embodiment, the reflective layer 180 has both a metal layer and a Bragg mirror, and the metal layer is disposed under the Bragg mirror to collectively form an omni-directionally reflector. The protective layer 190 may include a dielectric material selected from the group consisting of cerium oxide (SiO _x ), cerium nitride (SiN _x ), cerium oxynitride (SiO _x N _y ), or titanium oxide (TiO _x ). The invention is not limited thereto.

The following embodiments are used to identify the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted portions, reference may be made to the foregoing embodiments, and the following embodiments are not repeated.

2A to 2D are schematic views showing the structure of different process stages of the optoelectronic semiconductor device 100 of the first embodiment. A method of manufacturing the optoelectronic semiconductor component 100 of the present embodiment is described in the following paragraphs.

Referring to FIGS. 2A-2B, the method of fabricating the optoelectronic semiconductor device 100 includes providing a substrate 170 having a first side S1 and a second side S2, wherein the surface on the first side S1 may be planar or have a plurality of patterned structures 172; and an epitaxial stack 110 disposed on a surface of the first side S1 of the substrate 170. Specifically, the second type doped semiconductor layer 116, the active layer 114, and the first type doped semiconductor layer 112 are sequentially formed on the surface of the first side S1 of the substrate 170. Next, a portion of the first type doped semiconductor layer 112 and a portion of the active layer 114 are etched to expose the second type doped semiconductor layer 116, thereby defining the land portion P and the recess region E of the epitaxial layer stack 110. In this embodiment, the epitaxial layer stack 110 can be directly grown on the substrate 121 by the above-described epitaxial growth method, such as an organometallic chemical vapor deposition method, a molecular beam epitaxy method, or a hydride vapor phase epitaxy method. However, in some embodiments, the epitaxial layer 110 may be epitaxially grown on a growth substrate, and then the epitaxial layer 110 is transferred to the substrate 170 through a bonding layer by a transfer technique. In addition to the growth substrate, wherein the material of the bonding layer may comprise an organic material, an inorganic material, a conductive material, a dielectric material, a magnetic material or a non-magnetic material, etc., the bonding method may include bonding, soldering or adsorption, and the like; Alternatively, in some embodiments, the epitaxial laminate 110 does not bond any substrate after removing the grown substrate to form the optoelectronic semiconductor component 100 having no substrate structure and reduced thickness, and can be used for thinning of various optoelectronic products. Applications such as televisions, displays, billboards, car or personal mobile display devices, and the like.

Next, referring to FIG. 2C, the method for fabricating the optoelectronic semiconductor device 100 of the present embodiment further includes disposing a current blocking material CB and a first current dispersing material CS1 on the epitaxial layer 110 to cover the etched epitaxial layer 110. And setting the patterned photoresist layer PR1 on the current dispersion material CS1 to define the range and shape of the second current dispersion layer 150 and the current blocking layer 160. The method of setting the current blocking material CB is, for example, chemical vapor deposition (CVD) or physical vapor deposition (PVD), and the method of disposing the first current dispersion material CS1 is, for example, sputtering, but the invention Not limited to this.

2D, the method for fabricating the optoelectronic semiconductor device 100 of the present embodiment further includes sequentially etching the first current dispersion material CS1 and the current blocking material CB to form the second current dispersion layer 150 and the current blocking layer 160, respectively. And removing the patterned photoresist layer PR1; then, the second current dispersion material CS2 is disposed to cover the epitaxial layer 110, the second current dispersion layer 150, and the current blocking layer 160, and form a pattern on the second current dispersion material CS2. The photoresist layer PR2 is patterned, and the patterned photoresist layer PR2 is used to define the range and shape of the first current dispersion layer 140. The method in which the patterned photoresist layers PR1 and PR2 are removed is, for example, removed by a developer.

2E and 1A, the method for fabricating the optoelectronic semiconductor device 100 of the present embodiment further includes etching a portion of the second current dispersion material CS2 to form the first current dispersion layer 140, and simultaneously etching and removing the recessed region E. a second current dispersion layer 150 over the current blocking layer 160; then, forming a first electrode 120 on the first current dispersion layer 140 and forming a second electrode 130 on the recess E of the epitaxial layer 110; and forming The protective layer 190 is on the epitaxial layer 110, wherein the protective layer 190 exposes a portion of the first electrode 120 and a portion of the second electrode 130; thereafter, the reflective layer 180 is formed on the second side S2 of the substrate 170.

In an embodiment of the invention, the method of fabricating the optoelectronic semiconductor device 100 may further include simultaneously forming the second current dispersion layer 150 and the current blocking layer 160 through the same yellow light process (as shown in FIG. 2C and FIG. 2D). The number of times of the yellow light process is maintained the same as that of the prior art, so that the current dispersion capability of the optoelectronic semiconductor component 100 can be improved without increasing or maintaining the same manufacturing cost as the prior art. The manner of forming the second current dispersion layer 150 and the current blocking layer 160 through the same yellow light process may include using different etching rates for the first current dispersion material CS1 and the current blocking material CB after the same yellow light exposure. The etchant is etched to form the second current dispersion layer 150 and the current blocking layer 160, and the upper surface area of the current blocking layer 160 is larger than the upper surface area of the second current dispersion layer 150, but the invention is not limited thereto. In an embodiment, the manufacturing method of the optoelectronic semiconductor device 100 may include etching the first current dispersion material CS1 with a first etching solution, and etching the current blocking material CB with a second etching solution different from the first etching solution. Then, the first current dispersion material CS1 is secondarily etched with the first etching liquid, so that the surface area of the second current diffusion layer 150 is smaller than the surface area of the current blocking layer 160.

3 to 6 are partial cross-sectional views showing the photoelectric semiconductor element of the second to fifth embodiments of the present invention.

Referring first to FIG. 3, the optoelectronic semiconductor component 100a of the second embodiment of the present invention is substantially similar to the optoelectronic semiconductor component 100 of the first embodiment shown in FIG. 1C, the main difference being the first of the optoelectronic semiconductor component 100a of the present embodiment. The current dispersion layer 140 and the second current dispersion layer 150 are solid without the first opening O1 and the second opening O2 described in the first embodiment. Compared with the first embodiment, the optoelectronic semiconductor component 100a of the present embodiment can prevent current from being directly injected into the epitaxial stack 110 by the first electrode pad 122, so that current can pass through the first current dispersion layer 140 and the second current dispersion layer. 150 is uniformly implanted into the active layer 114 of the optoelectronic semiconductor component 100a.

Referring to FIG. 4, the optoelectronic semiconductor component 100b of the third embodiment of the present invention is substantially similar to the optoelectronic semiconductor component 100a of the second embodiment shown in FIG. 3. The main difference is that the optoelectronic semiconductor component 100b of the present embodiment does not have current blocking. The layer 160 is disposed between the first electrode 120 and the epitaxial layer 110.

Referring to FIG. 5, the optoelectronic semiconductor component 100c of the fourth embodiment of the present invention is substantially similar to the optoelectronic semiconductor component 100 of the first embodiment shown in FIG. 1C, and the main difference is the second current of the optoelectronic semiconductor component 100c of the present embodiment. The dispersion layer 150 covers the second upper surface 162 and the second side surface 164 of the current blocking layer 160 such that the upper surface area of the second current dispersion layer 150 is larger than the upper surface area of the current blocking layer 160, and the first current dispersion layer 140 covers The first upper surface 152 and the first side surface 154 of the second current dispersion layer 150. From a top view, the third inner contour 160 ′ of the current blocking layer 160 of the optoelectronic semiconductor component 100 c of the present embodiment surrounds the second inner contour 150 ′ of the second current dispersion layer 150 , and the first current dispersion layer 140 The first inner contour 140' is surrounded by a second inner contour 150'. In other words, the area of the third opening O3 of the optoelectronic semiconductor component 100c of the present embodiment is larger than the area of the second opening O2, and the area of the second opening O2 is larger than the area of the first opening O1.

Referring to FIG. 6, the optoelectronic semiconductor component 100d of the fifth embodiment of the present invention is substantially similar to the optoelectronic semiconductor component 100 of the first embodiment as shown in FIG. 1C, the main difference being the first of the optoelectronic semiconductor component 100d of the present embodiment. The current dispersion layer 140 is located between the second current dispersion layer 150 and the epitaxial layer 110, that is, the second current dispersion layer 150 covers the first current dispersion layer 140, and the first current dispersion layer 140 is disposed on the second current dispersion layer. Between 150 and current blocking layer 160. The first thickness T1 of the first current dispersion layer 140 of the present embodiment is smaller than the second thickness T2 of the second current dispersion layer 150, that is, the second current dispersion layer 150 having a thick thickness is located at the first electrode 120 and has a thin thickness. Between the first current dispersion layers 140. The first current dispersion layer 140 may cover the second upper surface 162 and the second side surface 164 of the current blocking layer 160 , and the second current dispersion layer 150 covers the body portion 142 of the first current dispersion layer 140 . From a top view, the third inner contour 160' of the optoelectronic semiconductor component 100d of the present embodiment surrounds the first inner contour 140' or the second inner contour 150'. In other words, the area of the third opening O3 may be greater than or equal to the first The area of the second opening O2, and the area of the first opening O1 is not larger than the area of the second opening O2.

The present invention has been disclosed in the above embodiments, and is not intended to limit the present invention. The combination of some or all of the technical features disclosed in the respective embodiments or between the embodiments is disclosed in the present invention. It is to be understood that the scope of the present invention is defined by the scope of the appended claims.

100, 100a, 100b, 100c, 100d‧‧‧Optoelectronic semiconductor components

110‧‧‧ epitaxial stack

112‧‧‧First type doped semiconductor layer

114‧‧‧Active layer

116‧‧‧Second type doped semiconductor layer

120‧‧‧first electrode

122‧‧‧First electrode pad

124‧‧‧First Extension

130‧‧‧second electrode

132‧‧‧Second electrode pad

134‧‧‧Second extension

140‧‧‧First current dispersion layer

140’‧‧‧ first inner contour

140’’‧‧‧ first outline

142‧‧‧ Main body

144‧‧‧Extension

150‧‧‧Second current dispersion layer

150’‧‧‧Second inner contour

150’’‧‧‧ Second outline

152‧‧‧ first upper surface

154‧‧‧ first side surface

160‧‧‧current barrier

160’‧‧‧ Third inner contour

160’’‧‧‧ Third outline

162‧‧‧Second upper surface

164‧‧‧ second side surface

170‧‧‧Substrate

172‧‧‧patterned structure

180‧‧‧reflective layer

190‧‧‧Protective layer

CS1‧‧‧First current dispersion material

CS2‧‧‧Second current dispersion material

CB‧‧‧current blocking material

E1‧‧‧ first edge

E2‧‧‧ second edge

P‧‧‧ Platform Department

E‧‧‧Depression

PR1, PR2‧‧‧ patterned photoresist layer

S‧‧‧ surface

S1‧‧‧ first side

S2‧‧‧ second side

T1‧‧‧first thickness

T2‧‧‧second thickness

T3‧‧‧ third thickness

T4‧‧‧fourth thickness

R1‧‧‧ first area

R2‧‧‧ second area

O1‧‧‧ first opening

O2‧‧‧ second opening

O3‧‧‧ third opening

I-I’‧‧‧ cut line

Fig. 1A is a top plan view showing an optoelectronic semiconductor device of a first embodiment of the present invention. Fig. 1B is a schematic cross-sectional view of the optoelectronic semiconductor component of Fig. 1A taken along line I-I'. Fig. 1C is a partial enlarged view of Fig. 1B. 2A to 2E are schematic views showing the structure of different process stages of the optoelectronic semiconductor component of the first embodiment. Figure 3 is a partial cross-sectional view showing an optoelectronic semiconductor device according to a second embodiment of the present invention. Figure 4 is a partial schematic view showing an optoelectronic semiconductor device of a third embodiment of the present invention. Figure 5 is a partial schematic view of an optoelectronic semiconductor component of a fourth embodiment of the present invention. Figure 6 is a partial schematic view showing an optoelectronic semiconductor device of a fifth embodiment of the present invention.

Claims (10)

An optoelectronic semiconductor component comprising: an epitaxial stack having a first region on a surface thereof and a second region except the first region; a first electrode located on the epitaxial stack The first region is electrically connected to the epitaxial layer; a first current dispersion layer having a body portion and an extension extending from the body portion, the extension portion being located on the second region; And a second current dispersion layer on the first region and not extending to the second region, wherein the second current dispersion layer and the body portion of the first current dispersion layer are located on the epitaxial layer Between the first electrodes. The optoelectronic semiconductor component according to claim 1, wherein an outer contour shape of the second current dispersion layer is substantially the same as an outer contour shape of the first electrode. The optoelectronic semiconductor component according to claim 1, wherein the ratio of the upper surface area of the second current dispersion layer to the upper surface area of the first electrode is from 1.4 to 2.5. The optoelectronic semiconductor component of claim 1, further comprising a current blocking layer having a second upper surface and a second side surface connected to the second upper surface, the current blocking layer being located at the epitaxial stack The layer is between the first electrode and the second current dispersion layer covers the second upper surface and the second side surface. The optoelectronic semiconductor component of claim 1, wherein the first current spreading layer has a first opening to expose the first region of the epitaxial stack. The optoelectronic semiconductor component of claim 5, wherein the second current dispersion layer has a second opening on the first region, and the area of the second opening is larger than the first The area of the opening. The optoelectronic semiconductor component of claim 4, wherein the upper surface area of the second current dispersion layer is greater than the upper surface area of the current blocking layer. The optoelectronic semiconductor component according to claim 1, wherein in the stacking direction of the epitaxial layer, the thickness of the extension portion of the first current dispersion layer is smaller than the second current dispersion layer in the first region The thickness on the top. The optoelectronic semiconductor component of claim 1, wherein in the stacking direction of the epitaxial layer, the body portion has a first thickness, the second current dispersion layer has a second thickness, and the A sum of the thickness and the second thickness is a third thickness, and the extension has a fourth thickness, wherein a ratio of the third thickness to the fourth thickness ranges from 1.5 to 15. The optoelectronic semiconductor component of claim 1, wherein a thickness of the main body portion and the extension portion of the first current dispersion layer is smaller than a thickness of the second current dispersion layer in a stacking direction of the epitaxial layer stack And the first current dispersion layer is located between the second current dispersion layer and the epitaxial laminate.