JP7223146B2 - ビデオエンコーダ、ビデオデコーダ、および対応する方法 - Google Patents
ビデオエンコーダ、ビデオデコーダ、および対応する方法 Download PDFInfo
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Description
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201 区分されたビデオ信号
211 汎用コーダ制御コンポーネント
213 変換スケーリングおよび量子化コンポーネント
215 イントラピクチャ推定コンポーネント
217 イントラピクチャ予測コンポーネント
219 動き補償コンポーネント
221 動き推定コンポーネント
223 復号ピクチャバッファコンポーネント
225 ループ内フィルタコンポーネント
227 フィルタ制御分析コンポーネント
229 スケーリングおよび逆変換コンポーネント
231 ヘッダフォーマッティングおよびCABACコンポーネント
301 区分されたビデオ信号
313 変換および量子化コンポーネント
317 イントラピクチャ予測コンポーネント
321 動き補償コンポーネント
323 復号ピクチャバッファコンポーネント
325 ループ内フィルタコンポーネント
329 逆変換および量子化コンポーネント
331 エントロピーコーディングコンポーネント
417 イントラピクチャ予測コンポーネント
421 動き補償コンポーネント
423 復号ピクチャバッファコンポーネント
425 ループ内フィルタコンポーネント
429 逆変換および量子化コンポーネント
433 エントロピー復号コンポーネント
500 ビットストリーム
501 サブビットストリーム
510 SPS
512 PPS
514 スライスヘッダ
515 SEIメッセージ
520 画像データ
521 ピクチャ
522 サブピクチャ
523 サブピクチャ
524 スライス
525 スライス
531 サブピクチャサイズ
532 サブピクチャ位置
533 サブピクチャID
534 動き制約サブピクチャフラグ
535 サブピクチャレベル
600 ピクチャ
622 サブピクチャ
631 サブピクチャサイズ
631a サブピクチャ幅
631b サブピクチャ高さ
632 位置
633 サブピクチャID
634 時間動き制約サブピクチャ
642 左上サンプル
700 機構
722 サブピクチャ
724 スライス
733 サブピクチャID
742 左上の角
801 ピクチャの右側の境界
802 ピクチャの下側の境界
822 サブピクチャ
825 CTU
900 ビデオコーディングデバイス
910 送信機/受信機
914 コーディングモジュール
920 ダウンストリームポート
930 プロセッサ
932 メモリ
950 アップストリームポート
960 I/Oデバイス
1200 システム
1201 区分モジュール
1202 ビデオエンコーダ
1203 符号化モジュール
1205 記憶モジュール
1207 送信モジュール
1210 ビデオデコーダ
1211 受信モジュール
1213 解析モジュール
1215 復号モジュール
1217 転送モジュール
Claims (23)
- デコーダにおいて実施される方法であって、
前記デコーダの受信機により、複数のサブピクチャの連合が重複なしでピクチャの全エリアを包含するように前記ピクチャから区分された前記複数のサブピクチャを含むビットストリームを受信するステップであって、前記ビットストリームがシーケンスパラメータセット(SPS)を含み、前記SPSが、前記複数のサブピクチャの各々のサブピクチャ識別子(ID)の完全なセットを含む、ステップと、
前記デコーダのプロセッサにより、前記SPSを解析して前記複数のサブピクチャの各々の前記サブピクチャIDを取得するステップと、
前記プロセッサにより、前記ビットストリームを解析して1つまたは複数のサブピクチャを取得するステップと、
前記プロセッサにより、前記1つまたは複数のサブピクチャを生成してビデオシーケンスを作成するステップと
を含む方法。 - 前記複数のサブピクチャの前記連合がさらに、間隙なしで前記ピクチャの前記全エリアを包含する、請求項1に記載の方法。
- 第1のサブピクチャが前記ピクチャの右側の境界と一致しない右側の境界を有するとき、前記第1のサブピクチャは、コーディングツリーユニット(CTU)サイズの整数倍であるサブピクチャ幅を有する、請求項1または2に記載の方法。
- 第2のサブピクチャが前記ピクチャの下側の境界と一致しない下側の境界を有するとき、前記第2のサブピクチャは、CTUサイズの整数倍であるサブピクチャ高さを有する、請求項1から3のいずれか一項に記載の方法。
- 前記SPSが、前記サブピクチャのサブピクチャサイズおよび前記サブピクチャの各々のサブピクチャ位置をさらに含む、請求項1から4のいずれか一項に記載の方法。
- エンコーダにおいて実施される方法であって、
前記エンコーダのプロセッサにより、複数のサブピクチャの連合が重複なしでピクチャの全エリアを包含するように、前記ピクチャを前記複数のサブピクチャへと区分するステップと、
前記プロセッサにより、シーケンスパラメータセット(SPS)をビットストリームへと符号化するステップであって、前記SPSが、前記複数のサブピクチャの各々のサブピクチャ識別子(ID)の完全なセットを含む、ステップと、
前記プロセッサにより、前記サブピクチャのうちの1つまたは複数を前記ビットストリームへと符号化するステップと
を含む方法。 - 前記エンコーダのメモリに、デコーダへの通信のために前記ビットストリームを記憶するステップ
をさらに含む、請求項6に記載の方法。 - 前記複数のサブピクチャの前記連合がさらに、間隙なしで前記ピクチャの前記全エリアを包含する、請求項6または7に記載の方法。
- 第1のサブピクチャが前記ピクチャの右側の境界と一致しない右側の境界を有するとき、前記第1のサブピクチャは、コーディングツリーユニット(CTU)サイズの整数倍であるサブピクチャ幅を有する、請求項6から8のいずれか一項に記載の方法。
- 第2のサブピクチャが前記ピクチャの下側の境界と一致しない下側の境界を有するとき、前記第2のサブピクチャは、CTUサイズの整数倍であるサブピクチャ高さを有する、請求項6から9のいずれか一項に記載の方法。
- 前記SPSが、前記サブピクチャのサブピクチャサイズおよび前記サブピクチャの各々のサブピクチャ位置をさらに含む、請求項6から10のいずれか一項に記載の方法。
- プロセッサと、メモリと、前記プロセッサに接続された受信機と、前記プロセッサに接続された送信機とを備え、前記プロセッサ、前記メモリ、前記受信機、および前記送信機が、請求項1から11のいずれか一項に記載の方法を実行するように構成される、ビデオコーディングデバイス。
- ビデオコーディングデバイスによって使用されるコンピュータプログラムを記憶した非一時的コンピュータ可読記憶媒体であって、前記コンピュータプログラムは、プロセッサによって実行されると前記ビデオコーディングデバイスに請求項1から11のいずれか一項に記載の方法を実行させるコンピュータ実行可能命令を含む、非一時的コンピュータ可読記憶媒体。
- 複数のサブピクチャの連合が重複なしでピクチャの全エリアを包含するように前記ピクチャから区分された前記複数のサブピクチャを含むビットストリームを受信するように構成された受信ユニットであって、前記ビットストリームがシーケンスパラメータセット(SPS)を含み、前記SPSが、前記複数のサブピクチャの各々のサブピクチャ識別子(ID)の完全なセットを含む、受信ユニットと、
前記ビットストリームを解析して1つまたは複数のサブピクチャを取得するように構成された解析ユニットと、
前記1つまたは複数のサブピクチャを生成してビデオシーケンスを作成するように構成された復号ユニットと
を備え、
前記解析ユニットは、前記SPSを解析して前記複数のサブピクチャの各々の前記サブピクチャIDを取得するようにさらに構成される、デコーダ。 - 請求項1から5のいずれか一項に記載の方法を実行するようにさらに構成される、請求項14に記載のデコーダ。
- 複数のサブピクチャの連合が重複なしでピクチャの全エリアを包含するように、前記ピクチャを前記複数のサブピクチャへと区分するように構成された区分ユニットと、
前記サブピクチャのうちの1つまたは複数をビットストリームへと符号化するように構成された符号化ユニットと
を備え、
前記符号化ユニットは、シーケンスパラメータセット(SPS)を前記ビットストリームへと符号化するようにさらに構成され、前記SPSが、前記複数のサブピクチャの各々のサブピクチャ識別子(ID)の完全なセットを含む、エンコーダ。 - デコーダへの通信のために前記ビットストリームを記憶するための記憶ユニット
をさらに備える、請求項16に記載のエンコーダ。 - 請求項6から11のいずれか一項に記載の方法を実行するようにさらに構成される、請求項16または17に記載のエンコーダ。
- コーディングのためのデバイスであって、
復号するためのビットストリームを受信するように構成された受信ユニットと、
前記受信ユニットに接続された送信ユニットであって、復号された画像を表示ユニットに送信するように構成された送信ユニットと、
前記受信ユニットまたは前記送信ユニットの少なくとも一方に接続された記憶ユニットであって、命令を記憶するように構成された記憶ユニットと、
前記記憶ユニットに接続された処理ユニットであって、前記記憶ユニットに記憶された前記命令を実行して、請求項1から11のいずれか一項に記載の方法を実行するように構成された処理ユニットと
を備えるデバイス。 - 請求項1から5のいずれか一項に記載の方法を実行するための処理回路を備える、デコーダ。
- 請求項6から11のいずれか一項に記載の方法を実行するための処理回路を備える、エンコーダ。
- コンピュータまたはプロセッサ上で実行されたとき、請求項1から11のいずれか一項に記載の方法を実行するためのプログラムコードを含む、コンピュータプログラム。
- コンピュータデバイスによって実行されると前記コンピュータデバイスに請求項1から11のいずれか一項に記載の方法を実行させるプログラムコードを記憶した、非一時的なコンピュータ可読記憶媒体。
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