JP7218185B2 - game machine - Google Patents

Description

The present invention relates to gaming machines.

Japanese Patent Application Laid-Open No. 2002-200000 describes batch backup processing for collectively backing up first information when a periodically occurring backup condition is satisfied, and second information when a periodically occurring backup condition is satisfied. A gaming machine is disclosed that performs a split backup process for splitting and backing up information.

JP 2017-23552 A

In the gaming machine described in Patent Literature 1, the first information and the second information are handled in the same manner after being backed up, and it may not be possible to say that a suitable backup process is being performed.

SUMMARY OF THE INVENTION An object of the present invention is to provide a game machine capable of executing a suitable backup process.

(A) The game machine according to the present invention is
A gaming machine capable of playing games,
a control means;
and a storage means capable of storing backup data,
The control means is
capable of executing a first backup process of storing first backup data in the storage means based on the establishment of a first backup condition;
a second backup process different from the first backup process for storing the second backup data in the storage means can be executed based on the establishment of the second backup condition;
It is possible to determine the mode of power-on,
When the first backup condition is satisfied and the second backup condition is not satisfied in response to the power-on of the first mode, the first backup process is executed and the second backup process is executed. figure,
executing the first backup process and the second backup process based on the satisfaction of the first backup condition and the second backup condition in response to the power-on of the second aspect;
the information indicated by the second backup data stored in the storage means is easier to confirm than the information indicated by the first backup data stored in the storage means;
The storage means
a first storage area to which the first backup data is written and to which the second backup data is not written;
a second storage area to which the second backup data is written and to which the first backup data is not written;
It is characterized by
(1) A game machine according to another aspect,
A gaming machine capable of playing games (for example, pachinko gaming machine 1, etc.),
Control means (for example, production control microcomputer 120, etc.),
Storage means capable of storing backup data (for example, backup memory board 14, etc.),
The control means is
A first backup process (for example, transferring the manufacturer confirmation data to the backup memory board 14) for storing the first backup data (for example, the manufacturer confirmation data) in the storage means based on the establishment of the first backup condition. processing of transfers, etc.), and
Different from the first backup process of storing second backup data (e.g. store confirmation data, etc.) in the storage means based on the establishment of the second backup condition different numbers of copies, different processing priorities, different amount of backup data written, etc.), second backup processing (for example, processing for transferring store confirmation data to the backup memory board 14, etc.) can be executed. ,
The information indicated by the second backup data stored in the storage means is easier to confirm than the information indicated by the first backup data stored in the storage means (for example, the log indicated by the store confirmation data). The information can be confirmed on the image display device 5, but the log information indicated by the manufacturer confirmation data can only be read by the manufacturer's reading device, etc.).

According to the above configuration, backup processing can be preferably executed.

(2) In the gaming machine described in (1) above,
The first backup process and the second backup process are different in process itself other than the first backup data and the second backup data to be stored in the storage means.
You may do so.

According to the above configuration, backup processing can be preferably executed.

(3) In the gaming machine of (1) above,
In the first backup process and the second backup process, as the process itself, the execution time, the area for storing the first backup data and the second backup data, the priority of the process, and the number of times of backup data. at least one of the amount of writing and
You may do so.

According to the above configuration, backup processing can be preferably executed.

(4) In any of the gaming machines (1) to (3) above,
Information indicated by the first backup data stored in the storage means is not notified on the gaming machine (for example, log information indicated by manufacturer confirmation data is not displayed on the pachinko gaming machine 1),
The information indicated by the second backup data stored by the storage means can be notified on the gaming machine (for example, the log information indicated by the store confirmation data is displayed on the pachinko gaming machine 1),
You may do so.

According to the above configuration, backup processing can be preferably executed.

(5) In any of the gaming machines (1) to (4) above,
Based on the second backup data stored in the storage means, information indicated by the second backup data (for example, log information indicated by the store confirmation data) can be displayed on the display means (for example, the image display device 5, etc.) Display control means (for example, production control microcomputer 120 etc.)
The information indicated by the first backup data stored in the storage means (for example, the log information indicated by the manufacturer confirmation data) is not displayed on the gaming machine (for example, the log information indicated by the manufacturer confirmation data is not displayed on pachinko machine 1, etc.),
You may do so.

According to the above configuration, backup processing can be preferably executed.

(6) In any of the gaming machines (1) to (5) above,
The storage means
a first storage area in which the first backup data is written and the second backup data is not written (for example, the 1-1 backup storage unit 95AK001 to the 1-3 backup storage unit 95AK003, etc.);
A second storage area (for example, a second backup storage unit 95AK004, etc.) in which the second backup data is written and the first backup data is not written,
You may do so.

According to the above configuration, backup processing can be preferably executed.

(7) In any one of the gaming machines (1) to (6) above,
The first storage area has a first number (eg, three) of storage areas (eg, 1-1 backup storage unit 95AK001 to 1-3 backup storage unit 95AK003, etc.) in which the same first backup data is written. has
The second storage area has a second number (e.g., one) of storage areas (e.g., second backup storage unit 95AK004, etc.) that is smaller than the first number in which the same second backup data is written.
You may do so.

According to the above configuration, backup processing can be preferably executed.

(8) In any one of the gaming machines (1) to (7) above,
a first control means (for example, the main substrate 11, etc.);
A second control means (for example, a production control microcomputer 120, etc.), which is the control means,
The second control means executes the first backup process and the second backup process when only the second control means of the first control means and the second control means is reset. No (for example, in step 95AKS112, the data for manufacturer confirmation is backed up, but the store confirmation data is not backed up, etc.);
You may do so.

According to the above configuration, backup processing can be preferably executed.

(9) In the gaming machine of (8) above,
The second control means executes the first backup process and the second backup process when both the first control means and the second control means are reset (for example, steps 95AKS106 and 95AKS107). ),
You may do so.

According to the above configuration, backup processing can be preferably executed.

(10) In the gaming machine of (8) or (9) above,
When the voltage supplied to the second control means is below a predetermined value, a signal supply means (for example, power disconnection detection circuit 95AK010, etc.),
The second control means determines whether both the first control means and the second control means are reset based on whether or not the predetermined signal is supplied after the power is turned on. It is possible to identify whether only has been reset (for example, processing after 95AKS104),
You may do so.

According to the above configuration, backup processing can be preferably executed.

It is a front view of the pachinko game machine in this embodiment. It is a configuration diagram showing various control boards and the like mounted in the pachinko game machine. It is a configuration diagram showing various circuits and the like mounted on the effect control board. 3A and 3B are diagrams showing a configuration example of a backup memory board; FIG. It is a flow chart which shows an example of game control main processing. It is a figure which shows the structural example of a display result determination table. It is a figure which shows the flowchart which shows an example of production|presentation control main processing, and processing priority. 7 is a flow chart showing an example of CPU exception event occurrence processing and an example of VDP error interrupt processing; It is a flow chart which shows an example of timer interruption processing for production control. It is a figure which shows the example of the content of the production|presentation control command for games. It is a figure which shows the example of the content of the production|presentation control command used as a test command. FIG. 10 is a diagram showing a setting example of the reception order of test commands and the processing to be executed; FIG. 10 is a diagram showing a setting example of a backup control table; FIG. 10 is a diagram showing a specific example of displaying a maintenance history screen; FIG. 10 is a diagram showing a specific example of displaying a maintenance history screen; FIG. 10 is a diagram showing a specific example when a setting change/confirmation history selection operation is performed; FIG. 11 is an explanatory diagram of a characteristic portion 41AK; FIG. 11 is an explanatory diagram of a characteristic portion 42AK; FIG. 11 is an explanatory diagram of a characteristic portion 42AK; FIG. 11 is an explanatory diagram of a characteristic portion 43AK; FIG. 11 is an explanatory diagram of a characteristic portion 44AK; FIG. 11 is an explanatory diagram of a characteristic portion 45AK; FIG. 10 is an explanatory diagram of a backup storage part in a characteristic part 95AK, and manufacturer confirmation data and store confirmation data as backup data; FIG. 10 is a flowchart of backup processing in a characterizing portion 95AK; FIG. It is a block diagram of the production|presentation control microcomputer in characteristic part 95AK, and a power failure detection circuit. It is a timing chart showing a state when the pachinko game machine is reset. It is a timing chart showing a state when the effect control microcomputer is reset. It is a flowchart at the time of power-on of the production|presentation control microcomputer in the characteristic part 95AK. FIG. 11 is a flow chart showing power failure date and time recording processing in a modified example of the characterizing portion 95AK; FIG. FIG. 12 is an explanatory diagram for explaining recording timing of log information of a power failure date and time in a modified example of the characteristic portion 95AK;

FIG. 1 is a front view of a pachinko game machine 1 according to this embodiment. A pachinko game machine 1 includes a game board 2 and a game machine frame 3. In addition, the pachinko game machine 1 includes an outer frame that rotatably supports the game machine frame 3 and the like. The game board 2 is a gauge board forming a game board surface. The game machine frame 3 is a frame for fixing the game board 2 . A game area surrounded by guide rails and the like is formed on the game board 2 . A game ball (game medium) shot from the shooting device passes through the shooting path and is hit into the game area. The game machine frame 3 is rotatably provided with a glass door frame having a glass window.

At predetermined positions on the game board 2, there are a first special symbol display device 4A, a second special symbol display device 4B, an image display device 5, a normal winning ball device 6A, a normal variable winning ball device 6B, a special variable winning ball device 7, A normal pattern display 20, a first reservation display 25A, a second reservation display 25B, a normal pattern reservation display 25C, a passage gate 41, and the like are provided. In addition, the game board surface in the game area may be provided with a windmill, a large number of obstacle nails, a general prize winning opening, an out opening, and the like. A game effect lamp 9 is provided on the periphery of the game area. Speakers 8L and 8R are provided at left and right upper positions of the frame 3 for a game machine.

A ball hitting operation handle (operation knob) is provided at the lower right portion of the game machine frame 3 . The ball-hitting operation handle is operated by a player or the like in order to shoot a game ball toward the game area, and the amount of operation (the amount of rotation) of the handle controls the resilience of the game ball. At predetermined positions of the gaming machine frame 3 below the game area, there are an upper tray (ball supply tray) that holds (stores) game balls and a lower tray (surplus) that holds (stores) surplus balls from the upper tray. ball storage dish) is provided. A stick controller 31A is attached to the member forming the lower plate, and a push button 31B is provided to the member forming the upper plate.

On the screens of the first special symbol display device 4A, the second special symbol display device 4B, the image display device 5, etc., special symbols and decorative symbols are variably displayed. These variable displays are based on the occurrence of the first starting winning due to the game ball passing (entering) the first starting winning hole formed in the normal winning ball device 6A, or to the normal variable winning ball device 6B It can be executed based on the occurrence of the second start winning prize by the game ball passing (entering) the formed second start winning hole. The first special symbol display device 4A and the second special symbol display device 4B are respectively configured using, for example, 7-segment or dot matrix LEDs (light emitting diodes). A special symbol (special symbol), which is information (special identification information), is variably displayed (variably displayed). The image display device 5 is configured using, for example, an LCD (liquid crystal display device) or the like, and forms a display area for displaying various effect images. On the screen of the image display device 5, variable display of special symbols (first special symbol or first special symbol) by the first special symbol display device 4A in the special symbol game and special symbols (first special symbol) by the second special symbol display device 4B 2 special design or second special design) variable display, for example, in the decorative design display area that becomes a plurality of variable display parts, such as three, the decorative design that is identification information (decoration identification information) is variable Is displayed. The variable display of this decoration pattern is also included in the variable display game. As an example, on the screen of the image display device 5, "left", "middle" and "right" decorative pattern display areas 5L, 5C and 5R are arranged.

A reserved storage display area 5H is arranged on the screen of the image display device 5 . In the reserved memory display area 5H, a reserved display is performed for identifiably displaying the reserved number of variable display corresponding to the special figure game (special figure reserved memory number). The pending display may be anything that can be displayed in correspondence with the pending storage of information relating to the variable display. Along with the pending memory display area 5H, or instead of the pending memory display area 5H, the pending display using the first pending display 25A and the second pending display 25B may be performed.

FIG. 2 is a block diagram showing a configuration example of various substrates, peripheral devices, and the like. The pachinko game machine 1 is equipped with various boards such as a main board 11, an effect control board 12, a lamp output board 13, a backup memory board 14, and an effect data memory board 16 as shown in FIG. In addition, a relay board 15, a performance control relay board 17, an audio output board 18, a driver board 19, and the like are also mounted. Furthermore, various substrates such as a power supply substrate, a payout control substrate, an information terminal substrate, a launch control substrate, an interface substrate, a touch sensor substrate, etc. may be mounted. Various control boards are not only electronic circuit boards such as printed wiring boards on which conductive patterns are formed and electrical components are mounted, but also electrical components are mounted (mounted) on electronic circuit boards to achieve specific electrical functions. It is a concept including an electronic circuit mounting board configured as follows.

The pachinko game machine 1 is configured so that power from an AC power supply, which is an external power supply (commercial power supply), can be supplied to electrical components including various control boards such as the main board 11 and the effect control board 12 by the power supply board. It is The power supply board includes, for example, a rectifier circuit for converting alternating current (AC) to direct current (DC), a power circuit for converting a predetermined DC voltage into a specific DC voltage (such as 12 V DC or 5 V DC), etc. I have. The power supply voltage generated by the power board may be supplied to the main board 11, the effect control board 12, and the like via the drawer relay board.

The main board 11 is equipped with a game control microcomputer 100, a switch circuit 110, a solenoid circuit 111, and the like. In the main substrate 11, signals received from various detection switches such as the gate switch 21, the starting switch (the first starting switch 22A and the second starting switch 22B), and the count switch 23 are sent through the switch circuit 110. It is transmitted to the game control microcomputer 100 . The gate switch 21 detects a game ball that has passed through the passage gate 41 (a gate-passing ball). Based on the detection of the gate passing ball by the gate switch 21, the variable display of the normal design by the normal design display 20 can be executed. The first starting opening switch 22A detects a game ball that has passed (entered) the first starting winning opening formed in the normal winning ball device 6A. The second starting opening switch 22B detects a game ball that has passed (entered) at the second starting winning opening formed in the normal variable winning ball device 6B. The count switch 23 detects a game ball that has passed (entered) the big winning hole formed by the special variable winning ball device 7 . When game balls passing through various winning openings such as the first start winning opening, the second starting winning opening, and the big winning opening are detected, the number of prize balls is determined in advance corresponding to each winning opening. A game ball as is paid out.

In the main board 11, a solenoid drive signal from the game control microcomputer 100 is transmitted through the solenoid circuit 111 to the solenoid 81 for the normal electric accessory and the solenoid 82 for the big winning entrance door. Solenoid 81 for the normal electric accessory is in a state in which the game ball is difficult to pass (or does not pass) and a state in which it is easy to pass (or passes) through the second start winning port formed in the normal variable winning ball device 6B. and changeable. A solenoid 82 for a large winning opening door makes the large winning opening formed in the special variable winning ball device 7 changeable between a state in which a game ball cannot pass and a state in which the game ball can pass. From the main board 11, a command signal for controlling the display of the first special symbol display device 4A, the second special symbol display device 4B, the normal symbol display device 20 and the like is transmitted.

The game control microcomputer 100 mounted on the main board 11 is, for example, a one-chip microcomputer, and includes a ROM 101 for storing game control programs, fixed data, etc., and a RAM 102 for providing a work area for game control. , a CPU 103 that executes a game control program to perform control operations, a random number circuit 104 that updates numerical data representing random numbers independently of the CPU 103, and an I/O (Input/Output port) 105. configured with. As an example, in the game control microcomputer 100, the CPU 103 executes a program read from the ROM 101, thereby executing processing for controlling the progress of the game in the pachinko gaming machine 1. FIG. In the game control microcomputer 100 mounted on the main board 11, for example, a random number circuit 104 and a game random counter provided in a predetermined area of the RAM 102 generate various random numbers used for controlling the progress of the game. Numerical data to indicate is counted (generated) in an updatable manner. A random number used to control the progress of a game is also called a game random number.

The main board 11 has a setting key 51 for switching to a setting change state or a setting confirmation state, and a setting switch functioning as a setting switch for changing set values such as the probability of winning a big win (ball output rate) in the setting change state. A changeover switch 52 is connected. The setting key 51 and the setting changeover switch 52 may be installed at predetermined positions on the main board 11, or may be attached outside the main board 11, for example, at predetermined positions on the power supply board. The setting key 51 and the setting changeover switch 52 are provided on the back side of the pachinko game machine 1, and cannot be operated unless the game machine frame 3 that can be opened by operating a predetermined key is opened. Only the person in charge who owns it can operate it. Since the setting key 51 requires a key operation, only a staff member who has a key for operating the setting key 51 can operate the setting key 51 among staff members of the game arcade. The setting key 51 is a switch that can be switched between ON and OFF by a predetermined key operation, and is also a switch that can perform an operation different from the switching operation (for example, pressing operation).

Various sensors are connected to the main board 11, such as a door opening sensor 90 for detecting the opening of the glass door frame that covers the front surface of the game board 2 so as to be able to be opened and closed. , and a function to determine the occurrence of various abnormalities (errors). The switch circuit 110 of the main board 11 receives a reset signal, a power-off signal, and a clear signal from the power supply board and transmits them to the game control microcomputer 100 . A display monitor 29 is arranged in the center of the back surface of the main substrate 11, and a display changeover switch 30 is arranged on the side of the display monitor 29. As shown in FIG. The display monitor 29 may be configured using, for example, a 7-segment LED display device. The display monitor 29 and the display changeover switch 30 are arranged in front of the main board 11 when viewing the back side of the game board 2 with the gaming machine frame 3 opened.

The main board 11 (game control microcomputer 100) includes each winning opening (first large winning opening, second large winning opening, second starting winning opening, first starting winning opening, general winning opening, hereinafter referred to as "entering area ”), and the display monitor 29 displays various types of winning information such as consecutive ratios and role ratios. By displaying such winning information, it is possible to confirm various winning information such as consecutive ratios and role ratios after installation in the game arcade. On the side of the manufacturer of the pachinko game machine 1, it is common to design the game board surface so that game balls enter the general winning opening at a predetermined frequency (to pass the test). Also, when conducting the test, it is confirmed (verified) whether or not the game ball has entered the general winning opening at a predetermined frequency. Furthermore, even after the pachinko game machine 1 is installed, whether or not adjustments have been made, what kind of adjustments have been made, and as a result of the adjustments, the game balls enter the general winning opening at the frequency as designed. is checked (verified). Therefore, in the pachinko game machine 1 of this embodiment, it is possible to recognize the presence or absence of adjustment after installation and the details thereof.

The effect control board 12 is a sub-side control board independent of the main board 11, and based on the effect control command transmitted from the main board 11 via the relay board 15, the image display device 5, the speakers 8L, 8R. , a game effect lamp 9, a performance motor 60, a performance LED 61, and other performance devices, various circuits for controlling performance operations by various performance electric parts are mounted. The production control board 12 controls the image display in the image display device 5, the sound output from the speakers 8L and 8R, the lighting of the light-emitting members constituting the game effect lamp 9 and the production LED 61, and the production motor 60 for moving the production movable member. It has a function of determining the control contents for causing the electric parts for performance to execute a predetermined performance operation, such as the driving operation of the. Electronic components such as an effect control microcomputer 120, an external ROM 121, and an external RAM 121 are mounted on the effect control board 12 shown in FIG.

The performance control board 12 includes wiring for transmitting video signals to the image display device 5, wiring for transmitting illumination signals to the lamp output board 13, and backup memory board 14. Wiring for transmitting control signals and the like, wiring for transmitting performance data signals to and from the performance data memory board 16, and the like are connected. Wiring for transmitting various signals to the audio output board 18 and the driver board 19 is also connected via the effect control relay board 17 . The information signal transmitted to the audio output board 18 may include an audio signal (sound effect signal) designating audio output from the speakers 8L and 8R. The information signal transmitted to the driver board 19 may include a drive control signal indicating a command or control data for moving the performance movable member by driving the performance motor 60 . The information signal transmitted to the driver board 19 may include a lighting signal indicating light emission data for lighting the performance LED 61 . A wiring for receiving an operation detection signal may be connected to the effect control board 12 . The motion detection signal may include a detection signal indicating that a player's motion using the stick controller 31A has been detected. The motion detection signal may include a detection signal indicating that the player's motion using the push button 31B has been detected.

The lamp output board 13 is a board for lamp output that is provided separately from the effect control board 12, and according to the illumination signal from the effect control board 12, a driver IC or the like that supplies a driving current to the game effect lamp 9 or the like. is installed. The backup memory board 14 is a board for storing backup data provided separately from the effect control board 12, and according to the backup control signal from the effect control board 12, it is possible to execute the writing process and the reading process of the backup data. It is configured. The backup data write process writes and stores the backup data in the backup data memory. In the backup data reading process, the backup data stored in the backup data memory is read and transmitted to the effect control board 12 or the like. The effect data memory board 16 is a board for storing effect data provided separately from the effect control board 12, and is configured to be able to read out the effect data according to the effect data control signal from the effect control board 12. ing. The effect data reading process reads the effect data stored in the effect data memory and transmits it to the effect control board 12 or the like. The performance data memory board 16 is equipped with a performance data memory capable of storing performance data. The performance data memory includes a storage area for storing various image data representing images displayed on the image display device 5, a storage area for storing various sound data representing sounds output from the speakers 8L and 8R, and a performance motor 60. A storage area for storing various motor data indicating the details of drive control of the game effect lamp 9 and a storage area for storing various light emission data indicating the details of lighting control for the performance LED 61, etc. may be provided in advance. The effect data memory may be, for example, a non-rewritable semiconductor memory, a rewritable semiconductor memory such as flash memory such as NAND-ROM, or a non-volatile recording medium such as magnetic memory or optical memory. Any one of the above may be used.

The effect control relay board 17 is installed in a back pack or the like attached to the back surface of the game board 2, and relays various signals transmitted from the effect control board 12 toward the audio output board 18 and the driver board 19.例文帳に追加The back pack may be attached to the central portion of the back side of the game board 2, and an opening facing the image display device 5 may be formed in the center. The back pack may be provided so as to cover part or all of the main substrate 11, the lamp output substrate 13, the audio output substrate 18, and the driver substrate 19 from behind. A performance control board box in which part or all of the performance control board 12, the backup memory board 14, and the performance data memory board 16 are accommodated may be attached to the rear side of the back pack. The main board 11 may be accommodated in a board case together with setting keys 51 and setting changeover switches 52 that can be operated by a game hall attendant or the like. In this case, the display monitor 29 and the display changeover switch 30 arranged on the main board 11 may also be accommodated in the board case. The setting key 51, the setting changeover switch 52, and the display changeover switch 30 may be exposed through an opening formed in the rear surface of the substrate case so that they can be operated without opening the substrate case. The audio output board 18 is a board for audio output provided separately from the effect control board 12, and according to the audio signal from the effect control board 12, to output the sound from the speakers 8L and 8R serving as sound output devices. Various circuits are installed. The driver board 19 is a drive control board provided separately from the effect control board 12, and based on the information signal from the effect control board 12, the drive signal of the effect motor 60 and the lighting signal of the effect LED 61 A driver IC and the like to supply are mounted.

A security cover may be attached to cover the substrate case housing the setting keys 51 and the setting changeover switch 52 from the rear side when the gaming machine frame 3 is closed. In a state where the game machine frame 3 is closed, a security cover covers the substrate case housing the setting keys 51 and the setting changeover switches 52 from the back side of the pachinko game machine 1.例文帳に追加As a result, the setting key 51 and the setting switch 52 are inoperable when the gaming machine frame 3 is closed. When the game machine frame 3 is open, the security cover is separated from the substrate case, so that the operation of the setting key 51 and the setting changeover switch 52 is permitted. The setting key 51 and the setting switch 52 cannot be operated from the front side of the pachinko game machine 1 when the game machine frame 3 is closed. In addition, by covering the board case including the setting keys 51 and the setting changeover switches 52 with the security cover, it is possible to prevent the inconvenience of being operated from inside the game island where the pachinko game machine 1 is installed.

A control signal transmitted from the main board 11 toward the effect control board 12 is relayed by the relay board 15 . The control command transmitted from the main board 11 to the effect control board 12 via the relay board 15 is, for example, a effect control command transmitted and received as an electric signal. The effect control command may include a display control command. A display control command is used to control the image display operation in the image display device 5 . The effect control command may include a voice control command. Audio control commands are used to control the audio output from the speakers 8L, 8R. The effect control command may include a lighting control command. The lighting control command is used to control the lighting operation of the game effect lamp 9 and the performance LED 61 . The movable control command is used for motion control of the performance movable member by the driving force of the performance motor 60, and the like. Each of these commands may constitute an effect control command separately, or a combination of some or all of them may constitute an effect control command.

The game control microcomputer 100 mounted on the main board 11 is, for example, a one-chip microcomputer, and includes a ROM (Read Only Memory) 101 for storing game control programs, fixed data, etc., and a game control work. A RAM (Random Access Memory) 102 that provides an area, a CPU (Central Processing Unit) 103 that executes a game control program and performs control operations, and a numerical data that indicates a random value is updated independently of the CPU 103. A random number circuit 104 and an I/O (Input/Output port) 105 are provided. Incidentally, the random number circuit 104 is not limited to being built in the game control microcomputer 100 , and may be externally attached to the game control microcomputer 100 .

As an example, in the game control microcomputer 100, the CPU 103 executes a program read from the ROM 101, thereby executing processing for controlling the progress of the game in the pachinko gaming machine 1. FIG. At this time, the CPU 103 reads fixed data from the ROM 101, reads out fixed data from the ROM 101, writes various variable data to the RAM 102 and temporarily stores them in the variable data write operation, Variation data reading operation to read, CPU103 receives input of various signals from the outside of the game control microcomputer 100 via I / O105, CPU103 to the outside of the game control microcomputer 100 via I / O105 and a transmission operation for outputting various signals. The random number circuit 104 may count numerical data representing part or all of various random numbers used to control the progress of the game.

The ROM 101 provided in the game control microcomputer 100 stores various selection data, table data, etc. used to control the progress of the game, in addition to the game control program. For example, the ROM 101 stores data constituting a plurality of determination tables, determination tables, setting tables, etc. prepared for the CPU 103 to perform various determinations, determinations, and settings. In addition, the ROM 101 includes table data constituting a plurality of command tables used by the CPU 103 to transmit control signals that are various control commands from the main board 11, and a fluctuation pattern table storing a plurality of fluctuation patterns. The table data etc. to be used are stored.

FIG. 3 shows a configuration example of various circuits mounted on the effect control board 12. As shown in FIG. Some or all of the electronic components such as the production control microcomputer 120, the external ROM 121, and the external RAM 122 mounted on the production control board 12 are detachable by inserting or removing a connector pin from the connector socket. may be attached, and other components may be mountably attached by soldering or the like. Connectors 150 to 156 are mounted on the effect control board 12 together with these electronic components. The performance control microcomputer 120 includes a CPU 131, an internal ROM 132, an internal RAM 133, a watchdog timer 134, a timer circuit 135, an interrupt controller 136, a serial communication circuit 137, a clock circuit 138, a VDP (Video Display Processor) 140, and an audio processing circuit. 141 , lamp control circuit 142 , and motor control circuit 143 . The production control microcomputer 120 may be a production control microprocessor that integrates these electronic components. The CPU 131 executes control processing according to a computer program for effect control. The internal ROM 132 fixedly stores a basic program of control processing executed by the CPU 131 such as firmware, system setting data specific to the performance control microcomputer 120, and the like. The internal RAM 133 provides a work area for the CPU 131 . The watchdog timer 134 has a counter circuit that counts up or down based on the setting of the built-in register, and when the measurement time passes the monitoring time (timeout time) and timeout occurs, it becomes a time elapsing signal. generate a signal. The CPU 131 periodically clears and restarts the watchdog timer 134 . When the processing of the CPU 131 is delayed due to some failure or the like and the watchdog timer 134 cannot be cleared and the measurement time elapses, a timeout signal is generated and the processing by the CPU 131 is reset.

The timer circuit 135 is configured by incorporating, for example, four channels (CH0 to CH3) of an 8-bit programmable counter, and is a circuit capable of generating real-time interrupts and measuring time. The timer circuit 135 starts counting down at predetermined intervals from an initial count value set in advance for each channel, and when there is a channel whose count value becomes "00", the interrupt flag corresponding to that channel is set to ON state. do. At this time, if the interrupt is enabled, the timer circuit 135 causes the interrupt controller 136 to generate an interrupt request to the CPU 131 . The timer circuit 135 may have a function as an RTC (Real Time Clock). The RTC can measure the current date and time and output date and time information including date information and time information.

The interrupt controller 136 is a circuit capable of controlling various interrupt requests generated by the effect control microcomputer 120 . The interrupts controlled by interrupt controller 136 include multiple types of interrupts, such as X-class interrupts (XIRQ), I-class interrupts (IRQ), software interrupts (SWI), and illegal opcode traps (ILGOP). You can The interrupt controller 136 has an interrupt control register for setting the permission/prohibition of interrupt and the priority of interrupt for each type of interrupt. For example, the interrupt controller 136 may be provided with interrupt control registers corresponding to various interrupts, such as serial reception interrupt setting, timer interrupt setting, and V sync interrupt setting. Note that the V-sync interrupt is an interrupt that coincides with the output of a vertical synchronizing signal from the VDP 140 that draws an effect image or the like on the image display device 5 . The interrupt control register corresponding to each interrupt contains internal information data (interrupt permission/prohibition data) indicating whether the corresponding interrupt is permitted or not, and internal information data (interrupt priority) indicating the priority of the corresponding interrupt. data) can be set. For example, if the value of the interrupt permission/prohibition data is "0", the corresponding interrupt is set to the enabled state, and if the value of the interrupt permission/prohibition data is "1", the corresponding interrupt is disabled. state. The interrupt priority is set by, for example, interrupt priority data in 16 steps (4 bits). (=FH)”, the priority of the corresponding interrupt is the lowest. Not limited to interrupt control registers for serial reception interrupt setting, timer interrupt setting, and V sync interrupt setting. , an interrupt control register may be provided for any interrupt related to the control of the presentation.

The internal information data set in the interrupt control register is set in advance in a predetermined area (program management area, etc.) of the internal ROM 132 . When the pachinko gaming machine 1 is powered on, the CPU 131 sets the serial communication circuit 137, sets the random number generation, sets the internal reset operation, etc. according to the setting contents of the program management area. At this time, the internal information data of interrupt control registers corresponding to various interrupts, such as serial reception interrupt setting, timer interrupt setting, and V sync interrupt setting provided in the interrupt controller 136, are set. As a result, serial reception interrupts, timer interrupts, V sync interrupts, etc. are set. For example, in the interrupt control registers for serial reception interrupt setting, timer interrupt setting, and V sync interrupt setting, the interrupt permission/prohibition data in the internal information data all indicate a value of "0", and the serial The receive interrupt, timer interrupt, and Vsync interrupt are all set to the enabled state. The interrupt priority data in the internal information data is such that serial reception interrupts have a higher priority than timer interrupts, and timer interrupts have a higher priority than V sync interrupts. are set with corresponding 4-bit values. A reset controller may be provided inside or outside the interrupt controller 136 . The reset controller controls various resets generated by the effect control microcomputer 120 . Resets controlled by the reset controller include system resets and user resets. A system reset occurs when a low level signal is input to the SRST terminal for a certain period of time. The user reset is triggered when a low-level signal is input to the URST terminal for a certain period of time, when the timeout signal of the watchdog timer 134 is generated, and when an out-of-designated-area travel prohibition (IAT) signal is generated. It occurs due to a predetermined user reset factor, such as when it occurs.

The serial communication circuit 137 is a circuit capable of transmitting and receiving communication data by a serial communication method to various boards and various circuits other than the effect control board 12 . The serial communication circuit 137 may be capable of transmitting and receiving communication data compatible with multiple types of serial communication standards such as UART (Universal Asynchronous Receiver Transmitter), SPI (Serial Peripheral Interface), and I2C (Inter-Integrated Circuit). The serial communication circuit 137 may include a plurality of communication processing units including a receiving unit, a transmitting unit, a communication control unit, a serial communication data register, a serial status register, a serial control register, and the like. UART is an asynchronous serial communication standard, and transfers communication data using a start bit and a stop bit. In this case, the clock signal line becomes unnecessary, but the communication speed (baud rate) becomes relatively low. SPI and I2C are clock-synchronous serial communication standards, and transfer communication data using a clock signal. In this case, a clock signal line is required, but the communication speed (baud rate) is relatively high. In the case of SPI, signal lines are provided respectively corresponding to a clock signal, a transmission data signal, a reception data signal, and a slave selection signal. In the case of I2C, signal lines corresponding to clock signals and data signals are provided. The plurality of communication processing units included in the serial communication circuit 137 may have different hardware configurations according to the plurality of types of serial communication standards. The clock circuit 138 is a circuit that generates a clock signal to be supplied to each circuit of the production control microcomputer 120, such as the CPU 131 and the VDP 140, for example. For example, the clock circuit divides the external clock input to the clock input terminal to generate an internal system clock signal and supplies it to each circuit of the effect control microcomputer 120 .

The VDP 140 determines control details for image display in the image display device 5 based on display control commands from the CPU 131, register settings, and the like. For example, the VDP 140 determines the switching timing of the effect image to be displayed on the screen of the image display device 5, thereby performing control for executing variable display of decorative patterns and various effect displays. The VDP 140 is an image processor having image data processing functions such as a high-speed drawing function, moving image data separation function, and video decoding function. The VDP 140 may be a GPU (Graphics Processing Unit), a GCL (Graphics Controller LSI), or an image processing microprocessor generally called a DSP (Digital Signal Processor). The audio processing circuit 141 can generate audio signals used for audio output by the speakers 8L and 8R based on commands and register settings from the CPU 131 and VDP 140. FIG. The lamp control circuit 142 can generate an illumination signal corresponding to a lighting mode (light-emitting mode) such as lighting, extinguishing, or blinking of light-emitting members such as the game effect lamp 9 and the performance LED 61 . The motor control circuit 143 can generate drive control signals used to drive the performance motor 60 .

The external ROM 121 contains, as specific contents of the effect control by the effect control microcomputer 120, various data such as instruction codes constituting system programs and user programs executed by the CPU 131, management data, table data, effect control patterns, and the like. is permanently stored. The external RAM 122 serves as an auxiliary area for the internal RAM 133 and temporarily stores various data. The connectors 150 to 156 are configured using, for example, receptacles, and have a configuration of a wiring connection device capable of detachably connecting various signal wirings. The connectors 150 to 156 make it possible to output various signals via different paths such as mutually different wiring patterns in the effect control board 12 . The connector 150 is a connector port for main board wiring that can connect the main board wiring that is electrically connected to the main board 11 . The connector 151 is a connector port for power supply wiring to which power supply wiring electrically connected to a power supply unit such as a power supply board can be connected. The connector 152 is a connector port for effect relay wiring that can connect the effect relay wire electrically connected to the effect relay unit such as the effect control relay board 17 . The connector 153 is a connector port for frame lamp wiring that can connect the frame lamp wiring electrically connected between the lamp output board 13 and the frame lamp portion on which part or all of the game effect lamp 9 is provided. be. The connector 154 is a connector port for backup wiring to which a backup wiring that is electrically connected to a backup unit such as the backup memory board 14 can be connected. The connector 155 is a connector port for effect data wiring to which the effect data wiring electrically connected to the effect data part such as the effect data memory board 16 can be connected. The connector 156 is an inspection wiring connector port capable of connecting an inspection wiring that is electrically connected to an information processing apparatus (such as a personal computer) for inspection, testing, or development. The inspection information processing device may function as an inspection device for the pachinko game machine 1 by executing a specific software program, for example. Thus, the connector 156 is an electronic component used as a connection member to which the inspection device of the pachinko game machine 1 is connected.

The connector 156 can be connected to an inspection wiring at, for example, the trial production stage, the development stage, or the manufacturing stage of the pachinko game machine 1, and the production control microcomputer 120 is shipped according to a test command different from the production control command. A previous inspection process may be made executable. Pre-shipment inspection process, for example, before the completion of the software program during prototyping or development, internal parameters and input/output signals when the production control microcomputer 120 executes part or all of the program code, It may include verifiable processing. The verification environment in which the inspection process is executed before shipment may be, for example, an execution environment corresponding to the state in which the pachinko gaming machine 1 is installed on a gaming machine installation island, or the pachinko gaming machine 1 may be operated independently on a personal computer. It may also be an execution environment in which the operating status can be checked by connecting to an information processing device such as. In addition, the connector 156 can be connected to an inspection wiring at the stage of collecting the pachinko game machine 1, for example, and can execute the reading process of the backup data according to a test command different from the effect control command. good. Alternatively, the connector 156 may be removed at the shipping stage of the pachinko gaming machine 1, for example. Alternatively, the connector 156 is installed only in a predetermined model such as a demonstration or test model other than the model of the pachinko game machine 1 installed in the game hall, and the model (mass production machine) that is mass-produced and installed in the game hall It may not be mounted. A land on which the connector 156 can be mounted may be formed on the board surface of the effect control board 12 . When the connector 156 is removed or not mounted, the copper foil pattern of the land where the connector 156 is no longer mounted may be soldered. The soldering process is a process of applying solder to the exposed portions of the copper foil pattern, and may be performed using, for example, a cream solder printer, or may be performed by any method that does not use a cream solder printer. . When the connector 156 is mounted and when it is not mounted, the same soldering process may be performed, or different soldering processes may be performed. When the soldering process is performed in the same process, there is no need to fabricate multiple patterns of the metal mask used in the cream solder printing machine for applying solder to the lands, thus preventing an increase in the costs required to fabricate the board. Soldering the unmounted lands, such as the connector 156, on which electronic components are not mounted prevents oxidation of the copper foil pattern, prevents problems such as disconnection due to corrosion of the wiring pattern, and appropriately maintains the quality of the board. be able to.

In addition, when an electronic component such as the connector 156 is not mounted, the copper foil pattern of the land on which the electronic component is not mounted is not limited to being soldered and coated. It may be coated. By covering the lands on which electronic components are not mounted in this way, it is possible to prevent oxidation of the copper foil pattern, prevent problems such as disconnection due to corrosion of the wiring pattern, and appropriately maintain the quality of the board. I wish I could. On the other hand, lands on which electronic components are not mounted may not be covered by soldering or the like. For example, when lands are soldered, solder as a conductor adheres to the copper foil pattern, which may cause an unintended short circuit or current path in the wiring pattern. Therefore, by not soldering the lands on which electronic components are not mounted, it is possible to prevent solder from adhering to the copper foil pattern, prevent problems such as short circuits in wiring patterns and changes in current paths, and ensure proper board quality. can be maintained. By performing insulation film treatment instead of soldering, it is possible to prevent solder from adhering to the copper foil pattern, prevent problems such as short circuits in the wiring pattern and changes in current paths, and appropriately maintain the quality of the board. You may do so.

FIG. 4A shows a configuration example of various circuits mounted on the backup memory board 14. As shown in FIG. The backup memory board 14 is provided with a memory controller 200, an RTC 201, a serial communication circuit 202, a test connection section 203, backup data memories 210A to 210D, and a connector 220. FIG. Thus, the backup memory board 14 is provided with backup data memories 210A to 210D as a plurality of backup data storage units. The memory controller 200 can perform write processing and read processing of backup data according to the backup control signal from the effect control board 12 . The RTC 201 can measure the current date and time and supply date and time information including date information and time information to the memory controller 200 . The serial communication circuit 202 is a circuit capable of transmitting and receiving communication data to and from the effect control board 12 by a serial communication method. The serial communication circuit 202 may be capable of transmitting/receiving communication data conforming to a specific serial communication standard such as SPI. The serial communication circuit 202 only needs to have a communication processing section with a hardware configuration compatible with such a specific serial communication standard. The inspection connecting portion 203 may be formed as a specific conductor portion, such as a test point, including terminals capable of inputting and outputting inspection signals. When the test connection portion 203 is a test point, the test probe is brought into contact with the test connection portion 203, and input/output of the test signal is performed between the test device and the effect control microcomputer 120 of the effect control board 12. or read backup data. The inspection connection unit 203 receives an inspection signal between the inspection device and the memory controller 200 of the backup memory board 14 or the backup data memories 210A to 210D without going through the performance control microcomputer 120 of the performance control board 12. It may also be possible to perform output, readout of backup data, and the like. In this way, the testing connection section 203 can provide an interface for performing data communication with the testing device, which is an external device, in the backup memory board 14 .

The backup data memories 210A-210D may be configured in part or in whole using non-volatile ferroelectric memory such as FRAM (registered trademark) (Ferroelectric RAM), and in part or in full using SRAM (Static RAM) with a battery. may be configured using The backup data memories 210A to 210D may be partially or wholly configured using flash memory such as NAND-ROM, EEPROM, or HDD (Hard Disk Drive). A non-volatile ferroelectric memory called FRAM (registered trademark) has a memory cell using a ferroelectric film as a capacitor insulating film, and even when the operating power supply is turned off, the memory written in the memory cell remains unchanged. No data is lost. A configuration using FRAM (registered trademark) does not require a battery backup for data retention, and achieves high-speed writing, high number of rewrites, and low power consumption compared to non-volatile memories such as flash memory, EEPROM, and HDD. As a result, it is possible to prevent an increase in installation area, simplify the device configuration, improve operation efficiency, and appropriately store and save backup data. In addition, the disposal of the battery becomes unnecessary, the disappearance of the stored contents due to replacement of the battery is prevented, and the backup data can be properly stored and preserved. The backup data memories 210A to 210D may be backed up by a backup power supply mounted on the power supply board. In this manner, the backup data memories 210A to 210D can retain their stored contents even when the power supply to the pachinko gaming machine 1 is stopped. The backup data memories 210A to 210D may be capable of holding stored contents without using a backup power source, for example, when part or all of them are configured using FRAM (registered trademark). Alternatively, the backup data memories 210A and 210B may be able to retain their stored contents using a backup power supply, for example, when part or all of them are configured using battery-equipped SRAMs.

The backup memory board 14 uses the date and time information output by the RTC 201 to store and store various types of log information in log areas provided in the backup data memories 210A to 210D. The memory controller 200 can perform write processing and read processing of stored data to the backup data memories 210A to 210D according to commands and instructions sent from the performance control microcomputer 120 of the performance control board 12. In this case, by executing the write process and the read process of the stored data indicating the log information including the date and time information, the operation history, setting history, It suffices if the error history and the like can be stored so as to be verifiable after the fact.

FIG. 4B shows a configuration example for connecting the effect control board 12 and the backup memory board 14 . The performance control board 12 has a connector 154 that can be attached to and detached from the connector 220 of the backup memory board 14 . The backup memory board 14 is provided with a connector 220 detachable from the connector 154 of the performance control board 12. - 特許庁By connecting the connector 154 and the connector 220, the performance control board 12 and the backup memory board 14 can be physically and electrically connected. A connector 154 provided on the performance control board 12 has terminals TM01 to TM06. A connector 220 provided on the backup memory board 14 has terminals TM11 to TM16. Terminals TM01 to TM06 provided in connector 154 and terminals TM11 to TM16 provided in connector 220 are physically and electrically connected to corresponding terminals (for example, terminal TM01 and terminal TM11) when connector 154 and connector 220 are coupled. It is sufficient if the relationship is connected to

A terminal TM01 provided in the connector 154 of the effect control board 12 can provide a specific voltage such as VD1. A terminal TM02 provided in the connector 154 of the effect control board 12 can receive a specific voltage VD1 used for confirming connection with the backup memory board 14 . For example, the specific voltage VD1 output from the terminal TM01 of the connector 154 of the effect control board 12 is supplied to the terminal TM11 of the connector 220 of the backup memory board 14 . Terminals TM11 and TM12 of connector 220 may be short-circuited on the substrate of backup memory substrate 14 . Therefore, when the connector 154 and the connector 220 are coupled, a voltage corresponding to VD1 is supplied from the terminal TM12 of the connector 220 on the backup board 14 to the terminal TM02 of the connector 154 on the effect control board 12. be. On the other hand, in the unconnected state in which the connector 154 and the connector 220 are not coupled, no voltage is supplied to the terminal TM02 of the connector 154 in the effect control board 12 .

In the effect control board 12, the CPU 131 of the effect control microcomputer 120 determines the voltage value at the terminal TM02 of the connector 154 in order to confirm the connection state with the backup memory board . In this case, if the voltage value of the terminal TM02 is a high voltage value corresponding to VD1, it can be determined that the performance control board 12 and the backup memory board 14 are connected (connected state). On the other hand, if the voltage value of the terminal TM02 is a low voltage value corresponding to voltage non-supply, it can be determined that the performance control board 12 and the backup memory board 14 are not connected (unconnected state). In this way, the connection state between the performance control board 12 and the backup memory board 14 may be checked based on the voltage at the terminal TM02, which serves as a connection checking member. It should be noted that it is not limited to confirming the connection state based on the terminal voltage, and for example, the connection state may be confirmed based on the input state of a specific signal. Alternatively, the connection state may be confirmed using a switch or sensor as a connection confirmation member.

The terminals TM03 to TM06 provided in the connector 154 of the effect control board 12 are wire-connected to the serial communication circuit 137 provided in the effect control microcomputer 120 . The terminals TM13 and TM14 of the connector 220 of the backup memory board 14 are connected to the serial communication circuit 202 by wiring. Therefore, the wires connected to the terminals TM03 and TM04 of the connector 154 and the terminals TM11 and TM12 of the connector 220 are connected via the serial communication circuit 137 and the serial communication circuit 202 to the CPU 131 of the production control microcomputer 120 and the backup memory board. Electrical connections are provided so that stored data can be transferred to and from the 14 backup data memories 210A-210D. The terminals TM15 and TM16 of the connector 220 of the backup memory board 14 are wire-connected to the test connecting portion 203 . As a result, the wires connected to the terminals TM05 and TM06 of the connector 154 and the terminals TM15 and TM16 of the connector 220 are connected via the serial communication circuit 137 to the CPU 131 of the production control microcomputer 120 and the backup memory board 14 for inspection. An electrical connection is provided between the connection unit 203 and transmission/reception of inspection signals and transfer of stored data.

The backup memory board 14 is configured to be detachable from the performance control board 12 . As a result, for example, in the case of the pachinko game machine 1 that does not use the backup data memories 210A to 210D, the backup memory board 14 can be removed, thereby increasing the flexibility of the device configuration and increasing the manufacturing cost. can be prevented. In addition, since the stored data can be read and analyzed by removing the backup memory board 14, the workload of checking the stored data can be reduced. The RTC provided in the timer circuit 135 of the performance control microcomputer 120 provided in the performance control board 12 may provide the current time for timing adjustment for executing performances in which, for example, a plurality of pachinko game machines 1 are interlocked. There is a need for relatively high accuracy. On the other hand, the RTC 201 of the backup memory board 14 only needs to be able to identify the context of the memory processing executed for the backup data memories 210A to 210D. can be done. As described above, the RTC 201 of the backup memory board 14 only needs to be of relatively low accuracy, so that an increase in manufacturing cost can be prevented. In addition, the structure and function with which the backup memory board|substrate 14 is provided may be comprised so that the production|presentation control board 12 may be provided. For example, the configuration and functions of backup data memories 210A-210D may be implemented by external RAM 122. FIG. Even in this case, for example, the wiring pattern in the effect control board 12, or a switch or a sensor may be used as a connection confirmation member to confirm the connection state.

In the pachinko gaming machine 1, a predetermined game is played using game balls as game media, and a predetermined game value can be imparted based on the game result. As an example of a game using game balls, when a player performs a predetermined operation (for example, rotating operation) on a ball hitting operation handle provided at the lower right position of the game machine frame 3 in the pachinko game machine 1, a predetermined A game ball as a game medium is shot toward the game area by a shooting motor or the like provided in the hitting ball shooting device. When the game balls flowing down the game area pass through (enter) various winning holes, the game balls are paid out as prize balls. For example, based on the fact that the game ball has passed through the passage gate 41, the normal pattern display device 20 can execute the normal pattern game. In the general pattern game, variable display of normal patterns is performed, and when a specific normal pattern that is a normal pattern winning pattern is stopped and displayed, the display result of the normal pattern becomes "normal pattern winning". When the variable display of the normal pattern is performed and the normal pattern which becomes the normal pattern losing pattern other than the normal pattern winning pattern is stopped and displayed, the display result of the normal pattern becomes "normal pattern losing". In the case of "normal game", open control is performed to open the normal variable winning ball device 6B in a predetermined period, and the second start winning opening is opened. When the game ball passes through the first starting winning hole formed in the normal winning ball device 6A, the first starting winning occurs. When the game ball passes through the second starting winning hole formed in the normal variable winning ball device 6B, the second starting winning occurs. Based on the occurrence of the first start winning prize and the second start winning prize, the variable display of the special design and the decorative design can be executed. The special symbols include the jackpot symbols and the winning symbols. When the jackpot symbols are stopped (derived), the variable display result becomes "big win", and when the winning symbols are stopped (derived), the variable display results. is "losing". When the result of the variable display of the special pattern or decorative pattern is a "big hit", the big prize opening is opened to make it easier for the game ball to pass through (enter), thereby creating an advantageous state for the player. It will be in a jackpot game state.

The advantageous state is not limited to the jackpot game state, and may include a special game state such as a time saving state or a variable probability state. In addition, the upper limit number of round games that can be executed in the jackpot game state is the first round number (for example, "15") that is larger than the second round number (for example, "7"), and it is executable in the time saving state. The upper limit number of times of variable display is the first number (for example, "100") that is higher than the second number (for example, "50"), and the jackpot probability in the variable state is the second probability (for example, 1/50). 1 probability (for example, 1/20), and the number of consecutive chances, which is the number of times repeatedly controlled to the jackpot game state without being controlled to the normal state, is greater than the second consecutive chance number (for example, "5"). It may include a game situation that is more advantageous to the player, such as a part or all of the number of consecutive wins (for example, "10").

Next, the operation (action) of the pachinko game machine 1 in this embodiment will be described. In the main board 11, when power supply from a predetermined power supply board is started, the game control microcomputer 100 is activated, and the CPU 103 executes the game control main process.

FIG. 5 is a flowchart showing an example of game control main processing executed by the CPU 103 of the game control microcomputer 100 on the main substrate 11. As shown in FIG. In the game control main process, it is set to prohibit interrupts (step S1). Subsequently, necessary initial settings are performed (step S2). The initial settings include stack pointer setting, internal device (CTC (counter/timer circuit), parallel input/output port, etc.) register setting, and setting to make the RAM 102 accessible.

After the initial setting, it is determined whether or not the recovery condition is satisfied (step S3). The recovery condition can be satisfied when the clear switch is off, there is backup data, and the backup RAM is normal. The clear switch is mounted, for example, on the power board, and when the power is turned on with the clear switch on, a clear signal in the on state is input to the game control microcomputer 100 through the input port. If such a clear signal has not been input, it may be determined in step S3 that the clear switch is off. The backup data can be stored in the RAM 102 that serves as a backup RAM for game control. When the power supply to the pachinko gaming machine 1 is stopped due to an unexpected power failure or the like (power failure), the CPU 103 executes the power supply stop processing immediately before the pachinko game machine 1 becomes inoperable due to the stop of the power supply. In this process when the power supply is stopped, a process of turning on a backup flag indicating that data is to be backed up in the RAM 102, a data protection process of the RAM 102, and the like are executed. Data protection processing includes adding an error detection code (checksum, parity bit, etc.) and backing up various data. The data to be backed up includes not only various data for progressing the game (including various flags, states of various timers, etc.), but also the states of backup flags and error detection codes. In step S3, it is determined whether or not the backup flag is on, and if it is on, it is determined that there is backup data. It is determined whether or not the backup data saved in this manner matches when the power supply is stopped and when the power supply is restarted, for example, using a parity bit or checksum. If they match, it can be determined that the backup RAM is normal in step S3.

If the recovery condition is satisfied (step S3; Yes), recovery processing (step S4) and setting confirmation processing (step S5) are executed. In the recovery process of step S4, the work area is set based on the contents stored in the RAM 102 (the contents of the backed up data). As a result, the gaming state at the time of stopping the power supply is restored, and when the special symbols are fluctuating, it is sufficient if the fluctuation of the special symbols can be restarted from the state before the restoration. If the recovery condition is not satisfied (step S3; No), an initialization process (step S6) and a setting change process (step S7) are executed. In the initialization process of step S6, a RAM clear process for clearing flags, counters, and buffers stored in the RAM 102 is performed, and initial values are set in the work area.

In the setting confirmation process of step S5, it is determined whether or not a predetermined setting confirmation condition is satisfied. For example, the setting confirmation condition is that the output signal from the door opening sensor 90 is on and the setting key 51 is on at the start of power supply when the setting confirmation process of step S5 is executed. Established when both conditions are satisfied. If the output signal from the door open sensor 90 is OFF or if the setting key 51 is OFF, it is determined that the setting confirmation condition is not satisfied, and the setting confirmation process is terminated. When the output signal from the door open sensor 90 is on and the setting key 51 is on, it is determined that the setting confirmation condition is met. It is to be noted that the setting confirmation process of step S5 is executed when the recovery condition including that the clear switch is turned off is satisfied in step S3. Therefore, since the setting confirmation condition can be satisfied only when the clear switch is off, the fact that the clear switch is off can also be included in the setting confirmation condition. In the setting confirmation process of step S5, when the setting confirmation condition is satisfied, the setting confirmation state is entered in which the setting value set in the pachinko game machine 1 can be confirmed, and the main board 11 sets the performance control board 12. A confirmation start command is sent. When the pachinko game machine 1 is in the setting confirmation state, the pachinko game machine 1 may be in a game stop state to stop the progress of the game. When the game is in the stopped state, the shooting of the game ball by operating the batted ball operation handle, the detection of the game ball by various switches, etc. are stopped, and the first special symbol display 4A, the second special symbol display 4B, and the normal symbols are stopped. The display device 20 may be controlled so as to stop display of the winning symbols or the like, or display corresponding to the game stop state different from the losing symbols. In the setting confirmation state, the setting values set in the pachinko game machine 1 can be confirmed by the display on the display monitor 29 . When ending the setting confirmation state, the accompanying game stop state is ended, and a setting confirmation end command is transmitted from the main board 11 to the effect control board 12 .

In the setting change process of step S7, it is determined whether or not a predetermined setting change condition is satisfied. For example, the setting change condition is that the output signal from the door opening sensor 90 is ON and the setting key 51 is ON at the start of power supply when the setting change process of step S7 is executed. Established when both conditions are satisfied. Also, the setting change condition may include that the clear switch is on. In the setting change process of step S7, if the output signal from the door open sensor 90 is OFF, if the setting key 51 is OFF, or if the clear switch is OFF, the setting change condition is satisfied. It is determined that there was not, and the setting change process is terminated. When the output signal from the door open sensor 90 is ON, when the setting key 51 is ON, and when the clear switch is ON, it is determined that the setting change condition is established. . When the setting change condition is established, a setting change state is entered in which the setting value set in the pachinko game machine 1 can be changed, and a setting change start command is transmitted from the main board 11 to the effect control board 12.例文帳に追加. When the pachinko game machine 1 is in the setting change state, the pachinko game machine 1 may be put in the game stop state as in the setting confirmation state. In the setting change state, the setting values are displayed on the display monitor 29, and each time the operation of the setting changeover switch 52 is detected, the numerical values displayed on the display monitor 29 are sequentially updated and displayed. For example, every time the operation of the setting changeover switch 52 is detected, the setting value is updated as "1"→"2"→"3"→"1"→. After that, when the setting key 51 is turned off by an operation by a game hall staff member or the like, the setting value displayed on the display monitor 29 is stored (updated) in the backup area of the RAM 102, and the display monitor 29 is updated. turn off the This notifies the staff of the game arcade or the like that the new set values have been stored in the backup area of the RAM 102 . When ending the setting change state, the accompanying game stop state ends, and a setting change end command is transmitted from the main board 11 to the effect control board 12 .

On the effect control board 12 side, when a setting confirmation start command or a setting change start command is received, control may be performed to notify that the setting is being checked or that the setting is being changed. For example, a predetermined image may be displayed on the image display device 5, a predetermined sound may be output from the speakers 8L and 8R, or a light-emitting member such as the performance LED 61 may emit light in a predetermined manner. When the setting is being checked or changed, based on the detection of the operation of pressing the operation button for effect such as the push button 31B, display "maintenance mode" etc. and shift to the maintenance mode. may be configured. The "maintenance mode" includes, for example, the date and time setting in the RTC of the timer circuit 135, various error occurrence history (recording when and what kind of error occurred), setting change history (when the set value was changed, and so on). In this mode, you can check the record of the setting value after change). When the setting key 51 is turned off and the setting confirmation process and the setting change process are completed, the maintenance mode may also be terminated.

Thus, if the setting key 51 is on (and the output signal from the door opening sensor 90 is on) when the power is turned on, if the clear switch is on, the initialization process of step S6 and step S7 are performed. is executed to enable control to the setting change state, and if the clear switch is off, the setting confirmation process of step S5 is executed along with the recovery process of step S4 to enable control to the setting confirmation state. On the other hand, if the setting key 51 is off when the power is turned on, and the clear switch is on, the initialization process of step S6 is executed, but the setting change state is not controlled, and the clear switch is turned on. If it is off, the restoration process of step S4 is executed, but the setting confirmation state is not controlled.

After executing the setting confirmation process of step S5 or the setting change process of step S7, the random number circuit setting process is executed (step S8). The random number circuit setting process is a process for initializing the random number circuit 104 so that the numerical data representing the game random numbers can be updated. The random number circuit 104 may be capable of autonomously updating the numerical data indicating the game random number even if the random number circuit setting process by the CPU 103 is not executed. Subsequently, an interrupt initialization process is executed (step S9). The interrupt initial setting process is a process in which permission/prohibition of interrupt and priority can be set according to the interrupt factor generated in the game control microcomputer 100 . For example, the CPU 103 may read the interrupt initial setting information stored in a predetermined area (program management area, etc.) of the ROM 101, and set permission/prohibition and priority of the interrupt according to the read value for each interrupt factor. . Interrupt initial setting process, by performing the register setting of the CTC that is built in the game control microcomputer 100, a predetermined time (such as 2 milliseconds) including the process of generating a periodic timer interrupt every You can After that, after setting the interrupt permission (step S10), the loop processing is entered. Thereafter, an interrupt request signal is sent from the CTC to the CPU 103 at predetermined time intervals (eg, 2 milliseconds), and the CPU 103 can periodically execute timer interrupt processing. The CPU 103 that receives the interrupt request signal from the CTC and accepts the interrupt request executes game control timer interrupt processing.

The game control timer interrupt processing executed by the CPU 103 may include switch processing, main side error processing, information output processing, game random number update processing, special symbol process processing, normal symbol process processing, and command control processing. . The switch process is a process of determining whether or not there is a detection signal received by the CPU 103 from various switches via the switch circuit 110 . The main-side error processing is processing for diagnosing an abnormality of the pachinko gaming machine 1 and, if necessary, issuing a warning according to the diagnosis result. The information output processing includes, for example, jackpot information (information indicating the number of occurrences of jackpots, etc.), starting information (information indicating the number of starting winnings, etc.) supplied to a hall management computer installed outside the pachinko gaming machine 1, This is a process that enables the output of data such as probability variation information (information indicating the number of times the probability variation state has occurred). The game random number update process is a process that allows software to update at least part of the game random numbers used on the main board 11 side. The special symbol process process is a process that enables execution and suspension management of a special symbol game, control of a big hit game state and a small hit game state, control of a game state, and the like. Normal pattern process processing includes management of execution and suspension of a normal pattern game based on the detection signal from the gate switch 21 (based on the game ball passing through the passage gate 41), and variable winning balls based on "normal pattern winning". This is a process that makes it possible to control the opening of the device 6B. The command control process is a process that enables the effect control command set for transmission to be transmitted to the sub-side control board such as the effect control board 12 .

In the special symbol process process included in the game control timer interrupt process, first, the starting winning determination process is executed. After executing the starting prize determination process, one of a plurality of processes is selected and executed according to the value of the special figure process flag provided in the RAM 102 . The processing that can be selected according to the value of the special symbol process flag is special symbol normal processing, variation pattern setting processing, special symbol variation processing, special symbol stop processing, jackpot opening pre-processing, jackpot opening middle processing, jackpot opening post-processing, It is only necessary to include part or all of the processing according to the game control program, such as jackpot end processing, small win opening preprocessing, small win opening processing, and small winning end processing.

In the starting winning determination process, it is determined whether or not the first starting winning or the second starting winning has occurred, and if it has occurred, setting for updating the number of pending memories is performed. The number of pending memories indicates the number of variable displays of special symbols and decorative symbols that have not yet started. In the special symbol normal process, it is determined whether or not to start execution of the special symbol game. Further, in the special symbol normal process, it is determined whether or not the variable display result of the special symbol and the decorative symbol is to be a "big hit". Furthermore, in the special symbol normal process, setting of a fixed special symbol in the special symbol game, etc. is performed corresponding to the variable display result. In the variation pattern setting process, the variation pattern is determined based on the variable display result and the like. In the special symbol variation process, setting for varying the special symbol, setting for measuring elapsed time from the start of variation, and the like are performed. In the special symbol stop process, setting for stopping the fluctuation of the special symbol and stopping and displaying (deriving) the determined special symbol that is the variable display result is performed.

In the big win opening pre-processing, setting for opening the big winning opening in the big win game state corresponding to the variable display result "big win" is performed. In the process during the opening of the big win, it is determined whether or not to return the big winning opening opened in the big win game state to the closed state. In the process after opening the jackpot, after returning the jackpot to the closed state, it is determined whether or not the number of rounds executed has reached the upper limit. Settings for ending the jackpot game state are performed. In the jackpot end processing, after waiting until the waiting time corresponding to the execution period of the ending performance for notifying the end of the jackpot game state elapses, setting for starting variable probability control and time saving control is performed. In the small hit opening pre-processing, the variable display result corresponds to the "small hit", setting for opening the big winning opening in the small winning game state, and the like are performed. In the process during opening of the small hit, determination of whether or not to return the large winning opening opened in the small hit game state to the closed state is performed. In the small winning end processing, the game state in the pachinko game machine 1 before entering the small winning game state after waiting until the waiting time corresponding to the period in which the performance operation for reporting the end of the small winning game state is executed elapses. Settings are made to continue.

The pachinko game machine 1 is configured such that the probability of winning a big hit (ball output rate) changes according to a set value. In the special symbol normal processing of the special symbol process processing, by using the display result determination table (winning probability) according to the set value, the winning probability of the big hit (ball output rate) can be changed. The setting value consists of three levels from "1" to "3", with "1" having the lowest ball payout rate, and the higher the value in the order of "1", "2", and "3", the higher the ball payout rate. . That is, when "1" is set as the setting value, the advantage for the player is the lowest, and the advantage increases stepwise as the value increases in the order of "2" and "3". It should be noted that the odds of winning a small hit may be the same regardless of the set value.

FIG. 6 is an explanatory diagram showing a display result determination table corresponding to each set value. The display result determination table is a collection of data stored in the ROM 101, and is a table in which hit determination values to be compared with the random number MR1 for display result determination are set. In each display result determination table, the variable special symbol designation buffer value is "1" (first), that is, the first special symbol (special symbol displayed on the first special symbol display device 4) is the object of variable display. And when the variable special symbol designation buffer value is "2" (second), that is, the second special symbol (special symbol displayed on the first special symbol display device 4) is the object of variable display For each case, a determination value for a big hit and a determination value for a small hit are set. FIG. 6A shows the display result determination table corresponding to the setting value "1", FIG. 6B shows the display result determination table corresponding to the setting value "2", and FIG. The display result determination table corresponding to the setting value "3" is shown.

When the set value uses the display result determination table corresponding to "1", if the variable special figure designation buffer value is "1" (first), that is, the first special symbol is subject to variable display If the set value is "2" or "3", a jackpot is won with a lower probability (1/320 at non-variable probability, 1/32 at variable probability). When the set value is "1" and the variable special figure designation buffer value is "1" (first), part of the determination value is set as a determination value corresponding to the small hit, and the set value is If the set value is "1", the small hit is won with the same probability (1/99) as when the set value is "2" or "3". When the fluctuation special figure designation buffer value is "2" (second), as the judgment value corresponding to the big hit, the same judgment value as when the fluctuation special figure designation buffer is "1" (first) It is set, and even if the second special symbol is subject to variable display, the same probability as when the first special symbol is subject to variable display (1/320 when non-variable, 1/320 when variable 1/32) to win the jackpot. If the set value is "1" and the variable special figure designation buffer value is "2" (second), half of the judgment value is set as the judgment value corresponding to the small hit. As in the case where the values are "2" and "3", a small hit is won with a higher probability (1/2) than when the first special symbol is the object of variable display.

When using the display result determination table corresponding to the set value "2", if the variable special figure designation buffer value is "1" (first), the set value is higher than the case of "1" Win a big hit with a probability (1/300 for non-probability, 1/30 for probability). When the set value is "2", if the fluctuation special figure designation buffer value is "2" (second), the fluctuation special figure designation buffer value is "1" (second) as the judgment value corresponding to the big hit 1) The same determination value as in the case of 1) is set, and even when the second special symbol is subject to variable display, the same probability as when the first special symbol is subject to variable display (1/300 when non-variable, 1/30 when variable) to win a big hit. When using the display result determination table corresponding to the set value "3", if the variable special figure designation buffer value is "1" (first), the set value is "1", "2" Winning a big hit with a higher probability than in the case (1/280 at non-probability, 1/28 at probability). When the set value is "3", if the fluctuation special figure designation buffer value is "2" (second), the fluctuation special figure designation buffer value is "1" (second 1) The same determination value as in the case of 1) is set, and even when the second special symbol is subject to variable display, the same probability as when the first special symbol is subject to variable display (1/280 when non-variable, 1/28 when variable) wins the jackpot.

The CPU 103 refers to the display result determination table corresponding to the set value, and determines that the special symbol is a big hit when the value of MR1 matches any of the hit determination values corresponding to the big win. When the value of MR1 coincides with any hit determination value corresponding to a small win, it is determined that the special symbol is a small win. As a result, the winning of the big win and the winning of the small win are determined with a probability according to the set value. The "probability" here indicates the probability (percentage) of a big hit and the probability (percentage) of a small hit. Determining whether or not to make a big win means determining whether or not to control to a big win game state, and the stop symbols on the first special symbol display device 4A or the second special symbol display device 4B are changed to the big win symbols. It is also a matter of deciding whether to Determining whether or not to make a small hit means determining whether or not to control to a small winning game state, and the stop symbol on the first special symbol display device 4A or the second special symbol display device 4B is small. It is also to decide whether or not to use a winning pattern. The odds of winning a small hit may differ according to the set value. For example, similar to the winning probability of the big win, the odds of winning the small win may be increased in the order of "1", "2", and "3". The setting difference of the winning probability of the small win may be set to have the same ratio as the setting difference of the winning probability of the big win. If the winning probability of the small win at the setting value "1" is 1/100, the winning probability of the small win at the setting value "2" is designed to be 1/93.75, and the setting value "3". It may be set so that the probability of winning a small hit in 2 is 1/87.5. When the pachinko game machine 1 is not provided with a small hit, a display result determination table excluding the hit determination value corresponding to the small win may be used. A big hit determination table and a small hit determination table are provided separately, and the determination of the big hit is made by the variable display of the first special symbol and the variable display of the second special symbol regardless of the variable special symbol designating buffer value. A common table is used to determine the small hit, and a separate table is used when the variable special figure designation buffer value is "1" (first) and when it is "2" (second) may be used. It may be configured such that the order of the advantage changes according to the game state. For example, it is applied to a gaming machine that is controlled to a high probability/high base state, is maintained in the high probability/high base state until the next big win occurs, and is configured so that a certain amount of prize balls can be obtained in a small win game. In this case, when the variable display of the second special symbol is executed, a small hit occurs with a high probability of 1/2, and it can be a period in which it is easy to obtain a prize ball, so a specific game state (in this example, High Probability / High Base State), unlike other game states, the set value "1" is the setting with the highest advantage, in which it is difficult for a big hit to occur (high probability / high base state is likely to continue). may After being controlled to the probability change state (high probability state), when applied to a gaming machine where the probability change state ends based on the execution of the variable display of a predetermined number of times (the probability change end count), even if it is the same probability change end number For example, the variable probability continuation rate (continuous home rate) may be configured to increase in the order of set value “1”<set value “2”<set value “3”. The set values that can be set in the pachinko game machine 1 may be two or four or more.

When the result of the variable display of the special symbols and decorative symbols is "big win", the big win type may be set. For example, multiple types of opening modes (number of rounds and upper limit period of opening) of the big winning opening and game states after the jackpot game state (normal state, time saving state, variable probability state, etc.) are prepared, and the jackpot type is set according to these may be As the jackpot types, there may be provided jackpot types in which many prize balls can be obtained, jackpot types in which few prize balls can be obtained, or jackpot types in which few prize balls can be obtained. To determine the jackpot type to be one of a plurality of jackpot types A to C based on a random number MR2 for jackpot type determination when the variable display result is determined to be a ``jackpot''. You may provide the jackpot classification determination table referred to. In the jackpot type determination table, a decision value may be assigned so that the determination ratio of the jackpot type is different depending on which of the set values is "1" to "3". For example, when the set value is "1", the ratio of determination to the jackpot type C is high, and when the set value is "2", the percentage of determination to the jackpot type B is high, and the set value is "3". , the determination value may be assigned such that the percentage of the jackpot type A being determined is high.

A fanfare period, an interval period and an ending period in the jackpot game may be determined for each jackpot type. The fanfare period is, for example, a period during which pre-processing for the opening of the special symbol process is executed on the main board 11 side, and the start of the big win game state is started after the big win symbol is stopped and displayed on the effect control board 12 side. This is the period in which the fanfare effect as the effect action to be notified is executed. The interval period is, for example, on the main board 11 side, a period during which the special symbol process processing after the opening of the jackpot is executed. It is a period during which an interval production is executed as a production operation for notifying the start of the round. The ending period is, for example, a period in which the big hit ending process of the special symbol process is executed on the main board 11 side, and the ending effect as the effect operation for notifying the end of the big win game state is executed on the effect control board 12 side. It is the period during which As an example, the fanfare period, the interval period and the ending period may be set to be the longest in the case of the jackpot type A, the longest in the case of the jackpot type B, and the shortest in the case of the jackpot type C. . When the set value is "1", the fanfare period, the interval period, and the ending period tend to become relatively short if the ratio of judgment as the jackpot type C increases. When the set value is "3", if the ratio of judgment as jackpot type A increases, the fanfare period, the interval period and the ending period tend to become relatively long. The average period of the fanfare period, the interval period, and the ending period may be lengthened in the order of setting values "1"<"2"<"3".

The probability of winning a jackpot (percentage of winning balls) increases in the order of set values ``1'' < ``2'' < ``3'', and at the same time, the set values ``1'' < ``2'' < ``3''. The average period of the fanfare period, the interval period, and the ending period may be lengthened in this order. With such a configuration, when the probability of winning the jackpot (ball output rate) is set to be high, the average period of the fanfare period, the interval period and the ending period can be lengthened, that is, the progress of the game can be delayed, thereby increasing gambling. can be prevented from becoming too high. During the big win game, it may be configured to be able to execute a big win suggesting performance suggesting a set value. The jackpot suggesting effect can be executed during the fanfare period, the interval period and the ending period. This makes it possible to enhance the interest of the fanfare period, the interval period and the ending period. Also, by directing the player's interest to the effect suggesting during the big win, it is possible to make it difficult for the player to notice the length of each period. In the fanfare period, the interval period, and the ending period, a common effect may be executed regardless of the length of the set period. In this case, it is desirable that an effect (for example, display of a still image, etc.) that is difficult for the player to notice the length of the period is executed in common. The fanfare period, the interval period, and the ending period may be fixedly set regardless of the set values. Any one of a plurality of types of fanfare periods, interval periods, and ending periods having different predetermined periods may be determined by lottery. In this case, a table is used in which the judgment values are set so that the ratio of selecting the fanfare period, the interval period, and the ending period, in which relatively long periods are set, increases in the order of jackpot types A<B<C. Thus, the fanfare period, the interval period, and the average period of the ending period can be lengthened in the order of the setting values "1"<"2"<"3".

The number of times of time reduction control and probability variable control may be different for each jackpot type, and in the case of a specific jackpot type, the high accuracy control and time reduction control executed after the end of the jackpot game state are performed by the jackpot game. After the end of the state, the game may be continuously executed until a big win occurs again. In the case of such a specific jackpot type, a jackpot game state occurs continuously without going through the normal state, which is a so-called continuous game state. In addition to or instead of the configuration in which the percentage of big hits differs for each set value set in the pachinko game machine 1, the variable probability continuation rate (continuous game rate) may be made to differ for each set value. For each jackpot type, the number of rounds during the jackpot game, presence/absence of time reduction control and variable probability control, and the number of times of control may be changed to give different advantages. In this case, the performance during the round may be different for each big win type, or may be the same regardless of the big win type. Depending on the set values, there may be one or a plurality of jackpot types that cannot be determined among jackpot types A, jackpot types B, and jackpot types C. In other words, if the determination ratio of the jackpot type differs according to the set value, it is possible to not determine one of the jackpot types (the determination ratio is 0%), or to set a specific jackpot type to 100%. It involves determining percentages. The fanfare period, the interval period and the ending period may be made different regardless of the jackpot type. For example, the fanfare period, the interval period, and the ending period may be uniformly determined according to which of the set values "1" to "3". Further, for example, according to which of the set values "1" to "3", a lottery process is performed according to the selection probability according to the set value, and the fanfare period, the interval period and the ending period are determined. You may It is sufficient if the interest in the game can be improved by changing the determination ratio of the jackpot type when the variable display result is "jackpot" according to the set value. The jackpot type may be determined using the random number MR1 for display result determination. The smaller the setting value set in the pachinko game machine 1, the more advantageous it is for the player. The playability may be changed according to the setting value set in the pachinko game machine 1. - 特許庁

A set value may be suggested by the frequency with which normal reach and super reach are performed by having the execution ratio of normal reach and super reach differ according to a set value. The special period may be the period until the variable display is performed a predetermined number of times (30 times in this example) regardless of whether or not the setting is changed when the power is turned on. Using the RTC of the game control microcomputer 100 or the like, a predetermined time period (for example, from 10:00 am to 11:00 am) may be set as a special period. The period until the first big hit occurs may be the special period. In the special period, the ratio of normal reach loss is higher than in the non-special period, and even if the variation pattern judgment table in which the judgment value is assigned so that the difference in the ratio of normal reach loss between the set values becomes larger good. As a result, during the special period, it becomes easier to recognize the difference in the frequency of execution of normal reach than during the non-special period (that is, it becomes easier to recognize the suggestion of the set value), so that it is possible to motivate the player to play the game during the special period. It is possible to increase the game interest.

In addition, it may be possible to execute arbitrary setting suggestion effects at different ratios according to the set values. For example, in the case of the specific setting value, the determination value of the effect determination table is assigned so that the setting suggestion effect can be executed at a higher rate than in the case of the setting value other than the specific setting value. In this case, in a range where the set value is other than the specific set value, there is provided a limit as a limit that the execution ratio of the setting suggestion effect is lower than in the range where the set value is the specific set value. A setting suggestion effect may be provided that is executable at a predetermined rate when the specific set value is set and is not executed when the set value is other than the specific set value. In this way, within a range in which the set value is the specific set value, the setting suggestion effect can be executed at a predetermined rate. On the other hand, a limitation is provided as a limit that the setting suggestion effect is not executed in a range where the set value is other than the specific set value.

Depending on whether it is a special period or not, it may be possible to execute arbitrary setting suggestion effects at different ratios. For example, in the case of the special period, the judgment value of the production judgment table is assigned so that the setting suggestion production can be executed at a higher rate than in the case of the period other than the special period. In this case, in a period other than the special period, a limitation is provided as a limit that the execution ratio of the setting suggestion effect is lower than in the special period. A setting suggestion effect may be provided that is executable at a predetermined rate in the special period and is not executed in the period other than the special period. In this manner, the setting suggestion effect can be executed at a predetermined rate within the special period. On the other hand, within a period other than the special period, there is a limitation as a limit that the setting suggestion effect is not executed.

Depending on whether or not an arbitrary special condition is satisfied, regardless of whether it is a special period or not, arbitrary setting suggestion effects may be executed at different ratios. For example, when the special condition is satisfied, the determination value of the effect determination table is assigned so that the setting suggestion effect can be executed at a higher rate than when the special condition is not satisfied. In this case, in the range where the special condition is not satisfied, the execution ratio of the setting suggestion effect is lower than in the range where the special condition is satisfied. A setting suggestion performance may be provided that is executable at a predetermined rate when the special condition is met and is not executed when the special condition is not met. In this way, within the range where the special condition is satisfied, the setting suggestion effect can be executed at a predetermined rate. On the other hand, in the range in which the special condition is not established, there is provided a limit as a limit that the setting suggestion effect is not executed. The special condition may be any condition that can be established according to the progress or history of the game in the pachinko gaming machine 1 or the result of judgment or decision of the game, or the progress or history of the performance in the pachinko gaming machine 1 or the performance. It may be any condition that can be established according to the determination or determination of. It is not limited to the setting-suggestion effect, and any effect may be executed at a different rate depending on whether or not a preset condition is satisfied, or whether such a condition is satisfied. The effect mode may be determined at a different rate depending on whether or not, or the execution timing may be determined at a different rate depending on whether such a condition is satisfied. . In addition, an arbitrary effect may be limited as a limit that a specific effect is not executed in the range where the preset limit condition is satisfied, or compared with the range where the limit condition is not satisfied. A limit may be provided as a limit that the execution rate is lowered and execution is difficult.

Next, the operation of the effect control board 12 will be described. In the effect control board 12, when the power supply from the power supply board is started, the effect control microcomputer 120 is activated, and the CPU 131 executes the effect control main process. A program for executing the effect control main process may be stored in advance in one or both of the internal ROM 132 and the external ROM 121 . Thus, part or all of the program for executing the effect control main process may be stored in advance in the internal ROM 132 or the external ROM 121 .

FIG. 7A is a flow chart showing an example of an effect control main process executed by the CPU 131 of the effect control microcomputer 120 mounted on the effect control board 12. FIG. In the effect control main process, an initialization process is executed (step S21). In the initialization process of step S21, one or both of the external RAM 122 and the internal RAM 133 are cleared, various initial values are set, and register settings of the timer circuit 135 are initialized. Following the initialization process, an initial operation control process is executed (step S22). In the initial motion control process of step S22, control for initial motion of the movable member for presentation is executed, such as control for driving the motor for presentation 60 to return the movable member for presentation to the initial position and control for confirming the operation. . After the initial operation control process, power-on information processing is executed (step S23). In the power-on information processing in step S23, a process of storing log information including the date and time of power-on may be executed. Data indicating the log information is written and stored as backup data in log areas provided in the backup data memories 210A to 210D of the backup memory board . The CPU 131 of the effect control microcomputer 120 transmits a control signal corresponding to the backup command for power-on to the backup memory board 14 via the serial communication circuit 137 . In the backup memory board 14, in response to the backup command indicated by the control signal received by the memory controller 200 via the serial communication circuit 202, the date and time information obtained from the RTC 201 is used to write log information including the power-on date and time. Processing should be executed. In the power-on information processing in step S23, backup restoration processing may be executed to restore settings and controls based on the log information stored in the log area.

After the power-on information processing, an interrupt initial setting process is executed (step S24). In the interrupt initialization process of step S24, it is sufficient if the priority of the interrupts controlled by the interrupt controller 136 can be initialized. The priority of interrupts controlled by interrupt controller 136 may be set based on interrupt priority data stored in advance in a program management area or the like provided in one or both of external ROM 121 and internal ROM 132 . For example, the serial reception interrupt has a higher priority than the effect control timer interrupt, and the effect control timer interrupt has a higher priority than the V sync interrupt. should be set. Then, after setting the interrupt permission (step S25), the loop processing is entered.

FIG. 7B shows a setting example of processing priority in the effect control microcomputer 120. FIG. The processing priority in the effect control microcomputer 120 may be determined in advance based on the specifications of the effect control microcomputer 120 together with the interrupt priority controlled by the interrupt controller 136 . As an example, the processing when a CPU exception event occurs has the highest priority, followed by VDP error interrupt processing. It suffices if the processing priority is set in advance so that the priority of . Note that the VDP error interrupt process may be executed based on the occurrence of an interrupt factor controllable by the interrupt controller 136 . In this case, for example, the priority of the interrupt may be set by the interrupt initial setting process in step S24 so that the VDP error interrupt has the highest priority. The CPU exception event occurrence process is a process that is executed when an exception event due to an internal state abnormality or the like occurs in the CPU 131 of the effect control microcomputer 120 . A CPU 131 exception may occur when decoding an undefined instruction that is not defined within the instruction set. CPU 131 exceptions may occur when performing invalid operations such as division by zero or overflow. A CPU 131 exception may occur when a storage protection violation occurs in virtual memory. An exception event of the CPU 131 may occur in the case of a TLB (Translation Lookaside Buffer) miss that causes an error in translation from a virtual address to a physical address. The VDP error interrupt process is a process that is executed when an error interrupt request occurs due to an abnormality in the internal state of the VDP 140 of the effect control microcomputer 120 . The VDP 140 error interrupt request may occur in response to VDP 140 exception events, as in the case of the CPU 131 . In addition, the error interrupt request of the VDP 140 may occur when there is a setting error in the clock signal (dot clock) used for display control of the image display device 5 . An error interrupt request for the VDP 140 may occur when there is an abnormality in decoding moving image data. The VDP 140 error interrupt request may occur when there is an audio data decoding error. A VDP 140 error interrupt request may occur in response to a system reset in VDP 140 . In this way, the CPU exception event processing is executed when an exception event of the CPU 131 occurs. The VDP error interrupt process is executed when an error interrupt request for the VDP 140 occurs. Therefore, when the event occurrence condition corresponding to the internal state of the CPU 131 is established, the CPU exception event occurrence process is executed. When an event generating condition corresponding to the internal state of the VDP 140 is established, VDP error interrupt processing is executed. The CPU exception event occurrence processing and the VDP error interrupt processing can be executed when an event occurrence condition that can be established according to the internal state of the control device or processing device such as the CPU 131 or VDP 140 is established.

FIG. 8A is a flowchart showing an example of processing when a CPU exception event occurs. In the CPU exception event occurrence processing, first, exception preprocessing is executed (step S41). In the exception pre-processing of step S41, control information for instruction code execution is saved in a predetermined area (such as a stack area) of the internal RAM 133, for example. The control information for instruction code execution may include a stored value of a program counter (PC) and a value of a program status word (PSW). Following the exceptional preprocessing, an exceptional backup process is executed (step S42). In the exceptional backup process in step S42, a process of storing log information including exceptional event information is executed. In this case, a control signal corresponding to the backup command for exception event occurrence is sent to the backup memory board 14 . The backup instruction for when an exceptional event occurs may include exceptional event information that indicates an exceptional event that has occurred in the CPU 131 so as to be identifiable. The exception event information may identifiably indicate the type of exception event. When the memory controller 200 of the backup memory board 14 receives the backup command for exception event occurrence, the date and time information obtained from the RTC 201 may be used to write the log information including the exception event information.

After the exceptional backup process, other exceptional processes are executed (step S43). In step S43, for example, the vector table may be accessed and an exception handling routine may be started by jumping to the acquired exception handler address. At this time, the values stored in internal registers (such as general-purpose registers) of the CPU 131 may be saved. If the exception event could be resolved by the exception handling routine, or if the exception event could not be resolved and a reset occurred, a backup process similar to step S42 is executed, and if the exception event could or could not be resolved, It may be possible to store the log information in the case where there is not. When the exception handling is finished, the exception post-treatment is executed (step S44), and the CPU exception event occurrence handling is finished. In the post-exception processing of step S44, the values stored in the internal registers (general-purpose registers, etc.) of the CPU 131 are restored, and the control information for executing the instruction code is restored. Just do it.

FIG. 8B is a flowchart showing an example of VDP error interrupt processing. In the VDP error interrupt process, first, preprocessing for error interrupt is executed (step S51). In the error interrupt pre-processing of step S51, for example, the control information for executing the instruction code is saved in a predetermined area (such as a stack area) of the internal RAM 133 . Following the error interrupt preprocessing, error interrupt backup processing is executed (step S52). In the error interrupt backup process in step S52, a process of storing log information including VDP error information is executed. In this case, a control signal corresponding to the backup command for when a VDP error occurs is transmitted to the backup memory board 14 . The backup command for when a VDP error occurs may include VDP error information that identifiably indicates an error that has occurred in the VDP 140 . The VDP error information may identifiably indicate the type of VDP error. When the memory controller 200 of the backup memory board 14 receives a backup command when a VDP error occurs, the date and time information acquired from the RTC 201 may be used to write log information including VDP error information.

After the error interrupt backup process, another error interrupt process is executed (step S53). In step S53, it may branch to the interrupt processing routine by jumping to the obtained interrupt handler address according to the interrupt factor corresponding to the VDP error, for example. At this time, the values stored in internal registers (such as general-purpose registers) of the CPU 131 may be saved. Note that if the VDP 140 can autonomously execute recovery processing from an internal error, it may wait until it receives a notification of the completion of recovery or a notification of the occurrence of a reset due to inability to recover. Upon receipt of these notifications, backup processing similar to step S52 may be executed to store log information when the VDP 140 recovers from the error state or cannot recover. When the error interrupt process ends, the error interrupt post-process is executed (step S54), and the VDP error interrupt process ends. In the error interrupt post-processing of step S54, the values stored in the internal registers (general-purpose registers, etc.) of the CPU 131 are restored, and the control information for executing the instruction code is restored, so that the processing before the VDP error occurred can be restored. And it is sufficient.

The CPU exception event occurrence processing includes exception backup processing in step S42. The VDP error interrupt processing includes error interrupt backup processing in step S52. In the exceptional backup process in step S42, data including exceptional event information about the CPU 131 among the plurality of electronic components is stored in the backup data memories 210A to 210D of the backup memory board 14 as backup data indicating log information. A write operation is performed to write to the area. In the error interrupt backup process in step S52, data including VDP error information regarding the VDP 140 among the plurality of electronic components is stored in the backup data memories 210A to 210D of the backup memory board 14 as backup data indicating log information. A write process is executed to write to the log area. The CPU exception event occurrence process is executed when an exception event occurs in the CPU 131 assuming that an event occurrence condition corresponding to the internal state of the CPU 131 is satisfied. The VDP error interrupt process is executed when an error interrupt request for the VDP 140 is generated, assuming that an event generation condition corresponding to the internal state of the VDP 140 is satisfied. In this way, when an event occurrence condition corresponding to the internal state of the control device or processing device such as the CPU 131 or VDP 140 is established, information about a plurality of electronic components is written to a storage area such as a log area. A write process can be performed for storage.

After setting the interrupt permission by step S25 of the effect control main processing, a timeout occurs in a predetermined channel of the timer circuit 135 every predetermined time (such as 2 milliseconds), and the interrupt controller 136 to the CPU 131 Then, an interrupt request signal corresponding to the timer interrupt for effect control is output. CPU131 which received this interruption request signal and accepted an interruption request starts execution of timer interruption processing for production control.

FIG. 9 is a flowchart showing an example of effect control timer interrupt processing executed by the CPU 131 . In the effect control timer interrupt process, a command analysis process is executed (step S71). In the command analysis process of step S71, for example, after reading various effect control commands transmitted from the game control microcomputer 100 of the main board 11 and stored in the effect control command receiving buffer, the read effect Setting and control corresponding to the control command are performed. Following the command analysis process, an effect control process process is executed (step S72). In the effect control process processing, for example, the display operation of the effect image in the display area of the image display device 5, the sound output operation from the speakers 8L and 8R, the lighting operation of the light emitting members such as the game effect lamp 9 and the effect LED 61, the effect motor 60 Control to operate various production devices such as driving operation of is performed. In addition, regarding the control content of the performance operation using various performance devices, various judgments related to performance are performed according to the performance control command transmitted from the main board 11, or the elapsed time or detection result depending on the progress of the game or performance. Decisions, settings, etc. are made.

After the production control process, the production random number update process is executed (step S73). In the effect random number update process of step S73, at least part of the effect random numbers used on the effect control board 12 side is updated by software. After the effect random number update process, effect mode change process is executed (step S74). For example, the pachinko game machine 1 can be controlled in three types of effect modes, effect mode A to effect mode C, and depending on which effect mode is being controlled, for example, the background screen of the image display device 5 is displayed. It is only necessary that the types of characters appearing in the advance notice effect and the ready-to-win effect are different. The control to change from the current production mode to a different production mode may be performed when the production mode change condition is satisfied. For example, based on the date and time information acquired from the RTC provided in the timer circuit 135, when a specific date or time comes, the effect mode change condition may be established and the effect mode may be changed. Alternatively, the lottery process using the random number for effect may be executed, and the effect mode may be changed when the effect mode change condition is satisfied according to the determination result.

An error notification process is executed following the effect mode change process (step S75). In the error notification process of step S75, control for notifying various errors that have occurred in the pachinko gaming machine 1 is performed. Notification by such control may include left-hand driving notification and full-tank notification. The left-handed notification is a notification that prompts the player to perform a left-handed operation based on, for example, the total number of times the game ball is detected to pass through a passage gate provided in the right area of the game area. For example, the left-hand hitting notification is performed by displaying characters such as "Aim left!" It may also include occasional notifications, or a combination of some or all of these. The full-tank notification is a notification that, when the surplus ball storage tray (lower tray) is detected to be full, urges the player to eliminate the full-tank state based on the elapsed time that the full-tank state has continued. . The full tank notification is, for example, a notification by displaying characters such as "The lower tray is full!" or a combination of some or all of these may be included. In addition, the error notification process, in response to the occurrence of an error specified by the game control error specification command transmitted from the main board 11, by display, lighting or light emission, sound output, or a combination of some or all of these , and includes control for notifying various errors that have occurred. Alternatively, regardless of the game control error designation command, according to the processing result of the CPU 131, etc., when it is determined that an error related to electronic parts including the effect device has occurred, display, lighting or light emission, sound output, or By combining some or all of these, control may be performed to notify various errors that have occurred.

After the error notification process, the maintenance mode process is executed (step S76). In the maintenance mode process of step S76, control is performed to enable display of the maintenance history screen and setting change/confirmation history screen. On the maintenance history screen, for example, when the setting confirmation display corresponding to the setting confirmation state or the maintenance mode menu screen is being displayed, detection of an operation that is an operation of the game hall staff on the stick controller 31A or the push button 31B is performed. Based on the result, it becomes possible to display when it is determined that the maintenance history selection operation has been performed. When displaying the maintenance history screen, all log information is read from the log areas provided in the backup data memories 210A to 210D of the backup memory board 14. FIG. The image display device 5 displays a maintenance history screen including the read log information as history information. The setting change/confirmation history screen can be displayed when it is determined that a setting change/confirmation history selection operation has been performed based on the detection result of the operation of the stick controller 31A or the push button 31B, which is an operation by the staff of the game arcade. Become. When the setting change/confirmation history screen is displayed, all setting change and setting confirmation log information is read from the log areas provided in the backup data memories 210A to 210D of the backup memory board 14. FIG. On the image display device 5, a setting change/confirmation history screen including the log information of the read setting change and setting confirmation as history information is displayed. Note that the maintenance history screen and the setting change/confirmation history screen can be displayed based on the detection result of the operation performed by the person in charge of the pachinko game machine 1 manufacturer, unlike the person in charge of the game hall. good. The maintenance history screen and the setting change/confirmation history screen are screens that the player of the pachinko machine 1 cannot see while playing the game. Just do it.

After the maintenance mode process, the current time setting process is executed (step S77). In the current time setting process of step S77, control for setting the current date and current time is performed. In this case, it is possible to input the setting information of the current date and current time based on the detection result of the operation of the stick controller 31A or the push button 31B by the staff of the game arcade. For example, an hour signal indicating the hour, a minute signal indicating the minute, a second signal indicating the second, a year signal indicating the year, a month signal indicating the month, a day signal indicating the day, and a day of the week signal indicating the day of the week are set and inputted. The CPU 131 receives them sequentially. By updating the information stored in the RTC in the timer circuit 135 according to these received signals, it is sufficient to change the setting of the current date and the current time measured by the RTC of the timer circuit 135 . By updating the information stored in the RTC 201 provided on the backup memory board 14 according to the input setting information, the setting of the current date and current items measured by the RTC 201 may be changed. When the current time setting process ends, the date and time information storage process is executed (step S78). In the date/time information storage process of step S78, control is performed to store the date/time information in a temporary area of the external RAM 122 or the internal RAM 133 at a predetermined cycle (every 100 milliseconds, etc.). The date and time information stored in the temporary area may be stored as log information indicating the date and time of power failure when receiving a RAM clear notification command or power failure restoration designation command from the main board 11 . And after performing backup processing during production|presentation control (step S79), the timer interruption process for production|presentation control is complete|finished. In the backup process during effect control in step S79, backup data indicating various types of log information is stored in the log areas provided in the backup data memories 210A to 210D of the backup memory board 14 when a preset backup condition is met. A storage process is performed to store and store. In this case, the log information to be stored may be information including some or all of the operation history, setting history, error history, etc. regarding a plurality of electronic components used for games and effects in the pachinko gaming machine 1 . Also, the log information may include date and time information indicating the date and time when it was stored.

FIG. 10 shows an example of the content of the effect control command transmitted for the game from the game control microcomputer 100 of the main board 11 to the effect control microcomputer 120 of the effect control board 12 . In the following, the subscript H indicates a hexadecimal number. The effect control command that can be received by the effect control microcomputer 120 has a 2-byte structure, the first byte being MODE data representing the command classification, and the second byte being EXT data representing the command type. The leading bit (bit 7) of the effect control command upper data (MODE data) is always set to "1", and the leading bit (bit 7) of the effect control command lower data (EXT data) is always set to "0". be done. It should be noted that the effect control command is not limited to a 2-byte configuration, and a control command configured with, for example, 1 byte or 3 bytes or more may be used. The performance control command is transmitted from the game control microcomputer 100 of the main board 11 as the game progresses. The effect control microcomputer 120 receives one of the effect control commands as the game progresses. In this way, the effect control command is a game effect control command transmitted from the game control microcomputer 100 of the main board 11 to the effect control microcomputer 120 of the effect control board 12 in accordance with the control relating to the progress of the game. is.

The variation start command 80XXH designates the start of variation for either the first special symbol or the second special symbol, which are a plurality of special symbols. XXH, which is lower data (EXT data) of the variation start command, may be 01H at the start of variation of the first special symbol, and 02H at the start of variation of the second special symbol, for example. The variation pattern designation command 81XXH designates the variation pattern of the decoration design to be variably displayed on the image display device 5 corresponding to the variable display of the special design. XXH, which is lower data (EXT data) of the variation pattern designation command, indicates a value corresponding to the variation pattern. The display result designation command 8CXXH designates the display result of variable display. XXH, which is lower data (EXT data) of the display result specifying command, indicates a value corresponding to the display result of the variable display. The symbol determination command 8F00H designates to end the variation of symbols. The RAM clear notification command 9000H notifies that the memory contents of the RAM 102 are cleared due to the initialization in the game control microcomputer 100 when the pachinko game machine 1 is powered on and the power supply is started. The setting change start command 9100H designates the start of a setting change state in which setting values can be changed when power supply is started by power-on of the pachinko gaming machine 1 . The power failure recovery specification command 9200H specifies execution of power failure recovery processing corresponding to power failure recovery. The setting change end command 93XXH designates the end of the setting change state. In the setting change end command, for example, EXT data corresponding to the setting value newly set by the change may be set. For example, command 9300H specifies that the setting value is set to "1", command 9301H specifies that the setting value is set to "2", and command 9302H specifies that the setting value is set to "3". Specifies that it is set. Alternatively, only the command 9300H with EXT data of 00H may be prepared as the setting change end command, and the command 9300H may specify the end of the setting change state regardless of the setting value newly set by the change. Alternatively, a set value designation command for designating a set value set in the pachinko game machine 1 may be prepared as an effect control command different from the setting change end command. In addition to the case where the setting value designation command is transmitted along with the transmission of the setting change end command, for example, along with the transmission of the first fluctuation start command and the second fluctuation start command, the fluctuation start and correspondence in each round of the special game may be sent as In addition, the set value designation command may be transmitted along with execution of the variable display of a predetermined number of times, such as every 10 times of variable start in the special game. Instead of or in addition to these, a setting value designation command may be transmitted along with the transmission of the winning start designation command or the winning end designation command. A set value designation command may be transmitted along with the transmission of the customer waiting demonstration designation command.

The setting confirmation start command 9400H designates the start of a setting confirmation state in which setting values can be confirmed when power supply is started by power-on in the pachinko gaming machine 1 . The setting confirmation end command 9401H designates the end of the setting confirmation state. The game state designation command 95XXH designates the current game state in the pachinko gaming machine 1 . For example, the command 9500H is the first game state designation command corresponding to the game state (low base state, normal state) in which the time saving control is not performed, and the command 9501H is the game state in which the time saving control is performed (high base state, time saving state) The second game state designation command corresponding to . The game control error specification command 96XXH specifies the occurrence of an error (abnormality) related to game control in the pachinko gaming machine 1 and the type of the error (abnormality) that has occurred. In the game control error designation command, by setting the EXT data corresponding to each error (abnormality), it is possible to specify which error (abnormality) occurrence has been determined on the effect control board 12 side. , the occurrence of the specified error (abnormality) may be notified by error notification processing. The customer waiting demonstration designation command 9F00H designates the display of a customer waiting demonstration screen (demonstration screen display) by displaying an effect image corresponding to the stoppage of the progress of the game in the customer waiting state. The hit start specifying command A0XXH specifies display of an effect image indicating the start of the big win game state or the small win game state. The large winning opening open specifying command A1XXH specifies that the big winning opening is in the open state in the big winning game state or the small winning game state. The post-opening of the big winning opening designation command A2XXH designates a period in which the big winning opening changes from the open state to the closed state in the big winning game state or the small winning game state. The hit end designation command A3XXH designates the display of the effect image at the end of the big win game state or the small win game state. The background designation command B0XXH designates the display state of the background screen according to the game state or the like. The first reserved memory number designation command C1XXH designates the first reserved memory number. The first reserved memory number is the reserved number of variable display corresponding to the first special symbol display device 4A among the reserved memory numbers, and is, for example, any value of "0" to "4". The second reserved memory number designation command C2XXH designates the second reserved memory number. The second reserved memory number is a variable display reserved number corresponding to the second special symbol display device 4B among the reserved memory numbers, and is, for example, any value of "0" to "4". Winning determination result specification command C3XXH specifies the winning determination result. The winning determination result is when the first starting opening switch 22A detects a game ball that has passed (entered) the first starting opening opening, or when the second starting opening switch 22B has passed (entered) the second starting opening opening. When a ball is detected, numerical data indicating a game random number extracted from, for example, a random number circuit 104 or a game random counter provided in a predetermined area of the RAM 102 is used to determine whether or not the variable display result is a "jackpot". and the results of determining the fluctuation pattern. That is, before determining whether or not to control to an advantageous state such as a jackpot game state, the winning determination result is the result of determining whether or not to be controlled to an advantageous state, or whether it becomes a specific variation pattern. The result of determining whether or not is shown.

FIG. 11 shows an example of contents of a production control command that is a test command that the production control microcomputer 120 of the production control board 12 can receive. The effect control command, which is a test command, also has a 2-byte configuration, like the game effect control command. The performance control command, which is a test command, has upper data (MODE data) set to any of F0H to F3H. These high-order data (MODE data) are values that are not used in game effect control commands, and may be prepared in advance as dedicated commands for performing various inspections. Note that the test command is not limited to a 2-byte configuration, and a control command configured with, for example, 1 byte or 3 bytes or more may be used. The test command is not included in the effect control command transmitted from the game control microcomputer 100 of the main board 11 as the game progresses. A test command is transmitted from an inspection device as an external device connected via a signal wiring to, for example, the connectors 150 and 156 or the inspection connection portion 203 provided on the backup memory board 14, and the effect control board 12 Based on the reception of the effect control microcomputer 120, it becomes possible to execute inspection processing corresponding to the received command. In this way, the effect control command serving as a test command is a game effect transmitted from the game control microcomputer 100 of the main board 11 to the effect control microcomputer 120 of the effect control board 12 as the game progresses. Unlike the control command, it is an effect control command for inspection that enables execution of inspection processing for performing various inspections.

The black screen display command F000H causes the image display device 5 to display a test black screen. The test black screen is a screen for display inspection in which the display color is black. The ROM check screen command F005H displays, on the screen of the image display device 5, execution results and version information of various ROM inspection processes such as the external ROM 62AK120. The red display command F020H causes the image display device 5 to display a red screen, which is a screen for display inspection whose display color is red. The green display command F021H causes the image display device 5 to display a green screen, which is a screen for display inspection whose display color is green. The blue display command F022H causes the image display device 5 to display a blue screen, which is a screen for display inspection whose display color is blue. The white display command F023H causes the image display device 5 to display a white screen, which is a screen for display inspection in which the display color is white. The black display command F024H causes the image display device 5 to display a black screen, which is a screen for display inspection in which the display color is black. The RTC value type specification command F1XXH specifies the type of RTC value. XXH, which is lower data (EXT data) of the RTC value type designation command, indicates values corresponding to the type of RTC value, such as year, month, date, day of the week, hour, minute, and second. The RTC value setting command F2XXH sets specific contents and values for the type of RTC value specified by the RTC value type specifying command F1XXH. XXH, which is lower data (EXT data) of the RTC value setting command, indicates values corresponding to specific numerical values for year, month, day, hour, minute, and second, and corresponds to days of the week from Sunday to Saturday. value.

The check process designation command F3XXH designates execution of various check processes as inspection processes. For example, XXH, which is lower data (EXT data) of a command specifying check processing, may indicate a unique value that differs between one check processing and another check processing, or indicate a value common to multiple types of check processing. If there is a case, it is good. The check process designation command F3XXH constitutes a plurality of test commands, and when received in a predetermined order as a combination of a plurality of test commands, if it is possible to execute various check processes that become inspection processes. good. In addition, as the order of receiving a plurality of test commands predetermined corresponding to various check processing, etc., which is inspection processing, a plurality of types of orders are predetermined, and the order in which the combinations of the plurality of test commands are received is determined in advance. It is sufficient if it is possible to execute different inspection processes according to the type.

FIG. 12 shows a setting example of the reception order of test commands and the processing to be executed according to the reception order list. Backup clear, external RAM check (short), external RAM check (long), and backup inspection are prepared in advance as processes that can be executed by combining a plurality of test commands. FIG. 12(A) shows the order of receiving a combination of a plurality of test commands when executing backup clear processing. FIG. 12B shows the order of receiving a combination of a plurality of test commands when executing external RAM check (short) processing. FIG. 12C shows the order of receiving a combination of a plurality of test commands when executing external RAM check (long) processing. FIG. 12D shows the order in which combinations of multiple test commands are received when performing backup inspection processing. In the receiving order shown in FIGS. 12A to 12D, a combination of a plurality of test commands is received in order from top to bottom, and when all the receiving orders match, the corresponding processing is executed.

The backup clear process is a process for initializing the storage contents of backup data. The backup data is, for example, data stored in log areas provided in the backup data memories 210A to 210D of the backup memory board 14, and indicates various types of log information. The external RAM check (short) process and the external RAM check (long) process are inspection processes for checking whether or not data can be appropriately written to and read from the storage area of the external RAM 122 . The external RAM check (short) process is a process that can be executed in a shorter time than the external RAM check (long) process, and may include processing contents that are simpler than the external RAM check (long) process. . Backup inspection processing is inspection processing that is executed based on the storage contents of backup data. In this case, the backup data read from the backup data memories 210A to 210D of the backup memory board 14 may be output to an inspection device as an external device.

The external RAM check (short) process and the external RAM check (long) process are inspection processes that enable the state of an electronic component such as the external RAM 122 to be inspected. The backup inspection process is an inspection process that makes it possible to check information about various electronic components based on the stored contents of backup data indicating log information. In this way, the CPU 131 of the effect control microcomputer 120 can execute an inspection process that enables inspection or confirmation of the state of electronic components by combining a plurality of test commands. A combination of a plurality of test commands according to the order of reception is composed of commands specifying check processing, etc., in which the upper data (MODE data) of the received commands are all F3H. In this way, the combination of a plurality of test commands received for executing the inspection process is configured as a combination of production control commands for inspection that are different from the production control commands for games received as the game progresses. . Therefore, the inspection process for inspecting the state of the electronic parts is not executed based on the reception of the game effect control command. Thus, it is possible to reliably prevent the inspection processing for inspecting the state of the electronic parts from being erroneously executed based on the performance control command for the game received as the game progresses, and to carry out an appropriate inspection. can be done. In addition, for example, since it reduces the possibility that the inspection process is erroneously executed while the game is in progress, it prevents troubles caused by misunderstanding that the gaming machine has been damaged due to the erroneous execution of the inspection process. It is possible to prevent a player from being disadvantaged by an interruption and improve the reliability of inspection processing.

A combination of a plurality of test commands received when executing backup clear processing includes a command that is F311H among commands specifying check processing or the like. A combination of a plurality of test commands received when executing an external RAM check (short) process includes a command that is F312H among commands specifying check process and the like. A combination of a plurality of test commands received when executing the external RAM check (long) process includes a command that is F313H among the commands specifying the check process and the like. A combination of a plurality of test commands received when executing the backup inspection process includes a command F314H among commands specifying check process and the like. None of these commands are included in the combination of multiple test commands received when executing other processes. In this way, a combination of test commands received to perform a particular inspection process may be a unique test command not included in a combination of test commands received to perform other inspection processes. may contain. For example, among the specified commands for check processing, commands such as F303H and F304H are used to execute backup clear processing, external RAM clear (short) processing, external RAM clear (long) processing, and backup inspection processing. is also included in the combination of multiple test commands received. In this way, a combination of test commands received to perform a particular inspection process includes common test commands that are also included in a combination of test commands received to perform other inspection processes. You can stay. Also, for example, among commands specifying check processing, a command of F37FH is a test command that is received last in a combination of a plurality of test commands to be received, regardless of which processing is to be executed. In this way, the test command received last in the combination of test commands received to perform a particular inspection process is the last test command received in the combination of test commands received to perform another inspection process. It may be a command common to the received test command. Note that the first test command received in a combination of a plurality of test commands is not limited to a unique command. The part test command may be a unique command. In addition, it is not limited to the case where the last received test command in a combination of a plurality of test commands is a common command. The test command for each unit may be a common command. A combination of a plurality of test commands received for executing the inspection process may be configured as a combination of a larger number of commands than the game effect control commands received as the game progresses. In this case, the inspection process for inspecting the state of the electronic parts is not executed with the number of effect control commands received for the game. Thus, it is possible to reliably prevent the inspection processing for inspecting the state of the electronic parts from being erroneously executed based on the performance control command for the game received as the game progresses, and to carry out an appropriate inspection. can be done. In addition, for example, since it reduces the possibility that the inspection process is erroneously executed while the game is in progress, it prevents troubles caused by misunderstanding that the gaming machine has been damaged due to the erroneous execution of the inspection process. It is possible to prevent a player from being disadvantaged by an interruption and improve the reliability of inspection processing. As a combination of multiple test commands, there are multiple types of orders for receiving the test commands. Then, as inspection processing, such as external RAM check (short) processing, external RAM check (long) processing, and backup inspection processing, different processing can be executed according to the type of order in which combinations of a plurality of test commands are received. . Moreover, the inspection process for inspecting the state of the electronic component differs depending on the combination of the plurality of test commands. As a result, various inspection processes for inspecting the state of electronic components can be executed, and appropriate inspection can be performed.

In the effect control backup process executed in step S79 of the effect control timer interrupt process, it is determined whether or not a preset backup condition has been established. Then, when it is determined that the backup condition is met, a backup process is executed for storing and storing data to be backed up according to the backup condition that has been met. As for the backup condition, a plurality of different conditions may be set according to occurrence of events including various changes and settings in the pachinko gaming machine 1 . A backup control table indicating a plurality of backup conditions may be stored in advance in a predetermined area (such as a program management area) provided in one or both of the external ROM 121 and internal ROM 132, for example. The backup target data may include different data depending on the backup conditions. Alternatively, the backup target data may include data common to multiple backup conditions. Data to be backed up indicating log information including date and time information may be stored when any of the backup conditions are met. A batch backup and a divided backup may be prepared as backup methods for storing data to be backed up. In the case of batch backup, data to be backed up by a single backup is stored in interrupt processing based on the occurrence of one timer interrupt for effect control. In the case of split backup, data to be backed up by one backup is stored in interrupt processing based on multiple occurrences of timer interrupts for effect control.

The backup process for storing and storing the data to be backed up according to the backup condition is performed each time the effect control timer interrupt process is executed, and when the backup condition is met in the effect control backup process of step S79. It may be executable, or may be collectively executable when the power supply to the pachinko gaming machine 1 is stopped. When the backup process is collectively executed at the time of power failure, when it is determined that the backup condition is satisfied in the backup process during the effect control, the log information including the date and time information is stored in a predetermined area of the external RAM 122, for example. Store target data.

FIG. 13 shows a setting example of the backup control table 120T that provides a plurality of backup conditions and the like. The backup control table 120T is configured to be able to set backup conditions, backup method, division method, number of storage area bits, multiplicity, and verification method for each data to be backed up indicating the content of log information. When the backup method is split backup, it is possible to specify "automatic", "every 100 KB", etc. as the split method. The division method is a method or technique for dividing the backup target data when performing divided backup, and it is sufficient if the number of times of division and the data volume at the time of division can be specified. For example, when the division method is "automatic", the number of divisions is determined according to the data capacity of the backup target data each time the backup process is executed. Alternatively, depending on the processing load on the effect control board 12 and the backup memory board 14, the number of divisions and the data capacity at the time of division may be determined. The number of storage area bits is a processing unit of stored data in a log area, which is a storage area for storing log information, in the backup data memories 210A to 210D provided on the backup memory board 14. In this example, 8 bits are shown. "8" or "3" indicating 3 bits can be specified. The degree of multiplicity is the degree of mirroring in which data to be backed up that indicates the same log information is stored in a plurality of different log areas in an overlapping and distributed manner. You can specify the number of times. For example, when the multiplicity is "1", the data to be backed up indicating the same log information is stored and backed up only once without performing mirroring. When the multiplicity is "2", mirroring is performed with the number of times of storage being two, and backup target data indicating the same log information is stored twice in different storage areas and backed up. When the multiplicity is "3", mirroring is performed with a storage count of 3, and the backup target data indicating the same log information is stored 3 times in different storage areas and backed up. By increasing the degree of multiplicity, redundancy (availability) can be improved and the reliability of stored data can be enhanced.

The verification method that can be set for each data to be backed up is a method to verify whether or not the backup processing, which is the storage processing of the data to be backed up, was performed correctly. It is possible. If the verification method is error detection, when the data to be backed up is read from the log area, arbitrary error detection processing using parity, checksum, hash value, etc. is executed to verify the correctness of the stored data. I wish I could. If the verification method is error detection and majority vote, along with error detection processing using parity, checksum, hash value, etc., in multiple log areas where backup target data that is multiplexed by mirroring and shows the same log information is stored Compare stored data. As a result of this comparison, if the stored contents match in a predetermined number of log areas out of the plurality of log areas, it is determined that the backup processing has been correctly performed, and the correctness of the stored data can be verified. For example, if parity, checksum, or hash values calculated from stored data in multiple log areas match, it can be determined that backup processing has been correctly performed for each log area. If the parity, checksum or hash value calculated from the stored data in multiple log areas do not match, if the number of log areas for which the same parity, checksum or hash value is calculated is more than half, It is sufficient to judge that the backup process has been correctly performed for the log area (judgment by majority vote). The "predetermined number of log areas", which is the condition for judging that the backup process has been performed correctly, is not limited to the majority of the log areas, and is a preset fixed value (for example, "2") regardless of multiplicity. Alternatively, it may be a variable value determined according to the degree of multiplicity, backup method, division method, or the like. Instead of making a decision based on a majority vote, it may be determined that the backup process has been correctly performed when the execution result of the error detection process becomes normal for the first time.

Data to be backed up includes system data, effect control error data, player history data, received command data, set value change time data, power saving setting data, current time change data, power off time data, store name setting data, effect output amount. data, including production history data. It should be noted that the data to be backed up may include some of these. System data should just contain the data for production|presentation control memorize|stored in the predetermined area|region (data holding area for production|presentation control etc.) provided in external RAM122 or internal RAM133. Production control error data is data indicating an error that occurred during execution of production control. The player history data is data relating to the player acquired by the pachinko gaming machine 1 . The received command data is data indicating the effect control command transmitted from the main board 11 . The set value change time data is data indicating the date and time when the set value was changed. The setting value change time data may include data indicating the date and time when the setting value was confirmed, or the setting value confirmation time data may be generated separately from the setting value change time data. The power saving setting data is data relating to power saving control that can be set by the staff of the game arcade. The setting of the power saving control can be performed, for example, by rotating a knob of an output amount changeover switch provided on the back side of the pachinko game machine 1, and when the power saving function etc. setting screen is displayed on the image display device 5, the power saving is performed. It is sufficient if the presence/absence and type (power saving mode) of the function can be changed. Alternatively, when a test command for power saving setting is input, a power saving function setting screen may be displayed on the image display device 5 so that the presence or absence of the power saving function and the function (power saving mode) can be changed. The current time change data is data indicating that the setting of the current date and time measured by the RTC has been changed. The setting of the current date and time measured by the RTC may be one or both of the setting of the RTC provided in the timer circuit 135 of the performance control microcomputer 120 and the setting of the RTC 201 provided on the backup memory board 14. Just do it. The power-off time data is data indicating the date and time when the power supply to the pachinko gaming machine 1 was stopped. The store name setting data is data indicating the setting of a store name that can be set by a game hall staff member or the like. The performance output amount data is data indicating the setting of the output amount such as the sound volume and the light emission amount that can be set by the player or the like. The effect history data is data indicating the history of effects executed in the pachinko gaming machine 1 . In addition, the number of rotations indicating the number of times the variable display is executed counted from a specific timing, the number of types of jackpots indicating the number of jackpots counted for each type of jackpot, the number of consecutive wins indicating the number of jackpots that occurred without being controlled in the normal state, the player Arbitrary information according to the specifications of the pachinko machine 1 and the progress of control, such as the character selection content of the effect image set by It suffices if the data indicating is capable of being stored as backup target data.

The backup conditions that can be set for each data to be backed up may be conditions for events such as setting, control, determination, and detection in the pachinko gaming machine 1 that can occur as a game or performance progresses. In the production control backup process executed in step S79 of the production control timer interrupt process, for example, the CPU131 and VDP140 of the production control microcomputer 120, according to the processing results by the control device and the processing device, was set in advance It suffices to determine whether any of the backup conditions are met. For example, in the error notification process executed in step S75, by determining the reception result of the game control error designation command transmitted from the main board 11, or by determining various detection results, the production device If an error related to the included electronic components occurs, control is performed to report the error. In this case, in the effect control backup process, it is determined that the backup condition at the time of error occurrence is established, and effect control error data is created. In this way, when it is determined that the backup condition is established in the backup process during effect control, a control signal corresponding to the backup command for backup during effect control is transmitted to the backup memory board 14 . The backup command for backup during effect control should just contain backup object data. When the memory controller 200 of the backup memory board 14 receives a backup command for backup during effect control, the date and time information acquired from the RTC 201 may be used to write log information including data to be backed up. Storing error information about electronic components including the effect device facilitates identification of defects and improvement of performance.

The effect control backup process is executed in step S79 of the effect control timer interrupt process based on the occurrence of the effect control timer interrupt. Then, as a case where an event occurrence condition corresponding to a processing result by a control device or a processing device such as the CPU 131 or VDP 140 is met, a case where a backup condition set for each backup target data relating to a plurality of electronic components including a performance device is met is met. , a backup process for storing the data to be backed up is executed. In this way, when an event occurrence condition related to a plurality of electronic components is met, when an event occurrence condition corresponding to the processing result of a control device or a processing device such as the CPU 131 or VDP 140 is met, a log area or the like is stored. A write process for writing and storing information about a plurality of electronic components can be performed on the area.

The backup conditions that can be set for each data to be backed up may include write conditions that differ from event occurrence conditions corresponding to a plurality of electronic components. For example, for player history data, a backup condition is satisfied when data relating to a player is updated, regardless of whether or not events corresponding to a plurality of electronic components have occurred. As for the received command data, a backup condition may be established when the performance control command transmitted from the main substrate 11 is received even when an event corresponding to a plurality of electronic components does not occur. The store name setting data satisfies a backup condition when setting the name of the store corresponding to the game arcade, regardless of whether or not events corresponding to the plurality of electronic components have occurred. The system data is stored regardless of whether or not the backup condition is met when the data is updated due to the occurrence of events related to multiple electronic components, and whether or not events related to multiple electronic components have occurred. In some cases, the backup condition is satisfied at the time of data update. In this way, backup processing for storing data to be backed up is executed even when a backup condition is satisfied as a write condition that is different from an event occurrence condition corresponding to a plurality of electronic components. When a write condition different from such an occurrence condition is met, a write process for writing and storing game-related information different from information on a plurality of electronic components in a storage area such as a log area. can be executed. In the event that an event occurs due to the malfunction of the electronic parts, the backup data including the game-related information is stored, so that it is possible to easily identify the relationship between the progress of the game or performance and the malfunction of the electronic parts. Therefore, the situation of the pachinko game machine 1 can be easily grasped.

When the data to be backed up is the effect control error data, the backup condition is not limited to the backup condition only when an error occurs, and the backup condition including the error recovery may be set. For example, in the error notification process executed in step S75, by determining the reception result of the game control error designation command transmitted from the main board 11, or by determining various detection results, the production device If an error related to the included electronic components occurs, control is performed to report the error. In this case, in the effect control backup process, it is determined that the backup condition at the time of error occurrence is established, and effect control error data is created. After that, when the error is no longer detected for the electronic component subject to the error notification, it is determined that the error has been recovered. At the time of error recovery by such determination, it may be determined that the backup condition is established in the backup process during effect control, and effect control error recovery data may be created. The performance control error recovery data created in this manner is included in a backup command for backup during performance control and transmitted to the backup memory board 14 in the same manner as the performance control error data. When the memory controller 200 of the backup memory board 14 receives a backup command for backup during effect control, the date and time information acquired from the RTC 201 may be used to write log information including data to be backed up. In addition to performance control error data, performance control error recovery data can also be stored as backup data, thereby storing the history of error occurrence and recovery related to performance control to enable post facto verification, and the pachinko game machine 1. status can be easily grasped.

In the power-on information processing in step S23 of the effect control main process, a backup restoration process for restoring settings and controls based on the log information stored in the log area may be executed. In the backup recovery process, verification may be performed using a verification method according to the data to be backed up, and it may be determined whether or not the stored data is normal. For example, if the verification method is error detection and majority vote, if the execution result of error detection processing is normal in a predetermined number of log areas among a plurality of log areas in which data to be backed up showing the same log information is stored, It is determined that the stored data is normal. Thus, if the stored data is normal, data recovery processing is performed using the stored data in the log area. On the other hand, if the stored data is not normal, initial value setting is performed using initial data different from the stored data in the log area. The initial data is stored in one or both of the external ROM 121 and the internal ROM 132, for example, and may be data used when the initialization process is executed in step S21 of the game control main process. As a result, even if the data to be backed up cannot be stored correctly, the initial value setting using the initial data can be performed in response to recovery from the power failure. In place of the initial data, special data corresponding to the case where the stored data is not normal may be used. Different from the initial data, the special data may be any data suitable for restoring settings and control. Whether to use the initial data or the special data may be differentiated according to the data to be backed up whose stored data is determined to be abnormal. For example, if the data to be backed up is system data, data recovery using special data is performed when it is determined that the stored data is not normal. On the other hand, if the data to be backed up is the effect output amount data, the data recovery using the initial data is performed when it is determined that the stored data is not normal. Whether to use initial data or special data is set in advance based on the update frequency of backup target data, the amount of update data, the importance of data, target parts, target control, and a combination of some or all of these. It should be decided. It should be noted that the backup recovery process may be executable when the preset data recovery condition is established in the backup process during effect control. The data recovery condition may be established, for example, when a power failure recovery designation command transmitted from the main board 11 is received.

In the effect control backup process, it may be determined whether or not the backup memory board 14 is connected to the effect control board 12 . In this case, the voltage value at terminal TM02 of connector 154 may be determined. Depending on the determination result of the connection state, whether or not to execute the storage process may be changed, and the storage process with different contents may be executed. For example, when the backup memory board 14 is not connected to the performance control board 12, the storage process of storing the log information in the log area is not executed. In this manner, a limitation may be provided as a limit that the memory processing is not executed in the range where the preset limitation condition that the backup memory board 14 is not connected to the performance control board 12 is satisfied. On the other hand, as long as the memory processing can be executed in a range where the restriction condition that the backup memory board 14 is connected to the effect control board 12 is not established. As storage processing of different contents, when the backup memory board 14 is not connected to the effect control board 12, a predetermined area of the external RAM 122 is used as a log area to store and store backup data showing various log information. Processing may be performed. In this case, compared to the case where the backup memory board 14 is connected to the performance control board 12, the data capacity to be stored as the backup target data may be reduced. For example, performance control error data and received command data are data to be backed up, and when a backup condition is met, a storage process is executed to store log information. On the other hand, system data and player history data are not data to be backed up. Instead, the storage process for storing the log information may not be executed even if the backup condition is satisfied. In this way, in the range where the preset limit condition that the backup memory board 14 is not connected to the effect control board 12 is satisfied, a limit is provided as a limit to reduce the data capacity to be stored by the storage process. may On the other hand, in the range where the limiting condition that the backup memory board 14 is connected to the performance control board 12 is not established, the data capacity to be stored by the storage processing is not reduced, and the backup corresponding to all the backup conditions is performed. It is sufficient to store and store the target data. It is not limited to memory processing, and any processing or control in the pachinko gaming machine 1 may be limited as a limit that a specific processing or control is not executed within a range where a preset limit condition is satisfied. Alternatively, a limit may be provided as a limit such that the amount of processing or the amount of control is reduced compared to a range in which the limit condition is not established.

14 and 15 show specific examples of displaying the maintenance history screen. When the power supply to the pachinko game machine 1 is started, the setting confirmation process is executed in step S5 of the game control main process, and when the setting confirmation condition is satisfied, the main board 11 sets the performance control board 12. A confirmation start command is sent. When this setting confirmation start command is received, the CPU 131 of the effect control microcomputer 120 is, for example, when the maintenance mode process is executed in step S78 of the effect control timer interrupt process, as shown in FIG. display during confirmation of settings. For the display during setting confirmation, for example, the image display device 5 displays characters such as "Setting confirmation is in progress". The setting-confirming display includes a character display such as "Press the push button to shift to maintenance mode" on the image display device 5. FIG. In this manner, in the setting confirmation display, a display prompting an operation for shifting to the maintenance mode is performed. At this time, when the operation of pressing the push button 31B by the staff of the game arcade or the person in charge of the manufacturer is detected, the image display device 5 displays a maintenance mode menu screen as shown in FIG. Move to maintenance mode. The maintenance mode menu screen displays options of "maintenance history", "setting change/confirmation history", and "current time setting", as well as the current time.

When the option 012IW106 of "maintenance history" is selected on the maintenance mode menu screen, the image display device 5 switches to display a maintenance history screen as shown in FIG. 14(C). On the maintenance history screen, date and time and log contents are displayed in association with each other, and are displayed in order so that the latest log information is at the top. Examples include a VDP error indicating that an internal state abnormality has occurred in the VDP 140, an illegal winning error indicating detection of an illegal winning to a winning opening such as the first big winning opening or the second big winning opening, and a count switch. Each log information of switch abnormality error indicating that abnormality of various switches such as 23 was detected, prize ball abnormality error indicating that prize ball abnormality was detected, magnet error indicating that abnormal magnetism was detected, furthermore, probability change not established log information is displayed indicating that the When the maintenance history screen has a plurality of pages, performing a selection operation for the next page moves to the second page of the maintenance history screen as shown in FIG. 14(D). In this case, log information of the start of setting change and end of setting change, log information of power failure date and time, power on date and time, and log information of left driving notification and full tank notification are displayed. Further, if there is a next page, performing a selection operation for the next page moves to the third page of the maintenance history screen as shown in FIG. 15(E). At this time, log information indicating the start and end of setting confirmation, log information indicating that the current time was set during maintenance mode during setting confirmation, and log information indicating that the RAM was cleared by initialization processing. Information is displayed. Further, when the next page selection operation is performed, the maintenance history screen as shown in FIG. 15(F) is shifted to the fourth page. Here, the log information of the RWM abnormality error indicating that some RAM abnormality occurred when the pachinko game machine 1 was turned on, and the log information of the power failure date and time corresponding to the later date and time and the power supply date and time are displayed. . Based on these log information, an RWM abnormality error occurred, so the staff of the game hall temporarily stopped the power supply to the pachinko game machine 1, turned on the clear switch, and turned on the power again. It is possible to confirm after the fact that the RAM has been cleared. Further, log information of the CPU exception event indicating that the exception event has occurred in the CPU 131, and log information of the date and time of the power failure and the power-on date and time corresponding to the later date and time are displayed. Since a CPU exception event occurred according to these log information, the game hall staff stopped the power supply to the pachinko game machine 1, but when the power was turned on the next day, the CPU exception event did not occur anymore. This can be confirmed after the fact.

Note that on the third page of the maintenance history screen as shown in FIG. 15E, the log information indicating that the current time has been set indicates an earlier time than the log information indicating that the setting confirmation has started. Log information is displayed. For example, the setting check was started at 09:36:28 on Wednesday, March 21, 2018, and the current time was set at 09:36 on Wednesday, March 21, 2018: 16. The reason why the date and time are inconsistent before and after setting the current time is that when the current time is set, the date and time information after setting is read and the log information is recorded. In this example, the log information is recorded in the log area in the order in which the log information was generated, and the log information is displayed in the order in which the log information was generated even if the date and time are not consistent before and after the current time is set.

In addition to displaying the maintenance history screen, or instead of displaying the maintenance history screen, a two-dimensional barcode may be displayed on the image display device 5 to enable acquisition of log information. For example, a photographing device connected to the inspection device is used to photograph the two-dimensional barcode displayed on the image display device 5 . By photographing such a two-dimensional barcode, log information can be provided to the inspection apparatus. In addition, log information may be output using any output method, such as display output, wireless output, infrared output, audio output, ultrasonic output, or a combination of some or all of these. Any information output, not limited to log information, can be output using any output method such as display output, wireless output, infrared output, audio output, ultrasonic output, or a combination of some or all of these. I wish I had.

The log information that can be displayed on the maintenance history screen may be all of the log information shown in the backup data, or may be part of the log information shown in the backup data. For example, on the maintenance history screen, it is possible to display log information corresponding to conditions for occurrence of events that can be established according to the internal state of the control device, such as exceptional events of the CPU 131 . Also, on the maintenance history screen, it is possible to display log information corresponding to the occurrence conditions of events that can be established according to the internal state of the processing device, such as an error interrupt request of the VDP 140 . On the maintenance history screen, it is possible to display log information corresponding to the occurrence conditions of specific events that can be established according to the processing results of the CPU 131, such as when an error occurs in the backup process during the effect control, when the time is changed, and when the power is turned on again. is. On the other hand, the maintenance history screen displays log information corresponding to the occurrence conditions of events other than specific events, such as when player history data is updated during backup processing during performance control, when power saving is set, and when names are set. do not. In this way, log information stored as backup data may include log information that is not displayed on the maintenance history screen. Alternatively, log information that is not displayed on the normal maintenance history screen but can be displayed on the special maintenance history screen may be provided. The special maintenance screen may be displayed according to an arbitrary detection result, such as a detection result of an action that becomes a predetermined operation on the stick controller 31A or the push button 31B. In this case, the operation procedures for the stick controller 31A and the push buttons 31B are not notified to the staff of the game hall, and may be recognizable by the person in charge at the manufacturer of the pachinko game machine 1. FIG. A special maintenance history screen may be displayed according to arbitrary control and processing without being limited to the detection results. In this manner, a limit may be set such that a specific type of log information among multiple types of log information is not displayed on the maintenance history screen. In the range of log information other than specific types, it is sufficient if it can be displayed on the maintenance history screen. Alternatively, in the range of specific types of log information among multiple types of log information, a limit may be set such that the log information can only be displayed on a special maintenance history screen and not displayed on the normal maintenance history screen.

FIG. 16 shows a specific example of a case where a setting change/confirmation history selection operation is performed during the maintenance mode. 16(B) in response to the detection of the action of pressing the push button 31B by the game hall staff or manufacturer's person in charge while the setting confirmation display as shown in FIG. 16(A) is being performed. The maintenance mode menu screen as shown in is displayed. Then, the option 012IW107 of "setting change/confirmation history" is selected. In this case, the image display device 5 switches to display a setting change/confirmation history screen as shown in FIG. 16(C). On the setting change/confirmation history screen, the date and time, whether it is a setting change or a setting confirmation, and the setting value after change or the setting value that has been confirmed are displayed in association with each other, and the latest log information is displayed at the top. displayed in order. It should be noted that when the option of "current time setting" is selected while the maintenance mode menu screen is being displayed, the image display device 5 switches to display the current time setting screen. On the current time setting screen, tilting the stick controller 31A left or right selects items such as year, month, date, day of the week, hour, minute, or second, and tilting the stick controller 31A forward or backward selects a number for each item. be done. After the current time setting screen is displayed, the current date and time is set to the date and time currently being displayed when the staff of the game arcade or the person in charge of the manufacturer presses the push button 31B.

(Description of Characteristic Portion 41AK)
FIG. 17 shows an execution example of the backup process for the characteristic portion 41AK. In this case, the CPU 131 of the effect control microcomputer 120 executes a program read from one or both of the external ROM 121 and the internal ROM 132, so that the memory write processing unit 41AKM10 and the event information creation processing units 41AKM21 to 41AKM23 It has functions. A predetermined area of the external RAM 122 or the internal RAM 133 is provided with a writing flag 41AKF1 and a backup data buffer 41AKB1. The backup data buffer 41AKB1 has a plurality of buffer areas including buffer areas 41AKB11 to 41AKB13. The backup data memories 210A to 210C of the backup memory board 14 are provided with backup storage units 41AKA1 to 41AKA3. The backup storage unit 41AKA1 has a plurality of backup storage areas including backup storage areas 41AKA11 to 41AKA13 as log areas. The backup storage unit 41AKA2 includes a plurality of backup storage areas including backup storage areas 41AKA21 to 41AKA23 as log areas. The backup storage unit 41AKA3 has a plurality of backup storage areas including backup storage areas 41AKA31 to 41AKA33 as log areas.

The event information creation processing unit 41AKM21 creates backup data indicating event information corresponding to the occurrence of the CPU internal error 41AKC1. The backup data created at this time is, for example, data created by executing the exception backup process in step S42 of the CPU exception event occurrence process. good. The event information creation processing unit 41AKM22 creates backup data indicating event information corresponding to the occurrence of the VDP error interrupt 41AKC2. The backup data created at this time is, for example, data created by executing the error interrupt backup process in step S52 of the VDP error interrupt process, and may be data indicating log information including VDP error information. Just do it. Occurrence event information creation processing unit 41AKM23 creates backup data indicating occurrence event information corresponding to the occurrence of the effect control error determination 41AKC3. The backup data created at this time is, for example, data created by executing the backup process during control of the effect in step S79 of the effect control timer interrupt process, and data indicating the log information including the effect control error data. If it is The backup data created by the event information creation processing units 41AKM21 to 41AKM23 are temporarily stored in the backup data buffer 41AKB1 according to the order of creation. For example, the first created backup data is written and stored in the buffer area 41AKB11, the next created backup data is written and stored in the buffer area 41AKB12, and the subsequently created backup data is written and stored in the buffer area 41AKB13. stored as

If there is backup data temporarily stored in the backup data buffer 41AKB1, the memory write processing unit 41AKM10 reads and acquires it. The backup data acquired at this time is transferred to the backup memory board 14 and stored in the log areas of the backup storage units 41AKA1 to 41AKA3. In this execution example, corresponding to multiplicity "3", the same backup data is distributed and stored redundantly in the three backup storage units 41AKA1 to 41AKA3. For example, the backup data read from the buffer area 41AKB11 of the backup data buffer 41AKB1 is stored in the backup storage area 41AKA11 of the backup storage unit 41AKA1, the backup storage area 41AKA21 of the backup storage unit 41AKA2, and the backup storage area 41AKA31 of the backup storage unit 41AKA3. is stored by copying and writing to . At the start of writing the backup data to the log areas of the backup storage units 41AKA1 to 41AKA3, the writing flag 41AKF1 is set to ON state. At the end of writing the backup data, the write-in-progress flag 41AKF1 is cleared and turned off. When the writing flag 41AKF1 is off, the memory write processing unit 41AKM10 is permitted to write new backup data, and reads the backup data temporarily stored in the backup data buffer 41AKB1. On the other hand, when the write flag 41AKF1 is ON, the writing of new backup data is prohibited, and the backup data temporarily stored in the backup data buffer 41AKB1 is not read.

For example, when the backup data read from the buffer area 41AKB11 of the backup data buffer 41AKB1 is written to the log area and the write flag 41AKF1 is turned off, the backup data temporarily stored in the next buffer area 41AKB12 can be read. The backup data read and acquired at this time is copied and written in the backup storage area 41AKA12 of the backup storage unit 41AKA1, the backup storage area AKA22 of the backup storage unit 41AKA2, and the backup storage area 41AKA32 of the backup storage unit 41AKA3. remembered. When writing to the log area is thus completed and the write flag 41AKF1 is turned off, the backup data temporarily stored in the next buffer area 41AKB13 can be read. In this case, the backup data read out and acquired is copied and written in the backup storage area 41AKA13 of the backup storage unit 41AKA1, the backup storage area 41AKA23 of the backup storage unit 41AKA2, and the backup storage area 41AKA33 of the backup storage unit 41AKA3. is stored in

The backup storage unit 41AKA1 is provided as one continuous storage area by assigning continuous addresses to the backup storage areas 41AKA11 to 41AKA13, for example. The backup storage unit 41AKA2 is provided as one continuous storage area by assigning continuous addresses to the backup storage areas 41AKA21 to 41AKA23, for example. The backup storage unit 41AKA3 is provided as one continuous storage area by assigning continuous addresses to the backup storage areas 41AKA31 to 41AKA33, for example. When the write-in-progress flag 41AKF1 is ON, writing of new backup data is prohibited. As a result, when the first occurrence condition and the second occurrence condition are satisfied among the event occurrence conditions corresponding to the plurality of electronic components, if the write process of the backup data corresponding to one of the conditions is being executed, , the backup data write process corresponding to the other condition is not executed.

For example, when the conditions for generating the CPU internal error 41AKC1 and the VDP error interrupt 41AKC2 are met, if the backup data write process corresponding to the CPU internal error 41AKC1 is being executed, the write flag 41AKF1 must be on. , the backup data write process corresponding to the VDP error interrupt 41AKC2 is not executed. Alternatively, when the conditions for generating the CPU internal error 41AKC1 and the VDP error interrupt 41AKC2 are met, if the backup data write processing corresponding to the VDP error interrupt 41AKC2 is being executed, the write flag 41AKF1 is turned on. In response to this, the write processing of the backup data corresponding to the CPU internal error 41AKC1 is not executed. Which write process should be executed first may be determined according to the order of creation of the backup data. When the conditions for generating the VDP error interrupt 41AKC2 and the effect control error determination 41AKC3 are met, and when the conditions for the effect control error determination 41AKC3 and the CPU internal error 41AKC1 are met, the writing process is similarly executed. You can control it. In this way, when a plurality of occurrence conditions are met, there is a limit that backup data write processing corresponding to one condition is not executed while backup data write processing corresponding to one condition is being executed. As a limit is set. As long as the backup data write process corresponding to one condition is not being executed, it is sufficient that the backup data write process corresponding to the other condition can be executed.

In addition, the order of creation when creating backup data may be determined according to the processing priority in the effect control microcomputer 120 . For example, when the conditions for generating the CPU internal error 41AKC1 and the VDP error interrupt 41AKC2 are met, the CPU exception event processing has a higher priority than the VDP error interrupt processing. The creation of backup data by 41AKM21 may be executed prior to the creation of backup data by the event information creation processing unit 41AKM22. When the conditions for generating the VDP error interrupt 41AKC2 and the effect control error determination 41AKC3 are met, the priority of the VDP error interrupt process is higher than the priority of the timer interrupt process for effect control, so the generated event information is created. The creation of backup data by the processing unit 41AKM22 may be executed prior to the creation of the backup data by the event information creation processing unit 41AKM23.

The condition for generating the CPU internal error 41AKC1 can be established according to the internal state of the control device, such as an exception event of the CPU 131 . The condition for generating the VDP error interrupt 41AKC2 can be established according to the internal state of the processor, such as the VDP 140 error interrupt request. The occurrence condition of the effect control error determination 41AKC3 can be established according to the processing result by the CPU 131, such as the determination when an error occurs in the effect control backup process. Therefore, when the CPU internal error 41AKC1 or VDP error interrupt 41AKC2 occurrence conditions are established, the backup data writing process can be executed with priority over the case where the effect control error determination 41AKC3 occurrence conditions are established. become.

For example, if the condition for generating the CPU internal error 41AKC1 is satisfied multiple times, the backup data is created in the order in which the conditions are met, and the writing process can be executed in the order in which the backup data was created. When the conditions for generating the VDP error interrupt 41AKC2 are met a plurality of times, backup data is created in the order in which those conditions are met, and write processing can be executed in the order in which the backup data are created. When the generation condition of the effect control error determination 41AKC3 is met a plurality of times, the backup data is created in the order in which those occurrence conditions are met, and the writing process can be executed in the order of backup data creation. In these cases, writing is prohibited when the write flag 41AKF1 is ON, so that if the writing process corresponding to the previous occurrence condition is being executed, the writing process corresponding to the next occurrence condition is disabled. Do not perform load processing. In this way, when the first occurrence condition or the second occurrence condition among the event occurrence conditions corresponding to a plurality of electronic components is met a plurality of times, the writing process corresponding to the previous occurrence condition is being executed. Then, there is a limit that write processing corresponding to the next occurrence condition is not executed. As long as the write process corresponding to the previous occurrence condition is not being executed, the write process corresponding to the next occurrence condition may be executed.

It should be noted that, when a plurality of occurrence conditions are met, whether or not to execute any write process may be determined according to the order in which the occurrence conditions are met. For example, if another occurrence condition is met during the execution of the write process corresponding to the occurrence condition that is met earlier, the write process corresponding to the occurrence condition that is met later may not be executed. Alternatively, when a plurality of occurrence conditions are satisfied, whether or not to execute any write process may be determined according to the process priority. For example, if the CPU internal error 41AKC1 and VDP error interrupt 41AKC2 generation conditions are satisfied at the same time, the processing priority of the CPU exception event processing is higher than that of the VDP error interrupt processing. The write process corresponding to the error 41AKC1 may be executed, and the write process corresponding to the VDP error interrupt 41AKC2 may not be executed. Further, when a plurality of occurrence conditions are met, overwrite processing may be executed according to the processing priority. For example, if the CPU internal error 41AKC1 and VDP error interrupt 41AKC2 generation conditions are satisfied at the same time, the processing priority of the CPU exception event processing is higher than that of the VDP error interrupt processing. The write process corresponding to the error 41AKC1 may be executed as an overwrite process for overwriting the stored data by the write process corresponding to the VDP error interrupt 41AKC2.

When a plurality of backup conditions are met as a plurality of occurrence conditions, the order of creating backup data and whether or not to execute write processing may be determined according to the contents of the data to be backed up. For example, if the backup condition for when an error occurs that the data to be backed up is effect control error data and the backup condition for when a command is received that the data to be backed up is received command data are satisfied at the same time, the backup condition for when an error occurs The write process corresponding to the command may be executed first, and the write process corresponding to the backup condition at the time of command reception may be executed later. Alternatively, the writing process corresponding to the backup condition when an error occurs may be executed, and the writing process corresponding to the backup condition when the command is received may not be executed. In this case, since the information regarding the malfunction of the electronic parts including the effect device is preferentially stored, the possibility that the malfunction of the electronic parts can be dealt with appropriately is increased. Alternatively, the writing process corresponding to the backup conditions at the time of command reception may be executed first, and the writing process corresponding to the backup conditions at the time of error occurrence may be executed later. Alternatively, the write process corresponding to the backup conditions when the command is received may be executed, and the write process corresponding to the backup conditions when an error occurs may not be executed. In this case, since the information regarding the reception status of the effect control command transmitted from the main substrate 11 is preferentially stored, the possibility of being able to appropriately deal with the control problems related to the game is increased.

(Description of Characteristic Portion 42AK)
FIG. 18 shows an execution example of backup processing for the characteristic portion 42AK. In this case, the CPU 131 of the effect control microcomputer 120 executes a program read from one or both of the external ROM 121 and the internal ROM 132, thereby memory writing processing units 42AKM11 to 42AKM13, occurrence event information creation processing units 42AKM21 to It has the function of 42AKM23. The backup data memories 210A-210C of the backup memory board 14 are provided with backup storage units 42AKA11-42AKA13, backup storage units 42AKA21-42AKA23, and backup storage units 42AKA31-42AKA33. The backup storage unit 42AKA11 has a plurality of backup storage areas including backup storage areas 42AKA111 to 42AKA113 as log areas. The backup storage unit 42AKA12 has a plurality of backup storage areas including backup storage areas 42AKA121 to 42AKA123 as log areas. The backup storage unit 42AKA13 has a plurality of backup storage areas including backup storage areas 42AKA131 to 42AKA133 as log areas. The backup storage unit 42AKA21 has a plurality of backup storage areas including backup storage areas 42AKA211 to 42AKA213 as log areas. The backup storage unit 42AKA22 has a plurality of backup storage areas including backup storage areas 42AKA221 to 42AKA223 as log areas. The backup storage unit 42AKA23 has a plurality of backup storage areas including backup storage areas 42AKA231 to 42AKA233 as log areas. The backup storage unit 42AKA31 has a plurality of backup storage areas including backup storage areas 42AKA311 to 42AKA313 as log areas. The backup storage unit 42AKA32 has a plurality of backup storage areas including backup storage areas 42AKA321 to 42AKA323 as log areas. The backup storage unit 42AKA33 has a plurality of backup storage areas including backup storage areas 42AKA331 to 42AKA333 as log areas.

The event information creation processing unit 42AKM21 creates backup data indicating event information corresponding to the occurrence of the CPU internal error 42AKC1. The backup data created at this time is, for example, data created by executing the exception backup process in step S42 of the CPU exception event occurrence process. good. The event information creation processing unit 42AKM22 creates backup data indicating event information corresponding to the occurrence of the VDP error interrupt 42AKC2. The backup data created at this time is, for example, data created by executing the error interrupt backup process in step S52 of the VDP error interrupt process, and may be data indicating log information including VDP error information. Just do it. Occurrence event information creation processing unit 42AKM23 creates backup data indicating occurrence event information corresponding to occurrence of error determination 42AKC3 during effect control. The backup data created at this time is, for example, data created by executing the backup process during control of the effect in step S79 of the effect control timer interrupt process, and data indicating the log information including the effect control error data. If it is The backup data created by the event information creation processing units 42AKM21 to 42AKM23 can be stored in the log areas of the backup storage units 41AKA1 to 41AKA3 in parallel with each other.

The memory write processing unit 42AKM11 acquires the backup data created by the event information creation processing unit 42AKM21. The backup data acquired at this time is transferred to the backup memory board 14 and stored in the log areas of the backup storage units 41AKA1 to 41AKA3. The memory write processing unit 42AKM12 acquires the backup data created by the event information creation processing unit 42AKM22. The backup data acquired at this time is transferred to the backup memory board 14 and stored in the log areas of the backup storage units 41AKA1 to 41AKA3. The memory write processing unit 42AKM13 acquires the backup data created by the event information creation processing unit 42AKM23. The backup data acquired at this time is transferred to the backup memory board 14 and stored in the log areas of the backup storage units 41AKA1 to 41AKA3.

This execution example also corresponds to the multiplicity of "3". In the three backup storage units 42AKA11 to 42AKA13, the same backup data created by the event information creation processing unit 42AKM21 are stored in a distributed manner while overlapping. In the three backup storage units 42AKA21 to 42AKA23, the same backup data created by the event information creation processing unit 42AKM22 are stored in a distributed manner while overlapping. In the three backup storage units 42AKA31 to 42AKA33, the same backup data created by the occurrence event information creation processing unit 42AKA23 are stored in an overlapping and distributed manner. For example, the backup data first acquired from the event information creation processing unit 42AKM21 is stored in the backup storage area 42AKA111 of the backup storage unit 42AKA11, the backup storage area 42AKA121 of the backup storage unit 42AKA12, and the backup storage area 42AKA131 of the backup storage unit 42AKA13. , is stored by copying and writing. The backup data acquired next from the event information creation processing unit 42AKM21 are stored in the backup storage area 42AKA112 of the backup storage unit 42AKA11, the backup storage area 42AKA122 of the backup storage unit 42AKA12, and the backup storage area 42AKA132 of the backup storage unit 42AKA13. It is memorized by copying and writing. The backup data obtained next from the event information creation processing unit 42AKM21 are stored in the backup storage area 42AKA113 of the backup storage unit 42AKA11, the backup storage area 42AKA123 of the backup storage unit 42AKA12, and the backup storage area 42AKA133 of the backup storage unit 42AKA13. is stored by copying and writing to .

In the backup storage units 42AKA11-42AKA13 and the backup storage units 42AKA21-42AKA23, for example, different addresses are assigned to the backup storage areas 42AKA111-42AKA113 and the backup storage areas 42AKA211-42AKA213. Different addresses are assigned to the storage areas 42AKA221 to 42AKA223, and different addresses are assigned to the backup storage areas AKA131 to 42AKA133 and the backup storage areas 42AKA231 to 42AKA233, thereby providing different storage areas. In the backup storage areas 42AKA21 to 42AKA23 and the backup storage sections 42AKA31 to 42AKA33, for example, different addresses are assigned to the backup storage areas 42AKA211 to 42AKA213 and the backup storage areas 42AKA311 to 42AKA313. Different addresses are assigned to the storage areas 42AKA321 to 42AKA323, and different addresses are assigned to the backup storage areas AKA231 to 42AKA233 and the backup storage areas 42AKA331 to 42AKA333, thereby providing different storage areas. In the backup storage units 42AKA31-42AKA33 and the backup storage units 42AKA11-42AKA13, for example, different addresses are assigned to the backup storage areas 42AKA311-42AKA313 and the backup storage areas 42AKA111-42AKA113. Different addresses are assigned to the storage areas 42AKA121 to 42AKA123, and different addresses are assigned to the backup storage areas AKA331 to 42AKA333 and the backup storage areas 42AKA131 to 42AKA133, thereby providing different storage areas. Note that different storage areas may be provided by using physically different storage devices. The memory write processing units 42AKM11 to 42AKM13 can perform write processing of backup data in parallel with each other. Accordingly, when the first occurrence condition and the second occurrence condition are satisfied among the event occurrence conditions corresponding to a plurality of electronic components, even while the backup data write process corresponding to one condition is being executed, the other event occurrence condition It is possible to execute write processing of backup data corresponding to the conditions.

For example, when the conditions for generating the CPU internal error 42AKC1 and the VDP error interrupt 42AKC2 are satisfied, even if the memory write processing unit 42AKM11 is executing the backup data write processing corresponding to the CPU internal error 42AKC1, the memory write processing unit 42AKM12 can execute backup data write processing corresponding to the VDP error interrupt 42AKC2. When the conditions for generating the VDP error interrupt 42AKC2 and the effect control error determination 42AKC3 are satisfied, the memory write processing is performed even when the memory write processing unit 42AKM12 is executing the backup data write processing corresponding to the VDP error interrupt 42AKC2. The part 42AKM13 can execute the writing process of the backup data corresponding to the effect control error determination 42AKC3. When the condition for generating the effect control error determination 42AKC3 and the CPU internal error 42AKC1 is met, the memory write process is performed even while the memory write processing unit 42AKM13 is executing the write process of the backup data corresponding to the effect control error determination 42AKC3. The unit 42AKM11 can execute write processing of backup data corresponding to the CPU internal error 42AKC. In this way, when a plurality of occurrence conditions are met, even if backup data write processing corresponding to one condition is being executed, backup data write processing corresponding to the other condition can be executed. I wish I could. As long as the backup data write process corresponding to one of the conditions is not being executed, the backup data write process corresponding to the other condition may of course be executed.

The condition for generating the CPU internal error 42AKC1 can be established according to the internal state of the control device, such as an exception event of the CPU 131 . The condition for generating the VDP error interrupt 42AKC2 can be established according to the internal state of the processor, such as the VDP 140 error interrupt request. The occurrence condition of the effect control error determination 42AKC3 can be established according to the processing result by the CPU 131, such as the determination when an error occurs in the effect control backup process. Therefore, when the conditions for generating the CPU internal error 42AKC1 and the VDP error interrupt 42AKC2 are established, the writing process of the backup data can be executed with priority over the case where the conditions for generating the effect control error determination 42AKC3 are established. can be For example, when the backup data is created, the creation order is determined according to the processing priority in the effect control microcomputer 120, so that the backup data write processing by the memory write processing units 42AKM11 to 42AKM13 is also performed in the order of creation. It may be executed with priority accordingly.

FIG. 19 shows an execution example different from the case of FIG. 18 for the backup processing regarding the characteristic part 42AK. In this execution example, when the conditions for generating the CPU internal error 42AKC1 are met multiple times, the backup data is created in the order in which the conditions are met, and the write process can be executed in the order in which the backup data were created. . In this case, a predetermined area of external RAM 122 or internal RAM 133 is provided with a writing flag 42AKF1 and a backup data buffer 42AKB1. The backup data buffer 42AKB1 has a plurality of buffer areas including buffer areas 42AKB11 to 42AKB13. The event information creation processing unit 42AKM21 creates backup data in the order in which the CPU internal errors 42AKC1 have occurred. For example, when the occurrence conditions for the CPU internal errors X1 to Xn corresponding to n times are satisfied as the CPU internal error 42AKC1 multiple times, the occurrence event information creation processing unit 42AKM21 generates the backup data Y1 corresponding to the occurrence conditions for each time. ˜Yn and temporarily stored in the backup data buffer 42AKB1. For example, the first created backup data is written and stored in the buffer area 42AKB11, the next created backup data is written and stored in the buffer area 42AKB12, and the subsequently created backup data is written and stored in the buffer area 42AKB13. stored as If there is backup data temporarily stored in the backup data buffer 42AKB1, the memory write processing unit 42AKM11 reads and acquires it. The backup data acquired at this time is transferred to the backup memory board 14 and stored in the log areas of the backup storage units 42AKA11 to 42AKA13. At the start of writing backup data to the log area, the writing flag 42AKF1 is set to ON. At the end of writing the backup data, the write-in-progress flag 42AKF1 is cleared and turned off. When the writing flag 42AKF1 is off, the memory write processing unit 42AKM11 is permitted to write new backup data, and reads the backup data temporarily stored in the backup data buffer 42AKB1. On the other hand, when the write flag 42AKF1 is ON, the writing of new backup data is prohibited, and the backup data temporarily stored in the backup data buffer 42AKB1 is not read.

Even if the conditions for generating the VDP error interrupt 42AKC2 are met multiple times, the backup data is created in the order in which the conditions are met, and the write process can be executed in the order in which the backup data are created. Even when the generation conditions of the effect control error determination 42AKC3 are met a plurality of times, the backup data are created in the order in which the occurrence conditions are met, and the writing process can be executed in the order of the creation of the backup data. . In these cases, writing is prohibited when the writing flag provided corresponding to the VDP error interrupt 42AKC2 and the effect control error determination 42AKC3 is ON, so that the previous occurrence condition is met. If the write process is being executed, the write process corresponding to the next occurrence condition is not executed. In this way, when the first occurrence condition or the second occurrence condition among the event occurrence conditions corresponding to a plurality of electronic components is met a plurality of times, the writing process corresponding to the previous occurrence condition is being executed. Then, a limitation is provided as a limit that write processing corresponding to the next occurrence condition is not executed. As long as the writing process corresponding to the previous occurrence condition is not being executed, the writing process corresponding to the next occurrence condition may be executed.

It should be noted that, when a plurality of occurrence conditions are satisfied, whether or not to execute any write process may be determined according to the order in which the occurrence conditions are satisfied. For example, if another occurrence condition is met during the execution of the write process corresponding to the occurrence condition that is met earlier, the write process corresponding to the occurrence condition that is met later may not be executed. Alternatively, when a plurality of occurrence conditions are satisfied, whether or not to execute any write process may be determined according to the process priority. For example, among the exceptional events of the CPU 131, an exceptional event with a high processing priority and an exceptional event with a low processing priority may be set in advance. When the condition for generating the CPU internal error 42AKC1 is met multiple times at the same time, the write processing corresponding to the exception event with high processing priority is executed, and the write processing corresponding to the exception event with low processing priority is executed. It may not be executed. Further, when a plurality of occurrence conditions are met, overwrite processing may be executed according to the processing priority. For example, when the condition for generating the CPU internal error 42AKC1 is satisfied multiple times at the same time, the write processing corresponding to the exception event with high processing priority will replace the stored data by the write processing corresponding to the exception event with low processing priority. It may be executed as an overwriting process for overwriting.

(Description of Characteristic Portion 43AK)
FIG. 20 shows an execution example of backup processing for the characteristic portion 43AK. In this case, the CPU 131 of the effect control microcomputer 120 executes a program read from one or both of the external ROM 121 and the internal ROM 132, so that the functions of the memory write processing units 43AKM11 and 43AKM12 and the event information creation process and the functions of parts 43AKM21 and 43AKM22. The backup data memories 210A to 210C of the backup memory board 14 are provided with the backup storage units 43AKA11 to 43AKA13 and the backup storage unit 43AKA21. The backup storage unit 43AKA11 is an 8-bit storage area, and includes backup storage areas 43AKA111 to 43AKA113 as log areas. The backup storage unit 43AKA12 is an 8-bit storage area, and includes backup storage areas 43AKA121 to 43AKA123 as log areas. The backup storage unit 43AKA13 is an 8-bit storage area, and includes backup storage areas 43AKA131 to 43AKA133 as log areas. On the other hand, the backup storage unit 43AKA21 is a 3-bit storage area, and includes backup storage areas 43AKA211 to 43AKA213 as log areas. The 8-bit storage area is a storage area in which storage data can be written and read in units of 8 bits. The 3-bit storage area is a storage area in which storage data can be written and read in 3-bit units.

Occurrence event information creation processing unit 43AKM21 creates backup data corresponding to a case where a backup condition of a storage area bit number of "8" and a multiplicity of "3" is satisfied. The memory write processing unit 43AKM11 acquires the backup data created by the event information creation processing unit 43AKM21. The backup data acquired at this time is transferred to the backup memory board 14 and stored in the log areas of the backup storage units 43AKA11 to 43AKA13. In the three backup storage units 43AKA11 to 43AKA13, which are 8-bit storage areas, the same backup data created by the occurrence event information creation processing unit 43AKM21 are stored in an overlapping and distributed manner. For example, the backup data first acquired from the event information creation processing unit 43AKM21 is stored in the backup storage area 43AKA111 of the backup storage unit 43AKA11, the backup storage area 43AKA121 of the backup storage unit 43AKA12, and the backup storage area 43AKA131 of the backup storage unit 43AKA13. , is stored by copying and writing. The backup data acquired next from the event information creation processing unit 43AKM21 are stored in the backup storage area 43AKA112 of the backup storage unit 43AKA11, the backup storage area 43AKA122 of the backup storage unit 43AKA12, and the backup storage area 43AKA132 of the backup storage unit 43AKA13. It is memorized by copying and writing. The backup data acquired next from the event information creation processing unit 43AKM21 are the backup storage area 43AKA113 of the backup storage unit 43AKA11, the backup storage area 43AKA123 of the backup storage unit 43AKA12, and the backup storage area 43AKA133 of the backup storage unit 43AKA13. is stored by copying and writing to .

Occurrence event information creation processing unit 43AKM22 creates backup data corresponding to the case where the backup condition of the number of storage area bits being "3" and the multiplicity being "1" is satisfied. The memory write processing unit 43AKM12 acquires the backup data created by the event information creation processing unit 43AKM22. The backup data acquired at this time is transferred to the backup memory board 14 and stored in the log area of the backup storage unit 43AKA21. In the backup storage unit 43AKA21, which is a 3-bit storage area, the backup data created by the event information creation processing unit 43AKM22 is stored in a smaller storage area than the backup data created by the event information creation processing unit 43AKM21. stored in the area. Specifically, corresponding to the number of bits of the storage area of "3", a 3-bit storage area is used which is storage data in units of 3 bits, which is smaller than the 8-bit unit of the 8-bit storage area. Also, when the multiplicity is "1", mirroring is not performed and single backup data is stored without distribution. For example, the backup data first obtained from the event information creation processing unit 43AKM22 is stored by writing it to the backup storage area 43AKA211 of the backup storage unit 43AKA21 without copying. The backup data acquired next from the event information creation processing unit 43AKM22 is stored by writing it to the backup storage area 43AKA212 of the backup storage unit 43AKA21 without copying. The next backup data acquired from the event information creation processing unit 22 is stored by writing it to the backup storage area 43AKA213 of the backup storage unit 43AKA21 without copying.

In the backup control table 120T, when the data to be backed up is system data, performance control error data, player history data, received command data, or setting value change time data, the number of storage area bits is "8". The severity is designated as "3". On the other hand, in the case of any one of power saving setting data, current time change data, power cut time data, store name setting data, effect output amount data, the number of storage area bits is "3" and the multiplicity is "1". is set to For example, when the backup condition that the data to be backed up corresponds to the system data is satisfied, the backup data created by the event information creation processing unit 43AKM21 is stored in the backup storage units 43AKA11 to 43AKA13 by the memory writing processing unit 43AKM11. It is written and stored in the log area. On the other hand, when the backup condition corresponding to the power saving setting data is satisfied, the backup data created by the event information creation processing unit 43AKM22 is stored in the backup storage unit 43AKA21 by the memory writing processing unit 43AKM12. It is written and stored in the log area. Thus, when writing the first information corresponding to the first occurrence condition, the same backup data is stored in a plurality of log areas in the backup storage units 43AKA11 to 43AKA13. On the other hand, when writing the second information corresponding to the second occurrence condition, the backup data is stored in a small log area in the backup storage unit 43AKA21.

For example, the occurrence condition at the time of power saving change, in which the data to be backed up is the backup condition corresponding to the power saving setting data, is met less frequently than the occurrence condition at the time of data update, in which the data to be backed up is the backup condition corresponding to the system data. In this way, the second occurrence condition may be any condition as long as it is met less frequently than the first occurrence condition. An event corresponding to an occurrence condition that is frequently established affects the storage of log information related to other events when log information cannot be stored properly, such as when noise occurs during writing processing. likely to give An event corresponding to an occurrence condition that is met less frequently is less likely to affect storage of log information related to other events than an event corresponding to an occurrence condition that is met more frequently. Therefore, when writing log information corresponding to an occurrence condition that is frequently established, by storing the same backup data in a plurality of log areas, it is possible to prevent problems caused by abnormalities in stored data from spreading. On the other hand, when writing log information corresponding to an occurrence condition that is infrequently satisfied, an increase in the storage data capacity can be prevented by storing backup data in a small log area.

The power-saving setting data can be set by an administrator of the pachinko gaming machine 1, such as an attendant of a game arcade, for example. Thus, the second information corresponding to the second occurrence condition may be set by the administrator of the pachinko gaming machine 1 . Data that can be set by the administrator of the pachinko game machine 1 can be set again by the administrator even if a problem occurs in the setting contents, and there is no possibility of giving disadvantage to the player of the pachinko game machine 1. low. On the other hand, for example, it is impossible or difficult to reset data corresponding to the occurrence conditions of events that occur according to the progress of a game or performance, and there is a high possibility that the player will be disadvantaged or distrusted. It shows information about Therefore, when writing log information corresponding to occurrence conditions that cannot be set by the administrator of the pachinko game machine 1, by storing the same backup data in a plurality of log areas, it is possible to accurately verify when an abnormality occurs. sexuality is enhanced. On the other hand, when writing log information corresponding to generation conditions that can be set by the administrator of the pachinko gaming machine 1, the storage data capacity can be prevented from increasing by storing backup data in a small log area. The information that can be set by the administrator of the pachinko machine 1 is not limited to the information indicated in the power saving setting data, but also the RTC information indicated in the current time change data, the shop name information indicated in the shop name setting data, It may be information on the sound volume or the amount of light indicated by the effect output amount data, or a combination of some or all of these. In addition, when a projector is used as the rendering device, information on display settings by the projector may be included in the information that can be set by the administrator of the pachinko gaming machine 1 . It should be noted that the information of the display setting by the projector can be set by the person in charge at the manufacturer of the pachinko game machine 1, unlike the person in charge of the game hall. In this way, the administrator of the pachinko gaming machine 1 may include the staff of the game hall, or may include the person in charge at the manufacturer of the pachinko gaming machine 1 . The information that can be set by the administrator of the pachinko gaming machine 1 may include setting information related to the frequency of performance using a specific performance device, not limited to the projector.

In the backup storage units 43AKA11 to 43AKA13, which are 8-bit storage areas, different backup storage areas may be provided according to the types of log information indicated in the backup data. For example, the backup storage area when the data to be backed up is received command data may be provided as a storage area different from the backup storage area when the data to be backed up is effect control error data. Inside or outside the backup storage area corresponding to the effect control error data, a backup storage area corresponding to the occurrence of an exception event of the CPU 131 or an error interrupt request of the VDP 140 may be provided. In this way, when a backup storage area corresponding to the type of log information is provided in the 8-bit storage area, the memory write processing unit 43AKM11 stores the backup storage area determined according to the established backup condition. , the backup data created by the event information creation processing unit 43AKM21 may be written and stored.

(Description of Characteristic Portion 44AK)
FIG. 21 shows a configuration example regarding the characteristic portion 44AK. In this configuration example, a first effect control board 44AK12A and a second effect control board 44AK12B are provided. 1st production control board 44AK12A and 2nd production control board 44AK12B should just have the composition and function which production control board 12 and backup memory board 14 in the above-mentioned example have. 1st control part 44AK10A, 1st backup storage part 44AK11A, and connector 44AK13A are mounted in 1st production|presentation control board 44AK12A. A second control unit 44AK10B, a second backup storage unit 44AK11B, and a connector 44AK13B are mounted on the second effect control board 44AK12B. The connector 44AK13A of the first effect control board 44AK12A is connected to the connector 44AK13B of the second effect control board 44AK12B. The connector 44AK13B of the second effect control board 44AK12B is connected to the connector 44AK11B of the first effect control board 44AK12A. 1st control part 44AK10A and 2nd control part 44AK10B should just each have a part or all of the structure and function with which the microcomputer 120 for production control in the said Example is provided. For example, the 1st control part 44AK10A is provided with the structure and function regarding CPU131 of the microcomputer 120 for production control, and the 2nd control part 44AK10B is provided with the structure and function regarding VDP140 of the microcomputer 120 for production control. The first backup storage unit 44AK11A and the second backup storage unit 44AK11B may each have a part or all of the configuration and functions of the backup memory board 14 in the above embodiment. For example, the first backup storage unit 44AK11A has the configuration and functions related to the backup data memories 210A and 210B of the backup memory board 14, and the second backup storage unit 44AK11B has the configuration and functions related to the backup data memories 210C and 210D of the backup memory board 14. It has functionality.

In the first effect control board 44AK12A, the first control unit 44AK10A, when having the configuration and functions related to the CPU 131 in the above embodiment, for example, the serial communication circuit 137 of the effect control microcomputer 120 and the effect of the effect data memory board 16 A process for controlling the first electronic component, such as a data memory, is executed. In this case, the first backup storage unit 44AK11A stores backup data indicating log information regarding the first control unit 44AK10A. In the second production control board 44AK12B, the second control unit 44AK10B, in the case of having the configuration and functions related to the VDP 140 in the above embodiment, for example, the sound processing circuit 141 of the production control microcomputer 120, the lamp control circuit 142, the motor control circuit 143, the image display device 5, and the like to control the second electronic components. In this case, the second backup storage unit 44AK11B stores backup data indicating log information regarding the second control unit 44AK10B. Thus, the first backup storage unit 44AK11A can store information about the first control unit 44AK10A, and the second backup storage unit 44AK11B can store information about the second control unit 44AK10B.

When the first control unit 44AK10A has the configuration and functions related to the CPU 131, the log information including the exception event information of the CPU 131 is stored by executing the exception backup process in step S42 in the CPU exception event occurrence process. It is stored in the log area of the first backup storage unit 44AK11A. When the second control unit 44AK10B has the configuration and functions related to the VDP 140, the log information including the VDP error information of the VDP 140 is executed by executing the error interrupt backup process of step S52 in the VDP error interrupt process. is stored in the log area of the second backup storage unit 44AK11B. In this way, when the log information is stored in the log area of the first backup storage unit 44AK11A, the exception backup process in the CPU exception event occurrence process is executed. On the other hand, when the log information is stored in the log area of the second backup storage unit 44AK11B, VDP error allocation is performed as a different process from the case where the log information is stored in the log area of the first backup storage unit 44AK11A. A backup process may be executed when an error interrupt occurs in the load process. In addition, when log information is stored in the log area of the first backup storage unit 44AK11A and when log information is stored in the log area of the second backup storage unit 44AK11B, arbitrary storage processing different from each other is performed. may

Log information including exception event information of the CPU 131 is stored in the log area of the first backup storage unit 44AK11A. On the other hand, in the log area of the second backup storage unit 44AK11B, log information including VDP error information of the VDP 140 is stored as information different from the log area of the first backup storage unit 44AK11A. Alternatively, the log area of the first backup storage unit 44AK11A stores log information related to errors occurring in the stick controller 31A or the push button 31B, for example. On the other hand, the log area of the second backup storage unit 44AK11B stores, for example, log information related to errors that have occurred in the image display device 5. FIG. In addition, the log area of the first backup storage unit 44AK11A and the log area of the second backup storage unit 44AK11B may store different log information related to arbitrary electronic components.

Note that the log area of the first backup storage unit 44AK11A may store log information corresponding to the event occurrence conditions related to the first control unit 44AK10A. Log information corresponding to an event occurrence condition related to the second control unit 44AK10B may be stored. The log area of the second backup storage unit 44AK11B may store log information corresponding to the event occurrence conditions related to the second control unit 44AK10B. Log information corresponding to the occurrence condition of the event related to the part 44AK10A may be stored. If log information from both log areas is stored in both log areas, even if a storage error occurs in one log area, inspection such as analysis can be performed using the log information stored in the other log area. It becomes possible, and the reliability of the stored data is improved. The configuration and functions related to the CPU 131 of the production control microcomputer 120 and the configuration and functions related to the VDP 140 of the production control microcomputer 120 are not limited to dividing into the first control unit 44AK10A and the second control unit 44AK10B, For example, the configuration and functions related to the CPU 131 of the production control microcomputer 120 may be divided into the first control section 44AK10A and the second control section 44AK10B. Alternatively, the first control unit 44AK10A and the second control unit 44AK10B may be provided corresponding to a plurality of CPUs. The first control unit 44AK10A may have a configuration and functions related to a CPU, and the second control unit 44AK10B may have a configuration and functions related to light emission control.

The first backup storage unit 44AK11A and the second backup storage unit 44AK11B are substrates different from the first production control board 44AK12A on which the first control unit 44AK10A is mounted and the second production control board 44AK12B on which the second control unit 44AK10B is mounted. , may be mounted on the backup memory board 14, for example. In this case, the log information on the electronic component called the first control unit 44AK10A mounted on the first effect control board 44AK12A, and the log information on the electronic component called the second control unit 44AK10B mounted on the second effect control board 44AK12B can be stored in the log areas of the first backup storage unit 44AK11A and the second backup storage unit 44AK11B mounted on the common backup memory board 14. FIG. In this way, backup data indicating log information about a plurality of electronic components provided on a plurality of control boards may be stored in a log area of a storage device provided on a common backup memory board. Alternatively, the first backup memory board on which the first backup storage unit 44AK11A is mounted and the second backup memory board on which the second backup storage unit 44AK11B is mounted are combined into the first performance control board 44AK12A and the second performance control board 44AK12B. may be provided as a different substrate.

For example, the storage data capacity of the first backup storage unit 44AK11A is 1 MB (megabyte). On the other hand, the storage data capacity of the second backup storage unit 44AK11B is 512 KB (kilobytes). In this way, the first backup storage section 44AK11A and the second backup storage section 44AK11B may be configured as different storage devices in that the storage data capacity is different. Alternatively, the first backup storage unit 44AK11A is configured using a nonvolatile ferroelectric memory such as FRAM (registered trademark), for example. On the other hand, the second backup storage unit 44AK11B is configured using, for example, an SRAM with a battery. When a nonvolatile ferroelectric memory such as FRAM (registered trademark) is used, stored data can be erased by inputting a specific signal such as a clear signal. When a battery-equipped SRAM is used, stored data can be erased by, for example, removing the battery in addition to inputting a specific signal. Alternatively, the first backup storage unit 44AK11A and the second backup storage unit 44AK11B may use different transmission methods for stored data. For example, data stored in the first backup storage unit 44AK11A is transmitted by serial communication, and data stored in the second backup storage unit 44AK11B is transmitted by parallel communication. Combinations of the first backup storage unit 44AK11A and the second backup storage unit 44AK11B, and the serial communication method and the parallel communication method can be arbitrarily changed. In this case, as the serial communication method, it is possible to send and receive communication data corresponding to a serial communication standard with a faster communication speed than the parallel communication method, or a serial communication standard with a slower communication speed than the parallel communication method may be used. Corresponding communication data may be transmitted and received. Regardless of the serial communication standard, the transmission speed of stored data may vary depending on the configuration of the data line (whether shared or not), the hardware configuration of the communication circuit, or a combination thereof. As described above, the first backup storage unit 44AK11A and the second backup storage unit 44AK11B differ in the method of realizing the backup function, the difference in the materials used to form the memory cells, the method of erasing the stored data, and the erasure of the stored data. Both storage units may be configured as storage devices that are different from each other in that the transmission method or the transmission speed of stored data is different. In addition, the first backup storage unit 44AK11A and the second backup storage unit 44AK11B may be configured as different storage devices due to arbitrary differences. Note that the first backup storage unit 44AK11A and the second backup storage unit 44AK11B may be configured to store data capacity, backup function implementation method, memory cell formation material, storage data erasing method, and other arbitrary device configurations and storage functions. A part or all of them may be configured as a common storage device. The first backup storage unit 44AK11A and the second backup storage unit 44AK11B can be arbitrarily combined in configuration and function.

The first backup storage unit 44AK11A can hold stored contents without using a backup power source, such as when configured using FRAM (registered trademark). In this case, the second backup storage unit 44AK11B can hold the stored content using a backup power supply, such as when configured using an SRAM with a battery. In such a configuration, part or all of the log information stored in the log area of the second backup storage unit 44AK11B may also be stored in the log area of the first backup storage unit 44AK11A. When part of the log information is stored, the target log information is based on update frequency, update data amount, data importance, target parts, target control, combination of some or all of these, etc. , should be determined in advance. In a storage device capable of retaining stored content using a backup power supply, stored data is erased when the backup power supply is lost. Therefore, by storing data stored in a storage device capable of retaining memory contents using a backup power supply in a storage device capable of retaining memory contents without using a backup power supply, loss of memory data can be reliably prevented. can be prevented.

Whether or not to display on the maintenance history screen depends on whether the log information is stored in the log area of the first backup storage unit 44AK11A or the log information is stored in the log area of the second backup storage unit 44AK11B. You may change the setting of either. For example, log information stored in the log area of the first backup storage unit 44AK11A can be displayed on the maintenance history screen, while log information stored in the log area of the second backup storage unit 44AK11B can be displayed on the maintenance history screen. may be set not to be displayed. Even in this case, if the log information stored in the log area of the second backup storage unit 44AK11B is also stored in the log area of the first backup storage unit 44AK11A, substantially all log information can be stored. It can be displayed on the maintenance history screen. However, the log information stored in the log area of the second backup storage unit 44AK11B is not read when the maintenance history screen is displayed. are handled differently. When any output is performed, not limited to the display of the maintenance history screen, the setting of whether or not log information is to be read is different between the first backup storage unit 44AK11A and the second backup storage unit 44AK11B. good too. As described above, the log information stored in the log area of either the first backup storage unit 44AK11A or the second backup storage unit 44AK11B is limited to not being read out when outputting. may be restricted. On the other hand, the range of log information stored in the other log area may be read when outputting.

The configuration and functions provided by the effect control board 12 and the backup memory board 14 in the above embodiment are the first effect control board 44AK12A provided with the first control unit 44AK10A and the first backup storage unit 44AK11A, the second control unit 44AK10B and the It is realized by a configuration divided into a second effect control board 44AK12B provided with a second backup storage section 44AK11B. In this case, the development of the configuration and functions provided by the first effect control board 44AK12A and the development of the configuration and functions provided by the second effect control board 44AK12B, for example, are shared by separate developers and proceeded in parallel. be able to. As a result, the burden of development work can be reduced, and an increase in manufacturing costs can be prevented.

(Description of Characteristic Portion 45AK)
FIG. 22 shows a setting example of an inspection designation command relating to the characteristic portion 45AK. The inspection designation command is included in a plurality of test commands received, for example, when executing backup inspection processing. FIG. 22A shows a setting example 45AK01 of an inspection designation command capable of designating an inspection output unit and a communication method. The output unit for inspection should be able to select and designate a connector to be used as the signal output unit for inspection from among the connectors 152 to 156, for example. The output unit for inspection should be capable of inputting/outputting an inspection signal and outputting a read signal corresponding to backup data. The communication method may be parallel or serial, and in the case of serial, serial communication standards such as UART, SPI, and I2C can be selected and specified. A plurality of inspection designation commands 45AKA1 to 45AKA4 are prepared in advance as inspection designation commands in the setting example 45AK01. A plurality of inspection designation commands 45AKA1 to 45AKA4 may be different in inspection output units 45AKC1 to 45AKC4 and communication method designation contents.

The connector 152 is wire-connected to the effect control relay board 17, and can output control signals for a plurality of electronic components such as a driver circuit mounted on the driver board 19, the effect motor 60, and the effect LED 61, for example. The connector 153 is wire-connected to the lamp output board 13 and is capable of outputting a control signal to an electronic component such as a driver circuit mounted on the lamp output board 13 . The connector 154 is wire-connected to the backup memory board 14, and can output control signals to a plurality of electronic components such as the RTC 201, the serial communication circuit 202, and the backup data memories 210A to 210D mounted on the backup memory board 14, for example. The connector 155 is wire-connected to the effect data memory board 16, and can output control signals for a plurality of electronic components such as a plurality of effect data memories mounted on the effect data memory board 16, for example. In this way, connectors 152-155 can output control signals for a plurality of electronic components. On the other hand, the connectors 152 to 155 are designated as any one of the inspection output units 45AKC1 to 45AKC4 by the inspection designation commands 45AKA1 to 45AKA4, so that the read signals of the backup data indicating the log information read from the log area are output. It is possible to output a read signal corresponding to the stored information. Since the connector 156 is wire-connected to the inspection device of the pachinko game machine 1, no control signal for electronic components is output. On the other hand, the connector 156 can output a read signal corresponding to stored information, such as a backup data read signal indicating log information read from the log area. For example, the connector 156 is designated as one of the inspection output units 45AKC to 45AKC4 by the inspection designation commands 45AKA1 to 45AKA4, and becomes an output terminal for a read signal corresponding to the log information.

The inspection output units 45AKC1-45AKC4 that can be designated by the inspection designation commands 45AKA1-45AKA4 may include some of the connectors 152-156 or all of the connectors 152-156. Further, the inspection output units 45AKC1 to 45AKC4 may include a connector common to each other, or may include a connector different from that of the other inspection output units. For example, the effect relay wiring connector 152 can input and output multiple types of control signals and detection signals according to the specifications of various circuits mounted on the effect control relay board 17, the audio output board 18, and the driver board 19. It is only required that they are configured and included in the inspection output sections 45AKC1-45AKC4 of the inspection designation commands 45AKA1-45AKA4. On the other hand, for example, the frame lamp wiring connector 153 is configured to be capable of inputting and outputting parallel signals, and is included in the inspection output section 45AKC1 of the inspection designation command 45AKA1 that designates parallel as the communication method. On the other hand, the connector 153 is not included in the inspection output sections 45AKC1 to 45AKC4 of the inspection designation commands 45AKA2 to 45AKA4 specifying any of the serial communication standards as the communication method. Further, for example, the connector 154 for backup wiring is configured to be capable of inputting/outputting a signal conforming to the SPI serial communication standard, and the inspection output section 45AKC3 of the inspection designation command 45AKA3 that designates the SPI serial communication standard as the communication method. include. On the other hand, the connector 154 is not included in the inspection output units 45AKC1, 45AKC2, and 45AKC4 of the inspection designation commands 45AKA1, 45AKA2, and 45AKA4 that designate parallel, UART, and I2C serial signal standards as the communication method. As described above, the connectors 152 to 155 capable of outputting control signals for a plurality of electronic components are composed of the connector 152 capable of outputting signals according to a plurality of signaling methods and the connectors 153 and 154 capable of outputting signals according to a specific signaling method. may contain Connectors 152 to 156 that can be designated as inspection output units 45AKC1 to 45AKC4 of inspection designation commands 45AKA1 to 45AKA4 include connectors 152 to 155 that can output control signals for a plurality of electronic components, and connectors 152 to 155 that can output control signals for electronic components. It may also include a connector 156 that is not connected. By designating the inspection output units 45AKC1 to 45AKC4 with the inspection designation commands 45AKA1 to 45AKA4, a signal output unit corresponding to multiple types of received information is selected from a plurality of mutually different signal output units such as the connectors 152 to 156. Then, inspection information corresponding to the inspection signal, such as a backup data readout signal, can be output.

The CPU 131 of the effect control microcomputer 120 can execute various lottery processes relating to the presence or absence of effects and effects modes, such as lottery processes for advance notice effects. Based on the lottery results of such lottery processing, control signals corresponding to various control information are output. For example, when it is decided to execute a specific advance notice effect as a lottery result of the notice effect, a control signal for reading out the pattern data of the notice effect control pattern corresponding to the notice effect is sent to the effect data wiring connector. 155 and transmitted to the performance data memory board 16 via the performance data wiring. In this case, in accordance with the read pattern data of the notice effect control pattern, a control signal (audio signal) for controlling the sound output by the speakers 8L and 8R and a control signal for controlling the driving state of the effect motor 60 (Drive control signal) and the like are output from the connector 152 for effect relay wiring, and are transmitted to the effect control relay board 17 via the effect relay wire. A control signal (electrical signal) for controlling the lighting mode of the game effect lamp 9 is output from the frame lamp wiring connector 153 and transmitted to the lamp output board via the frame lamp wiring. On the other hand, the backup wiring connector 154 can output a control signal for electronic components such as the backup data memories 210A to 210D provided on the backup memory board 14. This control signal is the lottery result of the lottery process. It is not output based on Thus, the connectors 152 to 155 capable of outputting control signals for a plurality of electronic components include connectors 152, 153, 155 capable of outputting control signals based on the lottery results, and a connector 154 different from these. there is

The connectors 152, 153, and 155 need only be capable of outputting control signals based on the lottery results and outputting control signals independent of the lottery results. As an example, when a customer waiting demonstration designation command transmitted from the main board 11 is received, a control signal for controlling the demonstration effect without executing the lottery process is output from the connectors 152, 153, 155 and the like. be. Of these, the connector 152 for effect relay wiring is provided with a control signal (audio signal) for controlling the sound output by the speakers 8L and 8R and a control signal (drive control signal) for controlling the driving state of the effect motor 60. It is possible to output a control signal according to the control information of the speakers 8L and 8R as a performance device, the performance motor 60 and the performance LED 61. The frame lamp wiring connector 153 can output a control signal corresponding to the control information of the game effect lamp 9 as a production device, such as a control signal (electrical decoration signal) for controlling the lighting mode of the game effect lamp 9. be. On the other hand, the effect data wiring connector 155 can output a control signal corresponding to control information of an electronic component different from the effect device, such as a control signal for controlling the reading process of the effect data memory. In addition, the backup wiring connector 154 can output control signals corresponding to control information of electronic components different from the production device, such as control signals for controlling read processing and write processing of the backup data memories 210A to 210D. is. In this way, the connectors 152 to 155 capable of outputting control signals for a plurality of electronic components are the connectors 152 and 153 capable of outputting control signals corresponding to the control information of the production device, and the control signals for electronic components other than the production device. and connectors 154 and 155 capable of outputting .

FIG. 22B shows a setting example 45AK02 of an inspection designation command that can designate inspection output data. Some or all of the data stored in the log areas of the backup data memories 210A to 210D provided on the backup memory board 14 can be selected and designated as the inspection output data as backup data indicating log information. If it is The output data for inspection is outputted from the connectors 152 to 156 designated as any one of the output units for inspection 45AKC1 to 45AKC4 by the inspection designation commands 45AKA1 to 45AKA4. A plurality of inspection designation commands 45AKB1 to 45AKB12 are prepared in advance as inspection designation commands in the setting example 45AK02. The plurality of inspection designation commands 45AKB1 to 45AKB12 differ in inspection output data.

The inspection designation command 45AKB1 designates system data as inspection output data. The inspection designation command 45AKB2 designates the performance control error data as the inspection output data. The inspection designation 45 command AKB3 designates player history data as inspection output data. The inspection designation command 45AKB4 designates received command data as inspection output data. The inspection designation command 45AKB5 designates setting change time data as inspection output data. The inspection designation command 45AKB6 designates power saving setting data as inspection output data. The inspection designation command 45AKB7 designates the current time setting data as inspection output data. The inspection designation command 45AKB8 designates power-off time data as inspection output data. The inspection designation command 45AKB9 designates store name setting data as inspection output data. The inspection designation command 45AKB10 designates effect output amount data as inspection output data. The inspection designation command 45AKB11 designates performance history data as inspection output data. The inspection designation command 45AKB12 designates all stored data as inspection output data.

Backup data that can be output by specifying it as inspection output data may indicate information about a plurality of electronic components or may indicate game-related information about a game. For example, when the production control error data is designated as the inspection output data by the inspection designation command 45AKB2, it becomes possible to output the backup data including the production control error data, and it is possible to specify the error that occurred regarding the electronic parts including the production device. backup data is output.

On the other hand, if the player history data is designated as the inspection output data by the inspection designation command 45AKB3, it becomes possible to output the backup data including the player history data. Regardless of whether or not the data regarding the player is updated, the backup data at the time of data update is output. When the received command data is designated as the inspection output data by the inspection designation command 45AKB4, the backup data including the received command data can be output, regardless of whether or not events corresponding to a plurality of electronic components have occurred. Backup data at the time of reception of the effect control command transmitted from the main substrate 11 is output. When store name setting data is designated as inspection output data by the inspection designation command 45AKB9, backup data including the store name setting data can be output, regardless of whether or not events corresponding to a plurality of electronic components have occurred. First, the backup data at the time of setting the name of the store corresponding to the game arcade is output. When system data is designated as inspection output data by the inspection designation command 45AKB1, backup data including system data can be output. Backup data including system data is stored regardless of whether or not an event corresponding to a plurality of electronic components has occurred, and backup data when updating data due to the occurrence of an event corresponding to a plurality of electronic components. backup data at the time of data update. By outputting backup data at the time of data update for system data, backup data in the event that an event occurs for multiple electronic components, regardless of whether an event occurs for multiple electronic components Backup data at the time of data update is output. In this way, information about electronic parts, game-related information about games, or general information unrelated to electronic parts or games can be output according to the contents of the inspection output data specified by the inspection specification command. . In addition, it is not limited to the specified contents of the inspection output data by the inspection specifying command, and information about the electronic parts and the , game-related information about a game, or general information unrelated to electronic components or games, may be switchable. It is not limited to the detection result, and can switch output information such as information on electronic parts, game-related information on games, or general information unrelated to electronic parts or games according to arbitrary control and processing. I wish I had.

(Regarding deformation and application, etc.)
The present invention is not limited to the above embodiments, and various modifications and applications are possible. For example, the pachinko machine 1 does not have to have all the technical features shown in the above embodiment, and in order to solve at least one problem in the prior art, some of the features explained in the above embodiment It may be provided with the configuration of.

The pachinko game machine 1 may not perform variable display of special symbols and decorative symbols. As an example, based on the detection of a game ball that has passed through (entered) the start winning opening provided in the game area, the variable winning device provided in the game area is changed from the closed state (second state) to the open state ( 1 state), and when the game ball that has entered the inside of the variable winning device enters a specific area (V winning opening) out of a plurality of areas, it is controlled to a jackpot game state that is advantageous to the player. It may be configured as follows.

In the above embodiments, the "ratio" and "probability" of making various decisions are, for example, 70:30. It may be set so that it will never be decided), or at least the probability of any decision outcome is 0% (never decided) or 100% (always decided). may be set. For example, in the case of making various decisions, if the ratio of any one decision result among multiple decision results is higher than the ratio of other decision results, the ratio of 1 decision result is It may include being 100%, or it may include being 0% as a percentage of other determination results. When the ratio of one decision result is 100%, the ratio of other decision results is 0%. In addition, when the ratio of other decision results is 0%, if the ratio of 1 decision result is a predetermined ratio that is not 0% even if it is other than 100%, the ratio of 1 decision result is the other decision result. higher than the ratio of

In addition, various effects including the device configuration and data configuration of the game machine, the processing shown in the flowchart, the image display operation on the image display device, the sound output operation on the speaker, and the lighting operation on the game effect lamp and the performance LED Operations and the like can be arbitrarily changed and modified without departing from the scope of the present invention. In addition, the gaming machine of the present invention is not limited to a pay-out type gaming machine that pays out a predetermined number of game media as a prize based on the occurrence of winning, but is a gaming machine that encloses game media and pays points based on the occurrence of winning. It can also be applied to an enclosed game machine that provides

The present invention can be applied not only to the pachinko game machine 1 but also to slot machines and the like. A slot machine is an arbitrary gaming machine capable of performing a predetermined game, such as variable display of symbols that serve as identification information of a plurality of types, and giving a predetermined game value based on the game result. More specifically, By setting a predetermined number of bets (number of medals or number of credits) for one game, the game can be started, and a variable display device ( One game is completed by deriving and displaying the display results of, for example, a plurality of reels, etc.), and prizes are awarded according to the display results (for example, cherry prizes, watermelon prizes, bell prizes, replay prizes, BB prizes, RB prizes, etc.). is a gaming machine that can occur. In such a slot machine, the hardware resources including the effect movable mechanism provided on the front side of the slot machine cooperate with the software that performs the predetermined processing, thereby realizing the pachinko machine shown in the above embodiment. All or part of the features of the gaming machine 1 may be provided.

Slot machines are not limited to those in which the number of bets is set using medals and credits as the gaming value, but slot machines in which the number of bets is set using game balls as the gaming value, and credits only as the gaming value. It may also be a full credit slot machine where the bet is set using . When game balls are used as game media, for example, one medal can correspond to five game balls. Equivalent to setting The pachinko gaming machine 1 and the slot machine are not limited to those using only one of a plurality of types of game values such as medals and game balls. A game value may be used together. For example, in a slot machine, it is possible to play a game by setting the number of bets using any of a plurality of types of game values such as medals and game balls. Any of the types of gaming values may be paid out.

Programs and data for realizing the present invention are limited to the form of being distributed/provided on a detachable recording medium to a computer device included in a game machine, such as a pachinko game machine 1 or a slot machine. It may be distributed by being pre-installed in a storage device of a computer device or the like instead of being distributed. Furthermore, the program and data for realizing the present invention can be distributed by being downloaded from another device on the network connected via a communication line or the like by providing a communication processing unit. I don't mind.

In addition, the game can be executed not only by loading a detachable recording medium, but also by temporarily storing programs and data downloaded via a communication line or the like in an internal memory or the like. Alternatively, it may be directly executed using hardware resources of other devices on a network connected via a communication line or the like. Furthermore, the game may be executed by exchanging data with another computer device or the like via a network.

(Description of Problem Solving Means and Effect of Characteristic Portion 41AK)
A gaming machine capable of playing a game, such as a pachinko gaming machine 1, which is capable of controlling a plurality of electronic components, for example, control means such as a production control microcomputer 120, and power supply to the gaming machine are stopped. and storage means such as backup data memories 210A to 210D capable of storing information on a plurality of electronic components, and the control means controls events corresponding to the plurality of electronic components. When the occurrence condition is satisfied, as the write processing for writing information to the storage means, for example, the write processing by the memory write processing unit 41AKM10 can be executed, and the storage means includes, for example, backup storage areas 41AKA11 to 41AKA13. A storage area in which first information corresponding to a first occurrence condition is written, such as a backup storage unit 41AKA1, and a storage area in which second information corresponding to a second occurrence condition is written are provided as one continuous area, For example, when a first occurrence condition and a second occurrence condition are met, such as write prohibition when the writing flag 41AKF1 is ON, during the execution of the process of writing information corresponding to one of the conditions, the other Do not execute the process of writing the information corresponding to the condition. In this manner, while the process of writing information corresponding to one of the first occurrence condition and the second occurrence condition is being executed, the process of writing information corresponding to the other condition is not executed, thereby avoiding conflict between the processes of writing information. be. This makes it possible to appropriately manage information.

The occurrence condition may be established according to the internal state of the control means, such as the CPU internal error 41AKC1 and the VDP error interrupt 41AKC2. In this way, when the occurrence condition corresponding to the internal state of the control means is established, the writing process is executed to write the information on the electronic parts into the storage means, and the information on the electronic parts including the control means is stored. be able to. This makes it possible to appropriately manage information.

The first occurrence condition, for example, CPU internal error 41AKC1, VDP error interrupt 41AKC2, etc., can be established according to the internal state of the control means, the second occurrence condition, for example, such as production control error determination 41AKC3, depending on the control means It can be established depending on the processing result, and for example, as shown in FIG. It may be possible. In this way, when the first occurrence condition that can be established according to the internal state of the control means is established, writing is given priority over the case where the second occurrence condition that can be established according to the processing result of the control means is established. If the write process is executed, the priority of the write process is set while avoiding the competition of the write processes of the information on the electronic components. This enables appropriate management of information.

When the first occurrence condition or the second occurrence condition is satisfied a plurality of times, the next condition is set according to the execution information indicating that the process of writing the information corresponding to the previous condition, such as the writing flag 41AKF1, is being executed. The process of writing the corresponding information may be restricted. If the information writing process is restricted according to such execution information, the process conflict can be easily avoided. This makes it possible to appropriately manage information.

The write process may store the same information in a plurality of storage areas such as the backup storage units 41AKA1 to 41AKA3. By storing the same information in a plurality of storage areas in this manner, the reliability of the information is enhanced. This makes it possible to appropriately manage information.

When a write condition different from the generation condition is satisfied, the control means writes game-related information different from the information on the plurality of electronic components into the storage means, for example, backup processing according to the setting of the backup control table 120T. etc. may be executable. In this way, if it becomes possible to execute the process of writing game-related information corresponding to write conditions different from the generation conditions, various information can be stored and managed. This enables appropriate management of information.

For example, output means, such as connectors 152 to 155, capable of outputting control signals for a plurality of electronic components and capable of outputting read signals corresponding to information stored in the storage means may be provided. Since such output means can output the control signal and the readout signal, the complication of the device configuration and the increase in the manufacturing cost can be prevented. This makes it possible to appropriately manage information.

First output means, such as connectors 152 to 155, capable of outputting control signals for a plurality of electronic components, and connector 156, which, unlike the first output means, can output a read signal corresponding to information stored in the storage means. and a second output means such as. In this manner, if the first output means can output the control signal and the second output means can output the read signal, confusion of the output signals can be prevented. This makes it possible to appropriately manage information.

(Description of Problem Solving Means and Effect of Characteristic Portion 42AK)
A gaming machine capable of playing a game, such as a pachinko gaming machine 1, which is capable of controlling a plurality of electronic components, for example, control means such as a production control microcomputer 120, and power supply to the gaming machine are stopped. and storage means such as backup data memories 210A to 210D capable of storing information on a plurality of electronic components, and the control means controls events corresponding to the plurality of electronic components. As write processing for writing information to the storage means when the generation condition is established, for example, write processing by the memory write processing units 42AKM11 to 42AKM13 can be executed. a backup storage unit 42AKA11 including backup storage areas 42AKA211 to 42AKA213; a backup storage unit 42AKA31 including backup storage areas 42AKA311 to 42AKA313; , and a storage area in which the second information corresponding to the second occurrence condition is written is provided as a different area. is established, it is possible to execute the process of writing the information corresponding to the other condition even while the process of writing the information corresponding to one condition is being executed. In this manner, even during the execution of the process of writing information corresponding to one of the first occurrence condition and the second occurrence condition, the process of writing information corresponding to the other can be executed, so the efficiency of the information writing process can be improved. . This makes it possible to appropriately manage information.

The occurrence condition may be established according to the internal state of the control means, such as the CPU internal error 41AKC1 and the VDP error interrupt 41AKC2. In this way, when the occurrence condition corresponding to the internal state of the control means is established, the writing process is executed to write the information on the electronic parts into the storage means, and the information on the electronic parts including the control means is stored. be able to. This makes it possible to appropriately manage information.

The first occurrence condition, for example, CPU internal error 41AKC1, VDP error interrupt 41AKC2, etc., can be established according to the internal state of the control means, the second occurrence condition, for example, such as effect control error determination 41AKC3, depending on the control means It can be established depending on the processing result, and for example, as shown in FIG. It may be possible. In this way, when the first occurrence condition that can be established according to the internal state of the control means is established, writing is given priority over the case where the second occurrence condition that can be established according to the processing result of the control means is established. If the write process is executed, the priority of the write process is set while avoiding conflict between the write processes of the information on the electronic components. This makes it possible to appropriately manage information.

When the first occurrence condition or the second occurrence condition is satisfied a plurality of times, the next condition is set according to the execution information indicating that the process of writing the information corresponding to the previous condition, such as the writing flag 41AKF1, is being executed. The process of writing the corresponding information may be restricted. If the information writing process is restricted according to such execution information, the process conflict can be easily avoided. This makes it possible to appropriately manage information.

The write process may store the same information in a plurality of storage areas such as the backup storage units 41AKA1 to 41AKA3. By storing the same information in a plurality of storage areas in this manner, the reliability of the information is enhanced. This makes it possible to appropriately manage information.

When a write condition different from the generation condition is satisfied, the control means writes game-related information different from the information on the plurality of electronic components into the storage means, for example, backup processing according to the setting of the backup control table 120T. etc. may be executable. In this way, if it becomes possible to execute the process of writing game-related information corresponding to write conditions different from the generation conditions, various information can be stored and managed. This makes it possible to appropriately manage information.

For example, output means, such as connectors 152 to 155, capable of outputting control signals for a plurality of electronic components and capable of outputting read signals corresponding to information stored in the storage means may be provided. Since such output means can output the control signal and the readout signal, complication of the device configuration and increase in manufacturing cost can be prevented. This enables appropriate management of information.

First output means, such as connectors 152 to 155, capable of outputting control signals for a plurality of electronic components, and connector 156, which, unlike the first output means, can output a read signal corresponding to information stored in the storage means. and a second output means such as. In this manner, if the first output means can output the control signal and the second output means can output the read signal, confusion of the output signals can be prevented. This makes it possible to appropriately manage information.

(Description of Problem Solving Means and Effect of Characteristic Portion 43AK)
A gaming machine capable of playing a game, such as a pachinko gaming machine 1, which is capable of controlling a plurality of electronic components, for example, control means such as a production control microcomputer 120, and power supply to the gaming machine are stopped. storage means, such as backup data memories 210A to 210D, which can hold the stored contents even if the write condition is satisfied, and can store information about a plurality of electronic components. As write processing for writing information to the storage means, for example, write processing by the memory write processing units 43AKM11 and 43AKM12 can be executed. When the same information is stored in a plurality of storage areas such as 43AKA11 to 43AKA13, and the second information corresponding to the second occurrence condition is written, the information is stored in a storage area smaller than the plurality of storage areas, such as the backup storage unit 43AKA21. memorize. In this way, by providing a case where the same information is stored in a plurality of storage areas and a case where information is stored in a smaller number of storage areas than the plurality of storage areas, a variety of electronic components can be obtained according to the information on the plurality of electronic components. memory is made. This makes it possible to appropriately manage information.

When the stored information is determined to be normal in a predetermined number of storage areas among a plurality of storage areas that store the same information as the first information, restoration is performed based on the stored information, such as restoration by power-on information processing. It may be able to perform processing. In this way, since the restoration process is executed when the stored information is determined to be normal in a predetermined number of storage areas, the reliability of the restoration based on the stored information is enhanced. This makes it possible to appropriately manage information.

When it is determined that the stored information corresponding to the second information is abnormal, it may be possible to execute initial processing for setting initial information, such as initial value setting by power-on information processing. Since the initial processing for setting the initial information is executed in this way, problems caused when it is determined to be abnormal can be prevented. This enables appropriate management of information.

The second occurrence condition may be met less frequently than the first occurrence condition, such as a backup condition when power saving is set, for example. In this way, various types of storage are performed by providing the second generation condition that is less frequently satisfied. This enables appropriate management of information.

The second information may be setting information that can be set by the administrator of the gaming machine, such as power saving setting data. By storing the setting information that can be set by the administrator of the gaming machine in this manner, various types of storage are performed. This enables appropriate management of information.

Connection wires connecting the control means and the memory means, such as wires connected to terminals TM03 and TM04 of the connector 154 and terminals TM13 and TM14 of the connector 220, and terminals TM01 and TM02 of the connector 154 and a terminal TM11 of the connector 220, for example. , TM12, or the like, for confirming the connection state between the control means and the storage means. By providing the connection confirmation wiring for confirming the connection state in this way, the certainty of memory is enhanced. This makes it possible to appropriately manage information.

For example, output means, such as connectors 152 to 155, capable of outputting control signals for a plurality of electronic components and capable of outputting read signals corresponding to information stored in the storage means may be provided. Since such output means can output the control signal and the readout signal, the complication of the device configuration and the increase in the manufacturing cost can be prevented. This makes it possible to appropriately manage information.

First output means, such as connectors 152 to 155, capable of outputting control signals for a plurality of electronic components; and a second output means. In this manner, if the first output means can output the control signal and the second output means can output the read signal, confusion of the output signals can be prevented. This enables appropriate management of information.

(Description of Problem Solving Means and Effect of Characteristic Portion 44AK)
A game machine, such as a pachinko game machine 1, capable of playing a game, comprising first control means such as a first control unit 44AK10A capable of controlling first electronic components, and second control unit 44AK10B, etc. , a second control means capable of controlling the second electronic component, and a memory content that can be retained even if the power supply to the game machine is stopped, and that can store information about the first control means and the second control means, for example Storage means such as backup data memories 210A to 210D are provided, and when a write condition is satisfied, a write process of writing information to the storage means can be executed, and the storage means stores information related to the first control means. A first storage means, such as a first backup storage unit 44AK11A, and a second storage means, such as a second backup storage unit 44AK11B, which, unlike the first storage means, can store information about the second control means. including. In this way, unlike the first storage means that can store information about the first control means, the provision of the second storage means that can store information about the second control means makes it possible to store various types of storage according to the control means. is done. This makes it possible to appropriately manage information.

When writing information about the first control means, processing different from writing information about the second control means may be, for example, CPU exception event occurrence processing or VDP error interrupt processing. By executing different processes in this manner, various types of storage are performed in accordance with the control means. This enables appropriate management of information.

The first storage means can store, for example, log information including exception event information of the CPU 131, and information related to the occurrence event corresponding to the first electronic component. It may also be possible to store information relating to events that occur in response to the second electronic component, such as log information including. In this way, by storing the information about the occurrence event corresponding to different electronic components, various types of storage corresponding to the electronic components are performed. This enables appropriate management of information.

The first control means can be installed on, for example, the first effect control board 12A as a board different from the first storage means, and the second control means can be installed on a board different from the second storage means, for example, the second effect It may be installed on the control board 12B or the like. By installing the control means and the storage means on different substrates in this way, the maintenance work becomes easier, and a flexible device configuration becomes possible. This makes it possible to appropriately manage information.

The first storage means can retain stored contents using a backup power supply, for example, when using an SRAM with a battery, and the second storage means can use a backup power supply, for example, when using an FRAM (registered trademark). It may be possible to hold the stored contents without using them, and the second storage means may be capable of storing part of the stored contents in the first storage means. In this way, a part of the contents stored in the first storage means is also stored in the second storage means, so that the certainty of storage is enhanced. This makes it possible to appropriately manage information.

Connection wires connecting the first and second control means and the memory means, such as wires connected to the terminals TM03 and TM04 of the connector 154 and the terminals TM13 and TM14 of the connector 220, and terminals TM01 and TM01 of the connector 154, for example. A connection confirmation wiring, such as a wiring connected to the terminals TM11 and TM12 of the TM02 and the connector 220, for confirming the connection state between the first control means and the second control means and the storage means may be provided. By providing the connection confirmation wiring for confirming the connection state in this way, the certainty of memory is enhanced. This makes it possible to appropriately manage information.

For example, a display means such as the image display device 5 may be provided so that the information stored in the second storage means can be output by displaying the display means, for example, when displaying a maintenance history screen. In this way, by outputting the stored information as a display, it becomes easy to confirm the stored contents. This enables appropriate management of information.

First output means, such as connectors 152 to 155, capable of outputting control signals for the first electronic component and the second electronic component; and second output means capable of outputting a signal. In this manner, if the first output means can output the control signal and the second output means can output the read signal, confusion of the output signals can be prevented. This makes it possible to appropriately manage information.

(Description of Problem Solving Means and Effect of Characteristic Portion 45AK)
A game machine capable of playing a game, such as a pachinko game machine 1, which is capable of controlling electronic components, for example, a control means such as a production control microcomputer 120, and a connector capable of outputting a control signal, for example. Output means such as 152 to 155 are provided, and the output means is capable of outputting a control signal corresponding to at least part of the control information based on the lottery result by the control means. For example, a connector 154 or the like is included as output means and second output means different from the first output means. Thus, various signals are output by providing the second output means different from the first output means capable of outputting the control signal based on the lottery result. This makes it possible to appropriately manage information.

The second output means outputs a control signal through a path different from that of the first output means within the same board as the first output means, for example, when the connector 154 different from the connectors 152, 153, and 155 is installed. It may be possible. In this way, the control signals are output through different paths, so the reliability of various signal outputs is enhanced. This enables appropriate management of information.

The second output means may be capable of outputting a control signal according to the control information of the rendering device, such as when the connector 152 is designated as one of the inspection output units 45AKC1 to 45AKC4. In this way, various signals are output by outputting the control signal according to the control information of the effect device. This enables appropriate management of information.

The second output means may be capable of outputting a control signal of a signaling method different from that of the first output means, such as a communication method according to the output unit setting example 45AK01. In this way, various signals are output by outputting control signals of different signaling systems. This makes it possible to appropriately manage information.

A mounting member such as a connector 156, for example, capable of mounting connection means to which the inspection device of the gaming machine is connected, may be provided, and the mounting member may be soldered when the connection means is not mounted. Such soldering prevents disconnection due to oxidation or corrosion when not mounted. This enables appropriate management of information.

The control means can execute, for example, a backup inspection process as an inspection process for outputting inspection information related to electronic components based on the received information. Different output means may be capable of outputting examination information. In this way, the test information is output by the output means according to the received information, thereby enhancing the flexibility of information output. This makes it possible to appropriately manage information.

The output means may be capable of outputting information relating to electronic components such as effect control error data, and game-related information relating to games such as system data and received command data. By outputting the information about the electronic parts and the game-related information about the game in this way, a variety of information is output. This makes it possible to appropriately manage information.

(Description of Characteristic Portion 95AK)
The content of any one of the above embodiments and the characteristic portions 41AK to 45AK may be changed to the characteristic portion 95AK. The characteristic portion 95AK will be described below.

(Backup memory, backup data, etc.)
In the characteristic portion 95AK, as shown in FIG. 23-1, a 1-1 backup storage portion 95AK001 to a 1-3 backup storage portion 95AK003 and a second backup storage portion 95AK004 are prepared.

The 1-1st backup storage unit 95AK001 is provided in the backup data memory 210A and has a plurality of backup storage areas including backup storage areas 95AK001A, 95AK001B, 95AK001C . . . as log areas.

The first-second backup storage unit 95AK002 is provided in the backup data memory 210B and has a plurality of backup storage areas including backup storage areas 95AK002A, 95AK002B, 95AK002C . . . as log areas.

The first-third backup storage unit 95AK003 is provided in the backup data memory 210C and has a plurality of backup storage areas including backup storage areas 95AK003A, 95AK003B, 95AK003C . . . as log areas.

The second backup storage unit 95AK004 is provided in the backup data memory 210D and has a plurality of backup storage areas including backup storage areas 95AK004A, 95AK004B, 95AK004C . . . as log areas.

In the 1-1 backup storage unit 95AK001 to 1-3 backup storage unit 95AK003 and the 2nd backup storage unit 95AK004, among the plurality of backup data backed up in the above embodiment and the characteristic units 41AK to 45AK At least part of it is stored (backed up) as either manufacturer verification data or store verification data. Note that it is arbitrary to sort the plurality of backup data into either the manufacturer confirmation data or the store confirmation data, and the following is an example.

The manufacturer confirmation data is data confirmed by the manufacturer of the pachinko gaming machine 1, and includes, for example, defect identification data. The failure identification data is data for identifying the failure causing the failure by confirming the behavior of the failed pachinko game machine 1 when the failure occurs. backup data with the CPU exception event occurrence as a backup condition (backup data created and backed up by the CPU exception event occurrence processing; also referred to as CPU exception event occurrence data); and (2) VDP error interrupt request occurrence. There is backup data (backup data created and backed up by the VDP error interrupt process; also called VDP error data) as a backup condition. Furthermore, as data for identifying trouble, (3) system data, (4) received command data, (5) effect output amount data, and (6) effect history, which are created and backed up by the backup process during effect control. data, etc. The manufacturer of the pachinko gaming machine 1 collects the malfunctioning pachinko gaming machine 1 (for example, the pachinko gaming machine 1 whose image is no longer displayed on the image display device 5), and analyzes the log information indicated by the data. , the behavior of the pachinko game machine 1 before failure can be identified, and the identified behavior can be used to search for a defect that causes the failure of the pachinko game machine 1 .

Manufacturer verification data may include other data. For example, the manufacturer confirmation data may include player history data, shop name setting data, and the like. From these data, it is possible to grasp the tendency of the players who have played the game with the pachinko gaming machine 1, the tendency of the players in each region, and the like.

The manufacturer confirmation data is created by a first occurrence event information creation processing unit (not shown) in the same manner as the feature unit 41AK, etc., and is backed up by a first memory writing processing unit (not shown). It is written in the storage section 95AK001 to the 1-3 backup storage section 95AK003. The first event information creation processing unit and the first memory writing processing unit, similar to the event information creation processing unit and memory writing processing unit such as the characteristic unit 41AK, write data from one or both of the external ROM 121 and the internal ROM 132. It is constituted by the CPU 131 of the effect control microcomputer 120 that executes the read program.

When a backup condition for any of the data in the manufacturer confirmation data is established, the first event information creation processing unit creates backup data indicating log information corresponding to the establishment of the backup condition as the manufacturer confirmation data. , and stored in a first backup data buffer provided in a predetermined area of the external RAM 122 or internal RAM 133 (for example, each process in FIGS. 8A and 8B, step S79, etc.). The second memory write processing unit reads out the backup data (manufacturer confirmation data) stored in the first backup data buffer one by one, and transfers them to the backup memory board 14 (like the characteristic portion 41AK, write Transfer or writing of backup data may be restricted by turning on/off the middle flag 41AKF1).

The memory controller 200 of the backup memory board 14 stores the transferred backup data in each of the 1-1 backup storage units 95AK001 to 1-3 backup storage units 95AK003 (same data is stored in each storage unit). Specifically, the memory controller 200 stores (backs up) the same manufacturer confirmation data in each of the backup storage area 95AK001A, the backup storage area 95AK002A, and the backup storage area 95AK003A. , backup storage areas 95AK001C to 95AK003C, . In this way, the manufacturer confirmation data is backed up with a multiplicity of 3.

The log information indicated by the manufacturer confirmation data is not displayed on the pachinko game machine 1 (image display device 5) or the like. For example, the manufacturer confirmation data is read by the manufacturer (outside the store) using a data reading device connected to the connectors 152 to 156 (such as a dedicated reading device equipped with a jig dedicated to the connectors 152 to 156). (Reading may be performed using the inspection designation command of 45AK). As a result, the data for manufacturer confirmation can be read using a connector for other purposes.

The store confirmation data is data indicating log information that can be confirmed by the staff of the store (game hall) where the pachinko game machine 1 is installed (in particular, data displayed on display means such as the image display device 5 by a predetermined operation). On the other hand, since the log information indicated by the manufacturer confirmation data cannot be confirmed by display means or the like, it is more difficult to confirm than the log information indicated by the store confirmation data), for example, the maintenance mode history screen (Fig. 14, FIG. 15) and the setting change/confirmation history screen (FIG. 16). Here, as store confirmation data, based on (1) effect control error data ("switch error", "prize ball error", "magnet error", "unfair prize winning error", etc. described above, (2) Set value change time data (It is preferable to include the set value after change and the change start time or end time data) (“Setting change finished”, “Setting change started ”, data that forms the basis of setting change/confirmation history, etc.), (3) Setting value confirmation time data (It is preferable to include the setting value data at the time of setting value confirmation) (“Setting confirmation finished”, (4) Power saving setting data, (5) Current time change data (Based on "The time has been set", etc.) and (6) power-off time data (data based on "power-off", etc.). The store confirmation data includes error information data (effect control error data), data capable of specifying the operation of the pachinko game machine 1 by the store clerk (setting value change time data, setting value confirmation time data, etc.), should include Note that each time data may be capable of specifying the date and time (same applies below).

As backup data, (1) RAM clearing time data indicating the time of RAM clearing with RAM clearing as a backup condition (data based on "RAM clearing", etc.), (2) Power on with power on as a backup condition. power-on time data (data based on "power-on", etc.) indicating the time of , (3) restrictions on the movement of the role when the role is provided (for example, when the role is activated, Indicate the time (including date and time, the same shall apply hereinafter) and content of the setting change, with setting change such as prohibition of the movement of the relevant character when an object may hit the surrounding equipment of the pachinko game machine 1 as a backup condition. First setting change data, (4) Second setting change data indicating the time and content of the setting change, with a backup condition of setting change such as volume and execution frequency of various effects according to instructions from the management computer of the store, etc., (5) ) Predetermined conditions related to the game such as "probability variation not established" may be used as backup conditions, and at least one of game progress data indicating the establishment of the conditions and the time may be prepared and included in the store confirmation data.

In the feature part 95AK, the store confirmation data does not include the CPU exception event occurrence data and the VDP error data (therefore, it is not displayed on the maintenance mode history screen or the setting change/confirmation history screen. "VDP Error", "CPU Exception Event" in FIG. 15, etc. are not displayed). This is because these data do not need to be confirmed by store employees. On the other hand, specific backup data such as power saving setting data may be included in both the manufacturer confirmation data and the store confirmation data.

The store confirmation data is created by a second occurrence event information creation processing unit (not shown) and written to the second backup storage unit 95AK004 by a second memory writing processing unit (not shown). The second event information creation processing unit and the second memory writing processing unit, similar to the event information creation processing unit and memory writing processing unit such as the characteristic unit 41AK, write data from one or both of the external ROM 121 and the internal ROM 132. It is constituted by the CPU 131 of the effect control microcomputer 120 that executes the read program.

The second occurrence event information creation processing unit creates, as store confirmation data, backup data indicating log information corresponding to the establishment of the backup condition when any of the backup conditions of the store confirmation data is satisfied. , stored in a second backup data buffer provided in a predetermined area of the external RAM 122 or the internal RAM 133 (for example, step S79). The second memory write processing unit reads out the backup data (manufacturer confirmation data) stored in the second backup data buffer one by one, and transfers them to the backup memory board 14 (like the characteristic portion 41AK, write Transfer or writing of backup data may be restricted by turning on/off the middle flag 41AKF1).

The memory controller 200 of the backup memory board 14 stores the transferred backup data in the second backup storage section 95AK004. Specifically, the memory controller 200 stores (backs up) the store confirmation data in the backup storage area 95AK004A, and similarly stores the store confirmation data in the backup storage area 95AK004B, the backup storage area 95AK004C, . Stored one by one (stored sequentially from the top of the backup storage area in FIG. 23-1). In this way, the store confirmation data is backed up with a multiplicity of one.

(Backup processing)
The CPU 131 of the effect control microcomputer 120 may perform backup processing shown in FIG. 23-2 at an appropriate timing. The backup process is executed for each timer interrupt. The backup process is performed, for example, during the backup process during effect control in step S79, after the process of creating backup data based on the satisfaction of the backup condition and storing the backup data in the first or second backup data buffer. It is a process to be executed (a process to be executed even when the backup condition is not satisfied), and is executed by the CPU 131 functioning as the first or second memory write processing unit.

In the backup process shown in FIG. 23-2, CPU 131 (second memory write processing unit) first determines whether or not to back up store confirmation data (step 95AKS001). This determination is made based on whether store confirmation data is stored as backup data in the second backup data buffer (if store confirmation data is stored, it is determined that the store confirmation data is backed up). It can be said that performing the backup means that a backup condition (hereinafter also referred to as a second backup condition) for backing up the store confirmation data (log information) is established.

If the store confirmation data is stored in the second backup data buffer, that is, if the store confirmation data is to be backed up (step 95AKS001: Yes), the CPU 131 (second memory write processing unit) writes the store confirmation data to the second backup storage unit 95AK004 (step 95AKS002). Specifically, the CPU 131 (second memory write processing unit) transfers the shop confirmation data stored in the second backup data buffer to the backup memory board 14 together with a storage instruction to the second backup storage unit 95AK004. (The transferred store confirmation data is deleted from the second backup data buffer). The memory controller 200 of the backup memory board 14 stores (writes) the transferred store confirmation data in the second backup storage unit 95AK004 in accordance with the storage instruction. As a result, the store confirmation data is backed up. In addition, when multiple store confirmation data are stored, all the store confirmation data shall be sequentially transferred in the order of the oldest stored data (the store confirmation data is originally small in data volume, so this method There is no problem if there is one), and one store confirmation data may be transferred in one backup process.

If the store confirmation data is not stored (step 95AKS001; No), or after step 95AKS002, the CPU 131 (first memory write processing unit) determines whether to back up the manufacturer confirmation data (step 95AKS003). This determination is made based on whether or not the data for manufacturer confirmation is stored as backup data in the first backup data buffer (if the data for manufacturer confirmation is stored, it is determined that the data for manufacturer confirmation is to be backed up). ). It can be said that performing the backup means that a backup condition (hereinafter, also referred to as a first backup condition) for backing up the manufacturer confirmation data (log information) is satisfied.

If the manufacturer confirmation data is stored in the first backup data buffer, that is, if the manufacturer confirmation data is to be backed up (step 95AKS003: Yes), the CPU 131 (first memory write processing unit) Determining whether the data for manufacturer confirmation stored in the backup data buffer (the data stored most recently; the same applies to backup processing) stored in the backup data buffer has been written to the 1-1 backup storage unit 95AK001 (step 95AKS004). This determination is made, for example, by the state of the first written flag provided in the external RAM 122 or the internal RAM 133 (flag turned on when the manufacturer confirmation data has been transferred to the 1-1 backup storage unit 95AK001). performed by

If it is determined that the manufacturer confirmation data has not been written to the 1-1 backup storage unit 95AK001 because the first written flag is off (step 95AKS004; No), the CPU 131 (first memory write process section) performs a write process for writing the manufacturer confirmation data to the 1-1 backup storage section 95AK001 (step 95AKS005). Specifically, CPU 131 (first memory write processing unit) instructs the 1-1 backup storage unit 95AK001 to store the manufacturer confirmation data stored in the first backup data buffer, and the backup memory board 14 (Note that the manufacturer confirmation data remains in the first backup data buffer even after the transfer). The transfer is basically performed once, but when the data amount of the manufacturer confirmation data is larger than a predetermined standard, or when divided backup is set for the manufacturer confirmation data, the CPU 131 (First memory write processing unit) divides the data for manufacturer confirmation and transfers part of it to the backup memory board 14 . In this case, information that can specify the transferred data is held in the external RAM 122 or the internal RAM 133, and the CPU 131 (first memory write processing unit) refers to the information in step 95AKS005 that is executed again thereafter. to transfer the rest of the data. In addition, the storage instruction includes information indicating that the manufacturer confirmation data is to be divided and transferred, and the number of times of transfer. When all the manufacturer confirmation data to be written have been transferred, the first written flag is turned on. The memory controller 200 of the backup memory board 14 stores (writes) the transferred manufacturer confirmation data in the 1-1 backup storage unit 95AK003 in accordance with the storage instruction (manufacturer confirmation data is divided into multiple When it is transferred, it is divided into multiple times and stored). As a result, the manufacturer confirmation data is backed up in the 1-1 backup storage section 95AK001.

If it is determined that the manufacturer confirmation data has been written to the 1-1 backup storage unit 95AK001 (step 95AKS004; Yes), the CPU 131 (first memory write The processing unit) determines whether the manufacturer confirmation data stored in the first backup data buffer has been written to the first-second backup storage unit 95AK002 (step 95AKS006). This determination is made, for example, by the state of the second written flag provided in the external RAM 122 or the internal RAM 133 (flag turned on when the manufacturer confirmation data has been transferred to the first-second backup storage unit 95AK002). performed by

If it is determined that the manufacturer confirmation data has not been written to the 1-2 backup storage unit 95AK002 because the second written flag is off (step 95AKS006; No), the CPU 131 (first memory write process section) performs a writing process for writing the manufacturer confirmation data to the 1-2 backup storage section 95AK002 (step 95AKS007). Specifically, CPU 131 (first memory write processing unit) instructs the first-second backup storage unit 95AK002 to store the manufacturer confirmation data stored in the first backup data buffer as well as the backup memory board 14. (Note that the manufacturer confirmation data remains in the first backup data buffer even after the transfer). The transfer is basically performed once, but when divisional transfer is performed in step 95AKS005, the manufacturer confirmation data is dividedly transferred by the same processing as in step 95AKS005. After the transfer of the manufacturer confirmation data to be written is completed, the second written flag is turned on. The memory controller 200 of the backup memory board 14 stores (writes) the transferred manufacturer confirmation data in the 1-2 backup storage unit 95AK002 in accordance with the storage instruction. As a result, the manufacturer confirmation data is backed up in the 1-2 backup storage unit 95AK002.

If it is determined that the manufacturer confirmation data has been written to the first-second backup storage unit 95AK002 (step 95AKS006; Yes), the CPU 131 (first memory write The processing unit) determines whether the manufacturer confirmation data stored in the first backup data buffer has been written to the first-third backup storage unit 95AK003 (step 95AKS008). This determination is made, for example, by the state of the third written flag provided in the external RAM 122 or the internal RAM 133 (flag turned on when the manufacturer confirmation data has been transferred to the first-third backup storage unit 95AK003). performed by

When it is determined that the manufacturer confirmation data has not been written to the first-third backup storage unit 95AK003 because the third written flag is off (step 95AKS008; No), the CPU 131 (first memory write process section) performs a write process for writing the data for manufacturer confirmation to the first-third backup storage section 95AK003 (step 95AKS009). Specifically, the CPU 131 (first memory write processing unit) transfers the manufacturer confirmation data stored in the first backup data buffer to the first-third backup storage unit 95AK003 together with the storage instruction to the backup memory board 14. (Note that the manufacturer confirmation data remains in the first backup data buffer even after the transfer). The transfer is basically performed once, but when divisional transfer is performed in step 95AKS005, the manufacturer confirmation data is dividedly transferred by the same processing as in step 95AKS005. After completing the transfer of the manufacturer confirmation data to be written, the third written flag is turned on. The memory controller 200 of the backup memory board 14 stores (writes) the transferred manufacturer confirmation data in the 1-3 backup storage unit 95AK003 in accordance with the storage instruction. As a result, the manufacturer confirmation data is backed up in the 1-3 backup storage section 95AK003.

If it is determined that the third written flag is on and the manufacturer confirmation data has already been written to the first-third backup storage unit 95AK003 (step 95AKS008; Yes), the manufacturer confirmation data Since the backup to all of the 1-1 backup storage unit 95AK001 to the 1-3 backup storage unit 95AK003 is completed, the CPU 131 (first memory write processing unit) sets the end of the backup (step 95AKS010). The end setting deletes the manufacturer confirmation data (the oldest manufacturer confirmation data stored in the first backup data buffer) from the first backup data buffer, and sets the first written flag to the third written flag. turn off the flag. As a result, it is possible to prevent the manufacturer confirmation data from being processed in the backup process by the next timer interrupt.

After one of steps 95AKS005, 95AKS007, 95AKS009, and 95AKS010, or when the manufacturer confirmation data is not backed up (step 95AKS003: No), the backup process ends.

As described above, in the backup process, the store confirmation data is first backed up, and then the manufacturer confirmation data is backed up. ) is higher than the backup process (transfer or write process) of the manufacturer confirmation data. Also, the backup processing (transfer or write processing) of one store confirmation data is completed by the backup processing of one timer interrupt, but the backup processing (write processing) of one manufacturer confirmation data is completed in the first time. Since backup processing for three timer interrupts of the -1 backup storage unit 95AK001 to the 1-3 backup storage unit 95AK003 is required at a minimum, the processing execution time of the store confirmation data backup processing (writing processing) is It is shorter than the backup processing (writing processing) of the vendor confirmation data.

(power detection circuit 95AK010, etc.)
As shown in FIG. 23-3, a power failure detection circuit 95AK010 that supplies a power failure signal to the effect control microcomputer 120 may be provided. The power failure detection circuit 95AK010 is mounted on the effect control board 12 here, but may be mounted on a board outside the effect control board 12.

A DC voltage (driving voltage for driving the performance control microcomputer 120) is applied to the performance control board 12 from the power supply board. The DC voltage is commonly applied to the effect control microcomputer 120 and the power interruption detection circuit 95AK010. During normal operation, a voltage of 12V is applied to the effect control microcomputer 120 and the power interruption detection circuit 95AK010 as the DC voltage. The power failure detection circuit 95AK010 supplies a power failure signal to the production control microcomputer 120 to stop the operation of the production control microcomputer 120 when the applied DC voltage is 8V or less.

For example, when the power is turned on, the DC voltage from the power supply board may gradually increase and become unstable, but the effect control microcomputer 120 may operate at, for example, 3V. In such a case, when the DC voltage exceeds 3V in an unstable period in which the DC voltage is not stable after the power is turned on, the effect control microcomputer 120 starts operating at this point. Therefore, after the power is turned on, the power failure detection circuit 95AK010 continues to supply a power failure signal to the performance control microcomputer 120 until the DC voltage exceeds 8 V that will be stabilized (when it is 8 V or less). This prevents the control microcomputer 120 from starting to operate (so-called start-up for executing initialization processing and the like in step S21 of FIG. 7).

FIG. 23-4 shows the state when the pachinko game machine 1 (main board 11 and effect control board 12) having such a power interruption detection circuit 95AK010 is reset (reset with power off and on). The power failure signal is an active Low signal (the signal becomes Low (ON) when the DC voltage is 8 V or less, and becomes High (OFF) when the DC voltage exceeds 8 V). The power interruption signal may be set to active High.

When the reset is performed at the timing of (a) in FIG. 23-4, the DC voltage supplied from the power supply board to the production control board 12 (production control microcomputer 120) drops and reaches 8V (b) A power failure signal is started to be supplied from the power failure detection circuit 95AK010 at the timing. Note that, assuming that the backup condition is satisfied by this supply start, the first event information creation processing unit (CPU 131) generates backup data ( hereinafter also referred to as power failure signal reception start data) is created as manufacturer confirmation data, stored in the first backup data buffer, and transferred to the backup memory board 14 by the first memory write processing unit (CPU 131) for backup ( The power failure signal reception start data may be backed up as store confirmation data or other data). The effect control microcomputer 120 to which the power interruption signal is supplied stops the operation, and then the power is turned off when the DC voltage becomes equal to or less than a predetermined voltage (the voltage at which the effect control microcomputer 120 cannot operate). In other words, the effect control microcomputer 120 becomes non-operable from the timing of (a). Along with the reset operation, the drive voltage supplied from the power supply board to the main board 11 also drops, and the main board 11 is also powered off (non-operating) at a predetermined timing.

After that, at the timing of (c), the power supply from the power supply board is restored, and the DC voltage supplied from the power supply board to the effect control board 12 gradually increases, but the DC voltage exceeds 8V (d) A power-off signal is supplied until the timing. After the timing of (D) when the DC voltage exceeds 8V and the power interruption signal is turned off, the effect control microcomputer 120 starts operating. Furthermore, at the timing of (d), it is assumed that the backup condition is met by the end of reception of the power interruption signal, and the first occurrence event information creation processing unit (CPU 131) generates log information indicating the end of reception of the power interruption signal ( (including date and time information) (hereinafter also referred to as power failure signal reception end data) is created as data for manufacturer confirmation, stored in the first backup data buffer, and is processed by the first memory write processing unit (CPU 131). It is transferred to the backup memory board 14 and backed up. Along with the restoration of the power supply from the power supply board, the main board 11 also starts operating at a predetermined timing, and the effect control command (RAM clear notification command, setting change start command, etc.) at the time of power-on is the timing (E). is supplied to the effect control board 12 at .

23-5 shows a state in which the main board 11 is not cut off (power off) or the like, and the production control microcomputer 120 (production control board 12) is reset. The effect control microcomputer 120 restarts (resets) itself when there is a difference in operation, such as communication between the CPU 131 and the VDP 130 or communication between the CPU 131 and the effect data memory board or the like being out of order. Also, the effect control microcomputer 120 may be reset due to noise on the reset terminal, accelerator error, or program error. In such a case, even if the effect control microcomputer 120 changes from operation → non-operation → operation, the DC voltage from the power supply board does not change at 12 V, the main board 11 also continues to operate, and the power interruption signal is turned off. remains (remains non-receiving).

When the entire pachinko game machine 1 in FIG. 23-4 is reset (similarly when the power of the pachinko game machine 1 is turned on) and when only the effect control microcomputer 120 in FIG. 23-5 is reset , The former receives a power interruption signal, but the latter differs in that it does not receive a power interruption signal. That is, depending on the presence or absence of backup of the power interruption signal reception start data and the power interruption signal reception end data, the mode of power-on of the production control microcomputer 120 (normal power-on of the entire pachinko game machine 1 or power-on by reset or whether it is a reset of only the effect control microcomputer 120).

(Processing after turning on the power of the production control microcomputer 120)
In response to (or after resetting) that the power supply of the effect control microcomputer 120 in the pachinko game machine 1 equipped with the power interruption detection circuit 95AK010 is turned on (that the DC voltage that allows the CPU 131 to operate is applied), the CPU 131 , the process shown in FIG. 23-6 may be executed.

In the process of FIG. 23-6, the CPU 131 first monitors the power interruption signal and determines whether or not the change of the power interruption signal from ON to OFF is detected (step 95AKS101). If detected (step 95AKS101; Yes), the process of backing up the power interruption signal reception end data is performed as described above (step 95AKS102).

If the change is not detected (step 95AKS101; Yes), after step 95AKS102, it is determined whether a power failure signal is being received (step 95AKS103). Return to step 95AK101. Therefore, as long as the power interruption signal is received, subsequent processing is not performed, and the effect control microcomputer 120 does not start up.

If the power interruption signal is not being received (step 95AKS103; No), the CPU 131 determines whether there is a backup of the power interruption signal reception end data and the power interruption signal reception start data (step 95AKS104). 95AKS 104; Yes) indicates whether the pachinko gaming machine 1 as a whole has been reset (reset with power off and on) or power has been turned on (normal power on). Waiting for reception of the effect control command (step 95AKS105), when the effect control command is received, backup data indicating log information at the time of power-on (for example, RAM clear time data at the time of RAM clear notification command reception, setting change start command reception set value change time data, set value confirmation time data at the time of receiving the setting confirmation start command, power-on time data, etc.) are backed up in the second backup storage unit 95AK004 as store confirmation data (step 95AKS106).

After that, the received command data indicating the log information including the effect control command at the time of power-on from the main board 11 is backed up in each of the 1-1 backup storage unit 95AK001 to the 1-3 backup storage unit 95AK003 as data for manufacturer confirmation. (step 95AKS107). After that, the initialization processing (step S21) according to the effect control command from the main substrate 11 is performed (when the power failure recovery designation command is received, the power failure recovery processing is performed, etc.).

If there is no backup of the power interruption signal reception end data and the power interruption signal reception start data (step 95AKS104; No), only the effect control board 12 side (game control microcomputer 120) is reset, so the CPU 131 , an initial screen (for example, an image notifying that only the effect control board 12 side is reset) is displayed on the image display device 5 via the VDP 140 (step 95 AKS 111), and the effect control board 12 side (for game control Backup data showing log information (including date and time information) indicating that only the microcomputer 120) has been reset is backed up in each of the 1-1 backup storage unit 95AK001 to the 1-3 backup storage unit 95AK003 as manufacturer confirmation data. (step 95AKS112). After that, initialization processing (step S21) is performed in response to the fact that the performance control command at the time of power-on is not supplied from the main board 11 (for example, performance execution is resumed based on the performance control command received thereafter).

In step 95AKS105, when the CPU 131 receives a command other than the effect control command at the time of power-on, or when the effect control command cannot be received for a predetermined period after waiting for reception, the effect control board 12 Only the DC voltage of is lowered and reset, and the main board 11 itself determines that the power supply is secured and the power supply is not cut off (even in this case, the power cutoff signal is supplied), and the manufacturer confirms that The data may be backed up in each of the 1-1 backup storage unit 95AK001 to the 1-3 backup storage unit 95AK003 (not backed up as store confirmation data). Also, the processing of step 95AKS111 is executed. Thereafter, initialization processing (step S21) is performed in response to the fact that the effect control command at power-on is not supplied from the main board 11 (for example, if a command other than the effect control command at power-on is received, the command, and if the performance control command cannot be received for a predetermined period after waiting for reception, the performance execution is resumed based on the performance control command received thereafter).

By the above-described processing, the effect control microcomputer 120 determines whether the effect control microcomputer 120 is in a power-on mode (normal power-on of the entire pachinko game machine 1 (including power-on with reset) , the main board 11 is power-on by resetting only the performance control microcomputer 120 that is not powered off). Both store confirmation data and manufacturer confirmation data can be backed up, and only the manufacturer confirmation data can be backed up when only the performance control microcomputer 120 is reset. Furthermore, in the case of a normal power-on of the entire pachinko game machine 1, as in steps 95AKS106 and 95AKS107, the store confirmation data is backed up before the manufacturer confirmation data, so the backup priority of the store confirmation data is (Priority) is higher than the backup of manufacturer confirmation data.

(Effect of Characteristic Portion 95AK)
Conventionally, the backup data was backed up without distinguishing between the manufacturer confirmation data and the store confirmation data, so the store confirmation data was stored in the same process as the manufacturer confirmation data (for example, Some of the store confirmation data are stored in each of the 1-1 backup storage units 95AK001 to 1-3 backup storage units 95AK003 in the same manner as the manufacturer confirmation data). However, the processing time for backing up the manufacturer confirmation data may be long as described above. The possibility that the timing of disconnection (timing of power failure) overlaps with the backup period is higher than when the processing time for backing up the store confirmation data is shortened. Also, if the processing time for backing up is long, the occurrence timing of events such as only the effect control microcomputer 120 being reset tends to overlap. If the power of the pachinko game machine 1 is turned off during the backup, or if only the performance control microcomputer 120 is reset, the store confirmation data will not be backed up properly, and the store confirmation data will indicate, for example, In some cases, log information could not be displayed on the maintenance history screen, etc. In such a case, the person in charge may have a sense of distrust because the log information that should be displayed in the maintenance history scene is not displayed. For example, when the attendant repeatedly turns on and off the power of the pachinko gaming machine 1 (for example, such an operation may be performed when the behavior of the pachinko gaming machine 1 is strange), conventionally, the power is turned on Sometimes the power is turned off while backing up the time data. date and time) may not be displayed on the maintenance history screen. In such a case, the attendant or the like has a sense of suspicion as to whether the pachinko gaming machine 1 is operating normally. In the characteristic portion 95AK, the time required for backing up the store confirmation data (transfer and writing time) is set shorter than that for the manufacturer confirmation data, so that the above-mentioned inconveniences are less likely to occur. Furthermore, the backup of store confirmation data has a higher priority than the backup of manufacturer confirmation data, and is performed preferentially. Even if data backup conflicts, the completion of the backup of the store confirmation data is not delayed). On the other hand, since the data for manufacturer confirmation is to be confirmed by the manufacturer (it cannot be confirmed by staff, etc., and it is more difficult to confirm than the data for store confirmation), it may be slightly damaged if the power is turned off during backup. The above problem does not occur even if the data is missing. In this way, by shortening the time required for backing up store verification data compared to backing up manufacturer verification data, the order of priority for backing up store verification data is set higher than the priority order for manufacturer verification data. By increasing the height (backup processing in FIG. 23-2, steps 95AKS106 and 95AKS107 in FIG. 23-6), store confirmation data and manufacturer confirmation data can be backed up according to the purpose of use, and backup can be performed favorably. In addition, the store confirmation data and the manufacturer confirmation data are backed up differently (the execution time, the number of times of writing, and the number of backup storage units are different), and the store confirmation data is better than the manufacturer confirmation data. Also, it is easy to check the log information indicated by each data (here, the former can be checked on the pachinko game machine 1, but the latter cannot be checked), so it is possible to make the use of each data appropriate. (Data that does not need to be confirmed at the store can be used as data for manufacturer confirmation, and data that is confirmed by a staff member at the store can be used as data for store confirmation), realizing a suitable backup.

In particular, when the 1-1 backup storage unit 95AK001 to 1-3 backup storage unit 95AK003 and the 2nd backup storage unit 95AK004 are configured by one FRAM (registered trademark), data is stored in each of the storage units 95AK001 to 95AK003. It takes time to do this (because the data is serially stored in the order of the 1-1 backup storage unit 95AK001→1-2 backup storage unit 95AK002→1-3 backup storage unit 95AK003). On the other hand, in the above, the store confirmation data is stored in fewer backup storage units than the manufacturer confirmation data (here, one, but it may be two), so there is no need to back up the store confirmation data. The time has been shortened. As a result, backup can be performed favorably.

In addition, it is preferable that the data amount of the store confirmation data is smaller than the data amount of the manufacturer confirmation data (the amount of data written to the backup storage unit at one time may be reduced), so that the store confirmation can be performed more efficiently. The time required for data backup can be shortened, and backup can be performed favorably.

23-6, the effect control microcomputer 120 determines the mode of power-on of the effect control microcomputer 120 (either the pachinko game machine 1 is normally powered on, or the effect control microcomputer 120 is reset (whether the main board 11 or the like is powered off)), and when the power of the entire pachinko game machine 1 is turned on, store confirmation data and manufacturer confirmation data , and in the case of resetting only the performance control microcomputer 120, only the manufacturer confirmation data can be backed up. As a result, when only the effect control microcomputer 120 is reset, it is possible to prevent the reset from being displayed on the maintenance history screen by backing up the log information of the reset as data for shop confirmation. Normally, the reset of only the effect control microcomputer 120 is not directly related to the progress of the game and is often minor. By preventing this from being done, backup can be preferably performed.

(Modification)
Various modifications of the above configuration are possible. Modifications are exemplified below, and at least some of the following modifications may be combined.

(Modification 1)
The CPU 131 of the effect control microcomputer 120 may perform, for example, the power interruption date and time recording process of FIG. 23-7. This process may be executed instead of or in addition to the date/time information storage process in step S78 (for example, after the date/time information storage process).

In this process, the CPU 131 first sets a temporary storage enable flag (provided in the external RAM 122 or internal RAM 133; the same applies to the flag and timer) indicating that the temporary storage of date and time information from the timer circuit 135 (RTC) is permitted. It is checked whether it is (ON) (step 012IWS841). If the temporary storage enabled flag is set, the CPU 131 checks whether the temporary storage timer for measuring the time for temporarily storing the date and time information from the timer circuit 135 (RTC) has timed out (step 012 IWS842). ). If the temporary storage timer has timed out, CPU 131 reads date and time information from timer circuit 135 (RTC) and stores the read date and time information in a temporary area provided in external RAM 122 or internal RAM 133 (step 012 IWS843). Also, the CPU 131 sets a value corresponding to 100 ms in the temporary storage timer (step 012IWS844).

Note that the date and time information is stored in the temporary area of the external RAM 122 or the internal RAM 133 every 100 ms. shall be overwritten and stored in the temporary area.

If the temporary storage enabled flag is not set (N in step 012 IWS841), the CPU 131 determines whether it has received an initialization command (RAM clear notification command in the above case) or a recovery command (power failure recovery command in the above case). (Step 012IWS845). If the initialization designation command or the recovery command is received, the CPU 131 checks whether the log information of the previous power-on date and time is stored in the log area provided in the backup data memories 210A to 210D of the backup memory board 14. Confirm whether or not (step 012IWS846). If the log information of the previous power-on date and time is not stored (N of step 012IWS846), the process proceeds to step 012IWS849. If the log information of the previous power-on date and time is stored (Y in step 012IWS846), the CPU 131 reads the date and time information stored in the temporary area of the external RAM 122 or the internal RAM 133, and uses the read date and time information as the power failure date and time. Log information (manufacturer confirmation data and/or store confirmation data) in the log area (manufacturer confirmation data and/or store confirmation data storage area) provided in the backup data memories 210A to 210D of the backup memory board 14 as is stored (step 012IWS847). Then, the process proceeds to step 012 IWS849.

If neither the initialization designation command nor the recovery command has been received (N in step 012 IWS845), the CPU 131 receives other commands (however, such as the setting confirmation start command and the setting change start command, which are sent when the power is turned on). command) is received (step 012 IWS 848). If any other command is received, for example, if a variation pattern designation command or a display result designation command is received, the process proceeds to step 012 IWS849.

At step 012IWS849, the CPU 131 sets a temporary storage enabled flag (step 012IWS849). Also, the CPU 131 sets a value corresponding to 100 ms in the temporary storage timer (step 012IWS844).

It should be noted that once the temporary storage enabled flag is set at step 012IWS849, it is maintained until the power supply to the gaming machine is stopped or the system reset of the CPU 131 occurs. And, it shall be reset by the initialization process when the effect control main process is started due to the occurrence of power-on to the gaming machine, system reset, or the like.

FIG. 23-8 is an explanatory diagram for explaining the recording timing of the log information of the date and time of power failure. As shown in FIG. 23-8, when the CPU 131 is being activated, the CPU 131 makes a determination of Y in step 012IWS841 of the power failure date and time recording process, and executes the processes of steps 012IWS842 to S844, thereby allowing the CPU 131 to wait 100 ms. The date and time information is temporarily stored in a temporary area of the external RAM 122 or the internal RAM 133 each time.

Next, when the power supply to the game machine is stopped or the CPU 131 system is reset, the initialization process is executed and the temporary storage enable flag is reset. At step 012 IWS841 of the recording process, the determination is N, the temporary storage of the date and time information every 100 ms is not executed, and the last stored date and time information is maintained in the temporary area of the external RAM 122 or internal RAM 133 .

If the power supply to the game machine is stopped and then the power supply to the game machine is started, at least the initialization designation command or the recovery command should be received. Therefore, in this example, as shown in Fig. 23-8 (1), on the condition that an initialization command or a recovery command is received, the date and time information maintained in the temporary area is read, and the read date and time The log information is stored in the log area with the power failure date and time as the information (Y in step 012IWS845, see step 012IWS847). After that, the temporary storage enable flag is set, and the temporary storage of date and time information every 100 ms is resumed (see steps 012IWS849 and S850). However, in this example, the log information of the power-on date and time is also recorded (see step 012 IWS 203). Since there is a possibility that some kind of abnormality has occurred, in this case, the log information of the date and time of the power failure is not recorded (see step 012 IWS846 N).

On the other hand, if a system reset of the CPU 131 or the like occurs, the power supply to the game machine itself is not interrupted, and a power-on command such as an initialization designation command or a recovery command from the game control microcomputer 100 is issued. is not sent. Therefore, in this example, as shown in FIG. 23-8 (2), if the command for specifying initialization or the command for restoration is not received, it is determined that the power failure of the gaming machine itself has not occurred. Then, the date and time information maintained in the temporary area is controlled so as not to record the log information as the power failure date and time. In this case, as shown in FIG. 23-8 (2), based on the reception of other commands (excluding commands transmitted when the power is turned on, such as a setting confirmation start command and a setting change start command), For example, when a variation pattern designation command or a display result designation command is received, a temporary storage enable flag is set, and the temporary storage of date and time information every 100ms is resumed (see steps 012IWS849 and S850).

If the configuration is such that the log information of the date and time of the power failure is recorded only based on the detection of the stoppage of the CPU 131, when the system reset of the CPU 131 occurs (the system reset of the CPU 131 temporarily causes the CPU 131 to The log information of the date and time of the power outage is also recorded in the same state as when the power supply is stopped), and the log information of the date and time of the power outage is recorded even though the power outage of the gaming machine itself did not occur. It may be recorded. Therefore, in this example, as shown in FIG. 23-8, the date and time when the CPU 131 is stopped is temporarily stored as a temporary power failure date and time, and a power-on command such as an initialization command or a recovery command is used. is officially recorded on the condition that a

In this example, it is determined that a power failure has occurred in the game machine itself, and the date and time of the power failure is recorded in the log information on the condition that an initialization command or a command for restoration has been received. However, it is not limited to such an aspect. For example, the date and time of the power failure may be recorded in the log information based on the reception of other commands transmitted when the power is turned on, such as a setting confirmation start command and a setting change start command.

Also, in this example, the log information is not recorded when the system reset of the CPU 131 or the like occurs instead of the power failure of the gaming machine itself, but the present invention is not limited to such a mode. For example, an area for recording log information for game machine manufacturers (storage unit for manufacturer confirmation data) is provided separately from an area for recording log information for amusement arcades (storage unit for store confirmation data). Alternatively, the date and time of occurrence of a system reset of the CPU 131, etc., may be recorded as log information in the area for the game machine maker.With such a configuration, the log information may be used as information for development by the game machine maker. can be used.

A gaming machine having the above configuration as an example is exemplified below.
Predetermined control means (for example, the main board 11 and the game control microcomputer 100 for controlling the progress of the game),
A specific control means (for example, CPU 131) that performs control based on information from a predetermined control means,
The specific control means can temporarily store the date and time when the power supply to the specific control means is stopped (for example, the CPU 131 executes steps 012IWS842 to S844 to store data in the temporary area of the external RAM 122 or internal RAM 133 every 100ms. store date and time information),
When the power supply to the specific control means is started, the information output by the predetermined control means that can specify that the power supply has started (for example, an initialization designation command (RAM clear notification command) or at the time of recovery A power failure date and time storage means (for example, a part that executes step 012IWS847 in the CPU 131) that can store the temporarily stored date and time as the power failure date and time based on the input of a command (power failure recovery designation command)
A gaming machine characterized by:
According to such a configuration, it is possible to preferably store the power failure date and time.

The power failure date and time storage means does not store the temporarily stored date and time as the power failure date and time if it is not possible to input information that can specify that the power supply has started when power supply to the specific control means is started ( For example, the CPU 131 does not proceed to step 012IWS847 when N in step 012IWS845, and does not store the log information in the log area as the date and time of the power failure when it does not receive the initialization designation command or the recovery command. may be configured to According to such a configuration, it is possible to preferably store the power failure date and time.

It may be configured such that the date and time can be temporarily stored (for example, the date and time information is stored in a temporary area of the external RAM 122 or the internal RAM 133) every predetermined timing (for example, 100 ms). According to such a configuration, it is possible to preferably store the power failure date and time.

Based on the fact that the power supply to the specific control means is stopped, the temporary storage of the date and time is stopped at each predetermined timing (for example, the CPU 131 resets the temporary storage enable flag in the initialization process, thereby resetting the date and time information every 100 ms temporary storage is not executed), based on the input of predetermined information (for example, initialization designation command, recovery command, other command) output by the predetermined control means, at each predetermined timing Even if it is configured to restart the temporary storage of date and time (for example, by executing step 012IWS849, the CPU 131 sets the temporary storage enable flag and restarts the temporary storage of date and time information every 100 ms). good. According to such a configuration, it is possible to preferably store the power failure date and time.

The specific control means can store the date and time when power supply to the specific control means was started (for example, the CPU 131 records the power-on date and time as log information), and the power failure date and time storage means can store the date and time when the power supply was started. If the date and time is not stored, the temporarily stored date and time is not stored as the date and time of the power failure (for example, the CPU 131 does not proceed to step 012IWS847 when the result of step 012IWS846 is N, so that the power is turned on before the power failure occurs. If the log information of the date and time is not recorded, the log information of the power failure date and time is not recorded). According to such a configuration, it is possible to prevent an abnormal storage state.

A gaming machine that can be set to one of a plurality of set values (for example, set value "1" to set value "3") with different advantages for a player, and information generated during the game and history display means (for example, CPU 131 for displaying the screens of FIGS. 14 to 16) capable of identifiably displaying history information (for example, log information) of abnormalities related to games. And, initialization processing for initializing the storage contents of the storage area (eg, RAM clear) can be executed initialization processing execution means (eg, game control microcomputer 100 (specifically, CPU103)) and , When the initialization process is executed, setting change processing execution means (for example, game control microcomputer 100 (specifically is provided with the CPU 103)), and the history display means can display in a identifiable manner that the initialization process has been executed when the initialization process has been executed and the setting change process has not been executed (for example, , RAM clear log information is displayed as shown in FIG. 15), and when initialization processing and setting change processing are executed, setting It is possible to display that the change process has been executed in a identifiable manner (for example, as shown in FIG. 14, only log information indicating the end of setting change ("Setting change is finished") is displayed). may be configured. According to such a configuration, since unnecessary information is not displayed, it is possible to prevent history information from becoming difficult to check.

(Modification 2)
The effect control microcomputer 120 checks the validity of the storage contents (backup data) of each of the 1-1 backup storage unit 95AK001 to the 1-3 backup storage unit 95AK003 at an appropriate timing such as when the power is turned on, parity, checksum Alternatively, in the case of verification by arbitrary error detection processing using hash values, etc., the 1-1 backup storage unit 95AK001 (backup storage area 95AK001A) → 1-2 backup storage unit 95AK002 (backup storage area 95AK002A) → 1-3 backup storage unit 95AK003 (backup storage area 95AK003A) → 1-1 backup storage unit 95AK001 (backup storage area 95AK001B) → 1-2 backup storage unit 95AK002 (backup storage area 95AK002B) → 1-3 When the backup data is sequentially stored in the backup storage unit 95AK003 (backup storage area 95AK003B), if the latest backup data verification result is NG, new backup data is added to the NG backup data. may be overwritten, and then other backup storage units may be stored. For example, when backup data is stored in the backup storage areas 95AK001A to 95AK003A and no backup data is stored in the backup storage area 95AK001B and beyond, the backup data stored in the backup storage area 95AK003A is NG and the others are OK. In this case, new backup data may be stored from the backup storage area 95AK003A. In this case, the same data as the NG backup data (data considered to be OK) should be stored again in the backup storage area 95AK003A as new backup data. , the backup storage area 95AK003A to the backup storage area 95AK002B may store the same three backup data (hereafter, the three same backup data are stored in the 1-3 backup storage section 95AK003 → the 1-1 backup storage section 95AK003). 95AK001→1-2 backup storage unit 95AK002). Here, if new backup data is stored again (overwritten) from the backup storage area 95AK001A, there is a risk that NG backup data will overwrite OK backup data. It is possible to prevent such a risk.

(Modification 3)
Production control microcomputer 120 executes the process of backing up the manufacturer confirmation data (transfer to backup memory board 14, etc.). It may be written to a storage unit that can be backed up, and in that case, the writing process (the same applies to the manufacturer confirmation data), and the second backup process is a process of backing up the store confirmation data. The process itself other than the data to be backed up may be different, and the process itself includes the execution time, the area for storing the backup data, the priority of the process (priority of process execution), and the number of backups. At least one of the amount of data to be written and the amount of data to be written may be different.

(Modification 4)
The effect control microcomputer 120 may transfer the store confirmation data and/or the manufacturer confirmation data to the backup memory board 14 without passing through the first backup data buffer or the first backup data buffer. In addition, the 1-1 backup storage unit 95AK001 to the fourth backup storage unit 95AK004 are provided in the production control board 12, and the production control microcomputer 120 stores store confirmation data and/or manufacturer confirmation data in the first backup data buffer. Alternatively, data may be written to the 1-1 backup storage unit 95AK001 to the 4th backup storage unit 95AK004 with or without the first backup data buffer.

(Configuration of Characteristic Portion 95AK)
Hereinafter, a gaming machine will be described with the characteristic portion 95AK as an example.

A gaming machine capable of playing games (for example, pachinko gaming machine 1, etc.),
Control means (for example, production control microcomputer 120, etc.),
Storage means capable of storing backup data (for example, backup memory board 14 (particularly, 1-1 backup storage unit 95AK001 to second backup storage unit 95AK004), etc.),
The control means is
A first backup process (for example, transferring the manufacturer confirmation data to the backup memory board 14) for storing the first backup data (for example, the manufacturer confirmation data) in the storage means based on the establishment of the first backup condition. processing of transfers, etc.), and
A second backup process (for example, a backup memory) having a shorter execution time than the first backup process for storing second backup data (for example, store confirmation data) in the storage means based on the establishment of the second backup condition. transfer of store confirmation data to the circuit board 14, etc.) is given a different priority from the first backup process (priority of process execution, and when the first backup process and the second backup process conflict, which one is selected)? (including the order of whether to execute first) (for example, the backup of store confirmation data is performed in a shorter execution time than the backup of manufacturer confirmation data, and the priority of processing is high, etc.),
game machine.

In the above, the effect control microcomputer 120 of the effect control board 12 that executes effects based on commands from the main board 11 that controls the progress of the game operates as the control means. In addition to the performance control board 12, the present invention is applied to a game machine having a second performance control board that executes a performance in cooperation with the performance control board 12 by a command from the performance control board, and the second performance control is performed. The control means may be applied to a computer, CPU, or the like mounted on a board.

The control means and storage means may be provided on the same substrate. In such a case, the first backup process and the second backup process may be processes for directly writing backup data to the storage means. Of the storage means, the portion that stores the first backup data and the portion that stores the second backup data may be parts of the same storage device such as FRAM (registered trademark), or may be two different storage devices. It may be formed from each of the storage devices. A set of the effect control microcomputer 120 and the backup memory board 14 is regarded as a control means, and the first backup processing and the second backup processing are performed by the 1-1 backup storage unit 95AK001 to the 1-3 backup storage unit 95AK003 or the second It may be regarded as a process of transferring and writing backup data to the backup storage unit 95AK004 (even in such a case, the execution time of the second backup process is shorter in the characteristic part 95AK).

The first backup condition and the second backup condition may be the same condition or different conditions. The backup condition may be, for example, a condition that triggers creation of backup data (occurrence of an event desired to be recorded by log information, etc.). Backup data may be created (recorded in RAM or the like) when the backup condition is satisfied, and the created backup data may be stored in the storage means at the timing when a power failure may occur (" Expressions such as "store the first backup data in the storage means based on the establishment of the first backup condition" include such aspects). The first backup data and the second backup data may be the same data (but preferably different data). The first backup data may be, for example, at least one backup data to be the manufacturer confirmation data. The second backup data may be at least one backup data that becomes the store confirmation data.

The execution time of the first backup process and the execution time of the second backup process may be only the period during which the backup data is actually transferred or written, or the backup data may be transferred in multiple times, such as for each timer interrupt. Alternatively, when writing, the period may include the time between each time. Also, the execution time may be a period from the satisfaction of the backup condition to the end of the backup (it may be considered that the backup process is performed during the entire period from the satisfaction of the backup condition to the end of the backup).

Methods for making the execution time of the second backup process shorter than the execution time of the first backup process include (1) making the data amount of the second backup data smaller than the data amount of the first backup data, and (2) The number of storage destinations for the second backup data is made smaller than the number of storage destinations for the first backup data; It can be realized by

It is arbitrary which of the first backup process and the second backup process has a higher priority (for example, steps 95AKS003 to 95AKS010 may be followed by steps 95AKS001 to 95AKS002).

According to the above configuration, by making the execution time of the second backup process shorter than the execution time of the first backup process, during the second backup process power failure, etc. (game machine power off, voltage drop, etc.) power off of only the control means or resetting of the entire game machine) (the possibility that the second backup process and power failure etc. overlap in time) is lower than that of the first backup process. (For example, the possibility that the transfer of backup data to the backup memory board 14 and the powering off of only the control means overlap, and the possibility that the writing of the backup data overlaps with the powering off of the gaming machine is reduced). In other words, the possibility of failure of the second backup process due to power failure or the like occurring in the middle is lower than that of the first backup process. Also, since the first backup process and the second backup process are executed with different priorities, both processes are not executed simultaneously. Therefore, when the first backup process and the second backup process are executed at the same time, it is possible to prevent the inconvenience that the execution time of the second backup process is extended due to the execution of the first backup process. The possibility of power failure etc. occurring in As described above, at least the second backup data can be backed up with a lower possibility of failure (compared to the first backup data), and a suitable backup is realized.

It should be noted that the execution priority of the second backup process should be higher than that of the first backup process. As a result, after the second backup condition is met, the second backup process can be executed earlier than the first backup process, and the possibility of power failure or the like occurring after the second backup condition is met until the second backup process is completed can be reduced. backup is realized.

Instead of or in addition to the configuration of the control means, the control means
A first backup process (for example, transferring the manufacturer confirmation data to the backup memory board 14) for storing the first backup data (for example, the manufacturer confirmation data) in the storage means based on the establishment of the first backup condition. processing of transfers, etc.), and
Different from the first backup process of storing second backup data (e.g. store confirmation data, etc.) in the storage means based on the establishment of the second backup condition different numbers of copies, different processing priorities, different amount of backup data written, etc.), second backup processing (for example, processing for transferring store confirmation data to the backup memory board 14, etc.) can be executed. ,
The information indicated by the second backup data stored in the storage means is easier to confirm than the information indicated by the first backup data stored in the storage means (for example, the log indicated by the store confirmation data). The information can be confirmed on the image display device 5, but the log information indicated by the manufacturer confirmation data can only be read by the manufacturer's reading device, etc.),
You may do so.

The ease of "confirmation" is, for example, the amount of time and effort required to check the information indicated by each backup data (the less time and effort, the easier the confirmation). The log information indicated by the data for manufacturer can be confirmed by the image display device 5, but the log information indicated by the data for manufacturer confirmation can be read only by the reading device of the manufacturer, and the log information can be confirmed only through the reading device. In this case, the log information indicated by the store confirmation data is easier to confirm because it does not take time to read. For example, the second backup data is stored so that the information indicated by the second backup data can be displayed (confirmed on the gaming machine) by display means or the like based on the operation of the gaming machine by the attendant or the like. 1 backup data, the information indicated by the first backup data can only be confirmed by reading the first backup data from the game machine (that is, only with a device other than the game machine) (cannot be confirmed by operating the game machine) ) (the above is also an example), and in this case also, the information indicated by the second backup data is easier to check because it does not take time to read. Alternatively, the manufacturer verification data may be encrypted and stored, and the store verification data may be stored without encryption. is easy to confirm.

The first backup process and the second backup process are different in process itself other than the first backup data and the second backup data to be stored in the storage means.
You may do so.

The first backup process and the second backup process each include, as processes themselves, an execution time, an area for storing the first backup data and the second backup data, and a process priority (process execution priority). , and at least one of the write amount of backup data at one time is different,
You may do so.

According to each of the above configurations, the first backup process and the second backup process are differentiated, and the handling of the first backup data and the second backup data after backup (the easiness of confirmation of the information indicated by each data) is differentiated. Therefore, backup processing can be preferably executed.

Information indicated by the first backup data stored in the storage means is not notified on the gaming machine (for example, log information indicated by manufacturer confirmation data is not displayed on the pachinko gaming machine 1),
The information indicated by the second backup data stored by the storage means can be notified on the gaming machine (for example, the log information indicated by the store confirmation data is displayed on the pachinko gaming machine 1),
You may do so.

According to the above configuration, backup processing can be preferably executed. The notification may be notification by voice or the like. Further, when the execution time of the second backup process is shorter than that of the first backup process, with the above configuration, the second backup data indicating information that can be notified can be backed up with a low probability of failure. It is possible to prevent the inconvenience that the information indicated by the 2 backup data is not reported due to failure of the backup process even though it should be reported, and the backup process can be preferably executed.

Based on the second backup data stored in the storage means, information indicated by the second backup data (for example, log information indicated by the store confirmation data) can be displayed on the display means (for example, the image display device 5, etc.) Display control means (for example, production control microcomputer 120 etc.)
The information indicated by the first backup data stored in the storage means (for example, the log information indicated by the manufacturer confirmation data) is not displayed on the gaming machine (for example, the log information indicated by the manufacturer confirmation data is not displayed on pachinko machine 1, etc.),
You may do so.

According to the above configuration, backup processing can be preferably executed. Further, when the execution time of the second backup process is shorter than that of the first backup process, with the above configuration, the second backup data indicating information that can be displayed can be backed up with a low probability of failure. It is possible to prevent the inconvenience that the information indicated by the backup data is not notified due to failure of the backup process even though it should be displayed, and the backup process can be preferably executed.

The storage means
a first storage area in which the first backup data is written and the second backup data is not written (for example, the 1-1 backup storage unit 95AK001 to the 1-3 backup storage unit 95AK003, etc.);
A second storage area (for example, a second backup storage unit 95AK004, etc.) in which the second backup data is written and the first backup data is not written,
You may do so.

According to the above configuration, the storage area for the first backup data and the storage area for the second backup data can be separated, so that the backup process can be performed favorably.

The first storage area has a first number (eg, three) of storage areas (eg, 1-1 backup storage unit 95AK001 to 1-3 backup storage unit 95AK003, etc.) in which the same first backup data is written. has
The second storage area has a second number (e.g., one) of storage areas (e.g., second backup storage unit 95AK004, etc.) that is smaller than the first number in which the same second backup data is written.
You may do so.

According to the above configuration, the execution time of the second backup process can be reliably made shorter than that of the first backup process, and the backup process can be preferably executed.

a first control means (for example, the main substrate 11, etc.);
A second control means (for example, a production control microcomputer 120, etc.), which is the control means,
The second control means executes the first backup process and the second backup process when only the second control means of the first control means and the second control means is reset. No (for example, in step 95AKS112, the data for manufacturer confirmation is backed up, but the store confirmation data is not backed up, etc.);
You may do so.

Although the determination of the reset is performed by the power interruption signal in the above description, it may be performed by other methods. For example, the reset may be determined by a command or the like that is first transmitted from the first control means to the second control means after reset (the command is a command other than the command that is normally transmitted after reset (variable command). pattern designating command, etc.), it is determined that only the second control means has been reset).

According to the above configuration, when only the second control means out of the first control means and the second control means is reset, the second backup process with a short execution time is not executed or the second backup process, which is easy to confirm, is not executed. Since the second backup processing for the backup data is not executed, the backup processing can be preferably executed (for example, resetting only the second control means by the second backup data is a minor defect. (e.g., it is possible to avoid unnecessarily notifying that only the second control means has been reset).

The second control means executes the first backup process and the second backup process when both the first control means and the second control means are reset (for example, steps 95AKS106 and 95AKS107). ),
You may do so.

According to the above configuration, backup processing can be preferably executed. When both the first control means and the second control means are reset, the reset is normally assumed, and the fact can be firmly backed up, and the backup process can be preferably executed.

When the voltage supplied to the second control means is below a predetermined value, a signal supply means (for example, power disconnection detection circuit 95AK010, etc.),
The second control means determines whether both the first control means and the second control means are reset based on whether or not the predetermined signal is supplied after the power is turned on. It is possible to identify whether only has been reset (for example, processing after 95AKS104),
You may do so.

According to the above configuration, the reset control means can be specified by the predetermined signal, and the backup process can be preferably executed.

DESCRIPTION OF SYMBOLS 1... Pachinko game machine 11... Main board 12... Production control board 14... Backup memory board 120... Microcomputer for control of production 131... CPU
140 … VDP
150 to 156 ... Connectors 210A to 210D ... Backup data memory

Claims (1)

A gaming machine capable of playing games,
a control means;
and a storage means capable of storing backup data,
The control means is
capable of executing a first backup process of storing first backup data in the storage means based on the establishment of a first backup condition;
a second backup process different from the first backup process for storing the second backup data in the storage means can be executed based on the establishment of the second backup condition;
It is possible to determine the mode of power-on,
When the first backup condition is satisfied and the second backup condition is not satisfied in response to the power-on of the first mode, the first backup process is executed and the second backup process is executed. figure,
executing the first backup process and the second backup process based on the satisfaction of the first backup condition and the second backup condition in response to the power-on of the second aspect;
the information indicated by the second backup data stored in the storage means is easier to confirm than the information indicated by the first backup data stored in the storage means;
The storage means
a first storage area to which the first backup data is written and to which the second backup data is not written;
a second storage area to which the second backup data is written and to which the first backup data is not written;
A gaming machine characterized by:

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