JP7203661B2 - power converter - Google Patents

Description

The present invention relates to power converters.

In Patent Document 1, in a power conversion device including an inverter and a control unit, the inverter has a plurality of upper arms and lower arms including switching elements of wide bandgap semiconductors, and the control unit includes an inverse converter. When an overcurrent flows through the device, the first arm, which is one of the upper and lower arms and is arranged on the path of the overcurrent, is turned off, and the second arm, which is a pair of the first arm, is turned on. Later, a technique is disclosed in which the second arm is turned off according to the current flowing through the second arm, thereby preventing a large current from flowing through the body diode and accelerating the energization deterioration phenomenon.

JP 2016-226197 A

By the way, in the technique disclosed in Patent Document 1, the current flowing through the feedback path is controlled so as not to exceed a certain threshold. However, in the case of a specific switching element, it is necessary to control di/dt, which is the slope of the current, but the technology disclosed in Patent Document 1 cannot control the slope of the current. there is a point

SUMMARY OF THE INVENTION The present invention has been made in view of the circumstances described above, and an object of the present invention is to provide a power converter capable of controlling the inclination of the current as well.

In order to solve the above problems, one aspect of the present invention provides a first arm configured by connecting two semiconductor switches having internal diodes in series, and a first arm connected in parallel with the first arm and having the internal diode. a second arm configured by connecting two semiconductor switches in series; an output terminal provided at an intermediate point of the first arm and an intermediate point of the second arm, and to which a load is connected; Controlling the conversion of the DC power applied to the first arm and the second arm into AC power by controlling the on/off of the semiconductor switches constituting the first arm and the second arm at a predetermined cycle. wherein the control means has the internal diode when a forward current flows through the internal diode of the semiconductor switch that constitutes the first arm and the second arm. The semiconductor switch is controlled to be on/off at a cycle shorter than the predetermined cycle, thereby controlling the current flowing through the internal diode to be suppressed.
With such a configuration, it is possible to control the slope of the current as well.

In one aspect of the present invention, the control means turns on the two semiconductor switches located on one diagonal line among the four semiconductor switches forming the first arm and the second arm. When an overcurrent is detected while the current is flowing through the load, one of the two semiconductor switches that are turned on is turned off, and the semiconductor that is turned off is turned off. The semiconductor switch on the same arm as the switch is turned on/off at a cycle shorter than the predetermined cycle, thereby controlling the current flowing through the internal diode to be suppressed.
According to such a configuration, it is possible to suppress the inclination of the current flowing through the internal diode by switching in a short cycle in response to the detection of overcurrent.

Further, according to one aspect of the present invention, when the overcurrent is detected, the control means controls the other semiconductor switch in the same arm as the semiconductor switch that has been turned off. On/off control is performed in a cycle shorter than that, and control is performed so as to increase the duty ratio.
According to such a configuration, it is possible to suppress the inclination of the current flowing through the internal diode of the semiconductor switch that is turned off.

In one aspect of the present invention, when the overcurrent is detected, the control means controls the other semiconductor switch in the same arm as the semiconductor switch that has been turned off for a period shorter than the predetermined period. The on/off control is performed periodically, and the control is performed so that the control voltage increases when the switch is on.
With such a configuration, it is possible to control the slope of the current to gradually increase.

In one aspect of the present invention, the control means controls two semiconductor switches positioned on one diagonal line among the four semiconductor switches constituting the first arm and the second arm according to PWM control. When an overcurrent is detected while passing a current to the load by turning on the semiconductor switch, one of the two semiconductor switches turned on is turned off, and the switch is turned off. The other semiconductor switch in the same arm as the semiconductor switch in the state is turned on/on at a cycle shorter than the predetermined cycle and with a duty ratio corresponding to the pulse width of the PWM control at the time when the overcurrent is detected. It is characterized by performing control to suppress the current flowing through the internal diode by performing off control.
According to such a configuration, the inclination of the current flowing through the internal diode can be suppressed by the control according to the pulse width of the PWM.

In one aspect of the present invention, when the semiconductor switch is switched from off to on, the control means executes control for turning on/off the semiconductor switch at a cycle shorter than the predetermined cycle for a predetermined period. It is characterized by
According to such a configuration, it is possible to suppress the slope of the current that occurs when the semiconductor switch is switched.

Further, one aspect of the present invention is characterized in that the semiconductor switch is a cascode GaN-HEMT.
With such a configuration, it is possible to suppress the inclination of the current flowing through the internal diode of the cascode GaN-HEMT.

ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the power converter device which can control also about the inclination of an electric current.

It is a figure for demonstrating the structure of a prior art example, and the flowing current. FIG. 10 is a diagram for explaining the operation of a conventional example; It is a figure for demonstrating the structure of a prior art example, and the flowing current. It is a figure for demonstrating the structure of a prior art example, and the flowing current. FIG. 10 is a diagram for explaining the operation of a conventional example; It is a figure for demonstrating the structure of a prior art example, and the flowing current. FIG. 10 is a diagram for explaining the operation of a conventional example; FIG. 10 is a diagram for explaining the operation of a conventional example; 1 is a diagram showing a configuration example of a cascode-type GaN-HEMT; FIG. FIG. 10 is a diagram for explaining the operation of the cascode GaN-HEMT shown in FIG. 9; It is a figure which shows the structural example of this invention. 12 is a configuration example of a logic circuit that controls the configuration example shown in FIG. 11; FIG. 13 is a configuration example of a circuit that generates a signal to be input to the logic circuit shown in FIG. 12; FIG. 13 is a configuration example of the logic circuit shown in FIG. 12; 15 is a truth table showing the operation of the logic circuit shown in FIG. 14; 15 is a truth table showing the operation of the logic circuit shown in FIG. 14; It is a figure for demonstrating the operation|movement of embodiment of this invention. It is a figure for demonstrating the operation|movement of deformation|transformation embodiment of this invention. It is a figure for demonstrating the operation|movement of deformation|transformation embodiment of this invention. It is a figure for demonstrating the operation|movement of deformation|transformation embodiment of this invention. It is a figure for demonstrating the operation|movement of deformation|transformation embodiment of this invention.

Next, embodiments of the present invention will be described. 1 to 8, an operation for suppressing overcurrent in a conventional power converter will be described, and then an embodiment of the present invention will be described.

FIG. 1 is a diagram showing a configuration example of a conventional power converter 10. As shown in FIG. In the example shown in FIG. 1, the power conversion device 10 includes a first arm 112 in which semiconductor switches 11 and 12 (hereinafter appropriately referred to as Q1 and Q2) having internal diodes 15 and 16 are connected in series; 18 (hereinafter appropriately referred to as Q3 and Q4) have a second arm 134 connected in series. A load 20 is connected between the source of the semiconductor switch 11 and the drain of the semiconductor switch and the source of the semiconductor switch 13 and the drain of the semiconductor switch 14 via output terminals 21 and 22 . An electrolytic capacitor 19 is connected between the drains of the semiconductor switches 11 and 13 and the sources of the semiconductor switches 12 and 14 .

Here, the first arm 112 in which the semiconductor switches 11 and 12 are connected in series is used as a PWM (Pulse Width Modulation) drive arm, and the second arm 134 in which the semiconductor switches 13 and 14 are connected in series is used as a polarity drive arm. be done.

FIG. 2 is a timing chart for explaining the operation of the conventional example shown in FIG. As shown in FIGS. 2A and 2B, semiconductor switches 11 and 12 are applied with PWM pulses of different polarities. Also, as shown in FIGS. 2(C) and 2(D), polar pulses having mutually different polarities are applied to the semiconductor switches 13 and 14 .

In FIG. 2, it is assumed that an overcurrent flowing through the load 20 is detected at the timing indicated by the arrow. That is, assume that an overcurrent flows through semiconductor switch 11, load 20, and semiconductor switch 14, as indicated by dashed arrows in FIG. In such a case, the control unit (not shown) turns off (gate blocks) the semiconductor switch 14 . Thereby, the current flowing through the load 20 can be interrupted.

By the way, if the load 20 has an inductance component, the current will continue to flow through the load 20 even if the current is interrupted. Current will flow through the internal diode 17 of the switch 13 . Since the withstand current characteristic of the internal diode 17 is smaller than that of the semiconductor switch 13, an excessive load is applied to the internal diode 17.

Therefore, conventionally, as shown in FIGS. 2(C) and 3(A), by controlling the semiconductor switch 13 to the ON state (by turning the feedback path ON), the current flowing through the internal diode 17 is is bypassed to the semiconductor switch 13 to prevent the internal diode 17 from being overloaded.

When the overcurrent flowing through the load 20 is eliminated, the semiconductor switch 14 is turned on and the semiconductor switch 13 is turned off as shown in FIG. 3B in order to return to normal PWM control.

The above is an example in which a current flows from the semiconductor switch 11 to the semiconductor switch 14. However, as indicated by the dashed arrow in FIG. It is possible. That is, in FIG. 5, it is assumed that an overcurrent flowing through the load 20 is detected at the timing indicated by the arrow. That is, assume that an overcurrent flows through semiconductor switch 13, load 20, and semiconductor switch 12, as indicated by dashed arrows in FIG. In such a case, the control unit (not shown) turns off (gate blocks) the semiconductor switch 12 . Thereby, the current flowing through the load 20 can be interrupted.

At this time, if the load 20 has an inductance component, the current will continue to flow through the load 20, so the current will flow through the internal diode 15 as shown in FIG. 4(B). Since the withstand current characteristic of the internal diode 15 is smaller than that of the semiconductor switch 11, an excessive load is applied to the internal diode 15.

Therefore, as shown in FIGS. 5A and 6A, by controlling the semiconductor switch 11 to be in an ON state (turning the feedback path ON), the current flowing through the load 20 is bypassed to the semiconductor switch 11. to prevent the internal diode 15 from being overloaded.

When the overcurrent flowing through the load 20 is eliminated, the semiconductor switch 12 is turned on and the semiconductor switch 11 is turned off as shown in FIG. 6B in order to return to normal PWM control.

In the example of FIGS. 1 and 2, an excessive current is detected when current is flowing through the load 20 via the semiconductor switches 11 and 14, and the semiconductor switch 14 is turned off. As shown in A), the semiconductor switch 11 may be turned off (gate blocked). At that time, current flows through the internal diode 16, the load 20, and the semiconductor switch 14, so that the internal diode 16 is loaded. Therefore, in this case, by turning on the semiconductor switch 12 (turning on the feedback path) as shown in FIG. 7B, the current flowing through the internal diode 16 can be bypassed.

In the examples of FIGS. 4 and 5, an excessive current is detected while the current is flowing through the load 20 via the semiconductor switches 13 and 12, and the semiconductor switch 12 is turned off. As shown in C), the semiconductor switch 13 may be turned off (gate blocked). At that time, current flows through the internal diode 18, the load 20 and the semiconductor switch 12, so that the internal diode 18 is loaded. Therefore, in this case, by turning on the semiconductor switch 14 (turning on the feedback path) as shown in FIG. 8D, the current flowing through the internal diode 18 can be bypassed.

By the way, let us consider the case of using the cascode-type GaN-HEMT shown in FIG. 9 as the semiconductor switches 11 to 14 . The cascode-type GaN-HEMT (High Electron Mobility Transistor) shown in FIG. 9 consists of a Si-MOS (Metal Oxide Semiconductor) type FET (Field Effect Transistor) and a normally ON type that turns on when no gate voltage is applied. GaN-HEMTs are cascode-connected.

In the cascode-type GaN-HEMT shown in FIG. 9, when no driving voltage is applied between the gate and the source, the Si-MOS is in an off state. is also low, it is turned off. On the other hand, when a driving voltage is applied between the gate and source of the cascode-type GaN-HEMT, the Si-MOS is turned on, so the voltage of the gate of the normally-on GaN-HEMT is substantially the same as that of the source. Therefore, it is turned on.

The above is the operation when a forward voltage (drain voltage>source voltage) is applied between the drain and the source. When a reverse voltage (drain voltage<source voltage) is applied between the drain and source, as shown in FIG. 10, the relationship between Vgs (voltage between gate and source) and Vth (threshold voltage) causes - Current flows through either the MOS or the internal diode. That is, when Vgs<Vth, a current flows through the internal diode as shown in FIG. 10(A). If Vgs>Vth, a current flows through the Si-MOS as shown in FIG. 10B.

By the way, the internal diode of the cascode GaN-HEMT needs to be controlled so that di/dt, which indicates the temporal change in current, does not exceed a predetermined threshold. This is because when di/dt exceeds a predetermined threshold, the internal diode may collapse due to the back electromotive force due to the internal inductance component.

Therefore, in the embodiment of the present invention, di/dt exceeds a predetermined threshold value even when a semiconductor switch having an internal diode in the form of the cascode GaN-HEMT shown in FIGS. 9 and 10 is used. It is characterized by controlling so that it does not occur. In the following description, the cascode-type GaN-HEMT is simplified as indicated by the arrow in FIG.

(A) Description of Configuration of Embodiment of the Present Invention FIG. 11 is a diagram showing a configuration example of a power conversion device 30 according to an embodiment of the present invention. In FIG. 11, a power converter 30 has an electrolytic capacitor 19, a load 20, and cascode GaN-HEMTs 31-34.

Here, the electrolytic capacitor 19 smoothes and outputs DC power supplied from a DC power supply (not shown).

The cascode-type GaN-HEMTs 31 to 34 have the configurations shown in FIGS. 9 and 10, and their ON/OFF states are controlled by drive signals supplied from a logic circuit 51, which will be described later. converted to AC voltage and output. Note that the output voltage may be changed by providing a step-up circuit or a step-down circuit before the circuit shown in FIG.

The cascode GaN-HEMTs 31 and 32 are connected in series to form a first arm 312 . A load 20 is connected via an output terminal 21 between the source of the cascode GaN-HEMT 31 and the drain of the cascode GaN-HEMT 32 .

The cascode GaN-HEMTs 33 and 34 are connected in series to form a second arm 334 . A load 20 is connected via an output terminal 22 between the source of the cascode GaN-HEMT 33 and the drain of the cascode GaN-HEMT 34 .

The load 20 is, for example, a home appliance or the like, and has various impedance components depending on the type of product.

FIG. 12 shows a configuration example of a control circuit 50 for driving the cascode GaN-HEMTs 31-34 shown in FIG. In the example of FIG. 12, the control circuit 50 has a logic circuit 51 and drive circuits 52-55.

Logic circuit 51 is a logic circuit having a configuration described later with reference to FIG. 14, and outputs a value corresponding to the logic value of an input signal. The drive PWM pulse, the polarity pulse, the overcurrent detection signal, and the overcurrent pulse are input to the logic circuit 51 .

Here, the drive PWM pulse signal is a PWM signal in a normal state (when no abnormal current is flowing), and is a signal having a frequency of 100 kHz, for example.

The polarity pulse signal is a signal that repeats high/low at the frequency of AC power to be output (eg, 50 Hz or 60 Hz).

The overcurrent detection signal is normally in a high state, and becomes a low state when an overcurrent flows through the load 20 .

The pulse signal during overcurrent is a PWM signal with a high frequency used during overcurrent, for example, a signal of 1 MHz (a frequency about 10 to 100 times the driving PWM pulse).

The drive circuits 52-55 amplify the power of the signal output from the logic circuit 51 and supply it to the gates of the cascode GaN-HEMTs 31-34 as Q1 drive signal-Q4 drive signal.

FIG. 13 shows a circuit for generating signals to be supplied to the logic circuit 51. As shown in FIG. FIG. 13A shows a circuit for generating and outputting a driving PWM pulse signal in a normal state and a circuit for generating and outputting an overcurrent pulse signal in an abnormal state. In FIG. 13A, the comparator 61 receives a sine wave of 50 Hz or 60 Hz and a triangular wave signal of 100 kHz or 1 MHz. If sine wave signal < triangular wave signal, the output is set to low to output a PWM signal corresponding to the sine wave.

FIG. 13B shows a circuit that generates and outputs a polarity pulse signal. In FIG. 13B, the comparator 62 receives a sine wave of 50 Hz or 60 Hz and a reference voltage Vref (for example, Vref=0). The comparator responds to the sine wave by, for example, setting the output to a high state if the sine wave signal>reference voltage Vref and setting the output to a low state if the sine wave signal<reference voltage Vref. Generates and outputs a polar pulse signal.

FIG. 13C shows a circuit that generates and outputs an overcurrent detection signal. The example of FIG. 13(C) is composed of an amplifier 63 and a comparator 64. FIG. The amplifier 63, for example, amplifies and outputs the voltage across the detection resistor for detecting the current flowing through the load 20 or the cascode GaN-HEMTs 31-34. A comparator 64 compares the output of the amplifier to the threshold voltage and forces the output to a low state if the output of the amplifier>threshold voltage and to the high state if the output of the amplifier<threshold voltage. This generates and outputs an overcurrent detection signal.

FIG. 14 shows a configuration example of the logic circuit 51 shown in FIG. In the example of FIG. 14, the logic circuit 51 has NOT circuits 71 and 72, AND circuits 73-76, and OR circuits 77 and 78.

15 and 16 show truth tables for the circuit shown in FIG. Here, nOC indicates an overcurrent detection signal, OC_PWM indicates an overcurrent pulse signal, POLE indicates a polarity pulse signal, and PWM indicates a driving PWM pulse signal.

FIG. 15 shows a truth table when overcurrent is detected (nOC=0). As shown in FIG. 15, Q3 and Q4, which are cascode-type GaN-HEMTs 33 and 34, are changed only by POLE (polarity pulse signal), and are not affected by PWM (drive PWM pulse signal) and OC_PWM (overcurrent pulse signal). I do not receive. When OC_PWM (pulse signal during overcurrent) is 1, one of Q1 and Q2, which are cascode GaN-HEMTs 31 and 32, becomes 1 according to POLE (polarity pulse signal). When OC_PWM (pulse signal at overcurrent) is 0, Q1 and Q2 remain 0. Furthermore, when an overcurrent is detected, diagonal elements (Q1, Q4 or Q2, Q3) are not turned on at the same time.

FIG. 16 shows a truth table during normal operation. As shown in FIG. 16, Q3 and Q4 are changed only by POLE (polarity pulse signal) and are not affected by PWM (drive PWM pulse signal) or OC_PWM (overcurrent pulse signal). is the same, so it is not affected by nOC (overcurrent detection signal)). Q1 and Q2 are changed only by PWM (drive PWM pulse signal). It is not affected by POLE (polarity pulse signal) or OC_PWM (overcurrent pulse signal).

(B) Description of operation of embodiment of the present invention Next, operation of the embodiment of the present invention will be described. FIG. 17 is a timing chart for explaining the operation of the embodiment of the invention. As shown in FIG. 17, in this embodiment, the cascode GaN-HEMTs 31 and 32 are supplied with PWM pulse signals, and the cascode GaN-HEMTs 33 and 34 are supplied with polar pulse signals. The cascode GaN-HEMTs 31 to 34 are turned on when the signal applied to the gate is high, and turned off when the signal applied to the gate is low. is the same as the semiconductor switches 11 to 14 shown in FIG. 1 and the like.

When the cascode-type GaN-HEMTs 33 and 34 are turned off and on, respectively, and the cascode-type GaN-HEMTs 31 and 32 are turned on and off, respectively, the cascode-type GaN-HEMTs 31 and 32 are turned on and off, respectively, as indicated by short dashed lines in FIG. Current flows through GaN-HEMT 31 , load 20 and cascode GaN-HEMT 34 .

In such a state, if an overcurrent occurs as indicated by an arrow in FIG. 17, the overcurrent detection signal goes low. As a result, as shown in FIG. 17(D), the logic circuit 51 sets the Q4 drive signal to a low state (gate blocks), so that the cascode GaN-HEMT 34 is turned off.

If the load 20 has an inductive component, current will continue to flow through the cascode GaN-HEMT 33 when the cascode GaN-HEMT 34 is turned off. At this time, if the cascode-type GaN-HEMT 33 is kept off, all the current flows through the internal diode, so di/dt may exceed the specified value.

Therefore, in this embodiment, as shown in an enlarged lower part of FIG. to switch. As a result, the current flowing through the cascode GaN-HEMT 33 alternately flows through the internal diode and the Si-MOS, as shown in FIGS. 10A and 10B. /dt can be prevented from exceeding the specified value.

In the above description, when an overcurrent flows from the cascode GaN-HEMT 31 to the cascode GaN-HEMT 34, the cascode GaN-HEMT 34 is turned off, but the cascode GaN-HEMT 34 remains on. , the cascode GaN-HEMT 31 may be turned off. In that case, a current flows through the internal diode of the cascode-type GaN-HEMT 32. Therefore, in order to prevent the current flowing through the internal diode from exceeding the predetermined value of di/dt, the cascode-type GaN-HEMT 32 is increased more than usual. may be turned on/off in short cycles.

The above is the operation when overcurrent flows when the cascode GaN-HEMTs 31 and 34 are on. , the di/dt flowing through the internal diode may be reduced.

More specifically, when an overcurrent is detected while the cascode GaN-HEMTs 32, 33 are on, one of the cascode GaN-HEMTs 32, 33 is turned off. For example, when the cascode GaN-HEMT 32 is turned off, current continues to flow through the internal diode of the cascode GaN-HEMT 31. By switching at a period of 1/10 to 1/100, for example, the current flowing through the internal diode can be reduced.

On the other hand, when the cascode GaN-HEMT 33 is turned off, the current continues to flow through the internal diode of the cascode GaN-HEMT 34. By switching at a period of 1/10 to 1/100, for example, the current flowing through the internal diode can be reduced.

As described above, according to the embodiment of the present invention, in the power converter having the cascode GaN-HEMTs 31 to 34, when an overcurrent is detected, the two cascodes are turned on. One of the GaN-HEMTs is turned off, and the other cascode-type GaN-HEMT connected in series with the turned-off cascode-type GaN-HEMT is turned on at a period shorter than the normal period. / off, the di/dt of the current flowing through the internal diode can be suppressed, and the internal diode can be prevented from being overloaded or damaged.

(C) Description of Modified Embodiment The above-described embodiment is merely an example, and needless to say, the present invention is not limited to the case described above. For example, in the above embodiment, as shown in FIG. 17, the cascode-type GaN-HEMT (the cascode-type GaN-HEMT 33 in the example of FIG. 17) corresponding to the feedback path is turned on/off with the same duty ratio. For example, as shown in FIG. 18, the duty ratio may be changed so that the current flowing through the internal diode increases over time. According to such control, since the current flowing through the internal diode gradually increases, di/dt of the current flowing through the internal diode can be suppressed more reliably. As a configuration for realizing such an operation, for example, a ramp function may be used as Vin shown in FIG. 13(A). Of course, other configurations are possible.

In each of the above embodiments, the voltage for driving the cascode GaN-HEMT corresponding to the feedback path is constant, but as shown in FIG. 19, the current flowing through the internal diode increases over time. The drive voltage may be changed as follows. According to such control, since the current flowing through the internal diode gradually increases, di/dt of the current flowing through the internal diode can be suppressed more reliably. As a configuration for realizing such an operation, for example, the product of the output signal of the comparator 61 shown in FIG. 13A and the ramp function may be calculated. Of course, other configurations are possible.

Further, as shown in FIG. 20, the duty ratio of the cascode GaN-HEMT corresponding to the feedback path may be changed according to the duty ratio of the PWM pulse when overcurrent is detected. More specifically, when the duty ratio of the PWM pulse is small when overcurrent is detected, switching is performed at a small duty ratio as shown in FIG. If it is large, switching may be performed with a large duty ratio as shown in FIG. 20(F). According to such a configuration, switching can be performed with an appropriate duty ratio according to the current flowing through the internal diode. As a configuration for realizing such an operation, for example, Vin shown in FIG. 13A may be changed according to the duty ratio of the PWM signal. Of course, other configurations are possible.

Further, in the above embodiments, the control when an overcurrent flows has been described as an example. However, for example, as shown in FIG. In order to prevent overcurrent from flowing through the diode, it may be temporarily switched at a shorter cycle than usual. As a configuration for realizing such an operation, for example, when switching from off to on, the period of the oscillation signal supplied to the comparison circuit shown in FIG. 13A is temporarily shortened. Just do it. Of course, other configurations are possible.

The circuits shown in FIGS. 11 to 14 and the like are examples, and the present invention is not limited to these circuits.

Also, in the above embodiments, the cascode GaN-HEMT was described as an example of the semiconductor switch, but other semiconductor switches may be used.

10 power converter 11-14 semiconductor switch 15-18 internal diode 19 electrolytic capacitor 20 load 21-22 output terminal 30 power converter 50 control circuit 51 logic circuit 52-55 drive circuit 61, 62, 64 comparator 63 amplifier 71, 72 NOT circuit 73 to 76 AND circuit 77, 78 OR circuit 112, 312 first arm 134, 334 second arm

Claims (7)

a first arm configured by connecting two semiconductor switches having internal diodes in series;
a second arm connected in parallel with the first arm and configured by connecting in series two semiconductor switches each having the internal diode;
output terminals provided at an intermediate point of the first arm and an intermediate point of the second arm, respectively, to which a load is connected;
Control for converting the DC power applied to the first arm and the second arm into AC power by on/off controlling the semiconductor switches constituting the first arm and the second arm at a predetermined cycle. and a control means for
When a forward current flows through the internal diode of one of the semiconductor switches constituting the first arm and the second arm, the control means controls the semiconductor switch having the internal diode of the internal diode. By controlling the on/off of the switch with a period shorter than the predetermined period, control is performed to suppress the inclination of the current flowing through the internal diode.
A power conversion device characterized by: The control means supplies current to the load by turning on two semiconductor switches positioned on one diagonal line among the four semiconductor switches forming the first arm and the second arm. When an overcurrent is detected, one of the two semiconductor switches that are in the on state is turned off, and the other semiconductor switch in the same arm as the semiconductor switch that is in the off state is turned off. 2. The power conversion apparatus according to claim 1, wherein control is performed to suppress the gradient of the current flowing through the internal diode by turning on/off the switch in a cycle shorter than the predetermined cycle. When the overcurrent is detected, the control means turns on/off the other semiconductor switch in the same arm as the semiconductor switch that has been turned off at a cycle shorter than the predetermined cycle, 3. The power converter according to claim 2, wherein control is performed so that the duty ratio increases. When the overcurrent is detected, the control means turns on/off the other semiconductor switch in the same arm as the semiconductor switch that has been turned off at a cycle shorter than the predetermined cycle, 3. The power converter according to claim 2, wherein control is performed so that the control voltage increases when the power converter is on. The control means turns on the two semiconductor switches located on one diagonal line among the four semiconductor switches constituting the first arm and the second arm according to PWM control. When an overcurrent is detected while the current is passing through the load, one of the two semiconductor switches that are turned on is turned off, and the same arm as the semiconductor switch turned off is turned off. The other semiconductor switch in is on/off-controlled with a period shorter than the predetermined period and with a duty ratio corresponding to the pulse width of the PWM control at the time when the overcurrent is detected, thereby turning the internal diode 2. The power conversion device according to claim 1, wherein control is performed to suppress the inclination of the flowing current. 2. The control device according to claim 1, wherein when switching the semiconductor switch from off to on, the control means controls the semiconductor switch to turn on/off at a cycle shorter than the predetermined cycle for a predetermined period of time. A power converter as described. 7. The power converter according to claim 1, wherein said semiconductor switch is a cascode GaN-HEMT.

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