JP2020162376A - Power conversion equipment - Google Patents

Abstract

To provide power conversion equipment which can also control the inclination of a current.SOLUTION: The power conversion equipment includes: a first arm constituted by the series connection of two semiconductor switches (cascode GaN-HEMT 31, 32); a second arm connected in parallel to the first arm and constituted by the series connection of semiconductor switches (cascode GaN-HEMT 33, 34); output terminals 21, 22 which are provided at the middle point of the first arm and the middle point of the second arm, respectively, and to which a load is connected; and control means (logic circuit 51) which controls each semiconductor switch to switch on/off at a predetermined period to convert DC power into AC power. When each forward current flows through internal diodes provided in the semiconductor switches, the control means controls the semiconductor switches having the internal diodes to switch on/off at a period shorter than the predetermined period to thereby suppress a current flowing through each internal diode.SELECTED DRAWING: Figure 11

Description

The present invention relates to a power converter.

According to Patent Document 1, in a power converter including a reverse converter and a control unit, the reverse converter has a plurality of upper arms and lower arms including switching elements of wideband gap semiconductors, and the control unit has reverse conversion. When an overcurrent flows through the transducer, the first arm, which is one of the upper and lower arms and is located on the overcurrent path, is turned off, and the second arm, which is a pair of the first arm, is turned on. Later, a technique is disclosed that prevents a large current from flowing to the body diode and accelerating the conduction deterioration phenomenon by turning off the second arm according to the current flowing through the second arm.

Japanese Unexamined Patent Publication No. 2016-226197

By the way, in the technique disclosed in Patent Document 1, the current flowing in the feedback path is controlled so as not to exceed a certain threshold value. However, in the case of a specific switching element, it is necessary to control the slope of the current, di / dt, but the technique disclosed in Patent Document 1 cannot control the slope of the current. There is a point.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a power conversion device capable of controlling the slope of a current.

In order to solve the above problems, one aspect of the present invention includes a first arm formed by connecting two semiconductor switches having an internal diode in series and a first arm connected in parallel with the first arm and having the internal diode. A second arm formed by connecting two semiconductor switches in series, an output terminal provided at an intermediate point of the first arm and an intermediate point of the second arm, and a load connected thereto, and the above. By controlling the on / off of the first arm and the semiconductor switch constituting the second arm at a predetermined cycle, control for converting the DC power applied to the first arm and the second arm into AC power is performed. The control means includes, and the control means has the internal diode when a forward current flows through the internal diode of the semiconductor switch constituting the first arm and the second arm. By controlling the semiconductor switch on / off in a cycle shorter than the predetermined cycle, control for suppressing the current flowing through the internal diode is performed.
According to such a configuration, the slope of the current can also be controlled.

Further, one aspect of the present invention is that the control means turns on two of the semiconductor switches located on the diagonal line of one of the four semiconductor switches constituting the first arm and the second arm. By doing so, when an overcurrent is detected while passing a current through the load, one of the two semiconductor switches that are turned on is turned off, and the semiconductor that is turned off is turned off. It is characterized in that the other semiconductor switch in the same arm as the switch is on / off controlled in a cycle shorter than the predetermined cycle to suppress the current flowing through the internal diode.
According to such a configuration, the slope of the current flowing through the internal diode can be suppressed by switching in a short cycle according to the detection of the overcurrent.

Further, one aspect of the present invention is that, when the overcurrent is detected, the control means switches the other semiconductor switch in the same arm as the semiconductor switch turned off to the predetermined period. It is characterized in that on / off control is performed in a shorter cycle and control is performed so that the duty ratio increases.
According to such a configuration, it is possible to suppress the slope of the current flowing through the internal diode of the semiconductor switch turned off.

Further, one aspect of the present invention is that, when the overcurrent is detected, the control means makes the other semiconductor switch in the same arm as the semiconductor switch turned off shorter than the predetermined period. It is characterized in that it controls on / off in a cycle and controls so that the control voltage at the time of turning increases.
According to such a configuration, it is possible to control so that the slope of the current gradually increases.

Further, one aspect of the present invention is that the control means responds to PWM control of two semiconductor switches located on the diagonal line of one of the four semiconductor switches constituting the first arm and the second arm. When an overcurrent is detected while a current is being passed through the load by turning it on, one of the two semiconductor switches that are turned on is turned off and turned off. The other semiconductor switch in the same arm as the semiconductor switch in the state is turned on / by a duty ratio corresponding to the pulse width of the PWM control at the time when the overcurrent is detected and the cycle is shorter than the predetermined cycle. It is characterized in that the off control is performed to suppress the current flowing through the internal diode.
According to such a configuration, the slope of the current flowing through the internal diode can be suppressed by controlling according to the PWM pulse width.

Further, one aspect of the present invention is that when the semiconductor switch is switched from off to on, the control means executes control for turning on / off the semiconductor switch at a cycle shorter than the predetermined cycle for a predetermined period. It is characterized by that.
According to such a configuration, it is possible to suppress the slope of the current generated when the semiconductor switch is switched.

Further, one aspect of the present invention is characterized in that the semiconductor switch is a cascode type GaN-HEMT.
According to such a configuration, the slope of the current flowing through the internal diode of the cascode type GaN-HEMT can be suppressed.

According to the present invention, it is possible to provide a power conversion device that can also control the slope of current.

It is a figure for demonstrating the structure of the conventional example and the flowing current. It is a figure for demonstrating the operation of the conventional example. It is a figure for demonstrating the structure of the conventional example and the flowing current. It is a figure for demonstrating the structure of the conventional example and the flowing current. It is a figure for demonstrating the operation of the conventional example. It is a figure for demonstrating the structure of the conventional example and the flowing current. It is a figure for demonstrating the operation of the conventional example. It is a figure for demonstrating the operation of the conventional example. It is a figure which shows the structural example of the cascode type GaN-HEMT. It is a figure for demonstrating the operation of the cascode type GaN-HEMT shown in FIG. It is a figure which shows the structural example of this invention. This is a configuration example of a logic circuit that controls the configuration example shown in FIG. This is a configuration example of a circuit that generates a signal input to the logic circuit shown in FIG. It is a configuration example of the logic circuit shown in FIG. It is a truth table which shows the operation of the logic circuit shown in FIG. It is a truth table which shows the operation of the logic circuit shown in FIG. It is a figure for demonstrating operation | movement of embodiment of this invention. It is a figure for demonstrating operation of the modified embodiment of this invention. It is a figure for demonstrating operation of the modified embodiment of this invention. It is a figure for demonstrating operation of the modified embodiment of this invention. It is a figure for demonstrating operation of the modified embodiment of this invention.

Next, an embodiment of the present invention will be described. Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 to 8 after explaining an operation of suppressing an overcurrent in a conventional power conversion device.

FIG. 1 is a diagram showing a configuration example of a conventional power conversion device 10. In the example shown in FIG. 1, the power conversion device 10 includes a first arm 112 to which semiconductor switches 11 and 12 (hereinafter, appropriately referred to as Q1 and Q2) having internal diodes 15 and 16 are connected in series, and an internal diode 17, The semiconductor switches 13 and 14 having 18 (hereinafter, appropriately referred to as Q3 and Q4) have a second arm 134 connected in series. A load 20 is connected between the source of the semiconductor switch 11 and the drain of the semiconductor switch and the source of the semiconductor switch 13 and the drain of the semiconductor switch 14 via output terminals 21 and 22. Further, an electrolytic capacitor 19 is connected between the drain of the semiconductor switches 11 and 13 and the source of the semiconductor switches 12 and 14.

Here, the first arm 112 to which the semiconductor switches 11 and 12 are connected in series is a PWM (Pulse Width Modulation) drive arm, and the second arm 134 to which the semiconductor switches 13 and 14 are connected in series is a polarity drive arm. Will be done.

FIG. 2 is a timing chart for explaining the operation of the conventional example shown in FIG. As shown in FIGS. 2A and 2B, PWM pulses having different polarities are applied to the semiconductor switches 11 and 12. Further, as shown in FIGS. 2C and 2D, polar pulses having different polarities are applied to the semiconductor switches 13 and 14.

In FIG. 2, it is assumed that an overcurrent is detected with respect to the load 20 at the timing indicated by the arrow. That is, it is assumed that an overcurrent is passed through the semiconductor switch 11, the load 20, and the semiconductor switch 14, as shown by the broken line arrow in FIG. 1 (A). In such a case, the control unit (not shown) turns off the semiconductor switch 14 (gate blocks). As a result, the current flowing through the load 20 can be cut off.

By the way, when the load 20 has an inductance component, the current tends to continue to flow through the load 20 even if the current is cut off. Therefore, when the semiconductor switch 14 is turned off, the semiconductor is shown in FIG. 1 (B). A current will flow through the internal diode 17 of the switch 13. Since the withstand current characteristic of the internal diode 17 is smaller than that of the semiconductor switch 13, an excessive load is applied to the internal diode 17.

Therefore, conventionally, as shown in FIGS. 2C and 3A, the current flowing through the internal diode 17 is controlled by controlling the semiconductor switch 13 to be in the ON state (by turning the feedback path ON). Is bypassed by the semiconductor switch 13 to prevent the internal diode 17 from being overloaded.

When the overcurrent flowing through the load 20 is eliminated, the semiconductor switch 14 is turned on and the semiconductor switch 13 is turned off in order to return to the normal PWM control, as shown in FIG. 3 (B).

The above is an example of the case where the current flows from the semiconductor switch 11 to the semiconductor switch 14, but as shown by the broken line arrow in FIG. 4, the same operation is performed even when the current flows from the semiconductor switch 13 to the semiconductor switch 12. It is possible. That is, in FIG. 5, it is assumed that an overcurrent is detected with respect to the load 20 at the timing indicated by the arrow. That is, it is assumed that an overcurrent is passed through the semiconductor switch 13, the load 20, and the semiconductor switch 12, as shown by the broken line arrow in FIG. 4A. In such a case, a control unit (not shown) turns off the semiconductor switch 12 (gate blocks). As a result, the current flowing through the load 20 can be cut off.

At this time, when the load 20 has an inductance component, the current tends to continue to flow through the load 20, so that the current flows through the internal diode 15 as shown in FIG. 4 (B). Since the withstand current characteristic of the internal diode 15 is smaller than that of the semiconductor switch 11, an excessive load is applied to the internal diode 15.

Therefore, as shown in FIGS. 5A and 6A, by controlling the semiconductor switch 11 to the ON state (turning the feedback path ON), the current flowing through the load 20 is bypassed to the semiconductor switch 11. This prevents the internal diode 15 from being overloaded.

When the overcurrent flowing through the load 20 is eliminated, the semiconductor switch 12 is turned on and the semiconductor switch 11 is turned off in order to return to the normal PWM control, as shown in FIG. 6B.

In the examples of FIGS. 1 and 2, an excessive current was detected when a current was flowing through the load 20 via the semiconductor switches 11 and 14, and the semiconductor switch 14 was turned off. As shown in A), the semiconductor switch 11 may be turned off (gate blocked). At that time, since the electric current passes through the internal diode 16, the load 20, and the semiconductor switch 14, the internal diode 16 is loaded. Therefore, in this case, by turning on the semiconductor switch 12 (turning on the feedback path) as shown in FIG. 7B, the current flowing through the internal diode 16 can be bypassed.

Further, in the examples of FIGS. 4 and 5, an excessive current is detected when a current is flowing through the load 20 via the semiconductor switches 13 and 12, and the semiconductor switch 12 is turned off. As shown in C), the semiconductor switch 13 may be turned off (gate blocked). At that time, since the current is passed through the internal diode 18, the load 20, and the semiconductor switch 12, the internal diode 18 is loaded. Therefore, in this case, by turning on the semiconductor switch 14 (turning on the feedback path) as shown in FIG. 8D, the current flowing through the internal diode 18 can be bypassed.

By the way, consider the case where the cascode type GaN-HEMT shown in FIG. 9 is used as the semiconductor switches 11 to 14. The cascode type GaN-HEMT (High Electron Mobility Transistor) shown in FIG. 9 is a Si-MOS (Metal Oxide Semiconductor) type FET (Field Effect Transistor) and a normally ON type that is turned on when no gate voltage is applied. GaN-HEMTs are cascode-connected.

In the cascode type GaN-HEMT shown in FIG. 9, when the drive voltage is not applied between the gate and the source, the Si-MOS is turned off, so that the gate voltage of the normally ON type GaN-HEMT is higher than that of the source. It becomes an off state because it becomes low. On the other hand, when a drive voltage is applied between the gate of the cascode type GaN-HEMT and the source, the Si-MOS is turned on, so the voltage of the gate of the normally ON type GaN-HEMT is substantially the same as that of the source. Since it becomes, it turns on.

The above is the operation when a forward voltage (drain voltage> source voltage) is applied between the drain and the source. When a voltage in the opposite direction (drain voltage <source voltage) is applied between the drain and the source, Si is determined by the relationship between Vgs (voltage between the gate and source) and Vth (threshold voltage), as shown in FIG. -Current flows through either the MOS or the internal diode. That is, when Vgs <Vth, a current flows through the internal diode as shown in FIG. 10 (A). Further, when Vgs> Vth, a current flows through the Si-MOS as shown in FIG. 10 (B).

By the way, the internal diode of the cascode type GaN-HEMT needs to be controlled so that the di / dt indicating the temporal change of the current does not exceed a predetermined threshold value. This is because when di / dt exceeds a predetermined threshold value, the internal diode may cause collapse due to the counter electromotive force due to the internal inductance component.

Therefore, in the embodiment of the present invention, di / dt exceeds a predetermined threshold value even when a semiconductor switch having an internal diode having a form such as the cascode type GaN-HEMT shown in FIGS. 9 and 10 is used. It is characterized by controlling so that there is no such thing. In the following, the cascode type GaN-HEMT will be shown in a simplified manner as shown at the tip of the arrow in FIG.

(A) Explanation of the configuration of the embodiment of the present invention FIG. 11 is a diagram showing a configuration example of the power conversion device 30 according to the embodiment of the present invention. In FIG. 11, the power conversion device 30 includes an electrolytic capacitor 19, a load 20, and a cascode type GaN-HEMT31 to 34.

Here, the electrolytic capacitor 19 smoothes and outputs the DC power supplied from a DC power source (not shown).

The cascode type GaN-HEMT31 to 34 has the configurations shown in FIGS. 9 and 10, and the on / off state is controlled by a drive signal supplied from a logic circuit 51 described later. For example, a DC voltage of 150 V is 100 V. It is converted to the AC voltage of and output. The output voltage may be changed by providing a step-up circuit or a step-down circuit in front of the circuit shown in FIG.

The cascode type GaN-HEMTs 31 and 32 are connected in series to form the first arm 312. A load 20 is connected between the source of the cascode type GaN-HEMT31 and the drain of the cascode type GaN-HEMT32 via the output terminal 21.

The cascode type GaN-HEMTs 33 and 34 are connected in series to form the second arm 334. A load 20 is connected between the source of the cascode type GaN-HEMT33 and the drain of the cascode type GaN-HEMT34 via the output terminal 22.

The load 20 is, for example, a home electric appliance, and has various impedance components depending on the type of product.

FIG. 12 shows a configuration example of the control circuit 50 for driving the cascode type GaN-HEMT31 to 34 shown in FIG. In the example of FIG. 12, the control circuit 50 has a logic circuit 51 and drive circuits 52 to 55.

The logic circuit 51 is a logic circuit having a configuration described later with reference to FIG. 14, and outputs a value corresponding to the logical value of the input signal. A drive PWM pulse, a polarity pulse, an overcurrent detection signal, and an overcurrent pulse are input to the logic circuit 51.

Here, the drive PWM pulse signal is a PWM signal in a normal state (when an abnormal current does not flow), and is, for example, a signal having a frequency of 100 kHz.

The polar pulse signal is a signal that repeats high (High) / low (Low) at the frequency of the AC power to be output (for example, 50 Hz or 60 Hz).

The overcurrent detection signal is a signal that is normally in a high state and is in a low state when an overcurrent flows through the load 20.

The overcurrent pulse signal is a PWM signal having a high frequency used during overcurrent, and is, for example, a signal of 1 MHz (a frequency of about 10 to 100 times that of a drive PWM pulse).

The drive circuits 52 to 55 amplify the power of the signal output from the logic circuit 51 and supply it to the gate of the cascode type GaN-HEMT31 to 34 as the Q1 drive signal to the Q4 drive signal.

FIG. 13 shows a circuit for generating a signal to be supplied to the logic circuit 51. FIG. 13A shows a circuit that generates and outputs a drive PWM pulse signal in a normal state and a circuit that generates and outputs a pulse signal in an overcurrent state in an abnormal state. In FIG. 13A, a sine wave of 50 Hz or 60 Hz is input to the comparator 61, and a triangular wave signal of 100 kHz or 1 MHz is input. For example, when the sine wave signal> the triangular wave signal, the output is high. In the case of a sine wave signal <triangle wave signal, the output is set to the low state, so that the PWM signal corresponding to the sine wave is output.

FIG. 13B shows a circuit that generates and outputs a polar pulse signal. In FIG. 13B, a 50 Hz or 60 Hz sine wave is input to the comparator 62, and a reference voltage Vref (for example, Vref = 0) is input. The comparator corresponds to a sine wave by, for example, setting the output to a high state when the sine wave signal> the reference voltage Vref and setting the output to the low state when the sine wave signal <reference voltage Vref. Generates and outputs a polar pulse signal.

FIG. 13C shows a circuit that generates and outputs an overcurrent detection signal. The example of FIG. 13C is composed of an amplifier 63 and a comparator 64. The amplifier 63 amplifies and outputs the voltage across the detection resistor for detecting the current flowing through the load 20 or the cascode type GaN-HEMT31 to 34, for example. The comparator 64 compares the output of the amplifier with the threshold voltage, and sets the output to the low state when the output of the amplifier> the threshold voltage, and sets the output to the high state when the output of the amplifier <the threshold voltage. As a result, an overcurrent detection signal is generated and output.

FIG. 14 shows a configuration example of the logic circuit 51 shown in FIG. In the example of FIG. 14, the logic circuit 51 includes NOT circuits 71 and 72, AND circuits 73 to 76, and OR circuits 77 and 78.

15 and 16 show the truth table of the circuit shown in FIG. Here, nOC indicates an overcurrent detection signal, OC_PWM indicates an overcurrent pulse signal, POLE indicates a polarity pulse signal, and PWM indicates a drive PWM pulse signal.

FIG. 15 shows a truth table at the time of overcurrent detection (nOC = 0). As shown in FIG. 15, Q3 and Q4 of the cascode type GaN-HEMT33 and 34 are changed only by POLE (polar pulse signal), and the influence of PWM (drive PWM pulse signal) and OC_PWM (overcurrent pulse signal) is not affected. I will not receive it. Further, Q1 and Q2 of the cascode type GaN-HEMT31 and 32 are set to 1 according to the POLE (polar pulse signal) when OC_PWM (overcurrent pulse signal) is 1. Further, when OC_PWM (pulse signal at the time of overcurrent) is 0, Q1 and Q2 remain 0. Further, when the overcurrent is detected, the diagonal elements (Q1, Q4 or Q2, Q3) are not turned on at the same time.

FIG. 16 shows a truth table during normal operation. As shown in FIG. 16, Q3 and Q4 are changed only by POLE (polarity pulse signal) and are not affected by PWM (drive PWM pulse signal) or OC_PWM (overcurrent pulse signal) (when overcurrent is detected). Since it is the same, it is not affected by nOC (overcurrent detection signal)). Further, Q1 and Q2 are changed only by PWM (drive PWM pulse signal). It is not affected by POLE (polar pulse signal) or OC_PWM (overcurrent pulse signal).

(B) Description of Operation of Embodiment of the Present Invention Next, the operation of the embodiment of the present invention will be described. FIG. 17 is a timing chart for explaining the operation of the embodiment of the present invention. As shown in FIG. 17, in the present embodiment, the PWM pulse signal is supplied to the cascode type GaN-HEMT31, 32, and the polar pulse signal is supplied to the cascode type GaN-HEMT 33, 34. The cascode type GaN-HEMT31 to 34 is turned on when the signal applied to the gate is in the high state, and turned off when the signal applied to the gate is in the low state. The state of is the same as that of the semiconductor switches 11 to 14 shown in FIG. 1 and the like.

When the cascode type GaN-HEMT33 and 34 are off and on, respectively, and the cascode type GaN-HEMT31 and 32 are on and off, respectively, the cascode type is shown by a broken line with a short interval in FIG. 11 (A). A current flows through the GaN-HEMT 31, the load 20, and the cascode type GaN-HEMT 34.

In such a state, if an overcurrent occurs as shown by an arrow in FIG. 17, the overcurrent detection signal becomes a low state. As a result, as shown in FIG. 17D, the logic circuit 51 sets the Q4 drive signal to the low state (gate blocks), so that the cascode type GaN-HEMT34 is turned off.

When the load 20 has an inductor component, when the cascode type GaN-HEMT34 is turned off, a current tends to continue to flow through the cascode type GaN-HEMT33. At this time, when the cascode type GaN-HEMT33 is maintained in the off state, all the current flows through the internal diode, so that di / dt may exceed the specified value.

Therefore, in the present embodiment, as shown by enlarging a part of FIG. 17 (C) in the lower row, the cascode type GaN-HEMT33 has a shorter period than usual (for example, a period of 1/10 to 1/100). Switch with. As a result, the current flowing through the cascode type GaN-HEMT33 alternately flows between the internal diode and Si-MOS as shown in FIGS. 10 (A) and 10 (B), so that the current flowing through the internal diode is di. It is possible to prevent the value of / dt from being exceeded.

In the above, when an overcurrent flows from the cascode type GaN-HEMT31 to the cascode type GaN-HEMT34, the cascode type GaN-HEMT34 is turned off, but the cascode type GaN-HEMT34 remains on. Then, the cascode type GaN-HEMT31 may be turned off. In that case, since a current flows through the internal diode of the cascode type GaN-HEMT32, in order to prevent the current flowing through the internal diode from exceeding the default value of di / dt, the cascode type GaN-HEMT32 is used more than usual. May be turned on / off in a short cycle.

Further, the above is the operation when an overcurrent flows when the cascode type GaN-HEMT31, 34 is on, but the same applies when an overcurrent flows when the cascode type GaN-HEMT32, 33 is on. The di / dt flowing through the internal diode may be reduced by the operation of.

More specifically, when an overcurrent is detected when the cascode type GaN-HEMT32, 33 is on, one of the cascode type GaN-HEMT32, 33 is turned off. For example, when the cascode type GaN-HEMT32 is turned off, the current tends to continue to flow through the internal diode of the cascode type GaN-HEMT31. In that case, the cascode type GaN-HEMT31 has a shorter period than usual. By switching at (for example, a cycle of 1/10 to 1/100), the current flowing through the internal diode can be reduced.

On the other hand, when the cascode type GaN-HEMT33 is turned off, the current tends to continue to flow through the internal diode of the cascode type GaN-HEMT34. In that case, the cascode type GaN-HEMT34 has a shorter period than usual. By switching at (for example, a cycle of 1/10 to 1/100), the current flowing through the internal diode can be reduced.

As described above, according to the embodiment of the present invention, in the power conversion device having the cascode type GaN-HEMT31 to 34, when an overcurrent is detected, the two cascodes are turned on. One of the types GaN-HEMT is turned off, and the other cascode type GaN-HEMT connected in series with the cascode type GaN-HEMT turned off is turned on in a period shorter than the normal period. Since it is turned off / off, the di / dt of the current flowing through the internal diode can be suppressed, and the internal diode can be prevented from being loaded or damaged.

(C) Description of Modified Embodiment The above embodiment is an example, and it goes without saying that the present invention is not limited to the cases described above. For example, in the above embodiment, as shown in FIG. 17, the cascode type GaN-HEMT corresponding to the feedback path (the cascode type GaN-HEMT33 in the example of FIG. 17) is turned on / off with the same duty ratio. For example, as shown in FIG. 18, the duty ratio may be changed so that the current flowing through the internal diode increases with the passage of time. According to such control, since the current flowing through the internal diode gradually increases, the di / dt of the current flowing through the internal diode can be suppressed more reliably. As a configuration for realizing such an operation, for example, a lamp function may be used as the Vin shown in FIG. 13 (A). Of course, other configurations may be used.

Further, in each of the above embodiments, the voltage for driving the cascode type GaN-HEMT corresponding to the feedback path is constant, but as shown in FIG. 19, for example, the current flowing through the internal diode increases with the passage of time. The drive voltage may be changed as described above. According to such control, since the current flowing through the internal diode gradually increases, the di / dt of the current flowing through the internal diode can be suppressed more reliably. As a configuration for realizing such an operation, for example, the product of the output signal of the comparator 61 shown in FIG. 13A and the ramp function may be calculated. Of course, other configurations may be used.

Further, as shown in FIG. 20, the duty ratio of the cascode type GaN-HEMT corresponding to the feedback path may be changed according to the duty ratio of the PWM pulse when the overcurrent is detected. More specifically, when the duty ratio of the PWM pulse when the overcurrent is detected is small, switching is performed at the small duty ratio as shown in FIG. 20 (E), and the PWM duty ratio when the overcurrent is detected is calculated. If it is large, switching may be performed at a large duty ratio as shown in FIG. 20 (F). According to such a configuration, switching can be performed with an appropriate duty ratio according to the current flowing through the internal diode. As a configuration for realizing such an operation, for example, the Vin shown in FIG. 13A may be changed according to the duty ratio of the PWM signal. Of course, other configurations may be used.

Further, in the above embodiment, the control when an overcurrent flows has been described as an example. However, for example, as shown in FIG. 21, when the cascode type GaN-HEMT is switched from the off state to the on state, the inside is used. In order to prevent an overcurrent from flowing through the diode, switching may be temporarily performed at a shorter cycle than usual. As a configuration for realizing such an operation, for example, when switching from off to on, the period of the oscillation signal supplied to the comparison circuit shown in FIG. 13 (A) is temporarily shortened. Just do it. Of course, other configurations may be used.

The circuits shown in FIGS. 11 to 14 and the like are examples, and the present invention is not limited to these circuits.

Further, in the above embodiment, the cascode type GaN-HEMT has been described as an example of the semiconductor switch, but other semiconductor switches may be used.

10 Power converter 11-14 Semiconductor switch 15-18 Internal diode 19 Electrolytic capacitor 20 Load 21-22 Output terminal 30 Power converter 50 Control circuit 51 Logic circuit 52-55 Drive circuit 61, 62, 64 Comparer 63 Amplifier 71, 72 NOT circuit 73-76 AND circuit 77,78 OR circuit 112,312 1st arm 134,334 2nd arm

Claims (7)

The first arm, which consists of two semiconductor switches with internal diodes connected in series,
A second arm that is connected in parallel with the first arm and is configured by connecting two semiconductor switches having the internal diode in series.
Output terminals provided at the midpoint of the first arm and the midpoint of the second arm to which a load is connected, and
Control to convert DC power applied to the first arm and the second arm into AC power by controlling on / off of the first arm and the semiconductor switch constituting the second arm at a predetermined cycle. Has control means and
When a forward current flows through the internal diode of the semiconductor switch constituting the first arm and the second arm, the control means causes the semiconductor switch having the internal diode to have the predetermined period. By controlling on / off in a shorter cycle, control is performed to suppress the current flowing through the internal diode.
A power conversion device characterized by that. The control means passes a current through the load by turning on two of the semiconductor switches located on the diagonal of one of the four semiconductor switches constituting the first arm and the second arm. At that time, when an overcurrent is detected, one of the two semiconductor switches that are turned on is turned off, and the other semiconductor in the same arm as the semiconductor switch that is turned off is turned off. The power conversion device according to claim 1, wherein the switch is controlled to be turned on / off in a cycle shorter than the predetermined cycle to suppress the current flowing through the internal diode. When the overcurrent is detected, the control means controls on / off of the other semiconductor switch in the same arm as the semiconductor switch turned off in a cycle shorter than the predetermined cycle, and also controls the on / off. The power conversion device according to claim 2, wherein the power conversion device is controlled so that the duty ratio is increased. When the overcurrent is detected, the control means controls on / off of the other semiconductor switch in the same arm as the semiconductor switch turned off in a cycle shorter than the predetermined cycle. The power conversion device according to claim 2, wherein the power conversion device is controlled so that the control voltage at the time of turning on is increased. The control means turns on the two semiconductor switches located on one of the diagonal lines of the first arm and the four semiconductor switches constituting the second arm in response to PWM control. When an overcurrent is detected while passing a current through the load, one of the two semiconductor switches that are turned on is turned off, and the same arm as the semiconductor switch that is turned off. The other semiconductor switch in the above has a period shorter than the predetermined period, and the internal diode is controlled by on / off control according to a duty ratio according to the pulse width of the PWM control at the time when the overcurrent is detected. The power conversion device according to claim 1, wherein the control for suppressing the flowing current is performed. The first aspect of the present invention is characterized in that, when the semiconductor switch is switched from off to on, the control means executes control for turning on / off the semiconductor switch at a cycle shorter than the predetermined cycle for a predetermined period. The power converter described. The power conversion device according to any one of claims 1 to 6, wherein the semiconductor switch is a cascode type GaN-HEMT.