JP7200615B2 - detector - Google Patents

Description

The present invention relates to a detection device such as a humidity detection device.

2. Description of the Related Art As a detection device, for example, a humidity detection device is of a capacitance type that uses, as a dielectric, a moisture-sensitive film formed of a polymer material whose dielectric constant changes according to the amount of absorbed moisture. In this capacitance-type humidity detector, a humidity-sensitive film is arranged between electrodes, and humidity (relative humidity) is obtained by measuring the capacitance between the electrodes (see, for example, Patent Document 1).

In the humidity detection device described in Patent Document 1, a sensor unit whose capacitance changes according to humidity and a circuit unit that performs processing such as converting electric charges output from the sensor unit into voltage are arranged side by side on a substrate. ing.

As a circuit unit used in such a capacitance-type humidity detection device, a configuration is known in which a charge output from a sensor unit is converted into a voltage by a charge amplifier (see, for example, Patent Document 2). In addition to the charge amplifier, this circuit section is provided with a drive circuit and the like for driving the sensor section with a square-wave AC drive signal.

Patent No. 5547296 Patent No. 6228865

In the humidity detection device described in Patent Document 1, the sensor section and the circuit section are arranged side by side. A stack structure in which the sensor unit is mounted is assumed.

When the sensor section and the circuit section are arranged side by side, the influence of noise transmitted between them is small because they are separated from each other. are close to each other, there is concern about the influence of noise.

In particular, as described above, when the sensor section is driven by the AC drive signal from the circuit section, large noise can occur in both the sensor section and the circuit section, so it is desirable to improve noise immunity. .

An object of the present invention is to improve noise immunity.

The disclosed technology includes a semiconductor substrate of a first conductivity type, a detection unit provided above the semiconductor substrate and configured to output a signal corresponding to a physical quantity, and the semiconductor substrate below the detection unit or in the detection unit. and a noise suppression layer provided between the semiconductor substrate, the detection unit having a humidity detection capacitor, the humidity detection capacitor having a lower electrode formed above the semiconductor substrate and an upper electrode, and a moisture-sensitive film disposed between the lower electrode and the upper electrode, wherein the detection unit is driven by an AC drive signal to output a signal corresponding to humidity, and the The noise suppression layer is composed of a diffusion layer of a second conductivity type arranged in a part of the semiconductor substrate, and a fixed potential as a reverse bias is applied to a pn junction between the semiconductor substrate and the diffusion layer. detection device.

According to the present invention, noise immunity can be improved.

It is a figure which illustrates schematic structure of the humidity detection apparatus which concerns on 1st Embodiment. FIG. 2 is a cross-sectional view schematically showing a cross section taken along line AA in FIG. 1; FIG. 3 is a plan view of the humidity detection device with the mold resin removed; It is a schematic plan view showing the configuration of a sensor chip. 1 is a circuit diagram illustrating the configuration of an ESD protection circuit; FIG. FIG. 3 is a diagram illustrating a layer structure of an NMOS transistor that constitutes an ESD protection circuit; 4 is a circuit diagram illustrating the configuration of a humidity detection unit; FIG. It is a schematic sectional view for explaining the element structure of the sensor chip. 4 is a plan view illustrating shapes of a lower electrode and an upper electrode; FIG. 1 is a diagram illustrating the configuration of an ASIC chip; FIG. 4 is a timing chart for explaining a measurement sequence; FIG. 7 is a schematic cross-sectional view for explaining the element structure of the sensor chip in the second embodiment; FIG. 11 is a schematic cross-sectional view for explaining the element structure of the sensor chip in the third embodiment;

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments for carrying out the invention will be described with reference to the drawings. In each drawing, the same components are denoted by the same reference numerals, and redundant description may be omitted. In addition, in the present disclosure, humidity when simply described as humidity means relative humidity.

<First embodiment>
[Outline configuration]
A configuration of the humidity detection device 10 according to the first embodiment of the present invention will be described.

FIG. 1 is a diagram illustrating a schematic configuration of a humidity detection device 10 according to the first embodiment. FIG. 1A is a top plan view of the humidity detection device 10. FIG. FIG. 1B is a bottom view of the humidity detection device 10 viewed from below. FIG. 1(C) is a side view of the humidity detection device 10 viewed from the lateral direction. FIG. 2 is a cross-sectional view schematically showing a cross section taken along line AA in FIG. 1(A).

The humidity detection device 10 has a substantially rectangular planar shape, and one of two pairs of opposing sides is parallel to the X direction and the other is parallel to the Y direction. The X direction and the Y direction are orthogonal to each other. Also, the humidity detection device 10 has a thickness in the Z direction perpendicular to the X and Y directions. The planar shape of the humidity detection device 10 is not limited to a rectangular shape, and may be circular, elliptical, polygonal, or the like.

The humidity detection device 10 includes a sensor chip 20 as a first semiconductor chip, an ASIC (Application Specific Integrated Circuit) chip 30 as a second semiconductor chip, a mold resin 40 as a sealing member, and a plurality of lead terminals 41. have

The sensor chip 20 is laminated on the ASIC chip 30 via a first DAF (Die Attach Film) 42 . That is, the sensor chip 20 and the ASIC chip 30 have a stack structure.

The sensor chip 20 and the ASIC chip 30 are electrically connected by a plurality of first bonding wires 43 . The ASIC chip 30 and the plurality of lead terminals 41 are electrically connected by a plurality of second bonding wires 44 .

The sensor chip 20, the ASIC chip 30, the plurality of first bonding wires 43, the plurality of second bonding wires 44, and the plurality of lead terminals 41 laminated in this manner are sealed with the mold resin 40 and packaged. ing. This package method is called a PLP (Plating Lead Package) method.

On the bottom surface of the ASIC chip 30, the second DAF 45 used for packaging by the PLP method remains, although the details will be described later. The second DAF 45 has a role of insulating the bottom surface of the ASIC chip 30 . A second DAF 45 and a plurality of lead terminals 41 are exposed on the lower surface of the humidity detection device 10 .

Each lead terminal 41 is made of nickel or copper. The first DAF 42 and the second DAF 45 are each made of an insulating material such as a mixture of resin and silica. The molding resin 40 is a black resin having a light shielding property such as an epoxy resin containing a mixture of carbon black, silica, or the like.

An opening 50 is formed on the upper surface side of the humidity detection device 10 to expose a part of the sensor chip 20 from the mold resin 40 . The opening 50 has, for example, a tapered wall, and the opening area becomes smaller downward. The lowermost portion of the opening 50 that actually exposes the sensor chip 20 is called an effective opening 51 .

When forming the opening 50 , the mold is pressed against the sensor chip 20 and sealed with the molding resin 40 . The pressing force exerted by the mold on the sensor chip 20 and the ASIC chip 30 at this time may cause damage such as chip cracking. In order to prevent this breakage, the thickness T1 of the sensor chip 20 and the thickness T2 of the ASIC chip 30 are each preferably 200 μm or more, for example.

FIG. 3 is a plan view of the humidity detection device 10 with the mold resin 40 removed. As shown in FIG. 3, the sensor chip 20 and the ASIC chip 30 each have a substantially rectangular planar shape and have two sides parallel to the X direction and two sides parallel to the Y direction. The sensor chip 20 is smaller than the ASIC chip 30 and is stacked on the surface of the ASIC chip 30 with the first DAF 42 interposed therebetween.

The sensor chip 20 is provided with the humidity detector 21 in the area exposed by the effective opening 51 . A noise suppression layer 200 for suppressing noise is provided in the p-type semiconductor substrate 70 (see FIG. 8) below the humidity detection section 21 .

A plurality of bonding pads (hereinafter simply referred to as pads) 24 are formed at the end of the sensor chip 20 . In this embodiment, five pads 24 are formed. The pads 24 are made of, for example, aluminum or an aluminum silicon alloy (AlSi).

The ASIC chip 30 is a semiconductor chip for driving and signal processing, and performs operations described later.

A plurality of first pads 35 and a plurality of second pads 36 are provided in a region of the surface of the ASIC chip 30 that is not covered with the sensor chip 20 . The first pads 35 and the second pads 36 are made of, for example, aluminum or an aluminum silicon alloy (AlSi).

The first pads 35 are connected to corresponding pads 24 of the sensor chip 20 via first bonding wires 43 . The second pads 36 are connected to corresponding lead terminals 41 via second bonding wires 44 . The lead terminals 41 are arranged around the ASIC chip 30 .

[Configuration of sensor chip]
Next, the configuration of the sensor chip 20 will be described.

FIG. 4 is a schematic plan view showing the configuration of the sensor chip 20. As shown in FIG. The aforementioned pad 24 is a terminal used for external voltage application and potential detection. In FIG. 4, the plurality of pads 24 shown in FIG. 3 are shown separately from the pads 24a to 24e. The pads 24a to 24e are simply referred to as pads 24 when there is no need to distinguish between them.

The pad 24a functions as a ground electrode terminal (GND) grounded to ground potential. The pad 24a is electrically connected to a p-type semiconductor substrate 70 (see FIG. 8) that constitutes the sensor chip 20. As shown in FIG.

The pad 24 b is a signal terminal TS electrically connected to the lower electrode 83 of the humidity detection section 21 . The pad 24c is the first drive terminal T1 electrically connected to the upper electrode 84 of the humidity detection section 21 . The pad 24d is a second drive terminal T2 electrically connected to the reference electrode 82 (see FIG. 8) of the humidity detector 21. As shown in FIG.

The pad 24e is a power supply terminal (VDD) for supplying power supply voltage. Pad 24 e is electrically connected to noise suppression layer 200 .

An electrostatic discharge (ESD) protection circuit 60 is connected to each of the pads 24b to 24e other than the pad 24a. Each ESD protection circuit 60 is connected between each of the pads 24b to 24e as input terminals or output terminals and the pad 24a as a ground electrode terminal. In this embodiment, the ESD protection circuit 60 is composed of one diode 61 . The diode 61 has an anode connected to the pad 24a and a cathode connected to one of the pads 24b to 24e.

The ESD protection circuit 60 is preferably arranged near the pads 24b-24e so as to be as far away from the effective opening 51 as possible. Since the ESD protection circuit 60 is covered with the mold resin 40, unnecessary charge generation due to the photoelectric effect does not occur.

[Configuration of ESD protection circuit]
Next, the configuration of the ESD protection circuit 60 will be described.

FIG. 5 is a circuit diagram illustrating the configuration of the ESD protection circuit 60. As shown in FIG. As shown in FIG. 5, the diode 61 forming the ESD protection circuit 60 is formed of, for example, an N-channel MOS (Metal-Oxide-Semiconductor) transistor (hereinafter referred to as an NMOS transistor). Specifically, the diode 61 is formed by short-circuiting the source, gate, and back gate of an NMOS transistor (so-called diode connection). This short circuit functions as an anode. The drain of this NMOS transistor functions as the cathode.

FIG. 6 is a diagram illustrating the layer structure of the NMOS transistor that constitutes the ESD protection circuit 60. As shown in FIG. This NMOS transistor has two n-type diffusion layers 71 and 72 formed on the surface layer of a p-type semiconductor substrate 70 for constituting the sensor chip 20 , a contact layer 73 and a gate electrode 74 . A gate electrode 74 is formed on the surface of the p-type semiconductor substrate 70 with a gate insulating film 75 interposed therebetween. A gate electrode 74 is arranged between the two n-type diffusion layers 71 and 72 .

For example, the n-type diffusion layer 71 functions as a source and the n-type diffusion layer 72 functions as a drain. Contact layer 73 is a low-resistance layer (p-type diffusion layer) for electrical connection with p-type semiconductor substrate 70 as a back gate. The n-type diffusion layer 71, the gate electrode 74 and the contact layer 73 are commonly connected and short-circuited. This short-circuit portion functions as an anode, and the n-type diffusion layer 72 functions as a cathode.

The p-type semiconductor substrate 70 is, for example, a p-type silicon substrate. The gate electrode 74 is made of metal or polycrystalline silicon (polysilicon). The gate insulating film 75 is made of, for example, an oxide film such as silicon dioxide.

[Configuration of Humidity Detector]
Next, the configuration of the humidity detector 21 will be described.

FIG. 7 is a circuit diagram illustrating the configuration of the humidity detection section 21. As shown in FIG. As shown in FIG. 7 , the humidity detection section 21 has a humidity detection capacitor 80 and a reference capacitor 81 .

One electrode (lower electrode 83) of the humidity detector 21 is connected to a pad 24b as a signal terminal TS. The other electrode (upper electrode 84) of the humidity detector 21 is connected to the pad 24c as the first drive terminal T1. One electrode of the reference capacitor 81 is shared with one electrode (lower electrode 83 ) of the humidity detection section 21 . The other electrode (reference electrode 82) of the reference capacitor 81 is connected to the pad 24d as the second drive terminal T2.

The humidity detection capacitor 80 is provided with a humidity sensitive film 86, which will be described later, between electrodes. The humidity sensitive film 86 is made of a polymeric material such as polyimide that absorbs moisture in the air and changes its dielectric constant according to the amount of moisture absorbed. Therefore, the capacitance of the humidity detection capacitor 80 changes according to the amount of moisture absorbed by the humidity sensitive film 86 .

The reference capacitor 81 is provided with a second insulating film 111 (see FIG. 8), which will be described later, between electrodes. The second insulating film 111 is made of an insulating material such as silicon dioxide (SiO ₂ ) that does not absorb moisture. Therefore, the capacitance of the reference capacitor 81 does not change, or changes very little.

Since the amount of moisture contained in the humidity sensitive film 86 corresponds to the humidity around the humidity detection device 10, by detecting the difference between the capacitance of the humidity detection capacitor 80 and the capacitance of the reference capacitor 81, , relative humidity can be measured. This relative humidity measurement is performed by the ASIC chip 30 .

[Sensor chip element structure]
Next, the element structure of the sensor chip 20 will be explained.

FIG. 8 is a schematic cross-sectional view for explaining the element structure of the sensor chip 20. As shown in FIG. In FIG. 8, the pads 24a, 24b, 24c, and 24e are shown in the same cross section as the humidity detector 21, but this is shown to facilitate understanding of the structure. It does not mean that they exist within the same cross section. The cross section of the humidity detection unit 21 is also simplified for easy understanding of the structure.

As shown in FIG. 8, the sensor chip 20 is formed using the p-type semiconductor substrate 70 described above. A noise suppression layer 200 and a contact layer 100 are formed on the surface layer of the p-type semiconductor substrate 70 . The noise suppression layer 200 is formed of an n-type diffusion layer having a polarity opposite to that of the p-type semiconductor substrate 70 . Contact layer 100 is formed of a p-type diffusion layer.

Each layer in the p-type semiconductor substrate 70 is formed using a normal semiconductor manufacturing process (CMOS process). Therefore, the noise suppression layer 200 can also be formed in the same manufacturing process as the n-type diffusion layers 71 and 72 of the ESD protection circuit 60 . The noise suppression layer 200 and the n-type diffusion layers 71 and 72 are formed by an ion implantation process of doping impurities into the substrate by ion-implanting n-type impurities (for example, phosphorus).

The noise suppression layer 200 and the n-type diffusion layers 71 and 72 can be formed by a thermal diffusion process in which impurities are added by heat treatment instead of the ion implantation process.

A first insulating film 110 , a second insulating film 111 and a third insulating film 112 are laminated in this order on the surface of the p-type semiconductor substrate 70 . These are made of an insulating material such as silicon dioxide (SiO ₂ ) or silicon nitride (SiN).

A first wiring layer 120 is formed on the first insulating film 110 . A second wiring layer 121 is formed on the second insulating film 111 . The second insulating film 111 covers the first wiring layer 120 . The third insulating film 112 covers the second wiring layer 121 . The first wiring layer 120 and the second wiring layer 121 are made of a conductive material such as aluminum.

A first plug layer 122 having a plurality of first plugs for connecting the first wiring layer 120 to the p-type semiconductor substrate 70 is formed in the first insulating film 110 . A second plug layer 123 having a plurality of second plugs for connecting the first wiring layer 120 and the second wiring layer 121 is formed in the second insulating film 111 . The first plug layer 122 and the second plug layer 123 are made of a conductive material such as tungsten.

A wiring 108 for applying a power supply voltage to the noise suppression layer 200 is formed of the first wiring layer 120 . The wiring 108 has one end connected to the noise suppression layer 200 via the first plug layer 122 and the other end connected to the pad 24 e via the second plug layer 123 and the second wiring layer 121 .

The reference electrode 82 of the reference capacitor 81 is formed by the first wiring layer 120, and is connected to the pad 24d (not shown in FIG. 8) as the second drive terminal T2 via the second plug layer 123 and the second wiring layer 121. )It is connected to the.

The lower electrode 83 of the humidity detection capacitor 80 is formed of the second wiring layer 121 and connected to the pad 24b as the signal terminal TS. Furthermore, the wiring 85 for connecting the upper electrode 84 of the humidity detection capacitor 80 to the pad 24c as the first drive terminal T1 is formed of the second wiring layer 121. As shown in FIG. Note that the lower electrode 83 is arranged at a position facing the reference electrode 82 with the second insulating film 111 interposed therebetween.

The pads 24a to 24e are formed on the third insulating film 112 with a conductive material such as aluminum, and are connected to the second wiring layer 121 through the third insulating film 112. FIG.

A humidity sensitive film 86 is formed on the third insulating film 112 . The humidity sensitive film 86 has a thickness of 0.5 μm to 1.5 μm and is made of a polymeric material that easily adsorbs and desorbs water molecules according to humidity. The moisture sensitive film 86 is, for example, a polyimide film with a thickness of 1 μm. The polymeric material forming the moisture-sensitive film 86 is not limited to polyimide, and may be cellulose, polymethylmethacrylate (PMMA), polyvinyl alcohol (PVA), or the like.

The upper surface of the humidity sensitive film 86 is flat, and a planar upper electrode 84 is formed on this upper surface. The upper electrode 84 is formed at a position facing the lower electrode 83 with the humidity sensitive film 86 interposed therebetween. A portion of the upper electrode 84 is connected to the wiring 85 . The upper electrode 84 is, for example, a conductive film made of aluminum or the like with a thickness of 200 nm. In addition, the upper electrode 84 is formed with a plurality of openings 84a so that water molecules in the air are efficiently taken into the humidity sensitive film 86. As shown in FIG.

An overcoat film 87 is provided on the humidity sensitive film 86 so as to cover the upper electrode 84 . The overcoat film 87 is made of a polymeric material, for example, the same material as the moisture sensitive film 86 . The thickness of the overcoat film 87 is, for example, 0.5 μm to 10 μm.

The humidity sensitive film 86 and the overcoat film 87 are formed with openings exposing the pads 24a to 24e.

Thus, the lower electrode 83 and the upper electrode 84 constitute the parallel-plate humidity detection capacitor 80 . The lower electrode 83 and the reference electrode 82 constitute a parallel-plate reference capacitor 81 . Also, the humidity detection capacitor 80 and the reference capacitor 81 are arranged above the noise suppression layer 200 . That is, the reference electrode 82 is arranged between the noise suppression layer 200 and the lower electrode 83 .

By applying the power supply voltage to the noise suppression layer 200, the pn junction generated between the noise suppression layer 200 and the p-type region of the p-type semiconductor substrate 70 is reverse biased, and the depletion layer spreads.

FIG. 9 is a plan view illustrating shapes of the lower electrode 83 and the upper electrode 84. FIG. As shown in FIG. 9, both the lower electrode 83 and the upper electrode 84 are rectangular. The upper electrode 84 is formed so as to cover the lower electrode 83 .

The opening 84a is preferably as small as possible, and the smaller the opening, the more the electric field is prevented from leaking into the air. Actually, a large number of openings 84a are formed. In addition, the opening 84a is not limited to a square shape, and may be an elongated strip shape or a circular shape. Also, the openings 84a may be arranged in a zigzag pattern. The openings 84a are preferably circular and staggered.

Although not shown in FIG. 9, a rectangular reference electrode 82 is formed below the lower electrode 83 .

[Configuration of ASIC chip]
Next, the configuration of the ASIC chip 30 will be described.

FIG. 10 is a diagram illustrating the configuration of the ASIC chip 30. As shown in FIG. As shown in FIG. 10, the ASIC chip 30 has a driving section 300 , a charge amplifier 301 , a control section 302 and an AD converter (ADC) 303 .

The driving section 300 includes a first driving circuit DRV1 and a second driving circuit DRV2. The charge amplifier 301 is a charge-voltage conversion (CV conversion) section including a capacitor C1, an operational amplifier OP1, and a switch circuit SW1.

The first drive circuit DRV<b>1 applies a first drive signal, which is a square-wave AC drive signal, to the first drive terminal T<b>1 of the sensor chip 20 under the control of the control unit 302 . Under the control of the control unit 302, the second drive circuit DRV2 supplies the second drive terminal T2 of the sensor chip 20 with a square-wave AC drive signal, which is the second drive signal reverse to the first drive signal. Apply a signal. The high level of the first drive signal and the second drive signal is equal to, for example, power supply voltage VDD, and the low level thereof is equal to, for example, ground potential GND.

The first drive signal and the second drive signal have opposite phases to each other. That is, when the first drive signal is at high level, the second drive signal is at low level, and when the first drive signal is at low level, the second drive signal is at high level.

The capacitor C1 has one end connected to the signal terminal TS of the sensor chip 20 and the other end connected to the output of the operational amplifier OP1.

The operational amplifier OP1 has an inverting input terminal connected to the signal terminal TS, and a non-inverting input terminal to which the reference voltage Vref is input. The reference voltage Vref is, for example, an intermediate value between the high level and the low level of the first drive signal and the second drive signal.

Since the operational amplifier OP1 has a very large voltage gain, the voltage at the signal terminal TS is substantially equal to the reference voltage Vref. Further, since the input impedance of the inverting input terminal of the operational amplifier OP1 is very high, almost no current flows into the inverting input terminal. The operational amplifier OP1 outputs a voltage Vo obtained by amplifying the difference between the voltage of the signal terminal TS and the reference voltage Vref.

The switch circuit SW1 is a circuit for discharging charges accumulated in the capacitor C1, and is connected in parallel with the capacitor C1. The switch circuit SW1 is turned on or off under the control of the control section 302 .

The ADC 303 converts the output voltage Vo of the operational amplifier OP1 into a digital signal Ds under the control of the control section 302 .

A control unit 302 controls each unit in the ASIC chip 30 . The control unit 302 executes the generation of the drive signal by the drive unit 300, the discharge of the capacitor C1 by the switch circuit SW1, and the analog-to-digital conversion operation by the ADC 303 based on a predetermined measurement sequence.

FIG. 11 is a timing chart explaining the measurement sequence. In the measurement sequence, the control section 302 controls each section so as to alternately repeat the reset period Trst and the charge transfer period Tchg. In the reset period Trst, the control unit 302 turns on the switch circuit SW1 to discharge the capacitor C1, sets the first drive signal to high level, and sets the second drive signal to low level. In the charge transfer period Tchg, the control unit 302 turns off the switch circuit SW1 to make the capacitor C1 chargeable, sets the first drive signal to low level, and sets the second drive signal to high level.

By this control, the voltage Vo represented by the following formula (1) is output from the charge amplifier 301 in the charge transfer period Tchg.

Vo=VDD×(Cs−Cr)/C1+Vref (1)
Here, Cs is the capacitance of the humidity detection capacitor 80 and Cr is the capacitance of the reference capacitor 81 .

The control unit 302 performs humidity calculation processing using the digital signal Ds output from the ADC 303 to calculate the relative humidity (% RH).

[effect]
In the above measurement sequence, since the first AC drive signal and the second AC drive signal are input to the humidity detection unit 21 of the sensor chip 20, the potential of the upper electrode 84 of the humidity detection capacitor 80 and the reference voltage of the reference capacitor 81 The potential of the electrode 82 repeats reversal over time. In this manner, the potential difference between the electrodes of the humidity detection capacitor 80 and the reference capacitor 81 constantly changes, so current flows through the electrode wiring each time the potential is reversed.

If the noise suppressing layer 200 were not present, a current would flow from the humidity detector 21 to the p-type semiconductor substrate 70 and become a noise source. If noise occurs in the p-type semiconductor substrate 70 , it may affect the operation of the ASIC chip 30 . Also, noise generated in the ASIC chip 30 may affect the operation of the sensor chip 20 . In order to suppress the influence of such noise between chips, it is conceivable to interpose an insulating layer between the chips. However, disposing an insulating layer between chips is not preferable because it is necessary to thin each chip in order to meet the demand for miniaturization and thinning.

In this embodiment, since the noise suppression layer 200 to which a fixed potential is applied is provided on the surface layer of the p-type semiconductor substrate 70 located below the humidity detection unit 21 , the noise suppression layer 200 from the humidity detection unit 21 to the p-type semiconductor substrate 70 is provided. reduces the amount of current flowing into the , and suppresses the generation of noise. Also, the noise suppression layer 200 reduces the influence of noise from the ASIC chip 30 on the humidity detection section 21 .

Further, in this embodiment, the noise suppression layer 200 is an n-type diffusion layer, and a fixed potential is applied to the noise suppression layer 200 to reverse bias the pn junction with the p-type semiconductor substrate 70 . This spreads the depletion layer and improves noise immunity.

In the above embodiment, the fixed potential applied to the noise suppression layer 200 is the same power supply voltage VDD as the high level of the drive signal for driving the sensor chip 20, but a fixed potential higher than the high level is applied. is also preferred.

Further, in the above embodiment, the noise suppression layer 200 is formed on the surface layer of the p-type semiconductor substrate 70, but the noise suppression layer 200 is not limited to the surface layer of the p-type semiconductor substrate 70. It may be formed at a deep position.

<Second embodiment>
Next, a humidity detection device according to a second embodiment will be described.

In the first embodiment, the polarity of the semiconductor substrate constituting the sensor chip is p-type, but in the second embodiment the polarity of the semiconductor substrate is n-type.

FIG. 12 is a schematic cross-sectional view for explaining the element structure of the sensor chip 20a in the second embodiment. In this embodiment, a noise suppression layer 200a made of a p-type diffusion layer and a contact layer 100a made of an n-type diffusion layer are formed in an n-type semiconductor substrate 70a.

In this embodiment, a high potential is applied to the n-type semiconductor substrate 70a by applying the power supply voltage VDD to the pad 24a. Further, in the present embodiment, the noise suppressing layer 200a is set at a low potential by applying the ground potential GND to the pad 24e. As a result, also in this embodiment, the pn junction between the noise suppression layer 200 and the p-type semiconductor substrate 70 is reverse-biased, and the depletion layer spreads.

In this embodiment, since the ESD protection circuit 60 is also formed of the n-type semiconductor substrate 70a, the polarities of the respective diffusion layers may be reversed.

The configuration of the humidity detection device according to this embodiment is the same as that of the humidity detection device according to the first embodiment, except that the layers in the semiconductor substrate have different polarities.

The humidity detection device according to this embodiment has the same effects as the humidity detection device according to the first embodiment.

The noise suppression layer 200a is not limited to the surface layer of the n-type semiconductor substrate 70a, and may be formed at a deep position within the n-type semiconductor substrate 70a.

<Third Embodiment>
Next, a humidity detection device according to a third embodiment will be described.

Although the noise suppression layer is formed in the semiconductor substrate in the first and second embodiments, the noise suppression layer is formed above the semiconductor substrate in the third embodiment.

FIG. 13 is a schematic cross-sectional view for explaining the element structure of the sensor chip 20b in the third embodiment. In this embodiment, the noise suppression layer 200b is provided on the p-type semiconductor substrate 70 with the insulating film 400 interposed therebetween.

The insulating film 400 is a layer corresponding to the gate insulating film 75 of the ESD protection circuit 60 and is formed in the same manufacturing process as the gate insulating film 75 . The insulating film 400 also exists in the sensor chips 20 and 20a in the first and second embodiments, but is simply omitted from FIGS.

The noise suppression layer 200b is a conductive layer made of metal or polycrystalline silicon (polysilicon). The noise suppression layer 200b is a layer corresponding to the gate electrode 74 of the ESD protection circuit 60, and is formed in the same manufacturing process as the gate electrode 74. FIG.

A fixed potential is applied to the noise suppression layer 200b. Specifically, the noise suppression layer 200b is electrically connected to the pad 24e, and the power supply voltage VDD is applied from the pad 24e. Note that the fixed potential applied to the noise suppression layer 200b is not limited to the power supply voltage VDD, and may be a potential higher than the power supply voltage VDD.

In this embodiment, since the noise suppression layer 200b having a fixed potential is provided between the humidity detection section 21 and the p-type semiconductor substrate 70, current flows from the humidity detection section 21 to the p-type semiconductor substrate 70. is reduced, and noise generation is suppressed. Also, the noise suppression layer 200 reduces the influence of noise from the ASIC chip 30 on the humidity detection section 21 .

Although the polarity of the semiconductor substrate is p-type in this embodiment, the polarity of the semiconductor substrate may be n-type as in the second embodiment.

<Modification>
Other modifications will be described below.

In each of the above-described embodiments, a noise suppression layer and an ESD protection circuit are formed on the semiconductor substrate that constitutes the sensor chip, but a temperature detection section may also be formed. This temperature detection section can be formed by an npn-type or pnp-type bipolar transistor, one or more pn junction diodes, an impurity diffusion layer as a resistor, or the like. The temperature detection part is preferably formed at a position exposed from the opening 50 . The temperature detection section can be formed by the same manufacturing process as the noise suppression layer and the ESD protection circuit.

The present invention can also be applied to a detection device that detects physical quantities other than humidity. That is, instead of the humidity detector 21, it is possible to provide a detector that outputs a signal corresponding to a physical quantity other than humidity.

Further, in each of the above-described embodiments, the noise suppression layer is arranged below the temperature detection section to suppress noise in the temperature detection section. It can be placed directly below. Also in this case, for the same reason as in the above-described embodiments, it is possible to suppress noise in the lead-out wiring.

In addition, in the present disclosure, the positional relationship between two elements represented by the words “cover” and “on” means that the first element is indirectly provided on the surface of the second element via another element. It includes both cases where it is provided and cases where it is provided directly.

Although the preferred embodiments of the present invention have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications can be made to the above-described embodiments without departing from the scope of the present invention. and substitutions can be added.

10 humidity detection device (detection device), 20, 20a, 20b sensor chip (first semiconductor chip), 21 humidity detection unit (detection unit), 24 pad, 30 ASIC chip (second semiconductor chip), 40 mold resin, 50 opening 51 effective opening 60 ESD protection circuit 70 p-type semiconductor substrate 70a n-type semiconductor substrate 80 humidity detection capacitor 81 reference capacitor 82 reference electrode 83 lower electrode 84 upper electrode 86 sensor Wet film 87 Overcoat film 200, 200a, 200b Noise suppression layer 300 Drive unit 301 Charge amplifier (charge-voltage conversion unit) 400 Insulating film

Claims (7)

a first conductivity type semiconductor substrate;
a detection unit provided above the semiconductor substrate for outputting a signal corresponding to a physical quantity;
a noise suppression layer provided in the semiconductor substrate below the detection unit or between the detection unit and the semiconductor substrate;
with
The detection unit has a humidity detection capacitor,
the humidity detection capacitor includes a lower electrode formed above the semiconductor substrate, an upper electrode, and a humidity sensitive film disposed between the lower electrode and the upper electrode;
The detection unit is driven by an AC drive signal and outputs a signal corresponding to humidity,
wherein the noise suppression layer comprises a diffusion layer of a second conductivity type disposed on a portion of the semiconductor substrate;
A fixed potential as a reverse bias is applied to the pn junction between the semiconductor substrate and the diffusion layer.
detection device. The detection unit is
the lower electrode;
a reference electrode disposed between the noise suppression layer and the lower electrode;
an insulating film disposed between the reference electrode and the lower electrode;
2. The detection device of claim 1 , comprising a reference capacitor composed of: 3. The detection device according to claim 1, wherein the humidity sensitive film is made of polyimide. a first semiconductor chip including the semiconductor substrate, the detection unit, and the noise suppression layer;
a second semiconductor chip including a drive section for driving the detection section and a charge-voltage conversion section for converting the charge output from the detection section into a voltage;
has
4. The detection device according to claim 1 , wherein said first semiconductor chip is stacked on said second semiconductor chip. 5. The detection device according to claim 4 , wherein the drive section applies an AC drive signal to the detection section. a first semiconductor chip having a semiconductor substrate and a detection unit provided above the semiconductor substrate for outputting a signal corresponding to a physical quantity;
a second semiconductor chip including a drive section for driving the detection section and a charge-voltage conversion section for converting the charge output from the detection section into a voltage;
has
The first semiconductor chip is stacked on the second semiconductor chip, and a noise suppression layer is provided between the detection unit and the second semiconductor chip,
with
The detection unit has a humidity detection capacitor,
the humidity detection capacitor includes a lower electrode formed above the semiconductor substrate, an upper electrode, and a humidity sensitive film disposed between the lower electrode and the upper electrode;
The detection unit is driven by an AC drive signal and outputs a signal corresponding to humidity,
The noise suppression layer is made of a conductive layer made of metal or polycrystalline silicon.
detection device. 7. The detection device according to claim 6 , wherein the noise suppression layer is provided between the detection section and the semiconductor substrate.

Images