JP7152474B2 - キャッシュコヒーレンスプロトコルデータを用いたキャッシュベーストレース記録 - Google Patents

キャッシュコヒーレンスプロトコルデータを用いたキャッシュベーストレース記録 Download PDF

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JP7152474B2
JP7152474B2 JP2020509444A JP2020509444A JP7152474B2 JP 7152474 B2 JP7152474 B2 JP 7152474B2 JP 2020509444 A JP2020509444 A JP 2020509444A JP 2020509444 A JP2020509444 A JP 2020509444A JP 7152474 B2 JP7152474 B2 JP 7152474B2
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trace
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モラ，ジョルディ
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Microsoft Technology Licensing LLC
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program
    • G06F11/364—Debugging of software by tracing the execution of the program tracing values on a bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3476—Data logging
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3624—Debugging of software by performing operations on the source code, e.g. via a compiler
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3632—Debugging of software of specific synchronisation aspects
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0895—Caches characterised by their organisation or structure of parts of caches, e.g. directory or tag array
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/3698—Environments for analysis, debugging or testing of software
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/45—Caching of specific data in cache memory
    • G06F2212/454—Vector or matrix data

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
JP2020509444A 2017-09-18 2018-06-22 キャッシュコヒーレンスプロトコルデータを用いたキャッシュベーストレース記録 Active JP7152474B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201762559780P 2017-09-18 2017-09-18
US62/559,780 2017-09-18
US15/915,930 US10459824B2 (en) 2017-09-18 2018-03-08 Cache-based trace recording using cache coherence protocol data
US15/915,930 2018-03-08
PCT/US2018/038875 WO2019055094A1 (en) 2017-09-18 2018-06-22 TRACE RECORDING USING CACHE MEMORY USING CACHE MEMORY COHERENCE PROTOCOL DATA

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JP2020534589A JP2020534589A (ja) 2020-11-26
JP2020534589A5 JP2020534589A5 (https=) 2021-07-26
JP7152474B2 true JP7152474B2 (ja) 2022-10-12

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EP (1) EP3665575B1 (https=)
JP (1) JP7152474B2 (https=)
KR (1) KR102483506B1 (https=)
CN (1) CN111095222B (https=)
AU (1) AU2018334370B2 (https=)
BR (1) BR112020003342A2 (https=)
CL (1) CL2020000645A1 (https=)
CO (1) CO2020002932A2 (https=)
ES (1) ES2887195T3 (https=)
IL (1) IL272745B2 (https=)
MX (1) MX2020002865A (https=)
MY (1) MY203044A (https=)
PH (1) PH12020550109A1 (https=)
SG (1) SG11202001913RA (https=)
WO (1) WO2019055094A1 (https=)
ZA (1) ZA202001262B (https=)

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JP2002304328A (ja) 2001-02-15 2002-10-18 Bull Sa マルチプロセッサシステム用コヒーレンスコントローラ、およびそのようなコントローラを内蔵するモジュールおよびマルチモジュールアーキテクチャマルチプロセッサシステム
JP2007207223A (ja) 2006-01-30 2007-08-16 Internatl Business Mach Corp <Ibm> 複数のコヒーレンシ・ドメインを有するデータ処理システムでフラッシュ動作を処理するデータ処理システム、方法、およびメモリ・コントローラ

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