JP7148102B2 - amplifier circuit - Google Patents

Description

The present invention relates to an amplifier circuit configured using transistors, and is applicable to, for example, an amplifier circuit using thin film transistors such as organic transistors.

For example, for the purpose of manufacturing display devices, touch panel devices, wearable electronic devices, and the like, techniques for forming thin film semiconductor elements such as thin film transistors on the surface of substrates such as glass plates, resin plates, and resin sheets have been studied. . Particularly in recent years, organic semiconductors have been attracting attention as materials for thin-film semiconductor elements from the viewpoint that their performance and production technology have improved remarkably, and that depending on the material, device fabrication using printing technology is possible.

In semiconductor devices made of such materials, the conductivity type generally depends greatly on the type of semiconductor material used. Therefore, it is difficult to construct a so-called complementary circuit in which P-type devices and N-type devices having the same characteristics are mixed. In this regard, a circuit has been devised that uses only one of the P-type and N-type to achieve the same function as a CMOS (Complementary Metal Oxide Semiconductor) circuit.

For example, Patent Literature 1 describes a circuit that uses only P-type thin film transistors and performs the same function as a CMOS inverter. Such a circuit is called a "pseudo-CMOS inverter". Further, for example, Patent Literature 2 proposes using a pseudo-CMOS inverter circuit as an amplifier circuit by connecting a feedback resistor between the input and output of the circuit.

JP 2015-204702 A Japanese Patent Application Laid-Open No. 2017-217098

In the amplifier circuit using the pseudo-CMOS inverter circuit described in Patent Document 2, there is room for improvement in the following two points. First, the resistor as a feedback element needs to be built in or externally attached separately from the manufacturing process of other semiconductor transistors, which complicates the manufacturing process. Secondly, when an input capacitor is connected to an amplifier circuit for the purpose of level shifting or blocking direct current, it is difficult to achieve both the frequency characteristics of the circuit and the startup speed when the power is turned on. More details will be described later, but specifically, it is as follows.

There is a trade-off relationship between the frequency characteristics and the start-up speed with respect to the time constant determined by the feedback element and the input capacitor. That is, in order to improve the frequency characteristics of the circuit, it is better to have a large time constant. is preferably as small as possible.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and provides an amplifier circuit that uses a pseudo-CMOS inverter circuit and has an input capacitor, without complicating the manufacturing process, and furthermore, has excellent frequency characteristics and a short start-up time. The purpose is to provide a technology that can be compatible.

One aspect of the present invention is an amplifier circuit that amplifies a signal input to an input terminal and outputs the signal from an output terminal. an inverter circuit for outputting a signal from an output section to the output terminal; a capacitor connected between the input terminal and the input section of the inverter circuit; and between the input section and the output section of the inverter circuit. and a feedback element connected to the Here, in the inverter circuit, a plurality of transistors whose semiconductor channels have the same conductivity type constitute a quasi-CMOS inverter, and the feedback element has the same conductivity type as the transistors composing the quasi-CMOS inverter. A two-terminal element in which a gate electrode and a drain electrode of a transistor are connected, and the two-terminal element is connected to the inverter circuit so that a forward current in the channel flows from the output section to the input section. .

In the amplifier circuit described in Patent Document 2 mentioned above, a resistor is used as a feedback element. On the other hand, in the invention configured as described above, the feedback element connected between the input and output of the quasi-CMOS inverter is composed of a transistor of the same conductivity type as that of the quasi-CMOS inverter. Therefore, the process for forming the transistor that serves as the feedback element can be incorporated into the process for manufacturing the transistor that constitutes the pseudo-CMOS inverter. More specifically, when forming a transistor that constitutes a pseudo-CMOS inverter, a transistor that serves as a feedback element can be formed together. Therefore, compared with the case of forming a simple inverter circuit, the manufacturing process is basically the same except that the number of transistors formed is different, and there is no need to provide a new process.

Also, the transistor serving as the feedback element constitutes a two-terminal element in which the drain electrode and the gate electrode are connected. In the two-terminal element, forward current flows from the output side to the input side of the inverter circuit. That is, the feedback element functions as a diode. In the no-input state, the potential of the output portion of the pseudo-CMOS inverter circuit becomes a high potential (ideally, the power supply potential). Therefore, immediately after the power is turned on, a relatively large forward voltage is applied to the diode, which is a feedback element, and current flows from the output section to the input section of the inverter circuit via the diode in the low resistance state. As a result, the potential of the input section increases, while the potential of the output section to which the inverted voltage is output decreases. The circuit enters a steady state when both potentials are balanced. At this time, the voltage across the terminals of the feedback element is small, and the feedback element is in a high resistance state.

Thus, since the feedback element has a low resistance immediately after the power is turned on, the time constant determined by the combination with the input capacitor is relatively small. Therefore, the potential difference between the input and output of the inverter circuit converges in a short time and reaches a steady state. In other words, the startup time is short. On the other hand, in a steady state, since the feedback element has a high resistance, the time constant is large, and the frequency characteristic (more specifically, the amplification factor in the low frequency range) is improved. Therefore, with this amplifier circuit, it is possible to achieve both excellent frequency characteristics and a short start-up time.

As described above, according to the present invention, since a transistor of the same conduction type as that of the transistor forming the inverter circuit is used as the feedback element, the formation of the feedback element does not complicate the manufacturing process. In addition, since the feedback element has a low resistance immediately after the power is turned on, the start-up time is short, but since it has a high resistance in a steady state, a decrease in amplification in a low frequency range can be suppressed. That is, in the present invention, it is possible to achieve both excellent frequency characteristics and a short start-up time without complicating the manufacturing process.

The above as well as other objects and novel features of the present invention will become more fully apparent from the following detailed description read in conjunction with the accompanying drawings. However, the drawings are for illustrative purposes only and do not limit the scope of the invention.

It is a figure which shows the structural example of a pseudo-CMOS inverter. It is a figure which shows the operation characteristic example of a pseudo-CMOS inverter. It is a figure which shows the example which used the inverter circuit as an amplifier circuit. FIG. 4 is a diagram showing frequency characteristics of voltage gain of an amplifier circuit; It is a figure explaining the starting time of an amplifier circuit. It is a figure which shows the circuit structure of the amplifier circuit in this embodiment. FIG. 4 is a diagram showing an example of operating characteristics of a transistor used as a feedback element; FIG. 4 is a diagram showing an example of changes in input voltage and output voltage in an amplifier circuit; FIG. 4 is a diagram showing an example of a circuit layout when an amplifier circuit is configured by thin film transistors; 1 is a diagram illustrating a cross-sectional structure of a transistor that is a component of a circuit; FIG. FIG. 3 is a diagram showing a configuration example of an amplifier circuit using transistors of each type;

Several embodiments of an amplifier circuit according to the present invention will be described below with reference to the drawings. One embodiment of the present invention is an amplifier circuit using a so-called pseudo-CMOS inverter. A pseudo-CMOS inverter is an inverter circuit that imitates the circuit configuration and functions of a CMOS (Complementary Metal Oxide Semiconductor) inverter by combining transistors of the same conductivity type. The circuit configuration and operating principle of CMOS inverters and amplifier circuits using CMOS inverters are known. Therefore, description is omitted here, and the pseudo-CMOS inverter circuit will be described first.

1A and 1B are diagrams showing configuration examples of a pseudo-CMOS inverter. More specifically, FIG. 1A is a diagram showing an example of the circuit configuration of a pseudo-CMOS inverter, and FIG. 1B is a diagram showing an example of its operating characteristics. The pseudo-CMOS inverter 100 comprises four transistors 101-104. All of these transistors 101 to 104 are depletion type transistors having P-type conductivity. For example, all transistors 101-104 may have the same structure. Therefore, these transistors 101-104 can be formed simultaneously in the same manufacturing process. In the following description, "pseudo-CMOS inverter" may be simply called "inverter".

The gate (G) terminal of the first transistor 101 is connected to the input terminal Vi'. Further, the source (S) terminal is connected to a power supply (not shown), and an appropriate positive power supply voltage Vdd is applied. The drain D terminal is connected to the source terminal of the second transistor 102 . The gate terminal of the second transistor 102 is connected to the source terminal, and the power supply voltage Vs1 is applied to the drain terminal. The power supply voltage Vs1 is lower than the potential of the power supply voltage Vdd, and can be, for example, the ground potential or an appropriate negative potential.

A gate terminal of the third transistor 103 is connected to a gate terminal of the first transistor 101 . That is, the gate terminal of the first transistor 101 and the gate terminal of the third transistor 103 are connected in parallel to the input terminal Vi'. A power supply voltage Vdd is applied to the source terminal of the third transistor 103 . Also, the drain terminal of the third transistor 103 is connected to the source terminal of the fourth transistor 104 and further to the output terminal Vo'.

The gate terminal of the fourth transistor 104 is connected to the drain terminal of the first transistor 101 and the source and gate terminals of the second transistor 102 . A power supply voltage Vs2 is applied to the drain terminal of the fourth transistor 104 . The power supply voltage Vs2 can be shared with the power supply voltage Vs1, for example. As is already known, a feature of the pseudo-CMOS inverter circuit is that the operating characteristics can be modulated by varying these power supply voltages Vs1 and Vs2. In the following, however, as the simplest example, it is assumed that the power supply voltages Vs1 and Vs2 are at the same potential, for example, the ground potential.

The pseudo-CMOS inverter 100 configured in this manner outputs an L level signal to the output terminal Vo' when an H level signal is input to the input terminal Vi', and an L level signal is input to the input terminal Vi'. It functions as an inverting circuit that outputs an H level to the output terminal Vo'. In the following description, the input terminals and the input voltages applied thereto are both denoted by Vi', unless otherwise specified. Similarly, both the output terminal and the output voltage appearing thereon are denoted by the symbol Vo'.

Specifically, as shown in FIG. 1B, when the input voltage Vi' is close to the ground potential (0 V), the output voltage Vo' is close to the power supply voltage Vdd. On the other hand, when the input voltage Vi' is close to the power supply voltage Vdd, the output voltage Vo' is approximately the power supply voltage Vs2. In this example where Vs2=0, the output voltage Vo' is substantially at the ground potential. Then, the output voltage Vo' fluctuates greatly at the intermediate voltage Vn between the ground potential and the power supply voltage Vdd. In other words, in the vicinity of this voltage Vn, the output voltage Vo' fluctuates greatly with a slight change in the input voltage Vi'. Using this property, the inverter circuit can be used as an inverting amplifier circuit.

FIG. 2 is a diagram showing an example of using an inverter circuit as an amplifier circuit. More specifically, FIG. 2A shows a circuit configuration example of the amplifier circuit 50, and FIG. 2B shows the frequency characteristics of its voltage gain. FIG. 2C is a diagram for explaining the activation time of the amplifier circuit 50. As shown in FIG. As shown in FIG. 2A, by connecting a resistor R as a feedback element between the input terminal Vi' and the output terminal Vo' of the pseudo-CMOS inverter 100 described above, the pseudo-CMOS inverter 100 is operated as an inverting amplifier circuit. be able to.

Due to the voltage feedback from the output terminal Vo' to the input terminal Vi', both terminals have the same potential in the no-signal state. More specifically, the equilibrium state is reached when both the input voltage Vi' and the output voltage Vo' are at the voltage Vn. Therefore, a DC potential appears at the input terminal Vi'. In the following description, the input terminal of the amplifier circuit 50 and the input voltage applied thereto are both denoted by Vi, unless otherwise specified. Similarly, both the output terminal and the output voltage appearing thereon are denoted by the symbol Vo. The output terminal Vo of the amplifier circuit 50 is electrically the same as the output terminal Vo' of the inverter 100 .

When a signal is input to the input terminal Vi of the amplifier circuit 50, the potential of the input terminal Vi' of the inverter 100 changes around the voltage Vn in accordance with the signal. In response to this, the output voltage Vo′ of the inverter 100 changes greatly, and an amplified signal appears at the output terminal Vo of the amplifier circuit 50 . As shown in FIG. 1B, the output voltage Vo' changes in a decreasing direction as the input voltage Vi' increases, so the amplifier circuit 50 functions as an inverting amplifier circuit.

As the voltage gain (=Vo/Vi) of the amplifier circuit 50, as indicated by the dotted line in FIG. 2B, the ideal characteristic is that it is constant in a frequency range lower than a certain frequency and uniformly decreases at higher frequencies. . However, the input capacitor C limits the transmission of low frequency signals. Therefore, in the actual amplifier circuit 50, the voltage gain decreases at frequencies lower than the frequency determined by the time constant of the input capacitor C and resistor R, as indicated by the solid line in FIG. 2B. In order to suppress this, the time constant should be increased, that is, the resistance value of the resistor R and the capacitance of the input capacitor C should be increased.

However, increasing the time constant may cause the following problems, especially immediately after power-on. In the amplifier circuit 50 immediately after power-on, the input voltage Vi' of the inverter 100 is approximately 0, and the output voltage Vo' is approximately the power supply voltage Vdd, as shown in FIG. 2C. Since the potential difference is applied to both ends of the resistor R, which is a feedback element, a current flows through the resistor R from the output terminal Vo' to the input terminal Vi'. As a result, the potential of the input terminal Vi' increases, while the potential of the output terminal Vo' decreases.
Vi'=Vo'≈Vn
When , the potential change converges and the circuit reaches a steady state. The time Ts required for convergence increases as the time constant between the input capacitor C and the resistor R increases.

Thus, in order to suppress the drop in voltage gain in the low frequency range, it is preferable that the time constant formed by the input capacitor C and the resistor R be large. On the other hand, if the time constant is large, there is a problem that the activation time required for the amplification circuit 50 to reach a steady state after power-on becomes long. That is, regarding the time constant of the input capacitor C and the resistor R, there is a trade-off relationship between the low-frequency voltage gain and the start-up time. The amplifier circuit of this embodiment, which will be described below, solves this problem, suppresses the decrease in gain in the low frequency range, and suppresses the increase in start-up time.

Also, especially when the transistor is formed by an organic semiconductor manufacturing process, a method for forming a stable resistor by this process has not yet been established. Therefore, in order to manufacture a circuit including a resistor, it is necessary to externally attach the resistor, which complicates the manufacturing process. On the other hand, since the amplifier circuit of this embodiment does not use resistors, such a problem does not occur.

3A to 3C are diagrams showing the configuration of the amplifier circuit of this embodiment. More specifically, FIG. 3A shows the circuit configuration of the amplifier circuit 10 in this embodiment, and FIG. 3B shows an example of operating characteristics of the transistor 111 used as a feedback element. FIG. 3C is a diagram showing an example of changes in the input voltage and the output voltage in the amplifier circuit 10. As shown in FIG.

As shown in FIG. 3A, in the amplifier circuit 10 of this embodiment, a transistor 111 is used as a feedback element connected between the input and output terminals of the inverter 100 . Transistor 111 has the same conductivity type as transistors 101 to 104 forming inverter 100 . In this example, a depletion-mode transistor of P-type conductivity is used.

In the transistor 111 , the source (S) terminal is connected to the output terminal Vo′ of the inverter 100 and the drain D terminal is connected to the input terminal Vi′ of the inverter 100 . Therefore, in the transistor 111 having a P-type channel, the forward current of the channel flows from the output terminal Vo' of the inverter 100 to the input terminal Vi'. A gate (G) terminal is connected to a drain terminal, and the transistor 111 functions as a two-terminal element, specifically a diode.

For the following description, a source-drain voltage Vsd that is a source potential with reference to the drain potential of the transistor 111, a drain current Id that flows from the source terminal to the drain terminal, and the transistor when viewed as a two-terminal element 111 resistance Rsd is introduced. Between these physical quantities is the following formula:
Vo′−Vi′=Vsd=Rsd·Id … (Equation 1)
There is a relationship However, the resistance Rsd is not constant and varies depending on the source-drain voltage Vsd.

As shown in the upper part of FIG. 3B, the drain current Id of the transistor 111, which is short-circuited between the gate and the drain and operates as a diode, hardly flows when the voltage Vsd between the source and the drain is smaller than the threshold voltage Vth specific to the transistor. (cutoff state). When the source-drain voltage Vsd becomes higher than the threshold voltage Vth, a drain current Id corresponding to the magnitude of the source-drain voltage Vsd flows (on state). Note that the threshold voltage Vth in a general definition is expressed as a gate potential with reference to the source potential. On the other hand, the above source-drain voltage Vsd is defined as a source potential with the drain potential as a reference so as to be a positive value. Therefore, the positive/negative is opposite to the case where the source potential is used as the reference. For this reason, the magnitude of the threshold voltage Vth in comparison with the source-drain voltage Vsd is represented by an absolute value.

Therefore, as shown in the lower part of FIG. 3B, the resistance Rsd of the transistor 111 exhibits a large value when the source-drain voltage Vsd is smaller than the threshold voltage Vth. On the other hand, it shows a smaller value as the source-drain voltage Vsd increases. This brings about the following effects.

As described above with reference to FIG. 2C, the output voltage Vo' of the inverter 100 is approximately the power supply voltage Vdd and the input voltage Vi' is approximately 0 immediately after the power is turned on. From this state, the output voltage Vo' gradually decreases, while the input voltage Vi' gradually increases, and finally both voltages converge to the voltage Vn, and the circuit reaches a steady state. The time required for this depends on the time constant determined by the resistance value of the feedback element and the capacitance of the input capacitor.

Similarly in the circuit of this embodiment, the difference between the output voltage Vo' and the input voltage Vi' of the inverter 100, that is, the source-drain voltage Vsd of the transistor 111 is large immediately after the power is turned on. It is in a state of resistance. For example, if the source-drain voltage Vsd at time T1 shown in FIG. 3C is sufficiently higher than the threshold voltage Vth of the transistor 111, the resistance Rsd is small as shown in the lower part of FIG. 3B.

Therefore, the time constant determined by the resistance Rsd and the capacitance of the input capacitor C is small, and the voltage difference between the input and output rapidly decreases as indicated by the solid line in FIG. 3C. That is, the start-up time required for the circuit to converge to a steady state is shorter than when a feedback element with a large resistance is used, as indicated by the dotted line in FIG. 3C.

On the other hand, after the circuit reaches a steady state, for example, at time T2 shown in FIG. The resistance Rsd has a large value. Since the time constant between the resistor Rsd and the input capacitor C becomes large in a steady state in which the circuit performs an amplifying operation, it is possible to suppress the decrease in the gain in the low frequency region.

In order to obtain the effect of shortening the start-up time by putting the feedback element into a low-resistance state, the transistor 111 needs to be turned on immediately after the power is turned on. Therefore, at least threshold voltage Vth of transistor 111 must be between the ground potential and power supply voltage Vdd. From the viewpoint of further shortening the start-up time, it is desirable that the state in which the resistance Rsd is small continues as long as possible. Therefore, it is desirable that the threshold voltage Vth of transistor 111 is as small as possible.

However, when the voltage range of the source-drain voltage Vsd where the feedback element has a high resistance becomes narrower, the allowable input voltage of the amplifier circuit becomes smaller. This is because when the amplitude of the input voltage Vi to the amplifier circuit 10 increases and the output voltage Vo increases accordingly, the voltage applied across the transistor 111 (that is, the source-drain voltage Vsd) also increases. This is because when the voltage increases and exceeds the threshold voltage Vth, the transistor 111 enters a low-resistance state and the gain decreases. From this point of view, it is desirable that the threshold voltage Vth (more precisely, its absolute value) of the transistor 111 is a large value as close as possible to the power supply voltage Vdd.

Thus, in order for the circuit of FIG. 3A to operate appropriately as an amplifier circuit while shortening the startup time, it is desired that the threshold voltage Vth of the transistor 111, which is a feedback element, be appropriate. . For example, the threshold voltage Vth can be set to approximately half the power supply voltage Vdd.

As described above, the amplifier circuit 10 of this embodiment shortens the start-up time until the steady state is reached after the power is turned on, suppresses the decrease in gain in the low frequency region after start-up, and obtains excellent frequency characteristics. It is possible. Furthermore, the transistors 101 to 104 forming the pseudo-CMOS inverter 100 and the transistor 111 functioning as a feedback element can be formed as transistors of the same conduction type. Therefore, it is also excellent in terms of manufacturing process. Specifically, the process of forming the transistor 111 that serves as the feedback element can be incorporated into the process of forming the transistors 101 to 104 that make up the pseudo-CMOS inverter 100, and the addition of the feedback element results in an increase in the number of steps. do not have.

4A and 4B are diagrams showing layout examples of the amplifier circuit of this embodiment. More specifically, FIG. 4A shows an example of a circuit layout when the amplifier circuit 10 shown in FIG. 3A is composed of thin film transistors. Also, FIG. 4B is a diagram illustrating a cross-sectional structure of a transistor that is a component of the circuit. In FIG. 4A, the hatched structure represents the organic semiconductor thin film SC functioning as the channel CH. Various materials known as semiconductor materials can be used as the material for the semiconductor thin film that is the main part of the thin film transistor.

As shown in FIG. 4A, the transistors 101 to 104 forming the inverter 100 and the transistor 111 acting as the feedback element can all basically have the same structure. Therefore, each transistor can be manufactured by the same manufacturing process. On the right side of FIG. 4B, the transistors 101 to 104 and 111 are represented by Tr in order to treat them uniformly. As shown in the figure, the transistor Tr basically includes a drain electrode Ed and a source electrode Es formed on a substrate SB, an organic semiconductor thin film SC connecting them, an insulating film IG covering the surface of the organic semiconductor thin film SC, an insulating It has a structure in which a gate electrode Eg facing the organic semiconductor thin film SC via the film IG is sequentially stacked. Each of these functional layers can be formed by an appropriate film formation method, such as coating, vacuum deposition, chemical vapor deposition, photolithography, printing, plating, etc., according to each material. In such transistors, the drain and source electrodes are structurally identical and interchangeable.

The transistors configured in this manner are connected to each other by appropriate wiring patterns PT as shown in FIG. 4A. Thereby, it is possible to form the amplifier circuit 10 shown in FIG. 3A. Note that the input capacitor C can be composed of two electrodes E1 and E2 that are closely opposed to each other via an insulating film IG, as shown on the left side of FIG. 4B. A manufacturing process for forming such a structure can also be shared with a process for manufacturing a transistor.

Further, as for the wiring pattern PT, it is also necessary to connect the electrodes separated from each other by the insulating film IG. For example, when connecting the electrode plate E1 of the capacitor C shown on the left side of FIG. 4B and the gate electrode Eg of the transistor Tr shown on the right side of FIG. It may be formed so as to connect both electrodes along the upper surface of the .

On the other hand, for example, when connecting the gate electrode Eg and the drain electrode Ed of the transistor Tr shown on the right side of FIG. 4B (corresponding to the case where the transistor Tr functions as the feedback transistor 111), both electrodes are separated by the insulating film IG. . In this case, it is possible to form the wiring pattern PT by a so-called via-hole connection in which a through hole is partially provided in the insulating film IG to electrically connect upper and lower wirings.

The amplifier circuit 10 of the above embodiment is configured by combining P-type and depletion-type transistors 101 to 104 and 111. FIG. However, a similar circuit can also be configured with a transistor whose conductivity type is N-type or an enhancement-type transistor. However, the circuit configuration is partially different due to the difference in operating characteristics.

FIG. 5 is a diagram showing a configuration example of an amplifier circuit using transistors of each type. Among them, the amplifier circuit 10 in the upper left column is composed of a depletion type transistor using a P-type semiconductor. That is, the amplifier circuit 10 is the same as the circuit of this embodiment shown in FIG. 3A. Since the circuit configuration of the pseudo-CMOS inverter using each type of transistor is well known, detailed description thereof will be omitted. Further, in these circuits, the power supply on the low potential side is shared and represented as power supply voltage Vss.

Further, the amplifier circuit 20 in the upper right column is an example of a circuit configured by P-type enhancement type transistors. The amplifier circuit 20 includes transistors 201 to 204 forming a pseudo-CMOS inverter and a transistor 211 acting as a feedback element. The circuit configuration is almost the same as that of the depletion type, but the gate potential of the transistor 202 is the same as that of the drain terminal as indicated by the dotted line, depending on the magnitude of the threshold voltage Vth of the transistor 202. and a case where an appropriate control voltage Vc is applied as indicated by the solid line.

The amplifier circuit 30 in the lower left column is an example of a circuit composed of N-type, depletion-type transistors. The amplifier circuit 30 includes transistors 301 to 304 forming a pseudo-CMOS inverter and a transistor 311 acting as a feedback element. The circuit configuration of the inverter is obtained by inverting the polarity of the P-type amplifier circuit 10 . Also, the transistor 311 serving as a feedback element is the same as the P-type transistor in that the drain and gate are connected and used as a diode. However, there is a difference in that the drain terminal is connected to the output side of the inverter and the source terminal is connected to the input side of the inverter. In an N-type transistor, instead of (Equation 1) above, the following equation:
Vo′−Vi′=Vds=Rds·Id … (Equation 2)
relationship is established. Here, the symbol Vds is the drain terminal potential with respect to the source terminal, and the symbol Rds is the resistance between the drain and the source.

Further, the amplifier circuit 40 in the lower right column is an example of a circuit composed of N-type enhancement-type transistors. The amplifier circuit 40 includes transistors 401 to 404 forming a pseudo-CMOS inverter and a transistor 411 acting as a feedback element. The circuit configuration of the inverter is obtained by inverting the polarity of the P-type amplifier circuit 20 . In this case also, the drain and gate of the transistor 411 serving as a feedback element are connected, the drain terminal is connected to the output side of the inverter, and the source terminal is connected to the input side of the inverter.

In this way, the circuit configuration of the inverter partly differs depending on the type of transistor used (P-type/N-type, depletion type/enhancement type). Modification of the circuit is common. That is, connecting an input capacitor to the input side and using a diode-connected transistor as a feedback element. At this time, for both P-type and N-type transistors, the gate and drain are connected, and the input/output of the inverter is controlled so that the direction of the forward current in the channel matches the direction from the output side to the input side of the inverter. interposed in between.

As a result, in any circuit example, the resistance of the feedback transistor becomes low immediately after the power is turned on, and the time constant formed with the input capacitor C becomes small. Therefore, the start-up time required for the circuit to reach a steady state can be shortened. On the other hand, after the steady state is reached, the feedback transistor has a high resistance. Therefore, it is possible to suppress the gain reduction in the low frequency region that depends on the time constant formed with the input capacitor C. FIG. That is, the amplifier circuit according to the present invention can achieve both excellent frequency characteristics and a short start-up time. Also, the feedback transistor can be formed in the same manufacturing process as the transistors that make up the inverter. Therefore, the steps are not complicated as compared with the case of simply manufacturing an inverter, and it is possible to efficiently manufacture an amplifier circuit.

As described above, in the amplifier circuit 10 of this embodiment, the input terminal Vi and the output terminal Vo respectively correspond to the "input terminal" and the "output terminal" of the invention. On the other hand, the pseudo-CMOS inverter 100, which is a component of the amplifier circuit 10, corresponds to the "inverter circuit" of the present invention, and its input terminal Vi' and output terminal Vo' correspond to the "input section" and "input section" of the present invention, respectively. corresponds to the output unit. Also, in the above embodiments, the capacitor C and the transistor 111 function as the "capacitor" and the "feedback element" of the present invention, respectively.

The present invention is not limited to the above-described embodiments, and various modifications other than those described above can be made without departing from the spirit of the present invention. For example, in the embodiments described above, the amplifier circuit according to the present invention is realized by combining organic thin film transistors using organic semiconductor materials. However, the amplifier circuit of the present invention is not limited to organic thin film transistors, and can be configured using various semiconductor elements.

Further, each of the amplifier circuits 10 to 40 of the above embodiments is configured by combining either depletion type or enhancement type transistors. Here, mixing a P-type semiconductor and an N-type semiconductor in one circuit, especially when using an organic semiconductor material, requires forming circuits using different materials, which complicates the manufacturing process. It is not preferable because it becomes On the other hand, while the conduction type is unified to either P-type or N-type, it is allowed to mix depletion-type transistors and enhancement-type transistors.

In addition, a transistor in which the gate terminal is directly connected to the drain terminal or the source terminal may be used in such a manner that an appropriate bias voltage is applied to the gate terminal instead of such direct connection. According to this aspect, it is possible to control the effective threshold voltage Vth of the transistor by gate bias.

As described above with reference to specific embodiments, in the amplifier circuit according to the present invention, for example, if the conductivity type of the transistor that constitutes the inverter circuit is the P-type, the transistor that constitutes the feedback element is The drain electrode may be connected to the input section of the inverter circuit, and the source electrode may be connected to the output section of the inverter circuit. Further, if the conductivity type of the transistor that constitutes the inverter circuit is N-type, the drain electrode of the transistor that constitutes the feedback element should be connected to the output section of the inverter circuit, and the source electrode should be connected to the input section of the inverter circuit. . According to these configurations, the transistor as the feedback element can make the direction in which the current flows from the output section to the input section of the inverter circuit the forward direction of the channel current. will effectively function as

Further, for example, the gate threshold voltage of the transistor forming the feedback element may be configured such that its absolute value is between the ground potential and the power supply voltage of the inverter circuit. According to such a configuration, the transistor is reliably turned on immediately after the power is turned on when the potential difference between the input and output portions of the inverter circuit becomes substantially the power supply voltage. Therefore, it is possible to reliably obtain the effect of shortening the start-up time by reducing the resistance. Further, when the potential difference between the input and output portions of the inverter circuit is approximately zero, the transistor is cut off. Therefore, it is possible to reliably obtain the effect of improving the frequency characteristics by increasing the resistance.

Further, for example, the transistors forming the inverter circuit and the feedback element may be organic semiconductor transistors. According to the present invention, it is possible to configure an amplifier circuit having excellent characteristics by combining transistors having a single conductivity type. This is because such a feature is particularly effective when using an organic semiconductor for which it is difficult to form complementary conduction type transistors from the same material.

Further, for example, the transistors forming the inverter circuit and the feedback element may be formed simultaneously by the same manufacturing process. In the amplifier circuit according to the present invention, the plurality of transistors forming the inverter circuit and the feedback element have the same conductivity type. Further, the structure of each transistor can also be the same in principle. Therefore, it is possible to simultaneously form a plurality of transistors in the same manufacturing process as that for forming one transistor. As a result, an amplifier circuit with excellent characteristics can be manufactured at a low manufacturing cost.

Although the invention has been described in terms of specific embodiments, this description is not meant to be construed in a limiting sense. Various modifications of the disclosed embodiments, as well as other embodiments of the invention, will become apparent to persons skilled in the art upon reference to the description of the invention. It is therefore intended that the appended claims cover any such variations or embodiments without departing from the true scope of the invention.

The amplifier circuit according to the present invention can be mounted on various electronic devices such as display devices, touch panel devices, and wearable electronic devices. In particular, since an amplifier circuit can be configured using thin film transistors, it is also suitable for use in mounting an amplifier circuit on the surface of a glass substrate, a flexible resin substrate, or the like.

10 to 40 amplifier circuit 100 pseudo CMOS inverter (inverter circuit)
101 to 104, 201 to 204, 301 to 304, 401 to 404 transistors 111, 211, 311, 411 feedback transistors C input capacitors (capacitors)
Vi input terminal Vi' input section Vo output terminal Vo' output section

Claims (6)

An amplifier circuit that amplifies a signal input to an input terminal and outputs the signal from an output terminal,
an inverter circuit for outputting an output signal obtained by inverting an input signal input to an input section from an output section to the output terminal;
a capacitor connected between the input terminal and the input of the inverter circuit;
a feedback element connected between the input section and the output section of the inverter circuit,
In the inverter circuit, a plurality of transistors whose semiconductor channels have the same conductivity type form a pseudo-CMOS inverter,
The feedback element is a two-terminal element in which a gate electrode and a drain electrode of a transistor of the same conductivity type as those of the transistor constituting the pseudo-CMOS inverter are connected, and the two-terminal element generates a forward current in the channel. an amplifier circuit connected to said inverter circuit such that a current flows from said output towards said input. a conductivity type of the transistor constituting the inverter circuit is a P type;
2. The amplifier circuit according to claim 1, wherein the drain electrode of said transistor constituting said feedback element is connected to said input section of said inverter circuit, and the source electrode thereof is connected to said output section of said inverter circuit. a conduction type of the transistor constituting the inverter circuit is N type;
2. The amplifier circuit according to claim 1, wherein the drain electrode of said transistor constituting said feedback element is connected to said output section of said inverter circuit, and the source electrode thereof is connected to said input section of said inverter circuit. 4. The amplifier circuit according to claim 1, wherein the absolute value of the gate threshold voltage of said transistor forming said feedback element is a value between the ground potential and the power supply voltage of said inverter circuit. 5. The amplifier circuit according to claim 1, wherein said transistors constituting said inverter circuit and said feedback element are organic semiconductor transistors. 6. The amplifier circuit according to claim 1, wherein said transistors forming said inverter circuit and said feedback element are simultaneously formed by the same manufacturing process.

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