JP7127995B2 - Wiring board manufacturing method - Google Patents

Description

The present invention relates to a method for manufacturing a wiring board.

2. Description of the Related Art Inductors, which are an example of wiring boards, are known to be mounted on electronic devices and the like and used as passive elements such as voltage conversion members.

For example, a flexible inductor has been proposed in which an anisotropic composite magnetic sheet made by dispersing flat or acicular soft magnetic metal powder in a resin material is laminated on the upper and/or lower surface of a coil. (See Patent Document 1, for example).

JP-A-2009-9985

By the way, in the inductor of Patent Document 1, the anisotropic composite magnetic sheet is in direct contact with the coil. Therefore, there arises a problem that a plurality of mutually adjacent wiring portions forming a coil are short-circuited via a large number of soft magnetic metal powders in the anisotropic composite magnetic sheet.

Therefore, before laminating an anisotropic composite magnetic sheet on a plurality of wiring portions, it is considered to coat the wiring portions with a cover insulating layer (electrodeposition coating film) using electrodeposition coating. Specifically, this configuration includes, for example, a step a in which a wiring pattern 41 having a plurality of wiring portions and lead wires 42 that enable power supply from the outside are formed on an insulating base layer 40, and the lead wires 42 is protected with a masking tape 43, power is supplied through the lead wire 42 for electrodeposition coating, the wiring pattern 41 is covered with a cover insulating layer 44, the masking tape 43 is removed, It can be manufactured by a step d of exposing the lead wire 42, a step e of removing the lead wire 42 by etching, and a step f of laminating the magnetic layer 45 on the wiring pattern 41 covered with the insulating cover layer 44 (Fig. 9A-10F).

However, in this manufacturing method, the end side surface of the wiring pattern 41 connected to the lead wire 42 is exposed after the step e. That is, the wiring pattern 41 has an exposed surface 46 that is not covered with the insulating cover layer 44 . In such a case, the magnetic layer 45 contacts the exposed surface 46 after the step f. As a result, the current flowing through the wiring pattern flows to the magnetic layer 45 via the exposed surface 46, causing a problem that the wiring function of the coil or the like is deteriorated.

In addition, inductors, which are often arranged near a power supply, need to be made thicker in the wiring portion so that a large current can flow. However, if the thickness of the wiring portion is increased by the additive method, it takes a long time and is inferior in productivity. On the other hand, if commercially available wiring such as winding wire is used, it is difficult to miniaturize the wiring pattern, or the degree of freedom in designing the wiring pattern is greatly reduced.

The present invention provides a method for manufacturing a wiring board, which can suppress the exposure of the wiring portion, is excellent in productivity, and facilitates miniaturization of the wiring pattern.

The present invention [1] includes a preparing step of preparing a laminate including an insulating layer having a through hole and a metal layer arranged on one side in the thickness direction of the insulating layer, and the through hole when projected in the thickness direction. A wiring forming step of forming a wiring pattern by a subtractive method so as to overlap with the hole, and an electrodeposition step of covering the wiring pattern with a protective layer by supplying power for electrodeposition through the through hole. and a method of manufacturing a wiring board.

In this wiring board manufacturing method, since the wiring pattern is formed by the subtractive method, a relatively thick wiring pattern can be formed in a short time, resulting in excellent productivity. In addition, it is easy to miniaturize the wiring pattern, and the degree of design freedom is high.

In addition, in this wiring board manufacturing method, since the wiring pattern is covered with the protective layer by supplying power for electrodeposition through the through holes, one surface and side surfaces of the wiring pattern in the thickness direction are covered with the protective layer. and the exposure of the wiring pattern can be suppressed.

The present invention [2] comprises a conductor layer arranging step of arranging a conductor layer on the other side in the thickness direction of the insulating layer before the wiring forming step, and a conductor layer removing step of removing the conductor layer after the electrodeposition step. The wiring board manufacturing method according to [1] is further provided.

In this wiring board manufacturing method, since the conductor layer is arranged on the other side in the thickness direction of the insulating layer, power can be supplied to the wiring section via the conductor layer and the through hole. Therefore, the wiring portion can be easily covered with the protective layer.

The present invention [3] is the wiring according to [1] or [2], further comprising a functional layer placement step of placing a functional layer on one side in the thickness direction of the insulating layer and the protective layer after the electrodeposition step. Including the method of manufacturing the substrate.

In this wiring board manufacturing method, since the functional layer is arranged on the wiring board, the wiring board can be provided with a desired function.

The present invention [4] includes the method for manufacturing a wiring board according to any one of [1] to [3], wherein the protective layer is an electrodeposition coating film.

In this wiring board manufacturing method, the protective layer is an electrodeposition coating film, so that the wiring pattern is covered with an insulator. Therefore, when a conductive functional layer is arranged on one side of the wiring pattern in the thickness direction, short circuiting of the wiring pattern can be suppressed.

The wiring board manufacturing method of the present invention can suppress the exposure of the wiring portion. In addition, the productivity is excellent, and the degree of freedom in designing the wiring pattern and miniaturization are easy.

FIG. 1 shows a plan view of a first embodiment of the inductor of the present invention. 2A and 2B are cross-sectional views of FIG. 1, FIG. 2A is a cross-sectional view along AA, and FIG. 2B is a cross-sectional view along BB. 3A to 3F are cross-sectional views (cross-sectional views along AA in FIG. 1) of the manufacturing process of the inductor shown in FIG. FIG. 3C shows a step of placing a metal thin film, FIG. 3D shows a step of placing a support film, FIG. 3E shows a step of forming a wiring pattern, and FIG. 3F shows a step of performing electrodeposition. 4G to 4J are cross-sectional views (cross-sectional views along line AA in FIG. 1) of the inductor manufacturing process subsequent to FIG. FIG. 4I shows the step of removing the metal thin film, and FIG. 4J shows the step of placing the adhesive layer and the second magnetic layer. 5A to 5F are cross-sectional views (cross-sectional view taken along line BB in FIG. 1) of the manufacturing process of the inductor shown in FIG. 1. FIG. 5A is a process of preparing a metal sheet, and FIG. FIG. 5C shows a step of placing a metal thin film, FIG. 5D shows a step of placing a support film, FIG. 5E shows a step of forming a wiring pattern, and FIG. 5F shows a step of performing electrodeposition. 6G to 6J are cross-sectional views (cross-sectional views along line BB in FIG. 1) of the inductor manufacturing process subsequent to FIG. FIG. 6I shows the step of removing the metal thin film, and FIG. 6J shows the step of placing the adhesive layer and the second magnetic layer. FIG. 7 shows a cross-sectional view of how the inductor shown in FIG. 1 is used. 8A and 8B are a first modification (a method of arranging a cover metal layer) of the inductor manufacturing method of the first embodiment, FIG. 8A is a process cross-sectional view of arranging the cover metal layer, 8B shows a plan view of FIG. 8A. 9A to 9C are plan views and cross-sectional views of the manufacturing process of the inductor of the reference example, FIG. 9A is a process of forming wiring portions and lead wires, and FIG. 9B is a process of masking the electrodeposited leads. , and FIG. 9C shows step c in which electrodeposition is performed. 10D to 10F are plan views and cross-sectional views of the manufacturing process of the inductor subsequent to FIG. 9, FIG. 10F indicates the f step of arranging the magnetic layer.

In FIG. 1, the vertical direction on the page is the front-back direction (first direction), the lower side on the page is the front side (one side in the first direction), and the upper side on the page is the rear side (the other side in the first direction). The left-right direction on the page is the left-right direction (second direction perpendicular to the first direction), the left side on the page is the left side (second direction one side), and the right side on the page is the right side (second direction other side). The paper thickness direction is the vertical direction (the thickness direction, the first direction, and the third direction orthogonal to the second direction), the front side of the paper is the upper side (one side in the thickness direction, the one side of the third direction), and the back side of the paper is It is the lower side (the other side in the thickness direction, the other side in the third direction). Specifically, it conforms to the directional arrows in each figure.

<First Embodiment>
A first embodiment of a method for manufacturing an inductor 1 as an example of a method for manufacturing a wiring board according to the present invention will be described with reference to FIGS. 1 to 7. FIG.

The first embodiment of the method for manufacturing the inductor 1 is the method for manufacturing the inductor 1 shown in FIGS. A magnetic layer arranging step, a conductor layer removing step, and a second magnetic layer arranging step are provided in this order. Each step will be described in detail below.

(Preparation process)
In the preparing step, a laminate 8 is prepared that includes an insulating base layer 2 as an example of an insulating layer and a metal sheet 10 as an example of a metal layer. Specifically, a laminate 8 is prepared which includes an insulating base layer 2 having through holes 6 and a metal sheet 10 disposed thereunder.

First, as shown in FIGS. 3A and 5A, a metal sheet 10 is prepared.

The metal sheet 10 is a member that becomes a wiring pattern 3, which will be described later, through a wiring forming process. That is, the metal sheet 10 is the raw material of the wiring pattern 3 . The metal sheet 10 has a sheet shape extending in the front-rear direction and the left-right direction.

Materials for the metal sheet 10 include, for example, copper, silver, gold, nickel, and alloys containing them. A preferred material for the metal sheet 10 is copper. Thereby, an inductor 1 having good conductivity and patterning properties can be manufactured.

The thickness of the metal sheet 10 is, for example, 25 μm or more, preferably 50 μm or more, and is, for example, 300 μm or less, preferably 150 μm or less. Thus, an inductor 1 that allows a large current to flow can be manufactured.

Then, as shown in FIGS. 3B and 5B, the base insulating layer 2 having the through-holes 6 is placed on the underside of the metal sheet 10 . That is, the insulating base layer 2 having a plurality of through holes 6 and a plurality of alignment marks 7 (positioning portions) is formed on the lower surface (the other surface in the thickness direction) of the metal sheet 10 .

Specifically, first, a varnish of a photosensitive insulating material is prepared, and this varnish is applied to the entire lower surface of the metal sheet 10 and dried to form a base film. The base film is exposed through a photomask having a pattern corresponding to through holes 6 and alignment marks 7 . After that, the base film is developed and, if necessary, cured by heating.

Examples of insulating materials for the insulating base layer 2 include organic materials such as polyimide, polysiloxane, epoxy resins, and fluorine resins. Polyimide is preferred.

As shown in FIG. 1, the through hole 6 is formed in the insulating base layer 2 at a position overlapping the wiring portion 21 (described later) when projected in the thickness direction. The through hole 6 has a generally circular shape in plan view and a generally rectangular shape in cross section. The length (width) in the left-right direction and the length in the front-rear direction of the through-hole 6 are shorter than the length (width) in the left-right direction and the length in the front-rear direction of the wiring portion 21, respectively.

The alignment mark 7 is an insulating portion formed by a mark hole 11 penetrating the insulating base layer 2 in the thickness direction. The alignment mark 7 is formed on the insulating base layer 2 at a position that does not overlap the wiring pattern 3 when projected in the thickness direction. The alignment mark 7 has a generally circular shape in plan view and a generally rectangular shape in cross section.

Thereby, an insulating base layer 2 having through holes 6 and alignment marks 7 is formed on the lower surface of the metal sheet 10 .

In the preparation step, as indicated by the phantom lines in FIG. 3A, a two-layer substrate including a metal sheet 10 and an insulating base layer 2 (that is, an insulating base layer without holes) disposed on the entire lower surface of the metal sheet 10 is prepared, and then holes (through holes 6 and alignment marks 7) are formed in the base insulating layer 2 . The holes are formed by placing an etching resist having a pattern corresponding to the through holes 6 and the alignment marks 7 on the lower surface of the insulating base layer 2, etching the insulating base layer 2, and then removing the etching resist. Alternatively, through holes 6 and alignment marks 7 are formed in base insulating layer 2 using a laser.

(Conductor layer placement step)
In the conductor layer forming step, as shown in FIGS. 3C and 5C, a metal thin film 12 as an example of a conductor layer is arranged under the insulating base layer 2 . That is, the metal thin film 12 is formed on the entire bottom surface of the insulating base layer 2 .

The metal thin film 12 is arranged such that the upper surface (one surface in the thickness direction) of the metal thin film 12 is in contact with the lower surface of the metal sheet 10 at the through holes 6 and the alignment marks 7 . Specifically, the surface of the metal sheet 10 or the like exposed from the through hole 6 (first exposed surface 13), the surface of the metal sheet 10 or the like exposed from the mark hole 11 (second exposed surface 14), and the base insulation A metal thin film 12 is formed so as to cover the lower surface of layer 2 .

Examples of the method for disposing the metal thin film 12 include dry methods such as sputtering, vacuum deposition, and ion plating, and wet methods such as electroless plating (electroless copper plating, electroless nickel plating, etc.). A dry method is preferred, and a sputtering method is more preferred. Thereby, a uniform thin film (specifically, a sputtered film) with good adhesion can be reliably arranged on the first exposed surface 13 and the second exposed surface 14 . In addition, the metal thin film 12 can be selectively removed reliably in the removal process described later.

The material of the metal thin film 12 is a metal material that can selectively remove the metal thin film 12 in the removal process described later, and examples thereof include metals such as copper, chromium, and nichrome.

The thickness of the metal thin film 12 is, for example, 10 nm or more, preferably 30 nm or more, and is, for example, 200 nm or less, preferably 100 nm or less.

(Wiring formation process)
In the wiring forming step, the wiring pattern 3 is subtractively formed so as to overlap the through hole 6 . That is, a subtractive method is performed to remove unnecessary portions from the metal sheet 10 to form the wiring pattern 3 .

First, as shown in FIGS. 3D and 5D, the support film 15 is arranged on the lower surface of the metal thin film 12 .

As the support film 15, for example, there is a separator film having a slightly adhesive property that can be easily peeled off from the metal thin film 12 in a later step. By disposing the support film 15, the metal sheet 10 and the insulating base layer 2 can be reliably supported, and the insulating cover layer 4 can be prevented from being coated on the lower surface of the metal thin film 12 in the electrodeposition process described later.

A subtractive method is then performed as shown in FIGS. 3E and 5E. Specifically, a dry film resist 16 (see phantom lines) having a pattern corresponding to the wiring pattern 3 (described later) is placed on the metal sheet 10, and then the unnecessary metal sheet 10 other than the wiring pattern 3 is removed. , are removed by etching, and finally the dry film resist 16 is removed by etching, stripping, or the like.

In the method of arranging the dry film resist 16 having a pattern, the dry film resist 16 is arranged on the entire upper surface of the metal sheet 10, exposed and developed through a photomask having a pattern corresponding to the wiring pattern 3, and cured by heating if necessary. Let

At this time, by recognizing the alignment mark 7 with a detection device from below, the dry film resist 16 having a pattern remains at a position overlapping the through hole 6 when projected in the thickness direction. 16 is exposed and developed.

Etching includes, for example, wet etching such as chemical etching. In the case of wet etching, the upper portion of the metal sheet 10 is easier to etch than the lower portion, so the wiring pattern 3 has a tapered shape that widens downward when viewed in side cross-section.

As a result, an electrodeposited body 17 having the support film 15, the metal thin film 12, the insulating base layer 2 and the wiring pattern 3 in this order is obtained.

(Electrodeposition process)
In the electrodeposition step, as shown in FIGS. 3F and 5F, the wiring pattern 3 is covered with an insulating cover layer 4 as an example of a protective layer by electrodeposition. That is, the insulating cover layer 4 made of an electrodeposition coating film is formed on the top and side surfaces of the wiring pattern 3 by electrodeposition coating.

Specifically, the object 17 to be electrodeposited is immersed in a liquid containing the electrodeposition paint, and then a current is applied to the object 17 to be electrodeposited to deposit the electrodeposition paint on the surface of the wiring pattern 3 . to dry the deposited electrodeposition paint. As a result, the surface (upper surface and side surface) of the wiring pattern 3 is covered with an electrodeposition coating film (that is, the insulating cover layer 4) formed from the electrodeposition paint.

Examples of the electrodeposition paint (that is, the insulating material of the insulating cover layer 4) include known or commercially available resins having ionicity in water, such as acrylic resins, epoxy resins, Examples include polyimide resins and mixtures thereof.

In order to apply a current to the electrodeposited body 17 , a lead wire (not shown) connected to an external power supply is connected to the metal thin film 12 . Thereby, a direct current is applied to the entire wiring pattern 3 from the first exposed surface 13 via the lead wire and the metal thin film 12 .

The electrodeposition coating may be either an anionic electrodeposition coating using the electrodeposition target 17 (specifically, the wiring pattern 3) as a cathode or a cationic electrodeposition coating using the electrodeposition target 17 as an anode. There may be.

The drying temperature of the electrodeposition paint is, for example, 90° C. or more and 150° C. or less, and the drying time is, for example, 1 minute or more and 30 minutes or less.

As a result, an insulating cover layer 4 (electrodeposition coating film) is formed on the top and side surfaces of the wiring pattern 3 .

If necessary, the surface of the wiring pattern 3 is cleaned by degreasing and pickling before electrodeposition. Further, if necessary, after the electrodeposition, the electrodeposition paint is cured by heating by baking. The heating temperature during baking is, for example, 150° C. or more and 250° C. or less, and the heating time is, for example, 10 minutes or more and 5 hours or less.

(First magnetic layer placement step)
In the first magnetic layer arranging step (an example of the functional layer arranging step), as shown in FIGS. 4G and 6G, the first magnetic layer 5 as an example of the functional layer is formed on the insulating base layer 2 and the insulating cover layer 4 . to place. That is, the first magnetic layer 5 is laminated on the top and side surfaces of the insulating cover layer 4 and the top surface of the insulating base layer 2 exposed from the insulating cover layer 4 so as to cover them.

Materials for the first magnetic layer 5 include, for example, magnetic compositions (preferably soft magnetic compositions) disclosed in Japanese Unexamined Patent Application Publication No. 2014-189015. Specifically, the material of the first magnetic layer 5 includes magnetic particles (preferably soft magnetic particles, such as Fe—Si—A1 alloy) and resin (preferably thermosetting resin, such as epoxy resin, phenolic resin, etc.).

In order to arrange the first magnetic layer 5, for example, a semi-cured magnetic sheet made of a magnetic composition is pressed against the upper surfaces of the insulating base layer 2 and the insulating cover layer 4, and after or at the same time as pressing, The semi-cured magnetic sheet is cured by heating. For details, refer to Japanese Patent Application Laid-Open No. 2014-189015.

Thereby, the first magnetic layer 5 is arranged on the upper surfaces of the insulating base layer 2 and the insulating cover layer 4 .

(Conductor layer removal step)
In the conductor layer removing step, the metal thin film 12 (conductor layer) is removed.

First, the support film 15 is removed from the metal thin film 12 by peeling, as shown in FIGS. 4H and 6H.

The metal thin film 12 is then removed from the base insulating layer 2 by etching or stripping, as shown in FIGS. 4I and 6I. Preferably, the metal thin film 12 is removed by etching. Examples of etching include wet etching described above.

When removing the metal thin film 12 by etching, the first magnetic layer 5 is optionally removed before etching to protect the first magnetic layer 5, as shown in phantom lines in FIGS. 4H and 6H. A protective sheet (such as a masking sheet) 28 is placed on the entire upper surface of the substrate, and the protective sheet 28 is removed after etching.

Thereby, the lower surface of the insulating base layer 2, the first exposed surface 13 and the second exposed surface 14 are exposed.

(Second magnetic layer placement step)
In the second magnetic layer placement step, the second magnetic layer 18 is placed below the insulating base layer 2 as shown in FIGS. 4J and 6J. That is, the second magnetic layer 18 is laminated on the lower surface of the insulating base layer 2 with the adhesive layer 19 interposed therebetween.

First, the adhesive layer 19 is arranged on the upper surface of the second magnetic layer 18 to prepare a laminate of the adhesive layer 19 and the second magnetic layer 18 .

The material of the second magnetic layer 18 is the same as the material of the first magnetic layer 5 . The second magnetic layer 18 can be produced by the method exemplified for the first magnetic layer 5 .

Materials for the adhesive layer 19 include known or commercially available adhesive compositions and adhesive compositions, such as acrylic compositions, epoxy compositions, rubber compositions, and silicone compositions. be done.

Examples of the arrangement of the adhesive layer 19 include a method of applying an adhesive composition to the second magnetic layer 18, a method of pressing an adhesive tape against the second magnetic layer 18, and the like.

Next, the laminate of the adhesive layer 19 and the second magnetic layer 18 is placed on the bottom surface of the insulating base layer 2 so that the adhesive layer 19 and the insulating base layer 2 are in contact with each other. At this time, the adhesive layer 19 is arranged on the lower surface of the base insulating layer 2 so that the insides of the through holes 6 and the mark holes 11 are filled with the adhesive layer 19 .

In the second magnetic layer disposing step, the adhesive layer 19 is disposed on the lower surface of the base insulating layer 2 by coating or the like from the viewpoint of good filling of the holes of the adhesive layer 19, and then the second magnetic layer is formed. 18 can also be placed on the underside of adhesive layer 19 . On the other hand, from the viewpoint of productivity, a laminate of the adhesive layer 19 and the second magnetic layer 18 is prepared and placed on the lower surface of the insulating base layer 2 as described above.

The inductor 1 is thus obtained.

(inductor)
The inductor 1, as shown in FIG. 1, has a substantially rectangular sheet shape extending in the front-rear direction and the left-right direction. The inductor 1 includes a second magnetic layer 18, an adhesive layer 19, a base insulating layer 2, a wiring pattern 3, a cover insulating layer 4, and a first magnetic layer 5, as shown in FIGS. It is prepared in this order in the thickness direction.

The second magnetic layer 18 is a layer that imparts high inductance to the inductor 1 . The second magnetic layer 18 is the bottom layer in the inductor 1 . The second magnetic layer 18 has substantially the same shape as the insulating base layer 2 in plan view, and has a sheet shape extending in the front-rear direction and the left-right direction.

The thickness of the second magnetic layer 18 is, for example, 10 μm or more, preferably 50 μm or more, and is, for example, 500 μm or less, preferably 300 μm or less.

The adhesive layer 19 is a layer that bonds the second magnetic layer 18 and the insulating base layer 2 together. The adhesive layer 19 is arranged on the upper surface of the second magnetic layer 18 . Specifically, the adhesive layer 19 is arranged between the second magnetic layer 18 and the insulating base layer 2 so as to contact the upper surface of the second magnetic layer 18 and the lower surface of the insulating base layer 2 . .

The adhesive layer 19 is filled inside the through holes 6 and the mark holes 11 in the base insulating layer 2 . That is, the upper surface of the adhesive layer 19 is in contact with the first exposed surface 13 of the wiring pattern 3 and the second exposed surface 14 of the first magnetic layer 5 .

The thickness (maximum thickness) of the adhesive layer 19 is, for example, 0.5 μm or more, preferably 1 μm or more, and is, for example, 10 μm or less, preferably 5 μm or less.

The insulating base layer 2 is a layer that supports the wiring pattern 3 . The insulating base layer 2 is arranged on the upper surface of the adhesive layer 19 . A wiring pattern 3 , an insulating cover layer 4 and a first magnetic layer 5 are arranged on the upper surface of the insulating base layer 2 . The insulating base layer 2 has the same sheet shape as the inductor 1 . Base insulating layer 2 includes through holes 6 and alignment marks 7 .

The thickness of the insulating base layer 2 is, for example, 0.1 μm or more, preferably 1 μm or more, and is, for example, 15 μm or less, preferably 5 μm or less. If the thickness of the insulating base layer 2 is within the above range, the inductor 1 can be made thinner while maintaining the mechanical strength of the inductor.

The wiring pattern 3 is arranged on the upper surface of the base insulating layer 2 . The wiring pattern 3 has a loop shape that is substantially rectangular in plan view.

The wiring pattern 3 includes a plurality (two) of wiring portions 21 extending in the front-rear direction, a connection wiring portion 22 connecting front ends of the plurality of wiring portions 21, and a plurality of (two) wiring portions 21 arranged at the rear ends of the two wiring portions 21. 2) terminal portions 23 are integrally provided.

The plurality of wiring portions 21 includes a first wiring portion 21a and a second wiring portion 21b that are spaced apart from each other in the left-right direction (an example of a predetermined direction). Each of the plurality of wiring portions 21 has a substantially rectangular shape extending in the front-rear direction in a plan view, and has a substantially trapezoidal shape with a tapered shape that widens downward in a side cross-sectional view.

The wiring pattern 3 , particularly the first wiring portion 21 a and the second wiring portion 21 b are arranged on the upper surface of one common base insulating layer 2 . That is, the insulating base layer 2 supporting the first wiring portion 21a and the insulating base layer 2 supporting the second wiring portion 21b are continuous with each other.

The connection wiring portion 22 is arranged on the front side of the first wiring portion 21a and the second wiring portion 21b, and connects the front ends thereof to each other. That is, the rear edge of the left end of the connection wiring portion 22 is continuous with the front edge of the first wiring portion 21a, and the front edge of the right end of the connection wiring portion 22 is continuous with the front edge of the second wiring portion 21b. . The connection wiring portion 22 has a substantially rectangular shape extending in the left-right direction in a plan view, and has a substantially trapezoidal shape with a tapered shape that widens downward in a side cross-sectional view.

The plurality (two) of terminal portions 23 are arranged at the rear end of the first wiring portion 21a and the rear end of the second wiring portion 21b so as to be continuous therewith. The lateral length (width) of the plurality of terminal portions 23 is shorter than the lateral length (width) of the wiring portion 21 . The terminal portion 23 has a substantially rectangular shape in plan view, and has a substantially trapezoidal shape with a tapered shape that widens downward in a side cross-sectional view.

The width (length in the left-right direction) of the wiring portion 21 and the width (length in the front-rear direction) of the connection wiring portion 22 are each, for example, 25 μm or more, preferably 100 μm or more, and for example, 2000 μm or less, preferably 2000 μm or less. , 750 μm or less.

The thickness of the wiring pattern 3 is the same as the thickness of the metal sheet 10 described above.

The material of the wiring pattern 3 is the same as the material of the metal sheet 10, preferably copper. If the wiring pattern 3 is a copper wiring formed of copper, the inductor 1 having good conductivity and fine patterning can be easily manufactured because copper has good conductivity and patterning properties.

The insulating cover layer 4 is an insulating layer that protects the wiring pattern 3 . The insulating cover layer 4 is arranged on the insulating base layer 2 so as to cover the entire top surface and the entire side surface of the wiring pattern 3 .

The insulating cover layer 4 includes a first insulating cover portion 4a covering the first wiring portion 21a, a second insulating cover portion 4b covering the second wiring portion 21b, and a third insulating cover portion covering the connection wiring portion 22. 4c and a plurality (two) of fourth cover insulating portions 4d covering a plurality (two) of terminal portions 23 are integrally provided.

In the cover insulating layer 4, the left fourth cover insulating portion 4d, the first cover insulating portion 4a, the third cover insulating portion 4c, the second cover insulating portion 4b, and the right fourth cover insulating portion 4d are arranged in this order. Continuing in a direction or anterior-posterior.

2A, in the insulating cover layer 4, the first insulating cover portion 4a and the second insulating cover portion 4b are not directly connected to each other. That is, the insulating cover layer 4 is not formed so as to continue the spaces 24 between the plurality of wiring portions 21 (the first wiring portion 21a and the second wiring portion 21b) adjacent to each other in the left-right direction. More specifically, the insulating cover layer 4 is substantially absent between the plurality of wiring portions 24 (except for the insulating cover layers 4 (4a, 4b) covering the side surfaces of the wiring portions 21).

The thickness of the insulating cover layer 4 is, for example, 0.5 μm or more, preferably 1 μm or more, and is, for example, 10 μm or less, preferably 7 μm or less. As a result, the distance between the wiring pattern 3 and the first magnetic layer 5 can be reduced while the wiring pattern 3 and the first magnetic layer 5 are in contact with each other. Therefore, the inductance of inductor 1 can be further improved.

The first magnetic layer 5 is a layer that imparts high inductance to the inductor 1 . The first magnetic layer 5 has substantially the same shape as the insulating base layer 2 in plan view, and has a sheet shape extending in the front-rear direction and the left-right direction.

The first magnetic layer 5 is the top layer in the inductor 1 . The first magnetic layer 5 is arranged on the insulating base layer 2 and the insulating cover layer 4 . Specifically, the first magnetic layer 5 is arranged on the upper surface of the insulating base layer 2 so as to cover the upper and side surfaces of the insulating cover layer 4 .

The first magnetic layer 5 exists over the entire vertical direction of the wiring portion 21 between the wiring portions 24 . That is, the first magnetic layer 5 extends from the upper surface of the insulating base layer 2 to a position higher than the wiring portion 21 between the wiring portions 24 . Moreover, the first magnetic layer 5 substantially fills the entire space 24 between the wiring portions. Specifically, it is composed of the wiring portion 21 (first wiring portion 21a, second wiring portion 21b) and the insulating cover layer 4 (first insulating cover portion 4a, second insulating cover portion 4b) covering it. When the member is the cover wiring portion, only the first magnetic layer 5 exists between the cover wiring portions adjacent to each other in a side sectional view.

The thickness of the first magnetic layer 5 is, for example, 10 μm or more, preferably 50 μm or more, and is, for example, 500 μm or less, preferably 300 μm or less.

The inductor 1 is not an electronic device to be described later, but is a component of an electronic device, that is, a component for manufacturing an electronic device, and does not include an electronic element (chip, capacitor, etc.) or a mounting substrate on which an electronic element is mounted. , is a device that can be used industrially by distributing individual parts.

This inductor 1 is mounted (built into), for example, an electronic device. Although not shown, the electronic device includes a mounting substrate and electronic elements (chips, capacitors, etc.) mounted on the mounting substrate. In the electronic device, the inductor 1 is mounted on a mounting substrate. Specifically, as shown in FIG. 7, a plurality of vias 25 (through holes) are formed through the first magnetic layer 5 and the insulating cover layer 4 in the thickness direction so that the terminal portions 23 are exposed. Insulation treatment is performed on the inner peripheral surface of 25 . Next, a conductive connection member 26 is arranged inside the via 25 so that one end of the connection member 26 contacts the upper surface of the terminal portion 23 . The inductor 1 is mounted on the mounting board via the connection member 26, electrically connected to other electronic devices, and acts as a passive element.

In the method of manufacturing the inductor 1, a preparation step of preparing the laminated body 8 including the insulating base layer 2 having the through hole 6 and the metal sheet 10 arranged on the insulating base layer 2; A wiring forming step of forming the wiring pattern 3 by a subtractive method so that the wiring pattern 3 overlaps the through hole 6 when projected, and power is supplied for electrodeposition through the through hole 6 to form the wiring pattern 3 with the first magnetic field. and an electrodeposition step of coating with layer 5 .

In this manufacturing method, the wiring pattern 3 is formed by a subtractive method. That is, the wiring pattern 3 can be formed from the metal sheet 10 by etching. Therefore, a relatively thick wiring pattern 3 can be formed in a short time, resulting in excellent productivity. Further, the wiring pattern 3 can be easily miniaturized, and the wiring pattern 3 can be designed with a high degree of freedom.

In addition, the wiring pattern 3 is covered with the insulating cover layer 4 by supplying power through the through hole 6 on the back side of the wiring pattern 3 . Therefore, the entire upper surface and side surfaces of the wiring pattern 3 can be covered with the insulating cover layer 4 (electrodeposition coating film), and exposure of the wiring pattern 3 can be suppressed. That is, the exposed surface 46 shown in FIG. 10F does not occur. Therefore, even when the first magnetic layer 5 is arranged above the wiring pattern 3 covered with the cover insulating layer 4, the first magnetic layer 5 can be prevented from directly contacting the wiring pattern 3. As a result, the short circuit of the wiring pattern 3 can be suppressed. Furthermore, since the insulating cover layer 4 is coated by electrodeposition coating, the surface of the wiring pattern 3 can be reliably coated with the insulating cover layer 4 thinly and uniformly.

In addition, this manufacturing method includes a conductor layer disposing step of disposing the metal thin film 12 under the base insulating layer 2 before the wiring forming step, and a conductor layer removing step of removing the metal thin film 12 after the electrodeposition step. Prepare.

Therefore, power can be supplied to the wiring portion 21 via the metal thin film 12 and the through hole 6 . That is, it is easy to supply power to the wiring portion 21 because it is only necessary to supply power to the metal thin film 12 that spreads on the lower surface of the insulating base layer 2 . Therefore, the wiring portion 21 can be easily covered.

In addition, this manufacturing method includes a functional layer disposing step of disposing the first magnetic layer 5 on the upper side of the insulating base layer 2 and the insulating cover layer 4 after the electrodeposition step.

Therefore, the inductor 1 can be provided with a high inductance function.

(Modification)
In each modification below, the same reference numerals are given to the same members and processes as in the above-described embodiment, and detailed description thereof will be omitted. In addition, each modification can be combined as appropriate. Furthermore, each modified example can have the same effects as the above-described one embodiment, unless otherwise specified.

First Modification In the electrodeposition process of the above-described embodiment, as shown in FIGS. 3F and 5F, the cover insulating layer 4 as an example of a protective layer is formed on the upper and side surfaces of the wiring pattern 3 by electrodeposition coating. However, for example, as shown in FIGS. 8A and 8B, in the electrodeposition step, a cover metal layer 30 as an example of a protective layer is formed on the top and side surfaces of the wiring pattern 3 by electrolytic plating. good too.

Examples of the cover metal layer 30 formed by electrolytic plating include gold, silver, copper, zinc, nickel, and chromium.

In the first modified example, desired functions (durability, ion migration prevention, etc.) can be imparted to the wiring pattern 3 according to the type of metal. By using the same material for the cover metal layer 30 as that for the wiring pattern 3, the surface properties and shape of the wiring pattern 3 can be adjusted.

Further, in the electrodeposition step, electrolytic plating and electrodeposition coating may be combined.

Second Modification Although the method for manufacturing the inductor 1 of the above embodiment includes the second magnetic layer placement step, for example, although not shown, the second magnetic layer placement step may not be included. That is, the manufactured inductor 1 does not have to include the second magnetic layer 18 and the adhesive layer 19 . From the viewpoint of providing a higher inductance, the method for manufacturing the inductor 1 preferably includes a second magnetic layer placement step.

Third Modification The shape of the wiring pattern 3 is not limited to the above and is not shown. good.

Although not shown, the inductor 1 does not need to have the alignment mark 7 in the insulating base layer 2 due to subsequent contour processing or the like.

<Other embodiments>
In the wiring board manufacturing method of the first embodiment, the functional layer is the magnetic layer (the first magnetic layer 5). It can also be a shielding layer, a radio wave absorbing layer, or the like.

Examples of the heat conductive layer include heat conductive sheets disclosed in JP-A-2012-238819 and JP-A-2014-62220.

An example of the radio wave shielding layer is the radio wave shield disclosed in Japanese Patent Laid-Open No. 2007-194570.

Examples of the radio wave absorbing layer include the radio wave absorbing sheet disclosed in JP-A-2001-44687.

This embodiment also has the same effect as the first embodiment.

Reference Signs List 1 inductor 2 base insulating layer 3 wiring pattern 4 cover insulating layer 5 first magnetic layer 6 through hole 8 laminate 12 metal thin film 30 cover metal layer

Claims (4)

a preparing step of preparing a laminate including an insulating layer having a through hole, and a metal layer disposed on one side in a thickness direction of the insulating layer and having an exposed surface exposed to the through hole ;
a conductor layer arranging step of forming a metal thin film as a conductor layer covering the other thickness direction surface of the insulating layer, the inner wall surface of the through hole, and the exposed surface of the metal layer;
a wiring forming step of forming a wiring pattern from the metal layer by a subtractive method after the conductor layer arranging step so as to overlap the through hole when projected in the thickness direction;
an electrodeposition step of covering the wiring pattern with a protective layer by supplying power for electrodeposition to the wiring pattern through the metal thin film ;
a conductor layer removing step of removing the metal thin film after the electrodeposition step . a step of arranging a support film on the other side in the thickness direction of the metal thin film after the conductor layer arranging step and before the wiring forming step;
2. The method of manufacturing a wiring board according to claim 1, further comprising a step of removing said support film after said electrodeposition step and before said conductor layer removing step . 3. The method of manufacturing a wiring board according to claim 1, further comprising a functional layer placement step of placing a functional layer on one side of the insulating layer and the protective layer in the thickness direction after the electrodeposition step. . 4. The method for manufacturing a wiring board according to claim 1, wherein the protective layer is an electrodeposition coating film.

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