JP7119283B2 - Method for manufacturing light emitting device - Google Patents

Description

The present invention relates to a method for manufacturing a light emitting device.

For example, U.S. Pat. No. 6,200,000 discloses a method of manufacturing a light source that includes bonding a plurality of light emitting semiconductor dies to electrical traces on a substrate.

Japanese Patent Publication No. 2012-516026

In the manufacturing method described in Patent Document 1, since a plurality of individualized light emitting elements are mounted on a substrate, there is room for improvement in suppressing variations in the intervals between the light emitting elements.
An embodiment of the present invention provides a method for manufacturing a light-emitting device that can densely arrange a plurality of light-emitting elements and suppress variation in the distance between the light-emitting elements.

According to one embodiment of the present invention, a method for manufacturing a light-emitting device includes steps of preparing a structure, mounting the structure on a wiring board, and separating a first substrate region and a second substrate region. forming a resin layer; forming a first mask member; forming a first region; forming a first wavelength conversion layer; and removing the first mask member; forming a second region. In the step of preparing a structure, a silicon substrate including a first surface provided with a groove, a first semiconductor laminate and a second semiconductor laminate provided on the first surface, and the first semiconductor laminate A structure body including a first conductive member provided and a second conductive member provided in the second semiconductor laminate, wherein the silicon substrate is a first substrate facing the first semiconductor laminate a second substrate region facing the second semiconductor stack; and a third substrate region positioned between the first substrate region and the second substrate region and facing the groove. to prepare. In the step of mounting the structure, the structure is mounted on the wiring board via the first conductive member and the second conductive member. In the step of separating the first substrate region and the second substrate region, after the structure is mounted on the wiring board, the third substrate region is removed to separate the first substrate region and the second substrate region. To separate. In forming a resin layer, a resin layer is formed between the first substrate region and the second substrate region. Forming a first mask member includes forming a first mask member that covers the second substrate region and exposes the first substrate region. In the step of forming the first region, the first region is formed by removing the first substrate region while covering the second substrate region with the first mask member to expose the first semiconductor laminate. Form. In the step of forming a first wavelength conversion layer, a first wavelength conversion layer is formed in the first region. In the step of removing the first mask member, the first mask member is removed. In the step of forming the second region, the second region is formed by removing the second substrate region and exposing the second semiconductor stack.

According to one embodiment of the present invention, there is provided a method for manufacturing a light-emitting device that can densely arrange a plurality of light-emitting elements and suppress variation in the distance between the light-emitting elements.

4 is a flow chart illustrating a method for manufacturing the light emitting device according to the first embodiment; FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 2B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 2A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 3B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 3A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 4B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 4A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 5B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 5A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 6B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 6A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 7B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 7A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 8B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 8A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 9B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 9A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 10B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 10A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 11B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 11A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 12B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 12A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 13B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 13A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 14B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 14A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 15B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 15A; FIG. FIG. 4 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light emitting device according to the first embodiment; 16B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 16A; FIG. 8 is a flow chart illustrating a method for manufacturing a light emitting device according to the second embodiment; FIG. 11 is a schematic cross-sectional view illustrating one step of a method for manufacturing a light emitting device according to the second embodiment; 18B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 18A; FIG. FIG. 11 is a schematic cross-sectional view illustrating one step of a method for manufacturing a light emitting device according to the second embodiment; 19B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 19A; FIG. FIG. 11 is a schematic cross-sectional view illustrating one step of a method for manufacturing a light emitting device according to the second embodiment; 20B is a schematic plan view of one step of the method for manufacturing the light emitting device according to FIG. 20A; FIG.

Each embodiment of the present invention will be described below with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each portion, the size ratio between portions, and the like are not necessarily the same as the actual ones. Also, even when the same parts are shown, the dimensions and ratios may be different depending on the drawing.
In the specification of the present application, the same reference numerals are assigned to the same elements as those described above with respect to the figures already appearing, and detailed description thereof will be omitted as appropriate.

(First embodiment)
FIG. 1 is a flow chart illustrating a method for manufacturing a light emitting device according to the first embodiment. 2A to 16A are schematic cross-sectional views each illustrating one step of the method for manufacturing the light emitting device according to the first embodiment. 2B to 16B are schematic plan views each illustrating one step of the method for manufacturing the light emitting device according to the first embodiment. 2B-16B are plan views corresponding to the cross-sectional views of FIGS. 2A-16A, respectively. FIG. 2A corresponds to the IIA-IIA line section of FIG. 2B. Similarly, FIGS. 3A to 16A are cross-sectional views corresponding to lines IIIA-IIIA to XVIA-XVIA of FIGS. 3B to 16B.

As shown in FIG. 1, the method for manufacturing a light-emitting device according to this embodiment comprises a structure preparing step S110, a mounting step S120, a separating step S130, a resin layer forming step S140, a first mask member forming step S150, a first region A formation step S160, a first wavelength conversion layer formation step S170, a first mask member removal step S180, and a second region formation step S190 are included. The method for manufacturing a light-emitting device according to this embodiment includes a second wavelength conversion layer forming step S200, a second mask member removing step S210, a first light transmission layer forming step S220, a third region forming step S230, and a second light A transmission layer forming step S240 may be further included.

In the structure preparation step S110, the structure 10 illustrated in FIGS. 2A and 2B is prepared. As shown in FIG. 2A, the structure 10 includes a silicon substrate 50, a first semiconductor laminate 15a, a second semiconductor laminate 15b, a first conductive member 21, and a second conductive member 22. As shown in FIG. The silicon substrate 50 includes a first surface 50a. A groove portion 60 (for example, a first groove portion 61) is provided on the first surface 50a. The first semiconductor laminate 15a and the second semiconductor laminate 15b are provided on the first surface 50a. The first conductive member 21 is provided on the first semiconductor laminate 15a. The second conductive member 22 is provided on the second semiconductor laminate 15b. The silicon substrate 50 includes a first substrate region 51 , a second substrate region 52 and a third substrate region 53 . The first substrate region 51 faces the first semiconductor laminate 15a. The second substrate region 52 faces the second semiconductor laminate 15b. A third substrate region 53 is between the first substrate region 51 and the second substrate region 52 . The third substrate region 53 faces the groove 60 (first groove 61 ) and is thinner than the first substrate region 51 and the second substrate region 52 . The silicon substrate 50 may include a second surface 50b. The second surface 50b is the surface opposite to the first surface 50a.

As shown in FIG. 2A, the direction from the silicon substrate 50 to the first semiconductor laminate 15a is the Z-axis direction. One direction perpendicular to the Z-axis direction is defined as the X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is defined as the Y-axis direction. A silicon substrate 50 extends along the XY plane. The first surface 50a and the second surface 50b are along the XY plane.

FIG. 2B is a plan view of the structure 10 observed from the side on which the multiple semiconductor stacks 15x are provided. As shown in FIG. 2B, a plurality of semiconductor stacks 15x are arranged along the XY plane. The first semiconductor laminate 15a, the second semiconductor laminate 15b, the third semiconductor laminate 15c, and the like are part of the plurality of semiconductor laminates 15x. As shown in FIG. 2B, in plan view, the grooves 60 are located between the plurality of semiconductor laminates 15x and are provided in a grid pattern. In addition, each conductive member is omitted in FIG. 2B.

The first semiconductor laminate 15a includes a semiconductor layer 11a, a semiconductor layer 12a and an active layer 13a. The semiconductor layer 11a is, for example, n-type. The semiconductor layer 12a is, for example, p-type. The active layer 13a is provided between the semiconductor layer 11a and the semiconductor layer 12a. For example, the active layer 13a is provided on part of the semiconductor layer 11a. The semiconductor layer 12a is provided on the active layer 13a.

As shown in FIG. 2A, the first conductive member 21 includes a conductive portion 21a and a conductive portion 21b. The conductive portion 21a is provided on part of the semiconductor layer 11a. The conductive portion 21b is provided on the semiconductor layer 12a. A direction from a portion of the semiconductor layer 11a to the conductive portion 21a is along the Z-axis direction. The direction from the semiconductor layer 12a to the conductive portion 21b is along the Z-axis direction. The conductive portion 21a is electrically connected to the semiconductor layer 11a. The conductive portion 21b is electrically connected to the semiconductor layer 12a. In this example, a conductive layer 25a is provided between the semiconductor layer 12a and the conductive portion 21b. The conductive portion 21b is electrically connected to the semiconductor layer 12a through the conductive layer 25a.

The second semiconductor stack 15b includes a semiconductor layer 11b, a semiconductor layer 12b and an active layer 13b. The semiconductor layer 11b is, for example, n-type. The semiconductor layer 12b is, for example, p-type. The active layer 13b is provided between the semiconductor layer 11b and the semiconductor layer 12b. For example, the active layer 13b is provided on part of the semiconductor layer 11b. The semiconductor layer 12b is provided on the active layer 13b.

As shown in FIG. 2A, the second conductive member 22 includes a conductive portion 22a and a conductive portion 22b. The conductive portion 22a is provided on part of the semiconductor layer 11b. The conductive portion 22b is provided on the semiconductor layer 12b. The direction from part of the semiconductor layer 11b to the conductive portion 22a is along the Z-axis direction. The direction from the semiconductor layer 12b to the conductive portion 22b is along the Z-axis direction. The conductive portion 22a is electrically connected to the semiconductor layer 11b. The conductive portion 22b is electrically connected to the semiconductor layer 12b. In this example, a conductive layer 25b is provided between the semiconductor layer 12b and the conductive portion 22b. The conductive portion 22b is electrically connected to the semiconductor layer 12b through the conductive layer 25b.

As shown in FIG. 2A, silicon substrate 50 may include a fourth substrate region 54 and a fifth substrate region 55 . In one example, there is a second substrate region 52 between the first substrate region 51 and the fourth substrate region 54 . Between the second substrate region 52 and the fourth substrate region 54 is a fifth substrate region 55 . The silicon substrate 50 may include a second groove portion 62 . The second groove portion 62 may be connected to the first groove portion 61 . The second groove 62 is between the second substrate region 52 and the fourth substrate region 54 . The fifth substrate region 55 faces the second groove portion 62 and is thinner than the second substrate region 52 and the fourth substrate region 54 .

As shown in FIG. 2A, in this example, the structure 10 includes a third semiconductor laminate 15c and a third conductive member 23. As shown in FIG. The third semiconductor laminate 15c is provided on the first surface 50a. The fourth substrate region 54 faces the third semiconductor laminate 15c. The third conductive member 23 is provided on the third semiconductor laminate 15c.

As shown in FIG. 2A, the third semiconductor stack 15c includes a semiconductor layer 11c, a semiconductor layer 12c and an active layer 13c. The semiconductor layer 11c is, for example, n-type. The semiconductor layer 12c is, for example, p-type. The active layer 13c is provided between the semiconductor layer 11c and the semiconductor layer 12c. For example, the active layer 13c is provided on part of the semiconductor layer 11c. The semiconductor layer 12c is provided on the active layer 13c.

As shown in FIG. 2A, the third conductive member 23 includes a conductive portion 23a and a conductive portion 23b. The conductive portion 23a is provided on part of the semiconductor layer 11c. The conductive portion 23b is provided on the semiconductor layer 11c. For example, the direction from part of the semiconductor layer 11c to the conductive portion 23a is along the Z-axis direction. The direction from the semiconductor layer 12c to the conductive portion 23b is along the Z-axis direction. The conductive portion 23a is electrically connected to the semiconductor layer 11c. Conductive portion 23b is electrically connected to semiconductor layer 12c. In this example, a conductive layer 25c is provided between the semiconductor layer 12c and the conductive portion 23b. The conductive portion 23b is electrically connected to the semiconductor layer 12c through the conductive layer 25c.

As shown in FIG. 3A, in the mounting step S120, the structure 10 is mounted on the wiring board 70 via the first conductive member 21 and the second conductive member 22. As shown in FIG. In this example, the structure 10 is further mounted on the wiring board 70 via the third conductive member 23 . For example, the structure 10 is mounted on the wiring board 70 via the conductive portion 21a, the conductive portion 21b, the conductive portion 22a, the conductive portion 22b, the conductive portion 23a, and the conductive portion 23b. In this example, the wiring board 70 is provided with wiring layers 71 and 72 . For example, the wiring layer 71 electrically connects the conductive portion 21b and the conductive portion 22a to each other. The wiring layer 72 electrically connects the conductive portion 22b and the conductive portion 23a to each other. Note that each wiring layer does not have to be formed so as to electrically connect adjacent semiconductor laminates, in which case each semiconductor laminate can be lit individually.

As shown in FIG. 3B, in the mounting step S120, the third substrate region 53 is between the first substrate region 51 and the second substrate region 52, and the fifth substrate region 55 is between the second substrate region 52 and the second substrate region. It is mounted on the wiring board 70 in a state between the 4 board area 54 and the board area 54 .

After the structure 10 is mounted on the wiring substrate 70, the third substrate region 53 is removed to separate the first substrate region 51 and the second substrate region 52 in the separation step S130, as shown in FIG. 4A. In this example, the fifth substrate region 55 is also removed to further separate the second substrate region 52 and the fourth substrate region 54 . In removing the third substrate region 53 and the fifth substrate region 55, the third substrate region 53 and the fifth substrate region 55 are removed from the second surface 50b side of the silicon substrate 50, for example. In removing these substrate regions, for example, grinding, dry etching, wet etching, or the like is performed. The removal of the third substrate region 53 separates the first substrate region 51 and the second substrate region 52 . Removal of the fifth substrate region 55 separates the second substrate region 52 and the fourth substrate region 54 .

As shown in FIG. 4B, in the separation step S130, the first substrate region 51 and the second substrate region 52 are separated, and the second substrate region 52 and the fourth substrate region 54 are separated in plan view. Note that each wiring layer is omitted in FIG. 4B.

As shown in FIG. 5A, in the resin layer forming step S140, a resin layer 80 is formed between the first substrate region 51 and the second substrate region 52. As shown in FIG. In this example, the resin layer 80 is also formed between the second substrate region 52 and the fourth substrate region 54 . The resin used for the resin layer 80 includes, for example, epoxy resin or silicone resin. The resin layer 80 may contain light-reflecting particles, for example, so that the light emitted from the semiconductor laminate is efficiently extracted to the outside.

As shown in FIG. 5B, in the resin layer forming step S140, the resin layer 80 is formed between the first substrate region 51 and the second substrate region 52 in plan view.

As shown in FIG. 6A, in the first mask member forming step S150, a first mask member 81 is formed. A first mask member 81 covers the second substrate region 52 . In this example, the first mask member 81 further covers the resin layer 80 . In this example, the first mask member 81 also covers the fourth substrate region 54 . The first mask member 81 exposes the first substrate region 51 . For example, a resin or an inorganic insulating film is used for the first mask member 81 . For processing the shape of the first mask member 81, for example, a technique such as photolithography is used. The thickness of the first mask member 81 is, for example, about 10 μm to 1000 μm.

As shown in FIG. 6B, in the first mask member forming step S150, the resin layer 80, the second substrate region 52, and the fourth substrate region 54 are covered and the first substrate region 51 is exposed in plan view. , a first mask member 81 is formed.

As shown in FIG. 7A, in the first region forming step S160, the first substrate region 51 is removed while the second substrate region 52 is covered with the first mask member 81 to expose the first semiconductor laminate 15a. Thereby, the first region 15A is formed. The removal of the first substrate region 51 is performed by wet etching, dry etching, or the like. The first region 15A corresponds to at least a portion of the first semiconductor stacked body 15a (for example, a portion where the semiconductor layer 11a is exposed from the resin layer 80) when viewed from above. In this example, the fourth substrate region 54 and the resin layer 80 are covered with the first mask member 81 in the first region forming step S160.

As shown in FIG. 7B, in the first region forming step S160, the first substrate region 51 is removed to expose the first semiconductor laminate 15a to form the first region 15A.

As shown in FIG. 8A, in the first wavelength conversion layer forming step S170, a first wavelength conversion layer 85A is formed in the first region 15A. The first wavelength conversion layer 85A can be formed by coating or electrodeposition, for example. When the first wavelength conversion layer 85A is formed by coating, after coating the first wavelength conversion layer 85A over the first region 15A and the upper surface of the first mask member 81, the first mask member removing step described later is performed. In S180, the first wavelength conversion layer 85A on the upper surface of the first mask member 81 may be removed along with the removal of the first mask member, thereby selectively applying the first wavelength conversion layer to the first region 15A. Layer 85A can be formed. Further, when forming the first wavelength conversion layer 85A by coating, the first wavelength conversion layer 85A is coated over the first region 15A and the upper surface of the first mask member 81, and then the first mask member 81 is coated with the first wavelength conversion layer 85A. The first wavelength conversion layer 85A on the upper surface may be removed by grinding. Forming the first wavelength conversion layer 85A by a technique such as electrodeposition facilitates selective formation of the first wavelength conversion layer 85A in the first region 15A. The first wavelength conversion layer 85A contains phosphor particles and resin, for example. The thickness of the first wavelength conversion layer 85A is, for example, 50 μm to 500 μm.

As shown in FIG. 8B, in the first wavelength conversion layer forming step S170, a first wavelength conversion layer 85A is formed in the first region 15A.

As shown in FIG. 9A, in the first mask member removing step S180, the first mask member 81 is removed. For example, when the first mask member 81 contains resist, the first mask member 81 can be removed by dry etching, wet etching, or the like.

As shown in FIG. 9B, in the first mask member removing step S180, the first mask member 81 is removed to expose the second substrate region 52 and the fourth substrate region .

In the second region forming step S190, the second substrate region 52 is removed to expose the second semiconductor laminate 15b, thereby forming the second region 15B. The second region 15B corresponds to at least a portion of the second semiconductor laminate 15b (for example, a portion where the semiconductor layer 11b is exposed from the resin layer 80) when viewed from above.

According to the method for manufacturing a light-emitting device according to the present embodiment, the structure 10 provided with a plurality of semiconductor laminates 15x (for example, the first semiconductor laminate 15a and the second semiconductor laminate 15b) is mounted on the wiring board 70. Implement. After that, by removing a part of the silicon substrate 50 (for example, the third substrate region 53), the plurality of semiconductor stacked bodies 15x are singulated. In the present embodiment, a plurality of semiconductor laminates 15x can be collectively mounted on the wiring substrate 70 while maintaining the positions of the plurality of semiconductor laminates 15x defined in the structure 10 .

When a plurality of light-emitting elements are mounted on a wiring board by picking up the light-emitting elements one by one, it is necessary to make the intervals between the light-emitting elements close or to keep the intervals between the light-emitting elements constant in terms of the accuracy of the device used for mounting. There is room for improvement. In the present embodiment, as described above, a plurality of semiconductor laminates 15x are collectively mounted on the wiring substrate 70 while maintaining the positions of the semiconductor laminates 15x formed on the silicon substrate that is the growth substrate. can do. Therefore, in the wiring board, the plurality of semiconductor laminates 15x can be densely arranged, and variation in the intervals between the plurality of semiconductor laminates 15x can be suppressed. Therefore, according to the present embodiment, it is possible to provide a method for manufacturing a light emitting device in which a plurality of light emitting elements are densely arranged and variation in the distance between the light emitting elements can be suppressed. Suppressing the variation in the spacing between the light emitting elements means, for example, that the variation in the spacing between the light emitting elements is 3 μm or less. Further, making the distance between the light emitting elements closer means setting the distance between the light emitting elements to 100 μm or less, for example.

In this embodiment shown above, the first wavelength conversion layer 85A is selectively formed in the first region 15A. The first wavelength conversion layer 85A is not formed in the second region 15B. For example, the wavelength of light emitted from the first semiconductor laminate 15a is converted by passing through the first wavelength conversion layer 85A. On the other hand, the light emitted from the second semiconductor laminate 15b is emitted to the outside as it is without being converted in wavelength. Even if the wavelength distribution of the light emitted from the first semiconductor laminated body 15a is the same as the wavelength distribution of the light emitted from the second semiconductor laminated body 15b, the color of the light differs depending on whether or not it passes through the first wavelength conversion layer 85A. You get light.

In this embodiment, the second region forming step S190 may include a second mask member forming step S191 and a second substrate region removing step S192 illustrated in FIG. 1, as described below.

In the second mask member forming step S191, as shown in FIGS. 10A and 10B, a second mask member 82 that covers the first wavelength conversion layer 85A and exposes the second substrate region 52 is formed. In this example, the second mask member 82 also covers the fourth substrate region 54 in the second mask member forming step S191. The thickness of the second mask member 82 can be approximately the same as the thickness of the first mask member 81 .

In the second substrate region removing step S192, the second substrate region 52 is removed while the first wavelength conversion layer 85A is covered with the second mask member 82, as shown in FIGS. 11A and 11B. The removal of the second substrate region 52 is performed by wet etching, dry etching, or the like. Among them, the second substrate region 52 can be selectively removed by dry etching.

In the second wavelength conversion layer forming step S200 illustrated in FIG. 1, a second wavelength conversion layer 85B is formed in the second region 15B as shown in FIGS. 12A and 12B. For example, the peak wavelength of light emitted from the second wavelength conversion layer 85B is different from the peak wavelength of light emitted from the first wavelength conversion layer 85A. The type of phosphor contained in the second wavelength conversion layer 85B differs from the type of phosphor contained in the first wavelength conversion layer 85A.

As shown in FIGS. 13A and 13B, in the second mask member removing step S210, the second mask member 82 is removed. When the second mask member 82 is resist, the second mask member 82 can be removed by, for example, dry etching, wet etching, or the like.

As shown in FIGS. 14A and 14B, in the first light transmission layer forming step S220, the first light transmission layer 88A is formed on the first wavelength conversion layer 85A and the second wavelength conversion layer 85B. The first light transmission layer 88A contains, for example, silicone-based resin, epoxy-based resin, or the like. The first light transmission layer 88A functions, for example, as a protective layer. For example, the first light transmission layer 88A can protect the first wavelength conversion layer 85A and the second wavelength conversion layer 85B from the gas used for removing the fourth substrate region 54, which will be described later. The first light transmission layer 88A formed on the first wavelength conversion layer 85A may be formed before the second mask member 82 is formed. , the first wavelength conversion layer 85A can be protected.

As shown in FIGS. 15A and 15B, in the third region forming step S230, the fourth substrate region 54 is removed to expose the third semiconductor laminate 15c, thereby forming the third region 15C. The third region 15C corresponds to at least a portion of the third semiconductor stacked body 15c (for example, a portion where the semiconductor layer 11c is exposed from the resin layer 80) when viewed from above.

As shown in FIGS. 16A and 16B, in the second light transmissive layer forming step S240, a second light transmissive layer 88B is formed in the third region 15C.

By carrying out the second wavelength conversion layer forming step S200, for example, the second wavelength conversion layer 85B capable of emitting light of a color different from that of the first wavelength conversion layer 85A can be formed. As a result, according to the first embodiment, variations in the distance between the light emitting elements are suppressed and the distance between the light emitting elements is increased, while increasing the number of types of light that can be obtained.
(Second embodiment)
FIG. 17 is a flow chart illustrating a method for manufacturing a light emitting device according to the second embodiment. 18A to 20A are schematic cross-sectional views each illustrating one step of the method for manufacturing the light emitting device according to the second embodiment. 18B to 20B are schematic plan views each illustrating one step of the method for manufacturing the light emitting device according to the second embodiment.

As shown in FIG. 17, in the method for manufacturing the light emitting device according to this embodiment, the mounting step S340 is performed after the resin layer forming step S320. In the method for manufacturing the light emitting device according to the second embodiment, after the mounting step S340, the same processing as in the method for manufacturing the light emitting device according to the first embodiment may be performed. Examples of the structure preparing step S110, the resin layer forming step S320, the separating step S130, and the mounting step S340 will be described below with respect to the second embodiment.

In the structure preparation step S110, for example, the structure 10 illustrated in FIGS. 2A and 2B is prepared.

As shown in FIGS. 18A and 18B, in the resin layer forming step S320, the resin layer 80 is formed so as to fill the grooves 60 (the first grooves 61 and the second grooves 62) of the structure 10. FIG.

After the resin layer 80 is formed, the third substrate region 53 is removed to separate the first substrate region 51 and the second substrate region 52 in the separation step S130, as shown in FIGS. 19A and 19B. In this example, the fifth substrate region 55 is removed to separate the second substrate region 52 and the fourth substrate region 54 . In removing the third substrate region 53 and the fifth substrate region 55, the third substrate region 53 and the fifth substrate region 55 are removed from the second surface 50b side of the silicon substrate 50, for example. Removal includes, for example, grinding, dry etching, and wet etching. The removal of the third substrate region 53 separates the first substrate region 51 and the second substrate region 52 . Removal of the fifth substrate region 55 separates the second substrate region 52 and the fourth substrate region 54 .

After separating the first substrate region 51 and the second substrate region 52, and separating the second substrate region 52 and the fourth substrate region 54, in the mounting step S340, as shown in FIGS. 10 are mounted on the wiring substrate 70 via the first conductive member 21 , the second conductive member 22 and the third conductive member 23 . For example, the first semiconductor laminate 15a is mounted on the wiring board 70 via the conductive portions 21a and 21b. The second semiconductor laminate 15b is mounted on the wiring substrate 70 via the conductive portions 22a and 22b. The third semiconductor laminate 15c is mounted on the wiring substrate 70 via the conductive portions 23a and 23b.

After the mounting step S340, the processes (first mask member forming step S150, first region forming step S160, first wavelength conversion layer forming step S170, first mask member The removal step S180 and the second region formation step S190 may be performed, and the second wavelength conversion layer formation step S200, the second mask member removal step S210, the first light transmission layer formation step S220, and the third region formation step. S230 and second light transmissive layer forming step S240) may be further performed.

According to the method for manufacturing a light emitting device according to the second embodiment, the resin layer 80 is formed on the plurality of semiconductor laminates 15x (the first semiconductor laminate 15a, the second semiconductor laminate 15b, etc.) included in the structure 10. . In this state, after the structure 10 is mounted on the wiring substrate 70, the plurality of semiconductor laminates 15x are singulated. In this manufacturing method, the plurality of semiconductor laminates 15x can be collectively mounted on the wiring board 70 while maintaining the positions of the plurality of semiconductor laminates 15x in the structure 10 . Also in the second embodiment, it is possible to arrange a plurality of light emitting elements densely and suppress variation in the distance between the light emitting elements.

In embodiments of the present invention, semiconductor layers 11a, 11b and 11c comprise, for example, gallium and nitrogen. Semiconductor layers 12a, 12b and 12c contain, for example, gallium and nitrogen. Active layers 13a, 13b and 13c contain, for example, gallium, indium and nitrogen.

The conductive portions 21a, 22a and 23a contain, for example, Cu, Au or Al. The conductive portions 21b, 22b and 23b contain, for example, Cu, Au or Al. The conductive layers 25a, 25b and 25c contain Ag, ITO (indium tin oxide), Ni, or the like, for example.

According to the embodiments of the present invention, it is possible to provide a method of manufacturing a light-emitting device in which a plurality of light-emitting elements are densely arranged and variation in the distance between the light-emitting elements is suppressed.

The embodiments of the present invention have been described above with reference to specific examples. However, the invention is not limited to these specific examples. For example, with respect to specific configurations of the substrate, the semiconductor laminate, and the resin layer included in the light-emitting device, those skilled in the art can carry out the present invention in the same manner by appropriately selecting them from the ranges known to those skilled in the art. It is included in the scope of the present invention as long as the effect of the above can be obtained.

Any combination of two or more elements of each specific example within the technically possible range is also included in the scope of the present invention as long as it includes the gist of the present invention.

DESCRIPTION OF SYMBOLS 10... Structure, 11a-11c, 12a-12c... Semiconductor layer, 13a-13c... Active layer, 15A-15C... 1st - 3rd area|region, 15a-15c... 1st - 3rd semiconductor laminated body, 15x... Semiconductor Laminated body 21 to 23 First to third conductive members 21a, 21b, 22a, 22b, 23a, 23b Conductive portion 25a to 25c Conductive layer 50 Silicon substrate 50a, 50b First and third 2 surfaces 51 to 55 First to fifth substrate regions 60 Grooves 61, 62 First and second grooves 70 Wiring substrates 71, 72 Wiring layers 80 Resin layers 81, 82 ... First and second mask members 85A, 85B ... First and second wavelength conversion layers 88A, 88B ... First and second light transmission layers S110 ... Structure preparation step S120 ... Mounting step S130 ... Separation Steps S140 Resin layer forming step S150 Mask member forming step S160 Region forming step S170 Wavelength conversion layer forming step S180 Mask member removing step S190 Region forming step S191 Mask member forming step S192... Substrate region removing step S200... Wavelength conversion layer forming step S210... Mask member removing step S220... Light transmissive layer forming step S230... Region forming step S240... Light transmissive layer forming step S320... Resin layer forming step , S340: Mounting process

Claims (9)

A silicon substrate including a first surface provided with a groove, a first semiconductor laminate and a second semiconductor laminate provided on the first surface, and a first conductive member provided on the first semiconductor laminate. and a second conductive member provided in the second semiconductor laminate, wherein the silicon substrate includes a first substrate region facing the first semiconductor laminate and the second semiconductor laminate. providing the structure, comprising a second substrate region facing a body and a third substrate region positioned between the first and second substrate regions and facing the trench;
mounting the structure on a wiring substrate via the first conductive member and the second conductive member;
After mounting the structure on the wiring substrate, removing the third substrate region to separate the first substrate region and the second substrate region;
forming a resin layer between the first substrate region and the second substrate region;
forming a first mask member covering the second substrate region and exposing the first substrate region;
forming a first region by removing the first substrate region while the second substrate region is covered with the first mask member to expose the first semiconductor stack;
forming a first wavelength conversion layer in the first region;
removing the first mask member;
forming a second region by removing the second substrate region and exposing the second semiconductor stack;
A method for manufacturing a light-emitting device, comprising: A silicon substrate including a first surface provided with a groove, a first semiconductor laminate and a second semiconductor laminate provided on the first surface, and a first conductive member provided on the first semiconductor laminate. and a second conductive member provided in the second semiconductor laminate, wherein the silicon substrate includes a first substrate region facing the first semiconductor laminate and the second semiconductor laminate. providing the structure, comprising a second substrate region facing a body and a third substrate region located between the first and second substrate regions and facing the groove;
forming a resin layer in the groove;
After forming the resin layer, removing the third substrate region to separate the first substrate region and the second substrate region;
After separating the first substrate region and the second substrate region, the first semiconductor laminate is mounted on a wiring substrate via the first conductive member, and the second semiconductor laminate is mounted on the second conductive member. mounting on the wiring board via a member;
forming a first mask member covering the second substrate region and exposing the first substrate region;
forming a first region by removing the first substrate region while the second substrate region is covered with the first mask member to expose the first semiconductor stack;
forming a first wavelength conversion layer in the first region;
removing the first mask member;
forming a second region by removing the second substrate region and exposing the second semiconductor stack;
A method for manufacturing a light-emitting device, comprising: Further comprising the step of forming a second wavelength conversion layer in the second region,
3. The method of manufacturing a light-emitting device according to claim 1, wherein the peak wavelength of light emitted from said second wavelength conversion layer is different from the peak wavelength of light emitted from said first wavelength conversion layer. The structure further includes a third semiconductor laminate provided on the first surface, and a third conductive member provided on the third semiconductor laminate,
The silicon substrate further includes a fourth substrate region facing the third semiconductor stack,
The step of mounting on the wiring board further includes mounting the third semiconductor laminate on the wiring board via the third conductive member,
The step of forming the second region includes forming a second mask member for covering the first wavelength conversion layer and exposing the second substrate region, and then forming the first wavelength conversion layer with the second mask member. removing the second substrate region while covering the
removing the second mask member;
forming a third region by removing the fourth substrate region and exposing the third semiconductor stack;
4. The method of manufacturing a light-emitting device according to claim 3, further comprising: After forming the first wavelength conversion layer and the second wavelength conversion layer and before forming the third region, a first light transmission layer is formed on the first wavelength conversion layer and the second wavelength conversion layer 5. The method of manufacturing a light-emitting device according to claim 4, further comprising forming a . 6. The method of manufacturing a light-emitting device according to claim 4, further comprising the step of forming a second light-transmitting layer in said third region. 7. The method of manufacturing a light-emitting device according to claim 1, wherein said resin layer has light reflectivity. 8. The method of manufacturing a light-emitting device according to claim 1, wherein in the step of forming said first wavelength conversion layer, said first wavelength conversion layer is formed by electrodeposition. 8. The method of manufacturing a light-emitting device according to claim 1, wherein in the step of forming said first wavelength conversion layer, said first wavelength conversion layer is formed by coating.

Images