JP7116520B2 - Manufacturing method for multilayer ceramic electronic component - Google Patents

Description

The present invention relates to a method of manufacturing a laminated ceramic electronic component to which a side margin portion is retrofitted.

2. Description of the Related Art In recent years, along with the miniaturization and high performance of electronic devices, there has been an increasing demand for miniaturization and large capacity of laminated ceramic electronic components used in electronic devices. In order to meet this demand, it is effective to secure a sufficient crossing area of the internal electrodes laminated between the ceramic layers of the multilayer ceramic electronic component.

On the other hand, in the general method of manufacturing multilayer ceramic electronic components, due to the accuracy of each process (for example, patterning of internal electrodes, cutting of laminated sheets, etc.), lamination misalignment of internal electrodes occurs, and the intersecting area of internal electrodes may decrease.

Therefore, in Patent Document 1, by cutting a laminated sheet (mother block), laminated chips (green chips) with internal electrodes exposed on the side surfaces are produced, and side margins (raw ceramics) are formed on the side surfaces of the laminated chips. A method for manufacturing a multilayer ceramic electronic component is described in which a green component body provided with a protective layer) is produced.

JP 2012-209539 A

However, in the technique described in Patent Document 1, in the process of cutting the laminated sheet, the cut surface is dragged by the cutting blade, and short-circuiting defects tend to occur between the internal electrodes exposed on the cut surface.

In view of the circumstances as described above, it is an object of the present invention to provide a method of manufacturing a multilayer ceramic electronic component capable of preventing short-circuit defects between internal electrodes on a cut surface of a multilayer sheet.

In order to achieve the above object, a method for manufacturing a multilayer ceramic electronic component according to one aspect of the present invention comprises:
A plurality of ceramic sheets having internal electrodes formed thereon are sequentially laminated along a first direction, and each ceramic sheet is laminated in a second direction parallel to and opposite to the first direction each time the ceramic sheets are laminated. By applying pressure, a laminated sheet having a first main surface facing in the first direction and a second main surface facing in the second direction is produced.
By inserting a cutting blade from the first main surface and cutting the laminated sheet, a laminated chip having a cut surface in which the internal electrodes are exposed is produced.
A side margin portion is formed on the cut surface of the laminated chip.

According to the above configuration, the second main surface side of the laminated sheet is densified by the accumulation of the number of pressurizations during lamination. Therefore, the density and hardness are lower on the first main surface side than on the second main surface side. By inserting the cutting blade from the first main surface with low hardness, not from the second main surface with high hardness, damage to the cutting blade can be reduced and chipping of the blade can be prevented. Therefore, it is possible to prevent scratches from being formed on the cut surface and to prevent short-circuit defects between the internal electrodes.

For example, the cutting blade may be a push cutting blade.
In the case of a press-cutting blade, if the blade is broken, the blade fragment is dragged while cutting, and the cut surface is likely to be damaged. By applying the above configuration, it is possible to more effectively prevent scratches caused by dragging.

The method for manufacturing the multilayer ceramic electronic component further comprises:
holding the first main surface of the laminated sheet produced by a first holding member;
causing a second holding member to hold the second main surface of the laminated sheet held by the first holding member;
removing the first holding member from the laminated sheet held by the second holding member;
A step of cutting the laminated sheet from which the first holding member is removed and held by the second holding member may be included.

Thereby, the laminated sheet can be cut while being held by the second holding member, and the laminated chip after cutting can be easily handled. Moreover, since the first main surface can be an open surface while using the holding member, the cutting blade can be easily inserted from the first main surface.

As described above, according to the present invention, it is possible to provide a method for manufacturing a multilayer ceramic electronic component that can prevent short-circuit defects between internal electrodes on a cut surface of a multilayer sheet.

1 is a perspective view of a laminated ceramic capacitor according to one embodiment of the present invention; FIG. FIG. 2 is a cross-sectional view of the laminated ceramic capacitor taken along line AA'; FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line BB'; 4 is a flow chart showing a method of manufacturing the laminated ceramic capacitor. It is a top view which shows the manufacturing process of the said laminated ceramic capacitor. It is a perspective view which shows the manufacturing process of the said laminated ceramic capacitor. It is a cross-sectional view showing a manufacturing process of the laminated ceramic capacitor. It is a cross-sectional view showing a manufacturing process of the laminated ceramic capacitor. It is a cross-sectional view showing a manufacturing process of the laminated ceramic capacitor. It is a cross-sectional view showing a manufacturing process of the laminated ceramic capacitor. It is a top view which shows the manufacturing process of the said laminated ceramic capacitor. It is a cross-sectional view showing a manufacturing process of the laminated ceramic capacitor. It is a perspective view which shows the manufacturing process of the said laminated ceramic capacitor. It is a perspective view which shows the manufacturing process of the said laminated ceramic capacitor. FIG. 4 is a diagram schematically showing an image of a side surface of a laminated chip taken in the manufacturing process of the laminated ceramic capacitor;

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
The drawings show mutually orthogonal X, Y and Z axes where appropriate. The X-axis, Y-axis, and Z-axis are common in all drawings.

[Structure of Multilayer Ceramic Capacitor 10]
1 to 3 are diagrams showing a multilayer ceramic capacitor 10 according to one embodiment of the present invention. FIG. 1 is a perspective view of a laminated ceramic capacitor 10. FIG. FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along line AA' in FIG. FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along line BB'.

A laminated ceramic capacitor 10 includes a ceramic element body 11 , a first external electrode 14 and a second external electrode 15 . The ceramic body 11 typically has two end surfaces 11a and 11b facing the X-axis direction, two side surfaces 11c and 11d facing the Y-axis direction, and two main surfaces 11e facing the Z-axis direction. , 11f and . Ridges connecting the surfaces of the ceramic body 11 are chamfered.

Note that the shape of the ceramic body 11 is not limited to the above. That is, the ceramic body 11 does not have to have a rectangular parallelepiped shape as shown in FIGS. For example, each surface of the ceramic body 11 may be curved, and the ceramic body 11 may have a rounded shape as a whole.

Although the size of the ceramic body 11 is not particularly limited, for example, the height dimension along the Z-axis direction is preferably 0.3 mm or more, more preferably 0.5 mm or more. In addition, let each dimension be the largest dimension along each direction.

The external electrodes 14, 15 cover the end faces 11a, 11b of the ceramic body 11 and extend to four faces (main faces 11e, 11f and side faces 11c, 11d) connected to the end faces 11a, 11b. As a result, both the external electrodes 14 and 15 have a U-shaped cross section parallel to the XZ plane and a cross section parallel to the XY plane.

The ceramic body 11 has a laminated chip 16 and side margin portions 17 . The side margin portions 17 respectively cover the entire regions of both side surfaces of the laminated chip 16 facing the Y-axis direction.

The laminated chip 16 has a capacitance forming portion 19, a first cover portion 20a, and a second cover portion 20b. The first cover portion 20a covers the upper surface of the capacitance forming portion 19 in the Z-axis direction, and the second cover portion 20b covers the lower surface of the capacitance forming portion 19 in the Z-axis direction. The capacitance forming portion 19 has a plurality of ceramic layers 18 , a plurality of first internal electrodes 12 and a plurality of second internal electrodes 13 . The internal electrodes 12 and 13 are not provided on the cover portions 20a and 20b.

In the ceramic body 11, surfaces other than the end surfaces 11a and 11b on which the external electrodes 14 and 15 are provided in the capacitance forming portion 19 are covered with the side margin portions 17 and the cover portions 20a and 20b. The side margin portion 17 and the cover portions 20a and 20b mainly have the function of protecting the periphery of the capacitance forming portion 19 and ensuring the insulation of the internal electrodes 12 and 13. As shown in FIG.

The internal electrodes 12 and 13 are alternately arranged along the Z-axis direction between a plurality of ceramic layers 18 laminated in the Z-axis direction. The first internal electrode 12 is connected to the first external electrode 14 and separated from the second external electrode 15 . The second internal electrode 13 is connected to the second external electrode 15 and separated from the first external electrode 14 . The internal electrodes 12 and 13 are mainly composed of a highly conductive metal such as nickel (Ni) or copper (Cu).

A ceramic layer 18 between the internal electrodes 12 and 13 in the capacitance forming portion 19 is made of dielectric ceramics. In the multilayer ceramic capacitor 10 , dielectric ceramics with a high dielectric constant are used as the dielectric ceramics forming the ceramic layers 18 in order to increase the capacitance of the capacitance forming portion 19 .

More specifically, in the multilayer ceramic capacitor 10, polycrystalline barium titanate (BaTiO ₃ )-based materials, that is, barium (Ba) and titanium (Ti) are used as dielectric ceramics with a high dielectric constant forming the ceramic layers 18 . A polycrystal with a perovskite structure containing is used. Thereby, a large capacitance can be obtained in the multilayer ceramic capacitor 10 .

The ceramic layer 18 is made of strontium titanate (SrTiO ₃ ), calcium titanate (CaTiO ₃ ), magnesium titanate (MgTiO ₃ ), calcium zirconate (CaZrO ₃ ), calcium zirconate titanate (Ca (Zr, Ti)O ₃ ) system, barium zirconate (BaZrO ₃ ) system, titanium oxide (TiO ₂ ) system, or the like may be used.

The side margin portion 17 and the cover portions 20a and 20b are also made of dielectric ceramics. The side margin portion 17 and the cover portions 20a and 20b may be made of insulating ceramics, but internal stress in the ceramic body 11 can be suppressed by using the same dielectric ceramics as the ceramic layer 18. FIG.

With the above configuration, in the multilayer ceramic capacitor 10, when a voltage is applied between the first external electrode 14 and the second external electrode 15, the plurality of voltages between the first internal electrode 12 and the second internal electrode 13 A voltage is applied to the ceramic layer 18 . As a result, in the multilayer ceramic capacitor 10 , electric charges corresponding to the voltage between the first external electrode 14 and the second external electrode 15 are stored.

The basic configuration of the laminated ceramic capacitor 10 according to this embodiment is not limited to the configurations shown in FIGS. 1 to 3, and can be changed as appropriate. For example, the number of internal electrodes 12 and 13 and the thickness of ceramic layer 18 can be appropriately determined according to the size and performance required of multilayer ceramic capacitor 10 .

[Manufacturing Method of Multilayer Ceramic Capacitor 10]
FIG. 4 is a flow chart showing the manufacturing method of the multilayer ceramic capacitor 10. As shown in FIG. 5 to 14 are diagrams showing the manufacturing process of the multilayer ceramic capacitor 10. FIG. Hereinafter, a method for manufacturing the laminated ceramic capacitor 10 will be described along FIG. 4 with reference to FIGS. 5 to 14 as appropriate.

(Step S01: Ceramic sheet preparation)
In step S01, a first ceramic sheet 101 and a second ceramic sheet 102 for forming the capacitance forming portion 19, and a third ceramic sheet 103 for forming the cover portions 20a and 20b are prepared. The ceramic sheets 101, 102, 103 are configured as unfired dielectric green sheets containing dielectric ceramics as a main component.

The ceramic sheets 101, 102, 103 are formed into sheets using, for example, a roll coater or a doctor blade. The thickness of the ceramic sheets 101, 102, 103 can be adjusted appropriately.

FIG. 5 is a plan view of the ceramic sheets 101, 102, 103. FIG. At this stage, the ceramic sheets 101, 102, 103 are constructed as large sheets that are not singulated. FIG. 5 shows cutting lines Lx and Ly used when individualizing each laminated ceramic capacitor 10 . The cutting line Lx is parallel to the X-axis, and the cutting line Ly is parallel to the Y-axis.

As shown in FIG. 5, unfired first internal electrodes 112 corresponding to the first internal electrodes 12 are formed on the first ceramic sheet 101 , and unfired first internal electrodes 112 corresponding to the second internal electrodes 13 are formed on the second ceramic sheet 102 . A sintered second internal electrode 113 is formed. No internal electrodes are formed on the third ceramic sheet 103 corresponding to the cover portions 20a and 20b.

The internal electrodes 112, 113 can be formed by applying any conductive paste to the ceramic sheets 101, 102. FIG. A method for applying the conductive paste can be arbitrarily selected from known techniques. For example, a screen printing method or a gravure printing method can be used to apply the conductive paste.

The internal electrodes 112 and 113 are patterned into a plurality of strips extending along the Y-axis direction. Each belt-like pattern extends along one cutting line Ly while crossing each cutting line Lx. Adjacent belt-like patterns are spaced apart in the X-axis direction with one cutting line Ly interposed therebetween.

(Step S02: Laminated sheet production)
In step S02, ceramic sheets 101, 102, and 103 prepared in step S01 are laminated along the first direction Z1 parallel to the Z-axis direction in the order shown in FIG.

In step S02, first, a plurality of third ceramic sheets 103 are laminated along the first direction Z1 to form the first laminate 105. As shown in FIG. The number of laminated third ceramic sheets 103 in the first laminate 105 is not limited to the illustrated example. The first laminate 105 corresponds to the second cover portion 20b. A surface of the first laminate 105 that is parallel to the Z-axis direction and faces in a second direction Z2 opposite to the first direction Z1 constitutes a second main surface S2 of the laminate sheet 104 .

Subsequently, the first ceramic sheets 101 and the second ceramic sheets 102 are alternately laminated on the first laminate 105 in the first direction Z1 to form the second laminate 106 . The second stacked body 106 corresponds to the capacitance forming portion 19 .

A plurality of third ceramic sheets 103 are laminated on the second laminate 106 along the first direction Z1 to form a third laminate 107 . The number of laminated third ceramic sheets 103 in the third laminated body 107 is not limited to the illustrated example. The third laminate 107 corresponds to the first cover portion 20a. The surface of the third laminate 107 facing the first direction Z1 constitutes the first main surface S1 of the laminate sheet 104 .

In this step, each time a new ceramic sheet is laminated, the ceramic sheet is temporarily pressure-bonded to the laminated body in the middle of lamination in the second direction Z2. As a result, the new ceramic sheet is brought into close contact with the already laminated ceramic sheets, and separation of the ceramic sheets during the lamination process can be prevented.

FIG. 7 is a schematic cross-sectional view explaining the details of this step. 7 to 10, illustration of the internal electrodes 112 and 113 is omitted.

First, as shown in FIG. 7A, a layered body P1 in the process of being layered is sandwiched between a mounting plate B1 and a pressure plate B2 facing each other in the Z-axis direction. It is assumed that the laminate P1 is formed by laminating one or more ceramic sheets in the first direction Z1. A second main surface S2 of the laminate P1 faces the mounting plate B1.

Subsequently, as shown in FIG. 7B, a new ceramic sheet C is laminated on the surface Pa of the laminate P1 facing the first direction Z1.

Then, the pressure plate B2 moves in the second direction Z2 to press the new ceramic sheet C and the laminate P1 in the second direction Z2. Thereby, as shown in FIG. 7C, the ceramic sheet C is temporarily press-bonded to the laminate P1 to form the laminate P2. Uniaxial pressurization or the like can be used for temporary pressure bonding, for example.

A series of steps shown in FIG. 7 are repeated a number of times corresponding to a predetermined number of laminated sheets to form the laminated sheet 104 .

The mounting plate B1 and the pressure plate B2 need only have sufficient strength to withstand the applied pressure, and are made of metal plates, for example. A weakly adhesive sheet material B3 made of silicon resin or the like may be arranged between the mounting plate B1 and the second main surface S2, if necessary. This can prevent the stacked body P1 from shifting during stacking.

Furthermore, after all the ceramic sheets 101, 102, 103 are laminated, the laminated sheet 104 is similarly crimped. In this case, the same pressurizing mechanism as that used for temporary pressure bonding may be used, or another pressurizing mechanism such as hydrostatic pressurization may be used.

In this step, the laminate of ceramic sheets is subjected to the pressure treatment approximately the same number of times as the number of ceramic sheets laminated in the laminate sheet 104 . That is, since the number of pressurization times differs greatly between the second main surface S2 side and the first main surface S1 side, a difference in density and hardness occurs between them.

(Step S03: Attaching the first tape)
In this step, as shown in FIG. 8, the first main surface S1 of the laminated sheet 104 is attached to the first tape (first holding member) T1, and the first main surface S1 is held by the first tape T1. The first tape T1 is, for example, a tape whose adhesive strength can be managed, and a material whose adhesive strength changes with heat or ultraviolet irradiation can be used. This makes it possible to easily remove the first tape T1 in step S05. Although FIG. 8 shows a mode in which the laminated sheet 104 is arranged on the mounting plate B1 and the sheet material B3, the laminated sheet 104 is transferred to another sheet material, plate material, or the like, and then placed thereon. good too.

(Step S04: Attaching the second tape)
In this step, as shown in FIG. 9, the second main surface S2 of the laminated sheet 104 held by the first tape T1 is attached to the second tape (second holding member) T2, and the second main surface S2 is attached to the second main surface S2. 2 Tape T2 is held. The attachment of the second tape is performed while separating the laminated sheet 104 from the mounting plate B1 and the sheet material B3 and supporting the laminated sheet 104 with the first tape T1. This makes it possible to improve the handleability in the cutting process of step S06. As the second tape T2, a tape whose adhesive strength can be managed similarly to the first tape T1 can be used.

The second tape may be attached with the second main surface S2 (second direction Z2) directed downward in the Z-axis direction as shown in FIG. Z2) may be reversed to face upward in the Z-axis direction.

(Step S05: Remove first tape)
In this step, as shown in FIG. 10, the first tape T1 is peeled off from the first main surface S1 to remove the first tape T1 from the laminated sheet 104. As shown in FIG. As a method for removing the first tape T1, any method may be used as long as it reduces the adhesive force according to the material of the first tape T1, and examples thereof include heating the first tape T1 and irradiating it with ultraviolet rays. This step opens the first main surface S1. On the other hand, the second main surface S2 maintains the state of being attached to the second tape T2.

(Step S06: Disconnect)
In this step, as shown in FIG. 11, by cutting the laminated sheet 104 along the cutting lines Lx and Ly, unfired laminated chips 116 are produced. The laminated chip 116 corresponds to the laminated chip 16 after firing.

FIG. 12 is a schematic cross-sectional view explaining the details of this step.

First, as shown in FIG. 12A, the cutting blade K directed in the second direction Z2 is arranged above the first main surface S1 of the laminated sheet 104 in the Z-axis direction. The cutting blade K is configured as a push cutting blade. The laminated sheet 104 is held by the second tape T2.

Next, as shown in FIG. 12B, the cutting blade K is moved in the second direction Z2, inserted into the first main surface S1 of the laminated sheet 104, and cut from the first main surface S1 to the second main surface S2. The laminated sheet 104 is cut in the direction of FIG. The cutting blade K is adjusted so as to reach the second tape T2 and not completely cut the second tape T2. By using the second tape T2, it is possible to collectively handle a plurality of layered chips 116 even after singulation.

Finally, as shown in FIG. 12C, the cutting blade K is moved in the first direction Z1 to pull out the cutting blade K from the laminated sheet 104. Then, as shown in FIG. Thereby, the laminated sheet 104 is singulated into a plurality of laminated chips 116 . After being cut, the second tape T2 is removed from the layered chip 116 at a predetermined timing.

FIG. 13 is a perspective view of the layered chip 116 obtained in step S03. A capacitance forming portion 119 and a cover portion 120 are formed in the laminated chip 116 . Ends of the internal electrodes 112 and 113 are exposed from both side surfaces S3 and S4 which are cut surfaces of the laminated chip 116 . A ceramic layer 118 is formed between the internal electrodes 112 and 113 .

(Step S07: Side Margin Formation)
In this step, unsintered side margin portions 117 are provided on the side surfaces S3 and S4 of the laminated chip 116 . As a result, an unfired ceramic body 111 shown in FIG. 14 is produced. This step is performed by removing the second tape T2 from the layered chip 116 in advance and rotating the layered chip 116 by 90 degrees.

The side margin portion 117 can be formed by attaching a ceramic sheet to the side surfaces S3 and S4 of the laminated chip 116, for example. Alternatively, the side margin portions 117 can also be formed by coating the side surfaces S3 and S4 of the laminated chip 116 with ceramic slurry by, for example, coating or dipping.

(Step S08: Firing)
In this step, the unfired ceramic body 111 obtained in step S07 is sintered to fabricate the ceramic body 11 of the multilayer ceramic capacitor 10 shown in FIGS. That is, the laminated chip 116 becomes the laminated chip 16 and the side margin portion 117 becomes the side margin portion 17 by step S08.

The sintering temperature in this step can be determined based on the sintering temperature of the ceramic body 111 . For example, when a barium titanate-based material is used as the dielectric ceramics, the firing temperature can be about 1000 to 1300.degree. Firing can be performed, for example, in a reducing atmosphere or in a low oxygen partial pressure atmosphere.

(Step S09: External electrode formation)
In this step, the multilayer ceramic capacitor 10 shown in FIGS. 1 to 3 is produced by forming the external electrodes 14 and 15 on the ceramic body 11 obtained in step S08. The external electrodes 14 and 15 are formed, for example, by baking an unbaked electrode material applied to the end faces 11a and 11b and performing plating such as electroplating using the baked conductive film as a base film.

Part of the processing in step S09 may be performed before step S08. For example, an unfired electrode material may be applied to the end faces 11a and 11b of the unfired ceramic body 111 before step S08. Accordingly, in step S08, firing of the unfired ceramic body 111 and baking of the electrode material can be performed simultaneously.

[Action and effect of the present embodiment]
In this embodiment, the laminated sheet 104 is cut from the first main surface S1 toward the second main surface S2. Thereby, a cutting blade can be inserted in 1st main surface S1 with low hardness. Therefore, it is possible to reduce the damage to the cutting blade during cutting and prevent blade breakage. Hereinafter, the effects will be described in detail using examples of the present embodiment.

Samples 1 and 2 of the laminated sheet 104 were produced in order to confirm the actual hardness of the first main surface S1 side and the second main surface S2 side. Samples 1 and 2 are laminated sheets 104 designed assuming a laminated ceramic capacitor having a dimension of 1.0 mm in the X-axis direction and 0.5 mm in the Y-axis and Z-axis directions. The thickness of the green sheets constituting each ceramic sheet was 0.8 μm, and the number of layers of the ceramic sheets was 600 layers.

The hardness was obtained by indenting a diamond indenter (triangular pyramid shape, tip installation side 100 nm, opposite edge angle 80°) at 21 nm/sec at room temperature by the nanoindentation method, and measuring displacement and load. Further, specifically, as the first main surface S1 side, a position 30 μm in the Z-axis direction from the surface of the first main surface S1 is defined as the second main surface S2 side, and in the Z-axis direction from the surface of the second main surface S2. A position of 30 μm was measured. In addition, the measured value was calculated as an average value of 100 samples.

Table 1 shows the hardness measurement results on the first main surface S1 side and the second main surface S2 side. The results in Table 1 show the relative values of the hardness measured at each position with respect to the hardness on the first main surface S1 side of Sample 1, which is 1.0.

As shown in Table 1, in sample 1, the hardness on the side of the second main surface S2 was 1.9 with respect to the hardness on the side of the first main surface S1 (1.0).
Sample 2 has a hardness of 1.2 on the side of the first main surface S1 and a hardness of 1.6 on the side of the second main surface S2 with respect to the hardness (1.0) on the side of the first main surface S1 of Sample 1. there were.
That is, in both samples 1 and 2, a difference of about 1.5 to 2.0 times was observed between the first main surface S1 side and the second main surface S2 side.

From these results, it was confirmed that the hardness on the side of the first main surface S1 is significantly lower than that on the side of the second main surface S2. This is because the number of pressurizations on the second main surface S2 side and the first main surface S1 side differ greatly. In other words, the third ceramic sheet 103 constituting the second main surface S2 is pressed approximately the same number of times as the number of laminated sheets. On the other hand, the third ceramic sheet 103 forming the first main surface S1 is pressed only during the final pressure bonding. As a result, the first main surface S1 side is less compacted than the second main surface S2 side, and the hardness is lower.

Due to such a difference in hardness, when the cutting blade is inserted from the first main surface S1 toward the second main surface S2 and when the cutting blade is inserted from the second main surface S2 toward the first main surface S1 It is thought that the damage received by the cutting blade in the cutting process varies greatly.

Therefore, with respect to the sample 1, a sample 1-1 cut from the first main surface S1 toward the second main surface S2 and a sample 1-2 cut from the second main surface S2 toward the first main surface S1 were obtained. , and the states of the side surfaces S3 and S4, which are cut surfaces, were observed. Observation was performed using images of the side surfaces S3 and S4.

15A and 15B are diagrams schematically showing the images of the side surfaces S3 and S4 that have been captured. FIG. 15A shows the result of sample 1-1, and FIG. 15B shows the result of sample 1-2.

Sample 1-2 shown in FIG. 15B had many scratch marks H2 extending from the second main surface S2 to the first main surface S1. Specifically, 20 or more drag scratches H2 having a width of 20 μm or more along the X-axis direction were formed on the imaged side surfaces S3 and S4. It was presumed that the scratch H2 having such a width also has a certain depth in the Y-axis direction.

On the other hand, in sample 1-1 shown in FIG. 15A, although several scratches H1 are observed, the width of each drag scratch H1 along the X-axis direction is 10 μm or less, and the depth along the Y-axis direction is 10 μm or less. It was presumed to be shallower than the scratch H2 of 1-2.

Observation of the cutting blade K after many drag scratches H2 were formed on the side surfaces S3 and S4 revealed that a portion of the cutting blade K was chipped. For this reason, the cutting blade K receives damage from the laminated sheet 104 during cutting, so-called blade spillage occurs, and the cutting blade K drags the chipped blade fragments, forming many deep scratches H2. It is considered to be a thing.

Furthermore, the internal electrodes 112 and 113 are extended in the Z-axis direction by forming such a scratch H2 on the side surfaces S3 and S4. As a result, there is a possibility that the internal electrodes 112 and 113 will be short-circuited.

Therefore, the samples 1 and 2 were cut from the first main surface S1 toward the second main surface S2, and the samples 1-1 and 2-1 were cut from the second main surface S2 toward the first main surface S1. The IR defect rate (initial insulation resistance defect rate) of Samples 1-2 and 2-2 was examined. The IR defect rate was calculated as the ratio of the number of chips determined to be IR defective to the total number of chips (100) in each of Samples 1-1 to 2-2. Defective IR was determined by measuring the insulation resistance at room temperature after holding for 72 hours in an environment of 125° C.-95% RH with a voltage of 10 V applied, and determining that it was 1 MΩ or less.

Table 2 shows the IR defect rate results. The results in Table 2 show the relative value of the IR defect rate of each sample with respect to the IR defect rate of sample 1-1 assuming 1.0.

As shown in Table 2, Sample 1 is cut from the second main surface S2 toward the first main surface S1, as opposed to Sample 1-1, which is cut from the first main surface S1 toward the second main surface S2. In sample 1-2, which has been tested, the IR defect rate is 3.2 times larger.
Sample 2 also gave similar results. That is, in contrast to the sample 2-1 cut from the first main surface S1 toward the second main surface S2, the sample 2-2 cut from the second main surface S2 toward the first main surface S1 has an IR defect. The ratio was 2.7 times greater (3.0 times for sample 1-1).

Furthermore, the position where an abnormal leakage current such as a short circuit occurs on the side surfaces S3 and S4 is detected by an optical beam heating resistance change method (OBIRCH), and combined with the imaged images of the side surfaces S3 and S4. and analyzed. As a result, the positions of the large scratch and the location of the abnormal occurrence almost coincided. Therefore, it was confirmed that the internal electrodes 112 and 113 were short-circuited due to the scratch on the side surfaces S3 and S4.

As described above, the IR defect rate can be reduced by inserting the cutting blade K from the first main surface S1 having a hardness lower than that of the second main surface S2. That is, in the present embodiment, damage to the cutting blade K can be reduced, chipping of the cutting blade K can be suppressed, and the occurrence of drag scratches on the side surfaces S3 and S4 can be suppressed. 13) It is possible to prevent short-circuit failures between.

If a short-circuit failure occurs on the side surfaces S3 and S4, it is necessary to add a polishing process for the side surfaces S3 and S4 to expose the surface without scratches, or to discard the chip with the short-circuit failure. becomes. That is, by reducing the IR defect rate on the side surfaces S3 and S4, the need for such measures can be reduced, and the manufacturing efficiency of the multilayer ceramic capacitor 10 can be improved.

On the other hand, conventionally, in order to facilitate handling of the laminated chip after cutting, the laminated sheet has been cut while holding the lower surface of the laminated sheet in the Z-axis direction with a holding member such as tape. In this case, one type of tape can be used. That is, the tape is attached to the first main surface, which will be the uppermost surface in the Z-axis direction during lamination, and the stack is reversed in the Z-axis direction. Thereby, the second main surface to which the tape is not attached faces the first direction, and the cutting blade can be inserted from the second main surface.

In other words, in the above method, although the number of tape-related steps is minimized, the cutting blade is inserted from the second main surface, which has a high hardness. Therefore, the cutting blade tends to be chipped, and as described above, a large number of scratches are formed on the cut surface, resulting in an increase in the IR defect rate.

In this embodiment, the first tape T1 and the second tape T2 are purposely used, the tape T2 is attached to the second main surface S2, the first tape T1 attached to the first main surface S1 is peeled off, and the first main surface is The cutting step is performed with S1 facing the first direction Z1. As a result, although the number of tape-related steps increases, the IR defect rate can be significantly reduced, resulting in an increase in manufacturing efficiency.

Further, if the same cutting blade is used to continue the cutting process, the blade is likely to be easily chipped, and a scratch is likely to be formed. Therefore, the method for manufacturing the multilayer ceramic capacitor 10 of the present embodiment may include, after the cutting step, a step of replacing the cutting blade with a new one if it is determined that there is a high risk of chipping of the cutting blade.

The risk of chipping of the cutting blade can be determined, for example, in consideration of the number of cuts of the cutting blade, the number of laminated sheets cut by the cutting blade, and the like.

Alternatively, the risk of chipping of the cutting blade can be determined in consideration of the state of the scratch on the side surfaces S3 and S4. For example, after cutting, a step of capturing images of the side surfaces S3 and S4, which are cut surfaces, a step of analyzing the side surfaces S3 and S4 for drag damage based on the captured images, and a process where the analysis result of the drag damage satisfies a predetermined condition. and replacing the cutting blade with a new cutting blade when it is worn.

The conditions to be satisfied include at least one of the width dimension of the scratch along the X-axis direction, the depth of the scratch, and the number of scratches in the image of one side surface S3 or S4. Just do it. The numerical ranges for these conditions can be appropriately set according to the size of the laminated ceramic capacitor 10, the type of cutting blade, and the like. As an example, when a certain number of scratches having a width dimension of 10 μm or more along the X-axis direction in one image (one side surface S3 or S4) exceeds a certain number, the cutting blade is replaced with a new one. can be stipulated in

By adding the above steps, it is possible to manage the cutting blade in a good state with less blade spillage. Therefore, it is possible to more effectively suppress the occurrence of a short circuit.

[Other embodiments]
Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist of the present invention.

In the embodiment described above, the first main surface S1 is oriented in the first direction Z1 using the first tape T1 and the second tape T2, but the method is not limited to this. For example, a holding member such as a tape is arranged on the mounting plate B1 in the lamination step, and the ceramic sheets 103 are laminated on the surface of the holding member facing the first direction Z1. After all the ceramic sheets 101, 102, 103 are laminated to form the laminated sheet 104, the cutting process can be performed while the second main surface S2 is held by the holding member. As a result, it is possible to reduce the number of processes for re-sticking the tape, and to further improve the manufacturing efficiency.

Also, in the above embodiment, the cutting blade is a push cutting blade, but the cutting blade may be a rotating blade. Also in this case, by inserting the rotary blade from the first main surface S1, it is possible to suppress the damage to the rotary blade and to suppress the formation of the scratch due to the blade spillage on the side surfaces S3 and S4.

In addition, in the above embodiments, the laminated ceramic capacitor was explained as an example of the laminated ceramic electronic component, but the present invention is applicable to laminated ceramic electronic components in general. Examples of such laminated ceramic electronic components include inductors, varistors, and piezoelectric elements.

DESCRIPTION OF SYMBOLS 10... Laminated ceramic capacitor 11... Ceramic element body 12, 13... Internal electrodes 14, 15... External electrode 16... Laminated chip 17... Side margin part 19... Capacitance formation part 20a, 20b... Cover part 104... Laminated sheet 111... Unfired Ceramic body 112, 113 Unfired internal electrode 116 Unfired laminated chip 117 Unfired side margin portion K Cutting edge S1 First main surface S2 Second main surface S3, S4 Side surface T1 , T2... tape (holding member)

Claims (3)

A plurality of ceramic sheets having internal electrodes formed thereon are sequentially stacked along a first direction, and each ceramic sheet is stacked in a second direction parallel to and opposite to the first direction each time the ceramic sheets are stacked. Pressing to produce a laminated sheet having a first main surface facing in the first direction and a second main surface facing in the second direction,
holding the first main surface of the laminated sheet produced by a first holding member;
causing a second holding member to hold the second main surface of the laminated sheet held by the first holding member;
removing the first holding member from the laminated sheet held by the second holding member;
By inserting a cutting blade from the first main surface and cutting the laminated sheet from which the first holding member is removed and held by the second holding member, a laminate having a cut surface in which the internal electrode is exposed make a chip
A method of manufacturing a multilayer ceramic electronic component, comprising: forming a side margin portion on the cut surface of the multilayer chip. A method for manufacturing a multilayer ceramic electronic component according to claim 1,
The method for manufacturing a laminated ceramic electronic component, wherein the cutting blade is a press cutting blade. A plurality of ceramic sheets having internal electrodes formed thereon are sequentially laminated along the first direction on the surface of the holding member facing the first direction, and each ceramic sheet is laminated each time the ceramic sheets are laminated. By applying pressure in a second direction parallel to and opposite to the first direction, a first main surface facing the first direction and a second main surface held by the holding member and facing the second direction; Produce a laminated sheet having
inserting a cutting blade from the first main surface to cut the laminated sheet held by the holding member to fabricate a laminated chip having a cut surface in which the internal electrodes are exposed;
A method for manufacturing a multilayer ceramic electronic component, wherein a side margin portion is formed on the cut surface of the multilayer chip .

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