JP2019169588A - Manufacturing method of multilayer ceramic electronic component - Google Patents

Abstract

To provide a manufacturing method of a multilayer ceramic electronic component, capable of preventing a short circuit failure between inner electrodes on a cutting surface of a lamination sheet.SOLUTION: In a manufacturing method of a multilayer ceramic electronic component, a plurality of ceramic sheets in which an inner electrode is formed is laminated along a first direction in order, each ceramic sheet is pressed in a second direction which is parallel to and a direction inverse to the first direction in each timing of laminating each ceramic sheet, and thereby, a lamination sheet having a first main surface directed to the first direction and a second main surface directed to the second direction is manufactured. By inserting a cutting blade from the first main surface and cutting the lamination sheet, a lamination chip having a cutting surface in which the inner electrode exposes is manufactured. A side margin part is formed in the cutting surface of the lamination chip.SELECTED DRAWING: Figure 12

Description

  The present invention relates to a method for manufacturing a multilayer ceramic electronic component to which a side margin portion is retrofitted.

  In recent years, with the downsizing and high performance of electronic devices, there is an increasing demand for downsizing and increasing the capacity of multilayer ceramic electronic components used in electronic devices. In order to meet this demand, it is effective to ensure a sufficient crossing area of the internal electrodes laminated between the ceramic layers of the multilayer ceramic electronic component.

  On the other hand, in a general method for manufacturing a multilayer ceramic electronic component, due to the accuracy of each step (for example, patterning of internal electrodes, cutting of a laminated sheet, etc.) May decrease.

  Therefore, in Patent Document 1, a laminated chip (green chip) with an internal electrode exposed on a side surface is produced by cutting a laminated sheet (mother block), and a side margin (raw ceramic) is formed on the side surface of the laminated chip. A method for manufacturing a multilayer ceramic electronic component is described in which a raw component body provided with a protective layer) is produced.

JP 2012-209539 A

  However, in the technique described in Patent Document 1, dragging by a cutting blade occurs on the cut surface in the step of cutting the laminated sheet, and short-circuit failure is likely to occur between the internal electrodes exposed on the cut surface.

  In view of the circumstances as described above, an object of the present invention is to provide a method for manufacturing a multilayer ceramic electronic component capable of preventing a short circuit failure between internal electrodes on a cut surface of a multilayer sheet.

In order to achieve the above object, a method for manufacturing a multilayer ceramic electronic component according to an aspect of the present invention includes:
A plurality of ceramic sheets on which internal electrodes are formed are sequentially laminated along the first direction, and each time the ceramic sheets are laminated, the ceramic sheets are arranged in a second direction that is parallel to and opposite to the first direction. By applying pressure, a laminated sheet having a first main surface facing the first direction and a second main surface facing the second direction is produced.
By cutting the laminated sheet by inserting a cutting blade from the first main surface, a laminated chip having a cut surface with the internal electrodes exposed is produced.
A side margin is formed on the cut surface of the multilayer chip.

  According to the said structure, the 2nd main surface side of a lamination sheet is consolidated by accumulation of the frequency | count of pressurization at the time of lamination | stacking. For this reason, the density and hardness are lower on the first main surface side than on the second main surface side. By inserting the cutting blade not from the second main surface having high hardness but from the first main surface having low hardness, it is possible to reduce damage to the cutting blade and prevent blade spillage. Accordingly, it is possible to prevent the cut surface from being scratched and to prevent a short circuit failure between the internal electrodes.

For example, the cutting blade may be a push cutting blade.
In the case of a push cutting blade, if the blade is spilled, it will be cut while dragging the fragments of the blade, and the cut surface will be easily damaged. By applying the above configuration, drag scratches can be more effectively prevented.

The method for producing the multilayer ceramic electronic component further comprises:
Holding the first main surface of the produced laminated sheet on the first holding member;
Holding the second main surface of the laminated sheet held by the first holding member on a second holding member;
Removing the first holding member from the laminated sheet held by the second holding member;
A step of cutting the laminated sheet held on the second holding member after removing the first holding member may be included.

  Accordingly, the laminated sheet can be cut while being held by the second holding member, and handling of the laminated chip after cutting becomes easy. Moreover, since the 1st main surface can be made into an open surface, using a holding member, a cutting blade can be easily inserted from a 1st main surface.

  As described above, according to the present invention, it is possible to provide a method for manufacturing a multilayer ceramic electronic component capable of preventing a short circuit failure between internal electrodes on a cut surface of a multilayer sheet.

1 is a perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention. It is sectional drawing along the AA 'line of the said multilayer ceramic capacitor. It is sectional drawing along the BB 'line of the said multilayer ceramic capacitor. It is a flowchart which shows the manufacturing method of the said multilayer ceramic capacitor. It is a top view which shows the manufacturing process of the said multilayer ceramic capacitor. It is a perspective view which shows the manufacturing process of the said multilayer ceramic capacitor. It is sectional drawing which shows the manufacturing process of the said multilayer ceramic capacitor. It is sectional drawing which shows the manufacturing process of the said multilayer ceramic capacitor. It is sectional drawing which shows the manufacturing process of the said multilayer ceramic capacitor. It is sectional drawing which shows the manufacturing process of the said multilayer ceramic capacitor. It is a top view which shows the manufacturing process of the said multilayer ceramic capacitor. It is sectional drawing which shows the manufacturing process of the said multilayer ceramic capacitor. It is a perspective view which shows the manufacturing process of the said multilayer ceramic capacitor. It is a perspective view which shows the manufacturing process of the said multilayer ceramic capacitor. It is a figure which shows typically the image which imaged the side surface of the multilayer chip in the manufacture process of the said multilayer ceramic capacitor.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
In the drawing, an X axis, a Y axis, and a Z axis that are orthogonal to each other are shown as appropriate. The X axis, Y axis, and Z axis are common in all drawings.

[Configuration of Multilayer Ceramic Capacitor 10]
1 to 3 are views showing a multilayer ceramic capacitor 10 according to an embodiment of the present invention. FIG. 1 is a perspective view of a multilayer ceramic capacitor 10. 2 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along the line AA ′ of FIG. FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along the line BB ′.

  The multilayer ceramic capacitor 10 includes a ceramic body 11, a first external electrode 14, and a second external electrode 15. The ceramic body 11 typically has two end faces 11a and 11b facing the X-axis direction, two side faces 11c and 11d facing the Y-axis direction, and two main faces 11e facing the Z-axis direction. , 11f. The ridges connecting each surface of the ceramic body 11 are chamfered.

  The shape of the ceramic body 11 is not limited to the above. That is, the ceramic body 11 does not have to be a rectangular parallelepiped shape as shown in FIGS. For example, each surface of the ceramic body 11 may be a curved surface, and the ceramic body 11 may have a rounded shape as a whole.

  The size of the ceramic body 11 is not particularly limited. For example, a ceramic body 11 having a height dimension along the Z-axis direction of 0.3 mm or more, more preferably 0.5 mm or more is suitable. Each dimension is the largest dimension along each direction.

  The external electrodes 14 and 15 cover the end surfaces 11a and 11b of the ceramic body 11, and extend to four surfaces (main surfaces 11e and 11f and side surfaces 11c and 11d) connected to the end surfaces 11a and 11b. Thereby, in both the external electrodes 14 and 15, the shape of the cross section parallel to the XZ plane and the cross section parallel to the XY plane is U-shaped.

  The ceramic body 11 includes a multilayer chip 16 and a side margin portion 17. The side margin portion 17 covers the entire area of both side surfaces of the multilayer chip 16 facing the Y-axis direction.

  The multilayer chip 16 includes a capacitance forming part 19, a first cover part 20a, and a second cover part 20b. The first cover portion 20 a covers the upper surface in the Z-axis direction of the capacitance forming portion 19, and the second cover portion 20 b covers the lower surface in the Z-axis direction of the capacitance forming portion 19. The capacitance forming unit 19 includes a plurality of ceramic layers 18, a plurality of first internal electrodes 12, and a plurality of second internal electrodes 13. The cover portions 20a and 20b are not provided with the internal electrodes 12 and 13, respectively.

  In the ceramic body 11, the surface other than the end surfaces 11 a and 11 b where the external electrodes 14 and 15 are provided in the capacitance forming portion 19 is covered with the side margin portion 17 and the cover portions 20 a and 20 b. The side margin portion 17 and the cover portions 20a and 20b mainly have a function of protecting the periphery of the capacitance forming portion 19 and ensuring the insulation of the internal electrodes 12 and 13.

  The internal electrodes 12 and 13 are alternately arranged along the Z-axis direction between the plurality of ceramic layers 18 stacked in the Z-axis direction. The first internal electrode 12 is connected to the first external electrode 14 and is separated from the second external electrode 15. The second internal electrode 13 is connected to the second external electrode 15 and is separated from the first external electrode 14. The internal electrodes 12 and 13 are mainly composed of a highly conductive metal such as nickel (Ni) or copper (Cu).

  The ceramic layer 18 between the internal electrodes 12 and 13 in the capacitance forming portion 19 is formed of dielectric ceramics. In the multilayer ceramic capacitor 10, a dielectric ceramic having a high dielectric constant is used as the dielectric ceramic constituting the ceramic layer 18 in order to increase the capacitance in the capacitance forming portion 19.

More specifically, in the multilayer ceramic capacitor 10, a polycrystal of barium titanate (BaTiO ₃ ) -based material, that is, barium (Ba) and titanium (Ti), is used as the dielectric ceramic having a high dielectric constant constituting the ceramic layer 18. A polycrystalline body having a perovskite structure containing is used. Thereby, a large capacity is obtained in the multilayer ceramic capacitor 10.

The ceramic layer 18 is made of strontium titanate (SrTiO ₃ ), calcium titanate (CaTiO ₃ ), magnesium titanate (MgTiO ₃ ), calcium zirconate (CaZrO ₃ ), calcium zirconate titanate (Ca (Zr, Ti) O ₃ ), barium zirconate (BaZrO ₃ ), titanium oxide (TiO ₂ ), and the like may be used.

  The side margin part 17 and the cover parts 20a and 20b are also formed of dielectric ceramics. The material for forming the side margin portion 17 and the cover portions 20a and 20b may be insulating ceramics, but internal stress in the ceramic body 11 is suppressed by using dielectric ceramics similar to the ceramic layer 18.

  With the above configuration, in the multilayer ceramic capacitor 10, when a voltage is applied between the first external electrode 14 and the second external electrode 15, a plurality of pieces between the first internal electrode 12 and the second internal electrode 13 are provided. A voltage is applied to the ceramic layer 18. As a result, in the multilayer ceramic capacitor 10, charges corresponding to the voltage between the first external electrode 14 and the second external electrode 15 are stored.

  The basic configuration of the multilayer ceramic capacitor 10 according to the present embodiment is not limited to the configuration shown in FIGS. For example, the number of internal electrodes 12 and 13 and the thickness of the ceramic layer 18 can be appropriately determined according to the size and performance required for the multilayer ceramic capacitor 10.

[Method of Manufacturing Multilayer Ceramic Capacitor 10]
FIG. 4 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor 10. 5 to 14 are diagrams illustrating a manufacturing process of the multilayer ceramic capacitor 10. Hereinafter, the manufacturing method of the multilayer ceramic capacitor 10 will be described along FIG. 4 with reference to FIGS.

(Step S01: Preparation of ceramic sheet)
In step S01, a first ceramic sheet 101 and a second ceramic sheet 102 for forming the capacitance forming portion 19 and a third ceramic sheet 103 for forming the cover portions 20a and 20b are prepared. The ceramic sheets 101, 102, and 103 are configured as unfired dielectric green sheets mainly composed of dielectric ceramics.

  The ceramic sheets 101, 102, and 103 are formed into a sheet shape using, for example, a roll coater or a doctor blade. The thickness of the ceramic sheets 101, 102, 103 can be adjusted as appropriate.

  FIG. 5 is a plan view of the ceramic sheets 101, 102, 103. At this stage, the ceramic sheets 101, 102, and 103 are configured as large sheets that are not separated. FIG. 5 shows cutting lines Lx and Ly when the multilayer ceramic capacitors 10 are separated into individual pieces. The cutting line Lx is parallel to the X axis, and the cutting line Ly is parallel to the Y axis.

  As shown in FIG. 5, an unfired first internal electrode 112 corresponding to the first internal electrode 12 is formed on the first ceramic sheet 101, and an unfired first internal electrode 112 corresponding to the second internal electrode 13 is formed on the second ceramic sheet 102. A fired second internal electrode 113 is formed. In addition, the internal electrode is not formed in the 3rd ceramic sheet 103 corresponding to the cover parts 20a and 20b.

  The internal electrodes 112 and 113 can be formed by applying an arbitrary conductive paste to the ceramic sheets 101 and 102. The method for applying the conductive paste can be arbitrarily selected from known techniques. For example, a screen printing method or a gravure printing method can be used for applying the conductive paste.

  The internal electrodes 112 and 113 are patterned into a plurality of strips extending along the Y-axis direction. Each strip-like pattern extends along one cutting line Ly while crossing each cutting line Lx. Adjacent belt-like patterns are spaced apart in the X-axis direction with one cutting line Ly interposed therebetween.

(Step S02: Preparation of laminated sheet)
In step S02, the laminated sheets 104 are produced by laminating the ceramic sheets 101, 102, 103 prepared in step S01 along the first direction Z1 parallel to the Z-axis direction in the order shown in FIG.

  In step S02, first, a plurality of third ceramic sheets 103 are laminated along the first direction Z1, and the first laminated body 105 is formed. The number of stacked third ceramic sheets 103 in the first stacked body 105 is not limited to the illustrated example. The first stacked body 105 corresponds to the second cover portion 20b. The surface of the first laminated body 105 that is parallel to the Z-axis direction and faces the second direction Z2 opposite to the first direction Z1 constitutes the second main surface S2 of the laminated sheet 104.

  Subsequently, the first ceramic sheet 101 and the second ceramic sheet 102 are alternately stacked in the first direction Z1 on the first stacked body 105 to form the second stacked body 106. The second stacked body 106 corresponds to the capacitance forming unit 19.

  Then, a plurality of third ceramic sheets 103 are stacked on the second stacked body 106 along the first direction Z1 to form a third stacked body 107. The number of stacked third ceramic sheets 103 in the third stacked body 107 is not limited to the illustrated example. The third stacked body 107 corresponds to the first cover portion 20a. A surface of the third laminated body 107 facing the first direction Z1 constitutes a first main surface S1 of the laminated sheet 104.

  In this step, every time a new ceramic sheet is laminated, the ceramic sheet is temporarily pressure-bonded to the laminated body in the second direction Z2. As a result, a new ceramic sheet is brought into close contact with the already laminated ceramic sheet, and peeling of each ceramic sheet during the lamination process can be prevented.

  FIG. 7 is a schematic cross-sectional view illustrating details of this step. 7-10, illustration of the internal electrodes 112 and 113 is omitted.

  First, as shown in FIG. 7A, the laminated body P1 in the middle of the lamination is disposed so as to be sandwiched between the mounting plate B1 and the pressure plate B2 that face each other in the Z-axis direction. The stacked body P1 is formed by stacking one or more ceramic sheets in the first direction Z1. The second main surface S2 of the stacked body P1 faces the mounting plate B1.

  Subsequently, as shown in FIG. 7B, a new ceramic sheet C is laminated on the surface Pa facing the first direction Z1 of the multilayer body P1.

  Then, the pressure plate B2 moves in the second direction Z2, and pressurizes the new ceramic sheet C and the laminate P1 in the second direction Z2. Thereby, as shown to FIG. 7C, the ceramic sheet C is temporarily crimped | bonded to the laminated body P1, and the laminated body P2 is formed. For example, uniaxial pressing can be used for the temporary pressure bonding.

  The series of steps shown in FIG. 7 is repeated a number of times corresponding to a predetermined number of laminated sheets, and the laminated sheet 104 is formed.

  The mounting plate B1 and the pressure plate B2 only need to have sufficient strength to withstand the applied pressure, and may be formed of a metal plate, for example. Between the mounting plate B1 and the second main surface S2, a weakly adhesive sheet material B3 formed of silicon resin or the like may be disposed as necessary. Thereby, the shift | offset | difference of the laminated body P1 at the time of lamination | stacking can be prevented.

  Further, after all the ceramic sheets 101, 102, 103 are laminated, the pressure bonding is similarly performed on the laminated sheet 104. In this case, the same pressurization mechanism as that used for temporary pressure bonding may be used, or another pressurization mechanism such as hydrostatic pressurization may be used.

  In this step, the pressure treatment is performed on the ceramic sheet laminate approximately the same number of times as the number of ceramic sheets laminated in the laminated sheet 104. That is, since the number of times of pressurization is greatly different between the second main surface S2 side and the first main surface S1 side, a difference in density and hardness occurs between them.

(Step S03: First tape affixed)
In this step, as shown in FIG. 8, the first main surface S1 of the laminated sheet 104 is attached to the first tape (first holding member) T1, and the first main surface S1 is held on the first tape T1. The first tape T1 is, for example, a tape capable of managing the adhesive force, and a material whose adhesive force changes by heat or ultraviolet irradiation can be used. Thereby, the first tape T1 can be easily removed in step S05. FIG. 8 shows an aspect in which the laminated sheet 104 is disposed on the mounting plate B1 and the sheet material B3. However, the laminated sheet 104 is transferred to another sheet material, a plate material, or the like. Also good.

(Step S04: Attaching the second tape)
In this step, as shown in FIG. 9, the second main surface S2 of the laminated sheet 104 held on the first tape T1 is attached to the second tape (second holding member) T2, and the second main surface S2 is attached to the second tape S2. 2 Hold on the tape T2. The second tape is attached while the laminated sheet 104 is separated from the mounting plate B1 and the sheet material B3 and the laminated sheet 104 is supported by the first tape T1. Thereby, the handleability in the cutting process of step S06 can be improved. As the second tape T2, a tape capable of managing the adhesive force similarly to the first tape T1 can be used.

  The affixing of the second tape may be performed with the second main surface S2 (second direction Z2) facing downward in the Z-axis direction as shown in FIG. 9, or the second main surface S2 (second direction). This may be performed by inverting Z2) so that Z2 is directed upward in the Z-axis direction.

(Step S05: First tape removal)
In this step, as shown in FIG. 10, the first tape T1 is peeled from the first main surface S1, and the first tape T1 is removed from the laminated sheet 104. The removal method of the first tape T1 may be any method that reduces the adhesive strength according to the material of the first tape T1, and includes heating of the first tape T1 and ultraviolet irradiation. By this step, the first main surface S1 is opened. On the other hand, the 2nd main surface S2 is maintaining the state affixed on the 2nd tape T2.

(Step S06: Cutting)
In this step, as shown in FIG. 11, an unfired laminated chip 116 is produced by cutting the laminated sheet 104 along the cutting lines Lx and Ly. The laminated chip 116 corresponds to the laminated chip 16 after firing.

  FIG. 12 is a schematic cross-sectional view illustrating details of this step.

  First, as shown in FIG. 12A, the cutting blade K oriented in the second direction Z2 is arranged above the first main surface S1 of the laminated sheet 104 in the Z-axis direction. The cutting blade K is configured as a push cutting blade. The laminated sheet 104 is held by the second tape T2.

  Next, as shown in FIG. 12 (B), the cutting blade K is moved in the second direction Z2, inserted into the first main surface S1 of the laminated sheet 104, and from the first main surface S1 to the second main surface S2. The laminated sheet 104 is cut toward it. The cutting blade K is adjusted so as to reach the second tape T2 and not completely cut the second tape T2. By using the second tape T2, it is possible to handle a plurality of laminated chips 116 in a lump even after separation.

  Finally, as shown in FIG. 12C, the cutting blade K is moved in the first direction Z1, and the cutting blade K is pulled out from the laminated sheet 104. Thereby, the laminated sheet 104 is separated into a plurality of laminated chips 116. The second tape T2 is removed from the laminated chip 116 at a predetermined timing after cutting.

  FIG. 13 is a perspective view of the multilayer chip 116 obtained in step S03. In the multilayer chip 116, a capacity forming portion 119 and a cover portion 120 are formed. End portions of the internal electrodes 112 and 113 are exposed from both side surfaces S3 and S4 which are cut surfaces of the multilayer chip 116. A ceramic layer 118 is formed between the internal electrodes 112 and 113.

(Step S07: Side margin portion formation)
In this step, an unfired side margin portion 117 is provided on the side surfaces S3 and S4 of the multilayer chip 116. Thereby, the unfired ceramic body 111 shown in FIG. 14 is produced. This step is performed by removing the second tape T2 from the laminated chip 116 in advance and rotating the direction of the laminated chip 116 by 90 degrees.

  The side margin portion 117 can be formed, for example, by attaching a ceramic sheet to the side surfaces S3 and S4 of the multilayer chip 116. Alternatively, the side margin portion 117 can be formed by coating the side surfaces S3 and S4 of the multilayer chip 116 with a ceramic slurry by, for example, coating or dipping.

(Step S08: Firing)
In this step, the ceramic body 11 of the multilayer ceramic capacitor 10 shown in FIGS. 1 to 3 is manufactured by sintering the unfired ceramic body 111 obtained in step S07. That is, in step S08, the laminated chip 116 becomes the laminated chip 16, and the side margin portion 117 becomes the side margin portion 17.

  The firing temperature in this step can be determined based on the sintering temperature of the ceramic body 111. For example, when a barium titanate material is used as the dielectric ceramic, the firing temperature can be about 1000 to 1300 ° C. Firing can be performed, for example, in a reducing atmosphere or in a low oxygen partial pressure atmosphere.

(Step S09: External electrode formation)
In this step, the external electrodes 14 and 15 are formed on the ceramic body 11 obtained in step S08, whereby the multilayer ceramic capacitor 10 shown in FIGS. The external electrodes 14 and 15 are formed, for example, by baking an unfired electrode material applied to the end faces 11a and 11b, and performing a plating process such as electrolytic plating using the burned conductive film as a base film.

  Note that part of the processing in step S09 may be performed before step S08. For example, an unfired electrode material may be applied to the end faces 11a and 11b of the unfired ceramic body 111 before step S08. Thereby, in step S08, firing of the unfired ceramic body 111 and baking of the electrode material can be performed simultaneously.

[Operational effects of this embodiment]
In the present embodiment, the laminated sheet 104 is cut from the first main surface S1 toward the second main surface S2. Thereby, a cutting blade can be inserted in 1st main surface S1 with low hardness. Therefore, damage to the cutting blade during cutting can be reduced and blade spilling can be prevented. Hereinafter, the function and effect will be described in detail using examples of the present embodiment.

  In order to confirm the actual hardness of the first main surface S1 side and the second main surface S2 side, samples 1 and 2 of the laminated sheet 104 were produced. Samples 1 and 2 are each a laminated sheet 104 designed assuming a multilayer ceramic capacitor having a dimension in the X-axis direction of 1.0 mm and a dimension in the Y-axis direction and the Z-axis direction of 0.5 mm. The thickness of the green sheet constituting each ceramic sheet was 0.8 μm, and the number of ceramic sheets was 600.

  The hardness was obtained by pushing a diamond indenter (triangular pyramid shape, tip installation side 100 nm, opposite ridge angle 80 °) at 21 nm / sec at room temperature and measuring displacement and load by a nanoindentation method. Specifically, the position of 30 μm in the Z-axis direction from the surface of the first main surface S1 as the first main surface S1 side, and the surface of the second main surface S2 in the Z-axis direction as the second main surface S2 side. A position of 30 μm was measured. The measured value was calculated as an average value of 100 samples.

  Table 1 shows the measurement results of the hardness on the first main surface S1 side and the second main surface S2 side. The results in Table 1 show the relative values of hardness measured at each position with respect to the hardness, with the hardness of the first main surface S1 side of the sample 1 being 1.0.

As shown in Table 1, in Sample 1, the hardness on the second main surface S2 side was 1.9 with respect to the hardness (1.0) on the first main surface S1 side.
In sample 2, the hardness on the first main surface S1 side of sample 1 is 1.2, and the hardness on the first main surface S1 side is 1.6, and the hardness on the second main surface S2 side is 1.6. there were.
That is, in both samples 1 and 2, a difference of about 1.5 to 2.0 times was recognized between the first main surface S1 side and the second main surface S2 side.

  From these results, it was confirmed that the hardness on the first main surface S1 side was significantly lower than that on the second main surface S2 side. This is because the number of times of pressurization differs greatly between the second main surface S2 side and the first main surface S1 side. That is, the third ceramic sheet 103 constituting the second main surface S2 is pressed approximately the same number of times as the number of laminated sheets. On the other hand, in the 3rd ceramic sheet | seat 103 which comprises 1st main surface S1, it is pressurized only at the time of the last crimping | compression-bonding. As a result, the first main surface S1 side is not consolidated and the hardness is lower than the second main surface S2 side.

  Due to such a difference in hardness, when the cutting blade is inserted from the first main surface S1 toward the second main surface S2, and when the cutting blade is inserted from the second main surface S2 toward the first main surface S1 Thus, it is considered that the damage received by the cutting blade in the cutting process changes greatly.

  Therefore, with respect to the sample 1, the sample 1-1 further cut from the first main surface S1 toward the second main surface S2, and the sample 1-2 cut from the second main surface S2 toward the first main surface S1. And the states of the side surfaces S3 and S4, which are cut surfaces, were observed. The observation was performed using images obtained by imaging the side surfaces S3 and S4.

  FIG. 15 is a diagram schematically showing the captured images of the side surfaces S3 and S4. FIG. 15A shows the result of sample 1-1, and FIG. 15B shows the result of sample 1-2.

  In the sample 1-2 shown in FIG. 15B, many drags H2 extending from the second main surface S2 to the first main surface S1 were formed. Specifically, 20 or more dragged scratches H2 having a width of 20 μm or more along the X-axis direction were formed on the captured side surfaces S3 and S4. It was estimated that the drag scratch H2 having such a width also has a certain depth in the Y-axis direction.

  On the other hand, in Sample 1-1 shown in FIG. 15A, although several dragging scratches H1 are observed, the width along the X-axis direction of each dragging scratch H1 is 10 μm or less, and the depth in the Y-axis direction is the sample. It was estimated to be shallower than the drag scratch H2 of 1-2.

  When the cutting blade K after the large scratches H2 were formed on the side surfaces S3 and S4 was observed, a part was missing. For this reason, the cutting blade K is damaged from the laminated sheet 104 at the time of cutting, so-called blade spilling occurs, and a large number of deep drag scratches H2 are formed by dragging the fragments of the blade lacking the cutting blade K. It is considered a thing.

  Further, the drag electrodes H2 are formed on the side surfaces S3 and S4, so that the internal electrodes 112 and 113 extend in the Z-axis direction. Thereby, the internal electrodes 112 and 113 may be short-circuited and may be short-circuited.

  Therefore, Samples 1-1 and 2-1 were cut from the first main surface S1 toward the second main surface S2, and the samples 1-1 and 2-1 were cut from the second main surface S2 toward the first main surface S1. The IR failure rate (initial insulation resistance failure rate) of Samples 1-2 and 2-2 was examined. The IR defect rate was calculated as the ratio of the number of chips determined to be IR defective with respect to the total number of chips (100) in the various samples 1-1 to 2-2. The determination of IR failure was made to be 1 MΩ or less by measuring the insulation resistance at room temperature after holding for 72 hours in a 125 ° C.-95% RH environment with a voltage of 10 V applied.

  Table 2 shows the results of the IR defect rate. The result of Table 2 shows the relative value of the IR failure rate of each sample with respect to the IR failure rate, where the IR failure rate of sample 1-1 is 1.0.

As shown in Table 2, in the sample 1, the sample 1-1 cut from the first main surface S1 toward the second main surface S2 is cut from the second main surface S2 toward the first main surface S1. In sample 1-2, the IR defect rate was 3.2 times larger.
Similar results were obtained with Sample 2. That is, with respect to the sample 2-1 cut from the first main surface S1 toward the second main surface S2, the sample 2-2 cut from the second main surface S2 toward the first main surface S1 has an IR defect. The rate was 2.7 times larger (3.0 times for Sample 1-1).

  Further, a position where an abnormal leakage current such as a short circuit occurs in the side surfaces S3 and S4 is detected by an optical beam heating resistance variation method (OBIRCH: Optical Beam Induced Resistance Change) and is combined with the captured images of the side surfaces S3 and S4. And analyzed. As a result, the positions of the large drag wound and the location where the abnormality occurred almost coincided. Therefore, it was confirmed that the internal electrodes 112 and 113 are short-circuited by causing scratches on the side surfaces S3 and S4.

  As described above, the IR defect rate can be reduced by inserting the cutting blade K from the first main surface S1 having a lower hardness than the second main surface S2. That is, in the present embodiment, the damage received by the cutting blade K can be reduced, the loss of the cutting blade K can be suppressed, and the occurrence of dragging scratches on the side surfaces S3, S4 can be suppressed. 13) A short circuit failure can be prevented.

  When a short circuit failure occurs on the side surfaces S3 and S4, it is necessary to take measures such as adding a polishing step for the side surfaces S3 and S4 to expose the surface without dragging scratches or discarding the chip on which the short circuit failure has occurred. It becomes. That is, by reducing the IR defect rate in the side surfaces S3 and S4, the necessity for such treatment can be reduced and the manufacturing efficiency of the multilayer ceramic capacitor 10 can be improved.

  On the other hand, conventionally, in order to facilitate handling of the laminated chip after cutting, the laminated sheet is cut while holding the lower surface in the Z-axis direction of the laminated sheet with a holding member such as a tape. In this case, one type of tape can be used. That is, a tape is affixed to the 1st main surface which becomes the Z-axis direction uppermost surface at the time of lamination | stacking, and it reverses to a Z-axis direction. Thereby, the 2nd main surface where the tape is not affixed will face in the 1st direction, and a cutting blade can be inserted from the 2nd main surface.

  That is, in the above method, although the number of steps related to the tape can be minimized, the cutting blade is inserted from the second main surface having high hardness. Therefore, the spilling of the cutting blade is likely to occur, and a large number of dragging scratches are formed on the cut surface as described above, and the IR defect rate is increased.

  In this embodiment, the first tape T1 and the second tape T2 are used, the tape T2 is attached to the second main surface S2, the first tape T1 attached to the first main surface S1 is peeled off, and the first main surface is removed. A cutting process is performed with S1 in the first direction Z1. Thereby, although the number of processes related to the tape increases, the IR defect rate can be greatly reduced, and as a result, the manufacturing efficiency can be increased.

  Further, when the cutting process is continued using the same cutting blade, blade spillage is likely to occur gradually, and drag scratches are likely to be formed. Therefore, the method for manufacturing the multilayer ceramic capacitor 10 of the present embodiment may further include a step of replacing the cutting blade with a new cutting blade when it is determined that the risk of spilling of the cutting blade is high after the cutting step.

  The risk of spilling of the cutting blade can be determined in view of, for example, the number of cuts of the cutting blade, the number of laminated sheets cut by the cutting blade, and the like.

  Or it can also determine in view of the state of the drag | scratch in side surface S3, S4 as a risk of the blade spilling of a cutting blade. For example, after cutting, the step of imaging the side surfaces S3 and S4 that are cut surfaces, the step of analyzing the scratches on the side surfaces S3 and S4 based on the captured image, and the analysis result of the dragging scratches satisfy predetermined conditions. And a step of replacing the cutting blade with a new cutting blade.

  The conditions to be satisfied include at least one of the width dimension along the X-axis direction of the drag scar, the depth of the drag scar, and the number of drag scars in the image obtained by imaging one side S3 or S4. That's fine. The numerical range under these conditions can be set as appropriate according to the size of the multilayer ceramic capacitor 10 and the type of cutting blade. As an example, when a number of drag scratches having a width dimension along the X-axis direction of 10 μm or more in a single image (one side surface S3 or S4) exceeds a certain number, a new cutting blade is replaced. Can be specified.

  By adding the above steps, the cutting blade can be managed in a good state with little blade spillage. Therefore, the occurrence of a short can be more effectively suppressed.

[Other Embodiments]
The embodiments of the present invention have been described above, but the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

  In the above-described embodiment, the first main surface S1 is directed in the first direction Z1 using the first tape T1 and the second tape T2. However, the present invention is not limited to this method. For example, a holding member such as a tape is disposed on the mounting plate B1 in the stacking step, and the ceramic sheet 103 is stacked on the surface of the holding member facing the first direction Z1. After all the ceramic sheets 101, 102, 103 are laminated to form the laminated sheet 104, the cutting process can be performed in a state where the second main surface S2 is held by the holding member. Thereby, the process regarding the replacement of the tape can be reduced, and the production efficiency can be further increased.

  In the above embodiment, the cutting blade is a push cutting blade, but the cutting blade may be a rotary blade. Also in this case, by inserting the rotary blade from the first main surface S1, it is possible to suppress the damage received by the rotary blade, and to suppress the formation of drag scratches due to blade spills on the side surfaces S3 and S4.

  In addition, in the above embodiment, the multilayer ceramic capacitor has been described as an example of the multilayer ceramic electronic component. However, the present invention is applicable to all multilayer ceramic electronic components. Examples of such multilayer ceramic electronic components include inductors, varistors, and piezoelectric elements.

DESCRIPTION OF SYMBOLS 10 ... Multilayer ceramic capacitor 11 ... Ceramic body 12, 13 ... Internal electrode 14, 15 ... External electrode 16 ... Multilayer chip 17 ... Side margin part 19 ... Capacitance formation part 20a, 20b ... Cover part 104 ... Multilayer sheet 111 ... Unbaked Ceramic body 112, 113 ... unfired internal electrode 116 ... unfired laminated chip 117 ... unfired side margin K ... cutting blade S1 ... first principal surface S2 ... second principal surface S3, S4 ... side surface T1 , T2 ... Tape (holding member)

Claims (3)

A plurality of ceramic sheets on which internal electrodes are formed are laminated in order along the first direction, and each time the ceramic sheets are laminated, the ceramic sheets are arranged in a second direction that is parallel to and opposite to the first direction. By applying pressure, a laminated sheet having a first main surface facing the first direction and a second main surface facing the second direction is produced,
By cutting the laminated sheet by inserting a cutting blade from the first main surface, a laminated chip having a cut surface where the internal electrode is exposed,
A method of manufacturing a multilayer ceramic electronic component, wherein a side margin is formed on the cut surface of the multilayer chip. It is a manufacturing method of the multilayer ceramic electronic component according to claim 1,
The cutting blade is a push cutting blade. A method for producing a multilayer ceramic electronic component. A method for producing a multilayer ceramic electronic component according to claim 1, further comprising:
Holding the first main surface of the produced laminated sheet on a first holding member;
Holding the second main surface of the laminated sheet held by the first holding member on a second holding member;
Removing the first holding member from the laminated sheet held by the second holding member;
A method for manufacturing a multilayer ceramic electronic component, wherein the first holding member is removed and the laminated sheet held by the second holding member is cut.

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