JP7101837B2 - Pachinko machine - Google Patents

Description

The present invention relates to a gaming machine such as a pachislot machine.

Conventionally, when a game medium such as a medal or a coin is inserted by a player (hereinafter referred to as "insertion operation") and the start lever is operated (hereinafter referred to as "start operation"), a plurality of symbols are respectively inserted. When the rotation of the plurality of reels arranged on the surface of the machine is started and the stop button is operated (hereinafter referred to as "stop operation"), the rotation of the plurality of reels is stopped, and the combination of the symbols displayed as a result is combined. There is known a so-called pachislot machine, which is given a privilege according to the situation.

In such a gaming machine, when the start operation is detected by the start switch, a random number value is extracted and lottery is performed (hereinafter, the result of this lottery is referred to as "internal winning combination"), and the stepping motor is driven and controlled. When the stop operation is detected by the stop switch, the stepping motor is driven and controlled, and the rotation of the plurality of reels is stopped based on the internal winning combination.

Conventionally, in a gaming machine having the above-described configuration, there is known a gaming machine that obtains a checksum of data stored in a RAM at the time of power failure and performs a checksum determination process obtained at the time of power failure when the power is restored (. For example, Patent Document 1). In the gaming machine described in Patent Document 1, in the checksum determination process at the time of power restoration, an error notification is performed when the checksum obtained at the time of power restoration does not match the checksum obtained at the time of power failure.

Japanese Unexamined Patent Publication No. 2009-011375

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complexity of the game playability, and there is a demand for reducing the capacity of processing programs and tables other than the game playability managed by the main control circuit.

The present invention has been made in view of such a problem, and the capacity of processing programs and tables other than the playability managed by the main control circuit is reduced to increase the free capacity of the ROM of the main control circuit. It is an object of the present invention to provide a gaming machine capable of enhancing game playability by utilizing the free area of ROM corresponding to the capacity.

The gaming machine according to the present invention is provided with a plurality of types of symbols, a game control means for controlling the game, an effect control means for controlling the effect, and a start operation detecting means capable of detecting the start operation by the player. A plurality of reels, a rotation means for rotating the plurality of reels based on the detection of the start operation by the start operation detection means, and a stop operation can be detected corresponding to each reel of the plurality of reels. The game control means includes a stop operation detecting means and a stop control means for stopping the rotation of the reel based on the detection of the stop operation by the stop operation detecting means, and the game control means performs arithmetic processing related to the game. Means, a first storage means in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and a second storage means in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. The arithmetic processing means includes a plurality of general-purpose registers in which data is stored when the arithmetic processing is executed by the arithmetic processing means. The first storage means has at least a first storage area in which programs related to playability are stored, and a second storage area in which programs not directly related to playability are stored. The 2 storage means has a first storage area used by the program stored in the first storage area and a second storage area used by the program stored in the second storage area. The storage area includes a constant speed rotation determination process for determining whether or not the rotation of the reel has reached a predetermined constant speed, and a transmission process for transmitting the management information from the game control means to the effect control means. Is stored, and the effect control means can determine the effect game state based on at least two or more types of the management information transmitted in the transmission process, and is based on the effect game state. The effect can be controlled, and the game state is a normal state, an advantageous state that is more advantageous to the player than the normal state, and a highly accurate state that makes it easy to determine that the transition to the advantageous state is more than the normal state. The high-accuracy state ends with the lapse of a predetermined period from the start, and when the remaining period falls below a predetermined threshold, the probability of determining the transition to the advantageous state changes. The effect control means can respond to the management information according to the information indicating that the gaming state is the high accuracy state and the information indicating the remaining period of the high accuracy state. The effect in the high accuracy state can be controlled, and in the second storage area, the port output process for outputting on-data or off-data ports, the constant-speed rotation determination process, and the rotation of the reel are the same. When it is determined that a predetermined constant speed has been reached, the on-data output process that outputs the on-data of the stoptable signal from the port output process and the stop operation detection after the on-data output process outputs the on-data. Based on the detection of the stop operation by the means, the off-data output process for outputting the off-data of the stoptable signal from the port output process is stored, and the on-data output process executed by the arithmetic processing means is performed. In the off-data output processing, after saving the values of all the registers of the plurality of general-purpose registers, the port output processing is called, and then the values of all the saved general-purpose registers are used for the plurality of general-purpose registers. After returning to the register, it is possible to move to the program stored in the first storage area, and the off data of the stoptable signal is generated by executing a plurality of logic operation instructions, and the stoptable signal is turned on. The data is characterized in that it is generated by executing one logical operation instruction .

According to the present invention, the capacity of processing programs and tables managed by the main control circuit is reduced to increase the free capacity of the ROM of the main control circuit, and the free space of the ROM corresponding to the increased capacity is used for playability. Can be enhanced.

It is a figure for demonstrating the functional flow of the gaming machine in one Embodiment of this invention. It is a perspective view which shows the appearance structure of the gaming machine in one Embodiment of this invention. It is a figure which shows the internal structure of the gaming machine in one Embodiment of this invention. It is a figure which shows the internal structure of the gaming machine in one Embodiment of this invention. It is a figure which shows the schematic structure of the various display screens displayed on the sub-display device of one Embodiment of this invention. It is a figure which shows the transition example of the display screen of the sub display device in one Embodiment of this invention. It is a block diagram which shows the whole structure of the circuit provided in the gaming machine of one Embodiment of this invention. It is a block diagram which shows the internal structure of the main control circuit in one Embodiment of this invention. It is a block diagram which shows the internal structure of the microprocessor in one Embodiment of this invention. It is a block diagram which shows the internal structure of the auxiliary control circuit in one Embodiment of this invention. It is a block diagram of the various registers which a main CPU has in one Embodiment of this invention. It is a figure which shows the memory map of the main control circuit in one Embodiment of this invention. It is a figure which shows the transition flow of the gaming state between the bonus state and the non-bonus state of the pachislot in one Embodiment of this invention. It is a figure which shows the transition flow of the gaming state between the ART gaming state, the non-ART gaming state, and the bonus state of the pachislot in one Embodiment of this invention. It is a figure which shows an example of the symbol arrangement table in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table in one Embodiment of this invention. It is a figure which shows an example of the internal lottery table in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table in one Embodiment of this invention. It is a figure which shows an example of the symbol combination determination table in one Embodiment of this invention. It is a figure which shows the correspondence relationship between the internal winning combination and the stop symbol combination in one Embodiment of this invention. It is a figure which shows the correspondence relationship between the internal winning combination and the stop symbol combination in one Embodiment of this invention. It is a figure which shows an example of the reel stop initial setting table in one Embodiment of this invention. It is a figure which shows an example of the pull-in priority table in one Embodiment of this invention. It is a figure which shows the structure (the 1) of the hit request flag storage area and the winning operation flag storage area in one Embodiment of this invention. It is a figure which shows the structure (the 2) of the hit request flag storage area and the winning operation flag storage area in one Embodiment of this invention. It is a figure which shows (the 3) of the hit request flag storage area and the winning operation flag storage area in one Embodiment of this invention. It is a figure which shows the structure of the carry-over combination storage area in one Embodiment of this invention. It is a figure which shows the structure of the game state flag storage area in one Embodiment of this invention. It is a figure which shows the structure of the operation stop button storage area in one Embodiment of this invention. It is a figure which shows the structure of the pressing order storage area in one Embodiment of this invention. It is a figure which shows the structure of the symbol code storage area in one Embodiment of this invention. It is a figure which shows the correspondence table (the 1) of the internal winning combination and a sub-flag in one Embodiment of this invention. It is a figure which shows the correspondence table (the 2) of the internal winning combination and a sub-flag in one Embodiment of this invention. It is a figure for demonstrating the notification operation at the time of winning subflag EX "triple chili lip" or "reach eye lip" in the gaming machine of one Embodiment of this invention. It is a figure for demonstrating the flow of the game in the general game state in one Embodiment of this invention. It is a figure which shows an example of the ordinary medium-high probability lottery table in one Embodiment of this invention. It is a figure which shows an example of the CZ lottery table in one Embodiment of this invention. It is a figure which shows an example of the mode-up lottery table in CZ1 in one Embodiment of this invention. It is a figure which shows an example of the point lottery table in CZ2 in one Embodiment of this invention. It is a figure which shows an example of the ART lottery table (for CZ1, CZ2) in CZ in one Embodiment of this invention. It is a figure which shows an example of the ART lottery table (for CZ3) in CZ in one Embodiment of this invention. It is a figure for demonstrating the flow of the game in a normal ART in one Embodiment of this invention. It is a figure which shows an example of the flag conversion lottery table in ART in one Embodiment of this invention. It is a figure which shows an example of the ART level determination table in one Embodiment of this invention. It is a figure which shows an example of the normal ART medium-high probability lottery table in one Embodiment of this invention. It is a figure which shows an example of the CT lottery table in ART in one Embodiment of this invention. It is a figure which shows an example of the addition lottery table in ordinary ART in one Embodiment of this invention. It is a figure for demonstrating the flow of the game in the CT state in one Embodiment of this invention. It is a figure which shows an example of the table lottery table in CT in one Embodiment of this invention. It is a figure which shows an example of the flag conversion lottery table in CT in one Embodiment of this invention. It is a figure which shows an example of the addition lottery table in CT in one Embodiment of this invention. It is a figure which shows an example of the lottery table which added the number of sets in CT in one Embodiment of this invention. It is a figure for demonstrating the flow of the game in the bonus state in one Embodiment of this invention. It is a figure which shows an example of the bonus type lottery table in one Embodiment of this invention. It is a figure which shows an example of the lottery table which added the number of ART games in a bonus in one Embodiment of this invention. It is a figure which shows an example of the CT lottery table at the end of a bonus in one Embodiment of this invention. It is a figure for demonstrating the flow of the game (other) in the general game state in one Embodiment of this invention. It is a figure which shows an example of the non-ART flag conversion lottery table in one Embodiment of this invention. It is a figure which shows the correspondence relationship between the main side navigation data and the sub side navigation data in one Embodiment of this invention. It is a flowchart which shows the example of the power-on (reset interrupt) time processing executed by the main control circuit of the gaming machine in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the power-on process in one Embodiment of this invention. It is a flowchart which shows the example of the game return processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the game return process in one Embodiment of this invention. It is a flowchart which shows the example of the setting change confirmation processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the setting change confirmation process in one Embodiment of this invention. It is a flowchart which shows the example of the setting change command generation storage process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the setting change command generation storage process in one Embodiment of this invention. It is a flowchart which shows the example of the communication data storage process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the communication data storage process in one Embodiment of this invention. It is a flowchart which shows the example of the communication data pointer update process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the communication data pointer update process in one Embodiment of this invention. It is a flowchart which shows the example of the (external) processing at the time of power failure in one Embodiment of this invention. It is a flowchart which shows the example of the checksum generation process (non-standard) in one Embodiment of this invention. An example of a source program for executing various processes in the flowchart of the checksum generation process according to the embodiment of the present invention, an operation of updating the stack pointer executed in the checksum generation process, and an operation of reading data to a register. It is a figure which shows the state of. It is a flowchart which shows the example of the sum check process (non-regulation) in one Embodiment of this invention. It is a flowchart which shows the example of the sum check process (non-regulation) in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the checksum process in one Embodiment of this invention. It is a flowchart which shows the example of the main processing (main operation processing) executed by the main control circuit of the gaming machine in one Embodiment of this invention. It is a flowchart which shows the example of the medal acceptance / start check process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the medal acceptance / start check process in one Embodiment of this invention. It is a flowchart which shows the example of the medal insertion process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the medal insertion process in one Embodiment of this invention. It is a flowchart which shows the example of the medal insertion check process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the medal insertion check process in one Embodiment of this invention. It is a flowchart which shows the example of the error processing in one Embodiment of this invention. It is a figure which shows an example of the structure of the error table which is actually referred to on the source program of error processing in one Embodiment of this invention. It is a flowchart which shows the example of the random number acquisition processing in one Embodiment of this invention. It is a flowchart which shows the example of the internal lottery processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the internal lottery process in one Embodiment of this invention. It is a figure which shows an example of the structure of the internal lottery table (for general game) which is actually referred to on the source program of the internal lottery processing in one Embodiment of this invention. It is a figure which shows an example of the structure of the lottery value selection table by RT state which is actually referred to on the source program of the internal lottery processing in one Embodiment of this invention. Internal lottery value table selection table, 1-byte internal lottery value table, 2-byte internal lottery value table, 1-byte internal lottery value by setting, which is actually referred to on the source program of the internal lottery process according to the embodiment of the present invention. It is a figure which shows an example of the structure of the table and the internal lottery value table for each 2-byte setting. It is a flowchart which shows the example of the symbol setting process in one Embodiment of this invention. It is a figure which shows the correspondence between the special prize (bonus) winning number and the small winning combination winning number, and the internal winning combination in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the symbol setting process in one Embodiment of this invention. It is a figure which shows an example of the structure of the hit request flag table which is actually referred to on the source program of the symbol setting process in one Embodiment of this invention. It is a flowchart which shows the example of the compressed data storage process in one Embodiment of this invention. It is a flowchart which shows the example of the 2nd interface board control process (non-standard) in one Embodiment of this invention. It is a flowchart which shows the example of the 2nd interface board output processing in one Embodiment of this invention. It is a flowchart which shows the example of the control process by state in one Embodiment of this invention. It is a flowchart which shows the example of the sub-flag conversion process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the sub-flag conversion process in one Embodiment of this invention. It is a figure which shows an example of the structure of the sub-flag conversion table which is actually referred to on the source program of the sub-flag conversion process in one Embodiment of this invention. It is a flowchart which shows the example of the navigation set processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the navigation set process in one Embodiment of this invention. It is a figure which shows an example of the structure of the navigation data table which is actually referred to on the source program of the navigation set processing in one Embodiment of this invention. It is a flowchart which shows the example of the flag conversion process in one Embodiment of this invention. It is a flowchart which shows the example of the normal middle start processing in one Embodiment of this invention. It is a flowchart which shows the example of the process at the start in CZ in one Embodiment of this invention. It is a flowchart which shows the example of the processing in CZ1 (CZ2) in one Embodiment of this invention. It is a flowchart which shows the example of the processing in CZ1 (CZ2) in one Embodiment of this invention. It is a flowchart which shows the example of the processing in CZ3 in one Embodiment of this invention. It is a flowchart which shows the example of the processing at the time of a normal ART in one Embodiment of this invention. It is a flowchart which shows the example of the start processing in CT in one Embodiment of this invention. It is a flowchart which shows the example of the CT lottery processing in CT in one Embodiment of this invention. It is a flowchart which shows the example of the table data acquisition processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the table data acquisition process in one Embodiment of this invention. It is a figure which shows an example of the structure of the CT lottery table in CT actually referred to on the source program of the table data acquisition processing in one Embodiment of this invention. It is a flowchart which shows the example of 1 byte lottery processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processing in the flowchart of 1-byte lottery processing in one Embodiment of this invention. It is a flowchart which shows the example of the start time processing in BB in one Embodiment of this invention. It is a flowchart which shows the example of the pull-in priority order storage process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the pull-in priority order storage process in one Embodiment of this invention. It is a flowchart which shows the example of the symbol code acquisition process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the symbol code acquisition process in one Embodiment of this invention. On the source program of the symbol code acquisition process in one embodiment of the present invention, the first cylinder (left reel) symbol arrangement table actually referred to and the symbol correspondence referred to at the time of the first cylinder symbol arrangement table set. It is a figure which shows an example of the structure of the winning operation table. On the source program of the symbol code acquisition process in one embodiment of the present invention, the second cylinder (middle reel) symbol arrangement table actually referred to and the symbol correspondence referred to at the time of the second cylinder symbol arrangement table set. It is a figure which shows an example of the structure of the winning operation table. On the source program of the symbol code acquisition process in one embodiment of the present invention, the third cylinder (right reel) symbol arrangement table actually referred to and the symbol correspondence referred to at the time of the third cylinder symbol arrangement table set. It is a figure which shows an example of the structure of the winning operation table. It is a flowchart which shows the example of the AND operation processing in one Embodiment of this invention. It is a flowchart which shows the example of the pull-in priority order acquisition process in one Embodiment of this invention. It is a flowchart which shows the example of the pull-in priority order acquisition process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the pull-in priority order acquisition process in one Embodiment of this invention. It is a figure which shows an example of the structure of the pull-in priority order table which is actually referred to on the source program of the pull-in priority order acquisition process in one Embodiment of this invention. It is a flowchart which shows the example of the reel stop control processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the reel stop control process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the reel stop control process in one Embodiment of this invention. It is a flowchart which shows the example of the reel stop possible signal OFF processing (non-standard) in one Embodiment of this invention. It is a flowchart which shows the example of the reel stop possible signal ON processing (non-regulation) in one Embodiment of this invention. It is a flowchart which shows the example of the non-standard port output processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processing in the flowchart of the non-standard port output processing in one Embodiment of this invention. It is a flowchart which shows the example of the winning search process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the prize-winning search process in one Embodiment of this invention. It is a figure which shows an example of the structure of the payout number data table which is actually referred to on the source program of the prize search process in one Embodiment of this invention. It is a flowchart which shows the example of the illegal hit check process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the illegal hit check process in one Embodiment of this invention. It is a flowchart which shows the example of the winning check / medal payout processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the prize check / medal payout process in one Embodiment of this invention. It is a flowchart which shows the example of the medal payout number check process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the medal payout number check process in one Embodiment of this invention. It is a flowchart which shows the example of the BB check process in one Embodiment of this invention. It is a flowchart which shows the example of RT check processing in one Embodiment of this invention. It is a flowchart which shows the example of RT check processing in one Embodiment of this invention. It is a flowchart which shows the example of the CZ / ART end processing in one Embodiment of this invention. It is a flowchart which shows the example of the interrupt process executed by the main control circuit of the gaming machine in one Embodiment of this invention. It is a flowchart which shows the example of the 7-segment LED drive processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processing in the flowchart of 7-segment LED drive processing in one Embodiment of this invention. It is a flowchart which shows the example of the 7-segment display data generation processing in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of 7-segment display data generation process in one Embodiment of this invention. It is a figure which shows an example of the structure of the 7-segment cathode table which is actually referred to on the source program of the 7-segment display data generation processing in one Embodiment of this invention. It is a flowchart which shows the example of the timer update process in one Embodiment of this invention. It is a figure which shows an example of the source program for executing various processes in the flowchart of the timer update process in one Embodiment of this invention. It is a flowchart which shows the example of the test firing test signal control processing (non-standard) in one Embodiment of this invention. It is a flowchart which shows the example of the rotation cylinder braking signal generation processing in one Embodiment of this invention. It is a flowchart which shows the example of the prize signal control processing in one Embodiment of this invention. It is a flowchart which shows the example of the condition device signal control processing in one Embodiment of this invention. It is a flowchart which shows the example of the condition device signal control processing in one Embodiment of this invention. It is a flowchart which shows the example of the sub-side navigation control processing executed by the sub-control circuit of the gaming machine in one Embodiment of this invention. It is a flowchart which shows the example of the player registration process in one Embodiment of this invention. It is a flowchart which shows the example of the history management processing in one Embodiment of this invention. It is a figure which shows the flow of the game in the CT precursor in the modification 1 of this invention. It is a figure which shows the correspondence relationship between the internal winning combination and the stop symbol combination in the modification 2 of this invention. It is a figure which shows the correspondence relationship between the main side navigation data and the sub side navigation data in the modification 3 of this invention. It is a figure which shows the correspondence relationship between the push order and the locked state in the modification 5 of this invention. It is a figure which shows the transition flow of the gaming state between the bonus state and the non-bonus state of the pachislot in another embodiment of this invention. It is a figure which shows an example of the symbol arrangement table in the said embodiment. It is a figure which shows an example of the internal lottery table in the said embodiment. It is a figure which shows an example of the internal lottery table in the said embodiment. It is a figure which shows an example of the internal lottery table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the symbol combination determination table in the said embodiment. It is a figure which shows an example of the contents of the symbol combination in the said embodiment. It is a figure which shows an example of the contents of the symbol combination in the said embodiment. It is a figure which shows an example of the contents of the symbol combination in the said embodiment. It is a figure which shows an example of the contents of the symbol combination in the said embodiment. It is a figure which shows an example of the contents of the symbol combination in the said embodiment. It is a figure which shows an example of the contents of the symbol combination in the said embodiment. It is a figure which shows an example of the contents of the symbol combination in the said embodiment. It is a figure which shows an example of the contents of the symbol combination in the said embodiment. It is a figure which shows the correspondence relationship between the internal winning combination and the stop symbol combination in the said embodiment. It is a figure which shows the transition flow of the game state in consideration of the notification of pachislot in the said embodiment. It is a figure which shows the transition condition of the gaming state in consideration of the notification of pachislot in the said embodiment. It is a figure which shows the correspondence relationship between the internal winning combination and a lottery flag in the said embodiment. It is a figure which shows the flow of the game in the normal state in the said embodiment. It is a figure which shows the flow of the game in CZ in the said embodiment. It is a figure which shows the flow of the game in CZ in the said embodiment. It is a figure which shows the flow of the game in the ART state in the said embodiment. It is a figure which shows the flow of the game in the ART state in the said embodiment. It is a figure which shows the flow of the game in the bonus state in the said embodiment. It is a figure which shows an example of the mode transition lottery table in the said embodiment. It is a figure which shows an example of the state transition lottery table in the said embodiment. It is a figure which shows an example of the state transition lottery table in the said embodiment. It is a figure which shows an example of the high security certificate game number lottery table in the said embodiment. It is a figure which shows an example of the CZ lottery table by mode in the said embodiment. It is a figure which shows an example of the CZ lottery table according to the state at the time of BB winning in the said embodiment. It is a figure which shows an example of the CZ lottery table by state in the said embodiment. It is a figure which shows an example of the CZ precursor game number lottery table in the said embodiment. It is a figure which shows an example of the ART lottery table at the time of BB winning in the said embodiment. It is a figure which shows an example of the normal ART lottery table in the said embodiment. It is a figure which shows an example of the ART precursor game number lottery table in the said embodiment. It is a figure which shows an example of the ART lottery table in CZ in the said embodiment. It is a figure which shows an example of the ART lottery table in CZ in the said embodiment. It is a figure which shows an example of the stock lottery table in ART in the said embodiment. It is a figure which shows an example of the stock lottery table in ART in the said embodiment. It is a figure which shows an example of the stock lottery table in ART in the said embodiment. It is a figure which shows an example of the stock lottery table at the time of BB winning in ART in the said embodiment. It is a figure which shows an example of the stock number lottery table at the time of ART winning in the said embodiment. It is a figure which shows an example of the special CZ transition lottery table in the said embodiment. It is a figure which shows an example of the ART winning rank lottery table in the said embodiment. It is a figure which shows an example of the ART winning rank lottery table in the said embodiment. It is a figure which shows an example of the ART winning rank lottery table in the said embodiment. It is a figure which shows an example of the ART winning rank lottery table in the said embodiment. It is a figure which shows an example of the ART winning rank lottery table in the said embodiment. It is a figure which shows an example of the stock release order lottery table in the said embodiment. It is a figure which shows an example of the rank determination ART middle rank promotion lottery table in the said embodiment. It is a figure which shows an example of the lottery table which acquired the number of navigation high accuracy games in the said embodiment. It is a figure which shows an example of the CZ game number acquisition lottery table in the said embodiment. It is a figure which shows an example of the ART game number acquisition lottery table in the said embodiment. It is a figure which shows an example of the fall mode lottery table in the said embodiment. It is a figure which shows an example of the fall mode transition lottery table in the said embodiment. It is a figure which shows an example of the BB winning fall mode transition lottery table in the said embodiment. It is a figure which shows an example of the ART lottery table in BB, the CZ lottery table in BB, and EP stock lottery table in BB in the said embodiment. It is a flowchart which shows the example of the main processing (main operation processing) executed by the main control circuit of pachislot in the said embodiment. It is a figure which shows the lottery content in the normal state of the pachislot in the said embodiment. It is a figure which shows the lottery content in the CZ precursor of the pachislot in the said embodiment. It is a figure which shows the lottery content in the ART precursor of the pachislot in the said embodiment. It is a figure which shows the lottery content of the first hit CZ of the pachislot and the next game of the end of the first hit CZ in the said embodiment. It is a figure which shows the lottery contents in the ART preparation of the pachislot in the said embodiment. It is a figure which shows the lottery content in the rank determination ART of the pachislot in the said embodiment. It is a figure which shows the lottery content in the normal ART of the pachislot in the said embodiment. It is a figure which shows the lottery content in preparation for EP of pachislot in the said embodiment. It is a figure which shows the lottery content in EP of the pachislot in the said embodiment. It is a figure which shows the CZ (after ART) of the pachislot in the said embodiment, the next game which ends CZ (after ART), and the lottery contents in a special CZ. It is a figure which shows the lottery content in the normal flag of the pachislot in the said embodiment. It is a figure which shows the lottery content in a normal BB of a pachislot in the said embodiment. It is a figure which shows the lottery content in the ART middle flag of the pachislot in the said embodiment. It is a figure which shows the lottery content in BB in ART of pachislot in the said embodiment. It is a figure which shows the relationship between the number of games remaining in CZ of pachislot and each lottery in CZ in the said embodiment. It is a figure which shows the relationship between the presence / absence of stock in CZ of pachislot and each lottery in the said embodiment. It is a figure which shows the outline of the ART lottery in the RT4 state or RT5 state of the pachislot in the said embodiment. It is a figure which shows the correspondence relationship between the push order at the time of winning a pachislot push order bell and a symbol combination in the said embodiment. It is a figure which shows the correspondence relationship between the push order at the time of winning a pachislot push order bell, and RT control in the said embodiment. It is a figure which shows another example of the correspondence relation between the push order at the time of winning a pachislot push order bell and RT control in the said embodiment. It is a figure which shows the management method of the navigation high accuracy game number of pachislot in the said embodiment. It is a figure which shows the relationship between the presence / absence of the pachislot navigation high accuracy in the said embodiment, and each lottery. It is a flowchart which shows the relationship between the command transmitted from the main side of the pachislot to the sub side, and the timing thereof in the said embodiment. It is a figure which shows the content of the parameter included in the command transmitted from the main side to the sub side of the pachislot in the said embodiment. It is a figure which shows the content of the parameter included in the command transmitted from the main side to the sub side of the pachislot in the said embodiment. It is a figure which shows the content of the parameter included in the command transmitted from the main side to the sub side of the pachislot in the said embodiment. It is a figure which shows the method of discriminating the gaming state on the sub side of a pachi-slot machine in the said embodiment. It is a figure which shows the production example of the pachislot song SU production in the said embodiment. It is a figure which shows the production example of the pachislot song SU production in the said embodiment. It is a figure which shows the production example of the pachislot song SU production in the said embodiment. It is a figure which shows the example of the production data used for the pachislot song SU production in the said embodiment. It is a figure which shows the production example of the pachislot song SU production in the said embodiment. It is a figure which shows the control example at the time of rewriting of the pachislot song SU effect in the said embodiment. It is a figure which shows the control example at the time of performing the production using the same music during the pachislot song SU production in the said embodiment. It is a figure which shows the control example at the time of performing the production using the same music during the pachislot song SU production in the said embodiment. It is a figure which shows the production example at the time of performing the production using the same music during the pachislot song SU production in the said embodiment. It is a figure which shows the example of the lottery table used for the pachislot song SU production in the said embodiment. It is a figure which shows the production example at the time of adding the number of ART games of pachislot in the said embodiment. It is a flowchart which shows the control example at the time of performing the bonus announcement effect of pachislot in the said embodiment. It is a figure which shows the outline of the counter which the pachislot has in the said embodiment. It is a figure which shows the control example of the counter update which a pachislot has in the said embodiment. It is a figure which shows the control example of the counter update which a pachislot has in the said embodiment. It is a figure which shows the control example of the fail safe about the counter update which a pachi-slot has in the said embodiment. It is a figure which shows the control example of the fail safe about the counter update which a pachi-slot has in the said embodiment. It is a figure which shows the specific example about the counter update which a pachislot has in the said embodiment.

Hereinafter, a pachi-slot machine will be described as an example of a gaming machine according to an embodiment of the present invention, and its configuration and operation will be described with reference to the drawings. In this embodiment, a pachi-slot machine having a bonus operation function and an ART function will be described.

<Functional flow>
First, the functional flow of the pachislot machine will be described with reference to FIG. In the pachislot machine of the present embodiment, a medal is used as a game medium for playing a game. In addition to medals, coins, game balls, point data for games, tokens, and the like can also be applied as the game medium.

When a medal is inserted into a pachislot machine by a player and the start lever is operated, one value (hereinafter referred to as a random number value) is extracted from a random number in a predetermined numerical range (for example, 0 to 65535).

The internal lottery means draws lots based on the extracted random number values, and determines the internal winning combination. This internal lottery means is one of various processing means (processing functions) included in the main control circuit described later. By determining the internal winning combination, the combination of symbols that are permitted to be displayed along the valid line (winning determination line) described later is determined. The types of symbol combinations are those related to "winning" where benefits such as medal payout, replay operation, bonus operation, etc. are given to the player, and other so-called "missing". Such things are provided. In the following, the role related to the payout of medals will be referred to as a "small role", and the role related to the operation of the replay (replay) will be referred to as a "replay role". In addition, the role related to the operation of the bonus (bonus game) is also referred to as a "bonus role".

Further, when the start lever is operated, a plurality of reels are rotated. After that, when the stop button corresponding to the predetermined reel is pressed by the player, the reel stop control means controls to stop the rotation of the corresponding reel based on the internal winning combination and the timing when the stop button is pressed. conduct. This reel stop control means is one of various processing means (processing functions) included in the main control circuit described later.

In pachislot, basically, control is performed to stop the rotation of the corresponding reel within a specified time (190 msec) from the time when the stop button is pressed. In the present embodiment, the number of symbols that move with the rotation of the reel within this specified time is referred to as "the number of sliding pieces". Then, in the present embodiment, when the specified period is 190 msec, the maximum number of sliding pieces (maximum number of sliding pieces) is set for four symbols.

When the internal winning combination that permits the combination display of the symbols related to the winning is determined, the reel stop control means usually sets the combination of the symbols to the effective line within the specified time of 190 msec (for 4 symbols). Stop the rotation of the reel so that it is displayed as much as possible along the line. Further, the reel stop control means uses a specified time to stop the rotation of the reel so that the combination of symbols whose display is not permitted by the internal winning combination is not displayed along the valid line.

In this way, when all the rotations of the plurality of reels are stopped, the winning determination means determines whether or not the combination of symbols displayed along the valid line is related to the winning. This winning determination means is also one of various processing means (processing functions) included in the main control circuit described later. Then, when it is determined by the winning determination means that the combination of the displayed symbols is related to the winning, a privilege such as a medal payout is given to the player. In pachislot, the above series of flows is performed as one game (unit game).

In addition, in pachislot, in the flow of the above-mentioned series of game operations, various effects are produced by displaying images by a display device, outputting light by various lamps, outputting sounds by speakers, or a combination of these. Is done.

Specifically, when the start lever is operated, a random value for staging is extracted in addition to the random value used for determining the internal winning combination described above. When the random value for the effect is extracted, the effect content determining means determines the effect to be executed this time from a plurality of types of effect contents associated with the internal winning combination by lottery. This effect content determining means is one of various processing means (processing functions) provided in the sub-control circuit described later.

Next, when the effect content is determined by the effect content determination means, the effect execution means responds in conjunction with each opportunity such as when the reel rotation starts, when the rotation of each reel stops, and when it is determined whether or not there is a prize. To execute. In this way, in pachislot, for example, by executing the production content associated with the internal winning combination, the opportunity to know or anticipate the determined internal winning combination (in other words, the combination of symbols to be aimed at) is a game. It is provided to the player and can improve the interest of the player.

<Structure of pachislot>
Next, the structure of the pachi-slot machine according to the embodiment of the present invention will be described with reference to FIGS. 2 to 4.

[Appearance structure]
FIG. 2 is a perspective view showing the external structure of the pachi-slot machine 1.

As shown in FIG. 2, the pachi-slot machine 1 includes an exterior body (game machine main body) 2. The exterior body 2 has a cabinet 2a for accommodating a reel, a circuit board, and the like, and a front door 2b to which an opening of the cabinet 2a can be opened and closed.

Inside the cabinet 2a, three reels 3L, 3C, 3R (variable display means, display row) are provided side by side in a horizontal row. Hereinafter, each reel 3L, 3C, 3R (main reel) is also referred to as a left reel 3L, a middle reel 3C, and a right reel 3R, respectively. Each reel 3L, 3C, 3R has a reel body formed in a cylindrical shape and a translucent sheet material mounted on the peripheral surface of the reel body. A plurality of (for example, 20) symbols (identification display) are drawn on the surface of the sheet material at predetermined intervals along the circumferential direction (rotational direction of the reel).

The front door 2b includes a door main body 9, a front panel 10, a waist panel 12, and a pedestal portion 13. The door body 9 is attached to the cabinet 2a so as to be openable and closable by using a hinge (not shown). The hinge is provided at the left side end of the door body 9 when viewed from the front side (player side) of the pachi-slot machine 1.

The front panel 10 is provided on the upper part of the door body 9. The front panel 10 is composed of a frame-shaped member having an opening 10a. The opening 10a of the front panel 10 is closed by the display device cover 30, and the display device cover 30 is arranged to face the display device 11 described later arranged inside the cabinet 2a.

The display device cover 30 is formed of a black translucent synthetic resin. Therefore, the player can visually recognize the image (image) displayed by the display device 11 described later through the display device cover 30. Further, in the present embodiment, the display device cover 30 is made of a black translucent synthetic resin to suppress the entry of external light into the cabinet 2a, and the image (image) displayed by the display device 11 is suppressed. Is clearly visible.

The lamp group 21 is provided on the front panel 10. The lamp group 21 includes, for example, the lamps 21a and 21b provided on the upper part of the front panel 10 when viewed from the player side. Each lamp constituting the lamp group 21 is composed of an LED (Light Emitting Diode) or the like (see LED group 85 in FIG. 7 described later), and lights are turned on and off in a pattern corresponding to the effect content.

The waist panel 12 is provided at a substantially central portion of the door body 9. The waist panel 12 has a decorative panel on which an arbitrary image is drawn, and a light source (LED included in the LED group 85 described later) that emits light for illuminating the decorative panel from the back surface side.

The pedestal portion 13 is provided between the front panel 10 and the waist panel 12. The pedestal portion 13 has a symbol display area 4, various devices to be operated by the player (medal insertion slot 14, MAX bet button 15a, 1 bet button 15b, start lever 16, 3 stop buttons 17L, 17C, etc.). 17R, checkout button (not shown), etc.) are provided.

The symbol display area 4 is an area superposed on the three reels 3L, 3C, 3R when viewed from the front, and is arranged at a position on the player side of the three reels 3L, 3C, 3R, and the three reels. It has a size that makes 3L, 3C, and 3R visible. The symbol display area 4 functions as a display window, and has a configuration in which the reels 3L, 3C, and 3R provided behind the symbol display area 4 can be visually recognized. Hereinafter, the symbol display area 4 is referred to as a reel display window 4.

The reel display window 4 is continuously arranged among a plurality of symbols provided on the peripheral surface of each reel when the rotation of the three reels 3L, 3C, 3R provided behind the reel display window 4 is stopped. Two symbols are configured to be displayed within the frame. That is, when the rotation of the three reels 3L, 3C, and 3R is stopped, one symbol is set in each of the upper, middle, and lower regions for each reel in the frame of the reel display window 4 (three in total). ) Is displayed (in the frame of the reel display window 4, the design is displayed in the form of 3 rows × 3 columns). Then, in the present embodiment, in the frame of the reel display window 4, a pseudo line (center line) connecting the middle stage region of the left reel 3L, the middle stage region of the middle reel 3C, and the middle stage region of the right reel 3R is provided. It is defined as a valid line that determines whether or not a prize has been won.

The reel display window 4 is formed by an opening of a frame member 31 provided in the pedestal portion 13. Further, a pedestal region having a substantially horizontal plane is provided below the frame member 31 that defines the reel display window 4. When viewed from the player side, the medal insertion slot 14 is provided on the right side of the pedestal area, and the MAX bet button 15a and the 1-bet button 15b are provided on the left side.

The medal slot 14 is provided to receive medals dropped from the outside into the pachi-slot machine 1 by the player. The medals received from the medal slot 14 are used for one game up to a preset predetermined number (for example, 3), and the number of medals exceeding the predetermined number is deposited inside the pachislot machine 1. (So-called credit function (game medium storage means)).

The MAX bet button 15a and the 1-bet button 15b are provided to determine the number of medals deposited in the cabinet 2a to be used for one game. Inside the MAX bet button 15a, a bet button LED (not shown) that lights up when a medal can be inserted is provided. Further, the settlement button is provided to pull out (discharge) the medals deposited inside the pachi-slot machine 1 to the outside.

When the player presses the MAX bet button 15a, medals for the number of bets (3) in the unit game are inserted and the effective line is activated. On the other hand, one medal is inserted each time the 1-bet button 15b is pressed once. When the 1-bet button 15b is operated three times, medals for the number of bets (3) in the unit game are inserted and the effective line is activated.

In the following, the operation of the MAX bet button 15a, the operation of the 1-bet button 15b, and the operation of inserting medals into the medal insertion slot 14 (operations of inserting medals to perform a game) are all referred to as "insertion operations".

The start lever 16 is provided to start the rotation of all reels (3L, 3C, 3R). The stop buttons 17L, 17C, and 17R are provided corresponding to the left reel 3L, the middle reel 3C, and the right reel 3R, respectively, and each stop button is provided to stop the rotation of the corresponding reel. Hereinafter, the stop buttons 17L, 17C, and 17R are also referred to as a left stop button 17L, a middle stop button 17C, and a right stop button 17R, respectively.

Further, an information display 6 is provided at substantially the center of the pedestal area of the substantially horizontal plane below the reel display window 4. The information display 6 is covered with a transparent window cover (not shown).

The information display 6 is a two-digit 7-segment LED for digitally displaying (notifying) information on the number of medals to be paid out to the player as a privilege (hereinafter referred to as "the number of payouts") to the player. To digitally display (notify) information such as (hereinafter referred to as "7-segment LED") and the number of medals deposited inside the pachislot 1 (hereinafter referred to as "credit number") to the player. A 2-digit 7-segment LED is provided. In the present embodiment, the 2-digit 7-segment LED for displaying the number of medals to be paid out is a 2-digit 7-segment LED for digitally displaying (notifying) information on the occurrence of an error and the error type to the player. Is also used. Therefore, when an error occurs, the display mode of the 2-digit 7-segment LED for displaying the number of medals to be paid out is switched from the display mode of the number of payouts to the display mode of the information of the error type.

Further, the information display 6 is provided with an instruction monitor (not shown) for notifying information on the stop operation necessary for displaying the symbol combination corresponding to the winning combination determined as the internal winning combination along the effective line. ing. The instruction monitor (instruction display) is composed of, for example, a two-digit 7-segment LED. Then, in the instruction monitor, the information of the necessary stop operation is notified to the player by turning on, blinking, or turning off the two-digit 7-segment LED in a manner uniquely corresponding to the information of the stop operation to be notified. do.

The mode that uniquely corresponds to the information of the stop operation to be notified here is, for example, when the push order "1st (the first stop operation is performed on the left reel 3L)" is notified. When the numerical value "1" is displayed on the instruction monitor and the push order "2nd (perform the first stop operation on the middle reel 3C)" is displayed, the numerical value "2" is displayed on the instruction monitor and the push order is displayed. When notifying "3rd (performing the first stop operation on the right reel 3R)", the numerical value "3" is displayed on the instruction monitor. The mode of notifying the information of the stop operation on the instruction monitor (navigation data determined on the main side described later) will be described in detail later with reference to FIG. 63 described later.

As shown in FIG. 7 described later, the information display 6 is electrically connected to the main control board 71 via the door relay terminal board 68 and the game operation display board 81, and the display operation of the information display 6 is mainly performed. It is controlled by the main control circuit 90 described later in the control board 71. Further, the control method of the various 7-segment LEDs described above is dynamic lighting control.

In the pachi-slot machine 1 of the present embodiment, in addition to the instruction monitor controlled by the main control board 71, another means controlled by the sub-control board 72 is used to notify the information of the stop operation. Specifically, the information on the stop operation is notified by the display device 11 described later, which is composed of the projector mechanism 211 and the display unit 212 (see FIGS. 3 and 7 described later) described later.

When such a configuration is applied, the mode of notification in the instruction monitor and the mode of notification in other means controlled by the sub-control board 72 may be different from each other. That is, in the instruction monitor, the information of the stop operation to be notified may be notified in a manner uniquely corresponding to the information of the stop operation, and it is not always necessary to directly notify the information of the stop operation (for example, the numerical value "1" in the instruction monitor. Even if is displayed, it may not be possible to specify the content of the notification depending on the player, so it cannot be said to be a direct notification). On the other hand, in the notification on the sub side (sub control board side) by other means such as the display device 11 described later, the information of the stop operation may be directly notified. For example, when notifying the push order "1st", the instruction monitor displays a numerical value "1" uniquely corresponding to the push order to be notified, but other means (for example, display device 11 or the like) display the left reel 3L. The instruction information for performing the first stop operation may be directly notified to the user.

In the pachi-slot machine 1 having such a configuration, it is possible to notify the information of the necessary stop operation according to the internal winning combination not only by the control of the sub control board 72 but also by the control of the main control board 71. Further, the presence / absence of notification of such stop operation information may be controlled according to the gaming state. For example, in the general gaming state (non-ART gaming state) described later, the stop operation information may not be notified, but in the ART gaming state described later (see FIG. 14 described later), the stop operation information may be notified.

Further, a sub display device 18 is provided on the left side of the reel display window 4 when viewed from the player side. As shown in FIG. 2, the sub-display device 18 is provided so as to stand substantially perpendicular to the pedestal region of the substantially horizontal plane of the pedestal portion 13 in the front portion of the door body 9. The sub-display device 18 is composed of a liquid crystal display and an organic EL (Electro-Luminescence) display, and displays various information.

Further, a touch sensor 19 is provided on the display surface of the sub display device 18 (see FIG. 7 described later). The touch sensor 19 operates according to a predetermined operating principle such as a capacitance method, and when it receives an operation of a player, it outputs a signal corresponding to the operation as touch input information. The pachi-slot machine 1 of the present embodiment has a function of enabling the display of the sub-display device 18 to be switched according to the player's operation (touch input information output from the touch sensor 19) received via the touch sensor 19. Has. The sub-display device 18 is controlled by the sub-control board 72 (see FIG. 7 to be described later) based on the touch input information output from the touch sensor 19.

At the lower part of the door body 9, a medal payout outlet 24, a medal tray 25, two speaker holes 20L, 20R, and the like are provided. The medal payout outlet 24 guides the medals discharged by driving the medal payout device 51, which will be described later, to the outside. The medal tray 25 stores medals discharged from the medal payout outlet 24. Further, sound effects such as sound effects and music corresponding to the content of the production are output from the two speaker holes 20L and 20R.

[Internal structure]
Next, the internal structure of the pachi-slot machine 1 will be described with reference to FIGS. 3 and 4. FIG. 3 is a diagram showing the internal structure of the cabinet 2a, and FIG. 4 is a diagram showing the internal structure of the front door 2b on the back surface side.

As shown in FIG. 3, the cabinet 2a has a top plate 27a, a bottom plate 27b, left and right side plates 27c and 27d, and a back plate 27e. A display device 11 is arranged in the upper part of the cabinet 2a.

The display device 11 has a projector mechanism 211 and a box-shaped projected member 212a on which the image light projected from the projector mechanism 211 is projected, and displays an image by projection mapping. Specifically, the display device 11 generates video light based on the position (projection distance, angle, etc.) and shape of the projected member 212a, which is a three-dimensional object, and the video light is projected by the projector mechanism 211. It is projected on the surface of 212a. By providing such an effect function, it is possible to perform an advanced and powerful effect. Further, although not shown in FIG. 3, another projected member having a curved display surface is provided on the back side of the box-shaped projected member 212a, and one of the projected members is provided depending on the gaming state. , Used as a screen on which video light is projected. Therefore, the inside of the cabinet 2a is also provided with a function (not shown) for switching the projected member according to the gaming state.

At the lower part of the cabinet 2a, a medal payout device (hereinafter referred to as a hopper device) 51, a medal auxiliary storage 52, and a power supply device 53 are arranged.

The hopper device 51 is attached to the central portion of the bottom plate 27b in the cabinet 2a. The hopper device 51 has a structure capable of accommodating a large number of medals and ejecting them one by one. The hopper device 51 pays out medals when, for example, the number of stored medals exceeds 50, or when the settlement button is pressed and the settlement of medals is executed. Then, the medals paid out by the hopper device 51 are discharged from the medal payout outlet 24 (see FIG. 2).

The medal auxiliary storage 52 stores medals overflowing from the hopper device 51. The medal auxiliary storage 52 is arranged on the right side of the hopper device 51 when the inside of the cabinet 2a is viewed from the front. Further, the medal auxiliary storage 52 is detachably attached to the bottom plate 27b of the cabinet 2a.

The power supply device 53 includes a power supply switch 53a and a power supply board 53b (power supply means) (see FIG. 7 described later). The power supply device 53 is arranged on the left side of the hopper device 51 when the inside of the cabinet 2a is viewed from the front, and is attached to the left side plate 27c. The power supply device 53 converts the AC voltage 100V power supplied from the sub power supply device (not shown) into the DC voltage power required in each part, and supplies the converted power to each part.

Further, above the power supply device 53 in the cabinet 2a, a sub-control board case 57 for accommodating the sub-control board 72 (see FIG. 7 described later) is arranged. A sub-control circuit 200 (see FIG. 10 to be described later) described later is mounted on the sub-control board 72 housed in the sub-control board case 57. The sub-control circuit 200 is a circuit that controls the execution of an effect by displaying an image or the like. The specific configuration of the sub-control circuit 200 will be described later.

The sub-relay board 61 is arranged above the sub-control board case 57 in the cabinet 2a. The sub-relay board 61 is a relay board on which wiring for connecting the sub-control board 72 and the main control board 71, which will be described later, is mounted. Further, the sub-relay board 61 is a relay board on which wiring for connecting the sub-control board 72 and a board arranged around the sub-control board 72, various device units (units), and the like is mounted.

Further, although not shown in FIG. 3, a cabinet-side relay board 44 (see FIG. 7 described later) is arranged in the cabinet 2a. The cabinet-side relay board 44 includes a main control board 71 (see FIG. 7 described later), a hopper device 51, a game medal auxiliary storage switch 77 (see FIG. 7 described later), and a medal payout count switch (not shown). It is a relay board on which wiring for connecting to and is mounted.

As shown in FIG. 4, a middle door 41 is arranged at the center of the front door 2b on the back surface side, and a reel display window 4 (see FIG. 2) is attached so as to be openable and closable from the back side. Although not shown in FIG. 4, three reels 3L, 3C, and 3R are attached to the reel display window 4 side of the middle door 41, and the main control is on the side opposite to the reel display window 4 side of the middle door 41. A main control board case 55 in which the board 71 (see FIG. 7 described later) is housed is attached. A stepping motor (not shown) is connected to the three reels 3L, 3C, and 3R via a gear having a predetermined reduction ratio.

The main control board 71 housed in the main control board case 55 has a main control circuit 90 (see FIG. 9 described later) described later. The main control circuit 90 (main control means) is a circuit that controls the main flow of the game in the pachi-slot machine 1, such as determination of the internal winning combination, rotation and stop of each reel 3L, 3C, 3R, and determination of presence / absence of winning. .. Further, in the present embodiment, for example, the main control circuit 90 also controls the lottery processing of whether or not the ART is determined, the display processing of the navigation information on the instruction monitor, the transmission processing of various test signals, and the like. The specific configuration of the main control circuit 90 will be described later.

Speakers 65L and 65R are arranged below the middle door 41 on the back surface side of the front door 2b. The speakers 65L and 65R are arranged at positions facing the speaker holes 20L and 20R (see FIG. 2), respectively.

Further, above the speaker 65L, a selector 66 and a door open / close monitoring switch 67 are arranged. The selector 66 is a device for selecting whether or not the material and shape of the medal are appropriate, and guides the appropriate medal inserted into the medal insertion slot 14 to the hopper device 51. A medal sensor (game medium detecting means: not shown) for detecting that an appropriate medal has passed is provided on the path through which the medal passes in the selector 66.

The door open / close monitoring switch 67 is arranged diagonally to the lower left of the selector 66 when the front door 2b is viewed from the back surface side. The door open / close monitoring switch 67 outputs a security signal for notifying the open / close of the front door 2b to the outside of the pachi-slot machine 1.

Further, although not shown in FIG. 4, a door relay terminal plate 68 is disposed on the back surface of the front door 2b, which is a region opened and closed by the middle door 41 and below the reel display window 4 (see the figure below). 7). The door relay terminal board 68 includes a main control board 71 in the main control board case 55, various buttons and switches, a sub relay board 61, a selector 66, a game operation display board 81, a first interface board 301 for a testing machine, and the like. This is a relay board on which wiring for connecting to each of the second interface boards 302 for a testing machine is mounted. Examples of the various buttons and switches include the MAX bet button 15a, the 1-bet button 15b, the door open / close monitoring switch 67, the BET switch 77 described later, the start switch 79, and the like.

<Display example of sub-display device>
Here, various display screens displayed on the sub-display device 18 will be described with reference to FIGS. 5A to 5E. 5A is a diagram showing a top screen 221 displayed on the sub display device 18, and FIG. 5B is a diagram showing a menu screen 222 displayed on the sub display device 18. 5C to 5E are diagrams showing game information screens 223, 224, and 225 displayed on the sub-display device 18.

Various display screens are displayed on the sub-display device 18 by a player's touch operation, and as shown in FIGS. 5A to 5E, various display screens including a top screen 221, a menu screen 222, and a game information screen 223, 224, 225 are included. The display screen is displayed. These display screens are switched based on the player's operation signal received via the touch sensor 19.

The top screen 221 is an initial screen among the display screens displayed on the sub display device 18, and the top screen 221 displays the “MENU” button 221a and the outline game history 221b. The "MENU" button 221a is an operation button for calling the menu screen 222 shown in FIG. 5B, and when a predetermined operation (for example, tap) by the player is performed on the "MENU" button 221a, the menu screen 222 is called. Is done. Further, on the top screen 221, a part of the game history (summary game history) of the pachi-slot machine 1 is displayed as the summary game history 221b. In the present embodiment, for example, the number of bonuses, the number of ARTs, and the number of games (number of games) are displayed as the outline game history 221b.

The menu screen 222 is a screen for displaying a menu that can be displayed on the sub-display device 18, and on the menu screen 222, a “back” button 222a, a “registration” button 222b, an “explanation” button 222c, and an “array dividend” button 222d. , The "reach eye" button 222e, the "WEB site" button 222f, and the "volume" button 222g are displayed. The "back" button 222a is an operation button for calling the top screen 221, and when the player operates the "back" button 222a, the top screen 221 is called. Further, the "registration" button 222b to the "volume" button 222g are operation buttons for calling the display screen of the corresponding menu content, and when the player operates each button, the corresponding menu content is displayed. The display screen is called.

For example, when the "register" button 222b is operated by the player on the menu screen 222, a registration screen (not shown) for registering the player during the game is called on the display screen of the sub display device 18. In recent pachislot machines, a service is widely provided in which a player is registered for each model and various information such as the achievement status of a predetermined mission is managed from the player's past game history. The registration screen called by the "registration" button 222b is a display screen for registering a player when receiving the provision of this service.

Further, for example, when the "explanation" button 222c is operated by the player on the menu screen 222, the explanation screen (not shown) of the pachi-slot machine 1 is called to the display screen of the sub-display device 18. The information displayed on the explanation screen includes, for example, an explanation about the specifications of the pachi-slot machine 1 such as a bonus winning probability and an ART winning probability for each set value, and an introduction explanation of a character appearing in the production of the pachi-slot machine 1.

Further, for example, when the "array payout" button 222d is operated by the player on the menu screen 222, the array payout screen (not shown) of the pachi-slot machine 1 is called on the display screen of the sub-display device 18. On the array payout screen, for example, the correspondence relationship (payout table) between the combination of symbols judged to be winning in Pachislot 1 and the privilege when it is judged to be winning, and drawn on each reel 3L, 3C, 3R. The symbol sequence (reel arrangement) and the like are displayed.

Further, for example, when the "reach eye" button 222e is operated by the player on the menu screen 222, the reach eye screen (not shown) of the pachi-slot machine 1 is called on the display screen of the sub display device 18. On the reach-eye screen, information on the symbol combination called "reach-eye" set in the pachi-slot machine 1 is displayed. The symbol combination referred to as "reach eyes" is a symbol combination to which a special privilege is given by displaying the symbol combination along the effective line. In the pachi-slot machine 1 of the present embodiment, the figure described later The symbol combination corresponding to the abbreviation "reach eye lip" shown in the content column of the winning operation flag storage area of FIGS. 28 to 30 corresponds to. Then, in the present embodiment, when the symbol combination related to the "reach eye lip" is displayed along the effective line, then a state advantageous to the player (for example, a bonus state, a normal ART or CT (FIG. 14 described later)). It is confirmed that the transition to (see)) will be made.

Further, for example, when the "WEB site" button 222f is operated by the player on the menu screen 222, the WEB introduction screen (not shown) of the pachi-slot machine 1 is called on the display screen of the sub-display device 18. On the WEB introduction screen, for example, a two-dimensional code (for example, QR code (registered trademark)) indicating the URL of an arbitrary WEB site such as a special WEB site provided for each model of pachislot 1 or a WEB site of a manufacturer of pachislot 1). Is displayed. The player can access the corresponding WEB site by reading the two-dimensional code displayed on the WEB introduction screen with a mobile phone or the like.

Further, for example, when the "volume" button 222g is operated by the player on the menu screen 222, a volume adjustment screen (not shown) capable of adjusting the volume of the sound output from the speakers 65L and 65R is a sub-display device. Called to the display screen of 18. The player can adjust the volume of the effect sound of the pachi-slot machine 1 via the volume adjustment screen.

Since the sub-display device 18 is provided separately from the display device 11 (projector mechanism 211 and display unit 212) described above, the sub-display device 18 can be controlled separately from the display device 11. Therefore, in the pachi-slot machine 1 of the present embodiment, the display screen of the sub-display device 18 can be switched by the operation of the player even during the game (during the execution of the effect by the display device 11). As a result, for example, when the player wants to know the character appearing in the effect of the display device 11, the player operates the "explanation" button 222c to call the explanation screen between the characters. Information such as the relationship between the two can be grasped during the game. Also, for example, when the player wants to grasp the symbol that should be used as a guide for winning the rare role during the reel rotation when the so-called "rare role" is won during the game, the player wants to know. By operating the "array payout" button 222d to call the array payout screen, the reel arrangement can be grasped.

The game information screens 223, 224, and 225 are display screens that display detailed game history information including an outline game history to be displayed on the top screen 221 of the game history of the pachi-slot machine 1.

On the game information screen 223, a "back" button 223a, a "MENU" button 223b, a "previous" button 223c, a "next" button 223d, and a game history 223e are displayed. The "back" button 223a and the "MENU" button 223b are operation buttons for calling the top screen 221 and the menu screen 222 to the display screen of the sub display device 18, respectively, and are supported by the player operating each button. The display screen is called. Further, the "previous" button 223c and the "next" button 223d are operation buttons for switching the game information screens in a predetermined order, and when the "previous" button 223c is operated by the player, the display screen is displayed. Is switched from the game information screen 223 to the game information screen 225, and when the "Next" button 223d is operated by the player, the display screen is switched from the game information screen 223 to the game information screen 224. Further, as the game history 223e, as shown in FIG. 5C, the number of games (number of games), the number of bonuses, the number of ARTs, and the number of CZs (chance zones) are displayed.

On the game information screen 224, a "back" button 224a, a "MENU" button 224b, a "previous" button 224c, a "next" button 224d, and a game history 214e are displayed. The "back" button 224a and the "MENU" button 224b are operation buttons for calling the top screen 221 and the menu screen 222 to the display screen of the sub display device 18, respectively, and are supported by the player operating each button. The display screen is called. Further, the "previous" button 224c and the "next" button 224d are operation buttons for switching the game information screen in a predetermined order, and when the "previous" button 224c is operated by the player, the display screen is displayed for the game. When the information screen 224 is switched to the game information screen 223 and the "Next" button 224d is operated by the player, the display screen is switched from the game information screen 224 to the game information screen 225. Further, as the game history 224e, the number of rushes and the number of successes of the CZ (chance zone) described later are displayed. As will be described later, in the present embodiment, three types of CZs, CZ1, CZ2, and CZ3, are provided as CZs. Therefore, as the game history 224e, as shown in FIG. 5D, the number of rushes and the number of successes of each of CZ1 to CZ3 are displayed.

On the game information screen 225, a "back" button 225a, a "MENU" button 225b, a "previous" button 225c, a "next" button 225d, and a game history 225e are displayed. The "back" button 225a and the "MENU" button 225b are operation buttons for calling the top screen 221 and the menu screen 222 to the display screen of the sub display device 18, respectively, and are supported by the player operating each button. The display screen is called. Further, the "previous" button 225c and the "next" button 225d are operation buttons for switching the game information screens in a predetermined order, and when the "previous" button 225c is operated by the player, the display screen is displayed. Is switched from the game information screen 225 to the game information screen 224, and when the "Next" button 225d is operated by the player, the display screen is switched from the game information screen 225 to the game information screen 223. Further, as the game history 225e, as shown in FIG. 5E, the number of winnings of the small winning combination and the winning probability (a fraction of one numerator) are displayed.

As a display screen switching method displayed on the sub-display device 18, for example, a method of switching based on a tap operation for an operation button displayed on each display screen may be adopted, or, for example, a method of switching may be adopted. A method of switching based on a swipe operation on the display screen may be adopted.

<Various switching functions of the display screen of the sub display device>
Next, various switching functions of the display screen of the sub-display device 18 in the pachi-slot machine 1 of the present embodiment will be described.

[Example of transition of display screen of sub-display device]
First, a transition example (switching mode) of the display screen of the sub-display device 18 in the pachi-slot machine 1 of the present embodiment will be described with reference to FIGS. 6A and 6B. Note that FIG. 6A is a diagram showing a transition example of the display screen of the sub-display device 18 in a situation where the player registration state is not set, and FIG. 6B is a diagram showing a sub-display in a situation where the player registration state is set. It is a figure which shows the transition example of the display screen of the apparatus 18.

In the situation where the player registration state is not set, as shown in FIG. 6A, the display screen of the sub display device 18 transitions between the top screen 221 and the menu screen 222, and from the menu screen 222 and the menu screen 222. Transitions are possible only to and from various display screens that are possible, and the transition between these display screens is controlled by the sub-control board 72 (sub-CPU 201 described later). For example, the sub-control board 72 is placed between the top screen 221 and the menu screen 222 based on a touch operation (for example, a tap operation for a predetermined button or a swipe operation on a display screen) acquired via the touch sensor 19. Switch the display screen. However, in the situation where the player registration state is not set, the sub-control board 72 controls so that the game information screens 223, 224, and 225 cannot be displayed. That is, in the situation where the player registration state is not set, the player cannot display the game information screens 223, 224, and 225 on the sub display device 18.

On the other hand, in the situation where the player registration state is set, as shown in FIG. 6B, the display screen of the sub display device 18 is between the top screen 221 and the menu screen 222, and the menu screen 222 and the menu screen 222. In addition to the various display screens that can be transitioned from, the transition between the menu screen 222 and the game information screens 223, 224, 225 is also possible, and the transition between these display screens is the sub-control board 72 (subs described later). It is controlled by CPU201). That is, the sub-control board 72 is not only between the top screen 221 and the menu screen 222, but also between the top screen 221 and the menu screen 222, and the game information screen, based on the touch operation acquired via the touch sensor 19. The display screen can also be switched between 223, 224, and 225. Therefore, in the present embodiment, when the player registration state is set, the player can display the game information screens 223, 224, and 225 on the sub display device 18.

As shown in FIG. 6B, the transition order of the display screens between the top screen 221 and the menu screen 222 and the game information screens 223, 224, and 225 is arbitrary. Therefore, for example, the top screen 221 may be configured to be able to directly transition to the game information screen 223, 224, 225, or the top screen 221 may be changed to the game information screen 223, 224, 225 only via the menu screen 222. It may be configured so that it can be transitioned.

In the pachi-slot machine 1 of the present embodiment, the configuration is such that the game information screen 223, 224, 225 can be transitioned only from the top screen 221 via the menu screen 222 (the configuration cannot directly transition from the top screen 221 to the game information screen 223, 224, 225). ) Is adopted. In the pachi-slot machine 1 of the present embodiment, on the menu screen 222, the player swipes the display screen (not the menu selection operation) to display the display screen from the menu screen 222 to the game information screens 223 and 224. , 225 can be transitioned.

In the present embodiment, the game information screens 223, 224, and 225 are display screens provided completely independently of the menu screen 222. That is, in the pachi-slot machine 1 of the present embodiment, the information indicating the result of the game in which the player has a strong interest during the game, which is the game history, is independent as information unrelated to the result of the game such as the payout arrangement and the volume control. And display. Then, in the present embodiment, in the situation where the player registration state is set, the game information screens 223, 224, and 225 can be displayed without the player performing a menu selection operation on the menu screen 222. .. Therefore, in the present embodiment, when the player registration state is set, it is possible to easily access the emotional game history information desired by the player.

Further, in the present embodiment, in the menu selection operation for the menu screen 222, the display screen cannot be changed to the game information screens 223, 224, 225, and the swipe operation for the menu screen 222 (specified in the menu display). The display screen cannot be changed to the game information screens 223, 224, 225 unless the operation is performed. Therefore, in the pachi-slot machine 1 of the present embodiment, the swipe operation for transitioning the display screen to the game information screens 223, 224, 225 can be treated as a hidden command in the situation where the player registration state is set. In this case, from the player's own knowledge of pachislot 1, more detailed game history information that cannot be seen by other players with little knowledge can be seen, so that the player can see more detailed game history information than the other players. It is possible to play the game advantageously, and as a result, it can be expected that the player actively plays the game.

[Display switching function from the game information screen to the top screen]
The pachi-slot machine 1 of the present embodiment has a function of shifting the display screen of the sub-display device 18 from the game information screens 223, 224, 225 to the top screen 221 manually or automatically by the player. Specifically, in the present embodiment, when the "back" button is operated on the game information screens 223, 224, 225, the display screen transitions from the game information screen 223, 224, 225 to the top screen 221 (manual transition). function). Further, in the present embodiment, when the predetermined conditions are satisfied while the game information screens 223, 224, and 225 are displayed, the display screen automatically changes to the top screen 221 regardless of the player's operation. Transition (automatic transition function).

More specifically, in the pachi-slot machine 1, when the game information screens 223, 224, and 225 are displayed, the insertion operation (operation to the MAX bet button 15a, operation to the 1-bet button 15b, and the medal insertion slot 14 is performed. When the operation of inserting medals) is performed, the display screen of the sub display device 18 automatically transitions to the top screen 221. In a gaming state (high lip state) where there is a high probability that the replay combination will be determined as an internal winning combination, such as the ART gaming state, medals will be automatically inserted due to the operation of the replay accompanying the replay combination winning. As a result, in the high lip state, the opportunity to display the game information screens 223, 224, and 225 may be limited. Therefore, in the pachi-slot machine 1 of the present embodiment, when a medal is automatically inserted due to the operation of the re-game, the display screen is automatically displayed as the game information screen 223, not by the operation of inserting the medal but by the start operation. , 224, 225 transitions to the top screen 221.

That is, in the present embodiment, when the re-game is activated and the game information screens 223, 224, 225 are displayed, the display screen is automatically changed to the game information screens 223, 224 with the start operation as a trigger. , 225 transitions to the top screen 221. On the other hand, when the re-game operation is not performed, the display screen automatically transitions from the game information screen 223, 224, 225 to the top screen 221 triggered by the input operation.

[Display switching function from the menu content display screen to the top screen (or menu screen)]
The pachi-slot machine 1 of the present embodiment has various menu content display screens (registration screen, explanation screen, array dividend screen, reach screen, WEB introduction) in which the display screen of the sub display device 18 can be changed by a menu selection operation for the menu screen 222. It has a function of manually or automatically transitioning from the screen (screen and volume adjustment screen) to the top screen 221 (or menu screen 222). Specifically, in the present embodiment, when a predetermined button (for example, the "return to TOP" button) is operated on the menu content display screen, the display screen transitions from the menu content display screen to the top screen 221 (for example, the menu content display screen is changed to the top screen 221 (). Manual transition function). Further, in the present embodiment, when a specific button (for example, a "back" button) is operated on the menu content display screen, the display screen transitions from the menu content display screen to the menu screen 222 (manual transition). function).

Further, in the present embodiment, when a predetermined time elapses while the menu content display screen is displayed, the display screen automatically changes to the top screen 221 (or menu screen 222) regardless of the player's operation. Transition (automatic transition function). At this time, the predetermined time that triggers the automatic transition to the top screen 221 (or the menu screen 222) differs depending on the type of the menu content display screen currently displayed. For example, if the volume adjustment screen for adjusting the volume output from the pachislot machine 1 is displayed for a long time, not only the volume may be adjusted to an unintended volume due to an erroneous operation, but also another player may be affected by the erroneous operation. It can also make you uncomfortable. Therefore, the volume adjustment screen is set to automatically transition to the top screen 221 (or menu screen 222) in a shorter time than other menu content display screens. On the other hand, the registration screen is set to automatically transition to the top screen 221 (or menu screen 222) in a longer time than the other menu content display screens in order to facilitate the registration of the player. ..

That is, on each menu content display screen, an elapsed time (automatic transition time) that triggers an automatic transition to the top screen 221 (or menu screen 222) is appropriately set according to the type of the menu content display screen. , The volume adjustment screen is set with an automatic transition time shorter than that of other menu content display screens, and the registration screen is set with an automatic transition time longer than that of other menu content display screens.

[Menu operation enable / disable selection function]
In the pachi-slot machine 1 of the present embodiment, the display screen of the sub-display device 18 is changed from the menu screen 222 to the registration screen, the explanation screen, the arrangement payout screen, the reach screen, the WEB introduction screen, and the volume adjustment screen. A person can perform various operations according to these menu content display screens, and can confirm various information. It should be noted that a function (a function for selecting whether or not to operate the menu) may be provided so that the function that the player can select the menu can be restricted according to the setting on the game store side.

For example, the display screen may not be transitioned from the menu screen 222 to the volume control screen (for example, the "volume" button 222g may not be displayed on the menu screen 222) by the setting on the game store side. In this case, it is possible to prevent the player from adjusting the volume.

<Control system provided by pachislot>
Next, the control system included in the pachi-slot machine 1 will be described with reference to FIG. 7. FIG. 7 is a circuit block diagram showing the configuration of the control system of the pachi-slot machine 1.

The pachi-slot machine 1 has a main control board 71 provided on the middle door 41 and a sub control board 72 provided on the front door 2b. Further, the pachi-slot machine 1 has a reel relay terminal board 74, a setting key type switch 54 (setting switch), and a cabinet-side relay board 44 connected to the main control board 71. Further, the pachi-slot machine 1 has an external centralized terminal board 47, a hopper device 51, a medal auxiliary storage switch 75, a reset switch 76, and a power supply device 53 connected to the main control board 71 via a cabinet-side relay board 44. Since the configuration of the hopper device 51 has been described above, the description thereof will be omitted here.

The reel relay terminal plate 74 is arranged inside the reel main body of each reel 3L, 3C, 3R. The reel relay terminal plate 74 is electrically connected to a stepping motor (not shown) of each reel 3L, 3C, 3R, and relays a signal output from the main control board 71 to the stepping motor.

The setting key type switch 54 is provided on the main control board case 55. The setting key type switch 54 is used when changing the settings of the pachi-slot machine 1 (settings 1 to 6) or when confirming the settings of the pachi-slot machine 1.

The cabinet-side relay board 44 is a relay board on which wiring for connecting the main control board 71 and the external centralized terminal board 47, the hopper device 51, the medal auxiliary storage switch 75, the reset switch 76, and the power supply device 53 is mounted. Is. The external centralized terminal board 47 is provided to output signals such as a medal insertion signal, a medal payout signal, and a security signal to the outside of the pachi-slot machine 1. The medal auxiliary storage switch 75 is provided in the medal auxiliary storage 52, and detects whether or not the medal auxiliary storage 52 is full of medals. The reset switch 76 is used, for example, when changing the setting of the pachi-slot machine 1.

The power supply device 53 includes a power supply board 53b and a power supply switch 53a connected to the power supply board 53b. The power switch 53a is pressed when supplying the necessary power to the pachi-slot machine 1. The power supply board 53b is connected to the main control board 71 via the cabinet-side relay board 44, and is also connected to the sub control board 72 via the sub relay board 61.

Further, the pachislot 1 has a selector 66, a door open / close monitoring switch 67, a BET switch 77, and a settlement switch 78, which are connected to the main control board 71 via the door relay terminal plate 68 and the door relay terminal plate 68. It has a start switch 79, a stop switch board 80, a game operation display board 81, an auxiliary relay board 61, a first interface board 301 for a testing machine, and a second interface board 302 for a testing machine. Since the selector 66, the door open / close monitoring switch 67, and the sub-relay board 61 have been described above, their description will be omitted here.

The BET switch 77 (throwing operation detecting means) detects that the MAX bet button 15a or the 1-bet button 15b is pressed by the player. The settlement switch 78 detects that the settlement button (not shown) is pressed by the player. The start switch 79 (start operation detecting means) detects that the start lever 16 has been operated by the player (start operation).

The stop switch board 80 (stop operation detecting means) includes a circuit for stopping the rotating main reel and a circuit for displaying the stoptable main reel by an LED or the like. Further, the stop switch board 80 is provided with a stop switch (not shown). The stop switch detects that each stop button 17L, 17C, 17R is pressed by the player (stop operation).

The game operation display board 81 is connected to the information display (7-segment display) 6 and the LED 82. The LED 82 has, for example, three LEDs (hereinafter, “first LED” to “1st LED” to display the number of medals inserted, which are lit corresponding to the number of medals inserted in this game (hereinafter referred to as “the number of inserted medals”). An LED that lights up a mark indicating that medals can be inserted, a mark indicating the start of a game, a mark for replaying a game, etc., based on a signal input from the game operation display board 81 (referred to as "third LED"). Etc. are included. In the first LED to the third LED (display means), when one medal is inserted, the first LED lights up, and when two medals are inserted, the first and second LEDs light up, and three medals (game). (Number of startable sheets) When it is turned on, the first LED to the third LED are turned on. Since the information display 6 has been described above, the description thereof will be omitted here.

Both the first interface board 301 for the testing machine and the second interface board 302 for the testing machine are relay boards used when outputting various signals related to the game to the testing machine in the certification test (test firing test) of the pachislot 1 (testing test). Since these relay boards are not mounted on the Pachislot 1 as a release product for sale, the main control circuit 90 of the main control board 71 for sale includes the first interface board 301 for the tester and the tester. The various electronic components required to connect to the second interface board 302 are also not mounted). For example, a test signal for controlling a main operation related to a game (for example, internal lottery, reel stop control, etc.) is output via a first interface board 301 for a testing machine, and is determined by, for example, a main control board 71. The test signal and the like related to the pushed order navigation are output via the second interface board 302 for the testing machine.

The sub-control board 72 is connected to the main control board 71 via the door relay terminal board 68 and the sub-relay board 61. Further, the pachi-slot machine 1 has a speaker group 84, an LED group 85, a 24h door open / close monitoring unit 63, a touch sensor 19 and a display unit 212 connected to the sub-control board 72 via the sub-relay board 61. Since the touch sensor 19 has been described above, the description thereof will be omitted here.

The speaker group 84 includes speakers 65L and 65R and various speakers (not shown). The LED group 85 includes a lamp group 21 provided on the front panel 10, a light source that emits light for illuminating the decorative panel of the waist panel 12 from the back side, and the like. The 24h door open / close monitoring unit 63 stores the open / close history information of the middle door 41. Further, the 24h door open / close monitoring unit 63 outputs a signal for displaying an error by the display device 11 to the sub control board 72 (sub control circuit 200) when the middle door 41 is opened. The display unit 212 includes, for example, a projected member 212a constituting the display device 11 and another projected member having a curved display surface provided on the back side of the projected member 212a.

Further, the pachi-slot machine 1 has a ROM cartridge board 86 and a liquid crystal relay board 87 connected to the sub-control board 72. The ROM cartridge board 86 and the liquid crystal relay board 87 are housed in the sub-control board case 57 together with the sub-control board 72.

The rom cartridge board 86 is a board for managing various control programs executed by the sub CPU 201, image (video) for directing, audio (speaker group 84), light (LED group 85), and communication data. .. The liquid crystal relay board 87 is a board that relays the connection wiring between the sub-control board 72, the projector mechanism 211 constituting the display device 11, and the sub-display device 18. Since the projector mechanism 211 and the sub-display device 18 have been described above, the description thereof will be omitted here.

<Main control circuit>
Next, the configuration of the main control circuit 90 mounted on the main control board 71 will be described with reference to FIG. FIG. 8 is a block diagram showing a configuration example of the main control circuit 90 of the pachi-slot machine 1.

The main control circuit 90 includes a microprocessor 91, a clock pulse generation circuit 92, a power management circuit 93, and a switching regulator 94 (power supply means).

The microprocessor 91 is a microprocessor with a security function for a gaming machine. In the microprocessor 91 of the present embodiment, as will be described later, various instruction codes specific to the microprocessor 91 that can be specified in the source program (for example, "LDQ" instruction to be described later, etc .: hereinafter, "main CPU 101". Dedicated instruction code ") is provided. In the present embodiment, by using the instruction code dedicated to the main CPU 101, the efficiency of processing and the reduction of the program capacity are realized. The internal configuration of the microprocessor 91 will be described in detail with reference to FIG. 9 described later, and the instruction code dedicated to the main CPU 101 provided in the microprocessor 91 will be described in detail in various processes executed by the main control circuit described later. do.

The clock pulse generation circuit 92 generates a clock pulse signal for operating the main CPU, and outputs the generated clock pulse signal to the microprocessor 91. The microprocessor 91 executes a control program based on the input clock pulse signal.

The power supply management circuit 93 manages fluctuations in the DC 12V power supply voltage supplied from the power supply board 53b (see FIG. 7). Then, the power supply management circuit 93 outputs a reset signal to the "XSRST" terminal of the microprocessor 91, for example, when the power is turned on (when the power supply voltage exceeds the starting voltage value (10V) from 0V). When a power failure occurs (when the power supply voltage falls below the failure voltage value (10.5V) from 12V), the power failure detection signal is output to the "XINT" terminal of the microprocessor 91. That is, the power management circuit 93 is a means (starting means) for outputting a reset signal (starting signal) to the microprocessor 91 when the power is turned on, and a power failure detection signal (power failure signal) to the microprocessor 91 when a power failure occurs. Also serves as a means for outputting (power outage means).

The switching regulator 94 is a DC / DC conversion circuit, generates a DC drive voltage (power supply voltage of DC 5 V) of the microprocessor 91, and outputs the generated DC drive voltage to the “VCC” terminal of the microprocessor 91.

<Microprocessor>
Next, the internal configuration of the microprocessor 91 will be described with reference to FIG. FIG. 9 is a block diagram showing an internal configuration of the microprocessor 91.

The microprocessor 91 includes a main CPU 101, a main ROM 102 (first storage means), a main RAM 103 (second storage means), an external bus interface 104, a clock circuit 105, a reset controller 106, an arithmetic circuit 107, and the like. It has a random number circuit 110, a parallel port 111, an interrupt controller 112, a timer circuit 113, a first serial communication circuit 114, and a second serial communication circuit 115. Each of these parts constituting the microprocessor 91 is connected to each other via a signal bus 116.

The main CPU 101 executes various control programs based on the clock pulse generated by the clock circuit 105 to control the game operation in general. Here, reel stop control will be described as an example of the control operation of the main CPU 101.

The main CPU 101 counts the number of times a pulse is output to the stepping motors of each reel 3L, 3C, 3L (main reel) after detecting the reel index. As a result, the main CPU 101 manages the rotation angle of each reel (mainly, how many symbols the reel has rotated). The reel index is information indicating that the reel has made one revolution. This reel index is, for example, an optical sensor having a light emitting portion and a light receiving portion, and a detection piece provided at a predetermined position on each reel and interposed between the light emitting portion and the light receiving portion due to the rotation of each main reel. It is detected by the provided reel position detection unit (not shown).

Here, the management of the rotation angle of each reel 3L, 3C, 3L (main reel) will be specifically described. The number of pulses output to the stepping motor is counted by a pulse counter provided in the main RAM 103. Then, each time the output of a predetermined number of pulses required for the rotation of one symbol is counted by the pulse counter, the symbol counter provided in the main RAM 103 is added one by one. The symbol counter is provided according to each reel. The value of the symbol counter is cleared when the reel index is detected by the reel position detection unit (not shown).

That is, in the present embodiment, by managing the symbol counter, it is possible to manage how many symbols have been rotated since the reel index was detected. Therefore, the position of each symbol of each reel is detected with reference to the position where the reel index is detected.

The main ROM 102 stores various control programs executed by the main CPU 101, various data tables, data for transmitting various control commands (commands) to the sub-control circuit 200, and the like. The main RAM 103 is provided with a storage area for storing various data such as an internal winning combination determined by executing a control program. The internal configuration (memory map) of the main ROM 102 and the main RAM 103 will be described in detail with reference to FIG. 12 described later.

The external bus interface 104 is for electrically connecting the microprocessor 91 to an external signal bus (not shown) to which various components (for example, reels and the like) provided outside the microprocessor 91 are connected. It is an interface circuit. The clock circuit 105 is configured to include, for example, a frequency divider (not shown), and a clock pulse signal for CPU operation input from the clock pulse generation circuit 92 is transmitted by another component (for example, a timer circuit 113). Convert to a clock pulse signal of the frequency used. The clock pulse signal generated by the clock circuit 105 is also output to the reset controller 106.

The reset controller 106 resets the IAT (Illegal Address Trap) and the WDT (watchdog timer) based on the reset signal input from the power supply management circuit 93. The arithmetic circuit 107 includes a multiplication circuit and a division circuit. For example, when the “MUL” instruction described later (see FIG. 93B described later) is executed on the source program, the arithmetic circuit 107 executes the multiplication process based on the “MUL” instruction.

The random number circuit 110 generates a random number in a predetermined range (for example, 0 to 65535 or 0 to 255). Although not shown, the random number circuit 110 has a random number register 0 for obtaining a 2-byte hard-latch random number, random number registers 1 to 3 for obtaining a 2-byte soft-latch random number, and a 1-byte soft-latch random number. It is composed of random number registers 4 to 7 for obtaining. The main CPU 101 extracts one value from the random numbers in a predetermined range generated by the random number circuit 110, for example, as a random number value for internal lottery. The parallel port 111 is a signal port (memory map I / O) input / output between the microprocessor 91 and various circuits (for example, power supply management circuit 93, etc.) provided outside the microprocessor 91. .. The parallel port 111 is also connected to the random number circuit 110 and the interrupt controller 112. The start switch 79 is connected to any input port of PI0 to PI4 of the parallel port 111, and at the timing (on-edge) when the start switch 79 is turned on, a latch signal is transmitted from the parallel port 111 to the random number register 0 of the random number circuit 110. Is output. Then, in the random number circuit 110, the random number register 0 is latched by the input of the latch signal, and a 2-byte hard latch random number is acquired.

The interrupt controller 112 interrupts processing by the main CPU 101 based on a power failure detection signal input from the power supply management circuit 93 via the parallel port 111 or a timeout signal input from the timer circuit 113 at a cycle of 1.1172 ms. Controls the execution timing of. When a power failure detection signal is input from the power management circuit 93, or when a timeout signal is input from the timer circuit 113, the interrupt controller 112 issues an interrupt request signal indicating an interrupt processing start command to the main CPU 101. Output to. The main CPU 101 has an input port check process, a reel control process, a communication data transmission process, a 7-segment LED drive process, and a timer based on an interrupt request signal input from the interrupt controller 112 in response to a timeout signal from the timer circuit 113. Various interrupt processing such as update processing (see FIG. 158 described later) is performed.

The timer circuit 113 (PTC) operates with a clock pulse signal generated by the clock circuit 105 (a clock pulse signal having a frequency obtained by dividing the clock pulse signal for operating the main CPU by a divider (not shown)) ( Count the elapsed time). Then, the timer circuit 113 outputs a timeout signal (trigger signal) to the interrupt controller 112 at a cycle of 1.1172 msec.

The first serial communication circuit 114 is a circuit that controls a serial transmission operation when data (various control commands (commands)) are transmitted from the main control board 71 to the sub control board 72. The second serial communication circuit 115 is a circuit that controls the serial transmission operation when data is transmitted from the main control board 71 to the second interface board 302 for the testing machine.

<Secondary control circuit>
Next, with reference to FIG. 10, the configuration of the sub-control circuit 200 (sub-control means) mounted on the sub-control board 72 will be described. FIG. 10 is a block diagram showing a configuration example of the sub-control circuit 200 of the pachi-slot machine 1.

The sub-control circuit 200 is electrically connected to the main control circuit 90, and performs processing such as determination and execution of the effect content based on the command transmitted from the main control circuit 90. The sub-control circuit 200 basically includes a sub CPU 201, a sub RAM 202, a rendering processor 203, a drawing RAM 204, and a driver 205.

The sub CPU 201 is connected to the ROM cartridge board 86. The driver 205 is connected to the liquid crystal relay board 87. That is, the driver 205 is connected to the projector mechanism 211 and the sub-display device 18 via the liquid crystal relay board 87.

The sub CPU 201 controls the output of video, sound, and light according to the control program stored in the ROM cartridge board 86 in response to the command transmitted from the main control circuit 90. The ROM cartridge board 86 is basically composed of a program storage area and a data storage area.

The control program executed by the sub CPU 201 is stored in the program storage area. For example, in the control program, the main board communication task for controlling the communication with the main control circuit 90 and the effect registration for extracting the random value for the effect and determining and registering the effect content (effect data). Contains various programs for executing tasks. Further, the control program includes a drawing control task that controls the display of an image by the display device 11 based on the determined effect content, a lamp control task that controls the output of light by a light source such as the LED group 85, and a sound by the speaker group 84. It also includes various programs for executing voice control tasks and the like that control the output of.

The data storage area includes a storage area for storing various data tables, a storage area for storing effect data constituting each effect content, and a storage area for storing animation data related to video creation. Further, the data storage area includes a storage area for storing sound data related to BGM and sound effects, a storage area for storing lamp data related to a pattern of turning on and off light, and the like.

The sub RAM 202 is provided with a storage area for registering the determined effect content and effect data, and a storage area for storing various data such as a sub flag (internal winning combination) transmitted from the main control circuit 90.

The sub CPU 201, the rendering processor 203, the drawing RAM (including the frame buffer) 204, and the driver 205 create an image according to the animation data specified by the effect content, and display the created image on the display device 11 (projector mechanism 211) and /. Alternatively, it is displayed on the sub display device 18. The display device 11 (projector mechanism 211) and the sub-display device 18 are individually controlled by the sub-control board 72.

Further, the sub CPU 201 causes the speaker group 84 to output a sound such as BGM according to the sound data specified by the effect content. Further, the sub CPU 201 controls lighting and extinguishing of the LED group 85 according to the lamp data designated by the effect content.

<Various registers of the main CPU>
Next, various registers included in the main CPU 101 will be described with reference to FIG. Note that FIG. 11 is a schematic configuration diagram of various registers included in the main CPU 101.

As the main register, the main CPU 101 includes an accumulator A (hereinafter referred to as "A register"), a flag register F (flag register), a general-purpose register B (hereinafter referred to as "B register"), and a general-purpose register C (hereinafter referred to as "B register"). General-purpose register D (hereinafter referred to as "D register"), general-purpose register E (hereinafter referred to as "E register"), general-purpose register H (hereinafter referred to as "H register"), and general-purpose register L (hereinafter referred to as "H register"). , "L register"). Further, as sub-registers, the main CPU 101 includes an accumulator A', a flag register F', a general-purpose register B', a general-purpose register C', a general-purpose register D', a general-purpose register E', a general-purpose register H', and a general-purpose register L'. As a general-purpose register. Each register is composed of 1-byte registers.

Further, in the present embodiment, the B register and the C register are used as a pair register (hereinafter referred to as "BC register"), and the D register and the E register are used as a pair register (hereinafter referred to as "DE register"). Further, in the present embodiment, the H register and the L register are used as a pair register (hereinafter referred to as "HL register").

As shown in FIG. 11, predetermined flag information indicating the result of arithmetic processing or the like is set in each bit of the flag registers F and F'. For example, the bit 6 (D6) is set with data (zero flag) indicating whether or not the calculation result is “0” in the calculation result determination process. Specifically, when the calculation result is "0", the data "1" is set in the bit 6, and when the calculation result is not "0", the data "0" is set in the bit 6. Then, in the determination process of the calculation result, the main CPU 101 makes a determination (YES / NO) with reference to the data “0” / “1” of the bit 6.

Further, the main CPU 101 has an expansion register Q (hereinafter referred to as “Q register”). The Q register is composed of 1-byte registers. In this embodiment, as described in various processing flows described later, various main CPU 101 dedicated instruction codes for specifying an address using this Q register are provided on the source program, and this instruction code is provided. By using the above, the efficiency of processing and the capacity reduction of the main ROM 102 are realized. In various main CPU 101 dedicated instruction codes that specify an address using the Q register, the address data (address value) on the upper side of the address is stored in the Q register. Immediately after the reset of the main CPU 101, "F0H" is set as an initial value in the Q register. Further, in the "LD Q, n (8-bit data)" instruction using the Q register, the value of the Q register is changed by setting arbitrary 1-byte data in "n" and executing the instruction. be able to.

Further, the main CPU 101 includes an interrupt page address register I and a memory refresh register R composed of 1-byte registers, and an index register IX and an index register IY composed of 2-byte registers. , The stack pointer SP and the program counter PC are included as dedicated registers.

<Internal configuration of main ROM and main RAM (memory map)>
Next, the internal configurations (hereinafter referred to as “memory maps”) of the main ROM 102 and the main RAM 103 included in the main control circuit 90 (microprocessor 91) will be described with reference to FIGS. 12A to 12C. Note that FIG. 12A is a diagram showing a memory map of the entire memory, FIG. 12B is a diagram showing a memory map of the main ROM 102, and FIG. 12C is a diagram showing a memory map of the main RAM 103.

In the memory map of the entire memory included in the main control circuit 90 (microprocessor 91), as shown in FIG. 12A, from the head (0000H) side of the address, the memory area of the main ROM 102, the memory area of the main RAM 103, the built-in register area, and the built-in register area. The XCS decode area is arranged at a predetermined address in this order with an unused area in between.

In the memory map of the main ROM 102, as shown in FIG. 12B, the program area, the data area, the non-standard area, the trademark recording area, the program management area, and the security setting area are the program area, the data area, the non-standard area, and the security setting area from the head (0000H) side of the address of the main ROM 102. In order, they are placed at predetermined addresses.

In the program area, control programs for various processes executed by the main CPU 101 in various control processes related to the playability of the game performed by the player are stored. In the data area, various data used by the main CPU 101 in various control processes related to the playability of the game performed by the player (for example, various data tables such as an internal lottery table and various sub-control circuits 42). Data for transmitting control commands (commands), etc.) are stored. That is, the game ROM area (game storage area) consisting of the program area and the data area is necessary for control processing (process related to game performance) related to the game performance actually performed by the player at the game store. Various programs and various data are stored.

Further, in the non-regulated area, control programs and data of various processes (processes that do not affect the playability) that are not directly related to the playability of the game performed by the player are stored. For example, the program and data used in the pachislot 1 certification test (test firing test), the control program and data used in the checksum generation process at the time of power failure and the thumb check process at the time of power recovery, and the fraud countermeasure program. And the data required for it are stored in the non-standard area.

In the memory map of the main RAM 103, as shown in FIG. 12C, the game RAM area (predetermined storage area, game temporary storage area) and the non-standard RAM area (non-standard temporary) from the head (F000H) side of the address of the main RAM 103. Storage areas) are arranged at predetermined addresses in this order.

The game RAM area is provided with a work area and a stack area for temporarily storing various data such as an internal winning combination determined by executing a control program related to the game playability performed by the player. .. Then, each of the various data is stored in the work area of the predetermined address in the game RAM area.

Further, the non-standard RAM area is provided with a non-standard work area that is a work area for various processes that are not directly related to the playability of the game performed by the player, and a non-standard stack. In the present embodiment, various processes that are not directly related to the playability of the game performed by the player, such as a thumb check process, are executed using this non-standard RAM area.

As described above, in the pachi-slot machine 1 of the present embodiment, various programs and various data (tables) used for various processes not directly related to the playability of the game performed by the player are used for the game in the main ROM 102. It is stored in a non-standard ROM area (non-standard storage area) located at an address different from the ROM area. Further, various processes that are not directly related to the playability of the game performed by such a player are performed in the main RAM 103 using an out-of-specification RAM area arranged at an address different from the game RAM area. ..

In such a configuration of the main ROM 102, programs and data unnecessary for the game itself actually played by the player are arranged in the ROM area (non-standard ROM area) where the program or the like cannot be arranged according to the conventional rule. can do. Therefore, in the present embodiment, it is possible to avoid pressure on the capacity of the gaming ROM area.

<Transition flow of game state>
Next, various gaming states managed by the main control circuit 90 (main CPU 101) of the pachi-slot machine 1 of the present embodiment and their transition flows will be described with reference to FIGS. 13 and 14. Note that FIG. 13A is a transition flow diagram of the basic gaming state of the pachi-slot machine 1, and FIG. 13B is a table summarizing the transition conditions of the gaming state. Further, FIG. 14A is a transition flow diagram of a gaming state in consideration of whether or not the notification (ART) function is activated, and FIG. 14B is a table summarizing the transition conditions of the gaming state.

[Basic game state transition flow]
In the pachi-slot machine 1 of the present embodiment, a big bonus (hereinafter referred to as “BB”) is provided as a type of bonus game. The BB is a continuous accessory actuating device according to a regular bonus (hereinafter referred to as “RB”) called a type 1 special accessory, and continuously operates the RB.

Therefore, in the present embodiment, the main control circuit 90 manages the gaming state based on the presence or absence of winning / operating (winning) of the bonus combination. Specifically, as shown in FIG. 13A, the main control circuit 90 is based on the presence / absence of a winning / operating (winning) of a bonus combination (internal winning combination of the names "F_BB1" and "F_BB2" described later). It manages three types of gaming states called "bonus non-winning state", "between flags state", and "bonus state".

The bonus non-winning state is a state in which the bonus is not winning and the bonus is not activated (winning), and the bonus state is a state in which the bonus is activated. Further, in the present embodiment, when the bonus combination is determined as the internal winning combination, the bonus combination is carried over as the internal winning combination over a plurality of games until the bonus is won. The inter-flag state is a state in which the bonus combination is carried over as an internal winning combination, that is, a state in which the bonus combination is won and the bonus is not activated.

Whether or not the bonus combination is won is determined by the data stored in the hit request flag storage area (see FIGS. 28 to 30 described later) and the carry-over combination storage area (see FIG. 31 described later) provided in the main RAM 103. It is managed based on. Further, whether or not the bonus is activated (winning) is managed based on the data stored in the game state flag storage area (see FIG. 32 described later) provided in the main RAM 103.

Further, in the present embodiment, as shown in FIG. 13A, in the gaming state in which the bonus is not activated (bonus non-winning state and inter-flag state), the types of internal winning combinations related to the replay and the winning probabilities thereof are different from each other. Six types of states (hereinafter, referred to as "RT0 state" to "RT5 state") are provided from the RT0 gaming state to the RT5 gaming state. The RT0 state, RT2 state, and RT5 state are gaming states in which the probability that the replay combination is determined as the internal winning combination is low, and the RT1 state has a medium probability that the replay combination is determined as the internal winning combination. It is a game state with a medium probability. Further, the RT3 state and the RT4 state are gaming states in which the probability that the replay combination is determined as the internal winning combination is high. In the present embodiment, the RT state in the bonus non-winning state is any of the RT0 state to the RT4 state, and the RT state in the inter-flag state is the RT5 state.

Therefore, in the present embodiment, the main control circuit 90 is based on the type of the internal winning combination related to the replay and the winning probability thereof in the gaming state in which the bonus is not activated (bonus non-winning state and inter-flag state). It also manages six types of states, RT1 state to RT5 state.

The RT0 state to the RT5 state are managed based on the data stored in the game state flag storage area (see FIG. 32 described later) provided in the main RAM 103. Specifically, in the pachi-slot machine 1 of the present embodiment, flags indicating five RT states of the RT1 state flag to the RT5 state flag are provided, and the RT state is managed by managing the on / off states of these flags by the main RAM 103. Is managed. Then, the main control circuit 90 specifies the RT state corresponding to the RT state flag that is on as the current RT state. When all the RT state flags are off, the main control circuit 90 specifies that the current RT state is the RT0 state.

As shown in FIGS. 13A and 13B, when the bonus combination (internal winning combination of the names "F_BB1" and "F_BB2" described later) is determined as the internal winning combination in the bonus non-winning state (when the transition condition (1) is satisfied). ), The main control circuit 90 shifts the gaming state from the bonus non-winning state to the inter-flag state. Further, when the bonus combination is won in the inter-flag state (when the transition condition (2) is satisfied), the main control circuit 90 shifts the gaming state from the inter-flag state to the bonus state.

Further, when the number of medals exceeding the specified number (216) is paid out in the bonus state and the bonus state ends (when the transition condition (3) is satisfied), the main control circuit 90 changes the gaming state from the bonus state to the RT1 state (when the bonus state is satisfied). Move to the bonus non-winning state).

When 20 games have elapsed in the RT1 state (when the transition condition (4) is satisfied), the main control circuit 90 shifts the gaming state from the RT1 state to the RT0 state. Further, in the RT1 state, if the symbol combination related to the abbreviation "bell spilled eyes" (see FIG. 28 described later) is displayed on the valid line before 20 games have elapsed (when the transition condition (5) is satisfied). , The main control circuit 90 shifts the gaming state from the RT1 state to the RT2 state.

In the RT0 state, when the symbol combination related to the abbreviation "bell spilled eye" is displayed on the valid line (when the transition condition (5) is satisfied), the main control circuit 90 shifts the gaming state from the RT0 state to the RT2 state. Let me. In the RT2 state, when the symbol combination (see FIG. 28 described later) related to the abbreviation "RT3 transition lip" is displayed on the valid line (when the transition condition (6) is satisfied), the main control circuit 90 changes the gaming state. The RT2 state is changed to the RT3 state.

In the RT3 state, when the symbol combination (see FIG. 28 described later) related to the abbreviation "RT4 transition lip" is displayed on the valid line (when the transition condition (7) is satisfied), the main control circuit 90 changes the gaming state. The RT3 state is changed to the RT4 state. Further, in the RT3 state, when the symbol combination (see FIG. 28 described later) related to the abbreviation "bell spilled eye" or "RT2 transition lip" is displayed on the valid line (when the transition condition (8) is satisfied), the main The control circuit 90 shifts the gaming state from the RT3 state to the RT2 state. Further, in the RT4 state, when the symbol combination related to the abbreviation "bell spilled eye" or "RT2 transition lip" is displayed on the valid line (when the transition condition (8) is satisfied), the main control circuit 90 is in the gaming state. Shifts the gaming state from the RT4 state to the RT2 state.

As for the symbol combination related to the abbreviation "bell spilled eyes", the internal winning combination (small combination) related to the names "F_3 selection bell_1st", "F_3 selection bell_2nd" or "F_3 selection bell_3rd" described later is determined. Moreover, it is a combination of symbols displayed when the order of the stop operation is incorrect with respect to the push order determined for each type of the small winning combination (see FIG. 24 described later). As for the symbol combination related to the abbreviation "RT2 transition lip", the internal winning combination (replay combination) related to the names "F_maintenance lip_1st", "F_maintenance lip_2nd" or "F_maintenance lip_3rd" described later is determined, and It is a combination of symbols displayed when the order of the stop operation is incorrect with respect to the push order determined for each type of the replay combination.

As for the symbol combination related to the abbreviation "RT3 transition lip", the internal winning combination (replay role) related to the names "F_RT3 lip_1st", "F_RT3 lip_213", "F_RT3 lip_231" or "F_RT3 lip_3rd" described later is determined. Moreover, it is a combination of symbols displayed when the order of the stop operation is the correct answer for the push order determined for each type of the replay combination. Further, the symbol combination related to the abbreviation "RT4 transition lip" has an internal winning combination (replay role) related to the names "F_RT4 lip_123", "F_RT4 lip_132", "F_RT4 lip_2nd" or "F_RT4 lip_3rd" described later. It is a combination of symbols that are determined and displayed when the order of the stop operation is the correct answer for the push order determined for each type of the replay combination.

[Transition flow of game state considering whether or not the notification (ART) function is activated]
In the present embodiment, the main control circuit 90 (main CPU 101) determines whether or not the function (ART function) for notifying a stop operation advantageous to the player is activated. Therefore, in the present embodiment, the activated / non-activated state of the ART function is also managed as the gaming state in the bonus non-operating state.

In the pachi-slot machine 1 of the present embodiment, as shown in FIG. 14A, the main control circuit 90 separates the "general gaming state" and the "ART gaming state" based on the presence or absence of notification (ART) in the non-bonus operating state. It is managed as the game state of. That is, in the management of the gaming state in consideration of the presence / absence of notification (ART), as shown in FIG. 14A, the main control circuit 90 is classified into "bonus state", "general gaming state", and "ART gaming state". It manages three types of game states.

The general gaming state is basically a gaming state (non-ART) in which information on a stop operation advantageous to the player is not notified, and is a gaming state disadvantageous to the player. Further, the general gaming state is any of the RT0 to RT4 states, and is an ART non-winning gaming state.

On the other hand, the ART gaming state is a gaming state in which information on a stop operation advantageous to the player is notified, and is a gaming state advantageous to the player. Further, the ART gaming state is basically the RT4 state and the gaming state during the ART winning. In this embodiment, when the RT state shifts to the RT4 state after winning the ART, the ART game is started.

Further, in the present embodiment, as shown in FIG. 14A, two types of states called "normal gaming state" and "CZ (chance zone)" are provided as general gaming states.

The normal game state is the most disadvantageous game state for the player, but in the game in the normal game state, a lottery for transition to CZ is performed. Then, as shown in FIGS. 14A and 14B, in the game in the normal gaming state, when the lottery for transition to the CZ is won (when the transition condition (A) is satisfied), the main control circuit 90 changes the gaming state to the normal gaming state. To CZ.

The CZ is a gaming state (chance zone) in which the expectation for the transition to the ART gaming state is high, and the lottery for the transition to the ART is performed in the game during the CZ. Then, as shown in FIGS. 14A and 14B, in the game in CZ, when the lottery for transition to ART is not won (when the transition condition (B) is satisfied), the main control circuit 90 sets the game state. , CZ shifts to the normal gaming state. On the other hand, in the game in CZ, when the lottery for transition to ART is won (when the transition condition (C) is satisfied), the main control circuit 90 shifts the gaming state from the CZ to the ART gaming state. At this time, although not shown in FIG. 14A, the main control circuit 90 shifts the gaming state from the CZ to the ART gaming state (normal ART or CT described later) via the ART preparation state described later.

As described above, the ART gaming state is started when the RT state shifts to the RT4 state after winning the ART. As shown in FIG. 13A, since the RT4 state shifts from the RT0 to RT2 states via the RT3 state, the ART gaming state is not started immediately even after winning the ART. Therefore, in the pachi-slot machine 1 of the present embodiment, the gaming state during the period from the winning of the ART to the transition from the RT state to the RT4 state is set as the ART preparation state. Then, in this game in the ART preparation state, information on the stop operation necessary for shifting the RT state to the RT4 state is notified.

Further, in the present embodiment, as shown in FIG. 14A, two types of ART gaming states, called "normal ART" and "CT (additional chance)", in which the playability is different from each other, are provided.

Normally, ART is a stop operation that is advantageous to the player for a predetermined number of games (for example, a stop operation for displaying a symbol combination with a large number of medals to be paid out, or a stop operation necessary for maintaining the RT4 state). Is a gaming state to be notified. In addition, in a game during normal ART, a lottery for transition to CT is performed.

CT is a gaming state in which a player is notified of an advantageous stop operation and can add a normal ART duration for a specific period (a period of 8 games per set), and functions as an additional chance zone. It is a game state to play. Also, during CT, the game is usually played without digesting the duration of ART. The playability during CT will be described in detail later with reference to FIGS. 52A to 52C described later.

As shown in FIGS. 14A and 14B, in a game during normal ART, when the lottery for transition to CT is won (when the transition condition (D) is satisfied), the main control circuit 90 changes the game state from normal ART to CT. Transition the game state. Further, in the normal ART, when the continuation period of the normal ART ends (when the transition condition (E) is satisfied), the main control circuit 90 changes the gaming state from the normal ART to the general gaming state (normal gaming state or CZ). Migrate. In the present embodiment, the duration of normal ART is managed by the number of games, but the present invention is not limited to this, and the method of managing the duration of normal ART is arbitrary. For example, the duration of normal ART may be managed by the number of medals paid out during normal ART or the difference number, or by the number of notifications (number of navigations) that affect the payout of medals during normal ART. You may manage it.

As shown in FIGS. 14A and 14B, in the game during CT, when the duration of CT (1 set of 8 games) ends (when the transition condition (F) is satisfied), the main control circuit 90 displays the game state in the CT. To normal ART.

Further, as shown in FIG. 14A, when the bonus combination is won in the general gaming state (normal gaming state or CZ) or ART gaming state (normal ART or CT) (transition condition (2) described in FIGS. 13A and 13B). When is established), the main control circuit 90 shifts the gaming state from the general gaming state or the ART gaming state to the bonus state.

In the game in the bonus state, as described above, the lottery for transition to ART is performed, and in the game in the bonus state, if the lottery for transition to ART is non-winning (when the transition condition (G) is satisfied). , The main control circuit 90 shifts the gaming state from the bonus state to the general gaming state (normal gaming state or CZ). However, when the game has transitioned from the ART gaming state (normal ART or CT) to the bonus state, the main control circuit 90 changes the gaming state even if the game in the bonus state does not win the ART transition lottery. Shift from the bonus state to the ART gaming state (normal ART or CT). On the other hand, in the game in the bonus state, when the lottery for transition to ART is won (when the transition condition (H) is satisfied), the main control circuit 90 changes the gaming state from the bonus state to the ART gaming state (normal ART or CT). Migrate. As described above, at the end of the bonus state, the RT state shifts to the RT1 state. Therefore, when the gaming state shifts from the bonus state to the ART gaming state, the main control circuit 90 shifts the gaming state to the ART. It shifts to the ART game state via the preparation state.

<Structure of data table stored in main ROM>
Next, the configurations of various data tables stored in the main ROM 102 will be described with reference to FIGS. 15 to 27. The various data tables used in various lottery related to the game performance (CZ, normal ART, CT game performance) during the general game state and the ART game state will be described later together with the explanation of each game property. ..

[Design layout table]
First, the symbol arrangement table will be described with reference to FIG. The symbol arrangement table is data that specifies the position of each symbol in each rotation direction of the left reel 3L, the middle reel 3C, and the right reel 3R, and the type of the symbol arranged at each position (hereinafter, symbol code (in FIG. 15). Refer to the symbol code table of)) and specify the correspondence with).

In the symbol arrangement table, when the reel index is detected, the position of the symbol located in the middle region of each reel in the frame of the reel display window 4 is defined as "0". Then, in each reel, " "0" to "19" are assigned to each symbol as the symbol position.

That is, by referring to the value of the symbol counter ("0" to "19") and the symbol arrangement table, it is displayed in the upper region, the middle region, and the lower region of each reel in the frame of the reel display window 4. It is possible to specify the type of symbol. In this embodiment, as the symbols, "white 7", "blue 7", "chili top 1", "chili top 2", "chili bottom", "replay", "hat", "cactus 1", Ten kinds of symbols of "cactus 2" and "cactus 3" are used.

Further, in the present embodiment, as shown in the symbol code table, "00000001" is assigned as data to the symbol "white 7" (symbol code 1), and the symbol "blue 7" (symbol code 2) is assigned. "00000010" is assigned as data. The symbol "Chile on Chile 1" (symbol code 3) is assigned "00000011" as data, and the symbol "Chile on Chile 2" (symbol code 4) is assigned "00000100" as data.

"00000011" is assigned as data to the symbol "Chile bottom" (symbol code 5), and "00000011" is assigned as data to the symbol "replay" (symbol code 6). The symbol "hat" (symbol code 7) is assigned "000000111" as data, and the symbol "cactus 1" (symbol code 8) is assigned "00001000" as data. Further, "00000101" is assigned as data to the symbol "cactus 2" (symbol code 9), and "000001010" is assigned as data to the symbol "cactus 3" (symbol code 10).

[Internal lottery table]
Next, the internal lottery table referred to when determining the internal winning combination will be described with reference to FIGS. 16 and 17. Note that FIG. 16 is an internal lottery table referred to in each of the RT0 state to the RT4 state. Further, FIG. 17A is an internal lottery table referenced in the RT5 state, and FIG. 17B is an internal lottery table referenced in the bonus state.

The internal lottery table is provided for each game state, and defines the correspondence between various internal winning combinations and the lottery value when each internal winning combination is determined. The lottery value is defined for each setting (settings 1 to 6) for adjusting the expected value of the internal winning such as a preset bonus combination or small combination. This setting is changed, for example, by using the reset switch 76 and the setting key type switch 54 (see FIG. 7).

In the internal lottery process of the present embodiment, first, a random number value extracted from a predetermined numerical range (for example, 0 to 65535) by the random number register 0 of the random number circuit 110 is assigned to each internal winning combination. Add in sequence at the specified lottery value. Next, it is determined whether or not the lottery result (lottery value + random number value) exceeds 65535 (whether or not the lottery result overflows). Then, when the lottery result exceeds 65535 in the predetermined internal winning combination, it is determined that the internal winning combination has won. In the internal lottery process of the present embodiment, an example in which the lottery value is added to the extracted random number value to perform the lottery has been described, but the present invention is not limited to this, and the lottery value is subtracted from the random number value. It may be determined whether or not the subtraction result (lottery result) is less than "0" (whether or not the lottery result is underflowed), and the winning / non-winning of the internal lottery may be determined.

Therefore, in the internal lottery process of the present embodiment, the probability that the internal winning combination having a larger numerical value defined as the lottery value is determined is higher. The winning probability of each internal winning combination can be expressed by "the lottery value specified in each winning number / the number of all random number values that may be extracted (random number denominator: 65536)".

In the internal lottery table referred to in each of the RT0 state to the RT4 state, as shown in FIG. 16, basically, the type and the winning probability of the replay combination determined as the internal winning combination according to the type of the RT state. Changes. For example, the replay combination related to the names "F_chili lip (No. 25)" to "F_reach eye lip D (No. 31)" is not determined as an internal winning combination in the RT0 state to RT3 state, and is in the RT4 state. Only determined as an internal winning role. In the pachi-slot machine 1 of the present embodiment, the replay combination related to the names "F_chili lip (No. 25)" to "F_reach eye lip D (No. 31)" was determined as the internal winning combination during the RT4 state. In this case, specific control (flag conversion described later) is performed. This flag conversion will be described in detail later.

Further, as shown in FIG. 16, in the RT0 state to the RT3 state, the respective internal winning combinations of the names "F_reach eye lip A" to "F_reach eye lip D" are related to the names "F_BB1" or "F_BB2". Although it may be decided in duplicate with the bonus role (see Nos. 3 to 6 and 15 to 18), each internal winning role (replay) of the names "F_reach eye lip A" to "F_reach eye lip D" The role) is not determined as an internal winning role by itself. Therefore, in the present embodiment, when the replay combination related to the names "F_reach eye lip A" to "F_reach eye lip D" is determined as the internal winning combination during the RT0 state to the RT3 state (name from the player's point of view). When the symbol combination corresponding to the replay combination related to "F_reach eye lip A" to "F_reach eye lip D" is displayed), the bonus combination (name "F_BB1" or "F_BB2") is determined as the internal winning combination at the same time. It will be done.

Further, the RT5 state, which is a state between flags, is a gaming state in which the bonus combination is carried over as an internal winning combination as described above. Therefore, as shown in FIG. 17A, in the internal lottery table referred to in the RT5 state, the carried-over bonus combination is always determined as the internal winning combination. Further, as shown in FIG. 17B, in the internal lottery table referred to in the bonus state, the internal winning combination according to any of the names "F_RB combination 1" to "F_RB combination 4" is always won ( "Out of place" does not win).

[Correspondence table between internal winning combination and symbol combination (winning combination) (symbol combination determination table)]
Next, with reference to FIGS. 18 to 23, a correspondence table (symbol combination determination table) between the internal winning combination and the symbol combination will be described. The symbol combination determination table defines the correspondence between various internal winning combinations and the symbol combinations (combinations) that can be displayed on the effective line (center line) associated with each internal winning combination. That is, when the internal winning combination is determined, the type of symbol combination that can be displayed on the valid line (type of display combination that can be won) is uniquely determined.

The various data described in the symbol combination column in each symbol combination determination table is for identifying the symbol combination that is permitted to be displayed along the valid line set over the left reel 3L, the middle reel 3C, and the right reel 3R. It is data. The relationship between each name described in the symbol combination (display combination) column and the specific symbol combination is shown in the winning operation flag storage area of FIGS. 28 to 30 described later.

Further, the "○" mark described in the symbol combination determination table indicates a symbol combination (combination) that can be displayed on the effective line in the determined internal winning combination, that is, a display combination that can win a prize. For example, when the internal winning combination "F_chili lip" is determined, as shown in FIGS. 18 and 19, the combination names "C_maintenance lip A_01" to "C_maintenance lip G_01" and "C_chili lip A_01" to "C_chili lip" are determined. The symbol combination related to "D_01" can be stopped and displayed. It should be noted that the symbol combination determination table does not specify the case where the "internal winning combination" is "off", but this is all the symbols defined by the symbol combination tables shown in FIGS. 18 to 23. Indicates that the display of combinations is not allowed.

In the pachi-slot machine 1 of the present embodiment, the main control circuit 90 (main CPU 101) has different stop controls depending on the internal winning combination and the gaming state, and when a predetermined combination is determined as the internal winning combination, FIGS. The rotation stop control of the left reel 3L, the middle reel 3C, and the right reel 3R is performed so that the corresponding symbol combinations (combinations) shown in FIG. 23 can be displayed. In the correspondence table shown in FIGS. 18 to 23, all the symbol combinations that can be displayed for the determined internal winning combination are listed by "○", but the symbols marked with "○" are listed. Even if it is a combination, it may not be displayed.

In the present embodiment, there is a function to make the stop control (for example, the symbol to be preferentially pulled in) different according to the combination of symbols that can be stopped and displayed and the current game state, and "○" is given because of the symbol to be preferentially pulled in. Even the symbol combination marked may not be displayed. The correspondence between the types of internal winning combinations and the actually displayed symbol combinations will be described with reference to FIGS. 24 and 25 described later.

[Correspondence between the winning combination in the non-flag state and the symbol combination displayed as stopped]
Here, with reference to FIG. 24, the correspondence between the internal winning combination and the symbol combination displayed as stopped in the gaming state (non-flag state) excluding the flag state will be described. Note that FIG. 24 shows the correspondence between various internal winning combinations that can be determined in the non-flag state and the symbol combination (abbreviation) that is stopped and displayed when each internal winning combination is determined (some combinations are omitted). It is a figure. The name of the symbol combination described in FIG. 24 is the “abbreviation” described in the content column shown in the winning operation flag storage area of FIGS. 28 to 30 described later.

In the pachi-slot machine 1 of the present embodiment, a so-called "pushing order combination" is provided, in which the symbol combinations displayed are different according to the order (pushing order) of the player's stop operations. The symbol combination associated with the "correct answer in push order" shown in FIG. 24 is a symbol combination that is advantageous for the player among the symbol combinations displayed according to the push order, and is referred to as "incorrect answer in push order". The associated symbol combination is a symbol combination that is disadvantageous to the player among the symbol combinations displayed according to the pressing order. When notifying a stop operation that is advantageous to the player, the correct push order is notified, and if the stop operation is performed according to the notification, the symbol combination associated with the "push order correct answer" is displayed. Further, even in the ART gaming state, an incorrect push order may be notified, but the content thereof will be described in detail later.

In addition, in this embodiment, for a part of the push order combination, the push order that is the correct answer is shown at the end of the name. Specifically, the last "1st" in the name of the internal winning combination means that the correct push order is that the first stop operation (the first stop operation) is for the left reel 3L. The end "2nd" of the name of the internal winning combination means that the push order that is the correct answer is that the first stop operation is for the middle reel 3C, and the end "3rd" of the name of the internal winning combination is the correct answer. The push order means that the first stop operation is for the right reel 3R. In addition, the end "123" of the name of the internal winning combination means that the correct push order is "left, middle, right", and the end "132" of the name of the internal winning combination is the correct answer. Means that the push order is "left, right, middle", and the end "213" of the name of the internal winning combination means that the correct push order is "middle, left, right". The ending "231" of the name of the internal winning combination means that the correct push order is "left, right, middle".

Further, in the following, the stop operation order when the first stop operation is performed on the left reel 3L, specifically, the pressing order of "left, middle, right" and "left, right, middle" is ". Also called "forward push". Further, in the following, the stop operation order when the first stop operation is performed on the middle reel 3C or the right reel 3R, specifically, "middle, left, right", "middle, right, left",. The pressing order of "right, middle, left" and "right, left, middle" is also referred to as "irregular pressing".

In the present embodiment, as shown in FIG. 24, the internal winning combination “F_chililip” is a pressing order combination in which the symbol combinations displayed according to the pressing order are different, and when the pressing order is the correct answer, the abbreviation “ Any of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations related to "Chillilip" (see FIG. 28 described later) is displayed along the effective line. On the other hand, if the push order is not correct, one of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations related to the abbreviation "replay" (see FIG. 28 described later) is along the effective line. Is displayed. When the internal winning combination "F_chililip" is determined, as shown in FIGS. 18 to 23, the combination names "C_chililip A_01", "C_chililip B_01" or "C_chililip C_01" (abbreviation "single chililip") Or, "double chili lip": corresponding to the abbreviation "chili lip (no triple)" in FIG. 28 described later) can be displayed, but the combination names "C_chili lip D_01" to "C_1 certain chili lip D_01" (abbreviation). "Triple chili lip": Corresponding to the abbreviation "chili lip (triple)" in FIG. 28, which will be described later), the symbol combination cannot be displayed. That is, the internal winning combination "F_chililip" is a combination that cannot display the symbol combination related to the abbreviation "triple chili lip".

In addition, both the internal winning combinations "F_certain chili lip" and "F_1 certain chili lip" are push order combinations with different symbol combinations displayed according to the push order, and if the push order is correct, the abbreviation "chili lip" is used. Any of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations (see FIG. 28 described later) according to the above is displayed along the valid line. On the other hand, if the push order is not correct, one of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations related to the abbreviation "replay" (see FIG. 28 described later) is along the effective line. Is displayed. When the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is determined, the symbol combination related to the abbreviation "triple chili lip" can be displayed as shown in FIGS. 18 to 23. That is, the internal winning combinations "F_certain chili lip" and "F_1 certain chili lip" are roles that can display the symbol combination related to the abbreviation "triple chili lip".

In addition, the internal winning combinations "F_reach eye lip A" to "F_reach eye lip D" are push order combinations with different symbol combinations displayed according to the push order, and are abbreviated when the push order is correct. Any of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations (see FIGS. 28 and 29 described later) related to the "reach eye lip" is displayed along the effective line. On the other hand, if the push order is not correct, one of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations related to the abbreviation "replay" (see FIG. 28 described later) is along the effective line. Is displayed.

In this embodiment, the order of pressing the correct answers at the time of winning the internal winning roles "F_chili lip", "F_certain chili lip", "F_1 certain chili lip" and "F_reach eye lip A" to "F_reach eye lip D". Is to perform the first stop operation on the left reel 3L. Therefore, for example, in a game in which the internal winning combination "F_reach eye lip A" is determined, when the player performs the first stop operation on the left reel 3L, the abbreviation "reach eye lip" is used. The related symbol combination is stopped and displayed. The present invention is not limited to this, and the internal winning combination "F_chili lip", "F_certain chili lip", "F_1 certain chili lip" and "F_reach eye lip A" to "F_reach eye lip D" are used at the time of winning. The order of pressing the correct answers can be set arbitrarily.

In addition, both the internal winning combinations "F_maintenance rip A" and "F_maintenance rip B" are not the push order, and are the figures among the symbol combinations (see FIG. 28 described later) related to the abbreviation "replay" regardless of the push order. Any of the displayable symbol combinations shown in FIGS. 18 to 23 is displayed along the valid line.

In addition, the internal winning combinations "F_maintenance rip_1st" to "F_maintenance rip_3rd" are all push order combinations with different symbol combinations displayed according to the push order, and are abbreviated when the push order is correct. Any of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations related to "replay" (see FIG. 28 described later) is displayed along the valid line. On the other hand, if the push order is not correct, one of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations (see FIG. 28 described later) related to the abbreviation "RT2 transition lip" is an effective line. It is displayed along with.

In addition, the internal winning combinations "F_RT3 rip_1st" to "F_RT3 rip_3rd" are all push order combinations in which the symbol combinations displayed according to the push order are different, and when the push order is correct, the abbreviation "RT3" is used. The symbol combination related to "Transition Lip" (see FIG. 28 described later) is displayed along the valid line. On the other hand, if the push order is not correct, one of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations related to the abbreviation "replay" (see FIG. 28 described later) is along the effective line. Is displayed.

In addition, the internal winning combinations "F_RT4 rip_123" to "F_RT4 rip_3rd" are all push order combinations in which the symbol combinations displayed according to the push order are different, and when the push order is correct, the abbreviation "RT4" is used. The symbol combination related to "Transition Lip" (see FIG. 28 described later) is displayed along the valid line. On the other hand, if the push order is not correct, one of the displayable symbol combinations shown in FIGS. 18 to 23 among the symbol combinations related to the abbreviation "replay" (see FIG. 28 described later) is along the effective line. Is displayed.

In addition, the internal winning combinations "F_3 choice bell_1st" to "F_3 choice bell_3rd" are all push order combinations with different symbol combinations displayed according to the push order, and are abbreviated when the push order is correct. The symbol combination related to the "bell" (see FIG. 19 described later) is displayed along the valid line. On the other hand, if the push order is not correct, the symbol combination related to the abbreviation "bell spilled eyes" (see FIG. 28 described later) or the symbol combination related to the abbreviation "first sheet" (see FIG. 30 described later) is used. Is displayed.

Further, the internal winning combination "F_common bell" is not a pressing order combination, and can be displayed as shown in FIGS. 18 to 23 among the symbol combinations (see FIG. 29 described later) related to the abbreviation "bell" regardless of the pushing order. Any of the various symbol combinations is displayed along the valid line. Further, neither of the internal winning combinations "F_sabo 1" and "F_sabo 2" is a pushing order, and FIG. 18 of the symbol combination (see FIG. 30 described later) relating to the abbreviation "cactus" regardless of the pushing order. -One of the displayable symbol combinations shown in FIG. 23 is displayed along the valid line.

Further, the internal winning combination "weak cherry" is not a pressing order, and can be displayed as shown in FIGS. 18 to 23 among the symbol combinations (see FIG. 30 described later) related to the abbreviation "weak cherry" regardless of the pushing order. Any of the various symbol combinations is displayed along the valid line. In addition, the internal winning combinations "F_strong chili 1" and "F_strong chili 2" are not push order roles, and are among the symbol combinations related to the abbreviation "strong cherry" regardless of the push order (see FIG. 30 described later). Any of the displayable symbol combinations shown in FIGS. 18 to 23 is displayed along the valid line.

[Correspondence between the winning combination in the state between flags and the symbol combination displayed as stopped]
Next, with reference to FIG. 25, the correspondence between the internal winning combination and the symbol combination displayed as stopped in the inter-flag state will be described. It should be noted that FIG. 25 is a diagram showing the correspondence relationship between the internal winning combination and the symbol combination displayed as stopped in the inter-flag state (some combinations are omitted), and in particular, the bonus combination (in particular, during the inter-flag state). It is a figure which shows whether or not it is possible to display the symbol combination (combination name "C_BB1" or "C_BB2") which concerns on BB combination).

In the correspondence table of FIG. 25, the “○” mark in the “Bb establishment / non-establishment” column indicates that the symbol combination related to the BB combination can be displayed, and the “×” mark indicates the symbol combination related to the BB combination. Indicates that is not displayable. If the symbol combination related to the BB combination cannot be displayed, the symbol combination related to the combination determined to overlap with the bonus combination as the internal winning combination is displayed. For example, when the internal winning combination "F_BB1 + F_chililip" is won (when the internal winning combination "F_BB1" and the internal winning combination "F_chililip" are duplicated), as shown in FIG. 25, the internal winning combination "F_BB1" It is possible to stop and display the symbol combination according to the above, and the symbol combination related to the internal winning combination "F_chili lip" is stopped and displayed.

Further, when the symbol combination related to the BB combination cannot be displayed and the symbol combination related to the combination determined to overlap with the bonus combination is displayed in the inter-flag state, the push described with reference to FIG. 24 is performed. Only the symbol combination at the time of correct answer may be displayed, or only the symbol combination at the time of incorrect answer may be displayed.

For example, when the internal winning combination "F_BB1 + F_3 selection bell_1st" is won, as shown in FIG. 25, the symbol combination related to the internal winning combination "F_BB1" cannot be stopped and displayed, so that the internal winning combination "F_3 selection bell_1st" cannot be stopped and displayed. The symbol combination related to "" is stopped and displayed, but at this time, only the symbol combination related to the abbreviation "bell" displayed when the push order is correct can be displayed, and the abbreviation "bell spilled eye" displayed when the push order is incorrect is displayed. Alternatively, the symbol combination related to the "first sheet" may not be displayed (see FIG. 24). Further, for example, when the internal winning combination "F_BB1 + F_RT3 rip_1st" is won, only the symbol combination related to the abbreviation "replay" displayed when the push order is incorrect can be displayed, and the abbreviation "RT3" displayed when the push order is correct is displayed. The symbol combination related to "Transition Lip" may be disabled (see FIG. 24).

In the inter-flag state, as shown in FIG. 25, one of the bonus combination (BB combination) and the internal winning combination "off", "F_special 1", "F_special 2", and "F_special 3" is used. If the determination is duplicated, the symbol combination related to the BB combination can be stopped and displayed.

[Reel stop initial setting table]
Next, the reel stop initial setting table will be described with reference to FIG. 26. The reel stop initial setting table defines the correspondence between the internal winning combination and various data used in the reel stop control process described later.

The reel stop initial setting table shown in FIG. 26 defines the correspondence between the internal winning combination (small winning combination winning number) and the attraction priority table selection table number, attraction priority table number, and stop table number. In addition, FIG. 26 also shows the reference gaming state and the name of the internal winning combination.

The pull-in priority table selection table number and the pull-in priority table number are data used in the selection process of the pull-in priority table. For example, if the attraction priority table number corresponding to the stop table number is specified in the reel stop initial setting table, it corresponds to the attraction priority table number specified in the attraction priority table (see FIG. 27 described later). It is possible to acquire data regarding the priority of the display combination. On the other hand, if the pull-in priority table number corresponding to the stop table number is not specified in the reel stop initial setting table, refer to the pull-in priority table selection table (not shown) and set the pull-in priority table selection table number. The corresponding pull-in priority table number is determined.

Here, the reel stop control (method for determining the stop symbol position) in the pachi-slot machine 1 of the present embodiment will be briefly described. In the present embodiment, after the stop operation is detected by the stop switch, the reel stop control is performed so that the rotation of the corresponding reel stops within 190 msec. Specifically, any one of the number of sliding pieces "0" to "4" is added to the value of the symbol counter corresponding to the corresponding reel when the stop operation is detected, and the obtained value is supported. The symbol position to be used is determined as the symbol position at which the rotation of the reel is stopped (hereinafter referred to as "scheduled stop position"). The symbol position corresponding to the value of the symbol counter corresponding to the corresponding reel when the stop operation is detected is the symbol position where the rotation of the reel is started (hereinafter referred to as "stop start position"). ..

That is, the number of slip pieces is the amount of rotation of the reel from the detection of the stop operation by the stop switch to the stop of the rotation of the corresponding reel. In other words, it is the number of symbols that pass through the middle region of the corresponding reel of the reel display window 4 in the period from the detection of the stop operation by the stop switch to the stop of the rotation of the corresponding reel. This is grasped by the value of the symbol counter updated after the stop operation is detected by the stop switch.

With reference to a stop table (not shown), the number of sliding pieces is acquired according to the stop start position of each reel. In the present embodiment, the number of sliding pieces is acquired based on the stop table, but this is tentative, and the acquired number of sliding pieces does not immediately determine the scheduled stop position of the reel. In the present embodiment, if there is a more appropriate number of sliding pieces than the number of sliding pieces acquired based on the stop table (hereinafter referred to as “sliding piece number determination data”), the pull-in priority table (described later) described later will be described later. Refer to FIG. 27) to change the number of sliding pieces. Then, the slip piece number determination data is referred to for determining the search order when comparing the priorities of each symbol from the stop start position to the symbol position four ahead, which is the maximum number of slip pieces.

[Draw-in priority table]
Next, the pull-in priority table will be described with reference to FIG. 27. The attraction priority table is the attraction data (winning operation flag data) for each type of the winning operation flag storage area (see FIGS. 28 to 30 described later) in each of the attraction priority table numbers “00” to “05”. ) And its predetermined priority.

The pull-in priority table is used to search for the existence of a more appropriate number of slip pieces in addition to the number of slip pieces obtained based on the stop table (not shown). The priority order is data that defines the order in which the symbols are preferentially stopped and displayed (pulled in) among the types of symbol combinations (winning operation flags) related to winning. Further, in FIG. 27, for convenience of explanation, the combination name of the winning operation flag is described in the column of the attraction data (winning operation flag data), but in the actual attraction priority table, each attraction data is described later as a prize. As shown in the operation flag storage area (see FIGS. 28 to 30 described later), it is represented by 1-byte data, and a unique symbol combination (winning operation flag) is assigned to each bit in the 1-byte data. ..

In the reel stop control of the present embodiment, first, the number of sliding pieces is acquired based on the stop table (not shown). However, if there is a more appropriate number of sliding pieces in addition to the number of sliding pieces based on the priority order, the number is changed to the appropriate number of sliding pieces. That is, in the present embodiment, the more appropriate number of sliding pieces is determined based on the priority of the symbol combination that allows the stop display by the internal winning combination, regardless of the number of sliding pieces acquired by the stop table.

In the present embodiment, the stop display (pull-in) of the symbol combination having the higher priority is given priority over the stop display of the symbol combination having the lower priority.

Further, in the present embodiment, as shown in FIG. 27, not only the priority of the symbol combination (winning operation flag) is different according to the attraction priority table number, but also the number of priority divisions is different. Specifically, when the attraction priority table number is "00", the number of priority divisions is 5, and when the attraction priority table number is "01" or "04", the priority order is set. Let the number of divisions be 4. Further, when the attraction priority table number is "02" or "03", the number of priority divisions is 2, and when the attraction priority table number is "05", the number of priority divisions is set. Is set to 3.

Here, the priority when the pull-in priority table number is "00" will be described, and the description of the priority in the other pull-in priority table numbers will be omitted. When the pull-in priority table number is "00", the priority "1" (highest priority) includes the combination names "C_9 sheets A_01", "C_1 certain chili lip C_01", "C_1 certain chili lip D_01" and The pull-in data corresponding to "C_RT3 lip_01" is specified.

When the pull-in priority table number is "00", the priority "2" includes the combination names "C_strong 2 sheets C_01" to "C_strong 2 sheets C_09" and "C_weak 2 sheets B_01" to "C_weak". Corresponds to "2 sheets B_03", "C_3 sheets E_01", "C_3 sheets E_02", "C_9 sheets F_01" to "C_9 sheets F_03", "C_1 certain chili lip B_01", "C_chili lip D_01" and "C_chili lip C_01". The pull-in data is specified.

When the pull-in priority table number is "00", the priority "3" includes the combination names "C_1 sure chili lip A_01", "C_chili lip A_01", "C_chili lip B_01" and "C_maintenance lip E_01" to "C_maintenance lip E_01". The pull-in data corresponding to "C_maintenance lip E_04" is specified.

When the pull-in priority table number is "00", the priority "4" includes the combination names "C_SP1_01", "C_SP2_01", "C_reach eye lip P_01", "C_reach eye lip P_02", and "C_reach". Eye Lip O_01 "," C_Reach Eye Lip O_02 "," C_Reach Eye Lip N_01 "," C_Reach Eye Lip N_02 "," C_Reach Eye Lip M_01 "," C_Reach Eye Lip M_02 "," C_Reach Eye Lip M_02 " L_01 "to" C_reach eye lip L_03 "," C_reach eye lip K_01 "to" C_reach eye lip K_03 "," C_reach eye lip J_01 "," C_reach eye lip I_01 "to" C_reach eye lip I_09 " , "C_reach eye lip H_01" to "C_reach eye lip H_03", "C_reach eye lip G_01", "C_reach eye lip F_01", "C_reach eye lip F_02", "C_reach eye lip E_01", " C_reach eye lip D_01 "," C_reach eye lip D_02 "," C_reach eye lip C_01 "to" C_reach eye lip C_03 "," C_reach eye lip B_01 "," C_reach eye lip B_02 "," C_reach Eye Lip A_01 "," C_Maintenance Lip F_01 "," C_Maintenance Lip F_02 "," C_Maintenance Lip D_01 "to" C_Maintenance Lip D_04 "," C_Maintenance Lip C_01 "to" C_Maintenance Lip C_03 "," C_Maintenance Lip The pull-in data corresponding to "Rip B_01", "C_Maintenance Lip B_02" and "C_Maintenance Lip A_01" is specified.

Further, in the priority order "5" (lowest priority) when the attraction priority table number is "00", the attraction data corresponding to the combination names "C_BB1" and "C_BB2" are defined.

<Structure of storage area provided in main RAM>
Next, the configurations of various storage areas provided in the main RAM 103 will be described with reference to FIGS. 28 to 35.

[Hit request flag storage area and winning operation flag storage area]
First, with reference to FIGS. 28 to 30, the configuration of the winning request flag storage area (internal winning combination storage area) and the winning operation flag storage area (display combination storage area) will be described. In the present embodiment, the hit request flag storage area (flag data storage area, winning flag data storage area) and the winning operation flag storage area (winning flag data storage area) have the same configuration.

In the present embodiment, the hit request flag storage area is composed of hit request storage areas 0 to 11 represented by 1 byte of data, and the winning operation flag storage area is represented by 1 byte of data. It is composed of storage areas 0 to 11. The data stored in each storage area of the hit request flag storage area and the winning operation flag storage area is only the 1-byte data in the "data" column in FIGS. 28 to 30, but in FIGS. 28 to 30. , For convenience of explanation, the symbol combination of each reel associated with the bit of each storage area (in the figure, the symbol of the left reel 3L, the symbol of the middle reel 3C, and the symbol of the right reel 3R are described in this order). The name (combination name) and abbreviation, as well as the number of medals to be paid out are also described.

When "1" is stored in a predetermined bit in each of the hit request flag storage areas 0 to 11, it indicates that the internal winning combination corresponding to the predetermined bit has won the internal winning. Further, when "1" is stored in a predetermined bit in each of the winning operation storage areas 0 to 11, it indicates that the display combination (winning operation flag) corresponding to the predetermined bit has won a prize. That is, when "1" is stored in a predetermined bit, it indicates that various symbol combinations of internal winning combinations corresponding to the predetermined bit are displayed on the valid line.

Further, in the hit request flag storage area and the winning operation flag storage area, as shown in FIGS. 28 to 30, a plurality of symbol combinations (combinations) are assigned to one bit (flag) in each storage area. Some are. That is, for such a flag, it means that there are a plurality of symbol combinations (combinations that can be won) that can be stopped and displayed.

For example, the symbol combination "cactus 2"-"white 7"-"hat" (combination name "C_maintenance lip C_01") and the symbol combination "cactus 2" are stored in the bit 5 of the hit request storage area 5 and the winning operation storage area 5. -"Chile Top 1"-"Hat" (combination name "C_maintenance lip C_02") and design combination "cactus 2"-"cactus 2"-"hat" (combination name "C_maintenance lip C_03") Three symbol combinations are assigned. Therefore, when "1" is stored in bit 5 of the hit request storage area 5, it indicates that the combination of these three symbols can be stopped and displayed on the valid line. Further, when "1" is stored in the bit 5 of the winning operation storage area 5, it indicates that any one of these three symbol combinations is displayed on the valid line.

[Carryover storage area]
Next, the configuration of the carry-over combination storage area will be described with reference to FIG. 31. In the present embodiment, the carry-over combination storage area is composed of a 1-byte data storage area.

When the internal winning combination "F_BB1" or "F_BB2" is determined as a result of the internal lottery, the internal winning combination (BB combination) is stored in the carry-over combination storage area as a carry-over combination. The carry-over combination stored in the carry-over combination storage area is retained without being cleared until the corresponding symbol combination is displayed on the valid line. Further, while the carry-over combination is stored in the carry-over combination storage area, the carry-over combination is stored in the hit request storage area in addition to the internal winning combination determined by the internal lottery.

[Game status flag storage area]
Next, the configuration of the game state flag storage area will be described with reference to FIG. 32. The game state flag storage area is composed of a 1-byte data storage area. In the present embodiment, as shown in FIG. 32, a unique bonus type or RT type is assigned to each bit in the game state flag storage area.

When "1" is stored in a predetermined bit in the game state flag storage area, it indicates that the bonus game or RT corresponding to the predetermined bit is being operated. For example, when "1" is stored in bit 0 of the game state flag storage area, the big bonus "BB" is operated, indicating that the game state is the BB game state. Further, for example, when "1" is stored in bit 3 of the game state flag storage area, it indicates that the game state is the RT3 state.

[Activity stop button storage area]
Next, the configuration of the operation stop button storage area will be described with reference to FIG. 33. The operation stop button storage area is composed of a 1-byte data storage area, and stores an operation stop button flag consisting of 1 byte. In the operation stop button flag, the operation state of the stop button is assigned to each bit.

For example, when the left stop button 17L is the stop button pressed this time, that is, the operation stop button, "1" is stored in bit 0 of the operation stop button storage area. Further, for example, when the left stop button 17L is a stop button that has not yet been pressed, that is, an effective stop button, "1" is stored in bit 4. The main CPU 101 distinguishes between the stop button pressed this time and the stop button that has not yet been pressed, based on the data stored in the operation stop button storage area.

[Press order storage area]
Next, the configuration of the pressing order storage area will be described with reference to FIG. 34. The press order storage area is composed of a 1-byte data storage area, and stores a press order flag consisting of 1 byte.

In the pressing order flag, each bit is assigned the type of pressing order of the stop button. For example, when the pressing order of the stop buttons is "left, middle, right", "1" is stored in bit 0 of the pressing order storage area.

[Design code storage area]
Next, the configuration of the symbol code storage area will be described with reference to FIG. 35. In the present embodiment, the symbol code storage area is composed of symbol code storage areas 0 to 11 represented by 1-byte data, respectively. The symbol code storage area has the same configuration as the winning request flag storage area and the winning operation flag storage area (see FIGS. 28 to 30).

In the symbol code storage area, "1" is stored in the bit corresponding to the symbol combination (combination) that can be stopped on the valid line. After all the reels are stopped, the symbol code corresponding to the display combination (winning operation flag) is stored in the symbol code storage areas 0 to 11.

[Relationship between internal winning combination and various sub-flags]
In the general game state and the ART game state, various data tables are referred to in various lottery by the main control circuit 90, but as a parameter used at this time, in this embodiment, not only the internal winning combination but also the internal winning combination is supported. Various parameters having different names (hereinafter referred to as "sub-flag (first sub-flag)", "sub-flag EX (second sub-flag)", and "sub-flag D") are also used. Therefore, in the present embodiment, the main control circuit 90 performs a process of converting the internal winning combination into various sub-flags (see the sub-flag conversion process, the flag conversion process, and the sub-flag compression process in FIG. 104 described later). In this embodiment, a sub flag is set in the start command as information (communication parameter) regarding the internal winning combination, and is transmitted from the main control circuit 90 to the sub control circuit 200.

Here, with reference to FIGS. 36 and 37, the correspondence between the internal winning combination and various sub-flags will be described. FIG. 36 is a diagram showing the correspondence relationship between the internal winning combination (small winning combination winning number) and various sub-flags, and FIG. 37 is a diagram showing the correspondence relationship between the internal winning combination (special prize winning number) and the sub-flags.

In the flag conversion process of the present embodiment, first, a plurality of internal winning combinations belonging to the same type are combined into one sub-flag. In the present embodiment, as shown in FIG. 36, by this flag conversion process, 32 types of internal winning combinations (small winning combination winning numbers) related to small winning combinations and replay winning combinations are converted into 18 types of sub-flags (“01” to “18”. : Flag data) is converted. For example, the internal winning combination "F_maintenance rip_1st (10: small winning combination number)" to "F_maintenance rip_3rd (12)" are grouped into the sub-flag "pushing order rip 1 (09: flag data)". The sub-flag "Loss (00)" is assigned to the internal winning combination "missing".

Further, in the flag conversion process of the present embodiment, as shown in FIG. 36, 19 types of sub-flags ("00" to "18") including the sub-flag "loss (00)" are replaced with 9 types of sub-flag EX ("00"). "-" 08 ": flag data). Therefore, in this conversion process, the sub-flag data can be further compressed. At this time, in the present embodiment, the sub flag is converted into the sub flag EX by lottery (flag conversion lottery). Specifically, it is converted as follows.

The sub-flag "missing (00)" is converted to the sub-flag EX "missing (00)" regardless of the result of the flag conversion lottery, and the sub-flag "double chili lip (01)" is converted to the sub-flag "double chili lip (01)" regardless of the result of the flag conversion lottery. It is converted to the sub flag EX "replay (01)".

When the sub-flag "triple chili lip A (02)" and the sub-flag "triple chili lip B (03)" are won in the flag conversion lottery (in the case of "with conversion" described later), the sub-flag EX "fixed combination (06)" Alternatively, it is converted to "triple chili lip (07)", and if the flag conversion lottery is not won (in the case of "no conversion" described later), it is converted to the sub-flag EX "replay (01)".

The sub-flags "reach-eye rip 1 (04)" to "reach-eye rip 4 (07)" are converted to the sub-flag EX "fixed combination (06)" or "reach-eye rip (08)" when the flag conversion lottery is won. If the flag conversion lottery is not won, it is converted to the sub-flag EX "replay (01)".

The sub-flags "replay (08)" and "push order rip 1 (09)" to "push order rip 3 (11)" are converted to the sub-flag EX "replay (01)" regardless of the result of the flag conversion lottery. The sub-flags "push order bell (12)" and "common bell (13)" are converted to the sub-flag EX "bell (02)" regardless of the result of the flag conversion lottery.

The sub-flags "cactus (14)", "weak cherry (15)" and "strong cherry (16)" are the sub-flags EX "cactus (03)" and "weak cherry (04)" regardless of the result of the flag conversion lottery, respectively. "And" strong cherry (05) ". Further, the sub-flags "reach 1 (17)" and "reach 2 (18)" are converted into the sub-flag EX "miss (00)" regardless of the result of the flag conversion lottery.

As described above, in the present embodiment, the sub-flags "triple chili lip A (02)", "triple chili lip B (03)" and "reach eye lip 1 (04)" to "reach eye lip 4 (07)" are substantially present. ) ”Is the target of the flag conversion lottery. The lottery table used for the above-mentioned flag conversion lottery will be described in detail later.

Further, in the flag conversion process of the present embodiment, as shown in FIG. 36, nine types of sub-flags EX (“00” to “08”) are converted into seven types of sub-flags D (“00” to “06”). To. Therefore, in this conversion process, the sub-flag data can be further compressed. In this conversion process, the lottery is not performed, and the sub-flag EX and the sub-flag D are associated with each other for conversion as follows.

The sub-flag EX "loss (00)", "replay (01)" and "bell (02)" are converted into the sub-flag D "loss (00)". The sub-flag EX "cactus (03)" is converted to the sub-flag D "cactus (01)", the sub-flag EX "weak cherry (04)" is converted to the sub-flag D "weak cherry (02)", and the sub-flag EX "strong". "Cherry (05)" is converted into subflag D "strong cherry (03)".

Further, the sub flag EX "fixed combination (06)" is converted to the sub flag D "fixed combination (04)", and the sub flag EX "triple chili lip (07)" is converted to the sub flag D "triple chili lip (05)". Then, the sub-flag EX "reach-eye lip (08)" is converted into the sub-flag D "reach-eye lip (06)".

Further, in the flag conversion process of the present embodiment, as shown in FIG. 37, both the internal winning combination "F_BB1 (01: special prize winning number)" and "F_BB2 (02)" are converted into the sub-flag "BB". ..

[Gameability at the time of sub-flag EX conversion]
Here, a process of converting the above-mentioned internal winning combination into a sub-flag and a sub-flag EX, and an example of playability at the time of sub-flag EX conversion will be described with reference to FIGS. 38A and 38B. FIG. 38A is a diagram showing a flag conversion process when the internal winning combination “F_certain chili lip” or “F_1 certain chili lip” is determined, and FIG. 38B is a diagram showing the internal winning combination “F_reach eye lip A” to “F_”. It is a figure which shows the flag conversion process when any of "reach eyes lip D" is determined.

In the pachi-slot machine 1 of the present embodiment, any one of the internal winning roles "F_certain chili lip", "F_1 certain chili lip" and "F_reach eye lip A" to "F_reach eye lip D" is independent during the RT4 game state. If it is determined as an internal winning combination, a flag conversion lottery will be performed. Then, in the present embodiment, when the flag conversion lottery is won, a special privilege (for example, addition of the number of ART games or CT winning) is given.

For example, when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is determined, as shown in FIG. 38A, the internal winning combination "F_certain chili lip" and "F_1 certain chili lip" are each sub-flag "3 consecutive". It is converted into "chili lip A (02)" and "triple chili lip B (03)".

Next, when the sub-flags "triple chili lip A (02)" and "triple chili lip B (03)" are won in the flag conversion lottery, they become the sub-flag EX "triple chili lip (07)" or "fixed combination (06)". Will be converted. On the other hand, if the flag conversion lottery is not won, both the sub-flags "triple chili lip A (02)" and "triple chili lip B (03)" are converted to the sub-flag EX "replay (01)". ..

As described in FIG. 24, when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is won, the symbol combination related to the abbreviation "triple chili lip" is displayed at the time of the correct answer in the push order, and the push order is irregular. When the answer is correct, the symbol combination related to the abbreviation "replay" is displayed. Therefore, in the present embodiment, when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is determined and the flag conversion lottery is won, the internal winning combination "F_certain chili lip" and "F_1 certain chili lip" are determined. Are all treated as the combination of the sub-flag EX "triple chili lip (07)" or "determined combination (06)".

Then, when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is converted into the sub-flag EX "triple chili lip (07)" or "fixed combination (06)" by this flag conversion process, the abbreviation "triple chili lip" is abbreviated. Information for displaying the symbol combination related to "Chilli Lip" is notified (for example, information to the player to aim at the chili symbol by pushing forward is notified). On the other hand, in this flag conversion process, when the flag conversion lottery becomes non-winning and the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is converted to the sub-flag EX "replay (01)", it becomes an abbreviation "replay". Information for displaying the symbol combination is notified (for example, a push order other than forward push (irregular push) is notified).

Further, for example, when any one of the internal winning combination "F_reach eye lip A" to "F_reach eye lip D" is determined, as shown in FIG. 38B, the internal winning combination "F_reach eye lip A" to " "F_reach eye lip D" is converted into subflags "reach eye lip 1 (04)" to "reach eye lip 4 (07)", respectively.

Next, the sub-flags "reach-eye rip 1 (04)" to "reach-eye rip 4 (07)" become the sub-flag EX "reach-eye rip (08)" or "determined role (06)" when the flag conversion lottery is won. Will be converted. On the other hand, when the flag conversion lottery is not won, the sub-flags "reach-eye lip 1 (04)" to "reach-eye lip 4 (07)" are converted into the sub-flag EX "replay (01)".

As described in FIG. 24, when any of the internal winning combinations "F_reach-eye lip A" to "F_reach-eye lip D" is won, the symbol combination related to the abbreviation "reach-eye lip" is used when the push order is correct. Is displayed, and when the push order is incorrect, the symbol combination related to the abbreviation "replay" is displayed. Therefore, in the present embodiment, when any one of the internal winning combination "F_reach eye lip A" to "F_reach eye lip D" is determined and the flag conversion lottery is won, the internal winning combination "F_reach eye" is determined. All of "Rip A" to "F_Reach-eye Lip D" are treated as the roles of the sub-flag EX "Reach-eye Lip (08)" or "Definite role (06)".

Then, when the internal winning combination "F_reach eye lip A" to "F_reach eye lip D" is converted into, for example, the sub-flag EX "reach eye lip (08)" or "determined combination (06)" by this flag conversion process. , Information for displaying the symbol combination related to the abbreviation "reach eye lip" is notified (for example, information to the player to aim at the symbol "white 7" by pushing forward is notified). On the other hand, in this flag conversion process, when the flag conversion lottery becomes non-winning and the internal winning combinations "F_reach eye lip A" to "F_reach eye lip D" are converted into the sub-flag EX "replay (01)", it is abbreviated. Information for displaying the symbol combination related to "replay" is notified (for example, a pressing order other than forward pressing (irregular pressing) is notified).

Further, in the present embodiment, in the flag conversion process shown in FIG. 38A or 38B, when the player wins the flag conversion lottery and performs the stop operation according to the notification, it relates to the abbreviation "triple chili lip" or "reach eye lip". The symbol combination is stopped and displayed on the valid line, and a special privilege is given. In this granting process, a special privilege is given to the player according to the fact that the pachislot 1 wins the flag conversion lottery, but the abbreviation "3" is given to the player. By displaying the symbol combination related to "Ren Chiri Lip", it is possible to feel that a special privilege has been given.

In order to enhance the playability of pachislot, it may be preferable that the frequency of appearance of the symbol combinations to which the privilege is given is different depending on the state. Since the stop control (displayed symbol combination) differs depending on the type of internal winning combination, as a method of making the appearance frequency of the symbol combination to which the privilege is given different depending on the state, the winning probability of the internal winning combination is made different. A method is also conceivable (in Pachislot 1, the winning probability of the internal winning combination can be different depending on whether or not the bonus is activated and the RT state. Therefore, for example, only the RT4 state is used as the RT state corresponding to the ART gaming state. Instead, a method of providing other RT states such as RT6 state and RT7 state is also conceivable). However, since the opportunity to make the winning probability of the internal winning combination different (the opportunity to shift to the RT state) is limited, this method lacks flexibility from the viewpoint of improving playability (interestingness).

On the other hand, in the pachi-slot machine 1 of the present embodiment, in addition to the internal lottery for determining the internal winning combination, the flag conversion lottery and the notification based on the lottery result are performed without changing the winning probability of the internal winning combination. , The appearance frequency of the symbol combination to which the privilege is given can be flexibly changed according to the state. That is, in a state where it is easy to win the flag conversion lottery, the appearance frequency of the symbol combination to which the privilege is given can be increased, and conversely, when it is difficult to win the flag conversion lottery, the appearance of the symbol combination to which the privilege is given appears. The frequency can be reduced.

<Gameability during general game state>
Next, the flow of the game during the general game state will be described with reference to FIGS. 39A to 39C. In the pachi-slot machine 1 of the present embodiment, the gaming state shifts from the normal gaming state to the CZ during the general gaming state, and then the gaming state shifts from the CZ to the ART gaming state, whereby the general gaming state (non-ART gaming state) ) To the ART gaming state (see FIGS. 14A and 14B).

FIG. 39A is a diagram showing a flow of a game when the game state shifts from the normal game state to the CZ during the general game state. As shown in FIG. 39A, the normal gaming state has a low probability state and a high probability state as a lottery state of CZ. The low-probability state and the high-probability state are states in which the expectations for winning the CZ lottery performed during the normal gaming state are different from each other, the low-probability state is the state in which it is difficult to win the CZ lottery, and the high-probability state is the CZ. It is in a state where it is easy to win a lottery. Then, when the CZ lottery performed in the game during the normal game state is won, the game state shifts from the normal game state to the CZ.

In the pachi-slot machine 1 of the present embodiment, a plurality of chance zones of "CZ1", "CZ2" and "CZ3" are provided as CZs (chance zones). CZ1 to CZ3 are chance zones in which the expectation of winning an ART lottery performed in a game during CZ is different from each other, CZ3 is a chance zone in which an ART lottery is always won, and CZ1 and CZ2 have a predetermined probability. This is a chance zone to win the ART lottery. In the CZ lottery performed in the game during the normal game state, not only the winning / non-winning of the CZ but also the type of CZ (any of CZ1 to CZ3) to be transferred at the time of winning is determined (see FIG. 41 described later).

FIG. 39B is a diagram showing the flow of the game when the gaming state shifts from the general gaming state CZ1 and CZ2 to the ART gaming state. Both CZ1 and CZ2 are composed of a first half portion and a second half portion. The first half is a period for promoting the rank of the expectation to win the ART lottery performed in the game during the CZ, and the second half is a predetermined production of the lottery result of the ART lottery based on the rank (in this embodiment, the character). It is a period to be notified by (battle production by).

In CZ1, six modes (modes 1 to 6) are prepared as ranks, and the higher the mode, the higher the expectation of winning the ART lottery. In the first half of CZ1, the game is continuously played for the period of the first predetermined number of games (for example, 12 games at the maximum), and the mode promotion lottery is performed based on the internal winning combination. Then, in the first game of the latter half of the CZ1, the ART lottery is performed based on the mode promoted in the first half (the mode at the end of the first half).

Also, in CZ2, 10 levels of points are prepared as ranks, and the higher the points, the higher the expectation of winning the ART lottery. In the first half of CZ2, games are continuously played for a period of a second predetermined number of games (for example, a maximum of 15 games), and points are promoted by lottery based on the internal winning combination. Then, in the first game of the second half of CZ2, the ART lottery is performed based on the points promoted in the first half (points at the end of the first half).

In the latter half of CZ1, a battle effect in which the ally character and the enemy character A play against each other is performed, and in the latter half of CZ2, a battle effect in which the ally character and the enemy character B play against each other is performed. This battle effect is performed over a period of a third predetermined number of games (for example, a maximum of 4 games). In addition, the victory or defeat of the battle production is managed (determined) based on the result of the ART lottery, and if the ART lottery is won, the ally character wins in the battle production, and if it is not the winning, the battle The enemy character wins in the production.

Further, in the latter half of each of CZ1 and CZ2 (during the battle production), an ART lottery is performed based on the internal winning combination in each game. Then, when the ART lottery is won, the result of the battle effect is rewritten. For example, if a so-called "rare" role is determined as an internal winning role during a battle production, an ART lottery is performed, and the result of the battle production is rewritten based on the result.

In CZ1 and CZ2, if the ART is not won, the player is defeated in the battle effect in the latter half, and basically, the gaming state shifts to the normal gaming state after that. On the other hand, in CZ1 and CZ2, when the ART is won, the battle effect in the latter half is won, and then the gaming state shifts from the CZ to the normal ART via the ART preparation state. In addition, in this embodiment, a freeze may occur in the game of the first half of CZ1 and CZ2, and in that case, the game state is CT (additional addition) instead of normal ART via the CZ to the ART preparation state. Move to the chance zone).

FIG. 39C is a diagram showing the flow of the game when the game state shifts from the general game state CZ3 to the ART game state. The CZ3 is continuously played for a period of a fourth predetermined number of games (for example, 17 games at the maximum). Then, in CZ3, ART lottery is performed every game based on the internal winning combination.

The CZ3 ends when the ART lottery is won, and after the next game, the game state shifts from the CZ3 to the CT (additional chance zone) via the ART preparation state. Further, in CZ3, a freeze may occur, and even in that case, the game state shifts from CZ3 to CT (additional chance zone) via the ART preparation state after the next game. On the other hand, in CZ3, when the game period (fourth predetermined number of games) of CZ3 elapses without winning the ART lottery, the game state shifts from CZ3 to normal ART via the ART preparation state. That is, in the present embodiment, the CZ3 is a chance zone in which the transition to the ART gaming state is confirmed.

<Various data tables used during general gaming conditions>
Subsequently, with reference to FIGS. 40 to 45, various data tables used in the lottery process relating to the playability performed during the general game state will be described. The various data tables described below are stored in the main ROM 102.

Further, in the various data tables shown below, the lottery value information is conceptually shown. "0" in the data table means that the lottery value corresponding to the winning probability "0%" is specified, and "extremely low" means the lottery corresponding to the winning probability "0% to less than 1%". It means that the value is specified, and "extremely low" means that the lottery value corresponding to the winning probability "1% to less than 10%" is specified. Further, "low" in the data table means that a lottery value corresponding to a winning probability "10% to less than 30%" is specified, and "medium" means a winning probability "30% to less than 60%". It means that the lottery value corresponding to "" is specified, and "high" means that the lottery value corresponding to the winning probability "60% to less than 80%" is specified. Further, "extremely high" in the data table means that a lottery value corresponding to a winning probability of "80% to less than 99%" is specified, and "extremely high" means a winning probability of "99% to 100%". It means that the lottery value corresponding to "less than%" is specified, and "confirmed" means that the lottery value corresponding to the winning probability "100%" is specified.

Then, in the various data tables shown below, the random number value for lottery extracted from the predetermined numerical value range (0 to 65535) is sequentially subtracted by the specified lottery value by the random number register 1 of the random number circuit 110. , Internal lottery is performed by determining whether or not the result of subtraction is negative (whether or not so-called "digits" have occurred). In the present embodiment, an example in which the winning / non-winning is determined by subtracting the lottery value from the lottery random value in the lottery process related to the gameability performed during the general game state has been described, but the present invention is limited to this. Instead, the lottery value is added to the extracted random number value for lottery, and it is determined whether or not the addition result exceeds 65536 (whether or not a so-called "digit overflow" has occurred), and the winning / non-winning is determined. May be good.

[Normal medium and high probability lottery table]
First, with reference to FIGS. 40A and 40B, a normal medium-high probability lottery table used in the transition lottery of the lottery state (low probability and high probability) of CZ will be described. In the pachi-slot machine 1 of the present embodiment, not only the transition lottery of the lottery state of the CZ is performed based on the internal winning combination in each game, but also at the end of the bonus, the end of the CZ, the end of the ART, etc. Transition of lottery state A lottery is performed. FIG. 40A is a configuration diagram of a normal medium-high probability lottery table that is referred to every game during a normal game state, and FIG. 40B is a normal medium-high probability reference at the time of setting change, bonus end, CZ, ART end, or the like. It is a block diagram of a probability lottery table. The name of the internal winning combination shown in FIG. 40A corresponds to the name of the sub-flag described above.

The normal medium-high probability lottery table shown in FIG. 40A is used for each combination of the current CZ lottery state and the internal winning combination, the lottery result (low probability / high probability) of the CZ lottery state after the transition, and each lottery result. It defines the correspondence with the associated lottery value information.

As is clear from the normal medium-high probability lottery table shown in FIG. 40A, when the current lottery state of CZ is low probability, when the internal winning combination corresponds to the sub-flag "weak cherry", the CZ The lottery state is likely to shift to a high probability. On the other hand, when the current lottery state of CZ has a high probability, when the internal winning combination corresponds to any of the subflags "common bell", "cactus", "weak cherry" and "strong cherry". In addition, the lottery state of CZ is maintained with high probability.

In the normal medium-high probability lottery table shown in FIG. 40B, each situation when referring to the table, the lottery result (low probability / high probability) of the lottery state of CZ after the transition, and the lottery associated with each lottery result. Specify the correspondence with the value information. As is clear from the normal medium-high probability lottery table shown in FIG. 40B, the lottery state of CZ always shifts to high probability at the end of the bonus.

[CZ lottery table]
Next, the CZ lottery table used in the CZ lottery will be described with reference to FIGS. 41A and 41B. FIG. 41A is a block diagram of a CZ lottery table used when performing a CZ lottery based on an internal winning combination during a normal game state, and FIG. 41B shows a CZ pullback at the time of CZ failure or the end of ART, for example. It is a block diagram of the CZ lottery table used when performing the CZ lottery whether or not to perform. The name of the internal winning combination shown in FIG. 41A corresponds to the name of the sub-flag described above.

In the CZ lottery table shown in FIG. 41A, each combination of the current CZ lottery state and the internal winning combination, the winning / non-winning (lottery result) of CZ1, CZ2, and CZ3, and the lottery associated with each lottery result. Specify the correspondence with the value information. As is clear from the CZ lottery table shown in FIG. 41A, when the current CZ lottery state is in the high probability, the CZ lottery is won more than in the case where the current CZ lottery state is in the low probability. The probability is high.

In the CZ lottery table shown in FIG. 41B, the correspondence between the winning / non-winning (lottery result) of CZ1, CZ2, and CZ3 at the time of CZ failure or the end of ART and the information of the lottery value associated with each lottery result. Is specified. At the time of CZ failure (when the ART lottery in CZ1 and CZ2 is not won) or at the end of the ART gaming state, the CZ pull-back lottery is performed using this CZ lottery table.

[CZ1 medium mode up lottery table]
Next, with reference to FIG. 42, the CZ1 medium mode-up lottery table used in the CZ1 mode-up lottery performed in the first half of CZ1 will be described. FIG. 42 is a block diagram of a mode-up lottery table in CZ1. The name of the internal winning combination shown in FIG. 42 corresponds to the name of the sub-flag described above.

The CZ1 medium mode-up lottery table has a correspondence relationship between each combination of the current mode and the internal winning combination, the mode-up lottery result (winning / non-winning), and the lottery value information associated with each lottery result. Is specified. As shown in FIG. 44A described later, in CZ1, the higher the mode (the higher the value of the mode), the higher the probability of winning the ART lottery, and when the mode goes up to the mode 6, the ART lottery is always won.

The lottery result "mode 1 UP" in FIG. 42 means that the mode of CZ1 is raised by one step, and the lottery result "mode 2 UP" means that the mode of CZ1 is raised by two steps. Therefore, for example, in a situation where the current mode is mode 2, if the lottery result “mode 2 UP” is won, the mode of CZ1 goes up from mode 2 to mode 4. Further, for example, when the lottery result "mode 6UP_freeze occurrence" is won, the freeze occurs, and the winning of the ART lottery and the granting of CT are determined.

[CZ2 middle point lottery table]
Next, the CZ2 middle point lottery table used in the CZ2 point-up lottery performed in the first half of the CZ2 will be described with reference to FIG. 43. FIG. 43 is a block diagram of a point lottery table in CZ2. The name of the internal winning combination shown in FIG. 43 corresponds to the name of the sub-flag described above.

The CZ2 middle point lottery table shows the correspondence between the current points and the internal winning combination, the point-up lottery result (winning / non-winning), and the lottery value information associated with each lottery result. Prescribe. As shown in FIG. 44B described later, in CZ2, the probability of winning the ART lottery increases as the points increase, and when the points increase to "point 10", the ART lottery is always won. The lottery result "point 2 UP" in FIG. 43 means that "2" is added to the points of the current CZ2. For example, in a situation where the current point is "2", the lottery result "point 2 UP". If you win "Point 2 UP", the points of CZ2 will increase from "2" to "4". Further, for example, when the lottery result "Point 10UP_freeze generation" is won, a freeze occurs, and the winning of the ART lottery and the granting of CT are determined.

[ART lottery table in CZ]
Next, the ART lottery table in CZ used in the ART lottery performed during CZ will be described with reference to FIGS. 44A-44C and 45. Note that FIG. 44A is a block diagram of the CZ medium ART lottery table (for CZ1) used in the first game of the latter half of CZ1, and FIG. 44B is a configuration diagram of the CZ medium ART used in the first game of the latter half of CZ2. It is a block diagram of the lottery table (for CZ2), and FIG. 44C is the block diagram of the ART lottery table (for CZ1, CZ2 common latter half battle) used in the latter half of CZ1 and CZ2. Further, FIG. 45 is a block diagram of an ART lottery table (for CZ3) in CZ used in an ART lottery executed in CZ3. The names of the internal winning combinations shown in FIGS. 44C and 45 correspond to the names of the sub-flags described above.

The ART lottery table (for CZ1) in CZ shown in FIG. 44A defines the correspondence between the current mode, the result of ART lottery (presence or absence of winning), and the information of the lottery value associated with each lottery result. .. Further, the ART lottery table (for CZ2) in CZ shown in FIG. 44B shows the correspondence between the current points, the result of the ART lottery (presence or absence of winning), and the information of the lottery value associated with each lottery result. Prescribe.

As is clear from the CZ medium ART lottery table (for CZ1) and the CZ medium ART lottery table (for CZ2), in CZ1 and CZ2, the higher the rank (mode or point) of the first half, the easier it is to win the ART lottery.

The CZ middle ART lottery table (common to CZ1 and CZ2 for the latter half of the battle) shown in FIG. 44C includes the internal winning combination, the ART lottery result (presence / absence of winning), and the lottery value information associated with each lottery result. Prescribe the correspondence of. As is clear from the ART lottery table in CZ (common to CZ1 and CZ2 for the latter half of the battle), in the latter half of CZ1 and CZ2, the role corresponding to the rare role (sub flag "weak cherry", "cactus" or "strong cherry". ) Is determined as an internal winning combination, and the ART lottery is won with a predetermined probability.

The ART lottery table (for CZ3) in CZ shown in FIG. 45 shows each combination of the number of digestion games of CZ3 and the internal winning combination, the result of ART lottery (presence or absence of winning), and the lottery associated with each lottery result. Specify the correspondence with the value information. As is clear from the ART lottery table in CZ (for CZ3), in the present embodiment, when the ART lottery is won in CZ3, the CT is always won.

<Playability during normal ART>
Next, the flow of the game during the game ART will be described with reference to FIGS. 46A and 46B. In the pachi-slot machine 1 of the present embodiment, as described above, the normal ART and the CT are provided as the ART gaming state (see FIGS. 14A and 14B), and the inside of the CT is used as an additional chance zone. Therefore, in the present embodiment, the player usually plays a game in the game during ART with the aim of shifting to CT.

[Mode of transition from normal ART to CT]
FIG. 46A is a diagram showing a transition mode of a gaming state from a normal ART to a CT. In the pachi-slot machine 1 of the present embodiment, as shown in FIG. 46A, when the CT lottery performed during the normal ART is won, the gaming state shifts from the normal ART to the CT. As shown in FIG. 46A, the pachi-slot machine 1 of the present embodiment is provided with an ART level and a CT lottery state as parameters that affect various lottery normally performed during ART.

As the ART level, four levels of level 1 to level 4 are provided, and this ART level is controlled (determined) mainly based on the number of continuous (digestion) games during normal ART. Then, the ART level affects the determination of the CT lottery state, the flag conversion lottery during the normal ART, which will be described later, and the like.

The CT lottery state is provided with four stages of low probability, normal, high probability, and ultra-high probability, and the CT lottery state is mainly controlled based on the ART level and the internal winning combination during normal ART ( It is determined. Then, the CT lottery state affects the CT lottery performed during the normal ART, the flag conversion lottery during the normal ART described later, and the like.

[Flag conversion during normal ART]
As described above, in the pachi-slot machine 1 of the present embodiment, during the RT4 state, that is, during the ART gaming state, the internal winning combinations "F_certain chili lip", "F_1 certain chili lip" and "F_reach eye lip A" to "F_" When any one of "Reach Eye Lip D" is independently determined as an internal winning combination, a flag conversion lottery is performed, and special benefits (for example, addition of the number of ART games or CT winning) are given according to the lottery result. .. FIG. 46B is a diagram showing an outline of a method of flag conversion lottery usually performed during ART.

In the present embodiment, as shown in FIG. 46B, the flag conversion lottery is performed in the normal ART with reference to the ART level and the CT lottery state. As a result, if the flag conversion lottery is won, a special privilege will be given, and the symbol combination related to the abbreviation "Triple Chili Lip" and the symbol combination related to the abbreviation "Reach Eye Lip" will be stopped and displayed on the effective line. Navigation (for example, notification of information to aim at a predetermined symbol by pushing forward) is performed. On the other hand, if the flag conversion lottery is not won, navigation (for example, notification of a push order other than forward push) is performed to stop and display the symbol combination related to the abbreviation "replay" on the valid line.

Then, when the player performs a stop operation according to this notification (navigation), the symbol combination according to the notification content is stopped and displayed on the effective line. Specifically, when the flag conversion lottery is won, the symbol combination related to the abbreviation "triple chili lip" and the symbol combination related to the abbreviation "reach eye lip" are stopped and displayed on the valid line and are not displayed in the flag conversion lottery. In the case of winning, the symbol combination related to the abbreviation "replay" is stopped and displayed on the effective line.

<Various data tables normally used during ART>
Next, with reference to FIGS. 47 to 51, various data tables normally used in the lottery process during ART will be described. The various data tables described below are stored in the main ROM 102.

[ART flag conversion lottery table]
FIGS. 47A and 47B are block diagrams of a flag conversion lottery table during ART used in a flag conversion lottery normally performed during ART.

In the pachi-slot machine 1 according to the present embodiment, the flag conversion lottery during normal ART is performed in two stages. Specifically, when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is won, the first stage flag conversion lottery is first performed, and if the first stage flag conversion lottery is won, then. The second stage flag conversion lottery is performed. Then, when the second-stage flag conversion lottery is won, the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is converted into the sub-flag EX "triple chili lip". On the other hand, if the first-stage flag conversion lottery or the second-stage flag conversion lottery is non-winning, the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is converted to the sub-flag EX "replay". (Treat as a normal replay role). If any of the internal winning combinations "F_reach-eye lip A" to "F_reach-eye lip D" is won, only the second-stage flag conversion lottery is performed.

FIG. 47A is a configuration diagram of an ART in-flag conversion lottery table used in the first-stage flag conversion lottery, and FIG. 47B is a configuration diagram of an ART in-flag conversion lottery table used in the second-stage flag conversion lottery. be.

The ART middle flag conversion lottery table shown in FIG. 47A has an internal winning combination (“F_certain chili lip” or “F_1 certain chili lip”) and a lottery result of the first stage flag conversion lottery (no conversion / with conversion (provisional)). And the correspondence relationship with the lottery value information associated with each lottery result is defined.

The ART middle flag conversion lottery table shown in FIG. 47B shows each combination of the internal winning combination, the ART level, and the CT lottery state, the lottery result of the second stage flag conversion lottery (without conversion / with conversion), and each lottery result. Specifies the correspondence with the lottery value information associated with. It should be noted that, in the game until the CT is won once in the normal ART, the table in the "First time (until the CT is won once)" column of the item "ART level" in FIG. 47B is referred to.

In the present embodiment, as shown in FIGS. 47A and 47B, in the first and second stage flag conversion lottery using each of the flag conversion lottery tables during ART, a random number value (0 to 0) in which the probability denominator is "256". A lottery is performed using 255). Therefore, in the present embodiment, the above-mentioned two-step flag conversion lottery can be regarded as substantially the same lottery as the case where one lottery is performed using a random number value whose probability denominator is "65536".

In recent pachislot machines, lottery (ART lottery, etc.) related to ball ejection, which was conventionally performed on the sub control board 72 side (hereinafter referred to as "sub side"), is performed on the main control board 71 side (hereinafter referred to as "main side"). It is required to do. However, since the capacity of the storage means (main ROM 102) on the main side is limited to a small capacity, there is a demand for a mechanism that enables lottery without impairing the playability while suppressing an increase in the processing capacity.

Regarding this point, in the pachi-slot machine 1 of the present embodiment, the lottery having the probability denominator of "256" can be performed in two stages, so that the lottery having the probability denominator of "65536" can be performed. It is possible to suppress an increase in the capacity on the side. Further, in the second stage lottery, since the ART level, the CT lottery state, etc. are referred to, not only the internal winning combination but also the flag conversion lottery according to the current state can be performed, and as a result, various playability can be achieved. You can do a lottery to convert the flags you have.

[ART level determination table]
48A and 48B are block diagrams of an ART level determination table used when determining an ART level. The process of determining the ART level is performed at the time of winning the ART when the transition to the ART gaming state is decided, and during the normal ART. FIG. 48A is a configuration diagram of an ART level determination table used at the time of winning ART, and FIG. 48B is a configuration diagram of an ART level determination table normally used during ART.

The ART level determination table shown in FIG. 48A defines a correspondence relationship between ART levels 1 to 4 (lottery results) and lottery value information associated with each ART level. In the present embodiment, if a freeze occurs at the time of winning the ART, the ART level 2 is determined as the ART level.

The ART level determination table shown in FIG. 48B is a lottery associated with each combination of the current ART level and the number of elapsed (digested) games of the normal ART, various ART levels of the migration destination, and each ART level of the migration destination. Specify the correspondence with the value information. Further, the ART level determination table shown in FIG. 48B is associated with each combination of the current ART level and the number of elapsed games of the normal ART at the time of CT entry, various ART levels of the migration destination, and each ART level of the migration destination. The correspondence with the information of the lottery value obtained is specified. That is, during normal ART, not only the ART level can be changed when the number of elapsed (digested) games of normal ART reaches a predetermined number of games, but also the ART level can be changed at the timing of entering CT during normal ART. It will be possible to migrate.

[Normal ART medium and high probability lottery table]
FIG. 49 is a block diagram of a normal ART medium-high probability lottery table used when determining a CT lottery state during normal ART.

The normal ART medium-high probability lottery table has a correspondence relationship between each combination of the current CT lottery state and the internal winning combination, various CT lottery states of the migration destination, and the lottery value information associated with each CT lottery state. Prescribe. The name of the internal winning combination shown in FIG. 49 corresponds to the name of the sub-flag described above.

As is clear from the normal ART medium and high probability lottery table, the internal winning combination corresponding to the sub-flag "triple chili lip (triple chili lip A and triple chili lip B)" and the sub-flag "reach eye lip (reach eye lip 1-4)". If you win, the CT lottery state is likely to shift (fall) to a "low probability". However, as shown in FIG. 50 described later, when the internal winning combination corresponding to the sub-flags "triple chili lip" and "reach eye lip" is won, even if the CT lottery state falls, the CT lottery will be performed. It is always a winning configuration.

[CT lottery table during ART]
FIG. 50 is a block diagram of a CT lottery table during ART used in a CT lottery normally performed during ART.

The CT lottery table during ART is a lottery associated with each combination of the current CT lottery state and the internal winning combination, various lottery results (non-winning / normal CT / high probability CT) of the CT lottery, and each lottery result. Specify the correspondence with the value information. The name of the internal winning combination shown in FIG. 50 corresponds to the name of the sub-flag described above.

In the present embodiment, the sub-flags "cactus", "weak cherry", "strong cherry", "triple chili lip (triple chili lip A and triple chili lip B)", and "reach eye lip" are used as internal winning roles. When the combination corresponding to "1 to 4)" or "BB" is determined, in the CT lottery process using the CT lottery table during ART, the CT lottery using the random value in the range where the probability denominator is "256" is used. Is done. In addition, if an internal winning combination other than these roles (for example, a combination corresponding to the sub-flags "replay", "common bell", "pushing order bell", etc.) is determined as the internal winning combination, CT during ART In the CT lottery process using the lottery table, CT lottery using random values in the range where the probability denominator is "65536" is performed.

In the pachi-slot machine 1 of the present embodiment, two types of CTs called "normal CT" and "high probability CT" are provided as CTs. Normal CT and high-probability CT have different expectations for the number of ART games added during CT (addition chance zone), and high-probability CT is a CT in which a large number of ART games are likely to be added compared to normal CT. (See FIG. 55 below).

[Normal ART middle lottery table]
FIG. 51 is a configuration diagram of an additional lottery table during normal ART used in an additional lottery for the number of ART games performed during normal ART. The name of the internal winning combination shown in FIG. 51 corresponds to the name of the sub-flag described above.

Normally, the additional lottery table in ART defines the correspondence between the internal winning combination, various lottery results (non-winning / additional 10G to 300G) of the additional lottery, and the lottery value information associated with each lottery result.

<Playability during CT>
Next, the flow of the game during CT will be described with reference to FIGS. 52A to 52C. It should be noted that FIGS. 52A and 52B are mainly diagrams showing an outline of the game flow during CT at the time of winning the sub-flag EX "triple chili lip", and FIG. 52C shows an outline of the flag conversion process performed during CT. It is a figure.

[Game content during CT]
In the pachi-slot machine 1 of the present embodiment, in the CT, one set of eight games (8 games) is played. During the CT period, an additional lottery for the number of ART games is performed based on the internal winning combination for each game. Then, when the additional lottery is won, the unit game number (game number) of the CT game is not subtracted, while when the additional lottery is non-winning, the unit game number (game number) of the CT game is not subtracted. Number) is subtracted. Therefore, during the CT period, the CT does not end in the game in which the number of ART games is added, and the CT ends when the game in which the number of ART games is not added is performed eight times in the same set. ..

Further, in the present embodiment, as shown in FIGS. 52A and 52B, when the sub-flag EX "triple chili lip" is won, that is, the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is won. However, if the flag conversion lottery is won, the CT games 8 times per set are reset (stocked). Then, the set of the reset (stocked) CT games is started after the set of the CT games is completed.

For example, in the same set, if a unit game that is not a winning lottery is performed 7 times and then a CT game in which the number of ART games is not added is performed once, the CT ends. If the sub-flag EX "triple chili lip" is won, the CT game is reset. As a result, after the CT game is reset, the CT will not end until the unit game, which is a non-winning lottery for the number of ART games, is performed eight times. Therefore, the game period of CT becomes long enough to win the sub-flag EX "triple chili lip".

[Flag conversion during CT]
Next, with reference to FIG. 52C, a method of flag conversion lottery performed during CT will be described. As described above, in the present embodiment, when the sub-flag EX "triple chili lip" is won during the CT period (internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is won, and the flag conversion lottery is won. Then), CT is reset (stocked). Further, as shown in the CT flag conversion lottery table of FIG. 54, which will be described later, if the internal winning combination “F_certain chili lip” or “F_1 certain chili lip” is won during CT, the flag conversion lottery is always won (sub-flag EX “sub-flag EX”. It will always be converted to "triple chili lip"). That is, in the present embodiment, when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is won during CT, the CT is always reset.

Further, in the flag conversion lottery when any one of the internal winning combinations "F_reach eye lip A" to "F_reach eye lip D" is won, the flag is based on three types of flag conversion tables (tables 0 to 2). The winning probability of the conversion lottery is controlled. Specifically, as shown in FIG. 52C, table 0 is a flag conversion table having the lowest probability of being converted to the sub-flag EX "reach-eye lip", and table 1 is converted to the sub-flag EX "reach-eye lip". It is a flag conversion table having the next lowest probability, and table 2 is a flag conversion table having the highest probability of being converted into the sub-flag EX “reach eye lip”. If the sub-flag EX "reach eye lip" is won during CT, a new CT is added as shown in the lottery table for adding the number of sets in CT in FIG. 56, which will be described later.

Further, in the present embodiment, in normal CT, as shown in FIG. 52C, the flag conversion table is determined based on the ART level. On the other hand, in high-probability CT, table 0 is always determined as a flag conversion table regardless of the ART level.

<Various data tables used during CT>
Next, various data tables used in the lottery process performed during CT will be described with reference to FIGS. 53 to 56. The various data tables described below are stored in the main ROM 102.

[CT table lottery table]
FIG. 53 is a configuration diagram of a CT medium table lottery table used when determining a table to be used for the flag conversion lottery from the three-stage flag conversion tables (tables 0 to 2).

The lottery table during CT has a correspondence relationship between each state such as the ART level and the type of CT to be executed from now on, the type of the flag conversion table (tables 0 to 2), and the lottery value information associated with each type. Prescribe. The table lottery table during CT is referred to when it is decided to win the CT lottery and shift to CT, or at the start of CT.

[CT flag conversion lottery table]
FIG. 54 is a configuration diagram of a flag conversion lottery table during CT used in a flag conversion lottery performed during CT.

The CT middle flag conversion lottery table includes an internal winning combination (one of "F_certain chili lip", "F_1 certain chili lip" and "F_reach eye lip A" to "F_reach eye lip D") and each flag conversion table ( The correspondence between the lottery result (without conversion / with conversion) of the flag conversion lottery in Tables 0 to 2) and the lottery value information associated with each lottery result is defined. As is clear from the CT mid-flag conversion lottery table, if the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is won during CT, the flag conversion lottery is always won (sub-flag EX "triple chili lip" is always won. Will be converted).

[Additional lottery table during CT]
FIG. 55 is a configuration diagram of an additional lottery table during CT used in an additional lottery for the number of ART games performed during CT.

The extra lottery table during CT is associated with each combination of the current CT state and the internal winning combination, various lottery results of the additional lottery (non-winning / additional 10 games / ... / additional 300 games), and each lottery result. The correspondence with the lottery value information is specified. The name of the internal winning combination shown in FIG. 55 corresponds to the name of the sub-flag described above, and when a combination other than the internal winning combination (sub-flag) shown in FIG. 55 is internally won, the additional lottery during CT is won. There is nothing to do.

Further, in the additional lottery during the normal CT of the present embodiment, the form of granting the number of additional games changes according to the number of wins of the sub-flag "triple chili lip" (internal winning combination "F_certain chili lip" or "F_1 certain chili lip"). do.

Specifically, when the number of winnings of the sub-flag "triple chili lip" in the same CT set is 1 to 8, the lottery results "addition_10G" and "addition_20G" shown in FIG. 55 are given. The number of additional games is 10 games and 20 games, respectively. Therefore, in this case, it becomes easy to determine 10 games as the number of additional games of ART. Further, when the number of winnings of the sub-flag "triple chili lip" in the same CT set is 9 to 16 times, the extra game given by the lottery results "addition_10G" and "addition_20G" shown in FIG. 55. Both numbers will be 20 games. That is, the number of additional games (lottery result) corresponding to the lottery value "extremely high" of the sub-flag "triple chili lip" in FIG. 55 is promoted to 20 games. Therefore, in this case, 20 games can be easily determined as the number of additional games of ART.

Further, when the number of winnings of the sub-flag "triple chili lip" in the same CT set is 17 to 24 times, the extra game given by the lottery results "addition_10G" and "addition_20G" shown in FIG. 55. Both numbers will be 30 games. That is, the number of additional games (lottery result) corresponding to the lottery values "extremely high" and "extremely low" of the sub-flag "triple chili lip" in FIG. 55 is promoted to 30 games. Therefore, in this case, "30 games" can be easily determined as the number of additional games of ART. Further, when the number of winnings of the sub-flag "triple chili lip" in the same CT set is 25 or more, the number of additional games given by the lottery results "addition_10G" and "addition_20G" shown in FIG. 55. Will both be 50 games. That is, the number of additional games (lottery result) corresponding to the lottery values "extremely high" and "extremely low" of the sub-flag "triple chili lip" in FIG. 55 is promoted to 50 games. Therefore, in this case, "50 games" can be easily determined as the number of additional games of ART.

As described above, in the pachi-slot machine 1 of the present embodiment, it is possible to increase the number of ART games that can be added by one additional lottery according to the number of times the sub-flag "triple chili lip" is won during CT. Further, as described above, in the present embodiment, as long as the number of ART games is added, the CT does not end, and when the sub-flag EX "triple chili lip" is applied, the CT is reset (stock). Is done. Therefore, in the present embodiment, the player can be expected to increase the additional amount per game as the CT continues, and the interest during the CT can be improved. In addition, the number of winnings of the sub-flag "triple chili lip", which is an opportunity to increase the amount of addition per game, is more than the basic number of games (8 times) for one set of CT (9 times or more). It is possible to prevent an excessive profit from being given to the player, and it is possible to balance the profit between the player and the game store.

In the present embodiment, the number of winnings of the above-mentioned sub-flag "triple chili lip" (internal winning combination "F_certain chili lip" or "F_1 certain chili lip") is the number of times counted in the same CT set. The present invention is not limited to this. For example, a new CT given when a lottery for adding the number of sets performed during CT is won may be included in "in the same CT set".

[Additional lottery table for the number of sets during CT]
FIG. 56 is a configuration diagram of a lottery table for adding the number of sets during CT used in the additional lottery for CT sets performed during CT.

The lottery table for adding the number of sets during CT is a combination of the current CT state and the internal winning combination (sub flag "reach-eye rip (reach-eye rips 1 to 4)"), and various lottery results of the additional lottery (non-winning / normal). The correspondence between the CT winning / high probability CT winning) and the lottery value information associated with each lottery result is defined.

As is clear from the extra lottery table for the number of sets during CT, if you win any of the internal winning roles "F_reach eye lip A" to "F_reach eye lip D" during CT, you will definitely win the additional lottery for the CT set. (The CT set is always stocked). The stocked CT set is started after the currently operating CT set is completed.

<Playability in bonus state>
Next, the flow of the game in the bonus state will be described with reference to FIGS. 57A to 57C. FIG. 57A is a diagram showing the flow of the game when the game state shifts to the bonus state during the general game state (ART non-winning), and FIG. 57B shows the case where the game state shifts to the bonus state during normal ART. FIG. 57C is a diagram showing the flow of the game in the case where the game state shifts to the bonus state during CT.

In the pachi-slot machine 1 of the present embodiment, as shown in FIGS. 57A to 57C, a normal BB and a special BB are provided as bonus types in terms of playability, and the bonus type is determined at the time of transition to the bonus state. Will be done. At this time, when the special BB is determined, the gaming state shifts to CT via the ART preparation state after the end of the bonus state. On the other hand, when the normal BB is determined, the game state of the transition destination differs depending on the state before the transition to the bonus state.

When the gaming state shifts from the general gaming state to the normal BB, as shown in FIG. 57A, in the game during the normal BB, the ART lottery is performed based on the internal winning combination. Then, when the ART lottery is won, the game state shifts to the normal ART via the ART preparation state after the end of the bonus state. In this case, in the game in the bonus state after winning the ART lottery, the lottery with the number of ART games added is performed.

When the gaming state shifts from the normal ART to the normal BB, as shown in FIG. 57B, a CT lottery is performed at the end of the normal BB. The winning probability of this CT lottery is 50%, and if the winning is done, the gaming state shifts to CT via the ART preparation state after the end of the bonus state. On the other hand, when the CT lottery is not won, the game state shifts to the normal ART via the ART preparation state after the end of the bonus state. In addition, in the game in the bonus state that has been transferred from the normal ART, an additional lottery for the number of ART games is also performed.

When the gaming state shifts from CT to normal BB or special BB, as shown in FIG. 57C, the gaming state shifts to CT via the ART preparation state after the end of the bonus state. In addition, in the game in the bonus state transferred from CT, the number of ART games is added to the lottery.

<Various data tables used in games in the bonus state>
Subsequently, with reference to FIGS. 58 to 60, various data tables used in the lottery process performed in the game in the bonus state will be described. The various data tables described below are stored in the main ROM 102.

[Bonus type lottery table]
FIG. 58 is a configuration diagram of a bonus type lottery table used when determining a bonus type (normal BB, special BB).

The bonus type lottery table shows each game state (CT and others) before shifting to the bonus state, various lottery results (bonus type: normal BB / special BB), and the lottery value associated with each lottery result. Define the correspondence with information. The bonus type determination process with reference to the bonus type lottery table is performed at the start of the bonus state.

[Bonus lottery table with the number of ART games added]
FIG. 59 is a configuration diagram of a lottery table for adding the number of ART games in the bonus used in the ART lottery and the lottery for adding the number of ART games performed in the game in the bonus state.

The lottery table for adding the number of ART games in the bonus is associated with each combination of the current bonus type and the internal winning combination, various lottery results (non-winning / 5 games / ... / 300 games) of the additional lottery, and each lottery result. The correspondence with the information of the lottery value obtained is specified.

In the present embodiment, in the ART non-winning state (the state until the ART lottery is won in the normal BB shifted from the general gaming state), the lottery table for adding the number of ART games during the bonus is used for the ART lottery. Specifically, in the ART non-winning state, when the number of additional games of 1 game or more (50 games or more in the example shown in FIG. 59) is determined by the lottery using the additional number of ART games during the bonus lottery table, ART Along with winning the lottery, the corresponding number of games is given as the number of ART games. On the other hand, in the state after winning the ART, the lottery table for adding the number of ART games during the bonus is used only for the lottery for adding the number of ART games.

[CT lottery table at the end of bonus]
FIG. 60 is a block diagram of a CT lottery table at the end of the bonus used in the CT lottery performed at the end of the bonus state.

The CT lottery table at the end of the bonus shows each combination of the bonus type (normal BB, special BB) and the game state (during normal CT, high probability CT) before shifting to the bonus state, and various lottery results of the CT lottery (during normal CT, high probability CT). The correspondence between the non-winning / normal CT winning / high-probability CT winning) and the lottery value information associated with each lottery result is defined. As is clear from the CT lottery table at the end of the bonus, for example, if a normal BB is performed during a normal ART, there is a 50% chance of winning the CT at the end of the bonus state.

<Exceptional playability during general game status>
Next, with reference to FIG. 61, an exceptional flow of the game during the general game state will be described.

In the flow of the basic gaming state in the pachi-slot machine 1 of the present embodiment, the gaming state shifts from the normal gaming state to the CZ during the general gaming state, and the gaming state shifts to the ART gaming state by winning the ART lottery in the CZ. do. Then, in the present embodiment, the ART gaming state is realized by performing the notification in the RT4 state. Further, in the present embodiment, as shown in FIG. 61, the transition control of the RT state is performed according to the symbol combination displayed as stopped.

It should be noted that the symbol combination for shifting the RT state is one in which the stop display is performed according to the order (pushing order) of the stop operation of the player (see FIG. 24), so that the notification may not be performed. However, by chance, the RT state may shift to the RT4 state. Further, in the RT4 state, one of the internal winning combinations "F_reach-eye lip A" to "F_reach-eye lip D" may be determined, so that even during the general gaming state (non-ART), the player may be determined. It is possible to display a reach eye (a symbol combination related to the abbreviation "reach eye lip") to which a special privilege is given.

Therefore, in the pachi-slot machine 1 of the present embodiment, as shown in FIG. 61, the RT state accidentally shifts to the RT4 state during the general gaming state (non-ART), and the symbol combination related to the abbreviation "reach eye lip" can be displayed. In such a state, the gaming state can be changed to the ART gaming state (normal ART) without going through the CZ.

More specifically, when any of the internal winning combinations "F_reach eye lip A" to "F_reach eye lip D" is determined in the general game state and in the RT4 state, a flag conversion lottery is performed. When this flag conversion lottery is won, notification (navigation) for displaying the symbol combination related to the abbreviation "reach eye lip" is performed, and the right of ART is granted. On the other hand, when any of the internal winning combinations "F_reach-eye lip A" to "F_reach-eye lip D" is determined in the general game state and in the RT4 state, the flag conversion lottery is not won. Notification is performed to display the symbol combination related to the abbreviation "replay", and control is performed so that the symbol combination related to the abbreviation "reach eye lip" is not displayed.

<Various data tables used for exceptional game control during general game states>
Next, with reference to FIG. 62, a data table used in the lottery process performed in the exceptional game control during the above-mentioned general game state will be described. The data table described below is stored in the main ROM 102.

[Non-ART flag conversion lottery table]
FIG. 62 is a block diagram of a non-ART flag conversion lottery table used in a flag conversion lottery performed in a game in the general game state and in the RT4 state.

The non-ART medium flag conversion lottery table has an internal winning combination ("F_reach eye lip A" to "F_reach eye lip D"), a lottery result of the flag conversion lottery (without conversion / with conversion), and each lottery result. It defines the correspondence with the associated lottery value information.

<Notification function controlled by the main side>
In the conventional pachislot machine, information (navigation) of reel stop operation information (pushing order, etc.) is performed by control on the sub (sub control board 72) side during ART. However, since the presence or absence of this notification affects the profit of the player (so-called ball ejection), in recent years, it has been required to perform the notification on the main (main control board 71) side that manages the profit of the player. There is. Therefore, in the pachi-slot machine 1 of the present embodiment, as described above, the information display 6 controlled on the main side is provided with an instruction monitor (not shown) for notifying the information of the stop operation, and is controlled by the main side. A function for notifying information on the reel stop operation is provided.

Here, FIGS. 63A to 63D show the correspondence between the notification (navigation) performed on the main side and the notification (navigation) performed on the sub side in the pachi-slot machine 1 of the present embodiment. It should be noted that FIG. 63A is a diagram showing the correspondence relationship between the notification (navigation) performed on the main side and the notification (navigation) performed on the sub side in the ART preparation state, and FIG. 63B is a diagram during ART (normal ART or CT). It is a figure which shows the correspondence relationship between the notification (navigation) performed on the main side, and the notification (navigation) performed on the sub side. Further, FIG. 63C is a diagram showing a correspondence relationship between the notification (navigation) performed on the main side and the notification (navigation) performed on the sub side during the RT5 state (between the BB1 flags), and FIG. 63D is a diagram showing the correspondence between the notification (navigation) performed on the sub side and the notification (navigation) performed on the sub side. It is a figure which shows the correspondence relationship between the notification (navigation) performed on the main side, and the notification (navigation) performed on the sub side in (between BB2 flags).

In the present embodiment, as shown in FIGS. 63A to 63D, on the main (main control board 71) side, the information of the reel stop operation is notified by displaying the numerical values of "1" to "11" on the instruction monitor. do. The numerical values of "1" to "11" displayed on the instruction monitor uniquely correspond to the contents of the stop operation notified by each.

Specifically, the numerical values "1" to "3" indicate the type of the reel on which the first stop operation is performed, and the numerical value "1" means that the first stop operation is performed on the left reel 3L. The numerical value "2" means that the first stop operation is performed on the middle reel 3C, and the numerical value "3" means that the first stop operation is performed on the right reel 3R.

Further, the numerical values "4" to "9" indicate the push order to be notified, and the numerical value "4" means that the push order is in the order of "left, middle, right", and the numerical value "5". Means that the push order is "left, right, middle", the numerical value "6" means that the push order is "middle, left, right", and the numerical value "7" is the push order. The order is "middle, right, left", the numerical value "8" means that the pushing order is "right, left, middle", and the numerical value "9" is the pushing order. It means that the order is "right, middle, left".

Further, the numerical values "10" and "11" are for notifying the bonus combination, respectively, and the numerical value "10" is a symbol combination (design "white 7"-design "white 7"-" related to the combination name "C_BB1". The symbol "white 7") is meant, and the numerical value "11" means a symbol combination (design "blue 7" -design "blue 7" -design "blue 7") related to the combination name "C_BB2".

Although the numerical values "1" to "11" notified on the main side (instruction monitor) uniquely correspond to the content of the stop operation to be notified, all players are clear based on the numerical values. It is not always possible to grasp the content of the notification. For example, it may not be possible for some players to grasp the content of the notification simply by displaying the numerical value "6" on the instruction monitor on the main side.

Therefore, in the pachi-slot machine 1 of the present embodiment, the information related to the stop operation of the stop button is notified on the sub side as well as the notification on the main side. Specifically, the display device 11 (projector mechanism 211 and display unit 212) controlled on the sub side is used to notify information related to the stop operation under the control of the sub side.

For example, when notifying the push order in which the first stop operation is performed on the left reel 3L, the numerical value "1" is displayed on the instruction monitor on the main side, and the left reel in the display screen of the display device 11 is displayed on the sub side. A numerical value "1" is displayed above the 3L to notify that the left reel 3L is the target of the first stop operation. When notifying the push order "middle, left, right", the numerical value "6" is displayed on the instruction monitor on the main side, and the numerical value is displayed above the middle reel 3C in the display screen of the display device 11 on the sub side. "1" is displayed, the numerical value "2" is displayed above the left reel 3L, and the numerical value "3" is displayed above the right reel 3R. Notify that it is. Further, when the internal winning combination "F_BB1" is determined, the numerical value "10" is displayed on the instruction monitor on the main side, and "white 7"-"white 7" is displayed on the display screen of the display device 11 on the sub side. -Displays information on the symbol combination of "White 7" and informs the player of the symbol to be aimed at.

The timing of notification on the main side can be set to any timing as long as it is at least the period of one game in which notification is performed. For example, the main side may be notified at the timing when the player's start operation is detected (accepted), the main side may be notified when the reel rotation starts, and the first stop operation to the third stop operation may be performed. The main side may be notified at the timing when any of the stop operations is detected. On the other hand, it is preferable that the timing of performing the notification on the sub side is at least a timing before the first stop operation. Therefore, in the pachi-slot machine 1 of the present embodiment, notification (navigation) is performed on both the main side and the sub side at the timing when the start operation is detected or the timing when the reel rotation starts. As a result, before the player performs the stop operation, the stop operation information is notified on both the instruction monitor on the main side and the display device 11 on the sub side.

In the ART preparation state, as shown in FIG. 63A, notifications (navigation) called "bell navigation", "maintenance lip navigation", "RT3 transition lip navigation" and "RT4 transition lip navigation" are performed by the control of the main side. In "Bell Navi", when the internal winning combination "F_3 choice bell_1st" to "F_3 choice bell_3rd" is decided, the symbol combination (see FIG. 29) related to the abbreviation "bell" is stopped and displayed on the effective line. The push order of is notified. In "Maintenance Lip Navi", when the internal winning combination "F_Maintenance Lip_1st" to "F_Maintenance Lip_3rd" is determined, the symbol combination (see FIG. 28) related to the abbreviation "Replay" is stopped and displayed on the effective line. The push order for is notified. In "RT3 Transition Lip Navi", when the internal winning combination "F_RT3 Transition Lip_1st" to "F_RT3 Transition Lip_3rd" is determined, the symbol combination (see FIG. 28) related to the abbreviation "RT3 Transition Lip" is placed on the effective line. The push order for displaying the stop is notified. Further, in the "RT4 transition lip navigation", when the internal winning combination "F_RT4 transition lip_123" to "F_RT4 transition lip_3rd" is determined, the symbol combination (see FIG. 28) related to the abbreviation "RT4 transition lip" is valid. The push order for displaying the stop display on the top is notified.

Further, in the ART gaming state (normal ART or CT), as shown in FIG. 63B, the notifications referred to as "Bell Navi", "Maintenance Lip Navi", "RT3 Transition Lip Navi" and "RT4 Transition Lip Navi" are controlled by the main side. (Navigation) is performed. A flag conversion lottery is performed for the game in the ART game state (RT4 state), and the symbol combination related to the abbreviations "triple chili lip", "reach eye lip", or "replay" is displayed based on the lottery result. The push order is notified, but this notification is performed only on the sub side and not on the main side.

As mentioned above, since the symbol combination related to the abbreviation "triple chili lip" or "reach eye lip" is related to the granting of special benefits, the presence or absence of notification affects the player's profit (ball output). Although it seems to be given, in reality, in the pachislot 1 of the present embodiment, the special privilege is given based on the lottery result of the flag conversion lottery, so that the displayed symbol combination is the privilege to be given. It does not affect it. Therefore, for example, even if the symbol combination related to the abbreviation "replay" is stopped and displayed in the state of winning the flag conversion lottery, a special privilege is given. On the other hand, even if the symbol combination related to the abbreviation "triple chili lip" or "reach eye lip" can be stopped and displayed in a state where the flag conversion lottery has not been won, no special privilege is given. In the pachi-slot machine 1 of the present embodiment, when the symbol combination displayed in this way does not affect the profit (ball output) of the player, it is controlled on the sub side without notifying the instruction monitor on the main side. The notification is performed only on the display device 11.

Further, in the RT5 state (inter-flag state), as shown in FIGS. 63C and 63D, information is notified to the player to aim at the symbol combination related to the bonus combination carried over as the internal winning combination. For example, when the internal winning combination "F_BB1" is carried over, as shown in FIG. 63C, a notification (navigation) called "white 7 navigation" is performed by the control of the main side, and the internal winning combination "F_BB2" is performed. Is carried over, as shown in FIG. 63D, a notification (navigation) called "blue 7 navigation" is performed by the control of the main side.

In "White 7 Navi", the symbol combination corresponding to the internal winning combination "F_BB1", that is, the symbol combination related to the combination name "C_BB1" ("White 7"-"White 7"-"White 7": see FIG. 28). Information on the stop operation for displaying the stop on the valid line is notified. Further, in "Blue 7 Navi", the symbol combination corresponding to the internal winning combination "F_BB2", that is, the symbol combination related to the combination name "C_BB2" ("Blue 7"-"Blue 7"-"Blue 7": FIG. 28 Information on the stop operation for displaying the stop display on the valid line (see) is notified.

When the bonus combination and any of the internal winning combinations "missing", "F_special 1", "F_special 2" and "F_special 3" are determined in the inter-flag state, as described in FIG. 24. , The symbol combination related to the bonus combination (BB combination) can be stopped and displayed on the effective line. However, if the internal winning combination other than the internal winning combination "missing", "F_special 1", "F_special 2" and "F_special 3" and the bonus combination are winning, the symbol combination related to the bonus combination Cannot be stopped and displayed on the valid line. Therefore, in the present embodiment, as shown in FIGS. 63C and 63D, the carried-over bonus combination and the internal winning combination “missing”, “F_special role 1”, “F_special role 2” and “F_special role” Only when any of "3" is the winning bonus, the notification called "white 7 navigation" or "blue 7 navigation" is performed by the control of the main side. Therefore, in the present embodiment, the notification (navigation) called "white 7 navigation" or "blue 7 navigation" controlled by the main side can be performed at an appropriate timing at which the bonus combination can be won.

The pachi-slot machine 1 of the present embodiment is also provided with a function of notifying a bonus by displaying a bonus confirmation screen, turning on a bonus confirmation lamp, or the like. Therefore, on the main side, the navigation called "white 7 navigation" or "blue 7 navigation" may be performed only after announcing (bonus notification) that the bonus combination has been determined as the internal winning combination.

As the bonus notification, for example, an effect that is performed over a plurality of game periods (so-called continuous effect) is generally performed, and an effect that displays a bonus confirmation screen according to the result of this continuous effect is generally performed. There is. If "White 7 Navi" or the like is performed on the main side during such a continuous production, the result of the continuous production will be known on the way, which may spoil the interest. Therefore, in the present embodiment, after the bonus notification is made, the main control board 71 is notified (navigation) called "white 7 navigation" or "blue 7 navigation" by the control of the main side.

The method of making it possible for the main side to grasp the timing of the bonus announcement is arbitrary. As one of the methods, when the bonus combination is determined as the internal winning combination, the main control board 71 determines the number of games required until the end of the bonus notification, and after digesting the games of this number of games, "White 7 Navi" or A method of performing notification (navigation) called "blue 7 navigation" can be considered. More specifically, when the main control board 71 determines the number of games required until the end of the bonus notification, the main control board 71 notifies the sub control board 72 of the number of games. The sub-control board 72 controls the effect according to the number of games, and displays the bonus confirmation screen at the timing when the games of the number of games are exhausted, thereby grasping the timing when the bonus notification is made on the main side. Can be done. That is, the main control board 71 counts the number of unit games since the bonus combination is determined as the internal winning combination in a state where the bonus combination has not been carried over, and after the counting result reaches a predetermined number of times, the bonus combination And, when any one of the internal winning combination "missing", "F_special role 1", "F_special role 2" and "F_special role 3" is determined as the internal winning combination, "white 7 navigation" or "white 7 navigation" or " Perform "Blue 7 Navi".

Further, as another method, a method of controlling the bonus notification on the main side instead of the sub side can be considered. More specifically, when the main control board 71 determines the bonus combination as the internal winning combination in a state where the bonus combination is not carried over, the main control board 71 determines the effect (at least the number of games required for the effect) to be executed by the display device 11. Notify the sub-control board 72. By executing the effect notified by the sub-control board 72 and displaying the bonus confirmation screen, it is possible to grasp the timing at which the bonus notification is made on the main side.

It should be noted that the main side may be configured to be able to grasp the timing at which the bonus notification is made by a method other than the above-mentioned two methods. In this case, since the main control board 71 cannot receive the signal from the sub control board 72 or the like, it is necessary to grasp the timing at which the bonus notification is made based on the signal that the main control board 71 can accept. For example, since the main control board 71 can accept the signal associated with the stop operation, when a predetermined stop operation (for example, other than forward pressing) is performed while the bonus combination is determined as the internal winning combination. In addition, a method of notifying a bonus is also conceivable. Specifically, the sub-control board 72 acquires information on the internal winning combination and information on the stop operation from the main control board 71, and gives a bonus notification when the combination of these information is a predetermined combination. By adopting such a bonus notification method, the trigger of the bonus notification can also be grasped by the main control board 71, so that the timing at which the bonus notification is made can be grasped on the main side.

<Explanation of operation of main control circuit>
Next, with reference to FIGS. 64 to 170, the contents of various processes executed by the main CPU 101 of the main control circuit 90 by using the program will be described.

[Processing when power is turned on (reset interrupt)]
First, the power-on (reset interrupt) processing of the pachi-slot machine 1 performed under the control of the main CPU 101 will be described with reference to FIGS. 64 and 65. FIG. 64 is a flowchart showing the procedure at the time of power-on (reset interrupt), and FIGS. 65A to 65C are sources for executing the processes of S2, S7, S8, and S13 in the flowchart, respectively. It is a figure which shows an example of a program. In the power-on (reset interrupt) processing shown in FIG. 64, when the power management circuit 93 detects that the supply of the power supply voltage to the microprocessor 91 has started, the reset signal is sent to the microprocessor 91. It is output to the "XSRST" terminal, and is executed based on the interrupt request signal output from the interrupt controller 112 of the microprocessor 91 to the main CPU 101.

First, the main CPU 101 determines whether or not the power supply monitoring port (power supply monitoring means) is in the ON state (S1).

When the main CPU 101 determines in S1 that the power supply monitoring port is in the ON state (when the determination in S1 is YES), the main CPU 101 repeats the process of S1. The state in which the power supply monitoring port is on is a state in which the power supply voltage (DC + 5V) supplied to the main CPU 101 is not stable.

On the other hand, when the main CPU 101 determines in S1 that the power supply monitoring port is not in the ON state (NO determination in S1), the main CPU 101 performs initialization processing of the timer circuit 113 (PTC) (S2). In this process, the main CPU 101 performs the initial setting of the timer circuit 113. Specifically, the main CPU 101 sets the division ratio in the timer prescaler register (not shown), sets the timer control register (not shown) to interrupt enable, etc., and sets the timer counter (not shown). Set the initial count value.

Next, the main CPU 101 performs initialization processing of the first serial communication circuit 114 (SCU1) for the main control circuit 90 and the sub-control circuit 200, and the second serial communication circuit 115 (SCU2) for the second interface board. Initialization processing is performed (S3). Next, the main CPU 101 performs initialization processing of the random number circuit 110 (RDG) (S4). Next, the main CPU 101 performs a write test of the main RAM 103 (S5).

Next, as a result of the write test, the main CPU 101 determines whether or not the writing to the main RAM 103 is normally performed (S6).

In S6, when the main CPU 101 determines that the writing to the main RAM 103 has not been performed normally (when the determination in S6 is NO), the main CPU 101 performs the process of S13 described later. On the other hand, in S6, when the main CPU 101 determines that the writing to the main RAM 103 has been normally performed (when the determination in S6 is YES), the main CPU 101 is in the state of the timer control register (not shown) of the timer circuit 113. (S7).

Next, the main CPU 101 determines whether or not the current state is the occurrence timing of the interrupt process based on the acquired state of the timer control register (S8). Specifically, the main CPU 101 determines whether or not 1.1172 ms has elapsed from the start of the timer count based on the acquired state of the timer control register.

In the present embodiment, when the timer time 1.1172 ms is set by the initialization process of the timer circuit 113 of S2, the count process of the CPU built-in timer is started. After that, the status of the timer circuit 113 can be acquired by reading the information of the timer control register (not shown). Then, in the present embodiment, a bit (discrimination bit) capable of discriminating (seeing) whether or not the current state is the occurrence timing of the interrupt process (whether or not it is the timer interrupt state) in the timer control register. ) Is provided.

Therefore, in the process of S7, the main CPU 101 reads the information of the timer control register (not shown), and in the process of S8, the main CPU 101 is in the ON / OFF state of the discrimination bit in the timer control register (not shown). By referring to "1" / "0"), it is determined whether or not the current state is the occurrence timing of the interrupt process. When 1.1172 ms has elapsed from the start of counting by the timer circuit 113 (if the count value of the timer circuit 113 is 0), the discrimination bit is turned on.

In S8, when the main CPU 101 determines that the current state is not the timing at which the interrupt process occurs (when the determination in S8 is NO), the main CPU 101 returns the process to the process of S7 and repeats the processes after S7.

On the other hand, in S8, when the main CPU 101 determines that the current state is the occurrence timing of the interrupt process (when the determination in S8 is YES), the main CPU 101 performs a thumb check process (out of specification) (S9). .. In this process, the main CPU 101 performs a thumb check process of the main RAM 103, and this process is performed in an unspecified work area (see FIG. 12C) in the main RAM 103. Further, the program used in this thumb check process is stored in an unspecified area in the main ROM 102 (see FIG. 12B). The details of the thumb check process will be described later with reference to FIGS. 79 and 80 described later.

Further, in S8, when the main CPU 101 determines that the current state is the occurrence timing of the interrupt process (when the determination in S8 is YES), the main CPU 101 performs the interrupt process described later before the process in S9. The interrupt process (see FIG. 158 described later) is executed. Then, by this interrupt process, a no-operation command is transmitted from the main control circuit 90 (main control board 71) to the sub control circuit 200 (sub control board 72).

After the processing of S9, the main CPU 101 determines whether or not the setting key type switch 54 is in the ON state (S10).

In S10, when the main CPU 101 determines that the setting key type switch 54 is in the ON state (when the determination in S10 is YES), the main CPU 101 performs the process of S15 described later. On the other hand, in S10, when the main CPU 101 determines that the setting key type switch 54 is not in the ON state (when the determination in S10 is NO), the main CPU 101 determines the thumb check based on the result of the thumb check process in S9. It is determined whether or not the result is normal (S11).

In S11, when the main CPU 101 determines that the thumb check determination result is not normal (when the determination in S11 is NO), the main CPU 101 performs the process of S13 described later. On the other hand, in S11, when the main CPU 101 determines that the thumb check determination result is normal (when the determination in S11 is YES), the main CPU 101 performs a game return process (S12). In this process, the main CPU 101 performs a process of returning the game state to the state before the power failure detection. The details of the game return process will be described later with reference to FIG. 66 described later.

When the determination in S6 or S11 is NO, the main CPU 101 displays the character string "rr" indicating the occurrence of an error on the information display 6 (7-segment LED display) (S13). After that, the main CPU 101 repeats the WDT clearing process (S14).

Here, the process returns to S10 again, and if S10 is YES, the main CPU 101 performs a setting change confirmation process (S15). In this process, the main CPU 101 mainly performs a process of generating and storing a setting change command at the start of setting change. The details of the setting change confirmation process will be described later with reference to FIG. 68 described later.

Next, the main CPU 101 performs a RAM initialization process (S16). In this process, the main CPU 101 sets the address "at the time of RAM abnormality or at the start of setting change" in the game RAM area of the main RAM 103 shown in FIG. 12C as the start address of the initialization start, and the game starts from the start address. Erases (clears) the information up to the final address of the RAM area. Then, after the processing of S16, the main CPU 101 starts the main processing described later (see FIG. 82 described later).

In this embodiment, the power-on (reset interrupt) processing is performed as described above. Then, the processing of S2 during the power-on (reset interrupt) processing described above is performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 65A.

In the source program of FIG. 65A, 10 MHz (supply clock is 20 MHz) is set as the CPU clock, 228 is set as the prescaler register set value, and 49 is set as the initial count value. As a result, 1.1172 ms (= 1 / (10 MHz / 288) × 49) is calculated as the timer time (execution cycle) of the interrupt process.

Further, the processing of S7 and S8 during the power-on (reset interrupt) processing described above is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 65B. Specifically, the process of acquiring the state of the timer control register in S7 is executed by the "LD" instruction in FIG. 65B, and the determination process of S8 is executed by the "JBIT" instruction in FIG. 65B. Then, the "LD" command in FIG. 65B and the "JBIT" command in FIG. 65B are repeatedly executed from the start of counting by the timer circuit 113 until 1.1172 ms elapses, and when 1.1172 ms elapses from the start of counting by the timer circuit 113. , The interrupt request signal is output from the timer circuit 113 to the main CPU 101 via the interrupt controller 112. The main CPU 101 starts the interrupt processing having the first 1.1172 ms cycle after the power is restored, triggered by the input of the interrupt request signal.

Since the command related to the game operation is not set in the first 1.1172 ms cycle interrupt process immediately after the power is restored (after initialization when the power is turned on), the main control circuit 90 to the sub control circuit 200 No operation command is sent. By permitting the interrupt process immediately after the power is restored in this way, the no-operation command is transmitted in the shortest time after the power is restored, and the communication connection between the main control circuit 90 and the sub control circuit 200 can be established. The communication operation between the main control circuit 90 and the sub control circuit 200 can be stabilized.

Further, the data stored in the L register, the H register, the E register, the D register, and the C register are set in the communication parameters 1 to 5 constituting the non-operation command transmitted in this communication operation, respectively, when the power is restored. Will be done. Therefore, in the present embodiment, the data set in the communication parameters 1 to 5 of the non-operation command transmitted in the first interrupt process after the power is restored is different (undefined) each time the power is restored. Can be done. That is, the sum value (BCC) of the non-operation command transmitted in the interrupt process immediately after the power is restored (after the initialization at the time of turning on the power) can be made different for each power restoration. In this case, fraudulent acts such as goto can be suppressed.

Further, the processing (interrupt prohibition processing) of S13 during the power-on (reset interruption) processing described above is performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 65C. .. Then, control when displaying the error code "rr" on the 2-digit 7-segment LED in the information display 6 is executed by one source code "LDW HL, 100H * cZCHRR + cBX_PAYSEG" as shown in FIG. 65C. Then, the output operation of the 7-segment common output data to the 2-digit 7-segment LED and the output operation of the 7-segment cathode output data are performed at the same time.

That is, in the pachi-slot machine 1 of the present embodiment, the 7-segment common output data and the 7-segment cathode output data are output at the same time when the 2-digit 7-segment LED is dynamically lit and controlled. In this case, the number of instruction codes required for the dynamic lighting control of the 7-segment LED on the source program can be reduced, and the capacity of the source program (capacity used by the main ROM 102) can be reduced. Therefore, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

The "7-segment common output data" referred to here is LED drive data output to the common (common) terminal of the 7-segment LED when the 7-segment LED is dynamically controlled, and the "7-segment cathode output data" is. , This is LED drive data output to each cathode terminal of the 7-segment LED when the 7-segment LED is dynamically lit and controlled.

[Game return processing]
Next, with reference to FIGS. 66 and 67, the game return process performed in S12 during the power-on (reset interrupt) process (see FIG. 64) will be described. Note that FIG. 66 is a flowchart showing the procedure of the game return process, and FIG. 67 is a diagram showing an example of a source program for executing the processes of S25 to S32 in the flowchart.

First, the main CPU 101 sets the stack pointer (SP) at the time of power failure (S21). Next, the main CPU 101 clears (offs) the on-edge data before the 10-interrupt processing of the input port and the currently set on-edge data (S22). Next, the main CPU 101 sets the backup data of the output port in the output port (S23). Next, the main CPU 101 reads the data of the input port and saves the data in the current data storage area of the input port and before the interrupt processing (S24).

Next, the main CPU 101 sets the address of the rotating cylinder control data storage area (S25). Next, the main CPU 101 sets the number of reels to be checked (“3” in this embodiment) (S26).

Next, the main CPU 101 acquires reel control management information (data related to fluctuation control of the display column when a power failure occurs) of a predetermined reel based on the address of the set rotation cylinder control data storage area (S27). The reel control management information (variation control management information in the display column) is information related to the control state (rotation status) of each reel, and is backed up and saved at the time of power failure.

Next, the main CPU 101 determines whether or not the reel control management information is information corresponding to a rotation state during reel acceleration, constant speed waiting, or constant speed (S28).

When the main CPU 101 determines in S28 that the condition of S28 is not satisfied (NO determination in S28), the main CPU 101 performs the process of S31 described later. On the other hand, when the main CPU 101 determines in S28 that the condition of S28 is satisfied (YES in S28), the main CPU 101 clears the rotation cylinder control data (reel control management information) (S29). By this process, after returning to the game, the rotation control of the reel is started from the acceleration process. Next, the main CPU 101 sets the reel operation timing value (execution start timing “1” of the rotation cylinder control data) (S30). When "1" is set for the reel operation timing, the excitation change timing is set in the reel control process (see S903 in FIG. 158 described later), so that the main CPU 101 accelerates the reel rotation control. Start from.

After the processing of S30 or when the determination in S28 is NO, the main CPU 101 subtracts 1 from the value of the number of reels (S31). Next, the main CPU 101 determines whether or not the value of the number of reels after subtraction is "0" (S32).

In S32, when the main CPU 101 determines that the value of the number of reels after subtraction is not "0" (when the determination in S32 is NO), the main CPU 101 changes the reel to be checked and shifts the processing to the processing of S27. Return and repeat the processing after S27.

On the other hand, in S32, when the main CPU 101 determines that the value of the number of reels after subtraction is "0" (when the determination in S32 is YES), the main CPU 101 performs the RAM initialization process (S33). In this process, the main CPU 101 sets the address "at the time of power recovery" in the game RAM area of the main RAM 103 shown in FIG. 12C as the start address of the initialization start, and the final address of the game RAM area is set from the start address. Delete (clear) the information up to the address.

Next, the main CPU 101 restores the data of all the registers saved at the time of power failure detection to all the registers (S34). Then, after the processing of S34, the main CPU 101 ends the game return processing, and returns the processing to the processing at the time of power failure detection.

In the present embodiment, the game return process is performed as described above. In the game return processing of the present embodiment, as described above, the input / output state of each port at the time of power failure is secured at the time of power recovery, and when the reel is rotating at the time of power failure, the reel control management is performed at the time of power recovery. The information is acquired and the processing necessary for starting the re-rotation of the reel is also performed (see the processing of S25 to S32). Therefore, in the present embodiment, the reel rotation control can be stably performed even when the reel is recovered from the electric power failure during the rotation of the cylinder, and the player is not uncomfortable.

Further, the processes of S25 to S32 during the game return process described above are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 67. As described above, the microprocessor 91 with a security function for a gaming machine used in the pachi-slot machine 1 of the present embodiment is provided with various instruction codes dedicated to the main CPU 101. For example, the "LDQ" instruction (predetermined read instruction) in FIG. 67 is one of the main CPU 101 dedicated instruction codes.

For example, when the source code "LDQ HL, k" is executed on the source program, the address specified by the contents of the Q register (stored data) and the 1-byte integer k (direct value) becomes the HL register. Loaded into. At this time, the content of the Q register becomes the address value on the upper side of the designated destination address, and the integer k (direct value) becomes the address value on the lower side of the designated destination address. Therefore, when the source code "LDQ HL, .LOW.wR1_CTRL" in FIG. 67 is executed, the contents of the Q register (the address value on the upper side of the address of the rotation control data storage area) and the integer value ". The address (address of the rotation control data storage area) specified by "LOW.wR1_CTRL" (address value on the lower side of the address of the rotation control data storage area) is loaded into the HL register. It should be noted that ".LOW." Is not an actual instruction but a pseudo instruction. In this pseudo-instruction function, only the lower address of the address of the storage area specified after ".LOW." Is enabled. Further, the pseudo instruction is not an instruction stored in the actual ROM, but an instruction to be referred by the conversion program (assembler) when converting the source file into a format for storing in the ROM.

As described above, in the present embodiment, by using the instruction code dedicated to the main CPU 101 that specifies the address using the Q register (extended register), the main ROM 102, the main RAM 103, and the memory map I / O can be input by a direct value. Can be accessed. In this case, the instruction code related to the address setting can be omitted on the source program, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Setting change confirmation process]
Next, the setting change confirmation process performed in S15 during the power-on (reset interrupt) process (see FIG. 64) will be described with reference to FIGS. 68 and 69. Note that FIG. 68 is a flowchart showing the procedure of the setting change confirmation process, FIG. 69A is a diagram showing an example of a source program for executing the processes of S44 to S47 in the flowchart, and FIG. 69B is a diagram. It is a figure which shows an example of the source program for executing the process of S57 in the flowchart.

First, the main CPU 101 performs an initialization process of an unspecified RAM area in the main RAM 103 (S41). Next, the main CPU 101 performs one interrupt wait process (S42). In this process, the main CPU 101 waits until the process of transmitting the non-operation command by the interrupt process to the sub-control circuit 200 is completed.

Next, the main CPU 101 performs a RAM initialization process (S43). In this process, the main CPU 101 sets the address "at the time of RAM abnormality or at the start of setting change" in the game RAM area of the main RAM 103 shown in FIG. 12C as the start address of the initialization start, and the game starts from the start address. Erases (clears) the information up to the final address of the RAM area.

Next, the main CPU 101 determines whether or not the setting key type switch 54 is in the ON state (S44). The setting key (not shown) inserted into the setting key type switch 54 is an operation key for operating the setting (settings 1 to 6) of the pachi-slot machine 1, and when the setting key is turned on, it is for setting. The key type switch 54 is turned on.

In S44, when the main CPU 101 determines that the setting key type switch 54 is not in the ON state (when the determination in S44 is NO), the main CPU 101 ends the setting change confirmation process and turns on the power (reset interrupt). ) Move to the processing of S16 of the time processing (see FIG. 64). On the other hand, in S44, when the main CPU 101 determines that the setting key type switch 54 is in the ON state (YES determination in S44), the main CPU 101 performs a medal acceptance prohibition process (S45). By this process, the solenoid of the selector 66 (see FIG. 7) is not driven, and the inserted medals are ejected from the medal payout outlet 24 (see FIG. 2).

Next, the main CPU 101 sets the setting change start or setting confirmation start information (005H: first value) in the L register, and performs the generation / storage process of the setting change command (setting change / setting confirmation start) (S46). .. In this process, the main CPU 101 generates setting change command data (first command data) transmitted from the main control circuit 90 to the sub control circuit 200 at the start of the setting change process or the setting confirmation process, and uses the command data. It is stored in the communication data storage area provided in the main RAM 103. The details of the setting change command generation / storage process will be described later with reference to FIG. 70 described later. Further, the setting change command (setting change / setting confirmation start) saved in the communication data storage area is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158. Will be sent to.

Next, the main CPU 101 sets the error count relay to the ON state (S47). Next, the main CPU 101 determines whether the setting change or the setting confirmation has been performed (S48).

In S48, when the main CPU 101 determines that the setting has not been changed (the setting has been confirmed) (when the determination in S48 is NO), the main CPU 101 performs the process of S55 described later.

On the other hand, in S48, when the main CPU 101 determines that the setting has been changed (the setting has not been confirmed) (when the determination in S48 is YES), the main CPU 101 updates the set value (S49). ). Next, the main CPU 101 performs a 7-segment display setting process of the set value (S50). By this process, the updated set value can be displayed on the 7-segment LED in the information display 6.

Next, the main CPU 101 determines whether or not the reset switch 76 is in the ON state (S51).

When the main CPU 101 determines in S51 that the reset switch 76 is in the ON state (when the determination in S51 is YES), the main CPU 101 returns the process to the process of S49 and repeats the processes after S49. On the other hand, when the main CPU 101 determines in S51 that the reset switch 76 is not in the ON state (NO determination in S51), the main CPU 101 determines whether or not the start switch 79 is in the ON state (S52). ..

When the main CPU 101 determines in S52 that the start switch 79 is not in the ON state (when the determination in S52 is NO), the main CPU 101 returns the processing to the processing of S51 and repeats the processing after S51. On the other hand, when the main CPU 101 determines in S52 that the start switch 79 is in the ON state (when the determination in S52 is YES), the main CPU 101 is set in the set value storage area (not shown) provided in the main RAM 103. Store the value (S53).

Next, the main CPU 101 determines whether or not the setting key type switch 54 is in the off state (S54).

In S54, when the main CPU 101 determines that the setting key type switch 54 is not in the off state (when the determination in S54 is NO), the main CPU 101 repeats the process of S54. On the other hand, when the main CPU 101 determines in S54 that the setting key type switch 54 is in the off state (when the determination in S54 is YES), the main CPU 101 performs the process of S55 described later.

When the determination in S48 is NO or the determination in S54 is YES, the main CPU 101 determines whether the setting change or the setting confirmation has been performed (S55).

In S55, when the main CPU 101 determines that the setting has not been changed (the setting has been confirmed) (when the determination in S55 is NO), the main CPU 101 performs the process of S57 described later. On the other hand, in S55, when the main CPU 101 determines that the setting has been changed (the setting has not been confirmed) (when the determination in S55 is YES), the main CPU 101 performs the RAM initialization process (S56). .. In this process, the main CPU 101 uses the address (the address next to the setting value storage area) at the end of the setting change (the address next to the setting value storage area) in the gaming RAM area of the main RAM 103 shown in FIG. 12C as the start address of the initialization start. It is set and the information from the start address to the final address of the game RAM area is erased (cleared).

After processing S56 or when S55 is NO determination, the main CPU 101 sets the setting change end or setting confirmation end information (004H: second value) in the L register, and sets the setting change command (setting change / setting confirmation end). ) Is generated and stored (S57). In this process, the main CPU 101 generates setting change command data (second command data) transmitted from the main control circuit 90 to the sub control circuit 200 at the end of the setting change process or the setting confirmation process, and uses the command data. It is stored in the communication data storage area provided in the main RAM 103. The details of the setting change command generation / storage process will be described later with reference to FIG. 70 described later. Further, the setting change command (setting change / setting confirmation end) saved in the communication data storage area is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158. Will be sent to. Then, after the processing of S57, the main CPU 101 ends the setting change confirmation processing, and shifts the processing to the processing of S16 of the power-on (reset interrupt) processing (see FIG. 64).

In the present embodiment, the setting change confirmation process is performed as described above. The processes S44 to S47 during the above-mentioned setting change confirmation process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 69A. Among them, for example, the state determination process of the setting key of S44 is executed by the source code "BITQ 7, (.LOW. (WIBUF + 4))" in FIG. 69A, and the error count relay of S47 is set to the ON state. The process is executed by the source code "SETQ 1, (.LOW.wECRREQU)" in FIG. 69A.

Both the "BITQ" instruction and the "SETQ" instruction are instruction codes dedicated to the main CPU 101 that specify an address using a Q register (extended register).

For example, when the source code "BITQ b, (k)" is executed on the source program, the stored data (upper side address value) of the Q register and the 1-byte integer value k (direct value: lower side address value) are executed. ), And if bit b of the memory at the address specified by) is checked and "1" is stored in the bit b, "0" is set in the zero flag (bit 6: see FIG. 11) of the flag register F. If "0" is stored in the bit b, "1" is set in the zero flag (predetermined bit area) of the flag register F. Therefore, when the source code "BITQ 7, (.LOW. (WIBUF + 4)" in FIG. 69A is executed, the stored data of the Q register and the address specified by the integer value ".LOW. (WIBUF + 4)" are executed. If bit 7 of the memory of is checked and "1" is stored in the bit 7, "0" is set in the zero flag of the flag register F, and if "0" is stored in the bit 7. , "1" is set in the zero flag of the flag register F.

Further, for example, when the source code "SETQ b, (k)" is executed on the source program, the stored data (upper address value) of the Q register and the 1-byte integer value k (direct value: lower side) are executed. "1" is set in the bit b of the memory of the address specified by the address value). Therefore, when the source code "SETQ 1, (.LOW.wECRRQ)" in FIG. 69A is executed, the stored data of the Q register and the memory of the address specified by the integer value ".LOW.wECRRQ" are stored. "1" is set in bit 1.

That is, in the setting change confirmation process of the present embodiment, various main CPU 101 dedicated instruction codes using the Q register (extended register) as described above are used, and the direct value is obtained by using these main CPU 101 dedicated instruction codes. Then, the main ROM 102, the main RAM 103, and the memory map I / O can be accessed. In this case, the instruction code related to the address setting can be omitted, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, it is possible to increase the free space of the main ROM 102 and to speed up the processing.

Further, the generation / storage process of the setting change command (initialization command) performed at the start of the setting change / setting confirmation of S46 during the setting change confirmation process described above is performed by the main CPU 101 executing the "CALLF" command in FIG. 69A. The generation / storage process of the setting change command (initialization command) performed at the end of the setting change / setting confirmation of S57 described above is performed by the main CPU 101 executing the "CALLF" command in FIG. 69B. The "CALLF" instruction is also an instruction code dedicated to the main CPU 101.

For example, when the source code "CALLF mn" is executed on the source program, the value (stored data) of the current PC register (program counter PC: see FIG. 11) is specified by the stack pointer (SP). It is saved in the memory, the stack pointer is updated by -2, "mn" is stored in the PC register, and the process jumps to the address specified by "mn". However, the "CALLF" instruction is a 2-byte instruction, and the jumpable address range is in the range of 0000H to 11FFH. Therefore, for example, when the source code "CALLF SB_PCIIT_00" in FIG. 69A is executed, the value of the current PC register is saved in the memory specified by the stack pointer (SP), and the stack pointer is updated by -2. , The address of "SB_PCIIT_00" is stored in the PC register, and the process jumps to the address specified by "SB_PCIIT_00".

In the present embodiment, an instruction code called an "CALL" instruction is also prepared as an instruction code of the same type as the "CALLF" instruction. Then, for example, when the source code "CALL mn" is executed on the source program, the value (stored data) of the current PC register (program counter PC: see FIG. 11) becomes the same as the "CALLF" instruction. It is saved in the memory specified by the stack pointer (SP), the stack pointer is updated by -2, "mn" is stored in the PC register, and the process jumps to the address specified by "mn". However, the "CALL" instruction is a 3-byte instruction, and the jumpable address range is different from that of the "CALLF" instruction, and the jumpable address range is in the range of 0000H to FFFFH. Since the "CALLF" instruction is an instruction code having a smaller number of bytes than the "CALL" instruction, the capacity of the source program (the capacity used by the main ROM 102) can be reduced and the processing efficiency can be improved. be able to.

Further, in the setting change confirmation process of the present embodiment, as shown in FIGS. 69A and 69B, the jump destination address “SB_PCIT_00” specified by the “CALLF” command of S46 is the jump destination specified by the “CALLF” command of S57. Is the same as the address of. That is, in the present embodiment, the setting change command (initialization command) to be transmitted to the sub-control circuit 200 at the time of setting change (at the time of starting the game machine), at the time of setting confirmation start (during normal operation), and at the end of setting confirmation is generated and stored. The source programs for executing the above are the same as each other, and the source programs for the setting change command generation and storage processing used in both the S46 and S57 processes are shared (modularized).

In this case, since it is not necessary to separately provide the source program for the setting change command generation and storage processing in both the S46 and S57 processes, the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. .. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Setting change command generation and storage processing]
Next, the setting change command generation / storage process performed in S46 and S57 in the setting change confirmation process (see FIG. 68) will be described with reference to FIGS. 70 and 71. Note that FIG. 70 is a flowchart showing the procedure of the setting change command generation / storage process, and FIG. 71 is a diagram showing an example of a source program for executing the setting change command generation / storage process.

First, the main CPU 101 sets the information of the set values (1 to 6) in the E register (S61). Next, the main CPU 101 sets the RT state information in the C register (S62). Next, the main CPU 101 sets the command type information (02H) of the setting change command in the A register (S63).

Next, the main CPU 101 performs a communication data storage process (S64). In this process, the main CPU 101 has the information set in each register in S61 to S63 and the information set in the D register in S46 or S57 (see FIG. 68) (setting change start / setting change end / setting status). Setting change start / setting confirmation end) is used to generate setting change command data, and the generated command data is saved in the communication data storage area. The details of the communication data storage process will be described later with reference to FIG. 72 described later.

After the processing of S64, the main CPU 101 ends the setting change command generation and storage processing. When the setting change command generation / storage process performed in S46 during the setting change confirmation process (see FIG. 68) is terminated, the main CPU 101 performs the process after the process of S64 in the setting change confirmation process (see FIG. 68). Move to the processing of S47. Further, when the setting change command generation / storage processing performed in S57 during the setting change confirmation processing (see FIG. 68) is terminated, the main CPU 101 ends the setting change command generation / storage processing after the processing of S64, and also sets the settings. The change confirmation process (see FIG. 68) is also completed.

In the present embodiment, the setting change command generation / storage process is performed as described above. The above-mentioned setting change command generation / storage process is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 71.

As described above, in the setting change command generation / storage process, the setting status is stored in the D register as communication parameter 4 immediately before the setting change command generation / storage process is executed, and the setting value is set during the execution of the setting change command generation / storage process. Is stored in the E register as the communication parameter 3, and the RT information is stored in the C register as the communication parameter 5. That is, among the communication parameters 1 to 5 constituting the setting change command (initialization command), the communication parameters 3 to 5 are communication parameters (use parameters) used (analyzed) on the sub-control circuit 200 side. New information is set in the communication parameters. On the other hand, the other communication parameters 1 and 2 constituting the setting change command (initialization command) are communication parameters (unused parameters) that are not used (analyzed) on the sub-control circuit 200 side, and are for communication parameters 1 and 2. Then, the values currently stored in the L register and the H register are set. Therefore, the values of the communication parameters 1 and 2 at the time of transmitting the setting change command (initialization command) are undefined values. In this case, the sum value (BCC) of the setting change command can be set to an indefinite value for each transmission, and fraudulent acts such as goto can be suppressed.

[Communication data storage process]
Next, with reference to FIGS. 72 and 73, for example, the communication data storage process performed in S64 during the setting change command generation / storage process (see FIG. 70) will be described. The communication data storage process is executed not only when the setting change command is generated but also when other commands are generated. FIG. 72 is a flowchart showing the procedure of the communication data storage process, and FIG. 73 is a diagram showing an example of a source program for executing the processes of S71 to S76 during the communication data storage process.

First, the main CPU 101 stores the data set in the A register as communication command type data in the communication data temporary storage area (not shown) in the main RAM 103 (S71). Next, the main CPU 101 stores the data set in the H register and the L register in the communication data temporary storage area (predetermined storage area) in the main RAM 103 as parameters 1 and 2 of the communication command, respectively (S72). ..

Next, the main CPU 101 stores the data set in the D register and the E register as the parameters 3 and 4 of the communication command in the communication data temporary storage area in the main RAM 103 (S73). Next, the main CPU 101 stores the data set in the B register and the C register in the communication data temporary storage area in the main RAM 103 as the data of the parameter 5 and the RT state of the communication command, respectively (S74).

Next, the main CPU 101 generates BCC data (sum value) of the communication command from the data values set in the A register to the L register (S75). Next, the main CPU 101 stores the generated BCC data in the communication data temporary storage area in the main RAM 103 (S76).

After the processing of S76, the main CPU 101 determines whether or not there is a vacancy in the communication data storage area in the main RAM 103 (S77). In this embodiment, up to nine command data can be stored in the communication data storage area (see FIG. 75B described later).

When the main CPU 101 determines in S77 that there is no free space in the communication data storage area (when the determination in S77 is NO), the main CPU 101 ends the communication data storage process and, for example, a setting change command generation / storage process (when the communication data storage area is NO). (See FIG. 70) also ends.

On the other hand, when the main CPU 101 determines in S77 that there is a vacancy in the communication data storage area (when the determination in S77 is YES), the main CPU 101 is stored in the communication data temporary storage area by the above-mentioned processes S71 to S76. The communication data is stored in the communication data storage area as communication command data (S78).

Next, the main CPU 101 performs a communication data pointer update process (S79). In this process, the main CPU 101 mainly updates the communication data pointer indicating the storage address of the communication data in the communication data storage area. The details of the communication data pointer update process will be described later with reference to FIG. 74 described later.

Then, after the processing of S79, the main CPU 101 ends the communication data storage processing and, for example, the setting change command generation / storage processing (see FIG. 70).

In this embodiment, the communication data storage process is performed as described above. The processes S71 to S76 during the above-mentioned communication data storage process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 73. Then, in this series of processing, the storage processing of the communication command type data, various communication parameters, the game state flag data, and the BCC data included in the command data is as shown in FIG. 73, in the Q register on the source program. It is executed by using the "LDQ" instruction, which is an instruction code dedicated to the main CPU 101 that specifies an address using (extended register).

Specifically, by executing the source code "LDQ (.LOW. (WPDT_TPP + 0)), A", the type data of the communication command stored in the A register is 1 with the stored data (upper address value) in the Q register. It is stored in the communication data temporary storage area of the address specified by the integer value ".LOW. (WPDT_TMP + 0)" (lower address value) of the byte. Further, by executing the source code "LDQ (.LOW. (WPDT_TPP + 1)), HL", the communication parameter 1 stored in the L register becomes the stored data in the Q register and the 1-byte integer value ".LOW. (WPDT_TPP + 1)". The communication parameter 2 stored in the communication data temporary storage area of the address specified in "" and stored in the H register is stored in the communication data temporary storage area of the next address. Further, by executing the source code "LDQ (.LOW. (WPDT_TPP + 3)), DE", the communication parameter 3 stored in the E register is the data stored in the Q register and the 1-byte integer value ".LOW. (WPDT_TPP + 3)". The communication parameter 4 stored in the communication data temporary storage area of the address specified in "" and stored in the D register is stored in the communication data temporary storage area of the next address. Then, by executing the source code "LDQ (.LOW. (WPDT_TPP + 5)), BC", the communication parameter 5 stored in the C register is changed to the stored data in the Q register and the 1-byte integer value ".LOW. (WPDT_TPP + 5)". The game status flag data stored in the communication data temporary storage area of the address specified in "" and stored in the B register is stored in the communication data temporary storage area of the next address.

Further, the BCC data which is the sum value of the command data set in the communication data storage process is calculated by executing a series of source codes "ADD (addition instruction code) A, H" to "ADD A, B", and A. Stored in a register. Then, by executing the source code "LDQ (.LOW. (WPDT_TPP + 7)), A", the BCC data stored in the A register becomes the stored data in the Q register and the 1-byte integer value ".LOW. (WPDT_TPP + 7)". It is stored in the communication data temporary storage area of the address specified in.

As described above, in the present embodiment, when creating one packet (8 bytes) of communication data (command data), various parameters are transferred from the register and stored in the communication data temporary storage area (communication buffer). In such a command data creation method, the data stored in each register at the time of command generation is directly stored in the communication data temporary storage area as various parameters of the command data. Therefore, when command data including unused parameters is created, the value of the unused parameters becomes an undefined value each time it is created. In this case, even if there is command data of the same type and the values of the parameters used are the same, the sum value (BCC data) of the command data can be changed each time the command is created. Further, in the present embodiment, the calculation of the sum value, which is one of the error codes, is calculated by ADD (addition instruction code), but instead of the addition instruction code, SUB (subtraction instruction code) and XOR (exclusive OR) are used. The same effect can be obtained even if the error code is calculated by the instruction code). Further, the same effect can be obtained by calculating the error code using MUL (multiplication instruction code) or DIV (division instruction code), which is an instruction dedicated to the main CPU 101.

Therefore, in the present embodiment, by setting the unused parameter to an undefined value, it is possible to make it difficult to analyze the communication data and suppress fraudulent acts such as goto, and it is necessary to add unnecessary goto countermeasure processing. Therefore, it is possible to suppress the pressure on the program capacity of the main control circuit 90 due to the addition of the anti-goto processing.

[Communication data pointer update process]
Next, the communication data pointer update process performed in S79 during the communication data storage process (see FIG. 72) will be described with reference to FIGS. 74 and 75. 74 is a flowchart showing the procedure of the communication data pointer update process, FIG. 75A is a diagram showing an example of a source program for executing the communication data pointer update process, and FIG. 75B is a diagram showing an example of a source program for executing the communication data pointer update process. It is a figure which shows the structure of the communication data storage area which is actually set on the source program of an update process.

First, the main CPU 101 acquires the value of the currently set communication data pointer (S81).

Next, the main CPU 101 adds and updates the value of the communication data pointer by one packet (8 bytes) (S82). In this process, when the value of the updated communication data pointer is equal to or larger than the upper limit size of the communication data storage area (see FIG. 75B), the main CPU 101 sets the value of the updated communication data pointer to "0". This sets all the command data stored in the communication data storage area to invalid (makes it the same state as the discarded state).

In the present embodiment, the amount of data (1 packet) transmitted in one transmission operation is 8 bytes. That is, in the present embodiment, one command data can be transmitted by one transmission operation. Further, in the present embodiment, since a maximum of nine command data can be stored in the communication data storage area (see FIG. 75B), the upper limit size of the communication data storage area is 72 bytes (= 8 bytes × 9). .. Therefore, in the present embodiment, the range of the communication data pointer is set to "0" to "71", and the value of the communication data pointer after the update (when the communication data pointer is updated by +8) is "71 (when the communication data pointer is updated by +8) in the process of S82. If the value exceeds "upper limit value)", set the updated communication data pointer value to "0" (return the communication data storage destination address to the start address) and store the communication data. Disable all command data stored in the area (make it the same as the discarded state). If the value of the communication data pointer is set to "0", the next time the command data is stored in the communication data storage area, it is stored from the start address of the communication data storage area, so it is stored before that. The command data will be overwritten with new command data. Therefore, in the present embodiment, it is not necessary to initialize (clear) the communication data storage area when the value of the communication data pointer exceeds "71 (upper limit value)".

Then, after the processing of S82, the main CPU 101 ends the communication data pointer update processing and also ends the communication data storage processing (see FIG. 72).

In this embodiment, the communication data pointer update process is performed as described above. Then, the communication data pointer update process described above is performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 75A. Among them, the update process of the communication data pointer of S82 is executed by the "ADD" instruction and the "ICPLD" instruction (predetermined update instruction) in FIG. 75A, and this "ICPLD" instruction is also dedicated to the main CPU 101. It is an instruction code.

For example, when the source code "ICPLD A, n" is executed on the source program, the contents (stored data) of the A register are compared with the integer n, and when the contents of the A register are less than the integer n, the contents are compared. , "1" is added to the contents of the A register, and when the contents of the A register are an integer n or more, "0" is set in the A register.

Therefore, when the communication data pointer update process of S82 is executed, the source code "ADD A, 7" is first executed on the source program of FIG. 75A, and the contents of the A register (the communication data pointer before the update) are executed. "7" is added to the value), and the addition result is stored in the A register. Next, the source code "ICPLD A, 71" is executed, the contents of the A register (value of the communication data pointer after 7 additions) are compared with the integer "71", and the contents of the A register are less than the integer "71". If there is, "1" is added to the contents of the A register, and if the contents of the A register are an integer "71" or more, "0" is set in the A register. That is, in the process of S82, when the value of the communication data pointer is updated by +7, if the value of the updated communication data pointer exceeds the upper limit value "71", the process of clearing the communication data pointer to zero (communication). The process of returning the data storage address to the start address of the communication data storage area) is performed. On the other hand, if the updated communication data pointer value does not exceed the upper limit value "71", the communication data pointer value is totaled by adding "1" to the communication data pointer with the "ICPLD" command. Update +8.

As described above, in the present embodiment, in the communication data pointer update process, communication data is used by one "ICPLD" instruction code (an instruction code in which an upper limit determination instruction of a transmission buffer and a determination branch instruction are integrated). It is possible to collectively execute the pointer update (1 addition) process, the communication data pointer determination check process after the update, and the communication data pointer clear process. In this case, it is not necessary to provide an instruction code for executing each process separately. For example, the branch instruction code for determining whether or not the updated communication data pointer value exceeds the upper limit value "71" can be omitted.

Therefore, the capacity of the source program (capacity used by the main ROM 102) can be reduced by using the "ICPLD" instruction code dedicated to the main CPU 101 in the communication data pointer update process or the like. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Processing at the time of power failure (external)]
Next, the power failure (external) processing of the pachi-slot machine 1 performed under the control of the main CPU 101 will be described with reference to FIG. 76. FIG. 76 is a flowchart showing the procedure of the (external) processing at the time of power failure. In the power interruption (external) process shown in FIG. 76, when the power supply management circuit 93 detects a decrease in the power supply voltage (power interruption) supplied to the microprocessor 91, the power interruption detection signal is transmitted to the microprocessor 91. Is output to the "XINT" terminal of the above, and is executed based on the interrupt request signal output from the interrupt controller 112 of the microprocessor 91 to the main CPU 101.

First, the main CPU 101 saves the data set in all the registers (S91). Next, the main CPU 101 reads the data set in the power failure detection port (S92).

Next, the main CPU 101 determines whether or not the power failure detection port is in the ON state (S93).

In S93, when the main CPU 101 determines that the power failure detection port is not in the ON state (NO determination in S93), the main CPU 101 sets the interrupt processing permission (S94). Then, after the processing of S94, the main CPU 101 ends the (external) processing at the time of power failure. It should be noted that these processes performed when the determination in S93 is NO corresponds to the process of countermeasures against momentary power failure that occurs when the power supply management circuit 93 momentarily detects a power failure.

On the other hand, in S93, when the main CPU 101 determines that the power failure detection port is in the ON state (when the determination in S93 is YES), the main CPU 101 sets that the medal cannot be inserted and sets the stop of the hopper device 51. (S95).

Next, the main CPU 101 saves the value of the currently set stack pointer (SP) in the stack area of the game RAM area in the main RAM 103 (S96).

Next, the main CPU 101 performs a checksum generation process of the main RAM 103 (S97). This process is performed in the non-standard work area (see FIG. 12C) in the main RAM 103. Further, the program used in this checksum generation process is stored in the non-standard area in the main ROM 102 (see FIG. 12B). The details of the checksum generation process will be described later with reference to FIG. 77 described later.

Next, the main CPU 101 sets access prohibition to the main RAM 103 (S98). Then, after the processing of S98, an infinite loop processing is performed until the power supply is stopped (until the power supply voltage reaches a voltage at which the main CPU 101 cannot operate).

[Checksum generation process (non-standard)]
Next, with reference to FIGS. 77 and 78, the checksum generation process performed in S97 during the (external) process at the time of power failure (see FIG. 76) will be described. 77 is a flowchart showing the procedure of the checksum generation process, FIG. 78A is a diagram showing an example of a source program for executing the checksum generation process, and FIG. 78B is a checksum generation process. It is a figure which shows the state of the update operation of the stack pointer and the operation of reading data from a main RAM 103 to a register which are executed.

First, the main CPU 101 saves the value of the current stack pointer (SP) (the used address of the stack area of the game RAM area) in the non-standard stack area of the non-standard RAM area of the main RAM 103 (S101). Next, the main CPU 101 sets the address of the non-standard stack area in the stack pointer (S102). Next, the main CPU 101 sets the address value (F0H) on the upper side of the RAM address (address of the non-standard stack area) in the Q register (S103). Next, the main CPU 101 sets the power failure generation flag (S104).

Next, the main CPU 101 sets the stack pointer to the calculation start address of the sum value in the game RAM area, and sets the sum calculation counter to the value obtained by dividing the number of bytes of the sum value calculation target storage area by "2". Set (S105). The sum calculation counter is a counter for determining the end trigger of the sum value calculation, and is provided in the main RAM 103. Then, when the sum calculation counter set in S105 becomes "0", the sum value calculation process of the game RAM area of the main RAM 103 is terminated.

Next, the main CPU 101 clears the HL register to 0 (sets the value “0”) (S106). By this process, the initial value "0" of the sum value is set.

Next, the main CPU 101 executes an instruction code (source code "POP DE" shown in FIG. 78A) called an "POP instruction" (specific instruction), and stores the main RAM 103 set in the stack pointer (SP). The data (stored value) of the area for 2 bytes is read from the address of the area to the DE register (S107).

When the "POP" instruction is executed, the data (memory contents) stored in the 1-byte area of the address specified by the stack pointer is loaded into the lower register of the pair register and specified by the stack pointer. The data (memory contents) stored in the 1-byte area of the address where the added address is updated by 1 is loaded into the upper register of the pair register. Further, when the "POP" instruction is executed, an address update process for 2 bytes (a process of adding "2" to the address) is performed for the address set in the stack pointer (SP).

Therefore, in the processing of S107, the data (memory contents) stored at the address specified by the stack pointer is loaded into the E register and stored at the address specified by the stack pointer plus "1". The data (memory contents) is loaded into the D register.

FIG. 78B shows the operation of reading data to the DE register and the operation of updating the address set in the stack pointer when the “POP” instruction is executed. If the address set in the stack pointer (SP) is "F010h" at the start of calculation of the sum value, the data (memory contents) stored in the address "F010h" is loaded into the E register and the address. The data (memory contents) stored in "F011h" is loaded into the D register. Further, at this time, an update process of adding 2 to the address set in the stack pointer (SP) is performed, and the address set in the stack pointer (SP) is changed from "F010h" to "F012h". Then, when the "POP" instruction is executed again, the data (memory contents) stored in the address "F012h" is loaded into the E register, and the data (memory contents) stored in the address "F013h" is loaded. It is loaded into the D register. At this time, the address set in the stack pointer (SP) is updated, and the address set in the stack pointer (SP) is changed from "F012h" to "F014h". After that, every time the "POP" instruction is executed, the above-mentioned operation of reading data to the DE register and the operation of updating the address set in the stack ponter are repeated.

After the processing of S107, the main CPU 101 performs a sum value calculation processing (S108). Specifically, the main CPU 101 adds the value stored in the DE register to the value stored in the HL register, and stores the added value in the HL register as a sum value.

Next, the main CPU 101 subtracts 1 from the value of the sum calculation counter (S109). Next, the main CPU 101 determines whether or not the value of the updated sum calculation counter is “0” (S110).

In S110, when the main CPU 101 determines that the value of the sum calculation counter is not "0" (when the determination in S110 is NO), the main CPU 101 returns the processing to the processing of S107, and repeats the processing after S107. That is, the processes of S107 to S110 are repeated until the sum value calculation process of the gaming RAM area of the main RAM 103 is completed.

On the other hand, in S110, when the main CPU 101 determines that the value of the sum calculation counter is "0" (when the determination in S110 is YES), the main CPU 101 sets the DE register in the non-specified RAM area in the main RAM 103. The calculation start address of the sum value is set, and the non-standard sum count value is set in the sum calculation counter (S111). The non-standard sum count value is the number of bytes in the non-standard storage area. Therefore, when the sum calculation counter set in S111 becomes "0", the sum value calculation process of the non-standard RAM area of the main RAM 103, that is, the sum value calculation process of the entire main RAM 103 is completed.

Next, the main CPU 101 reads the data (stored value) of one byte from the address of the non-standard RAM area set in the DE register into the A register (S112).

Next, the main CPU 101 performs a sum value calculation process (S113). Specifically, the main CPU 101 adds the value stored in the A register to the value stored in the HL register, and stores the added value in the HL register as a sum value.

Next, the main CPU 101 adds 1 to the address stored in the DE register and subtracts 1 from the value of the sum calculation counter (S114). Next, the main CPU 101 determines whether or not the value of the updated sum calculation counter is “0” (S115).

In S115, when the main CPU 101 determines that the value of the sum calculation counter is not "0" (when the determination in S115 is NO), the main CPU 101 returns the processing to the processing of S112 and repeats the processing after S112. That is, the processes of S112 to S115 are repeated until the process of adding the sum value of the non-specified RAM area of the main RAM 103 to the sum value of the game RAM area is completed.

On the other hand, in S115, when the main CPU 101 determines that the value of the sum calculation counter is "0" (when the determination in S115 is YES), the main CPU 101 determines the value stored in the HL register when a power failure occurs. As the sum value of, it is stored in the sum value storage area (not shown) in the main RAM 103 (S116). Next, the main CPU 101 sets the value of the stack pointer (SP) stored in the non-specified stack area in S101 in the stack pointer (S117). Then, after the processing of S117, the main CPU 101 ends the checksum generation processing, and shifts the processing to the processing of S98 at the time of power failure (external) processing (see FIG. 76).

In this embodiment, the checksum generation process is performed as described above. The checksum generation process described above is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 78A. As described above, in the present embodiment, the checksum of the main RAM 103 when a power failure occurs is calculated by an addition formula. At this time, in the calculation of the sum value of the game RAM area, addition processing is performed in 2-byte units (see the source code "ADD HL, DE" in FIG. 78A), and in the non-standard RAM area, addition processing is performed in 1-byte units. (See the source code "ADDWB HL, A" in FIG. 78A).

[Sum check processing (non-regulation)]
Next, the thumb check process performed in S9 during the power-on process (see FIG. 64) will be described with reference to FIGS. 79 to 81. 79 and 80 are flowcharts showing the procedure of the thumb check process, and FIG. 81 is a diagram showing an example of a source program for executing the processes of S122 to S132 during the thumb check process.

First, the main CPU 101 saves the value of the current stack pointer (SP) in the non-specified stack area (S121). Next, the main CPU 101 sets the address of the sum value storage area in the stack pointer, and sets the value obtained by dividing the number of bytes of the sum value calculation target storage area by "2" in the sum calculation counter (S122). The sum calculation counter set here is a counter for determining the end trigger of the sum value calculation (sum value subtraction process), and is provided in the main RAM 103. Next, the main CPU 101 acquires a sum value (checksum) from the sum value storage area (S123). By this process, the checksum (initial value before subtraction) generated when the power failure occurs is stored in the HL register.

Next, the main CPU 101 executes the "POP" instruction and reads out the data (stored value) of 2 bytes from the address of the storage area of the main RAM 103 set in the stack pointer (SP) to the DE register (S124). .. At this time, by executing the "POP" instruction, the data (memory contents) stored in the 1-byte area of the address specified by the stack pointer is loaded into the E register, and the address specified by the stack pointer is used. 1 The data (memory contents) stored in the 1-byte area of the updated address is loaded into the D register (see FIG. 78B). Further, when the "POP" instruction is executed, an address update process for 2 bytes (a process of adding 2 addresses) is performed for the address set in the stack pointer (SP).

Next, the main CPU 101 performs a sum value calculation (subtraction) process (S125). Specifically, the main CPU 101 subtracts the value stored in the DE register from the value stored in the HL register (initial value of the sum value or the sum value after the previous subtraction process), and the subtraction is performed. Store the value as a sum value in the HL register.

Next, the main CPU 101 subtracts 1 from the value of the sum calculation counter (S126). Next, the main CPU 101 determines whether or not the value of the updated sum calculation counter is “0” (S127).

In S127, when the main CPU 101 determines that the value of the sum calculation counter is not "0" (when the determination in S127 is NO), the main CPU 101 returns the processing to the processing of S124, and repeats the processing after S124. That is, the processes of S124 to S127 are repeated until the subtraction process of the sum value is completed over the entire area of the gaming RAM area of the main RAM 103.

On the other hand, in S127, when the main CPU 101 determines that the value of the sum calculation counter is "0" (when the determination in S127 is YES), the main CPU 101 sets the DE register in the non-specified RAM area in the main RAM 103. The calculation start address of the sum value is set, and the non-standard sum count value is set in the sum calculation counter (S128). The non-standard sum count value is the number of bytes in the non-standard RAM area.

Next, the main CPU 101 reads the data (stored value) of one byte from the address of the non-standard RAM area set in the DE register into the A register (S129).

Next, the main CPU 101 performs a sum value calculation (subtraction) process (S130). Specifically, the main CPU 101 subtracts the value stored in the A register from the value stored in the HL register, and stores the subtracted value as a sum value in the HL register.

Next, the main CPU 101 adds 1 to the address stored in the DE register and subtracts 1 from the value of the sum calculation counter (S131). Next, the main CPU 101 determines whether or not the value of the updated sum calculation counter is "0" (S132).

In S132, when the main CPU 101 determines that the value of the sum calculation counter is not "0" (when the determination in S132 is NO), the main CPU 101 returns the processing to the processing of S129, and repeats the processing after S129. That is, the processes of S129 to S132 are repeated until the subtraction process of the sum value is completed over the entire area of the non-specified RAM area of the main RAM 103.

On the other hand, in S132, when the main CPU 101 determines that the value of the thumb calculation counter is "0" (when the determination in S132 is YES), the main CPU 101 sets "sum error" in the determination result of the thumb check process. (S133). Next, the main CPU 101 determines whether or not the calculated sum value is “0” (S134).

In this process, the main CPU 101 refers to the state (1/0) of the zero flag (bit 6) of the flag register F to determine whether or not the sum value is “0”. In the present embodiment, the sum value becomes "0" when the value of the sum calculation counter set in S128 becomes "0", that is, when the subtraction process of the sum value is completed over the entire area of the main RAM 103. If, "1" is set in the zero flag of the flag register F, and "0" is set in the zero flag of the flag register F if the sum value is not "0". Therefore, if "1 (on state)" is set in the zero flag of the flag register F at the time of processing in S134, the main CPU 101 determines that the sum value is "0".

In S134, when the main CPU 101 determines that the calculated sum value is not "0" (when the determination in S134 is NO), the main CPU 101 performs the process of S139 described later. On the other hand, in S134, when the main CPU 101 determines that the calculated sum value is "0" (when the determination in S134 is YES), the main CPU 101 sets "power failure abnormality" in the determination result (S135). ).

Next, the main CPU 101 acquires the power failure generation flag (S136). Next, the main CPU 101 determines whether or not the power failure generation flag is in a state without power failure (off state) (S137).

In S137, when the main CPU 101 determines that the power interruption occurrence flag is in the state of no power interruption (when the determination in S137 is YES), the main CPU 101 performs the process of S139 described later. On the other hand, in S137, when the main CPU 101 determines that the power interruption occurrence flag is not in the state of no power interruption (when the determination in S137 is NO), the main CPU 101 sets "normal" in the determination result (S138).

After the processing of S138, if S134 is a NO determination or S137 is a YES determination, the main CPU 101 saves the determination result in the thumb check determination result and clears (offs) the power failure occurrence flag (S139). Next, the main CPU 101 sets the value of the stack pointer (SP) stored in the non-specified stack area in S121 to the stack pointer (S140). Then, after the processing of S140, the main CPU 101 ends the thumb check processing, and shifts the processing to the processing of S10 of the power-on processing (see FIG. 64).

In this embodiment, the sum check process is performed as described above. Then, the processes of S122 to S132 during the above-mentioned sum check process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 81.

As described above, in the thumbchock determination process of the main RAM 103 in the present embodiment, first, the value of the checksum generated when the power failure occurs is sequentially subtracted from the data stored in the main RAM 103 when the power is restored. At this time, in the game RAM area, the subtraction process is performed in 2-byte units (see the source code "SUB HL, DE" in FIG. 81), and in the non-standard RAM area, the subtraction process is performed in 1-byte units (in FIG. 81). Source code "SUBWB HL, A") is performed. Next, it is determined whether or not an abnormality has occurred based on whether or not the final subtraction result is "0" (whether or not the zero flag is on). When the subtraction result is "0" (when the zero flag is on), it is determined to be normal, and when the subtraction result is not "0" (when the zero flag is off), it is abnormal. It is judged.

That is, in the present embodiment, the checksum generation process when a power failure occurs is performed by an addition method, and the checksum determination process when the power is restored is performed by a subtractive method. Then, normal / abnormal determination is performed based on the final subtraction result of the checksum. When such a checksum generation process and determination process are performed, it is not necessary to generate the checksum again when the power is restored and to collate the checksum with the checksum when the power failure occurs. In this case, the collation instruction code can be omitted on the source program, and the capacity of the source program can be reduced. As a result, in the present embodiment, in the main ROM 102, it is possible to secure a free space corresponding to the omission of the collation instruction code, and it is possible to utilize the increased free space to improve the playability. The "POP" instruction executed in the above-mentioned checksum generation process when a power failure occurs and the checksum determination process when the power is restored is a stack pointer (SP) operation-only instruction, and the source code ". In addition to "POP DE", there are source codes "POP HL", "POP AF" and the like.

[Main processing of pachislot under the control of the main CPU]
Next, with reference to FIG. 82, the main processing (main operation processing) of the pachi-slot machine 1 executed under the control of the main CPU 101 will be described. Note that FIG. 82 is a flowchart (hereinafter referred to as a main flow) showing the procedure of the main process.

First, the main CPU 101 performs a RAM initialization process (S201). In this process, the main CPU 101 sets the address "at the end of one game" in the game RAM area of the main RAM 103 shown in FIG. 12C as the start address of the initialization start, and from the start address to the game RAM area. Delete (clear) the information up to the final address. The storage area in this range is, for example, a storage area in which data needs to be erased for each unit game (game) such as an internal winning combination storage area and a display combination storage area.

Next, the main CPU 101 performs medal acceptance / start check processing (S202). In this process, the main CPU 101 performs an input check process such as a medal sensor (not shown) and a start switch 79. The details of the medal reception / start check process will be described later with reference to FIG. 83, which will be described later.

Next, the main CPU 101 performs a random number acquisition process (S203). In this process, the main CPU 101 uses a random number value for internal winning combination lottery (0 to 65535: a value of the random number register 0 of the random number circuit 110 that becomes a hard latch random number) and a random number value for production used in various ART-related lottery (0 to 65535). 0 to 65535: each value of the random number registers 1 to 3 of the random number circuit 110 that becomes a soft latch random number, 0 to 255: each value of the random number registers 4 to 7 of the random number circuit 110 that becomes a soft latch random number) and the like are extracted and described. The extracted various random number values are stored in the random number value storage area (not shown) provided in the main RAM 103. The details of the random number acquisition process will be described later with reference to FIG. 91 described later.

Next, the main CPU 101 performs an internal lottery process (S204). In this process, the main CPU 101 performs a process of determining the internal winning combination by lottery based on the random number value (hard latch random number) extracted in S203. The details of the internal lottery process will be described later with reference to FIG. 92 described later.

Next, the main CPU 101 performs a symbol setting process (S205). In this process, the main CPU 101 is, for example, a process of generating an internal winning combination from the hit request flag status (flag status information), a process of expanding the hit request flag data, and a process of storing the hit request flag data in the hit request flag storage area. And so on. The details of the symbol setting process will be described later with reference to FIG. 97, which will be described later.

Next, the main CPU 101 performs a start command generation / storage process (S206). In this process, the main CPU 101 generates data for a start command to be transmitted to the sub-control circuit 200, and stores the command data in a communication data storage area (see FIG. 75B) provided in the main RAM 103. The start command stored in the communication data storage area is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158. The start command is configured to include parameters (sub-flags, etc.) that specify internal winning combinations and the like.

Next, the main CPU 101 performs a second interface board control process (S207). The second interface board control process is executed in the non-standard work area of the main RAM 103. The details of the second interface board control process will be described later with reference to FIG. 102 described later.

Next, the main CPU 101 performs a state-specific control process (S208). In this process, the main CPU 101 mainly performs a game start process (start process) according to the game state. The details of the state-specific control process will be described later with reference to FIG. 104 described later.

Next, the main CPU 101 performs a reel stop initial setting process (S209). In this process, the main CPU 101 refers to the reel stop initial setting table (see FIG. 26), and sets the pull-in priority table selection table number, the pull-in priority table number, and the stop table number based on the internal winning combination and the game state. The process of acquiring and the process of storing "3" in the stop button non-operation counter are performed.

Next, the main CPU 101 performs a reel rotation start process (S210). In this process, the main CPU 101 requests the start of rotation of all reels. Then, when the start of rotation of all reels is requested, three stepping motors (not shown) are driven by an interrupt process (see FIG. 158 described later) executed at a fixed cycle (1.1172 msec). Is controlled, and rotation of the left reel 3L, the middle reel 3C, and the right reel 3R is started. Each reel is then accelerated and controlled until its rotational speed reaches a constant speed, after which it is controlled to maintain that constant speed.

Next, the main CPU 101 performs a reel rotation start command generation / storage process (S211). In this process, the main CPU 101 generates data of a reel rotation start command to be transmitted to the sub control circuit 200, and stores the command data in a communication data storage area (see FIG. 75B) provided in the main RAM 103. The reel rotation start command stored in the communication data storage area is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158. The reel rotation start command is configured to include a parameter indicating that the reel rotation start operation has been started.

Next, the main CPU 101 performs a pull-in priority storage process (S212). In this process, the main CPU 101 acquires the attraction priority data and stores it in the attraction priority data storage area. The details of the pull-in priority storage process will be described later with reference to FIG. 126 described later.

Next, the main CPU 101 performs a reel stop control process (S213). In this process, the main CPU 101 controls the rotation stop of the corresponding reel based on the timing at which the left stop button 17L, the middle stop button 17C, and the right stop button 17R are pressed and the internal winning combination. The details of the reel stop control process will be described later with reference to FIG. 138 described later.

Next, the main CPU 101 performs a winning search process (S214). In this process, the main CPU 101 stores the data in the symbol code storage area (see FIG. 35) in the winning operation flag storage area (see FIGS. 28 to 30). Further, in this process, the main CPU 101 determines whether or not the display combination is displayed on the valid line, and sets the number of medals to be paid out based on the determination result. The details of the winning search process will be described later with reference to FIG. 145, which will be described later.

Next, the main CPU 101 performs an illegal hit check process (S215). In this process, the main CPU 101 synthesizes a hit request flag (internal winning combination) and a winning operation flag (display combination), and determines whether or not there is an illegal hit error based on the combined result. The details of the illegal hit check process will be described later with reference to FIG. 148 described later.

Next, the main CPU 101 performs a winning check / medal payout process (S216). In this process, the main CPU 101 performs a process of generating a winning operation command. Further, in this process, the main CPU 101 drives the hopper device 51 and updates the number of credits based on the number of payouts of the display combination determined in S214, and performs the medal payout process. The details of the winning check / medal payout process will be described later with reference to FIG. 150 described later.

Next, the main CPU 101 performs a BB check process (S217). In this process, the main CPU 101 controls the operation and termination of the bonus state. The details of the BB check process will be described later with reference to FIG. 154 described later.

Next, the main CPU 101 performs an RT check process (S218). In this process, the main CPU 101 performs RT state transition control based on the symbol combination displayed as a stop on the effective line. The details of the RT check process will be described later with reference to FIGS. 155 and 156 described later.

Next, the main CPU 101 performs CZ / ART end processing (S219). In this process, the main CPU 101 mainly performs a CZ pullback lottery process. The details of the CZ / ART end processing will be described later with reference to FIG. 157 described later. Then, after the processing of S219 (after the end of one game), the main CPU 101 returns the processing to the processing of S201.

[Medal reception / start check processing]
Next, the medal acceptance / start check process performed in S202 in the main flow (see FIG. 82) will be described with reference to FIGS. 83 and 84. FIG. 83 is a flowchart showing the procedure of the medal acceptance / start check process, and FIG. 84 is a diagram showing an example of a source program for executing the processes of S231 to S233 during the medal acceptance / start check process. be.

First, the main CPU 101 determines whether or not the value of the automatic insertion medal counter is "0" (whether or not there is an automatic insertion request) (S221). In this process, when the automatic insertion medal counter is "1" or more, the main CPU 101 determines that there is an automatic insertion request. Further, the automatic insertion medal counter is data for identifying whether or not the display combination related to the replay is established in the previous unit game. When the display combination related to the re-game is established, the number of medals inserted in the previous unit game is automatically inserted into the automatic insertion medal counter.

In S221, when the main CPU 101 determines that the value of the automatic insertion medal counter is "0" (when the determination in S221 is YES), the main CPU 101 performs the process of S225 described later.

On the other hand, in S221, when the main CPU 101 determines that the value of the automatic insertion medal counter is not "0" (when the determination in S221 is NO), the main CPU 101 performs the medal insertion process (S222). In this process, the main CPU 101 performs a medal insertion command generation / storage process, an LED lighting control process for the number of medals inserted, and the like. The details of the medal insertion process will be described later with reference to FIG. 85 described later.

Next, the main CPU 101 subtracts 1 from the value of the automatic insertion medal counter (S223). Next, it is determined whether or not the value of the automatically inserted medal counter after subtraction is "0" (S224).

In S224, when the main CPU 101 determines that the value of the automatic insertion medal counter is not "0" (when the determination in S224 is NO), the main CPU 101 returns the processing to the processing of S222 and repeats the processing after S222.

On the other hand, in S224, when the main CPU 101 determines that the value of the automatic insertion medal counter is "0" (when S224 is a YES determination), or when S221 is a YES determination, the main CPU 101 is used for medal auxiliary storage. The warehouse switch check process is performed (S225). In this process, the main CPU 101 detects whether or not the medal auxiliary storage 52 is full of medals based on the on / off state of the medal auxiliary storage switch 75.

Next, the main CPU 101 performs a medal insertion state check process (S226). Next, the main CPU 101 determines whether or not the medal can be inserted based on the result of the medal insertion state check process (S227).

When the main CPU 101 determines in S227 that the medal can not be inserted (when the determination in S227 is NO), the main CPU 101 performs the process of S231 described later.

On the other hand, when the main CPU 101 determines in S227 that the medal can be inserted (when the determination in S227 is YES), the main CPU 101 performs a medal insertion check process (S228). In this process, the main CPU 101 credits the medal, for example, based on the medal sensor input state, a process of determining whether or not the medal has passed normally, or when the number of medals inserted exceeds a specified number. Perform processing and so on. The details of the medal insertion check process will be described later with reference to FIG. 87 described later.

Next, the main CPU 101 determines whether or not the medal can be inserted or credited based on the result of the medal insertion check process (S229).

When it is determined in S229 that the main CPU 101 is in a state where medals can be inserted or credited (when the determination in S229 is YES), the main CPU 101 performs the process of S231 described later. On the other hand, when it is determined in S229 that the main CPU 101 is not in a state where medals can be inserted or credited (when the determination in S229 is NO), the main CPU 101 performs a medal acceptance prohibition process (S230). By this process, the solenoid of the selector 66 (see FIG. 4) is not driven, and the inserted medals are ejected from the medal payout outlet 24.

After the processing of S230, if S227 is a NO determination or S229 is a YES determination, the main CPU 101 determines whether or not the current number of inserted medals is the number of playable starts (S231). In this embodiment, the number of cards that can be started is three (see FIGS. 28 to 30).

In S231, when the main CPU 101 determines that the current number of inserted medals is the number of playable start numbers (when the determination in S231 is YES), the main CPU 101 performs the process of S234 described later. On the other hand, in S231, when the main CPU 101 determines that the current number of inserted medals is not the playable start number (when the determination in S231 is NO), the main CPU 101 determines whether or not there is a medal inserted (S232). ).

In S232, when the main CPU 101 determines that a medal has been inserted (when the determination in S232 is YES), the main CPU 101 returns the process to S226 and repeats the processes after S226. On the other hand, when the main CPU 101 determines in S232 that no medal has been inserted (NO determination in S232), the main CPU 101 performs the setting change confirmation process described with reference to FIG. 68 (S233). In this process, the main CPU 101 performs a process of generating and storing a setting change command at the start of setting confirmation.

After the processing of S233 or when the determination in S231 is YES, the main CPU 101 determines whether or not the start switch 79 is in the ON state (S234).

When the main CPU 101 determines in S234 that the start switch 79 is not in the ON state (when the determination in S234 is NO), the main CPU 101 returns the process to S226 and repeats the processes after S226.

On the other hand, when the main CPU 101 determines in S234 that the start switch 79 is in the ON state (when the determination in S234 is YES), the main CPU 101 performs a medal acceptance prohibition process (S235). By this process, the solenoid of the selector 66 (see FIG. 4) is not driven, and the inserted medals are ejected from the medal payout outlet 24. Then, after the processing of S235, the main CPU 101 ends the medal acceptance / start check processing, and shifts the processing to S203 of the main flow (see FIG. 82).

In this embodiment, the medal acceptance / start check process is performed as described above. Then, the processes of S231 to S233 during the above-mentioned medal acceptance / start check process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 84. Among them, in the processing of S233, the processing is jumped to the address "SB_WVSC_00" of the execution program of the setting change confirmation processing by the "CALLF" instruction which is the instruction code dedicated to the main CPU 101, and the setting change confirmation described with reference to FIGS. 68 and 69. Perform processing.

Then, the process of S233 during the above-mentioned medal acceptance / start check process, that is, the setting change confirmation process, is executed regardless of the game state. Therefore, in the present embodiment, regardless of the gaming state, that is, even if the gaming state is a bonus state (special prize operating state), the set value and the hall menu (various history data (error, power failure history, etc.)) are displayed. It can be confirmed and fraudulent acts such as bonuses can be suppressed.

[Medal insertion process]
Next, with reference to FIGS. 85 and 86, the medal insertion process performed in S222 during the medal acceptance / start check process (see FIG. 83) will be described. Note that FIG. 85 is a flowchart showing the procedure of the medal insertion process, and FIG. 86 is a diagram showing an example of a source program for executing the medal insertion process.

First, the main CPU 101 adds "1" to the value of the medal counter (S241). The medal counter is a counter for counting the number of inserted medals, and is provided in the main RAM 103.

Next, the main CPU 101 performs a medal insertion command generation / storage process (S242). In this process, the main CPU 101 generates data of a medal insertion command to be transmitted to the sub control circuit 200, and stores the command data in a communication data storage area (see FIG. 75B) provided in the main RAM 103. The medal insertion command stored in the communication data storage area is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158. That is, the medal insertion command is transmitted from the main control circuit 90 to the sub control circuit 200 each time one medal is inserted. The medal insertion command is configured to include parameters for specifying the number of inserted medals and the like.

Next, the main CPU 101 turns off the first to third LEDs for displaying the number of inserted medals included in the LED 82 (see FIG. 7) (S243). Next, the main CPU 101 calculates LED lighting data (lighting control data) corresponding to the number of inserted medals based on the number of inserted medals (value of the medal counter) (S244). In this process, for example, when the number of inserted medals is one, LED lighting data for lighting only the first LED for displaying the number of inserted medals is calculated, and for example, when the number of inserted medals is three. LED lighting data for lighting all of the first to third LEDs for displaying the number of inserted medals is calculated. The method for calculating the LED lighting data will be described in detail later.

Next, the main CPU 101 uses the calculated LED lighting data to light the corresponding LED for displaying the number of inserted medals (S245). Then, after the processing of S245, the main CPU 101 ends the medal insertion processing, and shifts the processing to S223 of the medal acceptance / start check processing (see FIG. 83).

In the present embodiment, the medal insertion process is performed as described above. The medal insertion process described above is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 86. Among them, in the process of S244, the LED lighting data for displaying the number of inserted medals is generated not by the loop process referring to the table but by the arithmetic process. This arithmetic processing is performed by sequentially executing the source codes "LD A, L" to "OR L" in the source program shown in FIG. 86 by the main CPU 101.

In this arithmetic processing, first, by executing the source code "LD A, L", the data of the number of inserted medals stored in the L register is stored in the A register. For example, when the number of inserted medals is 3, "00000011B" ("3" in decimal) is stored in the A register. In this embodiment, the 1-byte data is referred to as "***** B", but the last character "B" is "0" or "1" indicated before the character "B". Means that "" is bit data.

Next, by executing the source code "ADD A, A", the data stored in the A register is added to the data stored in the A register, and the addition result is stored in the A register. For example, when the data stored in the A register before the execution of this "ADD" instruction is "00000011B" (when the number of inserted medals is 3), this "ADD" instruction causes the addition result. "00000011B" is stored in the A register.

Next, by executing the source code "DEC A", the data stored in the A register is decremented by 1, and the subtraction result is stored in the A register. For example, if the data stored in the A register before the execution of the "DEC" instruction is "00000011B", the subtraction result "000000101B" is stored in the A register by this "DEC" instruction. ..

Next, by executing the source code "OR L", a logical sum operation is performed between the data stored in the L register (the number of inserted medals) and the data stored in the A register, and the operation result is stored in the A register. Stored. For example, when the data stored in the A register is "000000101B" and the data stored in the L register is "000000111B" before the execution of this "OR" instruction (the number of medals inserted is three). In the case of), this "OR" instruction stores "000000111B", which is the result of the OR operation of both data, in the A register. Then, the data stored in the A register by executing the "OR" command becomes the LED lighting data (data indicating the lighting state of the medal insertion LED) for displaying the number of inserted medals.

For example, when the number of inserted medals is 3, as described above, the final calculation result "000000111B" is for displaying the number of inserted medals by the calculation process of the LED lighting data for displaying the number of inserted medals in S244. It becomes LED lighting data. Then, in the present embodiment, "1/0" of bit 0 of the finally calculated LED lighting data is "on / off" of the output port to the LED (first LED) for displaying the number of inserted medals of the first piece. Corresponds to the "1/0" state of bit 1 corresponds to the "on / off" state of the output port to the LED (second LED) for displaying the number of inserted medals of the second piece, and "1" of bit 2. "/ 0" corresponds to the "on / off" state of the output port to the LED (third LED) for displaying the number of inserted medals. Therefore, when the number of inserted medals is 3, as described above, "000000111B" is generated as the LED lighting data, so that all the output ports of the first to third LEDs for displaying the number of inserted medals are used. It is set to the on state, and all the first to third LEDs for displaying the number of inserted medals are turned on.

When the LED lighting data for displaying the number of inserted medals is generated by arithmetic processing as described above, the table data referred to when generating the LED lighting data for displaying the number of inserted medals is not required, so that the table area of the main ROM 102 It is possible to increase the free space of the program and minimize the increase in the capacity of the program. That is, in the above-mentioned medal insertion process of the present embodiment, the process of displaying the medal insertion LED can be made more efficient, the free capacity of the main ROM 102 is secured (increased), and the increased free area is utilized. It becomes possible to improve the playability.

[Medal insertion check process]
Next, the medal insertion check process performed in S228 during the medal acceptance / start check process (see FIG. 83) will be described with reference to FIGS. 87 and 88. FIG. 87 is a flowchart showing the procedure of the medal insertion check process, and FIG. 88 is a diagram showing an example of a source program for executing the processes of S255 to S258 during the medal insertion check process.

First, the main CPU 101 determines whether or not the game is being replayed (S251).

When the main CPU 101 determines in S251 that the game is being replayed (YES in S251), the main CPU 101 ends the medal insertion check process and performs the medal acceptance / start check process (see FIG. 83). Move to S229.

On the other hand, when the main CPU 101 determines in S251 that the game is not being replayed (NO determination in S251), the main CPU 101 permits medal acceptance (S252). In this process, the solenoid of the selector 66 (see FIG. 4) is driven, and the medals inserted from the medal insertion slot 14 are accepted. The accepted medals are counted and then guided to the hopper device 51.

Next, the main CPU 101 performs a bet button check process (S253). In this process, the main CPU 101 determines whether or not the bet button (MAX bet button 15a or 1-bet button 15b) has been operated based on the ON / OFF state of the BET switch 77. Next, the main CPU 101 determines whether or not the bet operation is completed based on the result of the bet button check process in S253 (S254).

When the main CPU 101 determines in S254 that the betting operation has been completed (when the determination in S254 is YES), the main CPU 101 ends the medal insertion check process and performs the medal acceptance / start check process (see FIG. 83). Move to S229.

On the other hand, in S254, when the main CPU 101 determines that the betting operation has not been completed (NO determination in S254), the main CPU 101 determines that the medal sensor input state (game medium acceptance state) at the time of the current processing. Acquires the medal sensor input state at the time of the previous processing (S255). The medal sensor input state is information indicating the passing status of the medal received in the medal insertion slot 14 in the selector 66, and is the detection result of each medal sensor (not shown) provided at the entrance and the exit of the selector 66. Generated by.

In the present embodiment, the medal sensor input state is represented by 1-byte (8-bit) data of the upstream first medal sensor (not shown) provided side by side in the medal passing direction at the exit of the selector 66. The detection result corresponds to the bit 0 information (“0” or “1”), and the detection result of the second medal sensor (not shown) on the downstream side corresponds to the bit 1 information (“0” or “1”). do. When the passage of the medal is detected by the first medal sensor, "1" is set in bit 0, and when the passage of the medal is detected by the second medal sensor, "1" is set in bit 1. Will be done. Therefore, the medal sensor input state "0000000000B" indicates the state before or after passing the medal (at the time of passing), and the medal sensor input state "00000001B" indicates the state at the start of passing the medal, and the medal sensor input state "00000001B". "00000011B" indicates a state in which the medal is passing, and "00000010B" in which the medal sensor is input indicates a state immediately before the completion of passing the medal.

Next, the main CPU 101 determines whether or not the medal sensor input state at the time of the current processing has changed from the medal sensor input state at the time of the previous processing (S256).

In S256, when the main CPU 101 determines that the medal sensor input state at the time of the current processing has not changed from the medal sensor input state at the time of the previous processing (when the determination in S256 is NO), the main CPU 101 is described in S261 described later. Perform processing.

On the other hand, in S256, when the main CPU 101 determines that the medal sensor input state at the time of the current processing has changed from the medal sensor input state at the time of the previous processing (when the determination in S256 is YES), the main CPU 101 is at the time of the previous processing. Based on the medal sensor input state, a normal value (normal change value) of the medal sensor input state obtained at the time of the current processing is generated by arithmetic processing (S257).

In this process, when the medal sensor input state at the time of the previous process is "0000000000B" (when both the first and second medal sensors have not detected medals), it is regarded as a normal change value of the medal sensor input state. When "00000001B" (when the first medal sensor is medal detection and the second medal sensor is not medal detection) is generated and the medal sensor input state at the time of the previous processing is "00000001B", the medal sensor "00000011B" (when both the first and second medal sensors are medal detection) is generated as a normal change value of the input state. Further, in this process, when the medal sensor input state at the time of the previous process is "00000011B", the normal change value of the medal sensor input state is "00000010B" (the first medal sensor has not detected a medal, and the second (When the medal sensor is medal detection) is generated, and when the medal sensor input state at the time of the previous processing is "00000010B", the normal change value of the medal sensor input state is "0000000000B" (first and second medals). If both sensors do not detect medals) is generated. The method of generating (calculating) the normal change value of the medal sensor input state will be described in detail later.

Next, the main CPU 101 determines whether or not the medal sensor input state at the time of the current processing is the same as the normal change value generated in S257 (S258). In this determination process, it is determined whether or not a medal retrograde error has occurred, and if the determination condition of S258 is not satisfied, the main CPU 101 determines that a medal retrograde error has occurred.

In S258, when the main CPU 101 determines that the medal sensor input state at the time of the current processing is not the same as the normal change value generated in S257 (when the determination in S258 is NO), the main CPU 101 performs the processing of S262 described later. conduct.

On the other hand, in S258, when the main CPU 101 determines that the medal sensor input state at the time of the current processing is the same as the normal change value generated in S257 (when the determination in S258 is YES), the main CPU 101 is at the time of the current processing. It is determined whether or not the medal sensor input state of the above is the state at the time of passing the medal (“00000000B”) (S259). In S259, when the main CPU 101 determines that the medal sensor input state at the time of the current processing is the state at the time of passing the medal (when the determination in S259 is YES), the main CPU 101 performs the processing of S263 described later.

In S259, when the main CPU 101 determines that the medal sensor input state at the time of the current processing is not the state at the time of passing the medal (when the determination in S259 is NO), the main CPU 101 sets the medal passing check timer (S260). The time set in the medal passage check timer in this process can be set to any time as long as it is possible to determine whether or not the medal has passed the selector 66. Further, the timer value set in this process may be changed, for example, according to the medal sensor input state at the time of the current process.

After the processing of S260 or when the determination of S256 is NO, the main CPU 101 has the medal sensor input state at the time of the current processing being the medal passing state (“000000111B”), and whether or not the medal passing check timer is stopped. (S261). In this determination process, it is determined whether or not a medal passing error (inserted medal passing time error) has occurred, and if the determination condition of S261 is satisfied, the main CPU 101 determines that a medal passing error has occurred.

When the main CPU 101 determines in S261 that the determination condition of S261 is not satisfied (NO determination in S261), the main CPU 101 returns the process to the process of S253 and repeats the processes after S253.

On the other hand, in S261, when the main CPU 101 determines that the determination condition of S261 is satisfied (when S261 is a YES determination), or when S258 is a NO determination, that is, a medal passing error or a medal retrograde error has occurred. If it is determined, the main CPU 101 performs error processing (S262). In this process, the main CPU 101 performs various processes when an error occurs, such as an error command generation / storage process. The details of error handling will be described later with reference to FIG. 89 described later. Then, after the processing of S262, the main CPU 101 returns the processing to the processing of S253, and repeats the processing after S253.

Here, returning to the process of S259 again, if S259 is a YES determination, the main CPU 101 determines whether or not a specified number of medals (three in this embodiment) have already been inserted (S263). ..

In S263, when the main CPU 101 determines that the specified number of medals have not been inserted (when the determination in S263 is NO), the main CPU 101 performs the medal insertion process described with reference to FIG. 85 (S264). Then, after the processing of S264, the main CPU 101 returns the processing to the processing of S253, and repeats the processing after S253.

On the other hand, in S263, when the main CPU 101 determines that a specified number of medals have already been inserted (when the determination in S263 is YES), the main CPU 101 adds "1" to the value of the credit counter (S265). ). Next, the main CPU 101 performs a medal insertion command generation / storage process (S266). In this process, the main CPU 101 generates data of a medal insertion command to be transmitted to the sub control circuit 200, and stores the command data in a communication data storage area (see FIG. 75B) provided in the main RAM 103. The medal insertion command stored in the communication data storage area is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158.

Next, the main CPU 101 determines whether or not the number of credits of the medal is the upper limit value (50 in the present embodiment) based on the value of the credit counter (S267).

In S267, when the main CPU 101 determines that the number of credits for medals is not the upper limit value (when the determination in S267 is NO), the main CPU 101 returns the processing to the processing of S253 and repeats the processing after S253. On the other hand, in S267, when the main CPU 101 determines that the number of credits for medals is the upper limit (when the determination in S267 is YES), the main CPU 101 ends the medal insertion check process and performs the medal acceptance / start check process. Move to S229 of the process (see FIG. 83).

In the present embodiment, the medal insertion check process is performed as described above. Then, the processes of S255 to S258 during the above-mentioned medal insertion check process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 88. Among them, the process of generating the normal change value of the medal sensor input state of S257 is performed not by the process of referencing and acquiring the table, but by the arithmetic process. Specifically, the normal change value generation process is performed by the main CPU 101 executing the source codes "RLA" and "AND cBX_MDINSW" in the source program shown in FIG. 88 in this order.

The "RLA" instruction is an instruction code that shifts the 1-byte data stored in the A register to the left (in the direction from bit 0 to bit 7) once (for one bit). In the example shown in FIG. 88, the 1-byte data indicating the previous medal sensor input state stored in the A register by the source code “LD A, B” executed before the “RLA” instruction is the “RLA” instruction. Will shift to the left once. At this time, the bit data newly stored in bit 0 is determined based on the execution result of the source code "CP cBX_MDISW2" executed before the "RLA" instruction.

The "CP" instruction is an instruction code that executes a comparison operation. Further, "cBX_MDISW2" is 1 byte of data, and is "00000010B" in this embodiment. When the source code "CP cBX_MDISW2" is executed, 1-byte data indicating the previous medal sensor input state stored in the A register is compared with "cBX_MDISW2 (00000010B)".

Then, as a result of executing the source code "CP cBX_MDISW2", if the result that the 1-byte data indicating the previous medal sensor input state is less than "cBX_MDISW2 (00000010B)" is obtained, the carry flag of the flag register F is obtained. (See FIG. 11) is set to "1", and when the "RLA" instruction is executed, the carry flag "1" of the flag register F is stored in bit 0 of the A register. On the other hand, when the result of executing the source code "CP cBX_MDISW2" is that the 1-byte data indicating the previous medal sensor input state is "cBX_MDISW2 (00000010B)" or more, the carry flag of the flag register F is obtained. (See FIG. 11) is set to "0", and when the "RLA" instruction is executed, the carry flag "0" of the flag register F is stored in bit 0 of the A register.

Therefore, for example, if the 1-byte data indicating the previous medal sensor input state is "0000000000B (state before or after passing the medal (when passing))" (<"cBX_MDISW2"), the "RLA" command is issued. By execution, "00000001B" is generated, and if the 1-byte data indicating the previous medal sensor input status is "00000001B (state at the start of passing the medal)" (<"cBX_MDISW2"), the "RLA" instruction is executed. Will generate "00000011B". On the other hand, for example, if the 1-byte data indicating the previous medal sensor input state is "00000011B (state during medal passing)" (> "cBX_MDISW2"), "00000011B" is generated by executing the "RLA" instruction. If the 1-byte data indicating the previous medal sensor input state is "00000010B (state immediately before the completion of medal passage)" (= "cBX_MDISW2"), "00000100B" is generated by executing the "RLA" command. To.

Next, when the source code "AND cBX_MDINSW" is executed, the 1-byte data (stored data in the A register) generated by executing the "RLA" instruction is logically ANDed with the 1-byte data "cBX_MDINSW", and the medal sensor. The normal change value of the input state is calculated. The 1-byte data "cBX_MDISW" is "00000011B" in the present embodiment. Therefore, when the source code "AND cBX_MDINSW" is executed, only the data of bit 0 and bit 1 in the stored data of the A register is masked, and the other bit data becomes "0".

As a result, for example, if the 1-byte data indicating the previous medal sensor input state is "0000000000B (state before passing the medal)", the normal change value of the medal sensor input state is "00000001B (state at the start of passing the medal)". ) ”Is generated, and if the 1-byte data indicating the previous medal sensor input state is“ 00000001B (state at the start of medal passage) ”, the normal change value of the medal sensor input state is“ 0000000111B (during medal passing). State) ”is generated. On the other hand, for example, if the 1-byte data indicating the previous medal sensor input state is "00000011B (state during medal passing)", the normal change value of the medal sensor input state is "00000010B (state immediately before the completion of medal passage)". Is generated, and if the 1-byte data indicating the previous medal sensor input state is "00000010B" (the state immediately before the completion of passing the medal), the normal change value of the medal sensor input state is "0000000000B (after passing the medal (passing)). Time) state) ”is generated.

As described above, by changing the detection process of the change mode of the medal sensor input state from the table reference process to the arithmetic process, the free space of the table storage area of the main ROM 102 can be increased and the capacity of the program can be increased. Can be minimized. Therefore, by adopting the above-mentioned method, it is possible to improve the efficiency of the detection process of the medal insertion sensor state, and it is possible to improve the playability by utilizing the increased free space in the main ROM 102.

[Error handling]
Next, with reference to FIGS. 89 and 90, for example, the error processing performed in S262 during the medal insertion check processing (see FIG. 87) will be described. FIG. 89 is a flowchart showing an error processing procedure, and FIG. 90 is a diagram showing an example of the configuration of an error table actually referred to on the error processing source program.

In the error table shown in FIG. 90, for each 1-byte data (for example, 1-byte data stored in the address “dERR_HE” in FIG. 90) indicating the on / off state of the port indicating the type of the error factor, Error display data (for example, 1-byte data stored in the addresses "dERR_HE + 1" and "dERR_HE + 2" in FIG. 90) is defined. This error display data is output to the 2-digit 7-segment LED (both for displaying the number of payouts and for displaying the error) included in the information display 6.

First, the main CPU 101 turns off the medal solenoid (S271). Specifically, the main CPU 101 stops driving the solenoid of the selector 66 (see FIG. 7). Next, the main CPU 101 performs a process of saving the medal payout number display data (S272).

Next, the main CPU 101 performs an error table setting process (S273). By this process, the start address of the error table shown in FIG. 90 is set on the source program.

Next, the main CPU 101 acquires an error factor (S274). The error factor acquired in this process changes according to the process in which the error process currently being processed is read. As shown in FIG. 90, the error factors targeted in this embodiment include "hopper empty error", "hopper jam error", "insertion medal passage count error", "insertion medal passage check error", and "insertion medal passage check error". "Insert medal passage check error", "Insert medal passage time error", "Insert medal retrograde error", "Insert medal auxiliary storage full error", "Illegal hit error" are specified. For example, when the error processing is read after the processing of S258 during the medal insertion check processing, the “inserted medal retrograde error (Cr)” in FIG. 90 is acquired as an error factor in this processing. Further, for example, when the error processing is read after the processing of S261 during the medal insertion check processing, the “inserted medal passing time error (CE)” in FIG. 90 is acquired as an error factor in this processing. ..

Next, the main CPU 101 acquires error display data from the error table and the error cause (S275). For example, when the error factor is "insertion medal retrograde error (Cr)", the error shown in FIG. 90 is used as the error display data to be output to the upper digit 7-segment LED among the 2-digit 7-segment LEDs in this process. The 1-byte data "001001110B" stored in the address "dERR_CR + 1" in the table is acquired, and the 1-byte data "00000101B" stored in the address "dERR_CR + 2" is used as error display data to be output to the lower digit 7-segment LED. Is acquired. In this case, the two characters "Cr" are displayed as error information on the two-digit 7-segment LED.

Next, the main CPU 101 performs an error command (generation) generation / storage process (S276). In this process, the main CPU 101 generates error command data when an error occurs, which is transmitted to the sub control circuit 200, and stores the command data in a communication data storage area (see FIG. 75B) provided in the main RAM 103. .. The error command at the time of error occurrence stored in the communication data storage area is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158. The error command when an error occurs includes a parameter indicating the occurrence of an error.

Next, the main CPU 101 performs a standby process for 1 interrupt time (1.1172 ms) (S277). Next, the main CPU 101 determines whether or not the error has been cleared (S278).

When the main CPU 101 determines in S278 that the error has not been cleared (when the determination in S278 is NO), the main CPU 101 returns the process to the process of S277 and repeats the processes after S277.

On the other hand, in S278, when the main CPU 101 determines that the error has been cleared (when the determination in S278 is YES), the main CPU 101 performs an error factor clearing process (S279). In addition, this processing is performed in the non-standard work area of the main RAM 103. Next, the main CPU 101 performs a restoration process of the payout number display data of the medals saved in S272 (S280).

Next, the main CPU 101 performs an error command (release) generation / storage process (S281). In this process, the main CPU 101 generates data of an error command at the time of error cancellation to be transmitted to the sub control circuit 200, and stores the command data in the communication data storage area (see FIG. 75B) provided in the main RAM 103. .. The error command at the time of error cancellation stored in the communication data storage area is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158. The error command at the time of error cancellation includes a parameter indicating error cancellation. Then, after the processing of S281, the main CPU 101 ends the error processing and shifts the processing to, for example, S253 during the medal insertion check processing (see FIG. 87). In the error cancellation, the generated error factor is canceled, and the error state is canceled by pressing the reset switch 76.

[Random number acquisition process]
Next, with reference to FIG. 91, the random number acquisition process performed in S203 in the main flow (see FIG. 82) will be described. Note that FIG. 91 is a flowchart showing the procedure of the random number acquisition process.

First, the main CPU 101 acquires a hard latch random number (0 to 65535) of the random number register 0 of the random number circuit, and uses the acquired random number value as a random number value for the internal winning combination lottery, and uses the random number value storage area (not) in the main RAM 103. It is stored in (shown) (S291).

Next, the main CPU 101 generates a soft latch random number (0 to 65535: a random number value for production used in the ART-related lottery process, a random number value in the 0 to 255: 1 byte lottery process) of the random number registers 1 to 7 of the random number circuit. The soft latch random number acquisition register is set for this purpose (S292). Next, the main CPU 101 sets the acquisition number (for example, 7) of the soft latch random numbers (S293).

Next, the main CPU 101 collectively acquires the soft latch random numbers corresponding to the acquired number, and stores the soft latch random numbers corresponding to the acquired number in the random number value storage area (S294). At this time, the soft latch random number (effect random number value, 2-byte random number value) acquired from the random number register 1 of the random number circuit 110 is the hardware acquired from the random number register 0 of the random number circuit in the random number value storage area. It is stored in an area different from the area in which the latch random number (random number value for the internal winning combination lottery) is stored. Then, after the processing of S294, the main CPU 101 ends the random number acquisition processing and shifts the processing to S204 of the main flow (see FIG. 82). In the present embodiment, in order to store four 2-byte random numbers and four 1-byte random numbers, a 12-byte storage area is allocated to the main RAM 103 as a random number storage area.

[Internal lottery processing]
Next, the internal lottery process performed in S204 in the main flow (see FIG. 82) will be described with reference to FIGS. 92 to 96. 92 is a flowchart showing the procedure of the internal lottery process, FIG. 93A is a diagram showing an example of a source program for executing the processes of S302 to S305 during the internal lottery process, and FIG. 93B is a diagram. It is a figure which shows an example of the source program for executing the process of S308-S309 in the internal lottery process.

Further, FIG. 94 is a diagram showing an example of the configuration of an internal lottery table (for general game) actually referred to on the source program of the internal lottery process, and FIG. 95 is a diagram on the source program of the internal lottery process. It is a figure which shows an example of the structure of the lottery value selection table by RT state which is actually referred. Further, FIG. 96 shows an internal lottery value table selection table, a 1-byte internal lottery value table, a 2-byte internal lottery value table, and a 1-byte internal lottery value table for each setting, which are actually referred to on the source program of the internal lottery process. It is a figure which shows an example of the structure of the internal lottery value table for each 2 byte setting. In the present embodiment, an internal lottery table for RB (BB) is also provided, but here, the configuration of the internal lottery table for RB used referred to on the source program for internal lottery processing is not shown. Omit.

First, the main CPU 101 performs a set value / medal insertion number check process (S301). In this process, the main CPU 101 checks the set value (any of 1 to 6) of the current game and the number of medals inserted (three in this embodiment).

Next, the main CPU 101 sets the internal lottery table for general games and the number of lottery (53 times in this embodiment) (S302). In this process, the value (win request flag status) of the "special prize winning number + small winning combination winning number" in the internal lottery table (for general game) shown in FIG. 94 is set in the C register, and the "lottery value selection table or" The value (judgment data: data related to the address) of the lottery coefficient table is set in the A register. As shown in FIG. 94, the winning request flag status is set to the special prize winning number ("00H (missing)", "01H (BB1)", "02H (BB2)": decimal number 0, 1, 2). "25H (hexadecimal number: 37 in decimal number (special prize number described later)) is multiplied by the small winning combination winning number (" 00H "to" 24H ": decimal number 0 to 36). ..

Next, the main CPU 101 determines whether or not the RB is in operation (S303). When the main CPU 101 determines in S303 that the RB is not in operation (NO determination in S303), the main CPU 101 performs the process of S305 described later.

On the other hand, when the main CPU 101 determines in S303 that the RB is in operation (YES in S303), the main CPU 101 sets the internal lottery table for RB and the number of lottery (5 times in this embodiment). Set (S304). In this process, the internal lottery table for general games and the number of lottery sets set in S302 are overwritten by the internal lottery table for RB and the number of lottery.

After the processing of S304 or when the determination in S303 is NO, the main CPU 101 acquires the determination data (data related to the address) of the lottery target combination from the set internal lottery table, and updates the lottery table address (S305).

Next, the main CPU 101 determines whether or not the determination data is RT state-specific data (S306). In this process, the main CPU 101 determines whether or not the currently acquired lottery target combination is an internal winning combination whose lottery value changes according to the RT state. Specifically, the main CPU 101 determines whether or not the address defined in the currently acquired lottery target combination determination data is the address in the RT state-specific lottery value selection table shown in FIG. 95. ..

For example, in the determination data "(dRPPTR01-dRTRB_SEL) * 2 + 001H" associated with the internal winning combination "F_chililip" in the internal lottery table of FIG. 94, the internal winning in the lottery value selection table for each RT state shown in FIG. 95. Since the address "dRPPTR01" of the combination "F_chililip" is specified, the determination data associated with the internal winning combination "F_chililip" corresponds to the RT state-specific data. Therefore, when the currently acquired lottery target combination is the internal winning combination “F_chili lip”, the main CPU 101 determines that the determination data is the RT state-specific data in the processing of S306.

When the main CPU 101 determines in S306 that the determination data is not RT state-specific data (when the determination in S306 is NO), the main CPU 101 performs the process of S308 described later. On the other hand, in S306, when the main CPU 101 determines that the determination data is the RT state-specific data (when the determination in S306 is YES), the main CPU 101 selects the RT state lottery value shown in FIG. 95 based on the determination data. Selection data is acquired from the table, and the acquired selection data is set in the determination data (S307).

After the processing of S307 or when the determination in S306 is NO, the main CPU 101 determines whether or not the determination data of the lottery target combination is the data for each setting (S308). In this process, the main CPU 101 determines whether or not the currently acquired lottery target combination is an internal winning combination whose lottery value changes according to the set value. Specifically, in the main CPU 101, the address defined in the currently acquired lottery target combination determination data is in the internal lottery value table for each 1-byte setting or the internal lottery value table for each 2-byte setting shown in FIG. 96. Determine if it is an address of.

For example, in the determination data "((dNMLB00F289-dPRB_DB_WV) / 06H) * 2 + 080H" associated with the internal winning combination "F_strong chili 1" in the internal lottery table of FIG. Since the address "dNMLB00F289" of the internal winning combination "F_strong chili 1" in the lottery value table is specified, the judgment data associated with the internal winning combination "F_strong chili 1" corresponds to the data for each setting. do. Therefore, when the currently acquired lottery target combination is the internal winning combination “F_strong chili 1”, the main CPU 101 determines that the determination data is the setting-specific data in the processing of S308.

In S308, when the main CPU 101 determines that the determination data is not the setting-specific data (when the determination in S308 is NO), the main CPU 101 performs the process of S310 described later. On the other hand, in S308, when the main CPU 101 determines that the determination data is the setting-specific data (when the determination in S308 is YES), the main CPU 101 adds the set value data (any of 0 to 5) to the determination data. Then, the added value is set in the determination data (S309). The set value data added to the determination data in this process is the data associated with the set value, but the set value data "0" to "5" are not the values of the set value itself, but are "5", respectively. It is the data corresponding to "setting 1" to "setting 6".

After the processing of S309 or when the determination in S308 is NO, the main CPU 101 calculates the address of the area in which the lottery value of the lottery target combination is stored based on the set determination data (address data), and sets the address to the address. The stored lottery value is acquired (S310).

In the process of S310, for example, when the lottery target combination is the internal winning combination “F_Sabo 2” whose lottery value does not depend on both the RT state and the set value, the 1-byte internal lottery value table shown in FIG. 96. The lottery value "128" stored in the address "dNM_B00F26" is acquired from. Further, for example, when the lottery target combination is the internal winning combination “F_RT3 lip_1st” whose lottery value changes depending on the RT state, and the RT state is the RT2 state, the 2-byte internal lottery value table shown in FIG. 96. The lottery value "1800" stored in the address "dRT2B00F13456" is acquired from.

Further, in the processing of S310, for example, when the lottery target combination is the internal winning combination “F_strong chili 1” whose lottery value changes depending on the set value, the internal lottery value table for each 1-byte setting shown in FIG. 96. From the 6 types of lottery values "150 (setting 1), 150 (setting 2), 150 (setting 3), 150 (setting 4), 160 (setting 5), 170 (setting 6)" specified in The lottery value corresponding to the set value is acquired. At this time, the lottery value corresponding to the set value is acquired by adding the set value data to the determination data (processing of S309) and designating the obtained address. Therefore, for example, when the lottery target combination is "F_strong chili 1" and the set value is "6" (the set value data is "5"), the lottery value "dNMLB00F289 + 5" stored in the address "dNMLB00F289 + 5". 170 "is acquired.

In this embodiment, in the case of a combination whose lottery value depends on both the RT state and the set value, such as the internal winning combination “F_maintenance lip A”, the internal lottery value table and the internal lottery by setting are used. The lottery value is obtained by referring to both of the value tables.

Next, the main CPU 101 acquires a random number value (any of 0 to 65535) for the internal winning combination lottery stored in the random number storage area (S311).

Next, the main CPU 101 performs a lottery execution process (S312). In this process, the main CPU 101 adds the random number value acquired in S311 to the lottery value acquired in S310, and sets the addition result as the lottery result (winning / non-winning of the lottery target combination). In this lottery execution process, if the sum of the lottery value and the random number value exceeds 65535 (overflow), it is determined that the lottery target combination has been won (the lottery target combination has been determined as the internal winning combination). To.

Next, the main CPU 101 stores a value obtained by adding the lottery value to the random number value (random number value after the lottery execution) as a new random number value in the random number storage area (S313). Next, the main CPU 101 determines whether or not the lottery execution process has won (whether or not an overflow has occurred) (S314).

In S314, when the main CPU 101 determines that the winning combination has been won in the lottery execution process (when the determination in S314 is YES), the main CPU 101 refers to the internal lottery table and refers to the winning request flag status (corresponding to the winning internal winning combination). The value of "special prize winning number + small winning combination winning number") is acquired (S315). For example, in the general game, if the winning combination is won in the lottery execution process when the lottery target combination is "F_certain chili lip", in the process of S315, the winning request flag status "(00H * 25H) + 02H" (special prize winning number =). 0, small winning combination number = 2) is acquired. Then, after the processing of S315, the main CPU 101 ends the internal lottery processing and shifts the processing to S205 of the main flow (see FIG. 82).

On the other hand, in S314, when the main CPU 101 determines that the lottery has not been won in the lottery execution process (when the determination in S314 is NO), the main CPU 101 updates the lottery target combination to the next combination in the internal lottery table, and the lottery target combination is selected. The number of times is subtracted by 1 (S316). Next, the main CPU 101 determines whether or not the number of lottery after subtraction is "0" (S317).

In S317, when the main CPU 101 determines that the number of lottery after subtraction is not "0" (when the determination in S317 is NO), the main CPU 101 returns the process to the process of S305 and repeats the processes after S305.

On the other hand, in S317, when the main CPU 101 determines that the number of lottery after subtraction is "0" (when the determination in S317 is YES), that is, when the internal winning combination is "missing", the main CPU 101 determines. Set the loss status (S318). The "missing status" corresponds to the winning request flag status in which both the special prize winning number and the small winning combination winning number are "0". Then, after the processing of S318, the main CPU 101 ends the internal lottery processing, and shifts the processing to S205 of the main flow (see FIG. 82).

In the present embodiment, the internal lottery process is performed as described above. The processes S302 to S305 during the above-mentioned internal lottery process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 93A. Among them, the determination data acquisition process of S305 is executed by the source code “LDIN AC, (HL)” in FIG. 93A.

For example, when the source code "LDIN ss, (HL)" is executed on the source program, the memory specified by the address set in the HL register (pair register) and the address obtained by adding "1" to the address. The contents (data) of are loaded into the ss (BC, DE, AC, AE or BD) pair register, and the address set in the HL register is updated by +2 (2 additions). Therefore, when the source code "LDIN AC, (HL)" in FIG. 93A is executed, the contents of the memory specified by the address set in the HL register (pair register) and the address obtained by adding 1 to the address (the contents of the memory). Data) is loaded into the AC register, and the address set in the HL register is updated by +2 (addition of 2). In the determination data acquisition process of S305, as described above, the determination data (value of "lottery value selection table or lottery coefficient table") is stored in the A register by this "LDIN" instruction (predetermined read instruction). It is stored, and the hit request flag status (value of "special prize winning number + small winning combination winning number") is stored in the C register.

As described above, in the determination data acquisition process of S305 during the internal lottery process, both the data load process and the address update process can be performed by one instruction code (“LDIN” instruction). In this case, the instruction code related to the address setting can be omitted on the source program, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, the processes of S308 and S309 during the above-mentioned internal lottery process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 93B. Among them, in the addition process of the set value data (any of 0 to 5) of S309, the main CPU 101 uses the source codes "MUL A, 6" and "ADDQ A, (.LOW.wWAVENUM)" in FIG. 93B. It is done by executing in this order. Both the "MUL" instruction and the "ADDQ" instruction are instruction codes dedicated to the main CPU 101, and the "ADDQ" instruction is an instruction code dedicated to the main CPU 101 that specifies an address using a Q register (extended register).

For example, when the source code "MUL A, n" is executed on the source program, the stored data in the A register is multiplied by the 1-byte integer n, and the multiplication result is stored in the A register. Therefore, in the source code "MUL A, 6" in FIG. 93B, the content (stored data) of the A register is multiplied by a 1-byte integer 6, and the multiplication result is stored in the A register. This multiplication process is executed by the arithmetic circuit 107 (see FIG. 9) included in the microprocessor 91. That is, since the pachislot 1 of the present embodiment is provided with a dedicated calculation circuit (calculation circuit 107) for executing the multiplication process and the division process on the source program, the efficiency of the multiplication process and the division process is to be improved. Can be done.

Further, for example, when the source code "ADDQ r, (k)" is executed on the source program, the stored data (upper side address value) of the Q register and the 1-byte integer k (direct value: lower side address value) are executed. ), The stored data of the r register (A, B, C, D, E, H or L register) is added to the memory contents (stored data) of the address, and the addition result is stored in the r register. To. Therefore, when the source code "ADDQ A, (.LOW.wWAVENUM)" in FIG. 93B is executed, the stored data of the Q register and the memory of the address specified by the 1-byte integer value ".LOW.wWAVENUM" are executed. The contents (stored data) of the A register are added to the contents (set value data) of, and the addition result is stored in the A register.

That is, in the example shown in FIG. 93B, in the addition process of the set value of S309, the lottery target combination is obtained by multiplying the relative value for lottery table selection by the coefficient "6" and adding the set value data to the multiplied value. The address of the lottery table in which the lottery value of is stored is calculated.

As described above, in the present embodiment, the main CPU 101 dedicated instruction code (“ADDQ” instruction) using the Q register (extended register) is used in the internal lottery process, and if this instruction code is used, the direct value is used. This allows access to the main ROM 102, the main RAM 103, and the memory map I / O. Therefore, the instruction related to the address setting can be omitted on the source program of the internal lottery process, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Design setting process]
Next, the symbol setting process performed in S205 in the main flow (see FIG. 82) will be described with reference to FIGS. 97 to 100.

FIG. 97 is a flowchart showing the procedure of the symbol setting process. FIG. 98 is a correspondence table between the special prize (bonus) winning number and the small winning combination winning number and the internal winning combination. In addition, in FIG. 98, the illustration of the special prize winning number and the small winning combination winning number corresponding to “missing (00)” is omitted. Further, FIG. 99 is a diagram showing an example of a source program for executing the processes of S324 to S330 during the symbol setting process, and FIG. 100 is a hit actually referred to on the source program of the symbol setting process. It is a figure which shows an example of the structure of the request flag table (flag data table, winning flag table data).

First, the main CPU 101 extracts a special prize winning number and a small winning combination winning number based on the winning request flag status acquired in the internal lottery process, and extracts the extracted special winning winning number and the small winning combination winning number in the main RAM 103. It is stored in the winning number storage area (not shown) (S321).

In the present embodiment, as shown in FIG. 98, the special prize (bonus) winning numbers “1” and “2” are associated with the internal winning combinations “F_BB1” and “F_BB2”, respectively. Further, the small winning combination "1" to "36" are associated with the internal winning combination "F_chililip" to "F_RB combination 4", respectively. Then, as described with reference to FIG. 94, the value of the winning request flag status is the value obtained by multiplying the special prize winning number by the special prize number (“37 (25H in hexadecimal number)” in the present embodiment) and the small winning combination number. It is the added value. Therefore, in the process of S321, in order to extract the special prize winning number and the small winning combination winning number from the value of the winning request flag status, in the present embodiment, the main CPU 101 sets the value of the winning request flag status to the special prize number (“37””. ). As a result, the value of the quotient generated by the division process becomes the special prize winning number (one of 0 to 2 in decimal), and the remaining value becomes the small winning winning number (one of 0 to 36 in decimal). Become.

Next, the main CPU 101 determines whether or not the small winning combination has been won based on the extracted small winning combination winning number (S322). In this process, if the small winning combination winning number is any one of 1 to 36, the main CPU 101 determines that the small winning combination has won, and if the small winning combination winning number is 0, the main CPU 101 determines that the small winning combination has won. It is determined that the small role did not win.

In S322, when the main CPU 101 determines that the small winning combination has not been won (NO determination in S322), the main CPU 101 performs the process of S331 described later. On the other hand, in S322, when the main CPU 101 determines that the small winning combination has been won (when the determination in S322 is YES), the main CPU 101 sets the small winning combination winning number as the initial value of the subtraction result (S323).

Next, the main CPU 101 sets the hit request flag table (see FIG. 100) (S324). Next, the main CPU 101 subtracts 1 from the subtraction result and updates the subtraction result (S325). Next, the main CPU 101 determines whether or not the subtraction result is less than "0" (S326).

When the main CPU 101 determines in S326 that the subtraction result is not less than "0" (NO determination in S326), the main CPU 101 performs a bit number calculation process (S327). In the bit number calculation process of S327, the number of blocks in the storage area of the hit request flag data corresponding to the small winning combination winning number specified in the hit request flag table is acquired.

In the present embodiment, the hit request flag storage area (internal winning combination storage area) is provided with blocks of hit request storage areas 0 to 7 and blocks of hit request storage areas 8 to 11. Therefore, the maximum value of the number of blocks in the storage area of the hit request flag data acquired in the bit number calculation process of S327 is “2”. For example, when the internal winning combination is "F_certain chili lip", as shown in the hit request flag table (see FIG. 100), the storage area 7 included in the blocks of the hit request storage areas 0 to 7 and the hit request. Since the hit request flag data is defined in each of the storage areas 9 included in the blocks of the storage areas 8 to 11, the number of blocks in the storage area of the hit request flag data acquired in the bit number calculation process of S327 is "2". Will be.

Next, the main CPU 101 performs a bit number calculation process (S328). In the bit number calculation process of S328, the number of bytes of the hit request flag data in the block unit specified in the hit request flag table (see FIG. 100) is calculated. For example, when the internal winning combination is "F_certain chili lip", 1 byte of hit request flag data is stored in both the storage area 7 and the storage area 9 as shown in the hit request flag table (see FIG. 100). Therefore, the number of bytes of the hit request flag data in block units acquired in the bit number calculation process of S328 is 1 byte. In the table shown in FIG. 100, the hit request flag data stored in the storage area 7 is described as "10000000B | 01000000B", but this is because the hit request flag data stored in the storage area 7 is described. It means that it is "10000000B" or ("|" is a symbol of the logical sum) "01000000B".

The above-mentioned processes of S325 to S328 are repeated as many times as the number of small winning combination winning numbers. For example, when the internal winning combination is "F_certain winning combination" (small winning combination winning number is "2"), the above-mentioned processes of S325 to S328 are repeated twice. When the processes of S325 to S328 are repeated a plurality of times, the number of blocks acquired in the bit number calculation process of S327 and S328 and the number of bytes of the hit request flag data for each block are stored in another storage area. Will be done. Further, the number of blocks obtained by the above-mentioned processes of S325 to S328 and the number of bytes of the hit request flag data in the block unit are information (on-bit information) for designating the storage destination of the hit request flag data.

Here, returning to the processing of S326 again, when the main CPU 101 determines in S326 that the subtraction result is less than "0" (when the determination in S326 is YES), the main CPU 101 is in the hit request flag storage area ( The internal winning combination storage area) is set (S329). At this time, the main CPU 101 is a hit request flag to be checked (updated) based on the number of blocks obtained by the above-mentioned processes of S325 to S328 and the number of bytes (on-bit information) of the hit request flag data in block units. Set only the storage area. Specifically, the address of the hit request flag storage area to be checked (updated) is stored in the DE register (see FIG. 99).

Next, the main CPU 101 performs a compressed data storage process (S330). In this process, the main CPU 101 mainly performs a process of transferring (expanding) the hit request flag data to a predetermined storage area in the hit request flag storage area to be checked (updated). The details of the compressed data storage process will be described later with reference to FIG. 101 described later.

After the processing of S330 or when the determination in S322 is NO, the main CPU 101 refers to the carry-over combination storage area (see FIG. 31) and determines whether or not there is a carry-over combination (S331). In S331, when the main CPU 101 determines that there is a carry-over combination (when the determination in S331 is YES), the main CPU 101 performs the process of S334 described later.

On the other hand, when the main CPU 101 determines in S331 that there is no carry-over combination (when the determination in S331 is NO), the main CPU 101 determines the bonus combination (BB1 or BB2) based on the special prize winning number extracted in the process of S321. ) Is determined (S332).

In S332, when the main CPU 101 determines that the bonus combination has not been won (when the determination in S332 is NO), the main CPU 101 ends the symbol determination process and transfers the process to S206 in the main flow (see FIG. 82). Transfer.

On the other hand, in S332, when the main CPU 101 determines that the bonus combination has been won (when the determination in S332 is YES), the main CPU 101 stores the winning special prize winning number in the carry-over combination storage area (S333).

After the processing of S333 or when the determination in S331 is NO, the main CPU 101 sets the special prize winning number in the winning number storage area (not shown), sets the hit request flag data in the hit request flag storage area, and sets the RT state to RT5. Set to the state and clear (“0”) the number of RT games (the number of digestion games in the RT1 state) (S334). Then, after the processing of S334, the main CPU 101 ends the symbol setting processing and shifts the processing to S206 of the main flow (see FIG. 82).

In the present embodiment, the symbol setting process is performed as described above. The processing of S324 to S330 (compression / decompression processing of data related to winning) during the above-mentioned symbol setting processing is performed by sequentially executing each source code defined by the source program of FIG. 99 by the main CPU 101. .. Among them, the compressed data storage process of S330 is performed by the main CPU 101 executing the source code "CALLF SB_BTEP_00" in FIG. 99.

The "CALLF" instruction is a 2-byte instruction code dedicated to the main CPU 101 as described above, and when the source code "CALLF SB_BTEP_00" in FIG. 99 is executed, processing is performed at the address specified by "SB_BTEP_00". Jump and start the compressed data storage process. In the compressed data storage process of S330, as described above, the hit request flag data (compressed data) stored in the hit request flag table is expanded (copied) to the corresponding hit request flag storage area.

Further, the setting process of the address of the hit request flag storage area of S329 during the symbol setting process described above is performed by the main CPU 101 executing the source code "LDQ DE, .LOW. WWAVEBIT" in FIG. 99. That is, the processing of S329 during the symbol setting processing is performed by the "LDQ" instruction dedicated to the main CPU 101 that specifies the address using the Q register (extended register). In this case, the instruction code related to the address setting can be omitted on the source program of the symbol setting process, and the capacity of the source program of the symbol setting process (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, in the present embodiment, the data related to the winning is compressed / decompressed by the processing procedure described in S324 to S330 during the above-mentioned symbol setting processing, and the above-mentioned main CPU 101 dedicated instruction code is used in the processing. By using it, it is possible to improve the efficiency of the compression / decompression processing of the data related to the winning, and it is possible to effectively utilize the limited capacity of the main RAM 103.

[Compressed data storage process]
Next, with reference to FIG. 101, for example, the compressed data processing performed in S330 during the symbol determination processing (see FIG. 97) will be described. FIG. 101 is a flowchart showing the procedure of the compressed data storage process.

The compressed data storage process shown in FIG. 101 is executed not only in S330 during the symbol determination process (see FIG. 97) but also in S649 during the symbol code acquisition process (see FIG. 128 described later) described later. In the compressed data storage process executed in S330 during the symbol determination process (see FIG. 97), the flag data to be processed is the hit request flag data (flag data related to the winning combination), but the symbol code acquisition process described later. In the compressed data storage process executed in S649 (see FIG. 128 described later), the flag data to be processed is the winning operation flag data (flag data related to the winning combination). Then, both processes are the same except that the types of flag data to be processed are different.

Therefore, in the flowchart of FIG. 101, the flag data to be processed is referred to as “process target flag data”, and the flag table to be processed is referred to as “process target flag table”. Further, in accordance with this description, in the following description of the compressed data storage process, the hit request flag data or the winning operation flag data is referred to as "process target flag data", and the hit request flag table (see FIG. 100) or described later. The symbol-corresponding winning operation table (for example, see FIG. 130A described later) is referred to as a “processing target flag table”.

First, the main CPU 101 sets the storage destination check bit (S341). In this process, the storage destination check bit is stored in a register other than the A register.

The storage destination check bit is 1-byte data for designating a block that is a storage destination (transfer destination) of the processing target flag data. In the present embodiment, both the hit request flag storage area and the winning operation flag storage area are composed of two blocks (blocks of storage areas 0 to 7 and blocks of storage areas 8 to 11). Then, for example, when the internal winning combination “F_certain chili lip” is determined, the hit request flag data is stored in each of the storage area 7 and the storage area 9 as shown in the hit request flag table of FIG. 100. (Because the number of blocks in the storage destination is "2"), in the process of S341, "00000011B" is set as the storage destination check bit. The value (1/0) of bit 0 of this 1-byte data corresponds to the presence or absence of a storage destination in the block of the storage areas 0 to 7, and the value of bit 1 (1/0) corresponds to the storage areas 8 to 11. Corresponds to the existence of the storage destination in the block of.

Next, the main CPU 101 sets the value of the transfer counter in byte units to "8" (S342). In the present embodiment, since the number of bytes in each block is "8", "8" is set as the initial value of the transfer counter.

Next, the value of the transfer instruction bit is extracted from the storage destination check bit (S343). The transfer instruction bit corresponds to the data of bit 0 in the storage destination check bit, and in the processing of S343, the storage destination check bit stored in the 1-byte register is shifted to the right once (for 1 bit). As a result, the transfer instruction bit is extracted. Specifically, when the 1-byte register (register other than the A register) in which the storage destination check bit is stored is shifted to the right once, the data stored in bits 7 to 1 are changed to bits 6 to 0, respectively. As it moves, the data of bit 0 before the shift is output. Then, the data output by this shift process becomes the value of the transfer instruction bit.

Next, the main CPU 101 determines whether or not there is a transfer instruction based on the value of the extracted transfer instruction bit (S344). In this process, the main CPU 101 determines that there is a transfer instruction when the value of the extracted transfer instruction bit is "1". For example, when "00000011B" is set as the storage destination check bit, transfer is performed in the first (corresponding to the first block of the storage area) and second (corresponding to the second block of the storage area) determination process of S344. Although it is determined that there is an instruction, in the third and subsequent determination processes of S344, it is determined that there is no transfer instruction.

In S344, when the main CPU 101 determines that there is no transfer instruction (when the determination in S344 is NO), the main CPU 101 performs the process of S354 described later.

On the other hand, in S344, when the main CPU 101 determines that there is a transfer instruction (when the determination in S344 is YES), the main CPU 101 acquires byte unit storage destination designation information from the processing target flag table (S345). In this process, the transfer destination is stored in the start address of the area in which the flag data of the process target combination (winning combination or winning combination) in the processing target flag table is stored as the byte unit storage destination specification information. Byte data is retrieved. For example, when the internal winning combination is "F_certain chili lip", it is stored at the start address of the area in which the flag data of "F_certain chili lip" is stored in the hit request flag table shown in FIG. 100. The 1-byte data "10000000B" that designates the area 7 as the transfer destination is acquired as the byte unit storage destination designation information.

Next, the main CPU 101 performs an update process (a process of adding 1 to the address) to be referred to in the process target flag table (S346). Further, in this process, the main CPU 101 sets an address that specifies the head storage area of the block that is the storage (transfer) destination of the processing target flag data as the initial address. For example, in the processing of the first block, the address of the storage area 0 is set as the initial address in the processing of S346, and in the processing of the second block, the address of the storage area 8 is set as the initial address in the processing of S346. ..

Next, the main CPU 101 extracts the value of the transfer instruction bit from the byte unit storage destination designation information (S347). The transfer instruction bit referred to here corresponds to bit 0 of the byte unit storage destination designation information, and in the processing of S347, the byte unit storage destination designation information stored in the 1-byte register is shifted to the right once. Extracts the value of the transfer instruction bit (outputs the data of bit 0).

Next, the main CPU 101 determines whether or not there is a transfer instruction based on the value of the transfer instruction bit extracted in the process of S347 (S348). In this process, the main CPU 101 determines that there is a transfer instruction when the value of the extracted transfer instruction bit is "1". For example, when "00000010B" is set as the byte unit storage destination designation information, the bit 1 data "1" is processed in S347 of the second time (the storage area 1 of the first block or the storage area 9 of the second block). Is output as the value of the transfer instruction bit, and it is determined that there is a transfer instruction. However, in the first and third to eighth processes of S347, it is determined that there is no transfer instruction.

In S348, when the main CPU 101 determines that there is no transfer instruction (when the determination in S348 is NO), the main CPU 101 performs the process of S351 described later.

On the other hand, in S348, when the main CPU 101 determines that there is a transfer instruction (when the determination in S348 is YES), the main CPU 101 is the processing target flag stored in the address in the currently set processing target flag table. The data (hit request flag data or winning operation flag data) is transferred (copied) to the designated storage area (S349).

For example, when the internal winning combination is "F_certain chili lip" and the current processing is performed for the storage area (storage area 0 to 7) of the first block, the byte unit storage destination designation information is ". Since it becomes "10000000B" (data that specifies the storage area 7 as the storage destination), it is determined that there is a transfer instruction in the eighth processing of S347, and in the subsequent processing of S349, the hit request flag data "10000000B" and "01000000B" are obtained. , "0010000B" and "00010000B" are transferred (copied) to the storage area 7 of the hit request flag storage area.

Next, the main CPU 101 performs an update process (a process of adding 1 to the address) to be referred to in the process target flag table (S350).

After the processing of S350 or when the determination in S348 is NO, the main CPU 101 performs an address updating process (a process of adding 1 to the address) that specifies a storage area to be a storage destination of the processing target flag data (S351). Next, the main CPU 101 subtracts 1 from the value of the transfer counter (S352).

Next, the main CPU 101 determines whether or not the value of the transfer counter is "0" (S353). In S353, when the main CPU 101 determines that the value of the transfer counter is not "0" (when the determination in S353 is NO), the main CPU 101 returns the processing to the processing of S347 and repeats the processing after S347.

On the other hand, in S353, when the main CPU 101 determines that the value of the transfer counter is "0" (when the determination in S353 is YES), does the main CPU 101 have a transfer referent remaining in the current storage destination check bit? Whether or not it is determined (S354). In this process, the main CPU 101 determines whether or not a bit in which "1" is stored remains in the storage destination check bit at the time of the current process. Then, when the bit in which "1" is stored remains in the storage destination check bit, that is, when the block to be processed exists, the main CPU 101 gives a transfer instruction to the current storage destination check bit. It is determined that the target remains.

In S354, when the main CPU 101 determines that the transfer instruction target remains in the current storage destination check bit (when the determination in S354 is YES), the main CPU 101 returns the process to the process of S342 and processes after S342. repeat. On the other hand, in S354, when the main CPU 101 determines that the transfer instruction target does not remain in the current storage destination check bit (when the determination in S354 is NO), the main CPU 101 ends the compressed data storage process and performs the process. For example, it is transferred to S331 in the symbol determination process (see FIG. 97).

[Second interface board control process (non-standard)]
Next, with reference to FIG. 102, the second interface board control process performed in S207 in the main flow (see FIG. 82) will be described. FIG. 102 is a flowchart showing the procedure of the second interface board control process. This process is performed in the non-standard work area (see FIG. 12C) in the main RAM 103. Further, the program used in the second interface board control process is stored in the non-standard area in the main ROM 102 (see FIG. 12B).

First, the main CPU 101 saves the address data of the stack area in the main RAM 103 set in the stack pointer (SP) (S361). Next, the main CPU 101 sets the address data of the non-standard stack area in the main RAM 103 in the stack pointer (SP) (S362).

Next, the main CPU 101 acquires navigation data (S363). Next, the main CPU 101 sets the navigation conversion table in the non-standard work area in the main RAM 103 (S364).

Next, the main CPU 101 refers to the navigation conversion table and acquires the push order number for the second interface (S365). Next, the main CPU 101 stores the acquired push order number for the second interface in the non-standard push order number storage area (not shown) provided in the non-standard work area (S366). Next, the main CPU 101 sets "0" to the value of the pressing position table selection counter provided in the non-specified work area (S367).

Next, the main CPU 101 determines whether or not the acquired navigation data is push order navigation (navigation data for push order small combination) (S368). In S368, when the main CPU 101 determines that the acquired navigation data is the push order navigation (when the determination in S368 is YES), the main CPU 101 performs the process of S372 described later.

On the other hand, in S368, when the main CPU 101 determines that the acquired navigation data is not the push order navigation (when the determination in S368 is NO), the main CPU 101 determines that the acquired navigation data is the navigation data (10) for the BB1 stop operation. It is determined whether or not it is (S369).

In S369, when the main CPU 101 determines that the acquired navigation data is the navigation data for the BB1 stop operation (when the determination in S369 is YES), the main CPU 101 performs the process of S371 described later. On the other hand, in S369, when the main CPU 101 determines that the acquired navigation data is not the navigation data for the BB1 stop operation (when the determination in S369 is NO), the main CPU 101 sets the value of the pressed position table selection counter to "1". Is added (S370). In S370, the process of adding "1" to the value of the pressed position table selection counter is a process performed to acquire the pressed position of BB2 from the pressed position table (not shown).

After the processing of S370 or when the determination in S369 is YES, the main CPU 101 adds "1" to the value of the pressing position table selection counter (S371). In S371, the process of adding "1" to the value of the pressed position table selection counter is a process performed to acquire the pressed position of BB1 or BB2 from the pressed position table (not shown).

After the processing of S371 or when the determination in S368 is YES, the main CPU 101 selects the pressing position table (not shown) based on the value of the pressing position table selection counter (S372). Next, the main CPU 101 refers to the selected pressing position table and acquires pressing position data for three reels (left reel 3L, middle reel 3C, and right reel 3R) (S373). Next, the main CPU 101 stores the acquired push position data in the non-standard push position storage area (not shown) provided in the non-standard work area (S374). By the processing of S367 to S371, if the navigation data is push order navigation, the value of the push position table selection counter becomes "0", and if the navigation data is the navigation data for BB1 stop operation, the push position table selection counter The value is "1", and if the navigation data is the navigation data for the BB2 stop operation, the value of the pressed position table selection counter is "2". That is, the pressed position data is acquired based on the navigation data.

Next, the main CPU 101 performs a second interface board output process (S375). The details of the second interface board output process will be described later with reference to FIG. 103 described later.

Next, the main CPU 101 performs a restore process for all registers (S376). Next, the main CPU 101 sets the address data of the stack area saved in S361 in the stack pointer (SP) (S377). Then, after the processing of S377, the main CPU 101 ends the second interface board control processing, and shifts the processing to S208 of the main flow (see FIG. 82).

[Second interface board output processing]
Next, with reference to FIG. 103, the second interface board output process performed in S375 during the second interface board control process (see FIG. 102) will be described. FIG. 103 is a flowchart showing the procedure of the second interface board output processing. The second interface board output process is performed in the non-standard work area of the main RAM 103.

First, the main CPU 101 determines whether or not the transmission operation is performed via the second interface serial line (second serial communication circuit 115: SCU2) (S381). When the main CPU 101 determines in S381 that the transmission operation is being performed via the serial line for the second interface (when the determination in S381 is YES), the main CPU 101 ends the second interface board output process. The process is transferred to S376 of the second interface board control process (see FIG. 102).

On the other hand, when the main CPU 101 determines in S381 that the transmission operation is not performed via the serial line for the second interface (when the determination in S381 is NO), the main CPU 101 is provided in the non-standard work area. The value of the loop counter is set to "3" (the number of reels), and the initial value "1" is set to the thumb value for serial communication (S382). Next, the main CPU 101 transmits transmission start data via the second interface serial line (second serial communication circuit 115: SCU2) (S383).

Next, the main CPU 101 refers to the non-specified pressing position storage area of the predetermined reel (rotating cylinder), and acquires the pressing position data of the predetermined reel (S384). Next, the main CPU 101 updates the reference non-standard pressing position storage area to that of the next target reel (rotary cylinder) (S385).

Next, the main CPU 101 acquires pulse number data corresponding to the pressed position data (symbol position) based on the pulse conversion data (not shown) and the acquired pressed position data (S386). The details of the correspondence between the pressed position data (symbol position) and the pulse number data will be omitted, but for example, the acquired pressed position data (symbol position) is "3" (the symbol "white 7" in the left reel 3L). ), "38" is acquired as pulse number data, and when the pressed position data (symbol position) is "10" (symbol "replay" in the left reel 3L), "38" is acquired as pulse number data. 155 ”is acquired. Further, for example, when the acquired pressing position data (symbol position) is "12" (symbol "blue 7" in the left reel 3L), "189" is acquired as pulse number data, and the pressing position data (symbol) is acquired. When the position) is "15" (the symbol "replay" in the left reel 3L), "239" is acquired as the pulse number data.

Next, the main CPU 101 transmits the acquired pulse number data via the second interface serial line (second serial communication circuit 115: SCU2) (S387). Next, the main CPU 101 adds the pulse number data to the serial communication sum value (S388). Next, the main CPU 101 subtracts 1 from the value of the loop counter (S389).

Next, the main CPU 101 determines whether or not the value of the loop counter is "0" (S390). In S390, when the main CPU 101 determines that the value of the loop counter is not "0" (when the determination in S390 is NO), the main CPU 101 changes the target reel to the next reel and returns the process to S384. The processing after S384 is repeated.

On the other hand, in S390, when the main CPU 101 determines that the value of the loop counter is "0" (when the determination in S390 is YES), the main CPU 101 sets the serial communication sum value to the second interface serial line (first). 2 Serial communication circuit 115: SCU2) for transmission (S391). Then, after the processing of S391, the main CPU 101 ends the second interface board output processing, and shifts the processing to S376 of the second interface board control processing (see FIG. 102).

[Control processing by state]
Next, with reference to FIG. 104, the state-specific control process performed in S208 in the main flow (see FIG. 82) will be described. FIG. 104 is a flowchart showing the procedure of the state-based control process.

First, the main CPU 101 performs a sub-flag conversion process (S401). In this process, the main CPU 101 performs a process of converting the internal winning combination into a sub-flag (see FIGS. 36 and 37). The details of the sub-flag conversion process will be described later with reference to FIG. 105 described later.

Next, the main CPU 101 performs a navigation set process (S402). In this process, the main CPU 101 acquires navigation data based on the RT state, the game state, and the small winning combination winning number. The details of the navigation set process will be described later with reference to FIG. 108 described later.

Next, the main CPU 101 determines whether or not the current RT state is the RT4 state (S403). In S403, when the main CPU 101 determines that the current RT state is not the RT4 state (when the determination in S403 is NO), the main CPU 101 performs the process of S406 described later.

On the other hand, when the main CPU 101 determines in S403 that the current RT state is the RT4 state (when the determination in S403 is YES), the main CPU 101 performs a flag conversion process (S404). In this process, the main CPU 101 performs a flag conversion lottery process (compression process of sub flag data) for converting the sub flag into the sub flag EX (see FIG. 36). By this flag conversion process, 19 types (including loss) of sub-flags are converted (compressed) into 9 types (including loss) of sub-flag EX. The details of the flag conversion process will be described later with reference to FIG. 111 described later.

Next, the main CPU 101 performs a sub-flag compression process (S405). In this process, the main CPU 101 converts the sub flag EX into the sub flag D (see FIG. 36), and further compresses the sub flag data. By this sub-flag compression process, 9 types (including loss) of sub-flag EX are converted (compressed) into 7 types (including loss) of sub-flag D.

After the processing of S405 or when the determination in S403 is NO, the main CPU 101 determines whether or not the current gaming state is the normal gaming state (S406).

In S406, when the main CPU 101 determines that the current gaming state is the normal gaming state (when the determination in S406 is YES), the main CPU 101 performs the normal middle start process (S407). The details of the normal start processing will be described later with reference to FIG. 112 described later. Then, after the processing of S407, the main CPU 101 ends the state-based control processing, and shifts the processing to S209 of the main flow (see FIG. 82).

On the other hand, in S406, when the main CPU 101 determines that the current gaming state is not the normal gaming state (when the determination in S406 is NO), the main CPU 101 determines whether or not the current gaming state is CZ (when the current gaming state is determined to be NO). S408).

In S408, when the main CPU 101 determines that the current gaming state is CZ (when the determination in S408 is YES), the main CPU 101 performs a process at the start during CZ (S409). The details of the CZ middle start process will be described later with reference to FIG. 113 described later. Then, after the processing of S409, the main CPU 101 ends the state-specific control processing, and shifts the processing to S209 of the main flow (see FIG. 82).

On the other hand, in S408, when the main CPU 101 determines that the current gaming state is not CZ (when the determination in S408 is NO), the main CPU 101 determines whether or not the current gaming state is normal ART (S410). ).

In S410, when the main CPU 101 determines that the current gaming state is the normal ART (when the determination in S410 is YES), the main CPU 101 performs the normal start-time processing during ART (S411). The details of the normal start processing during ART will be described later with reference to FIG. 117 described later. Then, after the processing of S411, the main CPU 101 ends the state-based control processing, and shifts the processing to S209 of the main flow (see FIG. 82).

On the other hand, in S410, when the main CPU 101 determines that the current gaming state is not normal ART (when the determination in S410 is NO), the main CPU 101 determines whether or not the current gaming state is CT (S412). ).

In S412, when the main CPU 101 determines that the current gaming state is CT (when the determination in S412 is YES), the main CPU 101 performs a process at the start during CT (S413). The details of the CT start processing will be described later with reference to FIG. 118 described later. Then, after the processing of S413, the main CPU 101 ends the state-based control processing, and shifts the processing to S209 of the main flow (see FIG. 82).

On the other hand, in S412, when the main CPU 101 determines that the current gaming state is not CT (when the determination in S412 is NO), the main CPU 101 determines whether or not the current gaming state is a bonus state (S414). ).

In S414, when the main CPU 101 determines that the current gaming state is the bonus state (when the determination in S414 is YES), the main CPU 101 performs the BB middle start process (S415). The details of the BB start processing will be described later with reference to FIG. 125 described later. Then, after the processing of S415, the main CPU 101 ends the state-based control processing, and shifts the processing to S209 of the main flow (see FIG. 82).

On the other hand, when the main CPU 101 determines in S414 that the current gaming state is not the bonus state (NO determination in S414), the main CPU 101 performs other processing (S416). In this process, the main CPU 101 performs a process according to a game state other than the game state targeted by the various determination processes. For example, when the current gaming state is the ART preparation state, processing corresponding to the ART preparation state is performed. Then, after the processing of S416, the main CPU 101 ends the state-based control processing, and shifts the processing to S209 of the main flow (see FIG. 82).

[Sub-flag conversion process]
Next, the sub-flag conversion process performed in S401 during the state-based control process (see FIG. 104) will be described with reference to FIGS. 105 to 107. FIG. 105 is a flowchart showing the procedure of the sub flag change process. Further, FIG. 106 is a diagram showing an example of a source program for executing the sub-flag change process, and FIG. 107 is a diagram of a sub-flag conversion table (conversion table) actually referred to on the source program of the sub-flag conversion process. It is a figure which shows an example of the structure.

First, the main CPU 101 acquires the small winning combination winning numbers (0 to 36) (S421). Next, the main CPU 101 determines whether or not the bonus is currently being operated (S422).

In S422, when the main CPU 101 determines that the bonus operation is currently in progress (when the determination in S422 is YES), the main CPU 101 converts the small winning combination winning number into a sub-flag in which the bonus is operating and saves it (S423). .. The process of converting this small winning combination winning number into a sub-flag during bonus operation is performed by the main CPU 101 executing the source code "SUB (subtraction instruction) cNHT_RBST-c7HT1_FLA" in FIG. 106. Then, in the present embodiment, by executing this "SUB" command, the small winning combination winning number is uniformly converted into the sub-flag "cactus (14)". Then, after the processing of S423, the main CPU 101 ends the sub-flag conversion processing, and shifts the processing to S402 of the state-based control processing (see FIG. 104).

On the other hand, when it is determined in S422 that the main CPU 101 is not currently operating the bonus (when the determination in S422 is NO), the main CPU 101 sets the sub-flag conversion table shown in FIG. 107 (S424). In this process, the initial value of the sub-flag to be determined is set to "loss (00)", and the sub-flag "loss (00)" is used as the initial address of the block in the sub-flag conversion table shown in FIG. Set the address ("dSBCVTB + 1") in which is stored.

Next, in the main CPU 101, is the data of the small winning combination winning number defined in the block in the sub-flag conversion table currently being referenced the data corresponding to the small winning combination winning number acquired in the current game? Whether or not it is determined (S425).

In S425, the main CPU 101 determines that the data of the small winning combination winning number defined in the block in the sub-flag conversion table to be referred to is not the data corresponding to the small winning combination winning number acquired in the current game. At this time (when the determination in S425 is NO), the main CPU 101 updates the block in the subflag conversion table to be referred to to the block at the next address (S426). Next, the main CPU 101 adds "1" to the value of the sub flag (S427). Then, after the processing of S427, the main CPU 101 returns the processing to the processing of S425, and repeats the processing after S425.

On the other hand, in S425, the data of the small winning combination winning number defined in the block in the sub-flag conversion table to be referred to by the main CPU 101 is the data corresponding to the small winning combination winning number acquired in the current game. When it is determined (when the determination in S425 is YES), the main CPU 101 refers to the sub-flag conversion table shown in FIG. 107, and the sub-flag conversion control data (of the address of the small winning combination winning number) associated with the small winning combination winning number. The 1-byte data stored at the next address) is acquired, and the sub-flag conversion control data is stored in the sub-flag conversion control data storage area (not shown) provided in the main RAM 103 (S428). In this process, for example, when the small winning combination winning number acquired in the current game is "03" (internal winning combination "F_3 consecutive chili lip"), the sub-flag conversion is performed with reference to the sub-flag conversion table shown in FIG. The control data "00000011B" is acquired. Then, after the processing of S428, the main CPU 101 ends the sub-flag conversion processing, and shifts the processing to S402 of the state-based control processing (see FIG. 104).

In this embodiment, the sub-flag conversion process is performed as described above. The above-mentioned sub-flag conversion process is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 106. Further, in the sub-flag conversion table shown in FIG. 107, which is actually referred to on the source program of the sub-flag conversion process, the sub-flag conversion control data (control status) is associated with each sub-flag. At this time, the same sub-flag conversion control data (control status) is associated with the same type of sub-flag.

For example, the sub-flag conversion control data (control status) "00000011B" is commonly assigned to the sub-flags "triple chili lip A" and "triple chili lip B". Further, for example, the sub-flag conversion control data (control status) "00000001B" is commonly assigned to the sub-flags "reach-eye lip 1" to "reach-eye lip 4". Then, in the flag conversion lottery process for converting the above-mentioned internal winning combination (sub flag) into the sub flag EX, the lottery is performed based on the sub flag conversion control data (control status) stored in the sub flag conversion control data storage area. ..

By providing common sub-flag conversion control data for the same type of internal winning combination (sub-flag) in the sub-flag conversion table for converting the flag managed on the main side (internal winning combination) to a flag manageable on the sub side. The versatility of the conversion table is increased, and changes in the conversion program due to a model change can be handled with minor changes, so that an increase in development cost can be suppressed.

[Naviset processing]
Next, with reference to FIGS. 108 to 110, the navigation set process performed in S402 during the state-based control process (see FIG. 104) will be described. FIG. 108 is a flowchart showing the procedure of the navigation set process. Further, FIG. 109 is a diagram showing an example of a source program for executing the processes of S434 to S436 described later during the navigation set processing, and FIG. 110 is actually referred to on the source program of the navigation set processing. It is a figure which shows an example of the structure of the navigation data table.

First, the main CPU 101 determines whether or not the navigation set flag is set in the sub-flag conversion control data storage area (not shown) (S431). Specifically, the main CPU 101 refers to the sub-flag conversion control data storage area, and the set sub-flag conversion control data is data corresponding to the small winning combination winning numbers (10 to 23) that generate push order navigation. Determine if it is. In S431, when the main CPU 101 determines that the navigation set flag is not set in the sub-flag conversion control data storage area (when the determination in S431 is NO), the main CPU 101 ends the navigation set processing and performs the processing according to the state. Move to S403 of the control process (see FIG. 104).

On the other hand, in S431, when the main CPU 101 determines that the navigation set flag is set in the sub-flag conversion control data storage area (when the determination in S431 is YES), the RT state of the main CPU 101 is RT0 or RT1. Whether or not it is determined (S432). In S432, when the main CPU 101 determines that the RT state is not the RT0 or RT1 state (when the determination in S432 is NO), the main CPU 101 ends the navigation set process and controls the process according to the state (see FIG. 104). Move to S403.

On the other hand, in S432, when the main CPU 101 determines that the RT state is the RT0 or RT1 state (when the determination in S432 is YES), the main CPU 101 determines whether or not the gaming state is the general gaming state (when the RT state is a YES determination). S433). In S433, when the main CPU 101 determines that the gaming state is the general gaming state (when the determination in S433 is YES), the main CPU 101 ends the navigation set process and controls the process according to the state (see FIG. 104). Move to S403.

On the other hand, in S433, when the main CPU 101 determines that the gaming state is not the general gaming state (NO determination in S433), the main CPU 101 acquires the small winning combination winning number (S434). Next, the main CPU 101 refers to the navigation data table shown in FIG. 110, and acquires navigation data (any of 1 to 9) based on the small winning combination winning number (S435).

Next, the main CPU 101 stores the acquired navigation data (information regarding the stop operation of the variable display of the plurality of display columns) in the navigation data storage area (stop operation instruction information storage area) (S436) in the main RAM 103. Then, after the processing of S436, the main CPU 101 ends the navigation set processing, and shifts the processing to S403 of the state-based control processing (see FIG. 104).

In this embodiment, the navigation set process is performed as described above. The processes S434 to S436 during the above-mentioned navigation set process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 109. In this series of processing, as shown in FIG. 109, an "LDQ" instruction dedicated to the main CPU 101 that specifies an address using a Q register (extended register) is used on the source program.

For example, when the source code "LDQ A, (k)" is executed on the source program, the stored data in the Q register (upper address value) and the 1-byte integer k (direct value: lower address value). The contents (stored data) of the memory at the address specified in and are loaded into the A register. Therefore, for example, when the source code "LDQ A, (wHITFRT)" in FIG. 109 is executed, the stored data of the Q register and the contents of the memory of the address specified by the integer value "wHITFRT" are stored in the A register. Loaded into.

Further, for example, when the source code "LDQ (k), A" is executed on the source program, the stored data of the A register is the stored data of the Q register (upper address value) and the 1-byte integer k. It is loaded into the memory of the address specified by (direct value: lower address value). Therefore, for example, by executing the source code "LDQ (wNAVIPTN), A" in FIG. 109, the data (navigation data) stored in the A register is one byte with the stored data (upper address value) in the Q register. It is stored in the navigation data storage area of the address specified by the integer value "wNAVIPTN" (lower address value) of.

As described above, in the present embodiment, the instruction code dedicated to the main CPU 101 using the Q register (extended register) is used in the navigation set processing, and the main ROM 102, the main RAM 103, and the memory map I / O are accessed by direct values. can do. In this case, the instruction related to the address setting can be omitted on the source program of the navigation set processing, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Flag conversion process]
Next, with reference to FIG. 111, the flag conversion process performed in S404 during the state-based control process (see FIG. 104) will be described. Note that FIG. 111 is a flowchart showing the procedure of the flag conversion process.

First, the main CPU 101 determines whether or not it is the start of CT (S441).

When the main CPU 101 determines in S441 that it is not the time to start CT (when the determination in S441 is NO), the main CPU 101 performs the process of S443 described later. On the other hand, in S441, when the main CPU 101 determines that it is the start of CT (when the determination in S441 is YES), the main CPU 101 determines by lottery the table number of the flag conversion lottery table used for the flag conversion lottery during CT. And set (S442).

After the processing of S442 or when the determination in S441 is NO, the main CPU 101 sets the flag conversion lottery table according to the current state (S443). For example, if the current state is the RT4 state during non-ART, the non-ART flag conversion lottery table (see FIG. 62) is set, and if the current state is the RT4 state during normal ART, The ART flag conversion lottery table (see FIGS. 47A and 47B) is set, and when the current state is the RT4 state during CT, the CT flag conversion lottery table (see FIG. 54) is set.

Next, the main CPU 101 refers to the set flag conversion lottery table, and performs the flag conversion lottery process based on the internal winning combination (S444). In fact, in this process, the main CPU 101 performs a flag conversion lottery process using the sub-flag conversion control data acquired from the sub-flag conversion control table shown in FIG. 107, based on the sub-flag corresponding to the internal winning combination.

Next, the main CPU 101 determines whether or not the flag conversion lottery of S444 is won (S445).

In S445, when the main CPU 101 determines that the flag conversion lottery has been won (when the determination in S445 is YES), the main CPU 101 performs the sub-flag conversion process (S446). In this process, for example, when the internal winning combination is "F_1 probability chili lip", that is, when the sub flag is "triple chili lip B (03)", if the flag conversion lottery process is won, the sub flag conversion process of S446 is performed. , The sub-flag "triple chili lip B (03)" is converted to the sub-flag EX "determined combination (06)" or the sub-flag EX "triple chili lip (07)" (see FIG. 36).

After the processing of S446, the main CPU 101 determines whether or not the current gaming state is the non-ART state (S447). In S447, when the main CPU 101 determines that the current gaming state is not the non-ART state (NO determination in S447), the main CPU 101 ends the flag conversion process and controls the process for each state (see FIG. 104). ) S405.

On the other hand, in S447, when the main CPU 101 determines that the current gaming state is the non-ART state (YES determination in S447), the main CPU 101 adds "1" to the number of ART sets (S448). Next, the main CPU 101 sets the ART preparation state in the game state of the next game (S449). Then, after the processing of S449, the main CPU 101 ends the flag conversion processing, and shifts the processing to S405 of the state-based control processing (see FIG. 104).

Here, returning to the process of S445 again, when it is determined in S445 that the main CPU 101 has not won the flag conversion lottery (when the determination in S445 is NO), the main CPU 101 performs the sub-flag maintenance process (S450). .. In this process, for example, when the internal winning combination is "F_1 probability chili lip", that is, when the sub flag is "triple chili lip B (03)", and the flag conversion lottery is not winning, the sub flag of S450 is maintained. By the processing, the sub-flag "triple chili lip B (03)" is converted (maintained) to the sub-flag EX "replay (01)". Then, after the processing of S450, the main CPU 101 ends the flag conversion processing, and shifts the processing to S405 of the state-based control processing (see FIG. 104).

[Processing at normal start]
Next, with reference to FIG. 112, the normal middle start process performed in S407 during the state-based control process (see FIG. 104) will be described. Note that FIG. 112 is a flowchart showing the procedure of the normal start processing.

First, the main CPU 101 refers to the CZ lottery table (see FIG. 41A), and performs a CZ lottery process based on the current CZ lottery state and the internal winning combination (sub flag) (S461). Next, the main CPU 101 determines whether or not the CZ lottery of S461 has been won (S462).

In S462, when it is determined that the main CPU 101 has not won the CZ lottery (when the determination in S462 is NO), the main CPU 101 performs the process of S465 described later.

On the other hand, in S462, when the main CPU 101 determines that the CZ lottery has been won (when the determination in S462 is YES), the main CPU 101 sets the winning type CZ in the game state of the next game (S463). Next, the main CPU 101 sets the number of CZ games of the winning type in the CZ game number counter (S464). The CZ game number counter is a counter that counts the duration of CZ, and is provided in the main RAM 103. In the process of S464, for example, when CZ1 wins, the first predetermined number of games (for example, "12") is set in the CZ game number counter (first half), and CZ2 wins. Is set to a second predetermined number of games (for example, "15") in the CZ game number counter (first half), and when CZ3 is won, a fourth predetermined number of games is set in the CZ game number counter. (For example, "17") is set.

After the processing of S464 or when the determination in S462 is NO, the main CPU 101 usually refers to the medium-high probability lottery table (see FIG. 40A), and performs a lottery to shift to the lottery state of CZ based on the internal winning combination (sub flag) (S465). ). Next, the main CPU 101 updates the lottery state of the CZ based on the result of the transition lottery (S466). Then, after the processing of S466, the main CPU 101 ends the normal middle start processing and also ends the state-based control processing (see FIG. 104).

[Processing at start during CZ]
Next, with reference to FIG. 113, the CZ middle start process performed in S409 during the state-based control process (see FIG. 104) will be described. Note that FIG. 113 is a flowchart showing the procedure of the CZ middle start processing.

First, the main CPU 101 determines whether or not the current gaming state is CZ1 (S471).

In S471, when the main CPU 101 determines that the current gaming state is CZ1 (when the determination in S471 is YES), the main CPU 101 performs CZ1 (CZ2) middle processing (S472). The details of the processing during CZ1 (CZ2) will be described later with reference to FIGS. 114 and 115 described later. Then, after the processing of S472, the main CPU 101 ends the CZ middle start processing and also ends the state-specific control processing (see FIG. 104).

On the other hand, in S471, when the main CPU 101 determines that the current gaming state is not CZ1 (when the determination in S471 is NO), the main CPU 101 determines whether or not the current gaming state is CZ2 (S473). ..

In S473, when the main CPU 101 determines that the current gaming state is CZ2 (when the determination in S473 is YES), the main CPU 101 performs CZ1 (CZ2) middle processing (S474). Details of the processing during CZ1 (CZ2) will be described later with reference to FIGS. 114 and 115 described later. Then, after the processing of S474, the main CPU 101 ends the CZ middle start processing and also ends the state-specific control processing (see FIG. 104). In this embodiment, the rank (mode or point) indicating the degree of expectation of winning the ART lottery is different between the CZ1 intermediate processing and the CZ2 intermediate processing, and the basic processing contents are the same. Therefore, in the present embodiment, the CZ1 intermediate process and the CZ2 intermediate process will be described as one process as the CZ1 (CZ2) intermediate process.

On the other hand, in S473, when the main CPU 101 determines that the current gaming state is not CZ2 (when the determination in S473 is NO), the main CPU 101 performs CZ3 middle processing (S475). The details of the processing during CZ3 will be described later with reference to FIG. 116 described later. Then, after the processing of S475, the main CPU 101 ends the CZ middle start processing and also ends the state-specific control processing (see FIG. 104).

[Processing during CZ1 (CZ2)]
Next, the CZ1 (CZ2) processing performed in S472 or S474 during the CZ middle start processing (see FIG. 113) will be described with reference to FIGS. 114 and 115. It should be noted that FIGS. 114 and 115 are flowcharts showing the procedure of the processing during CZ1 (CZ2).

First, the main CPU 101 determines whether or not the current game is a game in the first half of CZ1 (or CZ2) (S481). In S481, when the main CPU 101 determines that the current game is not the game of the first half of CZ1 (or CZ2) (when the determination in S481 is NO), the main CPU 101 performs the process of S490 described later.

On the other hand, when the main CPU 101 determines in S481 that the current game is a game in the first half of CZ1 (when the determination in S481 is YES), the main CPU 101 refers to the CZ1 middle mode-up lottery table (see FIG. 42). Then, the mode-up lottery process is performed based on the internal winning combination (sub flag) (S482). Further, in S481, when the main CPU 101 determines that the current game is a game in the first half of CZ2 (when the determination in S481 is YES), the main CPU 101 refers to the CZ2 middle point lottery table (see FIG. 43). , A point-up lottery is performed based on the internal winning combination (sub flag) (S482).

Next, the main CPU 101 updates the rank (mode or point) based on the lottery result of S482 (S483). Next, the main CPU 101 determines whether or not the freeze was won in the lottery of S482 (S484).

In S484, when the main CPU 101 determines that the freeze has been won (when the determination in S484 is YES), the main CPU 101 performs a freeze process for temporarily stopping the progress of the game, and the number of ART sets and the number of CT sets. Add "1" to (S485). Further, in this process, the main CPU 101 determines and sets the ART level with reference to the ART level determination table (see FIG. 48A). When a freeze occurs, "ART level 2" is determined as the ART level.

Next, the main CPU 101 sets the ART preparation state in the game state of the next game (S486). Then, after the processing of S486, the main CPU 101 ends the processing during CZ1 (CZ2), and also ends the processing at the start during CZ (see FIG. 113).

Here, returning to the processing of S484 again, when it is determined in S484 that the main CPU 101 has not won the freeze (when the determination in S484 is NO), the main CPU 101 is the value of the CZ game number counter (first half). Is subtracted by 1 (S487). Next, the main CPU 101 determines whether or not the value of the CZ game number counter (first half) is "0" (S488).

In S488, when the main CPU 101 determines that the value of the CZ game number counter (first half) is not "0" (when the determination in S488 is NO), the main CPU 101 ends the processing during CZ1 (CZ2), and at the same time, The CZ middle start process (see FIG. 113) also ends.

On the other hand, in S488, when the main CPU 101 determines that the value of the CZ game number counter (first half) is "0" (when the determination in S488 is YES), the main CPU 101 is set to the CZ1 or the game state of the next game. The latter half of CZ2 is set (S489). Then, after the processing of S489, the main CPU 101 ends the processing during CZ1 (CZ2) and also ends the processing at the start during CZ (see FIG. 113).

Here, returning to the process of S481 again, when the determination in S481 is NO, the main CPU 101 determines whether or not the current game is the first game in the latter half of CZ1 or CZ2 (S490). In S490, when the main CPU 101 determines that the current game is not the first game in the latter half of CZ1 or CZ2 (when the determination in S490 is NO), the main CPU 101 performs the process of S495 described later.

On the other hand, in S490, when the main CPU 101 determines that the current game is the first game in the latter half of CZ1 or CZ2 (when the determination in S490 is YES), the main CPU 101 is the ART lottery table in CZ (FIGS. 44A and 44A and). (Refer to 44B), the ART lottery process is performed based on the rank (mode or point) of the first half (S491).

Next, the main CPU 101 determines whether or not the ART lottery has been won (S492). In S492, when it is determined that the main CPU 101 has not won the ART lottery (when the determination in S492 is NO), the main CPU 101 performs the process of S494 described later.

On the other hand, in S492, when the main CPU 101 determines that the ART lottery has been won (when the determination in S492 is YES), the main CPU 101 adds "1" to the number of ART sets and sets the ART level determination table (see FIG. 48A). ), The ART level lottery is performed, and the lottery result is set (S493).

After the processing of S493 or when the determination in S492 is NO, the main CPU 101 sets a predetermined value in the CZ game number counter (second half) (S494). In the process of S494, for example, when the ART lottery is won, "4" is set in the CZ game number counter (second half), and when the ART lottery is not won, the number of CZ games is set. "3" is set in the counter (second half).

After the processing of S494 or when the determination in S490 is NO, the main CPU 101 refers to the ART lottery table in CZ (see FIG. 44C) and performs the ART lottery processing based on the internal winning combination (sub flag) (S495).

Next, the main CPU 101 determines whether or not the ART lottery has been won (S496). In S496, when it is determined that the main CPU 101 has not won the ART lottery (when the determination in S496 is NO), the main CPU 101 performs the process of S498 described later.

On the other hand, in S496, when the main CPU 101 determines that the ART lottery has been won (when the determination in S496 is YES), the main CPU 101 adds "1" to the number of ART sets and sets the ART level determination table (see FIG. 48A). ), The ART level lottery is performed, and the lottery result is set (S497).

After the processing of S497 or when the determination in S496 is NO, the main CPU 101 subtracts 1 from the value of the CZ game number counter (second half) (S498). Next, the main CPU 101 determines whether or not the value of the CZ game number counter (second half) is "0" (S499).

In S499, when the main CPU 101 determines that the value of the CZ game number counter (second half) is not "0" (when the determination in S499 is NO), the main CPU 101 ends the processing during CZ1 (CZ2), and at the same time, The CZ middle start process (see FIG. 113) also ends.

On the other hand, in S499, when the main CPU 101 determines that the value of the CZ game number counter (second half) is "0" (when the determination in S499 is YES), the main CPU 101 has an ART set number of "1" or more. It is determined whether or not it is (S500).

In S500, when the main CPU 101 determines that the number of ART sets is "1" or more (when the determination in S500 is YES), the main CPU 101 sets the ART preparation state in the game state of the next game (S501). Then, after the processing of S501, the main CPU 101 ends the processing during CZ1 (CZ2) and also ends the processing at the start during CZ (see FIG. 113).

On the other hand, in S500, when the main CPU 101 determines that the number of ART sets is not "1" or more (NO determination in S500), the main CPU 101 sets the game state of the next game to the state at the time of CZ failure (when the CZ failure state is set). S502). Then, after the processing of S502, the main CPU 101 ends the processing during CZ1 (CZ2) and also ends the processing at the start during CZ (see FIG. 113).

[Processing during CZ3]
Next, with reference to FIG. 116, the CZ3 intermediate processing performed in S475 during the CZ intermediate start processing (see FIG. 113) will be described. Note that FIG. 116 is a flowchart showing the procedure of processing during CZ3.

First, the main CPU 101 refers to the ART lottery table in CZ (see FIG. 45), and performs the ART lottery process based on the internal winning combination (sub flag) (S511).

Next, the main CPU 101 determines whether or not the ART lottery has been won (S512). In S512, when the main CPU 101 determines that the ART lottery has not been won (when the determination in S512 is NO), the main CPU 101 performs the process of S518 described later.

On the other hand, in S512, when the main CPU 101 determines that the ART lottery has been won (when the determination in S512 is YES), the main CPU 101 adds "1" to the number of ART sets and adds "1" to the number of CT sets. Add (S513). Next, the main CPU 101 determines whether or not the freeze has been won in the ART lottery of S512 (S514).

When the main CPU 101 determines in S514 that the freeze has not been won (when the determination in S514 is NO), the main CPU 101 performs the process of S516 described later. On the other hand, when the main CPU 101 determines in S514 that the freeze has been won (when the determination in S514 is YES), the main CPU 101 performs a freeze process for temporarily stopping the progress of the game (S515).

After the processing of S515 or when the determination in S514 is NO, the main CPU 101 performs an ART level lottery process with reference to the ART level determination table (see FIG. 48A), and sets the lottery result (ART level) (S516). .. Next, the main CPU 101 sets the ART preparation state in the game state of the next game (S517). Then, after the processing of S517, the main CPU 101 ends the processing during CZ3 and also ends the processing at the start during CZ (see FIG. 113).

Here, returning to the process of S512 again, when the determination in S512 is NO, the main CPU 101 subtracts 1 from the value of the CZ game number counter (S518). Next, the main CPU 101 determines whether or not the value of the CZ game number counter is "0" (S519).

In S519, when the main CPU 101 determines that the value of the CZ game number counter is not "0" (when the determination in S519 is NO), the main CPU 101 ends the processing during CZ3 and processes at the start during CZ (FIG. 113) also ends.

On the other hand, in S519, when the main CPU 101 determines that the value of the CZ game number counter is "0" (when the determination in S519 is YES), the main CPU 101 adds "1" to the number of ART sets and ARTs. An ART level lottery is performed with reference to the level determination table (see FIG. 48A), and the lottery result is set (S520). Next, the main CPU 101 sets the ART preparation state in the game state of the next game (S521). Then, after the processing of S521, the main CPU 101 ends the processing during CZ3 and also ends the processing at the start during CZ (see FIG. 113).

[Processing at start during normal ART]
Next, with reference to FIG. 117, the process at the start of normal ART performed in S411 during the state-based control process (see FIG. 104) will be described. Note that FIG. 117 is a flowchart showing the procedure of the normal start processing during ART.

First, the main CPU 101 adds "1" to the value of the ART continuous game number counter (S531). The ART continuous game number counter is a counter that normally counts the number of games continued by ART (the number of digested games). Further, in the present embodiment, in addition to the ART continuous game number counter, an ART end game number counter that counts the number of games that can be normally continued by ART is also provided. Then, in the pachislot 1 of the present embodiment, the value of the ART continuous game number counter is compared with the value of the ART end game number counter, and when the value of the ART continuous game number counter reaches the value of the ART end game number counter, ART The game state ends.

Next, the main CPU 101 refers to the CT lottery table during ART (see FIG. 50), and performs a CT lottery process based on the current CT lottery state and the internal winning combination (sub flag) (S532). Next, the main CPU 101 determines whether or not the CT lottery has been won (S533). When the main CPU 101 determines in S533 that the CT lottery has not been won (when the determination in S533 is NO), the main CPU 101 performs the process of S536 described later.

On the other hand, in S533, when the main CPU 101 determines that the CT lottery has been won (when the determination in S533 is YES), the main CPU 101 adds "1" to the number of CT sets and adds "1" to the value of the CT game number counter. 8 ”is set (S534). Next, the main CPU 101 sets the winning type CT for the game state of the next game (S535).

After the processing of S535 or when the determination of S533 is NO, the main CPU 101 refers to the ART level determination table (see FIG. 48B), draws the ART level based on the value of the ART continuous game number counter, and sets the lottery result. (S536). Next, the main CPU 101 refers to the normal ART medium-high probability lottery table (see FIG. 49), draws the CT lottery state of the migration destination based on the current CT lottery state and the internal winning combination (sub flag), and the lottery result. Is set (S537).

Next, the main CPU 101 refers to a normal ART middle-addition lottery table (see FIG. 51), and performs an additional lottery process for the number of ART games based on the internal winning combination (sub-flag) (S538). Next, the main CPU 101 determines whether or not the additional lottery has been won (S539).

In S539, when it is determined that the main CPU 101 has not won the additional lottery (when the determination in S539 is NO), the main CPU 101 performs the process of S541 described later. On the other hand, in S539, when the main CPU 101 determines that the additional lottery has been won (when the determination in S539 is YES), the main CPU 101 adds the winning result to the ART end game number counter (S540).

After the processing of S540 or when the determination in S539 is NO, the main CPU 101 determines whether or not the value of the ART continuous game number counter has reached the value of the ART end game number counter (S541). In S541, when the main CPU 101 determines that the value of the ART continuous game number counter has not reached the value of the ART end game number counter (when the determination in S541 is NO), the main CPU 101 normally processes at the start during ART. At the same time, the state-specific control process (see FIG. 104) is also terminated.

On the other hand, in S541, when the main CPU 101 determines that the value of the ART continuous game number counter has reached the value of the ART end game number counter (when the determination in S541 is YES), the main CPU 101 sets the number of ART sets to 1. Subtract (S542). Next, the main CPU 101 sets the state at the end of ART (S543). Then, after the processing of S543, the main CPU 101 ends the normal start-time processing during ART, and also ends the state-specific control processing (see FIG. 104).

[Processing at start during CT]
Next, with reference to FIG. 118, the process at the start of CT performed in S413 during the state-based control process (see FIG. 104) will be described. Note that FIG. 118 is a flowchart showing the procedure of the start processing during CT.

First, the main CPU 101 refers to the extra lottery table during CT (see FIG. 55), and performs an additional lottery for the number of ART games based on the internal winning combination (sub flag) (S551). Next, the main CPU 101 determines whether or not the additional lottery has been won (S552).

In S552, when it is determined that the main CPU 101 has not won the additional lottery (when the determination in S552 is NO), the main CPU 101 performs the process of S556 described later. On the other hand, in S552, when the main CPU 101 determines that the additional lottery has been won (when the determination in S552 is YES), the main CPU 101 adds the winning result to the ART end game number counter (S553). As described above, in the pachi-slot machine 1 of the present embodiment, as the number of times the sub-flag "triple chili lip (triple chili lip A or triple chili lip B)" is applied during the same CT increases, one lottery per lottery. The amount of extra is increased.

After the processing of S553, the main CPU 101 determines whether or not the internal winning combination corresponds to the sub-flag EX "triple chili lip" (or "fixed combination"), that is, the internal winning combination "F_certain chili lip" or "F_1". It is determined whether or not the flag conversion lottery process of S444 in FIG. 111 has been won (S554).

In S554, when the main CPU 101 determines that the internal winning combination is not a combination corresponding to the sub-flag EX "triple chili lip" (when the determination in S554 is NO), the main CPU 101 ends the processing at the start during CT, and at the same time, The state-specific control process (see FIG. 104) also ends.

On the other hand, in S554, when the main CPU 101 determines that the internal winning combination corresponds to the sub-flag EX "triple chili lip" (when the determination in S554 is YES), the main CPU 101 is set to the value of the CT game number counter. "1" is added (S555). Then, after the processing of S555, the main CPU 101 ends the processing at the start during CT, and also ends the state-specific control processing (see FIG. 104).

Here, returning to the processing of S552 again, when S552 is NO determination, the main CPU 101 performs CT lottery processing during CT (S556). In this process, the main CPU 101 mainly performs a lottery by adding the number of CT sets. The details of the CT lottery process during CT will be described later with reference to FIG. 119 described later.

Next, the main CPU 101 subtracts 1 from the value of the CT game number counter (S557). Next, the main CPU 101 determines whether or not the value of the CT game number counter is "0" (S558).

In S558, when the main CPU 101 determines that the value of the CT game number counter is not "0" (when the determination in S558 is NO), the main CPU 101 ends the CT-during start processing and also performs state-specific control processing (when the CT game number counter value is not "0"). (See FIG. 104) also ends. On the other hand, in S558, when the main CPU 101 determines that the value of the CT game number counter is "0" (when the determination in S558 is YES), the main CPU 101 determines whether the number of CT sets is "1" or more. (S559).

In S559, when the main CPU 101 determines that the number of CT sets is "1" or more (when the determination in S559 is YES), the main CPU 101 subtracts 1 from the number of CT sets (S560). Next, the main CPU 101 sets the value of the CT game number counter to "8" (S561). Then, after the processing of S561, the main CPU 101 ends the processing at the start during CT, and also ends the state-specific control processing (see FIG. 104).

On the other hand, in S559, when the main CPU 101 determines that the number of CT sets is not "1" or more (when the determination in S559 is NO), the main CPU 101 sets the normal ART in the gaming state of the next game (S562). Then, after the processing of S562, the main CPU 101 ends the processing at the start during CT, and also ends the state-specific control processing (see FIG. 104).

[CT lottery processing during CT]
Next, with reference to FIG. 119, the CT lottery process during CT performed in S556 during the start process during CT (see FIG. 118) will be described. Note that FIG. 119 is a flowchart showing the procedure of the CT lottery process during CT.

First, the main CPU 101 sets the CT lottery table during CT (S571). The CT scan lottery table set here is a lottery table with the number of CT sets described in FIG. 56 above, but the CT scan lottery table actually set on the source program (CT scan set). The configuration of the number-added lottery table) will be described later with reference to FIG. 122 described later.

Next, the main CPU 101 performs a table data acquisition process (S572). In this process, the main CPU 101 acquires the address of the lottery table referred to in the CT lottery process during CT. The details of the table data acquisition process will be described later with reference to FIG. 120 described later.

Next, the main CPU 101 performs a 1-byte lottery process (S573). In this process, the main CPU 101 performs an additional lottery for the CT set. The details of the 1-byte lottery process will be described later with reference to FIG. 123 described later.

Next, the main CPU 101 determines whether or not the 1-byte lottery process has been won (S574). In S574, when it is determined that the main CPU 101 has not won the 1-byte lottery process (when the determination in S574 is NO), the main CPU 101 ends the CT lottery process during CT and performs the process at the start of CT (FIG. Move to S557) (see 118).

On the other hand, in S574, when the main CPU 101 determines that the 1-byte lottery process has been won (when the determination in S574 is YES), the main CPU 101 adds "1" to the number of CT sets (S575). Then, after the processing of S575, the main CPU 101 ends the CT lottery processing during CT, and shifts the processing to S557 of the processing at the start of CT (see FIG. 118).

[Table data acquisition process]
Next, with reference to FIGS. 120 to 122, the table data acquisition process performed in S572 during the CT lottery process during CT (see FIG. 119) will be described. FIG. 120 is a flowchart showing the procedure of the table data acquisition process. Further, FIG. 121 is a diagram showing an example of a source program for executing the table data acquisition process, and FIG. 122 is actually referred to on the source program of the CT lottery process and the table data acquisition process during CT. It is a figure which shows an example of the structure of the CT lottery table in CT (corresponding to the lottery table which added the number of sets in CT explained with FIG. 56). The specific lottery values stored in the CT lottery table during CT shown in FIG. 122 are examples.

In the present embodiment, when the lottery value referred to in the CT lottery process during CT is acquired, the lottery value is stored through the two-step address calculation process (first-step and second-step table data acquisition process). Calculate the address. First, in the first-stage table data acquisition process (processing of S582 and S583 described later), a "selection value (1 byte)" associated with an internal winning combination (actually, sub-flag D) is acquired. The selected value is provided for each type of internal winning combination, it is possible to determine whether or not the internal winning combination is a lottery target, and it is possible to specify the placement destination of the lottery table associated with the internal winning combination. Value (relative value) is specified. Further, in the present embodiment, a selection value "0" is specified in advance for the internal winning combination (actually, the sub-flag D) in which the lottery result of the CT lottery process during CT is non-winning, and the internal winning combination is set to 1. It is treated as "missing" at the time of table data acquisition processing in the stage. Then, in the second stage table data acquisition processing (processing of S585 to S587 described later), an address in which the lottery value of the internal winning combination in which the selection value other than "0" is defined is stored is calculated (lottery table). The address is calculated by adding the relative value (selected value) from the reference address (2 bytes) of.

First, the main CPU 101 refers to the CT lottery selection table during CT (not shown), the addresses of the first and second stage addition selection data for calculating the address of the CT lottery table during CT, and the CT. The number of lottery lottery (twice in this embodiment) is acquired (S581). Next, the main CPU 101 adds the address of the first-stage addition selection data to the address of the CT lottery table during CT to calculate the first-stage selection address (S582).

Next, the main CPU 101 acquires the selection value stored in the calculated selection address of the first stage (S583). Next, the main CPU 101 determines whether or not the selection value is "0" (S584).

In S584, when the main CPU 101 determines that the selected value is "0" (when the determination in S584 is YES), the main CPU 101 ends the table data acquisition process and performs the CT lottery process during CT (FIG. 119). (See), move to S573.

On the other hand, in S584, when the main CPU 101 determines that the selection value is not "0" (when the determination in S584 is NO), the main CPU 101 adds the selection value to the selection address to obtain the selection address of the second stage. Calculate (S585). Next, the main CPU 101 adds the address of the second-stage addition selection data to the second-stage selection address to calculate the selection address (S586).

Next, the main CPU 101 acquires the selection value stored in the selection address calculated in S586, adds the selection value to the selection address, and calculates the address to be referred to in the CT lottery table during CT (S587). .. Then, after the processing of S587, the main CPU 101 ends the table data acquisition processing, and shifts the processing to S573 of the CT lottery processing during CT (see FIG. 119).

In this embodiment, the table data acquisition process is performed as described above. Then, the above-mentioned table data acquisition process is performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 121.

Among them, in the first stage table data acquisition processing (processing of S581 to S584), the data was stored in the areas from the addresses "dCTCTSTTB" to "dCTCTS_RER-1" in the CT winning lottery table shown in FIG. 122. The table (table selection relative table by winning combination) is referred to. In addition, in the table selection relative table by winning combination (lottery table selection table), each combination (sub flag D "loss", "cactus", "weak cherry", "strong cherry", "fixed role" in which the CT winning is lost (sub-flag D "loss", "cactus", "weak cherry", "fixed role" , "Triple chili lip"), "0" is stored as the above-mentioned selection value (relative value) in the address of the selection table. Then, in the first stage table data acquisition process (address calculation process), when the selected value is "0", the lottery result is set to "miss" (see the determination process in S584 above).

In the CT-during CT winning lottery table having the above configuration, in the winning combination table selection relative table referred to in the first stage table data acquisition process, "loss" can be set only by the combination type, so that the lottery table can be set. It is no longer necessary to specify the lottery value for the "missing" role. Therefore, in the present embodiment, it is not necessary to store the lottery value data (“0”) of the “missing” role in the CT winning lottery table during CT, and the capacity of the table area of the main ROM 102 can be saved.

Further, in the processing of S587 during the table data acquisition processing (processing of S585 to S587) in the second stage (when the sub flag D “reach eye lip” is acquired), the CT shown in FIG. 122 is based on the calculated lottery table address. From the middle CT lottery table (corresponding to the lottery table with the number of sets added during CT in FIG. 56), the lottery table used in the normal CT state (start address "dNMCTTS_RR") or the lottery table in the high probability CT state (start address "dSPCTTS_RR"). ) Is selected.

In the lottery table used in the high-probability CT state, as shown in FIG. 122, a "determination bit" (determination data) composed of 1-byte data is stored in the address area next to the start address "dSPCTTS_RR". In the determination bit, data indicating a range of addresses in which the lottery value to be drawn is stored is stored. As in the example shown in FIG. 122, when the lottery value of the lottery target (high probability CT) is stored only in the next address of the storage area of the "judgment bit" of the lottery table in the high probability CT state, the judgment is made. In the bit storage area, 1-byte data "00000001B" in which "1" is stored only in bit 0 is stored as a determination bit. On the other hand, when the lottery value of the lottery target (high-accuracy CT and normal CT) is stored in the next address and the next address of the storage area of the determination bit as in the lottery table used in the normal CT state, FIG. 122. As shown in the above, 1-byte data “00000011B” in which “1” is stored only in bits 0 and 1 is stored as a determination bit in the determination bit storage area. When such a determination bit is provided, it is not necessary to store lottery value data that is not subject to lottery in the area of the address where the bit data is "0" in the determination bit in the lottery table.

Further, in the lottery table used in the high-probability CT state, as shown in FIG. 122, the lottery value of the high-probability CT win is stored in the address "dSPCTCTS_RR + 2" next to the "determination bit", and the lottery value of the high-probability CT win is stored as the lottery value. The data specified in the address "cABS_HIT" is stored. In the present embodiment, the data defined in this address "cABS_HIT" is data indicating winning confirmation (100% winning) (hereinafter referred to as "confirmed data"). Further, in the present embodiment, since it is not necessary to provide the lottery value data (“0”) for loss in the CT winning lottery table during CT, as shown in FIG. 122, the definite data defined in the address “cABS_HIT”. Can be specified as "0". That is, in the CT-in-CT winning lottery table having the above configuration, the lottery value "0" can be used as definite data.

As described in the lottery table for adding the number of sets during CT in FIG. 56, in the present embodiment, the “high probability CT winning” is always determined in the lottery for adding the number of sets during CT in the high probability CT state. Therefore, in the present embodiment, on the source program, the confirmed data can be stored as the lottery value of the high-probability CT win in the CT winning lottery table during CT shown in FIG. 122.

Like the lottery table in the second stage (when the sub-flag D "reach-eye lip" is acquired) described above, the lottery target combination and the non-lottery target combination (sub flag D) of the CT lottery are determined by the value of each bit data constituting the determination bit. ) Is determined, so that it is not necessary to store the lottery value data (loss data) of the winning combination not subject to the lottery in the table. Further, the lottery value "0" can be used as the definite data in which the winning probability of the lottery target combination is 100%. From these things, in this embodiment, the capacity of the CT winning lottery table during CT (the lottery table with the number of sets added during CT) can be compressed, and the free capacity can be secured (increased) in the main ROM 102. , It will be possible to improve the playability by utilizing the increased free space. Further, in the present embodiment, an example in which this technique is used in the CT winning process during CT has been described, but the present invention is not limited to this, and the ART lottery (see FIG. 115) and the number of ART games added lottery (see FIG. 117). ), CT lottery described later (see FIG. 154 described later), CZ pullback lottery described later (see FIG. 157 described later), and the like.

[1 byte lottery process]
Next, with reference to FIGS. 123 and 124, the 1-byte lottery process performed in S573 during the CT lottery process during CT (see FIG. 119) will be described. FIG. 123 is a flowchart showing the procedure of the 1-byte lottery process. Further, FIG. 124 is a diagram showing an example of a source program for executing the 1-byte lottery process.

First, the main CPU 101 inputs a 1-byte random number value (0 to 255: soft latch random number of the random number register 4 of the random number circuit 110) stored in the random number storage area (not shown) in the main RAM 103 for CT lottery during CT. Set (S591). Next, the main CPU 101 obtains lottery determination data (determination bits in the lottery table defined in the second stage of FIG. 122) from the CT lottery table during CT based on the address calculated in S587 during the table data acquisition process. Acquire (S592). Further, in this process, the main CPU 101 sets the number of determination bits "8" as the initial value of the number of lottery.

Next, the main CPU 101 determines whether or not the lottery determination data is a lottery target (S593). In this determination process, the main CPU 101 refers to the bit data in the determination bit associated with the current number of lottery, and if the bit data is "1", it determines that the lottery target. In the present embodiment, the bits 0 to 7 in the determination bit are associated with the lottery times “8” to “1”, respectively.

In S593, when the main CPU 101 determines that the lottery determination data is not the lottery target (NO determination in S593), the main CPU 101 performs the process of S599 described later. On the other hand, in S593, when the main CPU 101 determines that the lottery determination data is the lottery target (YES determination in S593), the main CPU 101 acquires the lottery value from the CT lottery table during CT (S594).

Next, the main CPU 101 determines whether or not the lottery value is "0" (winning confirmation data) (S595).

In S595, when the main CPU 101 determines that the lottery value is "0" (when the determination in S595 is YES), the main CPU 101 ends the 1-byte lottery process, and performs the CT lottery process during CT (FIG. 119). (See) to S574. On the other hand, in S595, when the main CPU 101 determines that the lottery value is not "0" (when the determination in S595 is NO), the main CPU 101 performs a CT lottery (additional lottery for the number of CT sets) process (S596). Specifically, the main CPU 101 subtracts a lottery value from a random number value (1 byte random value), and the subtraction result is used as a random number value.

Next, the main CPU 101 determines whether or not the CT lottery of S596 has been won (S597). In the CT lottery of S596, the main CPU 101 determines that the winning result is obtained when the subtraction result of S596 is "0" or less (when so-called "digits" occur).

In S597, when the main CPU 101 determines that the CT lottery has been won (when the determination in S597 is YES), the main CPU 101 ends the 1-byte lottery process, and the process is the CT lottery process during CT (see FIG. 119). Move to S574. On the other hand, in S597, when it is determined that the main CPU 101 has not won the CT lottery (when the determination in S597 is NO), the main CPU 101 is the storage address (lottery address) of the lottery value to be referred to in the CT lottery table during CT. Is updated to the next lottery address (S598).

After the processing of S598 or when the determination in S593 is NO, the main CPU 101 subtracts 1 from the number of lottery (S599). Next, the main CPU 101 determines whether or not the number of lottery is "0" (S600).

In S600, when the main CPU 101 determines that the number of lottery is not "0" (when the determination in S600 is NO), the main CPU 101 returns the process to S593 and repeats the processes after S593. On the other hand, in S600, when the main CPU 101 determines that the number of lottery is "0" (when the determination in S600 is YES), the main CPU 101 ends the 1-byte lottery process, and performs the CT lottery process during CT (CT lottery process). Move to S574) (see FIG. 119).

In the present embodiment, the 1-byte lottery process is performed as described above. The 1-byte lottery process described above is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 124.

In the random number acquisition process of S591 during the 1-byte lottery process, as shown in FIG. 124, an "LDQ" instruction, which is an instruction code dedicated to the main CPU 101 that specifies an address using a Q register (extended register), is issued on the source program. Used. Therefore, in the present embodiment, even in the 1-byte lottery process, the instruction code using the Q register (extended register) is used to access the main ROM 102, the main RAM 103, and the memory map I / O by a direct value. Therefore, the instruction code related to the address setting can be omitted, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Processing at the start during BB]
Next, with reference to FIG. 125, the BB start time process performed in S415 during the state-based control process (see FIG. 104) will be described. Note that FIG. 125 is a flowchart showing the procedure of the start processing during BB.

First, the main CPU 101 refers to the bonus lottery table for adding the number of ART games (see FIG. 59), and performs the lottery process for adding the number of ART games based on the internal winning combination (S611). Next, the main CPU 101 determines whether or not the additional lottery has been won (S612).

In S612, when the main CPU 101 determines that the additional lottery has not been won (when the determination in S612 is NO), the main CPU 101 ends the BB start time process and also performs the state-based control process (see FIG. 104). finish. On the other hand, in S612, when the main CPU 101 determines that the additional lottery has been won (when the determination in S612 is YES), the main CPU 101 adds the winning result (the number of additional games) to the ART end game number counter (S613). ..

Next, the main CPU 101 determines whether or not the number of ART sets is "0" (S614). In S614, when the main CPU 101 determines that the number of ART sets is not "0" (when the determination in S614 is NO), the main CPU 101 ends the BB middle start process and controls by state (see FIG. 104). ) Also ends.

On the other hand, in S614, when the main CPU 101 determines that the number of ART sets is "0" (when the determination in S614 is YES), the main CPU 101 adds "1" to the number of ART sets (S615). Then, after the processing of S615, the main CPU 101 ends the processing at the start during BB, and also ends the state-specific control processing (see FIG. 104).

[Pull-in priority storage process]
Next, with reference to FIGS. 126 and 127, the pull-in priority storage process performed in S212 in the main flow (see FIG. 82) will be described. FIG. 126 is a flowchart showing the procedure of the pull-in priority storage process. Further, FIG. 127 is a diagram showing an example of a source program for executing the processes of S625 and S626 described later during the attraction priority storage process.

First, the main CPU 101 sets "3" to the number of search reels (S621). Next, the main CPU 101 performs a pull-in priority table selection process (S622). In this process, a pull-in priority table (see FIG. 27) is selected based on the internal winning combination and the actuation stop button.

Next, the main CPU 101 performs a pull-in priority storage area selection process (S623). In this process, the pull-in priority data storage area of the reel to be searched is selected. Next, the main CPU 101 sets "20" as the number of symbol checks (number of times) (S624).

Next, the main CPU 101 performs a symbol code acquisition process (S625). In this process, the symbol code is acquired by referring to the winning operation flag storage area and the symbol code storage area corresponding to the number of symbol checks. The details of the symbol code acquisition process will be described later with reference to FIG. 128 described later.

Next, the main CPU 101 performs a logical product calculation process (S626). In this process, the main CPU 101 performs a process of generating the winning operation flag data. The details of the AND operation process will be described later with reference to FIG. 133 described later.

Next, the main CPU 101 performs a pull-in priority acquisition process (S627). In this process, in the main CPU 101, the bit is set to "1" in the winning operation flag (winning combination) storage area (see FIGS. 28 to 30), and the bit is set to "1" in the winning request flag storage area. For the winning combination set in "", the attraction priority data is acquired by referring to the attraction priority table (see FIG. 27). The details of the attraction priority acquisition process will be described later with reference to FIGS. 134 and 135 described later.

Next, the main CPU 101 stores the acquired pull-in priority data in the pull-in priority data storage area (not shown) in the main RAM 103 (S628). At this time, the attraction priority data is stored in the attraction priority data storage area so that the value of each priority and the bit of the storage area correspond to each other.

The pull-in priority data storage area is provided with a priority data storage area for each type of main reel. In each attraction priority data storage area, the attraction priority data determined according to each symbol position "0" to "19" of the corresponding main reel is stored. In the present embodiment, by referring to this attraction priority data storage area, it is searched whether or not a more appropriate number of sliding pieces exists in addition to the number of sliding pieces determined based on the stop table.

The content of the priority pull-in data stored in the pull-in priority data storage area differs depending on the type of the pull-in priority table number in the pull-in priority table referred to when determining the pull-in priority data. Further, the pull-in priority data indicates that the larger the value, the higher the priority. By referring to the pull-in priority data, it is possible to relatively evaluate the priority among the symbols arranged on the peripheral surface of the main reel. That is, the symbol whose highest value is determined as the attraction priority data is the symbol having the highest priority. Therefore, it can be said that the pull-in priority data indicates the order between the symbols arranged on the peripheral surface of the main reel. If there are a plurality of symbols having the same value of the pull-in priority data, one symbol is determined according to the priority order defined by the priority order table.

Next, the main CPU 101 updates the pull-in priority storage area (S629). In this process, the main CPU 101 sets a pull-in priority data storage area for the next check symbol. Next, the main CPU 101 subtracts 1 from the number of symbol checks (S630). Next, the main CPU 101 determines whether or not the number of symbol checks is "0" (S631).

In S631, when the main CPU 101 determines that the number of symbol checks is not "0" (when the determination in S631 is NO), the main CPU 101 returns the processing to the processing of S625 and repeats the processing after S625. On the other hand, in S631, when the main CPU 101 determines that the number of symbol checks is "0" (when the determination in S631 is YES), the main CPU 101 performs a search target reel change process (S632).

Next, the main CPU 101 subtracts 1 from the number of search reels (S633). Next, the main CPU 101 determines whether or not the number of search reels is "0", that is, whether or not the series of processes described above has been performed on all the main reels (S634).

When the main CPU 101 determines in S634 that the number of search reels is not "0" (when the determination in S634 is NO), the main CPU 101 returns the processing to the processing of S622 and repeats the processing after S622. On the other hand, in S634, when the main CPU 101 determines that the number of search reels is "0" (when the determination in S634 is YES), the main CPU 101 ends the attraction priority storage process and performs the process in the main flow (FIG. FIG. (Refer to 82), move to S213.

In the present embodiment, the attraction priority storage process is performed as described above. The processing of S625 and S626 during the above-mentioned attraction priority storage processing is performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 127.

Among them, the logical product calculation process of S626 is performed by the main CPU 101 executing the source code "CALLF SB_DAND_00" in FIG. 127. The "CALLF" instruction is a 2-byte instruction code dedicated to the main CPU 101 as described above, and when the source code "CALLF SB_DAND_00" in FIG. 127 is executed, processing is performed at the address specified by "SB_DAND_00". It is made to jump and the logical product calculation process is started.

[Design code acquisition process]
Next, with reference to FIGS. 128 to 132, the symbol code acquisition process performed in S625 during the attraction priority storage process (see FIG. 126) will be described. FIG. 128 is a flowchart showing the procedure of the symbol code acquisition process, and FIG. 129 is a diagram showing an example of a source program for executing the symbol code acquisition process. FIG. 130A is a diagram showing an example of the configuration of the first reel (left reel) symbol arrangement table actually referred to on the source program of the symbol code acquisition process, and FIG. 130B is a diagram showing a first reel symbol arrangement table set. It is a figure which shows an example of the structure of the symbol correspondence winning operation table which is sometimes referred. FIG. 131A is a diagram showing an example of the configuration of the second reel (middle reel) symbol arrangement table actually referred to on the source program of the symbol code acquisition process, and FIG. 131B is a diagram showing a second reel symbol arrangement table set. It is a figure which shows an example of the structure of the symbol correspondence winning operation table which is sometimes referred. Further, FIG. 132A is a diagram showing an example of the configuration of the third reel (right reel) symbol arrangement table actually referred to on the source program of the symbol code acquisition process, and FIG. 132B is a diagram showing the third reel symbol arrangement. It is a figure which shows an example of the structure of the symbol correspondence winning operation table referred to at the time of table setting.

First, the main CPU 101 clears the winning operation flag storage area (S641). In this process, the main CPU 101 sets "0" in all the storage areas in the winning operation flag storage area (see FIGS. 28 to 30). Next, the main CPU 101 sets the first reel symbol arrangement table (see FIG. 130A) (S642).

Next, the main CPU 101 determines whether or not the first reel (left reel 3L) is stopped (S643).

In S643, when the main CPU 101 determines that the first reel (left reel 3L) is stopped (when the determination in S643 is YES), the main CPU 101 performs the process of S647 described later. On the other hand, when the main CPU 101 determines in S643 that the first reel (left reel 3L) is not stopped (when the determination in S643 is NO), the main CPU 101 uses the second reel symbol arrangement table (see FIG. 131A). Set (S644). In this process, the first reel symbol arrangement table set in the process of S642 is overwritten by the second reel symbol arrangement table.

Next, the main CPU 101 determines whether or not the second reel (middle reel 3C) is stopped (S645).

When the main CPU 101 determines in S645 that the second reel (middle reel 3C) is stopped (YES in S645), the main CPU 101 performs the process of S647 described later. On the other hand, when the main CPU 101 determines in S645 that the second reel (middle reel 3C) is not stopped (NO determination in S645), the main CPU 101 uses the third reel symbol arrangement table (see FIG. 132A). Set (S646). In this process, the second reel symbol arrangement table set in the process of S644 is overwritten by the third reel symbol arrangement table.

After the processing of S646, or when S643 or S645 determines YES, the main CPU 101 performs a symbol check process at the time of executing the stop operation on the reel to be stopped controlled, and corresponds to the symbol corresponding to the symbol acquired by the symbol check process. Acquire the winning operation table (S647). For example, when the first reel (left reel 3L) is stopped and the symbol located on the effective line at the time of the stop operation is "white 7", the main CPU 101 has the address "dR1_SVN1" to the address "dR1_SVN2" in FIG. 130B. The start address of the symbol-corresponding winning operation table specified in the block in the range of -1 ”is acquired.

Next, the main CPU 101 sets the winning operation flag storage area (S648). Next, the main CPU 101 performs the compressed data storage process described with reference to FIG. 101 (S649). In this process, the main CPU 101 mainly performs a process of transferring (expanding) the winning operation flag data stored in the symbol-corresponding winning operation table to the corresponding storage area in the winning operation flag storage area.

For example, when the first reel (left reel 3L) is stopped and the symbol located on the effective line during the stop operation is "white 7", the symbol combinations (combinations) that can be won are shown in FIGS. 28 to 28. As shown in 30, the combination names "C_2nd_A_01", "C_2nd_A_01" and "C_SP1_01" defined in the second storage area, and the combination names "C_9 sheets C_01" to "C_9 sheets C_03" defined in the third storage area, "C_9 sheets C_07" to "C_9 sheets C_09" and "C_9 sheets E_01", combination names defined in the fourth storage area "C_RB role A_01", "C_RB role A_02", "C_RB role B_01" to "C_RB role B_04" , "C_RB role C_01" and "C_RB role C_02", combination names "C_reach eye lip C_01" to "C_reach eye lip C_03", "C_reach eye lip D_01", "C_ "Reach eye lip D_02" and "C_reach eye lip E_01", and the combination name "C_BB1" defined in the tenth storage area.

In this case, the storage destination of the first block (0th to 7th storage areas) of the winning operation flag data stored in the symbol-corresponding winning operation table is stored in the address "dR1_SVN1 + 1" in the table shown in FIG. 130B. It is designated by the 1-byte designated data "01011100B" (see the comment "storage area +2, +3, +4, +6" column in FIG. 130B). Further, the storage destination of the second block (8th to 11th storage areas) of the winning operation flag data stored in the symbol-corresponding winning operation table is stored in the address "dR1_SVN1 + 6" in the table shown in FIG. 130B. It is designated by the 1-byte designated data "10000000B" (see the comment "storage area +10" column in FIG. 130B).

In the present embodiment, bits 0 to 7 of the designated data in the first block are bits for designating the 0th to 7th storage areas of the first block as storage destinations, respectively, and the designated data in the second block. Bits 0 to 3 of the above are bits that specify the eighth to eleventh storage areas of the second block as storage destinations, respectively. Then, in the 1-byte designated data of each block, "1" is stored in the bit corresponding to the storage area in the winning operation flag storage area, which is the storage destination of the winning operation flag data.

Therefore, for example, when the first reel (left reel 3L) is stopped and the symbol located on the effective line at the time of the stop operation is "white 7", the address in the table shown in FIG. 130B in the processing of S649. The winning operation flag data "00010000B" or "00000100B" stored in "dR1_SVN1 + 2" is transferred from the symbol-corresponding winning operation table to the second storage area in the winning operation flag storage area and stored in the address "dR1_SVN1 + 3". The winning operation flag data "00100000B" or "00000100B" is transferred from the symbol-corresponding winning operation table to the third storage area in the winning operation flag storage area. Further, in this case, in the process of S649, the winning operation flag data "10000000B", "01000000B" or "001000000B" stored in the address "dR1_SVN1 + 4" in the table shown in FIG. The winning operation flag data "0010000B", "00010000B" or "00001000B" transferred to the fourth storage area in the operation flag storage area and stored in the address "dR1_SVN1 + 5" is stored in the winning operation flag from the symbol-compatible winning operation table. It is transferred to the sixth storage area in the area. Further, in this case, in the process of S649, the winning operation flag data "10000000B" stored in the address "dR1_SVN1 + 8" in the table shown in FIG. Transferred to storage area.

After the processing of S649, the main CPU 101 sets the winning operation flag storage area updated by the compressed data storage processing, sets the symbol code storage area, and the data length of the winning operation flag storage area (12 bytes in this embodiment). Is set (S650). Then, after the processing of S650, the main CPU 101 ends the symbol code acquisition processing, and shifts the processing to S626 of the pull-in priority storage processing (see FIG. 126).

In the present embodiment, the symbol code acquisition process is performed as described above. The symbol code acquisition process described above is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 129. Among them, the compressed data storage process of S649 is performed by the main CPU 101 executing the source code "CALLF SB_BTEP_00" in FIG. 129.

The "CALLF" instruction is a 2-byte instruction code dedicated to the main CPU 101 as described above, and when the source code "CALLF SB_BTEP_00" in FIG. 129 is executed, processing is performed at the address specified by "SB_BTEP_00". Jump and start the compressed data storage process. Then, in this compressed data storage process, as described above, the winning operation flag data (compressed data) stored in the symbol-corresponding winning operation flag table of each reel is expanded (copied) in the winning operation flag storage area.

In this embodiment, the data related to the winning is compressed / decompressed by the processing procedure described in S647 to S649 during the symbol code acquisition process described above, and the command code dedicated to the main CPU 101 described above is performed in the process. By using the above, it is possible to improve the efficiency of the compression / decompression processing of the data related to the winning, and it is possible to effectively utilize the limited capacity of the main RAM 103.

Further, in the present embodiment, in the compressed data storage process of S649 during the symbol code acquisition process, the jump destination address “SB_BTEP_00” specified by the “CALLF” command is the compression of S330 during the symbol setting process described with reference to FIG. 97. In the data storage process, it is the same as the jump destination address specified by the "CALLF" instruction. That is, in the present embodiment, the source program for executing the compressed data storage process performed in the symbol code acquisition process is the same as the source program for executing the compressed data storage process performed in the symbol setting process, S649 and S330. In both processes, the source program for the compressed data storage process is shared (modularized). In this case, in both the S649 and S330 processes, it is not necessary to separately provide the source program for the compressed data storage process, so that the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Logical product operation processing]
Next, with reference to FIG. 133, for example, the logical product calculation process performed in S626 during the attraction priority storage process (see FIG. 126) will be described. FIG. 133 is a flowchart showing the procedure of the AND operation processing. The logical product operation process shown in FIG. 133 is not only in S626 in the pull-in priority storage process (see FIG. 126), but also in S687 in the pull-in priority acquisition process (see FIGS. 134 and 135 described later) described later. Is also executed.

In the logical product operation process executed in S626 during the attraction priority storage process (see FIG. 126), the two data to be ANDed are stored in the winning operation flag set in S650 during the above-mentioned symbol code acquisition process. It is the data of the area and the data of the symbol code storage area. The former data corresponds to the "logical product destination data" described later, and the latter data corresponds to the "logical product source data" described later. Further, in this case, the number of bytes "12" of the data length (12 bytes) set in S650 during the above-mentioned symbol code acquisition process corresponds to the "number of logical products" described later.

On the other hand, in the logical product operation process executed in S687 in the fetch priority acquisition process described later (see FIGS. 134 and 135 described later), the two data to be logically ANDed are the hit (pull) request flag storage area. And the data of the winning operation flag storage area. The former data corresponds to the "logical product destination data" described later, and the latter data corresponds to the "logical product source data" described later. Further, in this case, the number of bytes “1” of the data length (1 byte) of the RT operation combination display flag described in FIG. 136B described later corresponds to the “number of logical products” described later.

First, the main CPU 101 acquires the logical product source data (for example, the data in the symbol code storage area) (S661). Next, the main CPU 101 performs a logical product operation of the logical product source data and the logical product destination data (for example, data in the winning operation flag storage area), and saves the operation result as the logical product destination data (S662).

Next, the main CPU 101 adds 1 to the address of the AND source data to be acquired (S663). Next, the main CPU 101 adds 1 to the address of the logical AND destination data to be referred to (S664).

Next, the main CPU 101 subtracts 1 from the number of logical products (S665). Next, the main CPU 101 determines whether or not the number of logical products is "0" (S666).

In S666, when the main CPU 101 determines that the number of logical products is not "0" (when the determination in S666 is NO), the main CPU 101 returns the process to the process of S661 and repeats the processes after S661. On the other hand, in S666, when the main CPU 101 determines that the number of logical products is "0" (when the determination in S666 is YES), the main CPU 101 ends the logical product calculation process and stores the process, for example, in the pull-in priority order. Move to S627 of the process (see FIG. 126).

[Pull-in priority acquisition process]
Next, with reference to FIGS. 134 to 137, the attraction priority acquisition process performed in S627 during the attraction priority storage process (see FIG. 126) will be described. Note that FIGS. 134 and 135 are flowcharts showing the procedure of the attraction priority acquisition process. FIG. 136A is a diagram showing an example of a source program for executing the processes of S680 to S683 described later during the attraction priority acquisition process, and FIG. 136B shows the process of S686 described later during the attraction priority acquisition process. FIG. 136C is a diagram showing an example of a source program for execution, and FIG. 136C is a diagram showing an example of a source program for executing the process of S687 described later during the pull-in priority acquisition process. Further, FIG. 137 is a diagram showing an example of the configuration of the attraction priority table actually referred to on the source program of the attraction priority acquisition process.

First, the main CPU 101 determines whether or not it is time to check the right reel 3R (specific display column) (S671).

When the main CPU 101 determines in S671 that it is not the time to check the right reel 3R (when the determination in S671 is NO), the main CPU 101 performs the process of S674 described later. On the other hand, in S671, when the main CPU 101 determines that it is the time to check the right reel 3R (when the determination in S671 is YES), the main CPU 101 has "ANY role" in the symbol combination (winning combination) related to the internal winning combination. It is determined whether or not (a combination of predetermined symbols) is included (S672). The "ANY combination" here means a combination in which the winning is confirmed regardless of at least the stop symbol of the right reel 3R (at least the winning combination in which the stop symbol of the right reel 3R is an arbitrary symbol).

In S672, when the main CPU 101 determines that the symbol combination related to the internal winning combination does not include the "ANY combination" (when the determination in S672 is NO), the main CPU 101 performs the process of S674 described later. On the other hand, in S672, when the main CPU 101 determines that the symbol combination related to the internal winning combination includes the "ANY combination" (when the determination in S672 is YES), the main CPU 101 is in the winning operation flag storage area "ANY". The storage area corresponding to the "combination" is masked (S673). Specifically, the main CPU 101 sets "1" in the bit corresponding to the "ANY combination" in the winning operation flag storage area.

After the processing of S673, or when S671 or S672 is determined to be NO, the main CPU 101 sets "1" to the address of the last storage area as the address of the winning operation flag storage area (see FIGS. 28 to 30). The added address is set, the stop prohibition data is set, and the winning operation flag data length (data length of the winning operation flag storage area: 12 bytes in this embodiment) is set (S674). Next, the main CPU 101 acquires the value of the stock button operation counter and the stop button operation state (S675). The stop button operation counter is a counter for managing the number of stop buttons for which a stop operation is detected. Further, the operation stop button operation state is acquired by referring to the operation stop button storage area (see FIG. 33).

Next, the main CPU 101 subtracts (updates -1) the address of the set winning operation flag storage area by 1 (S676). Next, the main CPU 101 generates hit request flag data from the set winning operation flag storage area and the corresponding hit request flag storage area (see FIGS. 28 to 30), and the generated hit request flag data. Generates a prohibited winning operating position based on (S677).

Next, the main CPU 101 determines whether or not the stop operation position is the prohibited winning operation position (S678).

In S678, when the main CPU 101 determines that the stop operation position is not the prohibited winning operation position (when the determination in S678 is NO), the main CPU 101 performs the process of S684 described later. On the other hand, in S678, when the main CPU 101 determines that the stop operation position is the prohibited winning operation position (when the determination in S678 is YES), the value of the stop button operation counter of the main CPU 101 is the value of the third stop. Whether or not it is determined (S679).

In S679, when the main CPU 101 determines that the value of the stop button operation counter is the value of the third stop (when the determination in S679 is YES), the main CPU 101 performs the process of S705 described later. On the other hand, in S679, when the main CPU 101 determines that the value of the stop button operation counter is not the value of the third stop (when the determination in S679 is NO), the value of the stop button operation counter of the main CPU 101 is the second stop. It is determined whether or not it is a value (S680).

In S680, when the main CPU 101 determines that the value of the stop button operation counter is not the value of the second stop (when the determination in S680 is NO), the main CPU 101 performs the process of S684 described later. On the other hand, in S680, when the main CPU 101 determines that the value of the stop button operation counter is the value of the second stop (when the determination in S680 is YES), whether or not the main CPU 101 is after the right reel 3R is stopped. (S681).

When the main CPU 101 determines in S681 that the right reel 3R has been stopped (YES in S681), the main CPU 101 performs the process of S684 described later. On the other hand, in S681, when the main CPU 101 determines that the right reel 3R has not been stopped (NO determination in S681), the main CPU 101 has a flag that the hit request flag may be interfered with by "ANY combination". It is determined whether or not (whether or not the "ANY combination" is not included in the symbol combination (winning combination) related to the internal winning combination) (S682).

In S682, when the main CPU 101 determines that the hit request flag is not a flag that may be interfered with by the "ANY combination" (when the determination in S682 is YES), the main CPU 101 performs the process of S684 described later. On the other hand, in S682, when the main CPU 101 determines that the hit request flag is a flag that may be interfered with by the "ANY combination" (when the determination in S682 is NO), the main CPU 101 currently checks "ANY". It is determined whether or not it is time to check the hit request flag including the "combination" (S683).

In S683, when the main CPU 101 determines that the current check is the time to check the hit request flag including the "ANY combination" (when the determination in S683 is YES), the main CPU 101 performs the process of S705 described later.

On the other hand, in S683, when the main CPU 101 determines that the current check is not the time to check the hit request flag including "ANY combination" (when S683 is NO determination), when S678 or S680 is NO determination, or S681. Alternatively, if S682 is a YES determination, the main CPU 101 subtracts 1 from the winning operation flag data length (S684). Next, the main CPU 101 determines whether or not the winning operation flag data length is “0” (S685).

In S685, when the main CPU 101 determines that the winning operation flag data length is not "0" (when the determination in S685 is NO), the main CPU 101 returns the processing to the processing of S676 and repeats the processing after S676.

On the other hand, in S685, when the main CPU 101 determines that the winning operation flag data length is "0" (when the determination in S685 is YES), the main CPU 101 performs a stop control pull-in request flag setting process (S686). .. This process is performed by sequentially executing each process specified in the source program of FIG. 136B by the main CPU 101. Therefore, in this process, the AND operation process described with reference to FIG. 133 is performed. In the logical product operation process executed in the process of S686, as described above, the data of the hit (pull-in) request flag storage area is set in the "logical product destination data", and the data of the winning operation flag storage area is set. It is set in the "logical product source data", and the number of bytes "1" of the data length (1 byte) of the RT operation combination display flag is set in the "logical product count". The RT operation combination display flag is a storage area in which the symbol combination related to the RT transition is defined in the winning operation flag storage area, and in the present embodiment, only the storage area 11 is defined as shown in FIGS. 28 to 30. Become.

Next, the main CPU 101 refers to the pull-in priority table address storage area and acquires the pull-in priority table (S687). This process is performed by sequentially executing each process specified in the source program of FIG. 136C by the main CPU 101. Therefore, in this process, the initial value "1 (001H)" of the pull-in priority data is set to the currently set address, and the start address shown in FIG. 137 is "dPLVLTB00" to "dPLVLTB05". The pull-in priority table stored in one of the blocks is acquired. The attraction priority tables stored in the blocks whose start addresses are "dPLVLTB00" to "dPLVLTB05" shown in FIG. 137 are the attraction priority table numbers "00" to "05" shown in FIG. 27, respectively. Corresponds to the pull-in priority table.

Next, the main CPU 101 determines whether or not the data in the pull-in priority table stored at the currently set address is the end code (000H) (S688).

In S688, when the main CPU 101 determines that the data in the pull-in priority table stored at the currently set address is the end code (when the determination in S688 is YES), the main CPU 101 is described in S705 described later. Process. On the other hand, in S688, when the main CPU 101 determines that the data in the pull-in priority table stored at the currently set address is not an end code (when the determination in S688 is NO), the main CPU 101 operates a winning operation. The flag storage area is set (S689).

Next, the main CPU 101 acquires the pull-in priority data from the pull-in priority table based on the currently set address (S690). Next, the main CPU 101 sets the block counter of the pull-in priority table (S691). In the present embodiment, in this process, the main CPU 101 sets "2" to the value of the block counter of the pull-in priority table.

Next, the main CPU 101 sets the number of checks of the attraction priority table, and adds 1 (+1 update) to the address of the attraction priority table to be referred to (S692). In the present embodiment, in this process, the main CPU 101 sets the number of checks in the pull-in priority table to "8" (the number of bits of check data defined in the pull-in priority table shown in FIG. 137).

Next, the main CPU 101 acquires check data (see FIG. 137) based on the updated pull-in priority table address, and extracts check bits from the check data (S693). In the present embodiment, the check bit extracted here corresponds to bit 0 of the check data. For example, in the processing of S690, when the drawing priority data "03EH" is acquired from the pulling priority table defined in the block whose start address is "dPLVLTB00", in the processing of S693, "10001000B" is used as the check data. It is acquired and "0" is extracted as the value of the check bit.

Next, the main CPU 101 determines whether or not the value of the extracted check bit is "1" (S694).

In S694, when the main CPU 101 determines that the value of the extracted check bit is not "1" (when the determination in S694 is NO), the main CPU 101 performs the process of S699 described later. On the other hand, in S694, when the main CPU 101 determines that the value of the extracted check bit is "1" (when the determination in S694 is YES), the main CPU 101 adds 1 to the address of the reference pull-in priority table. (+1 update), and based on the updated address, the determination data (“flag determination data” in FIG. 137) is acquired from the pull-in priority table (S695).

Next, the main CPU 101 determines whether or not the currently acquired winning operation flag data is the determination target based on the determination data acquired in S695 (S696). In this process, the main CPU 101 compares the currently acquired winning operation flag data with the determination data, determines whether or not the former corresponds to the latter, and the former corresponds to the latter. In that case, it is determined that the currently acquired winning operation flag data is the determination target.

In S696, when the main CPU 101 determines that the winning operation flag data is not the determination target (NO determination in S696), the main CPU 101 performs the process of S699 described later. On the other hand, in S696, when the main CPU 101 determines that the winning operation flag data is the determination target (YES determination in S696), the main CPU 101 updates the attraction priority data (S697). In this process, the main CPU 101 updates (overwrites) the currently set attraction priority data with the attraction priority data associated with the determination data acquired in S697.

Next, the main CPU 101 updates the check data (S698). In this process, the main CPU 101 shifts the check data by one bit to the right (direction from bit 7 to bit 0). In this process, "0" is set in the bit 7 of the check data after the shift.

After the processing of S698, or when the determination in S694 or S696 is NO, the main CPU 101 determines whether or not the check data has a bit to be checked (a bit in which "1" is set) (S699).

In S699, when the main CPU 101 determines that the check data does not have a bit to be checked (NO determination in S699), the main CPU 101 performs the process of S702 described later. On the other hand, in S699, when the main CPU 101 determines that the check data has a bit to be checked (when the determination in S699 is YES), the main CPU 101 adds 1 to the address of the winning operation flag storage area to be checked (+1 update). ), And the number of checks is subtracted by 1 (S700).

Next, the main CPU 101 determines whether or not the number of checks is "0" (S701). When the main CPU 101 determines in S701 that the number of checks is not "0" (when the determination in S701 is NO), the main CPU 101 returns the processing to the processing of S698 and repeats the processing after S698.

On the other hand, in S701, when the main CPU 101 determines that the number of checks is "0" (when the determination in S701 is YES), the main CPU 101 checks the address of the winning operation flag storage area currently referred to for the number of checks. The initial value "8" is added to update the address of the winning operation flag storage area, and the value of the block counter is decremented by 1 (S702). Next, the main CPU 101 determines whether or not the value of the block counter is "0" (S703).

In S703, when the main CPU 101 determines that the value of the block counter is not "0" (when the determination in S703 is NO), the main CPU 101 returns the processing to the processing of S692 and repeats the processing after S692.

On the other hand, in S703, when the main CPU 101 determines that the value of the block counter is "0" (when the determination in S703 is YES), the main CPU 101 adds 1 to the address of the pull-in priority table to be referred to (+1 update). ) (S704). For example, if the currently referenced pull-in priority table is a pull-in priority table specified in the block whose start address is "dPLVLTB00", this process causes the refer-in pull-in priority table to have a start address of "dPLVLTB00". It is changed to the pull-in priority table specified in the block which is "dPLVLTB01". Then, after the processing of S704, the main CPU 101 returns the processing to the processing of S688, and repeats the processing after S688.

Here, returning to the processing of S679, S683 or S688 again, if S679, S683 or S688 is a YES determination, the main CPU 101 uses the attraction order data set at this point as the final attraction priority data. Set (S705). If S679 or S683 is YES, the main CPU 101 sets "0 (00H)" as the final pull-in priority data. In this case, since the end code is assigned to the attraction priority data "0 (00H)", no attraction data (stop prohibition) is set. Then, after the processing of S705, the main CPU 101 ends the attraction priority acquisition process, and shifts the process to S628 of the attraction priority storage process (see FIG. 126).

In the present embodiment, the attraction priority acquisition process is performed as described above. The attraction priority correspondence process of the "ANY combination" of S680 to S683 during the above-mentioned attraction priority acquisition process is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 136A. Will be. Among them, for example, the determination process of S683 is executed by a "JCP" instruction (predetermined determination instruction) on the source program. The "JCP" instruction is an instruction that executes an operation equivalent to a comparison instruction, and is an instruction code dedicated to the main CPU 101.

For example, when the source code "JCP cc, A, n, e" is executed on the source program, the contents (stored data) of the A register are compared with the integer n, and the comparison result is the condition of cc. If so, the process is jumped to the address specified by e. In the "cc condition" of the "JCP" instruction, one of the carry flag state and the zero flag state in the flag register F is specified (see FIG. 11). For example, if "C" is specified for cc, the condition of cc means that the carry flag is "1" (on state), and if "NC" is specified for cc, the condition of cc. Means that the carry flag is "0" (off state). Further, for example, if "Z" is specified for cc, the condition of cc means that the zero flag is "1" (on state), and if "NZ" is specified for cc, cc The condition means that the zero flag is "0" (off state).

As shown in FIG. 136A, when the "JCP" instruction is used on the source program of the pull-in priority correspondence process of the "ANY combination", the instruction related to the address setting can be omitted (the instruction related to the address setting is separately provided). Since it is not necessary to provide it), it is possible to increase the processing efficiency of the pull-in priority handling process of the "ANY combination" and reduce the capacity of the source program (the capacity used by the main ROM 102).

Further, the stop control pull-in request flag setting process of S686 during the above-mentioned pull-in priority acquisition process is performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 136B. In the stop control pull-in request flag setting process of S686, as shown in FIG. 136B, an "LDQ" instruction and "CALLF" that specify an address using a Q register (extended register), which is an instruction code dedicated to the main CPU 101. Instructions are used.

Therefore, by using the "LDQ" instruction using the Q register (extended register) in the stop control pull-in request flag setting process of S686, the main ROM 102, the main RAM 103, and the memory map I / O are accessed by the direct value. can do. In this case, the instruction related to the address setting can be omitted on the source program, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced. Further, the "CALLF" instruction is a 2-byte instruction code as described above. Therefore, by using these main CPU 101 dedicated instruction codes in the stop control pull-in request flag setting process, the efficiency of the process can be improved and the limited capacity of the main RAM 103 can be effectively utilized. ..

Further, in the present embodiment, in the stop control pull-in request flag setting process of S686 during the priority pull-in order acquisition process, the address "SB_DAND_00" of the jump destination logical product operation process specified by the "CALLF" instruction is the above-mentioned FIG. 126. It is the same as the jump destination address specified by the "CALLF" instruction in the AND operation processing of S626 during the attraction priority storage processing described in (see FIG. 127). That is, in the present embodiment, the source program for executing the AND operation process performed in the stop control pull-in request flag setting process of S686 during the priority pull-in order acquisition process is the logic performed in S626 during the lead-in priority storage process. It is the same as the source program for executing the AND operation process, and the source program for the AND operation process is shared (modularized) in both the S686 and S626 processes. In this case, since it is not necessary to separately provide the source program for the AND operation processing in both the S686 and S626 processes, the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, in the acquisition process of the attraction priority table (see FIG. 137) of S687 during the above-mentioned attraction priority acquisition process, the main CPU 101 sequentially executes each source code defined by the source program of FIG. 136C. Will be done. Then, in the acquisition process of the pull-in priority table of S687, as shown in FIG. 136C, the "LDQ" instruction that specifies the address using the Q register (extended register), which is the instruction code dedicated to the main CPU 101, is used.

Therefore, even in the acquisition process of the pull-in priority table of S687, the instruction related to the address setting can be omitted on the source program by using the "LDQ" instruction. As a result, the efficiency of the acquisition process of the pull-in priority table can be improved, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced.

As described above, in the above-mentioned various processes during the priority attraction order acquisition process of the present embodiment, the above-mentioned various instruction codes dedicated to the main CPU 101 are appropriately used to improve the efficiency of the corresponding processes and reduce the capacity of the source program. is doing. As a result, in the present embodiment, it is possible to improve the efficiency of the program processing speed of the main control circuit 90 and reduce the capacity, and it is possible to improve the playability by utilizing the free area corresponding to the reduced capacity. Will be.

[Reel stop control process]
Next, the reel stop control process performed in S213 in the main flow (see FIG. 82) will be described with reference to FIGS. 138 to 140. Note that FIG. 138 is a flowchart showing the procedure of the reel stop control process. FIG. 139 is a diagram showing an example of a source program for executing the processes of S711 to S716 described later during the reel stop control process, and FIG. 140 is a diagram showing the process of S726 described later during the reel stop control process. It is a figure which shows an example of the source program for this.

First, the main CPU 101 performs a reel stop enable signal OFF process (S711). In this process, the main CPU 101 mainly performs port output process of reel stop enable signal OFF data. Further, this processing is performed using the non-standard work area of the main RAM 103. The details of the reel stop enable signal OFF process will be described later with reference to FIG. 141 described later.

Next, the main CPU 101 determines whether or not the rotation speeds of all the reels have reached a predetermined constant speed (whether or not the "constant speed" has been reached) (S712). In S712, when the main CPU 101 determines that the rotation speeds of all reels are not "constant speed" (when the determination in S712 is NO), the main CPU 101 repeats the process of S712.

On the other hand, in S712, when the main CPU 101 determines that the rotation speeds of all the reels have reached "constant speed" (when the determination in S712 is YES), the main CPU 101 performs a reel stop enable signal ON process (S713). In this process, the main CPU 101 mainly performs port output process of the reel stop enable signal ON data. Further, this processing is performed using the non-standard work area of the main RAM 103. The details of the reel stop enable signal ON processing will be described later with reference to FIG. 142 described later.

Next, the main CPU 101 determines whether or not a valid stop button has been pressed (S714).

When the main CPU 101 determines in S714 that the valid stop button is not pressed (NO determination in S714), the main CPU 101 returns the process to the process of S713 and repeats the processes after S713. On the other hand, in S714, when the main CPU 101 determines that a valid stop button has been pressed (YES in S714), the main CPU 101 updates the operation stop button storage area (see FIG. 33), and the stop button is not yet pressed. The value of the operation counter is subtracted by 1 (S715).

Next, the main CPU 101 determines the search target reel from the operation stop button (S716). Further, in this processing, the address (starting address) setting processing of the rotation cylinder control data storage area in which the reel control management information of the search target reel is stored is also performed (source code “LDQ IX, wR1_CTRL- (wR2_CTRL-) in FIG. 139). -WR1_CTRL) ”).

Next, the main CPU 101 performs a reel stop enable signal OFF process (S717). This process is performed using the non-standard work area of the main RAM 103, similarly to S711. The details of the reel stop enable signal OFF process will be described later with reference to FIG. 141 described later. Next, the main CPU 101 stores the stop start position in the main RAM 103 based on the value of the symbol counter (S718).

Next, the main CPU 101 performs a reel stop selection process (S719). Although detailed description is omitted, in this process, the main CPU 101 performs a process of selecting the number of sliding pieces.

Next, the main CPU 101 determines a scheduled stop position based on the stop start position and the number of sliding pieces determined in S719, and stores the determined stop scheduled position in the main RAM 103 (S720). In this process, the main CPU 101 adds the number of slip pieces to the stop start position, and sets the addition result as the stop scheduled position.

Next, the main CPU 101 executes the symbol code storage process (S721). In this process, the symbol code corresponding to the scheduled stop position is stored in the symbol code storage area. Next, the main CPU 101 determines whether or not the reel to be controlled is the reel of the final stop (third stop) (S722). In this process, the main CPU 101 determines whether or not the reel to be controlled is the reel of the final stop (third stop) based on the value of the stop button non-operation counter, and the value of the stop button non-operation counter is set. When it is "0", it is determined that the reel to be controlled is the reel of the final stop.

In S722, when the main CPU 101 determines that the reel to be controlled is not the reel of the final stop (NO determination in S722), the main CPU 101 performs a control change process (S723). In this process, when the reel is at a specific stop position, the stop information group used for stopping the reel is updated. Next, the main CPU 101 performs the attraction priority storage process described with reference to FIG. 126 (S724).

Next, the main CPU 101 performs a stop interval remaining time standby process (S725). In this process, the main CPU 101 performs a standby process until a predetermined reel stop interval time set in advance elapses. Then, after the processing of S725, the main CPU 101 returns the processing to the processing of S711, and repeats the processing after S711.

Here, returning to the processing of S722 again, when the main CPU 101 determines in S722 that the reel to be controlled is the reel of the final stop (when the determination in S722 is YES), the main CPU 101 excites all the reels. Determines whether or not is in the stopped state (S726). In S726, when the main CPU 101 determines that the excitation of all reels is not in the stopped state (when the determination in S726 is NO), the main CPU 101 repeats the process of S726.

On the other hand, in S726, when the main CPU 101 determines that the excitation of all reels is in the stopped state (when the determination in S726 is YES), the main CPU 101 keeps the stop button operated for the third stop in the ON state. It is determined whether or not (the stop button is not released) (S727). In S727, when the main CPU 101 determines that the stop button operated by the third stop operation remains in the ON state (when the determination in S727 is YES), the main CPU 101 repeats the process of S727. On the other hand, in S727, when the main CPU 101 determines that the stop button operated by the third stop operation is not in the ON state (when the determination in S727 is NO), the main CPU 101 ends the reel stop control process and performs the process. Move to S214 of the main flow (see FIG. 82).

In this embodiment, the reel stop control process is performed as described above. The processes S711 to S716 during the reel stop control process described above are performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 139. As shown in FIG. 139, in the source program of the reel stop control process of the present embodiment, an instruction code dedicated to the main CPU 101, for example, an "LDQ" instruction for specifying an address using a Q register (extended register) or an "LDQ" instruction, " The "CALLF" instruction is used.

Therefore, by using such a main CPU 101 dedicated instruction code in the reel stop control process, the capacity of the source program of the reel control process can be reduced and the processing efficiency of the reel stop control process can be improved. can. That is, in the present embodiment, it is possible to improve the efficiency of the program processing speed and reduce the capacity of the main control circuit 90, and to utilize the free area of the main ROM 102 increased according to the reduced capacity for playability. Can be increased.

Further, the determination process of S726 during the reel stop control process described above is performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 140. As shown in FIG. 140, this process is executed by using the "LDQ" instruction and the "ORQ" instruction (predetermined OR operation instruction) on the source code.

The "ORQ" instruction is an instruction code for performing a logical sum operation, and is an instruction code dedicated to the main CPU 101 for specifying an address using a Q register (extended register). Then, for example, when the source code "ORQ (k)" is executed on the source program, the stored data (upper address value) of the Q register and the 1-byte integer k (direct value: lower address value) are used. A logical sum operation is performed between the contents of the memory (stored data) at the specified address and the contents (stored data) of the A register, and the operation result is stored in the A register.

Therefore, in the determination process of S726 during the reel stop control process, first, when the source code "LDQ A, (.LOW.wR1_TIM)" in FIG. 140 is executed, the stored data of the Q register and the integer value ". The contents of the memory (excitation timer value of the first reel) at the address specified by ".LOW.wR1_TIM" are loaded into the A register. In the present embodiment, the address of the area in the main RAM 103 in which the excitation timer value of the first reel is stored is "F032h". Then, in the determination process of S726 described above, the upper address value "F0h" of the address "wR1_TIM (F032h)" is set in the Q register in advance when the LDQ instruction is executed, and the lower side is set to the k value (direct value). The address value (".LOW.wR2_TIM" = 32h) is substituted.

Next, when the source code "ORQ (.LOW.wR2_TIM)" in FIG. 140 is executed, the address "wR2_TIM" of the area where the stored data (F0h) of the Q register and the excitation timer value of the second reel are stored. The logical sum operation of the memory contents (excitation timer value of the second reel) of the address specified by the lower address value (3Dh) of "F03Dh)" and the contents of the A register (excitation timer value of the first reel) is performed. The calculation result (combination result of the excitation timer value of the first reel and the excitation timer value of the second reel) is stored in the A register. Next, when the source code "ORQ (.LOW.wR3_TIM)" in FIG. 140 is executed, the address "wR3_TIM" of the area where the stored data (F0h) of the Q register and the excitation timer value of the third reel are stored. The contents of the memory of the address specified by the lower address value (48h) of "F048h)" (excitation timer value of the third reel) and the contents of the A register (excitation timer value of the first reel and the excitation timer of the second reel). A logical sum operation with the value (combination result with the value) is performed, and the operation result (combination result of the excitation timer values of the first to third reels) is stored in the A register.

As described above, in the present embodiment, various main CPU 101 dedicated instruction codes using the Q register (extended register) are used in the check process of the stop state of the reel (rotating cylinder). Therefore, by using these main CPU 101 dedicated instruction codes, the main ROM 102, the main RAM 103, and the memory map I / O can be accessed by direct values, and the instruction related to the address setting is omitted on the source program. Therefore, the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

As described above, in the various processes during the reel stop control process of the present embodiment, the various instruction codes dedicated to the main CPU 101 described above are appropriately used to improve the efficiency of the corresponding processes and reduce the capacity of the source program. ing. As a result, in the present embodiment, it is possible to improve the efficiency of the program processing speed of the main control circuit 90 and reduce the capacity, and it is possible to improve the playability by utilizing the free area corresponding to the reduced capacity. Will be.

[Reel stoptable signal OFF processing]
Next, with reference to FIG. 141, the reel stop enable signal OFF process performed in S711 or S717 during the reel stop control process (see FIG. 138) will be described. Note that FIG. 141 is a flowchart showing the procedure of the reel stop enable signal OFF process.

First, the main CPU 101 saves the address of the stack area (see FIG. 12C) of the main RAM 103 set in the stack pointer (SP) (S731). Next, the main CPU 101 sets the address of the non-standard stack area in the stack pointer (SP) (S732).

Next, the main CPU 101 saves the data set in all the registers (S733). Next, the main CPU 101 performs a set process of the reel stop enable signal OFF data (S734).

Next, the main CPU 101 performs non-standard port output processing (S735). In this process, the main CPU 101 generates and outputs OFF output data (output off mode data), which will be described later, based on the reel stop enable signal OFF data. It should be noted that this process is performed using the non-standard work area of the main RAM 103. The details of the non-standard port output processing will be described later with reference to FIG. 143 described later.

Next, the main CPU 101 restores the data of all the registers saved in S733 (S736). Next, the main CPU 101 sets the address of the stack area saved in S731 in the stack pointer (SP) (S737).

Then, after the processing of S737, the main CPU 101 ends the reel stop enable signal OFF processing. At this time, if the executed reel stop enable signal OFF process is the process of S711 in the reel stop control process (see FIG. 138), the main CPU 101 shifts the process to the process of S712 in the reel stop control process. On the other hand, when the executed reel stop enable signal OFF process is the process of S717 in the reel stop control process (see FIG. 138), the main CPU 101 shifts the process to the process of S718 in the reel stop control process.

[Reel stoptable signal ON processing]
Next, with reference to FIG. 142, the reel stop enable signal ON process performed in S713 during the reel stop control process (see FIG. 138) will be described. Note that FIG. 142 is a flowchart showing the procedure of the reel stop enable signal ON processing.

First, the main CPU 101 saves the address of the stack area (see FIG. 12C) of the main RAM 103 set in the stack pointer (SP) (S741). Next, the main CPU 101 sets the address of the non-specified stack area in the stack pointer (SP) (S742).

Next, the main CPU 101 saves the data set in all the registers (S743). Next, the main CPU 101 refers to the operation stop button storage area (see FIG. 33) and acquires the stop button state (S744). Next, the main CPU 101 performs a set process of the reel stop enable signal ON data (S745).

Next, the main CPU 101 performs non-standard port output processing (S746). In this process, the main CPU 101 generates and outputs ON output data (output on mode data), which will be described later, based on the reel stop enable signal ON data. It should be noted that this process is performed using the non-standard work area of the main RAM 103. The details of the non-standard port output processing will be described later with reference to FIG. 143 described later.

Next, the main CPU 101 restores the data of all the registers saved in S743 (S747). Next, the main CPU 101 sets the address of the stack area saved in S741 in the stack pointer (SP) (S748). Then, after the processing of S748, the main CPU 101 ends the reel stop enable signal ON processing, and shifts the processing to the processing of S714 in the reel stop control processing (see FIG. 138).

[Unspecified port output processing]
Next, with reference to FIGS. 143 and 144, the non-standard port output process performed in S735 during the reel stoptable signal OFF process (see FIG. 141) and S746 during the reel stoptable signal ON process (see FIG. 142). explain. Note that FIG. 143 is a flowchart showing the procedure of the non-standard port output process. Further, FIG. 144 is a diagram showing an example of a source program for executing the non-standard port output process.

First, the main CPU 101 determines whether or not the port output setting is the ON output mode (S751). In this process, the main CPU 101 determines that the port output setting is the ON output mode when the reel stop enable signal ON data is set, and when the reel stop enable signal OFF data is set, the main CPU 101 determines. , Judge that the port output setting is not ON output mode.

In S751, when the main CPU 101 determines that the port output setting is the ON output mode (when the determination in S751 is YES), the main CPU 101 performs the process of S753 described later. On the other hand, in S751, when the main CPU 101 determines that the port output setting is not the ON output mode (NO determination in S751), the main CPU 101 performs an OFF output data (output off mode data) generation process (S752). ). In this process, among the ports (bits) that are currently in the output on state, the port (bit) that you want to turn off is turned off, and the port (bit) that is currently in the output off state is turned off. OFF output data for maintaining the state is generated.

After the processing of S752 or when the determination in S751 is NO, the main CPU 101 performs an ON output data (output on mode data) generation process (S753). In this process, among the ports (bits) that are currently in the output off state, the port (bit) that you want to turn on is turned on, and the port (bit) that is currently in the output on state is turned on. ON output data for maintaining the state is generated. Next, the main CPU 101 outputs the generated output data from the designated port (S754).

Then, after the processing of S754, the main CPU 101 ends the non-standard port output processing. At this time, if the executed non-standard port output process is the process of S735 during the reel stop enable signal OFF process (see FIG. 141), the main CPU 101 processes the process of S736 during the reel stop enable signal OFF process. Move to. On the other hand, when the executed non-standard port output process is the process of S746 during the reel stop enable signal ON process (see FIG. 142), the main CPU 101 processes the process to the process of S747 during the reel stop enable signal ON process. Transfer.

In this embodiment, the non-standard port output process is performed as described above. Then, the above-mentioned non-standard port output processing is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 144.

Among them, in the process of generating the OFF output data of S752 during the above-mentioned non-standard port output process, the source codes "XOR (HL)" and "AND (HL)" in FIG. 144 are executed in this order. Will be done. Further, the process of generating the ON output data of S753 during the above-mentioned non-standard port output process is performed by executing the source code "OR (HL)" in FIG. 144.

By performing such output data generation processing on the source program, the OFF output data generated in S752 is generated even if the ON output data generation processing of S753 is performed after the OFF output data generation processing of S752. Does not change.

For example, the port output setting is the OFF output mode, and the output data indicating the non-standard port that you want to turn off in this process is "00010111" ("1" is the bit that you want to turn off), and the non-standard port is currently When the output data (backup data) output to is "0100011" ("1" is a bit currently on), the data of bit 0, bit 1 and bit 5 of the backup data is changed from "1" to "1". OFF output data for setting to "0" is generated. In this case, first, when the source code "XOR (HL)" in FIG. 144 is executed, an exclusive OR operation is performed between the output data "00010111" and the backup data "01010111", and the operation result is ". 01000100 "is obtained. Next, when the source code "AND (HL)" in FIG. 144 is executed, a logical product operation of the calculation result "010000100" and the backup data "01000111" is performed, and the calculation result "01000000" is used as OFF output data. Generated.

After that, when the ON output data generation process of S753 (source code “OR (HL)” in FIG. 144) is executed, the calculation result “01000000” (OFF output data) is turned on by this process. A logical sum operation is performed with the output data "0000000000" indicating the non-standard port to be desired ("0" is set for each bit of the output data because the port output setting is OFF output mode), and the operation result is "01000000" is obtained, and the OFF output data does not change. Qualitatively, when the port output setting is the OFF output mode, in the ON output data generation process of S753, the output for keeping the port (bit) that is in the output ON state in the OFF output data in the ON state. Since the data is generated, the OFF output data generated in S752 does not change even if the ON output data generation process of S753 is performed after the OFF output data generation process of S752.

[Prize search process]
Next, the winning search process performed in S214 in the main flow (see FIG. 82) will be described with reference to FIGS. 145 to 147. Note that FIG. 145 is a flowchart showing the procedure of the winning search process. FIG. 146 is a diagram showing an example of a source program for executing a winning search process. Further, FIG. 147 is a diagram showing an example of the configuration of the payout number data table that is actually referred to on the source program of the winning search process.

First, the main CPU 101 transfers and stores the data of each storage area stored in the symbol code storage area (see FIG. 35) to the corresponding storage area of the winning operation flag storage area (see FIGS. 28 to 30). (S761). Then, at the end of this processing, the address at the end of the winning operation flag storage area is set in the DE register.

Next, the main CPU 101 sets the address of the payout number data table (the start address “dPAYNUMTB” of the payout number data table shown in FIG. 147) in the HL register (S762). Next, the main CPU 101 sets the number of payout number tables (“5” in this embodiment) as the initial value of the winning search counter, and sets the initial value in the B register (S763).

Next, the main CPU 101 sets the data of the number of medals to be paid out (in this embodiment, any one of 1, 2, 3, and 9) in the C register based on the address set in the HL register. , The determination target data is set in the A register, and "2" is added (+2 update) to the address set in the HL register (S764). In the payout number data table shown in FIG. 147, the data of the payout number of medals is "payout number (1, 2, 3 or 9) * 2 + 0", and the determination target data is next to the payout number data. It is 1 byte of data (for example, "11111000B" etc.) stored in the address. Further, in the following, the data "0" in the data "number of medals to be paid out (1, 2, 3 or 9) * 2 + 0" set in the C register is referred to as "determination bit". This determination bit is information indicating whether or not the block is a determination target block of the winning search.

Next, the main CPU 101 extracts the value of the determination bit from the data of the number of medals to be paid out set in the C register (S765). Next, the main CPU 101 determines whether or not the block is a determination target block based on the value of the extracted determination bit (S766). In this process, the main CPU 101 determines that the block is a determination target block when the value of the extracted determination bit is "1". In this embodiment, as shown in FIG. 147, the value of the determination bit is always "0" regardless of the number of medals to be paid out, so that the processing of S766 is always a NO determination.

In S766, when the main CPU 101 determines that the block is not the determination target block (when the determination in S766 is NO), the main CPU 101 performs the process of S768 described later. On the other hand, in S766, when the main CPU 101 determines that the block is the determination target block (when the determination in S766 is YES), the main CPU 101 subtracts 1 from the address of the winning operation flag storage area set in the DE register (-). 1 update) (S767).

After the processing of S767 or when the determination in S766 is NO, the main CPU 101 extracts the data of the storage area specified by the address of the winning operation flag storage area set in the DE register as the determination data (S768).

Next, the main CPU 101 determines whether or not the determination result is a prize based on the determination target data set in the A register in S764 and the determination data extracted in S768 (S769). In this process, if the determination target data set in the A register in S764 is the same as the determination data extracted in S768, the main CPU 101 determines that the determination result is a prize.

In S769, when the main CPU 101 determines that the result of the determination is not a prize (when the determination in S769 is NO), the main CPU 101 performs the process of S776 described later. On the other hand, in S769, when the main CPU 101 determines that the result of the determination is a prize (when the determination in S769 is YES), the main CPU 101 has three current games (three bets on medals). ) (S770).

In S770, when the main CPU 101 determines that the current game is a three-card game (when the determination in S770 is YES), the main CPU 101 performs the process of S772 described later. On the other hand, in S770, when the main CPU 101 determines that the current game is not a three-card game (NO determination in S770), the main CPU 101 pays out a two-card game (a game in which the number of medals bet is two). The number of sheets (2 sheets) is set in the C register (S771).

After the processing of S771 or when the determination in S770 is YES, the main CPU 101 updates the number of payouts (S772). Specifically, the main CPU 101 adds the number of medals to be paid out set in the C register to the value of the current winning number counter, and sets the added value to the number of payouts.

Next, the main CPU 101 determines whether or not the value of the number of payouts is less than the maximum number of payouts "10" (S773).

In S773, when the main CPU 101 determines that the value of the number of payouts is less than the maximum number of payouts "10" (when the determination in S773 is YES), the main CPU 101 performs the process of S775 described later. On the other hand, in S773, when the main CPU 101 determines that the value of the number of payouts is not less than the maximum number of payouts "10" (when the determination in S773 is NO), the main CPU 101 sets the maximum number of payouts "10" to the number of payouts. (S774).

After the processing of S774 or when the determination in S773 is YES, the main CPU 101 stores the payout number in the winning number counter (S775).

After the processing of S775 or when the determination in S769 is NO, the main CPU 101 determines whether or not there is another prize (S776). In S776, when the main CPU 101 determines that there is another prize (when the determination in S776 is YES), the main CPU 101 returns the process to the process of S769 and repeats the processes after S769.

On the other hand, in S777, when the main CPU 101 determines that there is no other winning (when the determination in S776 is NO), the main CPU 101 subtracts 1 (updates -1) the value of the winning search counter (S777). In addition, as in the present embodiment, when there is only one effective line, since a plurality of small winning combinations are not duplicated and won a prize, the determination process of S776 is always a NO determination.

Next, the main CPU 101 determines whether or not the value of the winning search counter is "0" (S778).

In S778, when the main CPU 101 determines that the value of the winning search counter is not "0" (when the determination in S778 is NO), the main CPU 101 returns the processing to the processing of S764 and repeats the processing after S764. On the other hand, in S778, when the main CPU 101 determines that the value of the winning search counter is "0" (when the determination in S778 is YES), the main CPU 101 ends the winning search process and performs the process in the main flow (FIG. FIG. (Refer to 82) Move to the process of S215 in.

In the present embodiment, the winning search process is performed as described above. Then, the above-mentioned winning search process is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 146. Among them, the set processing of the payout number of S764 and the determination target data is performed by the main CPU 101 executing the source code "LDIN AC, (HL)".

When, for example, the source code "LDIN ss, (HL)" is executed on the source program, the contents of the memory specified by the address set in the HL register (pair register) and the address obtained by adding 1 to the address ( The data) is loaded into the ss (BC, DE, AC, AE or BD) pair register, and the address set in the HL register is updated by +2 (2 additions). Therefore, when the source code "LDIN AC, (HL)" in FIG. 146 is executed, the contents of the memory specified by the address set in the HL register (pair register) and the address obtained by adding 1 to the address (the contents of the memory). The number of payouts and the data to be determined) are loaded into the AC register, and the address set in the HL register is updated by +2 (2 additions). In the process of S764, by this "LDIN" instruction, the data of the number of payouts is stored in the A register, the determination target data is stored in the C register, and the address set in the HL register is updated by +2.

As described above, in the winning search process of the present embodiment, both the data load process and the address update process can be performed by one "LDIN" command. In this case, the instruction related to the address setting can be omitted on the source program, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, the acquisition process of the value of the medal counter referred to in the determination process of S770 during the above-mentioned winning search process, the acquisition process of the value of the winning number counter referred to in the processing of S772, and the winning number counter performed in the processing of S775. As shown in FIG. 146, all the save (update) processes are executed by the "LDQ" instruction (instruction code dedicated to the main CPU 101) that specifies the address using the Q register (extended register). Therefore, in the winning search process of the present embodiment, the main ROM 102, the main RAM 103, and the memory map I / O can be accessed by the direct value by using the "LDQ" instruction, so that the address on the source program can be accessed. The instruction related to the setting can be omitted (it is not necessary to separately provide the instruction related to the address setting), and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, as shown in FIG. 146, the determination process of S769 during the winning search process described above is executed by the "JSLAA" instruction (predetermined determination instruction) on the source program. The "JSLAA" instruction is an instruction that executes an operation equivalent to a left shift (SLA) instruction.

For example, when the source code "JSLAA cc, e" is executed on the source program, if the condition of cc is satisfied, the process is jumped to the address specified by e. The state of the carry flag in the flag register F is specified in the "cc condition" specified by the "JSLAA" instruction. For example, if "C" is specified for cc, the condition of cc means that the carry flag is "1" (on state), and if "NC" is specified for cc, the condition of cc. Means that the carry flag is "0" (off state). Therefore, in the source code "JSLAA NC, MN_CKLN_06" in FIG. 146, if the carry flag is "0" (off state), the process jumps to the address specified by "MN_CKLN_06".

Further, the determination process of S770 and S773 during the above-mentioned winning search process is executed by the "JCP" instruction on the source program as shown in FIG. 146. As described above, the "JCP" instruction is an instruction that executes an operation equivalent to a comparison instruction, and is an instruction code dedicated to the main CPU 101.

Therefore, when the above-mentioned "JSLAA" command and "JCP" command are used on the source program of the winning search process, the command related to the address setting can be omitted (it is necessary to separately provide the command related to the address setting). The capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Illegal hit check processing]
Next, the illegal hit check process performed in S215 in the main flow (see FIG. 82) will be described with reference to FIGS. 148 and 149. Note that FIG. 148 is a flowchart showing the procedure of the illegal hit check process. Further, FIG. 149 is a diagram showing an example of a source program for executing the illegal hit check process. The illegal hit is a BB winning number and a small winning combination (internal winning combination) that are drawn by the internal lottery process (see FIG. 92) and stored in the winning number storage area by the symbol setting process (see FIG. 97). Based on this, it is a term indicating that the left reel 3L, the middle reel 3C, and the right reel 3R are stopped on the effective line with a combination of symbols that cannot be established (symbol combination is not established).

First, the main CPU 101 sets the address of the winning operation flag storage area (see FIGS. 28 to 30) (S781). Next, the main CPU 101 sets the size of the winning operation flag storage area (the number of bytes, “12” in the present embodiment) to the value of the check counter (S782).

Next, the main CPU 101 is based on the address of the winning operation flag storage area currently set, and the internal winning combination stored in the storage area in the hit request flag storage area (internal winning combination storage area) corresponding to the address. Data (hit request flag data) is acquired (S783). Next, the main CPU 101 synthesizes the data of the winning combination (winning operation flag data) stored in the address of the currently set winning operation flag storage area and the data of the internal winning combination (winning request flag data) ( S784).

In this synthesis process, the main CPU 101 first obtains the exclusive OR of the winning combination data (winning operation flag data) and the internal winning combination data (winning request flag data) (source program shown in FIG. 149). Source code inside "XOR (HL)"). Next, the main CPU 101 obtains a logical product of the obtained exclusive OR calculation result and the winning combination data (winning operation flag data) (source code “AND (HL)” in the source program shown in FIG. 149. ), The calculation result of the logical product is used as the synthesis result. If no illegal hit error has occurred, the value of this synthesis result is "0".

Next, the main CPU 101 determines whether or not an illegal hit error has occurred based on the result of the synthesis process of S784 (S785).

In S785, when the main CPU 101 determines that an illegal hit error has not occurred (NO determination in S785), the main CPU 101 updates the address of the winning operation flag storage area to be referred to by +1 (S786). Next, the main CPU 101 subtracts 1 from the value of the check counter (S787). Next, the main CPU 101 determines whether or not the value of the check counter is "0" (S788).

In S788, when the main CPU 101 determines that the value of the check counter is not "0" (when the determination in S788 is NO), the main CPU 101 returns the processing to the processing of S783 and repeats the processing after S783. On the other hand, in S788, when the main CPU 101 determines that the value of the check counter is "0" (when the determination in S788 is YES), the main CPU 101 ends the illegal hit check process and performs the process in the main flow (FIG. FIG. (Refer to 82), the process proceeds to S216.

Here, returning to the processing of S785 again, when the main CPU 101 determines in S785 that an illegal hit error has occurred (when the determination in S785 is YES), the main CPU 101 performs the error processing described with reference to FIG. (S789). By this processing, the two-character "EE" indicating the occurrence of an illegal hit error is displayed as error information on the 2-digit 7-segment LED (both for displaying the number of payouts and for displaying the error) included in the information display 6. Error display data is output. The state in which the illegal hit error occurs (error state) is released by pressing the reset switch 76 (see FIG. 7).

Next, the main CPU 101 clears the value of the winning number counter and the data of the winning request flag storage area (S790). Then, after the processing of S790, the main CPU 101 ends the illegal hit check processing, and shifts the processing to the processing of S216 in the main flow (see FIG. 82).

In this embodiment, the illegal hit check process is performed as described above. Then, the above-mentioned illegal hit check process is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 149.

In this embodiment, as shown in FIGS. 28 to 30, the configuration of the winning operation flag storage area (display combination storage area) is the same as that of the hit request flag storage area (internal winning combination storage area). The winning request flag storage area and the winning operation flag storage area arranged in the main RAM 103 at the time of combining the winning combination of the winning operation flag storage area and the internal winning combination can be configured in the same configuration. Therefore, the calculation result of S784 (the result of synthesizing the data of the winning combination and the data of the internal winning combination) in the illegal hit check process of the present embodiment is the data of the winning combination and the internal on the source program as described above. It is obtained by simply logically multiplying the winning combination data (executed by the "AND" instruction). As a result, in the present embodiment, the illegal hit check process can be made more efficient and simplified, the free space of the main control program can be secured (increased), and the increased free space can be used for playability. It will be possible to increase.

[Prize check / medal payout process]
Next, the winning check / medal payout process performed in S216 in the main flow (see FIG. 82) will be described with reference to FIGS. 150 and 151. Note that FIG. 150 is a flowchart showing the procedure of winning check / medal payout processing. Further, FIG. 151 is a diagram showing an example of a source program for executing the processes of S804 to S808 described later during the winning check / medal payout process.

First, the main CPU 101 performs a winning operation command generation process (S801). In this process, the main CPU 101 generates type data and various communication parameters included in the winning operation command transmitted to the sub-control circuit 200. The winning operation command is configured to include a parameter for specifying a winning operation flag (display combination) and the like.

Next, the main CPU 101 performs the communication data storage process described with reference to FIG. 72 (S802). By this process, the winning operation command data is stored in the communication data storage area (see FIG. 75B) provided in the main RAM 103. The winning operation command is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158.

Next, the main CPU 101 determines whether or not the value of the winning number counter is "0" (S803). In S803, when the main CPU 101 determines that the value of the winning number counter is "0" (when the determination in S803 is YES), the main CPU 101 ends the winning check / medal payout process, and performs the process in the main flow (when the winning check / medal payout process is completed). (Refer to FIG. 82), the process proceeds to S217.

On the other hand, in S803, when the main CPU 101 determines that the value of the winning number counter is not "0" (when the determination in S803 is NO), the main CPU 101 has the maximum number of medals credited (stored). In the embodiment, it is determined whether or not the number is 50 or more (S804).

In S804, when the main CPU 101 determines that the number of credits for medals is not equal to or greater than the upper limit (when the determination in S804 is NO), the main CPU 101 adds "1" to the value of the credit counter (updates +1). S805). The added value of the credit counter is displayed by a 2-digit 7-segment LED (not shown) for displaying the number of stored sheets included in the information display 6. Next, the main CPU 101 performs a medal payout number check process (S806). The details of the medal payout number check process will be described later with reference to FIG. 152 described later.

Next, the main CPU 101 determines whether or not the payout of medals has been completed (S807). In S807, when the main CPU 101 determines that the payout of medals has been completed (when the determination in S807 is YES), the main CPU 101 ends the winning check / medal payout process, and the process is in the main flow (see FIG. 82). Move to the processing of S217.

On the other hand, when the main CPU 101 determines in S807 that the payout of medals has not been completed (NO in S807), the main CPU 101 performs a payout interval standby process (S808). In this process, the main CPU 101 waits until the preset medal payout interval time (60.33 msec in this embodiment: 54 cycles of the interrupt process (1.1172 msec cycle) described later with reference to FIG. 158) elapses. Wait. Then, after the processing of S808, the main CPU 101 returns the processing to the processing of S803, and repeats the processing after S803.

Here, returning to the processing of S804 again, when the main CPU 101 determines in S804 that the number of credits for medals is equal to or more than the upper limit number (50) (when the determination in S804 is YES), the main CPU 101 determines that the number of medals is equal to or more than the upper limit (50). The medal payout process is performed (S809). By this process, one medal is paid out. Then, after the processing of S809, the main CPU 101 ends the winning check / medal payout processing, and shifts the processing to the processing of S217 in the main flow (see FIG. 82).

In the present embodiment, the winning check and the medal payout process are performed as described above. The processes S804 to S808 during the above-mentioned winning check / medal payout process are performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 151.

In the present embodiment, when the payout operation is continued after the credit counter is updated (+1), the main CPU 101 performs a wait (payout interval wait) process for 60.33 ms in the process of S808, but this process is performed. On the source program, the main CPU 101 is realized by executing the source codes "LD BC, cTM_PAYC" and "RST SB_W1BC_00" in this order. In this way, in the winning check / medal payout process, if a wait (waiting for the payout interval) is performed for 60.33 ms when the payout operation is continued after updating the credit counter (+1), unnecessary waiting time is reduced. It is possible to reduce the mental burden on the player.

[Medal payout number check process]
Next, with reference to FIGS. 152 and 153, the medal payout number check process performed in S806 during the winning check / medal payout process (see FIG. 150) will be described. Note that FIG. 152 is a flowchart showing the procedure of the medal payout number check process. Further, FIG. 153A is a diagram showing an example of a source program for executing the processes of S811 to S814 described later during the medal payout number check process, and FIG. 153B shows S816 and S816 described later during the medal payout number check process. It is a figure which shows an example of the source program for executing the process of S817.

First, the main CPU 101 adds (+1 update) to the value of the medal OUT counter (S811). The medal OUT counter is a counter for counting the number of times the medal is paid out. Next, the main CPU 101 adds (+1 update) to the value of the payout number counter (S812). The payout number counter is a counter for counting the payout number of medals.

Next, the main CPU 101 performs a payout number 7SEG display process (S813). In this process, the main CPU 101 performs a control process of displaying the value of the payout number counter by a 2-digit 7-segment LED (not shown) for displaying the payout number included in the information display 6.

Next, the main CPU 101 performs an update process of the winning combination end number counter (S814). It should be noted that the winning combination end number counter is a counter for counting the remaining number of medals to be paid out corresponding to the winning combination. In this process, the main CPU 101 compares the value of the combination end number counter with the lower limit value “0”, and if the value of the combination end number counter is larger than the lower limit value “0”, the combination end number counter. The value of the counter is subtracted by 1 (updated by -1), and when the value of the winning combination end number counter is equal to or less than the lower limit value "0", the value of the winning combination ending number counter is held at "0".

Next, the main CPU 101 subtracts (updates -1) the value of the winning number counter by 1 (S815).

Next, the main CPU 101 performs a credit information command generation process (S816). In this process, the main CPU 101 generates type data and various communication parameters included in the credit information command transmitted to the sub control circuit 200. The credit information command is configured to include a parameter for specifying the number of credits for medals.

Next, the main CPU 101 performs the communication data storage process described with reference to FIG. 72 (S817). By this process, the credit information command data is stored in the communication data storage area (see FIG. 75B) provided in the main RAM 103. The credit information command is transmitted from the main control circuit 90 to the sub control circuit 200 by the communication data transmission process in the interrupt process described later with reference to FIG. 158. Then, after the processing of S817, the main CPU 101 ends the medal payout number check process, and shifts the process to the process of S807 in the winning check / medal payout process (see FIG. 150).

In the present embodiment, the medal payout number check process is performed as described above. The processes of S811 to S814 during the above-mentioned medal payout number check process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 153A. Among them, the update process of the combination end number counter of S814 is executed by the "DCPLD" instruction (predetermined update instruction) in FIG. 153A. The "DCPLD" instruction is an instruction code dedicated to the main CPU 101.

For example, when the source code "DCPLD (HL), n" is executed on the source program, the contents of the memory (stored data) at the address specified by the HL register are compared with the integer n, and the contents of the memory are compared. If it is larger than the integer n, the contents of the memory are subtracted by 1, and if the contents of the memory are not more than or equal to the integer n, the integer n is stored in the memory at the address specified by the HL register. Therefore, when the source code "DCPLD (HL), 0" in FIG. 153A is executed, the contents of the memory at the address specified by the HL register (value of the winning combination end number counter) and an integer 0 (lower limit value). If the memory content (value of the winning combination end number counter) is greater than the integer 0, the memory content is decremented by 1, and if the memory content is an integer 0 or less, the memory content is subtracted. "0" is set in (value of the number counter for the end of the winning combination). That is, if the value of the current winning combination end number counter is larger than "0", the winning combination ending number counter is updated, and if the current winning combination ending number counter value is "0" or less. , The process of holding the value of the winning combination end number counter at "0" is performed.

As described above, in the processing of S814 during the medal payout number check processing, one "DCPLD" command (command in which the lower limit judgment command of the number management counter and the judgment branch command are integrated) is used to complete the number of consecutive combinations. Both the counter update (subtraction) process and the process of holding the value of the continuous end number counter at "0" can be executed. In this case, it is not necessary to provide an instruction code for executing both processes separately. For example, the judgment branch instruction code for determining whether or not the value of the continuous end number counter is "0" can be omitted. Therefore, in the medal payout number check process of the present embodiment, the capacity of the source program (the capacity used by the main ROM 102) can be reduced, and the free capacity can be secured (increased) in the main ROM 102, resulting in an increase. It is possible to improve the playability by utilizing the free space.

Further, the processes of S816 and S817 during the above-mentioned medal payout number check process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 153B.

Among them, in the process of S816, as shown in FIG. 153B, the value of the payout number counter is set in the communication parameter 1 of the credit information command via the L register, and the credit is set in the communication parameter 5 via the C register. The value of the counter is set. However, the other communication parameters 2 to 4 constituting the credit information command are set with values (indefinite values) currently stored in the H register, the E register, and the D register, respectively. Therefore, the values of the communication parameters 2 to 4 at the time of transmitting the credit information command are undefined values. As a result, in the present embodiment, the sum value (BCC) of the credit information command can be set to an indefinite value for each transmission, and fraudulent acts such as goto can be suppressed.

[BB check process]
Next, the BB check process performed in S217 in the main flow (see FIG. 82) will be described with reference to FIG. 154. Note that FIG. 154 is a flowchart showing the procedure of the BB check process.

First, the main CPU 101 determines whether or not the current gaming state is a bonus state (S821). In S821, when the main CPU 101 determines that the current gaming state is not the bonus state (when the determination in S821 is NO), the main CPU 101 performs the process of S832 described later.

On the other hand, in S821, when the main CPU 101 determines that the current gaming state is the bonus state (when the determination in S821 is YES), the main CPU 101 is for counting the number of medals that can be paid out during the bonus state. The number of medals paid out in the winning check / medal payout process is subtracted from the value of the BB payout number counter (S822).

Next, the main CPU 101 determines whether or not the value of the BB payout number counter is less than "0" (S823). In S823, when the main CPU 101 determines that the value of the payout number counter in BB is not less than "0" (when the determination in S823 is NO), the main CPU 101 ends the BB check process and performs the process in the main flow (FIG. (Refer to 82), the process proceeds to S218.

On the other hand, in S823, when the main CPU 101 determines that the value of the payout number counter in BB is less than "0" (when the determination in S823 is YES), the main CPU 101 performs the bonus end processing (S824). In this process, the main CPU 101 clears various information in the bonus state and sets the RT1 state flag to the on state.

Next, the main CPU 101 refers to the CT lottery table at the end of the bonus (see FIG. 60) and performs the CT lottery at the end of the bonus (S825). Next, the main CPU 101 determines whether or not the CT lottery at the end of the bonus has been won (S826).

In S826, when the main CPU 101 determines that the CT lottery has not been won (when the determination in S826 is NO), the main CPU 101 performs the process of S828 described later. On the other hand, in S826, when the main CPU 101 determines that the CT lottery has been won (when the determination in S826 is YES), the main CPU 101 adds "1" to the number of CT sets (S827). If the CT lottery is won when the number of ART sets is "0", "1" is added to the number of CT sets and "1" is also added to the number of ART sets in the processing of S827. ..

After the processing of S827 or when the determination in S826 is NO, the main CPU 101 determines whether or not the number of ART sets or the number of CT sets is "1" or more (S828).

In S828, when the main CPU 101 determines that the number of ART sets or the number of CT sets is "1" or more (when the determination in S828 is YES), the main CPU 101 sets the ART preparation state in the game state of the next game. (S829). Then, after the processing of S829, the main CPU 101 ends the BB check processing and shifts the processing to the processing of S218 in the main flow (see FIG. 82).

On the other hand, in S828, when the main CPU 101 determines that the number of ART sets or the number of CT sets is not "1" or more (when the determination in S828 is NO), the main CPU 101 sets the normal gaming state in the gaming state of the next game. (S830). Next, the main CPU 101 draws the lottery state of the CZ with reference to the normal medium-high probability lottery table (see FIG. 40B), and sets the lottery result (S831). Then, after the processing of S831, the main CPU 101 ends the BB check processing and shifts the processing to the processing of S218 in the main flow (see FIG. 82).

Here, returning to the process of S821 again, when S821 is NO determination, the main CPU 101 determines whether or not the symbol combination related to the BB combination (the symbol combination of the combination "C_BB1" or "C_BB2") is displayed. (S832). In S832, when the main CPU 101 determines that the symbol combination related to the BB combination is not displayed (when the determination in S832 is NO), the main CPU 101 ends the BB check process and performs the process in the main flow (see FIG. 82). Move to the processing of S218 inside.

On the other hand, in S832, when the main CPU 101 determines that the symbol combination related to the BB combination is displayed (when the determination in S832 is YES), the main CPU 101 refers to the bonus type lottery table (see FIG. 58) and gives a bonus. The type is drawn and the lottery result is set (S833). Next, the main CPU 101 sets a predetermined value (the number of payouts that triggers the end of the bonus: "216" in the present embodiment) to the value of the payout number counter during BB (S834).

Next, the main CPU 101 performs a bonus start processing (S835). In this process, the main CPU 101 performs various processes necessary for starting the operation of the bonus, such as setting a bonus state in the game state of the next game. Then, after the processing of S835, the main CPU 101 ends the BB check processing and shifts the processing to the processing of S218 in the main flow (see FIG. 82).

[RT check processing]
Next, the RT check process performed in S218 in the main flow (see FIG. 82) will be described with reference to FIGS. 155 and 156. Note that FIGS. 155 and 156 are flowcharts showing the procedure of the RT check process.

First, the main CPU 101 determines whether or not the RT state is the RT5 state (S841). In S841, when the main CPU 101 determines that the RT state is the RT5 state (when the determination in S841 is YES), the main CPU 101 ends the RT check process and performs the process in S219 in the main flow (see FIG. 82). Move to the processing of.

On the other hand, in S841, when the main CPU 101 determines that the RT state is not the RT5 state (when the determination in S841 is NO), the main CPU 101 determines whether or not the RT state is the RT0 state (S842). In S842, when the main CPU 101 determines that the RT state is not the RT0 state (when the determination in S842 is NO), the main CPU 101 performs the process of S845 described later.

On the other hand, in S842, when the main CPU 101 determines that the RT state is the RT0 state (when the determination in S842 is YES), the main CPU 101 displays the symbol combination of the abbreviation "bell spilled eyes" (see FIG. 28). It is determined whether or not it is (S843). In S843, when the main CPU 101 determines that the symbol combination of the abbreviation "bell spilled eyes" is not displayed (when the determination in S843 is NO), the main CPU 101 ends the RT check process and performs the process in the main flow (FIG. (Refer to 82), the process proceeds to S219.

On the other hand, in S843, when the main CPU 101 determines that the symbol combination of the abbreviation "bell spilled eyes" is displayed (when the determination in S843 is YES), the main CPU 101 sets the RT2 state flag to the ON state (S844). .. By this process, the RT state shifts from the RT0 state to the RT2 state. Then, after the processing of S844, the main CPU 101 ends the RT check processing and shifts the processing to the processing of S219 in the main flow (see FIG. 82).

Here, returning to the process of S842 again, when the determination in S842 is NO, the main CPU 101 determines whether or not the RT state is the RT1 state (S845). In S845, when the main CPU 101 determines that the RT state is not the RT1 state (when the determination in S845 is NO), the main CPU 101 performs the process of S850 described later.

On the other hand, in S845, when the main CPU 101 determines that the RT state is the RT1 state (when the determination in S845 is YES), the main CPU 101 determines whether or not the symbol combination of the abbreviation "bell spilled eye" is displayed. (S846).

In S846, when the main CPU 101 determines that the symbol combination of the abbreviation "bell spilled eyes" is displayed (when the determination in S846 is YES), the main CPU 101 sets the RT1 state flag to the off state and the RT2 state flag. Is set to the on state (S847). By this process, the RT state shifts from the RT1 state to the RT2 state. Then, after the processing of S847, the main CPU 101 ends the RT check processing and shifts the processing to the processing of S219 in the main flow (see FIG. 82).

On the other hand, in S846, when the main CPU 101 determines that the symbol combination of the abbreviation "bell spilled eyes" is not displayed (when the determination in S846 is NO), the main CPU 101 determines whether or not 20 games in the RT1 state have elapsed. (S848).

In S848, when the main CPU 101 determines that 20 games in the RT1 state have not elapsed (NO determination in S848), the main CPU 101 ends the RT check process and performs the process in the main flow (see FIG. 82). ) Move to the processing of S219. On the other hand, in S848, when the main CPU 101 determines that 20 games in the RT1 state have elapsed (YES in S848), the main CPU 101 sets the RT1 state flag to the off state (S849). By this process, the RT state shifts from the RT1 state to the RT0 state. Then, after the processing of S849, the main CPU 101 ends the RT check processing and shifts the processing to the processing of S219 in the main flow (see FIG. 82).

Here, returning to the process of S845 again, when the determination in S845 is NO, the main CPU 101 determines whether or not the RT state is the RT2 state (S850). In S850, when the main CPU 101 determines that the RT state is not the RT2 state (when the determination in S850 is NO), the main CPU 101 performs the process of S853 described later.

On the other hand, in S850, when the main CPU 101 determines that the RT state is the RT2 state (when the determination in S850 is YES), the main CPU 101 displays the symbol combination (see FIG. 28) of the abbreviation "RT3 transition lip". It is determined whether or not it is (S851). In S851, when the main CPU 101 determines that the symbol combination of the abbreviation "RT3 transition lip" is not displayed (when the determination in S851 is NO), the main CPU 101 ends the RT check process and performs the process in the main flow (FIG. FIG. (Refer to 82) Move to the process of S219 in.

On the other hand, in S851, when the main CPU 101 determines that the symbol combination of the abbreviation "RT3 transition lip" is displayed (when the determination in S851 is YES), the main CPU 101 sets the RT2 state flag to the off state and RT3. The state flag is set to the on state (S852). By this process, the RT state shifts from the RT2 state to the RT3 state. Then, after the processing of S852, the main CPU 101 ends the RT check processing and shifts the processing to the processing of S219 in the main flow (see FIG. 82).

Here, returning to the process of S850 again, when the determination in S850 is NO, the main CPU 101 determines whether or not the RT state is the RT3 state (S853). In S853, when the main CPU 101 determines that the RT state is not the RT3 state (when the determination in S853 is NO), the main CPU 101 performs the process of S862 described later.

On the other hand, in S853, when the main CPU 101 determines that the RT state is the RT3 state (when the determination in S853 is YES), the main CPU 101 displays the symbol combination of the abbreviation "bell spilled eyes" or "RT2 transition lip". It is determined whether or not it has been done (S854).

In S854, when the main CPU 101 determines that the symbol combination of the abbreviation "bell spilled eye" or "RT2 transition lip" is displayed (when the determination in S854 is YES), the main CPU 101 sets the RT3 state flag to the off state. At the same time, the RT2 state flag is set to the on state (S855). By this process, the RT state shifts from the RT3 state to the RT2 state. Then, after the processing of S855, the main CPU 101 ends the RT check processing and shifts the processing to the processing of S219 in the main flow (see FIG. 82).

On the other hand, in S854, when the main CPU 101 determines that the symbol combination of the abbreviation "bell spilled eyes" or the "RT2 transition lip" is not displayed (when the determination in S854 is NO), the main CPU 101 has the abbreviation "RT4 transition". It is determined whether or not the symbol combination (see FIG. 28) of "Rip" is displayed (S856).

In S856, when the main CPU 101 determines that the symbol combination of the abbreviation "RT4 transition lip" is not displayed (when the determination in S856 is NO), the main CPU 101 ends the RT check process and performs the process in the main flow (when it is determined). (Refer to FIG. 82), the process proceeds to S219. On the other hand, in S856, when the main CPU 101 determines that the symbol combination of the abbreviation "RT4 transition lip" is displayed (when the determination in S856 is YES), the main CPU 101 sets the RT3 state flag to the off state and RT4. The state flag is set to the on state (S857). By this process, the RT state shifts from the RT3 state to the RT4 state.

After the processing of S857, the main CPU 101 determines whether or not the gaming state is the ART preparation state (S858). In S858, when the main CPU 101 determines that the gaming state is not the ART preparation state (NO determination in S858), the main CPU 101 ends the RT check process and performs the process in S219 in the main flow (see FIG. 82). Move to the processing of.

On the other hand, in S858, when the main CPU 101 determines that the gaming state is the ART ready state (when the determination in S858 is YES), the main CPU 101 determines whether or not the number of CT sets is "1" or more. (S859).

In S859, when the main CPU 101 determines that the number of CT sets is "1" or more (when the determination in S859 is YES), the main CPU 101 sets CT in the game state of the next game and sets the CT game number counter. Set "8" (S860). Then, after the processing of S860, the main CPU 101 ends the RT check processing and shifts the processing to the processing of S219 in the main flow (see FIG. 82).

On the other hand, in S859, when the main CPU 101 determines that the number of CT sets is not "1" or more (when the determination in S859 is NO), the main CPU 101 sets the normal ART in the game state of the next game, and the ART end game. A predetermined value is set in the number counter (S861). Then, after the processing of S861, the main CPU 101 ends the RT check processing and shifts the processing to the processing of S219 in the main flow (see FIG. 82).

Here, returning to the process of S853 again, when the determination in S853 is NO, the main CPU 101 determines whether or not the symbol combination of the abbreviation "bell spilled eyes" or "RT2 transition lip" is displayed (S862). In S862, when the main CPU 101 determines that the symbol combination of the abbreviation "bell spilled eye" or "RT2 transition lip" is not displayed (when the determination in S862 is NO), the main CPU 101 ends the RT check process. , The processing is transferred to the processing of S219 in the main flow (see FIG. 82).

On the other hand, in S862, when the main CPU 101 determines that the symbol combination of the abbreviation "bell spilled eye" or "RT2 transition lip" is displayed (when the determination in S862 is YES), the main CPU 101 turns off the RT4 state flag. At the same time, the RT2 state flag is set to the on state (S863). By this process, the RT state shifts from the RT4 state to the RT2 state. Then, after the processing of S863, the main CPU 101 ends the RT check processing and shifts the processing to the processing of S219 in the main flow (see FIG. 82).

[Processing at the end of CZ / ART]
Next, with reference to FIG. 157, the CZ / ART end-time processing performed in S219 in the main flow (see FIG. 82) will be described. Note that FIG. 157 is a flowchart showing the procedure for processing at the end of CZ / ART.

First, the main CPU 101 determines whether or not the current gaming state is either at the time of CZ failure or at the end of ART (S871). In S871, when the main CPU 101 determines that the current gaming state is neither at the time of CZ failure nor at the end of ART (when the determination of S871 is NO), the main CPU 101 ends the processing at the end of CZ / ART. The process is transferred to the process of S201 in the main flow (see FIG. 82).

On the other hand, in S871, when the main CPU 101 determines that the current gaming state is either when the CZ fails or when the ART ends (when the determination in S871 is YES), the main CPU 101 uses the CZ lottery table (see FIG. 41B). ), The CZ pullback lottery is performed (S872). Next, the main CPU 101 determines whether or not the CZ pull-back lottery has been won (S873).

In S873, when the main CPU 101 determines that the CZ pull-back lottery has been won (when the determination in S873 is YES), the main CPU 101 sets the winning type CZ in the game state of the next game (S874). Next, the main CPU 101 sets a value corresponding to the winning type of CZ in the CZ game number counter (S875). Then, after the processing of S875, the main CPU 101 ends the processing at the end of CZ / ART, and shifts the processing to the processing of S201 in the main flow (see FIG. 82).

On the other hand, when it is determined in S873 that the main CPU 101 has not won the CZ pull-back lottery (when the determination in S873 is NO), the main CPU 101 sets the normal game state to the game state of the next game (S876). Next, the main CPU 101 draws the lottery state of the CZ with reference to the normal medium-high probability lottery table (see FIG. 40B), and sets the lottery result (S877). Then, after the processing of S877, the main CPU 101 ends the processing at the end of CZ / ART, and shifts the processing to the processing of S201 in the main flow (see FIG. 82).

[Interrupt processing controlled by the main CPU (1.1172 msec)]
Next, with reference to FIG. 158, the interrupt process performed by the main CPU 101 at a cycle of 1.1172 msec will be described. Note that FIG. 158 is a flowchart showing the procedure of the interrupt process. The interrupt process repeatedly executed in a cycle of 1.1172 msec occurs based on the output timing of the timeout signal of the timer circuit 113 set in the initialization process of the timer circuit 113 (PTC) (see S2 in FIG. 64). This is a process executed when the interrupt request signal from the interrupt controller 112 is input to the main CPU 101.

First, the main CPU 101 performs a register save process (S901). Next, the main CPU 101 performs an input port check process (S902). In this process, signals input from various switches such as a stop switch are checked.

Next, the main CPU 101 performs a reel control process (S903). In this process, the main CPU 101 starts the rotation of the left reel 3L, the middle reel 3C, and the right reel 3R when the rotation start of all the reels is requested, and then each reel rotates at a constant speed. Drive and control three stepping motors. When the number of sliding pieces is determined, the main CPU 101 updates the symbol counter of the corresponding reel by the number of sliding pieces. Then, the main CPU 101 waits for the updated symbol counter to match the value corresponding to the scheduled stop position (the symbol at the scheduled stop position reaches the area on the effective line of the display window) of the corresponding reel. The corresponding stepping motor is driven and controlled so that the rotation is decelerated and stopped.

Next, the main CPU 101 performs a communication data transmission process (S904). In this process, various commands stored in the communication data storage area are mainly transmitted to the sub control circuit 200 via the first serial communication circuit 114 (see FIG. 9) of the main control circuit 90. After transmitting a command to the sub-control circuit 200, the main CPU 101 subtracts and updates the communication data pointer by one packet (not shown), and clears the transmitted command data in the communication data storage area. When a plurality of command data are stored in the communication data storage area, the command data is transmitted to the sub-control circuit 200 in the order of the oldest stored command data. Further, when the command data is not stored in the communication data storage area, that is, when the value of the communication data pointer is "0", a non-operation command is generated and transmitted to the sub-control circuit 200. Next, the main CPU 101 performs a medal passing check process (S905). In this process, the main CPU 101 performs a check process of whether or not the inserted medal has passed the selector 66 based on the detection result (medal sensor input state) of the medal sensor (not shown). Next, the main CPU 101 performs the WDT restart process (S906).

Next, the main CPU 101 performs a 7-segment LED drive process (S907). In this process, the main CPU 101 drives and controls various 7-segment LEDs included in the information display 6, and displays, for example, the number of medals paid out, the number of credits, the stop button pressing order data, and the like. The details of the 7-segment LED drive process will be described later with reference to FIG. 159 described later.

Next, the main CPU 101 performs a timer update process (S908). In this process, the main CPU 101 performs a count (subtraction) process of various set timers. The details of the timer update process will be described later with reference to FIG. 164 described later.

Next, the main CPU 101 performs an error detection process (S909). Next, the main CPU 101 performs a door open / close check process (S910). In the door open / close check process, the main CPU 101 checks the open / closed state of the front door 2b (see FIG. 2) by checking the on (door closed) / off (door open) state of the door open / close monitoring switch 67.

Next, the main CPU 101 performs a test firing test signal control process (S911). In this process, control process for outputting various test signals to the tester via the second interface boat or the like is performed. Further, this process is executed using the non-standard work area (see FIG. 12C) of the main RAM 103. In the present embodiment, this process is also performed at times other than the test firing test (after the pachi-slot machine 1 is installed in the game store), but at this time, the main control board 71 passes through the second interface boat or the like. Since it is not connected to the testing machine, various test signals are generated but not output. The details of the test firing test signal control process will be described later with reference to FIG. 166 described later.

Next, the main CPU 101 performs a register reset process (S912). Then, after the processing of S912, the main CPU 101 ends the interrupt processing.

[7-segment LED drive processing]
Next, with reference to FIGS. 159 and 160, the 7-segment LED drive process performed in S907 during the interrupt process (see FIG. 158) will be described. Note that FIG. 159 is a flowchart showing the procedure of the 7-segment LED drive process. Further, FIG. 160A is a diagram showing an example of a source program for executing the processes of S923 to S925 described later during the 7-segment LED drive process, and FIG. 160B is a diagram showing S931 to S931 to be described later during the 7-segment LED drive process. It is a figure which shows an example of the source program for executing the process of S936.

First, the main CPU 101 adds (+1 update) “1” to the value of the interrupt counter (S921). Next, the main CPU 101 determines whether or not the value of the interrupt counter is an odd number (S922).

In S922, when the main CPU 101 determines that the value of the interrupt counter is not an odd number (when the determination in S922 is NO), the main CPU 101 ends the 7-segment LED drive process and interrupts the process (see FIG. 158). ) Move to the processing of S908. That is, in the present embodiment, the 7-segment LED drive process is performed every two interruption cycles. In the present embodiment, an example of executing the 7-segment LED drive process when the value of the interrupt counter is an even number has been described, but the present invention is not limited to this, and the 7-segment LED drive process is not limited to this, and the 7-segment LED drive process is performed when the value of the interrupt counter is an odd number. The LED drive process may be executed, or the execution timing of the 7-segment LED drive process may be determined by using the quotient or the remainder when the value of the interrupt counter is divided by an arbitrary integer.

On the other hand, in S922, when the main CPU 101 determines that the value of the interrupt counter is an odd number (when the determination in S922 is YES), the main CPU 101 acquires navigation data from the navigation data storage area (S923). Next, the main CPU 101 sets the address of the push order display data storage area for storing the push order display data output to each cathode of the 7-segment LED (S924).

Next, the main CPU 101 performs a 7-segment display data generation process (S925). In this process, the main CPU 101 creates push order display data (7-segment display data) based on the navigation data, and stores the generated push order display data in the push order display data storage area. The details of the 7-segment display data generation process will be described later with reference to FIG. 161 described later.

Next, the main CPU 101 acquires the value of the credit counter (S926). Next, the main CPU 101 sets the address of the credit display data storage area for storing the credit display data output to each cathode of the 7-segment LED (S927).

Next, the main CPU 101 performs a 7-segment display data generation process (S928). In this process, the main CPU 101 generates credit display data (7-segment display data) based on the value of the credit counter, and stores the generated credit display data in the credit display data storage area. The details of the 7-segment display data generation process will be described later with reference to FIG. 161 described later.

Next, the main CPU 101 sets the address of the 7-segment common counter storage area for storing the value of the 7-segment common counter described later (S929). Next, the main CPU 101 adds (+1 update) to the value of the 7-segment common counter (S930). In this process, when the value of the updated 7-segment common counter becomes "8", the main CPU 101 sets the value of the 7-segment common counter to "0". In this embodiment, in order to dynamically control the 7-segment LED, the value of the 7-segment common counter is updated every 8 times.

Next, the main CPU 101 creates common selection data based on the value of the 7-segment common counter, and addresses the target cathode data storage area (the target storage area in the push order display data storage area or the credit display data storage area). Is set (S931). Next, the main CPU 101 outputs clear data to the cathode of the 7-segment LED (S932). This process is performed in order to eliminate the influence of the afterimage by temporarily turning off the 7-segment LED.

Next, the main CPU 101 acquires and sets 7-segment cathode output data from the target cathode data storage area (S933). Next, the main CPU 101 generates 7-segment common output data from the 7-segment common backup data and the common selection data (S934).

Next, the main CPU 101 stores the 7-segment common output data and the 7-segment cathode output data in the 7-segment common backup data and the 7-segment cathode backup data, respectively (S935). Next, the main CPU 101 outputs 7-segment cathode output data and 7-segment common output data (S936). Then, after the processing of S936, the main CPU 101 ends the 7-segment LED drive processing, and shifts the processing to the processing of S908 in the interrupt processing (see FIG. 158).

In this embodiment, the 7-segment LED drive process is performed as described above. The processing of S923 to S925 during the above-mentioned 7-segment LED drive processing is performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 160A. Further, the processes of S931 to S936 during the above-mentioned 7-segment LED drive process are performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 160B.

Among them, the output processing of each 7-segment output data of S936 is executed by one source code "LD (cPA_SEGCOM), BC" as shown in FIG. 160B. Therefore, in the 7-segment LED drive process of the present embodiment, the 7-segment common output (selection) data and the 7-segment cathode output data are output at the same time when the 2-digit 7-segment LED is dynamically lit and controlled. That is, the 7-segment LED when performing push order navigation on the instruction monitor is dynamically lit, and the 7-segment LED when displaying credit information with the 2-digit 7-segment LED is dynamically lit control, and the 7-segment common output ( (Selection) data and 7-segment cathode output data are output at the same time.

In this case, the number of instruction codes required for the dynamic lighting control of the 7-segment LED can be reduced on the source program. Therefore, in the present embodiment, the capacity of the source program (the capacity used by the main ROM 102) can be reduced, the free capacity can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized. Therefore, it becomes possible to improve the playability. Further, in the present embodiment, an example in which a 7-segment drive circuit (not shown) that performs a 7-segment LED drive process is configured by a cathode common circuit and controlled by the cathode has been described, but the present invention is not limited to this, and 7 The seg drive circuit may be configured by an anode common circuit, and the 7-segment LED may be controlled by the anode.

Further, as shown in FIG. 160A, the Q register (extended register) is used for both the acquisition process of the navigation data of S923 and the address set process of the push display data storage area of S924 during the above-mentioned 7-segment LED drive process. It is executed by the "LDQ" instruction (instruction code dedicated to the main CPU 101) that specifies the address. Therefore, in the 7-segment LED drive process of the present embodiment, the main ROM 102, the main RAM 103, and the memory map I / O can be accessed by the direct value by using the "LDQ" instruction, so that the source program can be used. , The instruction related to the address setting can be omitted (it is not necessary to separately provide the instruction related to the address setting), and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[7-segment display data generation process]
Next, the 7-segment display data generation process performed in S925 and S928 in the 7-segment LED drive process (see FIG. 159) will be described with reference to FIGS. 161 to 163. Note that FIG. 161 is a flowchart showing the procedure of the 7-segment display data generation process. FIG. 162 is a diagram showing an example of a source program for executing a 7-segment display data generation process. Further, FIG. 163 is a diagram showing an example of the configuration of the 7-segment cathode table actually referred to on the source program of the 7-segment display data generation process.

The "display data" described later, which is generated in the 7-segment display data generation process performed in S925 during the 7-segment LED drive process (see FIG. 159), corresponds to the push order display data and corresponds to the 7-segment LED drive process (FIG. 159). The "display data" described later generated in the 7-segment display data generation process performed in S928 in (see 159) corresponds to the credit display data.

First, the main CPU 101 divides the display data set in the cathode data storage area by "10", acquires the value of the quotient of the division result as the display data of the upper digit of the 2-digit 7-segment LED, and divides. The remaining value of the result is acquired as the display data of the lower digit (S941). Next, the main CPU 101 determines whether or not to display the upper digit based on the acquired display data of the upper digit (S942).

When the main CPU 101 determines in S942 that the high-order digit display is to be performed (when the determination in S942 is YES), the main CPU 101 performs the process of S944 described later. On the other hand, in S942, when the main CPU 101 determines that the high-order digit is not displayed (NO determination in S942), the main CPU 101 sets no display of the high-order digit (S943).

After the processing of S943 or when the determination in S942 is YES, the main CPU 101 refers to the 7-segment cathode table (see FIG. 163) and acquires the display data of the upper digit (S944). Next, the main CPU 101 saves the acquired high-order digit display data in the high-order digit display data storage area (not shown) (S945).

Next, the main CPU 101 refers to the 7-segment cathode table (see FIG. 163) and acquires the display data of the lower digits (S946). Next, the main CPU 101 stores the acquired low-order digit display data in the low-order digit display data storage area (not shown) (S947).

Then, after the processing of S947, the main CPU 101 ends the 7-segment display data generation processing. At this time, when the executed 7-segment display data generation process is the process of S925 in the 7-segment LED drive process (see FIG. 158), the main CPU 101 changes the process to the process of S926 during the 7-segment LED drive process. Transfer. On the other hand, when the executed 7-segment display data generation process is the process of S928 in the 7-segment LED drive process (see FIG. 158), the main CPU 101 shifts the process to the process of S929 in the 7-segment LED drive process. ..

In this embodiment, the 7-segment display data generation process is performed as described above. The 7-segment display data generation process described above is performed by the main CPU 101 sequentially executing each source code defined in the source program of FIG. 162.

[Timer update process]
Next, the timer update process performed in S908 during the interrupt process (see FIG. 158) will be described with reference to FIGS. 164 and 165. Note that FIG. 164 is a flowchart showing the procedure of the timer update process. Further, FIG. 165 is a diagram showing an example of a source program for executing the processes of S951 to S954 described later during the timer update process.

First, the main CPU 101 sets the update start address of the 2-byte timer storage area (not shown) in the HL register, and sets the number of 2-byte timers in the B register (S951).

Next, the main CPU 101 compares the number of 2-byte timers with the lower limit value "0", and if the number of 2-byte timers is larger than the lower limit value "0", subtracts 1 from the number of 2-byte timers (updates -1). When the number of 2-byte timers is equal to or less than the lower limit value "0", the number of 2-byte timers is held at "0" (S952). Further, in the process of S952, the main CPU 101 subtracts 2 (-2 updates) the update start address of the 2-byte timer storage area set in the HL register.

Next, the main CPU 101 subtracts (updates -1) the number of 2-byte timers set in the B register by 1 (S953). Next, the main CPU 101 determines whether or not the number of 2-byte timers set in the B register is "0" (S954).

In S954, when the main CPU 101 determines that the number of 2-byte timers set in the B register is not "0" (when the determination in S954 is NO), the main CPU 101 returns the processing to the processing of S952, and after S952. Repeat the process.

On the other hand, in S954, when the main CPU 101 determines that the number of 2-byte timers set in the B register is "0" (when the determination in S954 is YES), the main CPU 101 has a 1-byte timer storage area in the HL register. The update start address of is set, and the number of 1-byte timers is set in the B register (S955).

Next, the main CPU 101 compares the number of 1-byte timers with the lower limit value “0”, and if the number of 1-byte timers is larger than the lower limit value “0”, the number of 1-byte timers is subtracted by 1 (-1 update). When the number of 1-byte timers is equal to or less than the lower limit value "0", the number of 1-byte timers is held at "0" (S956). Further, in the process of S956, the main CPU 101 subtracts 1 (-1 update) the update start address of the 1-byte timer storage area set in the HL register.

Next, the main CPU 101 subtracts (updates -1) the number of 1-byte timers set in the B register by 1 (S957). Next, the main CPU 101 determines whether or not the number of 1-byte timers set in the B register is "0" (S958).

In S958, when the main CPU 101 determines that the number of 1-byte timers set in the B register is not "0" (when the determination in S958 is NO), the main CPU 101 returns the processing to the processing of S956, and after S956. Repeat the process.

On the other hand, in S958, when the main CPU 101 determines that the number of 1-byte timers set in the B register is "0" (when the determination in S958 is YES), the main CPU 101 performs an electromagnetic counter control process (S959). ). In this process, an output control process is performed when a signal indicating IN / OUT of the medal is output to the external centralized terminal board 47. Then, after the processing of S959, the main CPU 101 ends the timer update processing, and shifts the processing to the processing of S909 in the interrupt processing (see FIG. 158).

In this embodiment, the timer update process is performed as described above. The processing of S951 to S954 (update processing of the 2-byte timer) during the timer update processing described above is performed by the main CPU 101 sequentially executing each source code defined by the source program of FIG. 165.

Among them, the process of S952 (update process of the 2-byte timer) is executed by the "DCPWLD" instruction (predetermined update instruction) in FIG. 165. The "DCPWLD" instruction is an instruction code dedicated to the main CPU 101.

For example, when the source code "DCPWLD (HL), n" is executed on the source program, the contents (stored data) of the memory for 2 bytes from the address specified by the HL register are compared with the integer n. If the content of the memory for 2 bytes is larger than the integer n, the content of the memory for 2 bytes is subtracted by 1, and if the content of the memory for 2 bytes is not more than the integer n, it is specified by the HL register. The integer n is stored in the memory for 2 bytes from the address.

Therefore, in the source code "DCPWLD (HL), 0" in FIG. 165, the contents of the memory for 2 bytes (the number of 2-byte timers) and the integer "0" (lower limit value) from the address specified by the HL register. When the contents of the memory for 2 bytes are larger than the integer "0", the contents of the memory for 2 bytes are subtracted by 1, and the contents of the memory for 2 bytes are equal to or less than the integer "0". Is set to "0" in the contents of the memory for 2 bytes. That is, if the current number of 2-byte timers is larger than "0", the 2-byte timer update process is performed, and if the current number of 2-byte timers is "0" or less, the number of 2-byte timers is "0". Is held in.

As described above, in the timer update process of the present embodiment, both the process of updating (subtracting) the number of timers and the process of holding the number of timers at "0" are executed by the "DCPWLD" instruction which is the instruction code dedicated to the main CPU 101. can do. In this case, it is not necessary to provide an instruction code for executing both processes separately. Further, the judgment branch instruction code for determining whether or not the number of timers is "0" can be omitted. Therefore, in the present embodiment, the capacity of the source program (the capacity used by the main ROM 102) can be reduced, the free capacity can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized. Therefore, it becomes possible to improve the playability. In the present embodiment, an example in which the "DCPWLD" instruction is used only in the update process of the 2-byte timer has been described, but the present invention is not limited to this, and the "DCPGLD" instruction is also used in the update process of the 1-byte timer. You may use it.

[Test firing test signal control processing (non-standard)]
Next, with reference to FIG. 166, the test firing test signal control process performed in S911 during the interrupt process (see FIG. 158) will be described. Note that FIG. 166 is a flowchart showing the procedure of the test firing test signal control process.

First, the main CPU 101 saves the address of the stack area of the main RAM 103 (S961). Next, the main CPU 101 sets the address of the non-specified stack area in the stack pointer (SP) (S962). Next, the main CPU 101 saves the data of all the registers (S963).

Next, the main CPU 101 performs a rotation cylinder braking signal generation process (S964). In this process, the main CPU 101 generates and outputs a rotation control signal (drive signal) for each reel, which is output to the tester via the second interface boat or the like. The details of the rotating cylinder braking signal generation process will be described later with reference to FIG. 167 described later.

Next, the main CPU 101 performs a special prize signal control process (S965). In this process, the main CPU 101 performs an output process of a bonus (special prize) ON / OFF signal (test signal) output to the test machine. The details of the prize signal control process will be described later with reference to FIG. 168 described later.

Next, the main CPU 101 performs a condition device signal control process (S966). In this process, the main CPU 101 performs an output process of a control signal corresponding to the state of the condition device signal control flag. The details of the condition device signal control process will be described later with reference to FIGS. 169 and 170 described later.

Next, the main CPU 101 performs a restoration process of the data of all the registers saved in the process of S963 (S967). Next, the main CPU 101 sets the address of the stack area saved in the process of S961 in the stack pointer (SP) (S968). Then, after the processing of S968, the main CPU 101 ends the test firing test signal control processing, and shifts the processing to the processing of S912 in the interrupt processing (see FIG. 158).

[Circuit braking signal generation processing]
Next, with reference to FIG. 167, the cylinder braking signal generation process performed in S964 during the test firing test signal control process (see FIG. 166) will be described. Note that FIG. 167 is a flowchart showing the procedure of the rotating cylinder braking signal generation processing.

First, the main CPU 101 sets a rotation cylinder control data storage area (not shown) in the non-standard work area (S971). Next, the main CPU 101 sets the number of reels to "3" and clears the reel control signal and its generation state (1 byte data) (S972).

Next, the main CPU 101 determines whether or not the rotation control data is "less than stopped" data (S973). The "less than stopped" rotation control data here is rotation control data other than the rotation control data for stopping the reel, that is, rotation control data (acceleration) for rotationally driving the reel. It is one of the states of preparation, acceleration, constant speed waiting, constant speed, and waiting for the stop start position).

In S973, when the main CPU 101 determines that the rotation control data is "less than stopped" data (when the determination in S973 is YES), the main CPU 101 performs the process of S975 described later. On the other hand, in S973, when the main CPU 101 determines that the rotation control data is not "less than stopped" data (NO determination in S973), the main CPU 101 determines that the rotation control data is "statically determinate hold control end". It is determined whether or not the data is "S974" (S974). It should be noted that the turning cylinder control data of "statically determinate hold control end" here is the turning cylinder control data indicating the all-phase all-stop state of the reel.

In S974, when the main CPU 101 determines that the rotation control data is the data of "statically determinate hold control end" (when the determination in S974 is YES), the main CPU 101 performs the process of S976 described later. On the other hand, in S974, when the main CPU 101 determines that the rotation control data is not "statically determinate hold control end" data (when S974 is NO determination), or when S973 is YES determination, the main CPU 101 determines. Bit 3 of the rotation control signal generation state (1 byte data) is turned on (“1”) (S975).

After the processing of S975 or when the determination in S974 is NO, the main CPU 101 shifts the data of each bit in the generated state to the right (direction from bit 7 to bit 0) by one bit (S976). Next, the main CPU 101 updates the address of the rotating cylinder control data storage area to the address of the next reel to be controlled (S977).

Next, the main CPU 101 subtracts 1 from the number of reels (S978). Next, the main CPU 101 determines whether or not the number of reels is "0" (S979).

When the main CPU 101 determines in S979 that the number of reels is not "0" (when the determination in S979 is NO), the main CPU 101 returns the processing to the processing of S973 and repeats the processing after S973.

On the other hand, in S979, when the main CPU 101 determines that the number of reels is "0" (when the determination in S979 is YES), the main CPU 101 outputs the data in the generated state to the testing machine via the cylinder braking signal output port. Output to the first interface board 301 (see FIG. 7) (S980). Then, after the processing of S980, the main CPU 101 ends the rotation cylinder braking signal generation processing, and shifts the processing to the processing of S965 in the test firing test signal control processing (see FIG. 166).

[Special prize signal control processing]
Next, with reference to FIG. 168, the special prize signal control process performed in S965 during the test firing test signal control process (see FIG. 166) will be described. Note that FIG. 168 is a flowchart showing the procedure of the special prize signal control process.

First, the main CPU 101 acquires the game state flag by referring to the game state flag storage area (see FIG. 32) (S991). Next, the main CPU 101 determines whether or not the gaming state is the RB gaming state (S992).

In S992, when the main CPU 101 determines that the gaming state is the RB gaming state (when the determination in S992 is YES), the main CPU 101 sends an ON signal from the RB medium signal port for the test signal to the first interface for the test machine. Output to board 301 (see FIG. 7) (S993). On the other hand, in S992, when the main CPU 101 determines that the gaming state is not the RB gaming state (when the determination in S992 is NO), the main CPU 101 sends an OFF signal from the RB medium signal port for the test signal to the first test machine. Output to the interface board 301 (see FIG. 7) (S994).

After the processing of S993 or S994, the main CPU 101 refers to the game state flag storage area (see FIG. 32) and determines whether or not the game state is the BB game state (S995).

In S995, when the main CPU 101 determines that the gaming state is the BB gaming state (when the determination in S995 is YES), the main CPU 101 sends an ON signal from the BB medium signal port for the test signal to the first interface for the test machine. Output to board 301 (see FIG. 7) (S996). On the other hand, in S995, when the main CPU 101 determines that the gaming state is not the BB gaming state (when the determination in S995 is NO), the main CPU 101 sends an OFF signal from the BB medium signal port for the test signal to the first test machine. Output to the interface board 301 (see FIG. 7) (S997).

Then, after the processing of S996 or S997, the main CPU 101 ends the special prize signal control processing, and shifts the processing to the processing of S966 in the test firing test signal control processing (see FIG. 166).

[Condition device signal control processing]
Next, the condition device signal control process performed in S966 in the test firing test signal control process (see FIG. 166) will be described with reference to FIGS. 169 and 170. Note that FIGS. 169 and 170 are flowcharts showing the procedure of the condition device signal control process.

First, the main CPU 101 determines whether or not the condition device signal control flag is in the initial state (S1001). In S1001, when the main CPU 101 determines that the condition device signal control flag is in the initial state (when the determination in S1001 is YES), the main CPU 101 ends the condition device signal control process and performs the process as a test firing test signal control process. (See FIG. 166) Move to the process of S967 in.

On the other hand, in S1001, when the main CPU 101 determines that the condition device signal control flag is not in the initial state (when the determination in S1001 is NO), the main CPU 101 sets the condition device signal control flag to the ON state of the replay state identification signal. It is determined whether or not it is indicated (S1002).

In S1002, when the main CPU 101 determines that the condition device signal control flag indicates the ON state of the replay state identification signal (when the determination in S1002 is YES), the main CPU 101 serves as the condition device signal control state. The ON state of the physical condition device signal is set (S1003). Next, the main CPU 101 outputs the RT state information from the condition devices 1 to 6 signal ports to the first interface board 301 for the tester (see FIG. 7) (S1004). Then, after the processing of S1004, the main CPU 101 ends the condition device signal control processing, and shifts the processing to the processing of S967 in the test firing test signal control processing (see FIG. 166).

On the other hand, in S1002, when the main CPU 101 determines that the condition device signal control flag does not indicate the ON state of the replay state identification signal (when the determination in S1002 is NO), the condition device signal control flag is set in the main CPU 101. It is determined whether or not the replay state identification signal indicates an off state (S1005).

In S1005, when the main CPU 101 determines that the condition device signal control flag indicates the off state of the replay state identification signal (when the determination in S1005 is YES), the main CPU 101 is the condition device 1 to 8 signal ports. Is output to the first interface board 301 for the tester (see FIG. 7) (S1006). Then, after the processing of S1006, the main CPU 101 ends the condition device signal control processing, and shifts the processing to the processing of S967 in the test firing test signal control processing (see FIG. 166).

On the other hand, in S1005, when the main CPU 101 determines that the condition device signal control flag does not indicate the off state of the replay state identification signal (when the determination in S1005 is NO), the main CPU 101 has the condition device signal control state. It is determined whether or not the accessory condition device signal is on (S1007).

In S1007, when the main CPU 101 determines that the condition device signal control state is the ON state of the accessory condition device signal (when the determination in S1007 is YES), the main CPU 101 wins a special prize from the condition devices 1 to 8 signal ports. The number information is output to the test machine first interface board 301 (see FIG. 7), and at this time, the ON signal is output from the condition device 8 signal port to the test machine first interface board 301 (see FIG. 7) (see FIG. 7). S1008). Next, the main CPU 101 sets a predetermined waiting time (24.58 ms in this embodiment) in the condition device signal output waiting timer (S1009). Next, the main CPU 101 sets the condition device signal control state to the state of waiting for the condition device signal output (S1010). Then, after the processing of S1010, the main CPU 101 ends the condition device signal control processing, and shifts the processing to the processing of S967 in the test firing test signal control processing (see FIG. 166).

On the other hand, in S1007, when the main CPU 101 determines that the condition device signal control state is not the ON state of the accessory condition device signal (when the determination in S1007 is NO), the main CPU 101 has the condition device signal control state as the condition device signal. It is determined whether or not it is in the output waiting state (S1011).

In S1011, when the main CPU 101 determines that the condition device signal control state is the state of waiting for the condition device signal output (when the determination of YES in S1011), the value of the condition device signal output wait timer of the main CPU 101 is "0". It is determined whether or not it is (S1012).

In S1012, when the main CPU 101 determines that the value of the condition device signal output waiting timer is not "0" (when the determination in S1012 is NO), the main CPU 101 ends the condition device signal control process and tests the process. The process shifts to the processing of S967 in the signal control processing (see FIG. 166). On the other hand, in S1012, when the main CPU 101 determines that the value of the condition device signal output waiting timer is "0" (when the determination in S1012 is YES), the main CPU 101 is in the condition device signal control state. The on state of the signal or the off state of the condition device signal is set (S1013). Then, after the processing of S1013, the main CPU 101 ends the condition device signal control processing, and shifts the processing to the processing of S967 in the test firing test signal control processing (see FIG. 166).

Here, returning to the processing of S1011 again, when the main CPU 101 determines in S1011 that the condition device signal control state is not the state of waiting for the condition device signal output (when the determination in S1011 is NO), the main CPU 101 is the condition. It is determined whether or not the device signal control state is the on state of the small combination condition device signal (S1014).

In S1014, when the main CPU 101 determines that the condition device signal control state is the on state of the small combination condition device signal (when the determination in S1014 is YES), the main CPU 101 has a small combination from the condition devices 1 to 8 signal ports. The winning number information is output to the test machine first interface board 301 (see FIG. 7), and at this time, the ON signal is output from the condition device 7 signal port to the test machine first interface board 301 (see FIG. 7). (S1015). Next, a predetermined waiting time (24.58 ms in this embodiment) is set in the condition device signal output waiting timer (S1016). Next, the main CPU 101 sets the condition device signal control state to the state of waiting for the condition device signal output (S1017). Then, after the processing of S1017, the main CPU 101 ends the condition device signal control processing, and shifts the processing to the processing of S967 in the test firing test signal control processing (see FIG. 166).

On the other hand, in S1014, when the main CPU 101 determines that the condition device signal control state is not the ON state of the small winning combination condition device signal (when the determination in S1014 is NO), the main CPU 101 is turned off from the condition devices 1 to 8 signal ports. The signal is output to the first interface board 301 for the tester (see FIG. 7) (S1018). Then, after the processing of S1018, the main CPU 101 ends the condition device signal control processing, and shifts the processing to the processing of S967 in the test firing test signal control processing (see FIG. 166).

<Explanation of operation of sub-control circuit>
Next, with reference to FIGS. 171 to 173, the contents of various processes executed by the sub CPU 201 of the sub control circuit 200 using the program will be described.

[Sub-side navigation control processing]
First, the sub-side navigation control process will be described with reference to FIG. 171. Note that FIG. 171 is a flowchart showing the procedure of the sub-side navigation control process.

First, the sub CPU 201 determines whether or not the navigation data has been acquired (S1101). The sub CPU 201 acquires the navigation data determined by the main control board 71 from the start command data received from the main control board 71. Therefore, in the process of S1101, the sub CPU 201 determines whether or not the received start command data includes the navigation data.

When the sub CPU 201 determines in S1101 that the navigation data has been acquired (when the determination in S1101 is YES), the sub CPU 201 sets the sub-side navigation data according to the navigation data (S1102). For example, when the sub CPU 201 acquires the navigation data "4", as shown in FIG. 63, the navigation data for notifying the push order "left, middle, right" is set as the sub side navigation data in this process. To. As a result, the content of the stop operation can be notified on both the main side and the sub side. Then, after the processing of S1102, the sub CPU 201 ends the sub-side navigation control processing.

On the other hand, in S1101, when the sub CPU 201 determines that the navigation data has not been acquired (NO determination in S1101), the sub CPU 201 determines whether or not navigation (notification of stop operation) is necessary. (S1103). In the present embodiment, the sub CPU 201 needs to be navigated, for example, when a flag conversion lottery is performed on the main control board 71 or when a predetermined combination is determined as an internal winning combination on the main control board 71. Is determined. The result of the flag conversion lottery and the type of the internal winning combination are included in the start command data. Therefore, in the process of S1103, the sub CPU 201 determines whether or not navigation is necessary based on these various pieces of information included in the start command data.

When the sub CPU 201 determines in S1103 that navigation is not necessary (NO determination in S1103), the sub CPU 201 ends the sub-side navigation control process.

On the other hand, when the sub CPU 201 determines in S1103 that navigation is necessary (YES in S1103), the sub CPU 201 sets the sub-side navigation data according to various lottery results (S1104). For example, when the internal winning combination "F_certain chili lip" is determined and the flag conversion lottery is won, the sub CPU 201 is a navigation system for displaying the symbol combination related to the abbreviation "triple chili lip" in this process. Set the data (for example, navigation data that aims at the Chilean pattern by pushing forward). Further, for example, when the internal winning combination "F_certain chili lip" is determined and the flag conversion lottery is not winning, the sub CPU 201 is for displaying the symbol combination related to the abbreviation "replay" in this process. Set navigation data (for example, navigation data indicating a push order other than forward push). By these processes, even if the main side does not notify the content of the stop operation, the sub side alone can notify the content of the stop operation. Then, after the processing of S1104, the sub CPU 201 ends the sub-side navigation control processing.

[Player registration process]
Next, the player registration process will be described with reference to FIG. 172. Note that FIG. 172 is a flowchart showing the procedure of the player registration process.

First, the sub CPU 201 determines whether or not the registration operation has been accepted (S1111). For example, when the operation of the registration button 222b is accepted on the menu screen 222 (see FIG. 5B) of the sub display device 18, and the predetermined operation is accepted on the registration screen (not shown) displayed in that case, the sub CPU 201 performs the registration operation. Is determined to have been accepted.

When the sub CPU 201 determines in S1111 that the registration operation has been accepted (when the determination in S1111 is YES), the sub CPU 201 sets the player registration state (S1112). In the situation where the player registration state is set, the sub CPU 201 of the sub display device 18 can display the game information screens 223, 224, 225 (see FIGS. 5C to 5E) on the sub display device 18. Control the display screen. Then, after the processing of S1112, the sub CPU 201 ends the player registration processing.

On the other hand, when it is determined in S1111 that the sub CPU 201 has not accepted the registration operation (when the determination in S1111 is NO), the sub CPU 201 determines whether or not the registration deletion operation has been accepted (S1113). For example, when a specific operation is accepted on the registration screen of the sub display device 18, the sub CPU 201 determines that the registration deletion operation has been accepted.

When the sub CPU 201 determines in S1113 that the registration deletion operation is not accepted (NO determination in S1113), the sub CPU 201 ends the player registration process.

On the other hand, when it is determined in S1113 that the sub CPU 201 has accepted the registration deletion operation (when the determination in S1113 is YES), the sub CPU 201 clears the player registration state (S1114). In the situation where the player registration state is cleared, the sub CPU 201 makes it impossible to display the game information screens 223, 224, 225 (see FIGS. 5C to 5E) on the sub display device 18. Control the display screen of. Then, after the processing of S1114, the sub CPU 201 ends the player registration processing.

[History management process]
Next, the history management process will be described with reference to FIG. 173. Note that FIG. 173 is a flowchart showing the procedure of the history management process.

First, the sub CPU 201 acquires game results from various command data received from the main control board 71 (S1121). For example, in this process, the sub CPU 201 can grasp the type of the winning combination determined as the internal winning combination from the start command data. Further, for example, in this process, the sub CPU 201 can grasp the symbol combination displayed from the winning operation command data (that is, the presence or absence of winning of the winning combination determined as the internal winning combination). Further, for example, in this process, the sub CPU 201 can grasp the current gaming state and the transition status of the gaming state from the start command data and the like.

Next, the sub CPU 201 performs a game history update process based on the acquired game result (S1122). By this process, the sub CPU 201 is based on the game results acquired from various command data, for example, the number of bonuses, the number of ARTs, the number of games (number of games), the number of CZs, the number of CZ successes, the number of winnings of each role and the winnings. It is possible to manage various game histories such as probabilities. Then, after the processing of S1122, the sub CPU 201 ends the history management processing.

<Various effects>
In the pachi-slot machine 1 of the present embodiment, the following various effects can be obtained in terms of playability.

[Management of duration during CT]
In the pachi-slot machine 1 of the present embodiment, a CT is provided as an additional chance zone in which the duration of the normal ART can be extended, and the number of ART games is added based on the internal winning combination (sub flag) in the CT. In CT, eight games are played in one set, but if the number of ART games can be added during CT, the number of games is not subtracted, and only if the number of games cannot be added, the number of games is increased. Subtract. Therefore, the player does not know how long the CT will last, and the CT will not end as long as the addition is performed, so that the interest of the game during the CT can be enhanced.

Further, in the present embodiment, when the sub-flag EX "triple chili lip" is won (winned in the sub-flag conversion lottery) and added during CT, the CT game 8 times per set is also reset (stock). Will be done. In this case, for example, even if the CT game period is just before the end, when the sub-flag EX "triple chili lip" is won, the addition is performed and the CT is restarted from the beginning. You will have a strong interest in it, and you will be able to continue playing the game without getting bored, and you will be able to enhance the interest of the game during CT.

In addition, the addition of the sub-flag EX "triple chili lip" at the time of winning is performed only when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is determined as the internal winning combination and the flag conversion lottery is won. .. Therefore, it is possible to prevent giving an excessive profit to the player, and it is possible to balance the profit between the player and the game store. In the above embodiment, an example (see FIG. 54) in which the flag conversion lottery is always won when the internal winning combination “F_certain chili lip” or “F_1 certain chili lip” is determined during CT has been described. The present invention is not limited to this, and the winning probability of the flag conversion lottery can be appropriately set according to the balance of profits between the player and the game store.

[Number of additional games at the time of winning the "triple chili lip" during CT]
In the pachi-slot machine 1 of the above embodiment, when the sub-flag "triple chili lip" is hit during CT and the number of additions based on the sub-flag "triple chili lip" exceeds a predetermined number of times, one extra lottery is performed. The number of additional games for winning ART will increase (see Fig. 55). Further, as described above, as long as the number of ART games is added, the CT does not end, and when the sub-flag EX "triple chili lip" is applied, the CT is reset. Therefore, from the player's point of view, it is possible to expect that the additional amount per one time (one game) will increase as the CT continues, and the interest during the CT will improve. Furthermore, since the number of times that triggers an increase in the amount of addition per one time (one game) is larger than the number of basic games (8 times) for one set of CT (9 times or more), the number of times is increased (9 times or more). It is possible to prevent excessive profits from being given, and to balance (keep good) the profits between the player and the game store.

[Bonus notification performed on the main side]
In the pachi-slot machine 1 of the above embodiment, the numerical value "10" uniquely associated with the information of the stop operation for displaying the symbol combination related to the bonus combination (BB combination) on the instruction monitor (not shown) of the information display 6. "(Or" 11 ") is displayed, and the bonus notification is performed on the main side (see FIG. 63). However, in pachislot, the priority of the symbol to be drawn (stopped and displayed) on the effective line is usually set, and if the bonus combination and other combinations are determined as the internal winning combination, the priority is given. Depending on the situation, the symbol combination related to the bonus role may or may not be drawn.

For example, in the pachi-slot machine 1 of the present embodiment, one of the bonus combination and the internal winning combination "missing", "F_special role 1", "F_special role 2", and "F_special role 3" is determined in duplicate. If so, the symbol combination related to the bonus combination can be drawn in, but the bonus combination and the internal winning combination "missing", "F_special role 1", "F_special role 2" and "F_special role 3" If a combination other than the winning combination is determined in duplicate, the symbol combination related to the bonus combination cannot be drawn in. Therefore, in the present embodiment, the bonus combination and any of the internal winning combination “missing”, “F_special role 1”, “F_special role 2”, and “F_special role 3” are determined in duplicate. Only in this case, the numerical value "10" (or "11") is displayed on the instruction monitor. In this case, the navigation (bonus notification) on the main side can be performed at an appropriate timing in which the bonus combination can be won.

Further, in the pachi-slot machine 1 of the present embodiment, one of the bonus combination and the internal winning combination "missing", "F_special role 1", "F_special role 2" and "F_special role 3" is determined in duplicate. Even so, the numerical value "10" (or "11") is not displayed (without navigation) on the instruction monitor until the predetermined number of games have passed since the bonus combination was first won, and the predetermined number of games have been played. The numerical value "10" (or "11") is displayed on the instruction monitor on condition that the game has passed.

In addition, for example, when an effect (so-called continuous effect) performed over a plurality of games is performed with the winning of a bonus role as an opportunity, the numerical value "10" (or "or" If 11 ") is displayed, the meaning of the continuous production is diminished, and there is a possibility that the interest is spoiled. Therefore, in the pachi-slot machine 1 of the present embodiment, the display is not performed by the instruction monitor until the predetermined number of games have elapsed, and the display is performed by the instruction monitor after the predetermined number of games have elapsed. As a result, the bonus notification on the main side can be performed without impairing the effect of the effect.

[Notification performed on both the main side and sub side and notification performed on the sub side alone]
In the pachi-slot machine 1 of the present embodiment, a plurality of types of combinations having different symbol combinations displayed according to the mode (pushing order) of the stop operation are provided (see FIG. 24), and the symbols to be displayed are provided for these plurality of types of combinations. A combination in which different benefits are given depending on the combination and a combination in which the same privilege is given even if the displayed symbol combination is different are included.

For example, the number of medals to be paid out differs depending on whether the symbol combination related to the abbreviation "bell" is displayed or the symbol combination related to the abbreviation "bell spilled eye" is displayed, and these roles are displayed symbols. It is a role that gives different benefits depending on the combination. In addition, whether or not the RT state is transferred in addition to the operation of the replay between the case where the symbol combination related to the abbreviation "replay" is displayed and the case where the symbol combination related to the abbreviation "RT2 transition lip" is displayed. Therefore, the internal winning combination "F_3 choice bell_1st" and "F_maintenance lip_1st" are also roles in which different benefits are given depending on the displayed symbol combination.

On the other hand, in both the case where the symbol combination related to the abbreviation "triple chili lip" is displayed and the case where the symbol combination related to the abbreviation "replay" is displayed, the replay operation is only performed. Therefore, the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is a role to which the same privilege is given even if the displayed symbol combination is different. As described above, the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" has different benefits depending on the result of the flag conversion lottery, but the benefits given by the displayed symbol combination. It is not a role that affects.

In the pachi-slot machine 1 of the present embodiment, the winning combination to which different benefits are given depending on the displayed symbol combination is notified on both the main side and the sub side, but the same even if the displayed symbol combinations are different. The combination to which the privilege is given is not notified by the instruction monitor on the main side, but is notified only by the display device 11 on the sub side. By providing such a notification function, the notification that affects the privilege is appropriately performed by the instruction monitor on the main side that manages the privilege, while the notification that does not affect the privilege is diverse on the display device 11 on the sub side. It can be done with navigation.

[Game history display function]
In the pachi-slot machine 1 of the present embodiment, a sub-display device 18 is provided separately from the display device 11 (projector mechanism 211 and display unit 212), and the sub-display device 18 displays various information useful to the player. For example, as shown in FIGS. 5A to 5E, a top screen 221 showing the outline game history, a menu screen 222 capable of performing various operations on the pachislot machine 1, and a game information screen 223, 224, 225 showing the detailed game history are sub-display devices. It can be displayed at 18.

Further, the pachi-slot machine 1 of the present embodiment has a function of making it possible to register a player who plays a game via a sub-display device 18, and a function of providing a unique service to the registered player. For example, in the present embodiment, when the registration of the player is not accepted, the game information screens 223, 224, 225 showing the detailed game history cannot be displayed on the sub display device 18, but the registration of the player is made. If accepted, the game information screens 223, 224, and 225 showing the detailed game history can be displayed on the sub display device 18. Being able to confirm a more detailed game history leads to an improvement in the convenience of the player. Therefore, in the present embodiment, the convenience can be improved when the registration of the player is accepted.

Further, in the pachi-slot machine 1 of the present embodiment, the sub-display device 18 is provided separately from the display device 11 that performs the effect. The sub display device 18 is controlled by the sub control board 72 (sub CPU 201) via the liquid crystal relay board 87. Further, the display unit 212 constituting the display device 11 is controlled by the sub control board 72 (sub CPU 201) via the accessory relay board (not shown). Therefore, in the present embodiment, the sub-display device 18 can be controlled separately from the display device 11. Specifically, the display screen of the sub-display device 18 can be switched even during the game (that is, the effect being executed by the display device 11). Therefore, even during the game, the player can acquire various information by switching the display of the sub-display device 18 without disturbing the effect performed by the display device 11.

Further, in the display device 11 of the pachislot 1 of the present embodiment, a flat image display is used by switching a plurality of screen mechanisms (display unit 212) for displaying an image by irradiating the irradiation light from the projector mechanism 211. When performing an effect, an effect using an image display having a sense of depth (three-dimensional effect), and an effect using a curved image display, the effect of the effect can be significantly enhanced. However, such an information display form is not suitable for displaying information unrelated to the production such as a game history during the production. Therefore, in the pachi-slot machine 1 of the present embodiment, information unrelated to the effect can be displayed on the sub-display device 18 provided separately from the display device 11, so that the effect of the effect is not impaired and the game is played. Various information such as history can be displayed appropriately.

By the way, in a general pachi-slot machine, a medal insertion slot 14 is provided on the right side of the pedestal portion 13 when viewed from the player side, and bet buttons 15a and 15b and a start lever 16 are provided on the left side of the pedestal portion 13. Therefore, normally, when advancing the game, the player operates the operation unit on the right side or the left side (side) of the pedestal portion 13.

On the other hand, in the pachi-slot machine 1 of the present embodiment, the sub-display device 18 is provided on the side (left side) of the surface standing substantially vertically from the pedestal portion 13, and the sub-display device 18 is provided on the screen of the sub-display device 18. A touch sensor 19 for switching the display screen of is provided. Therefore, in the present embodiment, the sub-display device 18 and the input device (touch sensor 19) for controlling the display are provided at the place where the player's hand is located during the game, so that the player's operability Can be improved. In particular, when the sub-display device 18 with the touch sensor 19 is provided on the surface of the pedestal portion 13 that stands upright from the horizontal plane as in the present embodiment, the player puts his / her hand on the pedestal portion 13. However, the sub-display device 18 can be operated. In this case, not only the operability of the player is improved, but also the fatigue of the player due to the operation can be reduced, and as a result, the operation rate can be expected to be improved.

[Non-standard ROM area and non-standard RAM area]
In the pachi-slot machine 1 of the present embodiment, as shown in FIG. 12B, various programs and various processes used for various processes (various processes that do not affect the playability) that are not directly related to the playability of the game performed by the player. The data (table) is stored in the non-standard ROM area in the main ROM 102, which is arranged at an address different from the game ROM area.

In such a configuration of the main ROM 102, programs and data unnecessary for the game itself actually played by the player are arranged in the ROM area (non-standard ROM area) where the program or the like cannot be arranged under the conventional rule. can do. Therefore, in the present embodiment, it is possible to avoid pressure on the capacity of the game ROM area in the main ROM 102 of the main control board 71, and to enhance the expandability of the program and the table in the main ROM 102.

[Effects obtained by processing when the power is turned on (reset interrupt)]
In the power-on (reset interrupt) processing of the pachi-slot machine 1 of the present embodiment, as shown in FIG. 64, the first 1.1172 ms cycle interrupt process is performed immediately after the power is restored (before the thumb check) (S7 and S8). ), A non-operation command is transmitted from the main control circuit 90 to the sub control circuit 200. By permitting the interrupt process immediately after the power is restored in this way, the no-operation command is transmitted in the shortest time after the power is restored, and the communication connection between the main control circuit 90 and the sub control circuit 200 can be established. The communication operation between the main control circuit 90 and the sub control circuit 200 can be stabilized.

Further, the data stored in the L register, the H register, the E register, the D register, and the C register are set in the communication parameters 1 to 5 constituting the non-operation command transmitted immediately after the power is restored, respectively. Will be done. Therefore, in the present embodiment, the sum value (BCC) of the non-operation command transmitted in the interrupt process immediately after the power is restored can be made different every time the power is restored, and fraudulent acts such as goto can be suppressed. can.

Further, the control for displaying the error code "rr" on the 2-digit 7-segment LED in the information display 6 performed in the processing of S13 during the power-on (reset interrupt) processing is one "LDW". It is executed by an instruction (predetermined read instruction), and the output operation of the 7-segment common output (selection) data to the 2-digit 7-segment LED and the output operation of the 7-segment cathode output data are performed at the same time (see FIG. 65C). That is, in the pachi-slot machine 1 of the present embodiment, the 7-segment common output (selection) data and the 7-segment cathode output data are used when dynamically lighting and controlling the 2-digit 7-segment LED in the power-on (reset interrupt) processing. It is output at the same time.

In this case, the number of instruction codes required for the dynamic lighting control of the 7-segment LED can be reduced on the source program. Therefore, in the present embodiment, the capacity of the source program (the capacity used by the main ROM 102) can be reduced, the free capacity can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized. Therefore, the playability can be enhanced.

[Effects obtained by game return processing]
In the game return processing of the pachi-slot machine 1 of the present embodiment, as shown in FIG. 66, the input / output state of each port at the time of power failure is secured at the time of power recovery, and when the reel is rotating at the time of power failure, When the power is restored, the reel control management information is acquired and the processing necessary for starting the reel rotation is also performed (see S25 to S32). Therefore, in the present embodiment, it is possible to stably control the re-rotation of the reel even when the reel is recovered from the electric power failure during the rotation, and the player is not uncomfortable.

Further, as described above, the pachi-slot machine 1 of the present embodiment includes a microprocessor 91 with a security function for a gaming machine. The microprocessor 91 is provided with various instruction codes (instruction codes dedicated to the main CPU 101) specific to the microprocessor 91 that can be specified on the source program, and the instruction codes dedicated to the main CPU 101 are used in various processes. This makes it possible to improve processing efficiency and reduce program capacity.

For example, in the game return process, as shown in FIG. 67, the “LDQ” instruction, which is one of the instruction codes dedicated to the main CPU 101, is used on the source program. The "LDQ" instruction is an instruction code that specifies an address using a Q register (extended register), and as described above, the main ROM 102, the main RAM 103, and the memory map I / O can be accessed directly. In this case, the instruction code related to the address setting can be omitted, and the capacity of the source program for the game return processing (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Effects obtained by setting change confirmation processing]
In the setting change confirmation process of the pachi-slot machine 1 of the present embodiment, as shown in FIG. 69A, the "BITQ" instruction and the "SETQ" instruction (predetermined instruction), which are instruction codes dedicated to the main CPU 101, are used on the source program. .. Both the "BITQ" instruction and the "SETQ" instruction are instruction codes for specifying an address using a Q register (extended register), and when these instruction codes are used, the main RAM 103 is a direct value as described above. And memory map I / O can be accessed. In this case, the instruction code related to the address setting can be omitted, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, it is possible to increase the free space of the main ROM 102 and to speed up the processing.

Further, the generation and storage processing of the setting change command (initialization command) performed at the time of setting change / setting confirmation start of S46 and at the end of setting change / setting confirmation of S57 during the setting change confirmation processing is as shown in FIGS. 69A and 69B. In addition, it is executed by the "CALLF" instruction, which is an instruction code dedicated to the main CPU 101, on the source program. The jump destination address specified by the "CALLF" instruction in S46 is the same as the jump destination address specified by the "CALLF" instruction in S57. That is, in the present embodiment, the setting change command (initialization command) to be transmitted to the sub-control circuit 200 at the time of setting change (at the time of starting the game machine), at the time of setting confirmation start (during normal operation), and at the end of setting confirmation is generated and stored. The source programs for executing the above are the same as each other, and the source programs are shared (modularized) in both the processes of S46 and S57.

In this case, in both the processes of S46 and S57, it is not necessary to separately provide the source program for the generation and storage process of the setting change command, so that the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. can. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Effects obtained by setting change command generation and storage processing]
In the setting change command generation / storage process of the pachi-slot machine 1 of the present embodiment, as shown in FIG. 70, the set value is stored in the E register as the communication parameter 3, and the RT information is stored in the C register as the communication parameter 5. That is, among the communication parameters 1 to 5 constituting the setting change command (initialization command), the communication parameters 3 and 5 are communication parameters (use parameters) used (analyzed) on the sub-control circuit 200 side. New information is set in the communication parameters. On the other hand, the other communication parameters 1, 2 and 4 constituting the setting change command (initialization command) are communication parameters (unused parameters) that are not used (analyzed) on the sub-control circuit 200 side, and are communication parameters 1 and 2. For and 4, the values currently stored in the L register, H register, and D register are set. Therefore, the values of the communication parameters 1, 2 and 4 at the time of transmitting the setting change command (initialization command) are undefined values. In this case, the sum value (BCC) of the setting change command can be set to an indefinite value for each transmission, and fraudulent acts such as goto can be suppressed.

[Effects obtained by communication data storage processing]
In the communication data storage process of the pachislot 1 of the present embodiment, as shown in FIG. 72, the data stored in the A register is set as the type data of the communication command, and the L register, the H register, the E register, the D register and the C register are set. The data stored in the registers are set as communication parameters 1 to 5 of the communication command, respectively, and the data stored in the B register is set as the game state flag data of the communication command. That is, in the present embodiment, when creating one packet (8 bytes) of communication data (command data), various parameters are transferred from the register and stored in the communication data temporary storage area (communication buffer).

In this case, when command data including unused parameters is created, the value of the unused parameters becomes an undefined value each time it is created. That is, in the command data including unused parameters, even if there is command data of the same type and the values of the used parameters are the same, the sum value (BCC data) of the command data can be changed for each command creation. .. Therefore, in the present embodiment, by setting the unused parameter to an undefined value, it is possible to make it difficult to analyze the communication data and suppress fraudulent acts such as goto, and it is necessary to add unnecessary goto countermeasure processing. Therefore, it is possible to suppress the pressure on the program capacity of the main control circuit 90 due to the addition of the anti-goto processing.

[Effects obtained by updating the communication data pointer]
In the communication data pointer update process of the pachi-slot machine 1 of the present embodiment, as shown in FIG. 75A, the "ICPLD" instruction, which is an instruction code dedicated to the main CPU 101, is used on the source program.

In the communication data pointer update process, the "ICPLD" instruction is an instruction code in which the upper limit determination instruction of the transmission buffer and the determination branch instruction are integrated, so that the instruction code for executing each instruction process separately is used. There is no need to provide it. Therefore, by using the "ICPLD" instruction, the capacity of the source program for the communication data pointer update process (the capacity used by the main ROM 102) can be reduced. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Effects obtained by checksum generation process and checksum check process]
In the checksum generation process (outside the regulation) performed at the time of power failure in the pachi-slot machine 1 of the present embodiment, the checksum is calculated by sequentially adding the data of the main RAM 103 as shown in FIG. 77. On the other hand, in the thumb check process (outside the regulation) performed when the power is turned on (when the power is restored), the value of the checksum generated when the power is cut off is stored in the main RAM 103 when the power is restored, as shown in FIG. 79. The data is sequentially subtracted, and the presence or absence of an abnormality is determined based on whether or not the final subtraction result is "0". That is, in the present embodiment, the checksum generation process when a power failure occurs is performed by an addition method, and the checksum determination process when the power is restored is performed by a subtractive method.

When such a checksum generation process and determination process are adopted, it is not necessary to generate a checksum again when the power is restored and to collate the checksum with the checksum when a power failure occurs. In this case, the collation instruction code can be omitted on the source program, and the capacity of the source program can be reduced. As a result, in the present embodiment, in the main ROM 102, it is possible to secure (increase) the free space corresponding to the omitted collation instruction code, and it is possible to utilize the increased free space to improve the playability. Become.

[Effects obtained by medal reception / start check processing]
In the medal acceptance / start check process of the pachi-slot machine 1 of the present embodiment, as shown in FIG. 83, the setting change confirmation process (process of S233) is performed, and this process is executed regardless of the gaming state. Therefore, in the present embodiment, even if the game state is a bonus state (special prize operation state), the set value and the hall menu (various history data (errors, power interruption history, etc.)) can be confirmed, and the game can be checked. It is possible to suppress fraudulent activities.

[Effects obtained by inserting medals]
In the medal insertion process of the pachi-slot machine 1 of the present embodiment, as shown in FIG. 85, in the process of S244, the LED lighting data for displaying the number of inserted medals is generated by arithmetic processing instead of loop processing with reference to the table. .. Specifically, by sequentially executing a series of source codes "LD A, L" to "OR L" in the source program shown in FIG. 86, LED lighting data for displaying the number of inserted medals is generated.

When the LED lighting data for displaying the number of inserted medals is generated by arithmetic processing, the free capacity of the table area of the main ROM 102 can be increased and the increase in the capacity of the program can be minimized. That is, in the medal insertion process of the present embodiment, the process of displaying the medal insertion LED can be made more efficient, the free capacity of the main ROM 102 is secured (increased), and the increased free area is utilized to improve the playability. Can be enhanced.

[Effects obtained by the medal insertion check process]
In the medal insertion check process (see FIG. 87) of the pachi-slot machine 1 of the present embodiment, the process of generating the normal change value of the medal sensor input state of S257 is performed by an arithmetic process, not a process of acquiring by referring to a table. Specifically, the medal sensor input state normal change value is calculated by sequentially executing the source codes "RLA" and "AND cBX_MDINSW" in the source program shown in FIG. 88.

By changing the detection process of the change mode of the medal sensor input state from the table reference process to the arithmetic process, the free space of the table storage area of the main ROM 102 can be increased and the increase in the program capacity can be minimized. can. Therefore, by adopting the above-mentioned processing method, it is possible to improve the efficiency of the detection processing of the change mode of the medal insertion sensor state, and to utilize the increased free space in the main ROM 102 to improve the playability. can.

[Effects obtained by internal lottery processing]
In the internal lottery process of the pachi-slot machine 1 of the present embodiment (see FIG. 92), the determination data acquisition process of S305 is executed by the source code “LDIN AC, (HL)” in FIG. 93A. By executing this "LDIN" instruction, in the processing of S305, the determination data (value of "lottery value selection table or lottery counting table") is stored in the A register, and the request flag status ("special prize winning number") is stored in the C register. + Value of "small winning combination winning number") is stored. Further, by executing the "LDIN" instruction, the address set in the HL register is updated by +2 (addition of 2).

That is, in the determination data acquisition process of S305 during the internal lottery process, both the data load process and the address update process can be performed by one instruction code (“LDIN” instruction). In this case, the instruction code related to the address setting can be omitted on the source program, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, in the addition processing of the set value data (any of 0 to 5) of S309 of the internal lottery processing, the main CPU 101 uses the source codes "MUL A, 6" and "ADDQ A, (.LOW.wWAVENUM) in FIG. 93B. ) ”Is executed in this order.

The "MUL" instruction is an instruction code for multiplication processing dedicated to the main CPU 101, and the execution of this instruction is executed by the arithmetic circuit 107 (see FIG. 9) included in the microprocessor 91. That is, since the pachislot 1 of the present embodiment is provided with a dedicated calculation circuit (calculation circuit 107) for executing the multiplication process and the division process on the source program, the efficiency of the multiplication process and the division process is to be improved. Can be done.

Further, the "ADDQ" instruction (predetermined addition instruction) is an instruction code dedicated to the main CPU 101, and is an instruction code for specifying an address using a Q register (extended register). Then, by using this "ADDQ" instruction, the main ROM 102, the main RAM 103, and the memory map I / O can be accessed by the direct value. Therefore, by using the "ADDQ" instruction, the instruction related to the address setting can be omitted on the source program of the internal lottery processing, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. Can be done. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Effects obtained by design setting process]
In the symbol setting process (see FIG. 97) of the pachi-slot machine 1 of the present embodiment, the compressed data storage process of S330 is performed by the main CPU 101 executing the source code “CALLF SB_BTEP_00” in FIG. 99. The "CALLF" instruction is a 2-byte instruction code dedicated to the main CPU 101 as described above, and when the source code "CALLF SB_BTEP_00" in FIG. 99 is executed, processing is performed at the address specified by "SB_BTEP_00". Jump and start the compressed data storage process.

Further, the setting process of the address of the hit request flag storage area of S329 during the symbol setting process is performed by the main CPU 101 executing the source code "LDQ DE, .LOW.wWAVEBIT" in FIG. 99. That is, the processing of S329 is performed by the "LDQ" instruction dedicated to the main CPU 101 using the Q register (extended register). In this case, the instruction code related to the address setting can be omitted on the source program of the symbol setting process, and the capacity of the source program of the symbol setting process (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, in the present embodiment, the data related to the winning is compressed / decompressed by the processing procedure described in S324 to S330 during the above-mentioned symbol setting processing, and the above-mentioned main CPU 101 dedicated instruction code is used in the processing. By using it, it is possible to improve the efficiency of the compression / decompression processing of the data related to the winning, and it is possible to effectively utilize the limited capacity of the main RAM 103.

[Effects obtained by sub-flag conversion processing]
In the sub-flag conversion table shown in FIG. 107, which is actually referred to on the source program of the sub-flag conversion process in the pachi-slot machine 1 of the present embodiment, the sub-flag conversion control data (control status) is associated with each sub-flag. .. At this time, the same sub-flag conversion control data (control status) is associated with the same type of sub-flag.

For example, the sub-flag conversion control data (control status) "00000011B" is commonly assigned to the sub-flags "triple chili lip A" and "triple chili lip B". Then, in the flag conversion lottery process when converting the internal winning combination (sub flag) to the sub flag EX, the lottery is performed based on the sub flag conversion control data (control status) associated with the sub flag.

In this way, by providing common sub-flag conversion control data for the same type of internal winning combination (sub-flag) in the sub-flag conversion table managed on the main side, the versatility of the conversion table is increased and the model is changed. Since changes in the conversion program can be handled with minor changes, it is possible to suppress an increase in development costs.

[Effects obtained by navigation set processing]
In the navigation set process of the pachi-slot machine 1 of the present embodiment, as shown in FIG. 109, an "LDQ" instruction (instruction code dedicated to the main CPU 101) that specifies an address using a Q register (extended register) is used on the source program. Will be.

Therefore, in the navigation set processing of the present embodiment, the instruction related to the address setting can be omitted on the source program, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Effects obtained by table data acquisition process]
In the table data acquisition process of the pachi-slot machine 1 of the present embodiment (see FIG. 120), in the table data acquisition process of the first stage of S581 to S584, the table for each winning combination in the CT winning lottery table during CT (see FIG. 122) is selected. Relative table is referenced. Then, in the table selection relative table for each winning combination referred to in this first stage table data acquisition process, the "loss" of the CT lottery is set by the selection value provided for each type of the internal winning combination (sub flag D). Therefore, it is not necessary to specify the lottery value of the "missing" role in the lottery table. Therefore, in the present embodiment, it is not necessary to store the lottery value data of the “missing” role in the CT winning lottery table during CT, and the capacity of the table area of the main ROM 102 can be saved.

Further, in the lottery table of the second stage (when the sub flag D "reach eye lip" is acquired) in the CT winning lottery table during CT, the lottery target combination or the non-lottery target combination is determined by the value of each bit constituting the determination bit. This makes it possible to eliminate the need to store lottery value data (loss data) in a table for a combination that is not subject to lottery. Further, in the CT winning lottery table during CT, the lottery value "0" can be used as the definite data in which the winning probability of the lottery target combination is 100%. From these things, in this embodiment, the capacity of the CT winning lottery table during CT (the lottery table with the number of sets added during CT) can be compressed, and the free capacity can be secured (increased) in the main ROM 102. , You can improve the playability by utilizing the increased free space.

[Effects obtained by design code acquisition processing]
In the symbol code acquisition process (see FIG. 128) of the pachi-slot machine 1 of the present embodiment, the data related to the winning is compressed / decompressed by the processing procedure described in S647 to S649, and the main CPU 101 dedicated command in the processing is performed. By using a code (“CALLF” instruction or the like), it is possible to improve the efficiency of the compression / decompression processing of the data related to the winning, and it is possible to effectively utilize the limited capacity of the main RAM 103.

Further, in the present embodiment, in the compressed data storage process of S649 during the symbol code acquisition process, the jump destination address specified by the "CALLF" command is the compressed data storage process of S330 during the symbol setting process (see FIG. 97). Is the same as the jump destination address specified by the "CALLF" instruction. That is, in the present embodiment, the source program for executing the compressed data storage process is shared (modularized) in both the symbol code acquisition process and the symbol setting process. In this case, since it is not necessary to separately provide the source program for the compressed data storage process in each process, the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Effects obtained by the pull-in priority acquisition process]
In the pull-in priority order acquisition process (see FIGS. 134 and 135) of the pachi-slot machine 1 of the present embodiment, the determination process of S683 during the pull-in priority correspondence process of the “ANY combination” is performed by the main CPU 101 dedicated instruction code on the source program. It is executed by a certain "JCP" instruction (comparison instruction) (see FIG. 136A).

When the "JCP" command is used in the source program of the "ANY role" pull-in priority support process, the command related to the address setting can be omitted as described above, so the "ANY role" pull-in priority support The processing efficiency of the processing can be increased, and the capacity of the source program (capacity used by the main ROM 102) can be reduced.

Further, in the stop control pull-in request flag setting process of S686 during the pull-in priority acquisition process, the Q register (extended register), which is an instruction code dedicated to the main CPU 101, is used on the source program as shown in FIG. 136B. The "LDQ" instruction and the "CALLF" instruction for specifying an address are used.

Therefore, in the stop control pull-in request flag setting process of S686, by using the "LDQ" instruction, the instruction related to the address setting can be omitted on the source program, and the capacity of the source program (use of the main ROM 102). Capacity) can be reduced. Further, the "CALLF" instruction is a 2-byte instruction code as described above. Therefore, by using these main CPU 101 dedicated instruction codes in the stop control pull-in request flag setting process, the efficiency of the process can be improved and the limited capacity of the main RAM 103 can be effectively utilized. ..

Further, in the present embodiment, in the stop control pull-in request flag setting process of S686 during the priority pull-in order acquisition process, the address of the jump destination logical product operation process specified by the "CALLF" instruction is the lead-in priority storage process ( (See FIG. 126), which is the same as the jump destination address specified by the “CALLF” instruction in the logical product operation process of S626 (see FIG. 127). That is, in the present embodiment, the source program for executing the AND operation processing is shared (modularized) in both the priority attraction order acquisition process and the attraction priority storage process.

In this case, it is not necessary to separately provide the source program for the logical product operation processing in both the priority attraction order acquisition process and the attraction priority storage process, so that the capacity of the source program (the capacity used by the main ROM 102). Can be reduced. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, in the acquisition process of the attraction priority table (see FIG. 137) of S687 during the attraction priority acquisition process, the “LDQ” instruction (instruction code dedicated to the main CPU 101) is used as shown in FIG. 136C. Therefore, even in the acquisition process of the pull-in priority table of S687, the instruction related to the address setting can be omitted on the source program. As a result, the efficiency of the acquisition process of the pull-in priority table can be improved, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced.

[Effects obtained by reel stop control processing]
In the reel stop control process (see FIG. 138) of the pachi-slot machine 1 of the present embodiment, in the processes of S711 to S715, as shown in FIG. 139, the address is specified by using the Q register (extended register) on the source program. The "LDQ" instruction and the "CALLF" instruction are used.

Therefore, in the present embodiment, by using these main CPU 101 dedicated instruction codes, the capacity of the source program of the reel control processing can be reduced, and the processing efficiency of the reel stop control processing can be improved. That is, in the present embodiment, it is possible to improve the efficiency of the program processing speed and reduce the capacity of the main control circuit 90, and utilize the free area of the main ROM 102 increased according to the reduced capacity to improve the playability. Can be enhanced.

Further, in the determination process of S726 during the reel stop control process (check process of the stop state of the reel (turning cylinder)), as shown in FIG. 140, the "LDQ" instruction and the "ORQ" instruction (Q) on the source program. An instruction code dedicated to the main CPU 101 that specifies an address using a register (extended register) is used.

Therefore, in the present embodiment, the instruction related to the address setting can be omitted on the source program of the reel stop control process, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced by that amount. .. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Effects obtained by winning search process]
In the winning search process of the pachi-slot machine 1 of the present embodiment (see FIG. 145), in the set process of the payout number of S764 and the determination target data, as shown in FIG. 146, the “LDIN” command is used on the source program.

Therefore, in the winning search process of the present embodiment, both the data loading process and the address updating process can be performed by one "LDIN" command. In this case, the instruction related to the address setting can be omitted on the source program of the winning search process, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, the process of acquiring the value of the medal counter referred to in the determination process of S770 during the winning search process, the process of acquiring the value of the winning number counter referred to in the processing of S772, and the saving of the winning number counter performed in the process of S775 ( In each of the update) processes, as shown in FIG. 146, an "LDQ" instruction for specifying an address using a Q register (extended register) is used. Therefore, in the winning search process of the present embodiment, the instruction related to the address setting can be omitted on the source program, and the capacity of the source program (the capacity used by the main ROM 102) can be reduced accordingly. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

Further, in the determination process of S769 during the winning search process, as shown in FIG. 146, the "JSLAA" instruction is used on the source program, and in the determination process of S770 and S773, the "JCP" instruction is used. When the "JSLAA" command and the "JCP" command are used on the source program of the winning search process, the command related to the address setting can be omitted as described above, and the capacity of the source program (main ROM 102) can be omitted accordingly. The capacity used) can be reduced. As a result, in the present embodiment, the free space can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized to improve the playability.

[Effects obtained by illegal hit check processing]
In the present embodiment, as shown in FIGS. 28 to 30, the configuration of the winning operation flag storage area (display combination storage area) is the same as that of the hit request flag storage area (internal winning combination storage area). Therefore, in the arithmetic processing of S784 in the illegal hit check processing of the present embodiment, the data of the winning combination and the data of the internal winning combination are simply ANDed on the source program (see FIG. 149) by a logical product (“AND” instruction). You can get the result of combining the winning combination data and the internal winning combination data just by executing).

Therefore, in the present embodiment, the illegal hit check process can be made more efficient and simplified, and as a result, the free space of the main control program can be secured, and the free space can be used to enhance the playability. be able to.

[Effects obtained by winning check / medal payout processing]
In the winning check / medal payout process of the pachi-slot machine 1 of the present embodiment (see FIG. 150), when the payout operation is continued after the credit counter is updated (+1), the wait (payout interval) between 60.33 ms in the process of S808 is performed. Wait) Processing is performed. In this case, unnecessary waiting time can be reduced, and the mental burden on the player can be reduced.

[Effects obtained by checking the number of medals paid out]
In the update process of the winning combination end number counter of S814 during the medal payout number check process (see FIG. 152) of the pachi-slot machine 1 of the present embodiment, as shown in FIG. 153A, it is an instruction code dedicated to the main CPU 101 on the source program. The "DCPLD" instruction is used.

In the processing of S814, the "DCPLD" instruction is an instruction code in which the lower limit determination instruction of the number management counter and the determination branch instruction are integrated. Both processes of holding the value of the counter at "0" can be executed. In this case, it is not necessary to provide an instruction code for executing both processes separately. Therefore, in the medal payout number check process of the present embodiment, the capacity of the source program (the capacity used by the main ROM 102) can be reduced, and the free capacity can be secured (increased) in the main ROM 102, resulting in an increase. It is possible to improve the playability by utilizing the free space.

Further, in the process of S816 during the medal payout number check process, as shown in FIG. 153B, the value of the payout number counter is set in the communication parameter 1 of the credit information command, and the value of the credit counter is set in the communication parameter 5. Will be done. However, the values stored in the H register, the E register, and the D register at the present time are set in the other communication parameters 2 to 4 (unused parameters) constituting the credit information command. Therefore, the values of the communication parameters 2 to 4 at the time of transmitting the credit information command are undefined values. As a result, in the present embodiment, the sum value (BCC) of the credit information command can be set to an indefinite value for each transmission, and fraudulent acts such as goto can be suppressed.

[Effects obtained by 7-segment LED drive processing]
As shown in FIG. 160B, the output processing of the 7-segment common output (selection) data and the 7-segment cathode output data performed in S936 in the 7-segment LED drive processing (see FIG. 159) of the pachi-slot machine 1 of the present embodiment is one source. It is executed by the code "LD (cPA_SEGCOM), BC". That is, in the present embodiment, in the 7-segment LED drive process, when the 2-digit 7-segment LED is dynamically lit and controlled, the 7-segment common output data and the 7-segment cathode output data are output at the same time. This output control is also performed when the push order display data is displayed on the instruction monitor in the information display 6.

In this case, the number of instruction codes required for the dynamic lighting control of the 7-segment LED can be reduced on the source program of the 7-segment LED drive process. Therefore, in the present embodiment, the capacity of the source program (the capacity used by the main ROM 102) can be reduced, the free capacity can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized. Therefore, the playability can be enhanced.

[Effects obtained by timer update processing]
In the process of S952 (update process of the 2-byte timer) in the timer update process (see FIG. 164) of the pachi-slot machine 1 of the present embodiment, as shown in FIG. The "DCPWLD" instruction is used.

When the "DCPWLD" instruction is executed in the timer update process, both the process of updating (subtracting) the number of timers (number of 2-byte timers) and the process of holding the number of timers at "0" are executed as described above. Can be done. In this case, it is not necessary to provide an instruction code for executing both processes separately. Therefore, in the present embodiment, the capacity of the source program (the capacity used by the main ROM 102) can be reduced, the free capacity can be secured (increased) in the main ROM 102, and the increased free capacity can be utilized. Therefore, the playability can be enhanced.

<Various deformation examples>
The configuration and operation of the gaming machine according to the present invention have been described above, including their actions and effects. However, the present invention is not limited to the above-described embodiments, and includes various other embodiments and modifications as long as they do not deviate from the gist of the present invention described in the claims.

[Modification 1: CT precursor game and notification lottery during normal ART]
In the pachi-slot machine 1 of the above embodiment, in order to facilitate understanding, an example of shifting the gaming state from the next game (next game) to an advantageous state when the player wins a favorable state (for example, CT). However, the present invention is not limited to this. For example, in the case of performing game control in an advantageous state for the player, the game control in the advantageous state may be performed after playing a predetermined number of games, which is called a so-called "precursor game". ..

Here, with reference to FIGS. 174A and 174B, as an example thereof, an example in which the gaming state shifts from the normal ART to the CT via a predetermined number of precursor games will be described. Note that FIG. 174A is a diagram showing a game flow at the time of winning a CT lottery in Modification 1, and FIG. 174B is a configuration diagram of a flag conversion lottery table used in a flag conversion lottery performed during a precursory game.

In the game during the normal ART of this example, first, as shown in FIG. 174A, the CT lottery table during the ART (see FIG. 50) is used, and the CT lottery is based on the internal winning combination (sub flag), as in the above embodiment. I do. When the CT lottery is won, it is determined that the gaming state shifts to a state advantageous for the player called CT (additional chance zone). Therefore, various lottery for the CT lottery during the period until the CT is won. Is performed on the main side (main control board 71). For example, the main control board 71 (main CPU 101) performs an internal lottery for determining the internal winning combination, and also as the internal winning combination, the internal winning combination “F_certain chili lip”, “F_1 certain chili lip”, and “F_reach eye lip A”. When any of "F_reach eye lip D" is determined, the flag conversion lottery is performed using the flag conversion lottery table during ART (see FIGS. 47A and 47B).

Next, when a CT lottery is won in a game during normal ART, in this example, a precursory game (CT precursory game) for a predetermined period is performed before the transition to CT. In this example, in the CT precursor game, for example, a privilege for a player such as a CT lottery based on a sub-flag EX (“triple chili lip”, “reach eye lip”, “replay”, etc.) determined by a flag conversion lottery. We will not do lottery to give. However, in this example, in the CT precursor game, for example, a flag conversion lottery using the flag conversion lottery table shown in FIG. 174B is performed on the sub side (secondary control board 72 side), and the flag conversion lottery performed on this sub side is performed. Based on the result, the content of the notification performed on the sub side is controlled (determined). For example, when the flag conversion lottery performed on the sub side is won, the display device 11 (projector mechanism 211 and display unit 212) notifies the information for displaying the symbol combination related to the abbreviation "reach eye lip". If the flag conversion lottery is not won, the display device 11 notifies the information for displaying the symbol combination related to the abbreviation "replay".

As mentioned above, in recent pachislot machines, it is required to perform a lottery that affects the profit (ball output) of the player on the main side, but in the pachislot machine 1 of this example, the lottery result of the flag conversion lottery is the game. A period that does not affect the interests of the person (the period of the CT precursor game) is set, and the flag conversion lottery is performed on the sub side only during this period. Therefore, in this example, for example, in a situation where it is decided to grant the privilege of being in the CT omen, it is possible to increase the chance of displaying a special symbol combination such as the symbol combination related to the abbreviation "reach eye lip". At the same time, it is possible to increase the variation of how to show the combination of symbols. As a result, according to the configuration of this example, it becomes possible to further improve the playability.

The lottery table shown in FIG. 174B is a flag conversion lottery table in the CT precursor used for the flag conversion lottery performed on the sub side, and is stored in the ROM cartridge substrate 86. The flag conversion lottery table in the CT omen includes the internal winning roles "F_reach eye lip A" to "F_reach eye lip D", the lottery result (non-winning / winning) of the flag conversion lottery performed on the sub side, and each lottery. It defines the correspondence with the lottery value information associated with the result.

As is clear from the flag conversion lottery table shown in FIG. 174B, in this example, in the CT precursor game, the sub-flag EX “F_reach eye lip A” to “F_reach eye lip D” has a very high probability of being the internal winning combination. It is converted to "reach eye lip" (wins the flag conversion lottery). That is, in the CT precursor game, when any of the internal winning combinations "F_reach eye lip A" to "F_reach eye lip D" is determined, the symbol combination of the abbreviation "reach eye lip" is stopped and displayed with high probability. Therefore, it is possible to suggest to the player that the current game is in the CT precursor game. At this time, as described above, when the flag conversion lottery performed on the sub side in the CT precursor game is won, the notification for displaying the symbol combination related to the abbreviation "reach eye lip" is performed, but the privilege is given. There is no.

In this example, the flag conversion lottery during the CT precursor game may be performed on the main side. However, as in the example described with reference to FIGS. 174A and 174B, the data capacity and processing load on the main side can be reduced by performing lottery on the sub side during a period that does not affect the profit of the player.

[Modification 2: Another example of push order for triple chili lip display]
In the pachi-slot machine 1 of the above embodiment, when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is determined, if the stop button pressing order is correct, the symbol combination related to the abbreviation "triple chili lip" is used. An example has been described in which a symbol combination related to the abbreviation "replay" is displayed when it is displayed and the push order is incorrect (see FIG. 24). Further, in the above embodiment, an example has been described in which the correct push order associated with the internal winning combination “F_certain chili lip” and “F_1 certain chili lip” is “forward push”. However, the present invention is not limited to this.

For example, when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is determined, the types of symbol combinations displayed when the push order is incorrect are increased, and the internal winning combination "F_certain chili lip" is increased. The correct push order when "" is determined may be different from that when the internal winning combination "F_1 certainty lip" is determined. An example thereof (modification example 2) will be described with reference to FIGS. 175A and 175B. It should be noted that FIG. 175A is a diagram showing the correspondence relationship between the internal winning combination and the symbol combination (stop symbol (abbreviation)) displayed in the modified example 2, and FIG. 175B is the normal ART in the modified example 2. It is a figure which shows the correspondence relationship between the result of the flag conversion lottery of, and the navigation type performed on the sub side.

In this example, as shown in FIG. 175A, when the internal winning combination "F_certain chili lip" is determined, the correct push order is "forward push (left reel 3L is the first stop)", and the wrong answer is pushed. The order is "first stop of the middle reel 3C (hereinafter referred to as" middle push ") or first stop of the right reel 3R (hereinafter referred to as" reverse push ")", that is, "irregular push". Then, in this example, when the internal winning combination "F_certain chili lip" is determined, the symbol combination related to the abbreviation "triple chili lip" is displayed when pressed forward, and the abbreviation "replay" is displayed when pressed in the middle. The symbol combination according to the above is displayed, and when it is pushed backward, the symbol combination according to the abbreviation "double chili lip" is displayed.

Further, in this example, when the internal winning combination "F_1 certainty chili lip" is determined, the correct push order is reverse push, and the incorrect push order is forward push and middle push. Then, in this example, when the internal winning combination "F_1 certainty chili lip" is determined, when it is pushed backward, the symbol combination related to the abbreviation "triple chili lip" is displayed, and when it is pressed in the middle, the abbreviation "replay" is displayed. The symbol combination according to is displayed, and when pushed forward, the symbol combination according to the abbreviation "double chili lip" is displayed.

In the pachi-slot machine 1 of this example, when one of the internal winning combination "F_certain chili lip" and "F_1 certain chili lip" is determined, if the player presses forward, the abbreviation "triple chili lip" or the abbreviation "triple chili lip" or The symbol combination related to "double chili lip" is displayed. In addition, when either the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is determined, if it is pushed backward, the abbreviation "triple chili lip" or "double chili lip" is used depending on the type of the internal winning combination. The symbol combination related to "" is displayed. Further, in this example, when one of the internal winning combination "F_certain chili lip" and "F_1 certain chili lip" is determined, if the button is pressed in the middle, the symbol combination related to the abbreviation "replay" is applied regardless of the type of the internal winning combination. Is displayed.

When the correspondence relationship between the internal winning combination and the symbol combination displayed as stopped (stop symbol (abbreviation)) is set to the relationship shown in FIG. 175A, for example, the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is determined. In that case, it becomes possible to carry out various navigations (notifications) for the player to aim at the Chilean pattern.

For example, both "navigation that aims at the chili symbol by pushing forward" and "navigation that aims at the chili symbol by pushing backward" can be performed. In addition, when the internal winning combination "F_certain chili lip" is decided, "navigation that aims at the chili symbol by pushing forward" becomes a navigation for displaying the symbol combination related to the abbreviation "triple chili lip", and " "Navi that aims at the chili symbol by pushing backward" is a navigation for not displaying the symbol combination related to the abbreviation "triple chili lip" (navigation that displays the symbol combination related to the abbreviation "double chili lip"). On the other hand, when the internal winning combination "F_1 certain chili lip" is decided, the "navigation that aims at the chili symbol by pushing forward" is a navigation for not displaying the symbol combination related to the abbreviation "triple chili lip" (abbreviation "navigation"). The navigation that displays the symbol combination related to "double chili lip"), and the "navigation that aims at the chili symbol by reverse pressing" is the navigation for displaying the symbol combination related to the abbreviation "triple chili lip".

In this example, the decision as to whether or not to perform the above-mentioned navigation is managed by the flag conversion lottery performed on the main side, and the navigation is executed by the control of the sub side based on the result of the flag conversion lottery on the main side. .. At this time, the correspondence between the lottery result of the flag conversion lottery normally performed on the main side during ART and the navigation type controlled on the sub side is the correspondence relationship shown in FIG. 175B.

Also in this example, when the internal winning combination "F_certain chili lip" or "F_1 certain chili lip" is determined in the game during normal ART, the main control board 71 (main CPU 101) performs a two-step flag conversion lottery ( See FIG. 47). On the other hand, on the sub side, the result of the two-step flag conversion lottery is acquired from the start command data, and the navigation to be performed by the display device 11 is determined based on the result of the two-step flag conversion lottery.

Therefore, in this example, when the lottery result is non-winning at the time of the first stage flag conversion lottery, the sub control board 72 (sub CPU201) is referred to as "replay navigation" as shown in FIG. 175B. Perform the so-called navigation. In the "replay navigation", information instructing the player to press the button is notified. In this example, as shown in FIG. 174A, regardless of whether the internal winning combination is "F_certain chili lip" or "F_1 certain chili lip", the symbol combination related to the abbreviation "replay" is displayed at the time of middle pressing. ..

Further, in this example, when the first stage flag conversion lottery is won and the lottery result of the second stage flag conversion lottery is non-winning, the sub control board 72 (sub CPU201) is shown in FIG. 175B. As shown in, the navigation called "Chiririp fan navigation" is performed. In addition, in the "chili lip fan navigation", when the internal winning combination "F_certain chili lip" is determined, the player is notified of the instruction information to aim the chili symbol by pushing backward. On the other hand, in the "chili lip fan navigation", when the internal winning combination "F_1 certain chili lip" is determined, the player is notified of the instruction information to aim the chili symbol by pushing forward. Then, in such a "chili lip fan navigation", as shown in FIG. 174A, when the internal winning is "F_certain chili lip", the symbol combination related to the abbreviation "double chili lip" is displayed at the time of reverse pressing. When the internal winning combination is "F_1 sure chili lip", the symbol combination related to the abbreviation "double chili lip" is displayed at the time of forward pressing.

Further, in this example, when both the first stage and the second stage flag conversion lottery are won, the sub control board 72 (sub CPU201) is referred to as a "chili lip aligned navigation" as shown in FIG. 175B. Navigating. In addition, in the "chili lip matching navigation", when the internal winning combination "F_certain chili lip" is determined, the player is notified of the instruction information to aim the chili symbol by pushing forward. On the other hand, in the "chili lip matching navigation", when the internal winning combination "F_1 certain chili lip" is determined, the player is notified of the instruction information to aim the chili symbol by pushing backward. Then, in such a "chili lip matching navigation", as shown in FIG. 174A, when the internal winning is "F_certain chili lip", the symbol combination related to the abbreviation "triple chili lip" is displayed at the time of forward pressing. When the internal winning combination is "F_1 sure chili lip", the symbol combination related to the abbreviation "triple chili lip" is displayed at the time of reverse pressing.

In this example, the notification based on the lottery result of the flag conversion lottery described above does not affect the profit (the flag conversion lottery itself affects the profit, but the symbol combination displayed as a result affects the profit. Therefore, the above notification operation of this example is not performed on the main side (instruction monitor), but is performed only on the sub side (display device 11). Further, in this example, as described above, by performing not only the "chili lip matching navigation" but also the "chili lip fanning navigation", the navigation that does not affect the profit can be controlled by the sub side in various modes. .. As a result, the interest of the game can be improved.

[Modification 3: Another example of the bell navigation mode between flags and between non-flags]
In the pachi-slot machine 1 of the above embodiment, as described above, the main side is notified by displaying the numerical value uniquely corresponding to the information of the reel stop operation on the instruction monitor (not shown). At this time, the correspondence relationship of the navigation data described with reference to FIGS. 63A to 63D is referred to. Then, in the above embodiment, an example in which "white 7 navigation" and "blue 7 navigation" are performed during the BB flag state (RT5 state) but "bell navigation" is not performed has been described. Not limited. In the state between BB flags (RT5), "Bell Navi" may be performed in addition to "White 7 Navi" and "Blue 7 Navi".

In this case, the numerical values displayed on the instruction monitor may be different from each other between the BB flag state and the non-BB flag state. Here, FIGS. 176A and 176B show the correspondence between the notification (navigation) performed on the main side and the notification (navigation) performed on the sub side during the state between the BB flags in the modification 3. Note that FIG. 176A is a diagram showing the correspondence between the notification (navigation) performed on the main side and the notification (navigation) performed on the sub side during the RT5 state (between the BB1 flags), and FIG. 176B is a diagram showing the correspondence between the notification (navigation) performed on the sub side and the notification (navigation) performed on the sub side. It is a figure which shows the correspondence relationship between the notification (navigation) performed on the main side, and the notification (navigation) performed on the sub side in (between BB2 flags).

Further, in this example, the correspondence between the notification (navigation) performed on the main side and the notification (navigation) performed on the sub side during the non-BB flag state is the same as that of the above embodiment (see FIGS. 63A and 63B). .. Therefore, when the "bell navigation" is performed in the state between the non-BB flags, the numerical value of "1" to "3" (the second instruction information of the push order combination) is displayed on the instruction monitor.

In this example, as shown in FIGS. 176A and 176B, when the "bell navigation" is performed in the state between the BB flags, the numerical values "12" to "14" (pushing order first instruction information) are displayed on the instruction monitor. To. The present invention is not limited to this, and the numerical value displayed on the instruction monitor can be appropriately changed when the "bell navigation" is performed in the state between the BB flags. In this example, the navigation on the sub side performed by using the display device 11 may be provided in common in both the BB flag-to-BB state state and the non-BB flag-to-flag state.

[Modification 4: Another example of granting benefits]
In the pachi-slot machine 1 of the above embodiment, the notification content is controlled based on the result of the flag conversion lottery performed on the main side, so that the symbol combination displayed is different when the stop operation is performed according to the notification. That is, in the above embodiment, an example in which whether or not to grant the privilege is determined based on the result of the flag conversion lottery performed on the main side has been described, but the present invention is not limited to this. For example, on the main side (main control board 71), the privilege may be given based on the actually displayed symbol combination.

In this case, the main control board 71 (main CPU 101) grants a privilege when a predetermined symbol combination is displayed according to the notification performed according to the result of the flag conversion lottery, and when the notification is not followed. , Even if a predetermined symbol combination is displayed, the privilege may not be given. In the pachi-slot machine 1 of the above embodiment, the symbol combinations displayed according to the pressing order are different, but even when the player ignores the notification and performs the stop operation, the symbol combinations related to the abbreviation "triple chili lip" are used. There is a possibility that a special symbol combination such as, etc. will be displayed. Therefore, in this example, even if the notification is ignored and the special symbol combination is displayed, the privilege is given only when the special symbol combination is displayed according to the notification without giving the privilege. You may.

[Modification 5: Another example of notification control that does not affect profits (privileges)]
In the pachi-slot machine 1 of the above modification 1 (see FIGS. 174A and 174B), whether or not to perform the notification that affects the profit is determined by the notification lottery (flag conversion lottery) on the main side and does not affect the profit. An example in which whether or not to perform notification is determined by a notification lottery on the sub side has been described. Then, as an example of the notification that does not affect the profit, an example of performing the notification for displaying the symbol combination related to the abbreviation "reach eye lip" during the precursory game has been described, but the notification that does not affect the profit is described. , Not limited to this example.

In recent pachislot machines, the game may be changed to a state in which it is easy (difficult) to lock the game according to the order of stop operations. For example, transitioning to a state where it is easy to lock the game when the push order is "left, middle, right", and transitioning to a state where it is difficult to lock the game when the push order is "right, middle, left". There is. In such a pachislot machine, by notifying the push order, it is possible to shift to a state in which the game lock is easy (difficult). However, if whether or not to lock the game affects the profit, it is necessary to control this notification on the main side. If whether or not to lock the game does not affect the profit, this notification may be controlled on the sub side.

Further, as a case where whether or not to perform the game lock affects the profit, for example, it is conceivable that the game lock is performed to win the ART lottery. On the other hand, when whether or not to perform the game lock does not affect the profit, it is the case where the game lock is performed as an effect. For example, by frequently performing the game lock during the precursory game in which it is decided to give a profit (privilege), it becomes possible to show in the production that the profit will be given in the subsequent game. ..

Here, with reference to FIGS. 177A and 117B, a configuration example in which the push order and the locked state are associated with each other in the modified example 5 will be described. It should be noted that FIG. 177A is a diagram showing the correspondence relationship between the push order and the locked state, and FIG. 177B is a diagram showing the relationship between the presence or absence of the influence of the game lock on the profit and the notification mode.

In the example shown in FIG. 177A, when the stop operation is performed in the push order of "left, middle, right" when the internal winning combination "F_maintenance lip A" is determined, the lock state is "0" (a state in which it is difficult to lock). ) To "1" (easy to lock), and when the stop operation is performed in the pressing order of "left, right, middle", "middle, left, right" or "middle, right, left", the current When the locked state of is maintained and the stop operation is performed in the pressing order of "right, left, middle" or "right, middle, left", the locked state changes from "1" to "0". In addition, when the internal winning combination "F_maintenance lip B" is determined, if the stop operation is performed in the pressing order of "middle, left, right", the lock state changes from "0" (difficult to lock) to "1". "(Easy to lock state), and when the stop operation is performed in any other pressing order, the current locked state is maintained.

In the example shown in FIG. 117A, in order to simplify the explanation, an example in which the locked state is set to two stages of "0 (difficult to lock)" and "1 (easy to lock)" will be described. The present invention is not limited to this. For example, a locked state having three or more stages may be provided. Further, in this case, the lock state may not be transitioned one step at a time, but may be configured to transition multiple steps at one time.

Then, in this example, as shown in FIG. 117B, when the game lock affects the profit, the notification lottery for whether or not to perform the notification is performed on the main (main control board 71) side, and the lottery result is performed. The predetermined push order is notified on both the main side and the sub side based on. On the other hand, when the game lock does not affect the profit, a lottery for notifying whether or not to perform the notification is performed on the sub (sub-control board 72) side, and a predetermined push order is performed on the sub side based on the lottery result. Is notified.

As for pachislot, there are pachislots in which the game lock affects the profit for the entire period of the game, and there are pachislots in which the game lock does not affect the profit for the entire period of the game. Further, as a pachi-slot machine, there is a pachi-slot machine in which the game lock affects the profit during a predetermined period of the game, but the game lock does not affect the profit during a specific period of the game. Therefore, during the period when the game lock affects the profit, the main side performs a notification lottery as to whether or not to notify, and based on the lottery result, both the main side and the sub side notify the predetermined push order. On the other hand, during the period when the game lock does not affect the profit, the sub side may perform a notification lottery as to whether or not to notify, and the sub side may notify the predetermined push order based on the lottery result. good.

Since the game lock is normally controlled on the main side (main control board 71), the main control board 71 is provided with a function of transitioning to the locked state according to the pressing order shown in FIG. 117A. That is, the main control board 71 draws a lottery whether or not to lock the game with a probability according to the lock state setting means for setting the lock state based on the order of the detected stop operations and the lock state set by the lock state setting means. It also functions as a game lock determination means determined by the above, and a lock execution means for temporarily stopping the progress of the game when it is determined that the game lock determination means performs the game lock. Further, when the lock state setting means sets the lock state in which the game lock is easy (difficult), the main control board 71 and / or the sub control board 72 is notified by lottery as to whether or not to notify the push order. It also functions as a lottery means and a notification means for notifying a predetermined push order based on the lottery result of the notification lottery means.

[Modification 6: Another example of normal ART and CT termination conditions]
Normally, the end condition of ART or CT is not limited to the example described in the above embodiment, and any end condition can be adopted. For example, the number of medals awarded during normal ART or CT, the number of times a unit game is digested during normal ART or CT, the number of times information is notified that is advantageous to the player during normal ART or CT, When the predetermined number of games (for example, 50 games) is set as one set, the end condition such as the number of sets and the continuation rate at the end of one set can be adopted.

Further, as a method for counting the number of medals given during normal ART or CT, for example, a method for counting the number of medals paid out in a unit game may be adopted, or a method of counting the number of medals paid out in a unit game may be adopted. A method of counting the difference number (net increase number) obtained by subtracting the number of bets (multiplications) of the medals used in the unit game from the number of medals that have been played may be adopted. Further, as a method for counting the number of medals given during normal ART or CT, a method of calculating based on the actually increased medals (calculation based on the actual value) may be adopted, or has the number actually increased? Regardless of whether or not, a method of calculating based on the number of medals scheduled to increase when following the notification (calculation based on an ideal value) may be adopted.

Further, depending on the type of internal winning combination, a configuration may be adopted in which the number of medals awarded is not increased, that is, a configuration is adopted in which the number of medals that is the end condition of the number of medals awarded is not counted as the number of medals or the difference. .. For example, even if a part of the winning combination (rare role) that is unlikely to be determined as an internal winning combination, or a combination in which the display / non-display of the symbol combination is switched according to the timing of the stop operation, is determined as the internal winning combination. , The number of medals awarded may not be increased or decreased (counted).

<Second Embodiment>
Subsequently, another embodiment of the pachi-slot machine 1 according to the present invention will be described. The pachi-slot machine 1 of the second embodiment shown below has different playability from the pachi-slot machine 1 of the first embodiment and various modified examples, and the data compression / expansion described in the first embodiment and various modified examples is performed. It can be applied in the same way to the control of how to hold data and various processes. Further, in the second embodiment, detailed description of the same configuration as that of the first embodiment will be omitted.

In the pachi-slot machine 1 of the second embodiment, among the pseudo lines connecting the symbols of 3 rows × 3 columns displayed in the frame of the reel display window 4, the cross-down line is used as an effective line, and the other lines are simulated. Used as a line. That is, the pachi-slot machine 1 is the upper unit symbol display area of the left reel 3L in the unit symbol display area of 3 rows × 3 columns displaying one symbol of each reel in the reel display window 4, and the reel 3C in the middle. The cross-down line formed by connecting the unit symbol display area in the middle row and the unit symbol display area in the lower row of the right reel 3R is used as an effective line, and is formed by connecting the other unit symbol display areas. Line is used as a pseudo line. The pseudo lines include, for example, a top line connecting the unit symbol display areas in the upper row of each reel, a center line connecting the unit symbol display areas in the middle row of each reel, and a bottom line connecting the unit symbol display areas in the lower row of each reel. , And a cross-up line connecting the unit symbol display areas of the lower part of the reel 3L, the middle part of the reel 3C, and the upper part of the reel 3R.

<Transition flow of game state>
First, various gaming states managed by the main control circuit 90 (main CPU 101) of the pachi-slot machine 1 of the second embodiment and their transition flows will be described with reference to FIG. 178.

[Basic game state transition flow]
In the pachi-slot machine 1 of the present embodiment, a big bonus (hereinafter referred to as “BB”) is provided as a type of bonus game. The BB is a continuous accessory actuating device according to a regular bonus (hereinafter referred to as “RB”) called a type 1 special accessory, and continuously operates the RB.

Therefore, in the present embodiment, the main control circuit 90 manages the gaming state based on the presence or absence of winning / operating (winning) of the bonus combination. Specifically, as shown in FIG. 178, the main control circuit 90 wins / operates (wins) a bonus combination (internal winning combination of the names "F_crown BB", "F_red BB", and "F_blue BB" described later). ) Is present or absent, and three types of gaming states called "bonus non-winning state", "between flags state", and "bonus state" are managed.

The bonus non-winning state is a state in which the bonus is not winning and the bonus is not activated (winning), and the bonus state is a state in which the bonus is activated. Further, in the present embodiment, when the bonus combination is determined as the internal winning combination, the bonus combination is carried over as the internal winning combination over a plurality of games until the bonus is won. The inter-flag state is a state in which the bonus combination is carried over as an internal winning combination, that is, a state in which the bonus combination is won and the bonus is not activated.

Further, in the present embodiment, eight types of states from the RT0 gaming state to the RT7 gaming state, in which the types of internal winning combinations related to the replay and the winning probabilities thereof are different from each other (hereinafter, referred to as "RT0 state" to "RT7 state", respectively). Is provided. In the present embodiment, the RT state in the bonus non-winning state is either the RT0 state to the RT5 state, and the RT state in the inter-flag state is the RT6 state or the RT7 state.

The RT0 state and RT1 state are RT states in which the winning probability of the internal winning combination related to the replay is low, and the RT2 state, RT3 state, RT6 state and RT7 state have the winning probability of the internal winning combination related to the replay. It is a medium RT state (higher than the RT0 state and the RT1 state), and the RT4 state and the RT5 state are RT states in which the winning probability of the internal winning combination related to the replay is high. Hereinafter, the RT4 state and the RT5 state may be referred to as a “high RT state”, and the RT0 state to the RT3 state may be referred to as a “low RT state”. Since the RT3 state is a special RT state as described later, when it is called a "low RT state", it may indicate the RT0 state to the RT2 state and may not include the RT3 state.

Further, the RT0 state to the RT7 state are classified into an infinite RT state or a finite RT state according to not only the winning probability of the internal winning combination related to the replay but also the transition opportunity from itself to another RT state. To. The infinite RT state is an RT state in which the number of games is not used as a trigger for transition to another RT state, and in the present embodiment, the RT0 state, the RT2 state, and the RT4 state to the RT7 state are applicable. The finite RT state is an RT state in which the number of games is used as a trigger for transition to another RT state, and in the present embodiment, the RT1 state and the RT2 state are applicable.

As shown in FIG. 178, when a predetermined number of games are played in the RT1 state or the RT3 state (when the transition condition (1) is satisfied), the main control circuit 90 changes the game state from the RT1 state or the RT3 state to the RT0 state. To migrate to. The specified number of times in the RT1 state is 10 times, and the specified number of times in the RT3 state is 20 times.

Further, in the RT2 state, RT4 state, or RT5 state, when the symbol combination (see FIGS. 197 to 204 described later) related to the abbreviation "RT0 transition symbol" is displayed on the valid line (when the transition condition (2) is satisfied). ), The main control circuit 90 shifts the gaming state from the RT2 state, the RT4 state, or the RT5 state to the RT0 state.

Further, in the RT0 state, RT2 state, or RT4 state, when the symbol combination (see FIGS. 197 to 204 described later) related to the abbreviation "RT1 transition symbol" is displayed on the valid line (when the transition condition (3) is satisfied). ), The main control circuit 90 shifts the gaming state from the RT0 state, the RT2 state, or the RT4 state to the RT1 state.

Further, in the RT0 state, RT4 state, or RT5 state, when the symbol combination related to the abbreviation "RT2 transition symbol" (see FIGS. 197 to 204 described later) is displayed on the valid line (when the transition condition (4) is satisfied). ), The main control circuit 90 shifts the gaming state from the RT0 state, the RT4 state, or the RT5 state to the RT2 state.

Further, in the RT2 state, when the symbol combination related to the abbreviation "RT3 transition symbol" (see FIGS. 197 to 204 described later) is displayed on the valid line (when the transition condition (5) is satisfied), the main control circuit 90 Shifts the gaming state from the RT2 state to the RT3 state.

Further, in the RT2 state or the RT5 state, when the symbol combination related to the abbreviation "RT4 transition symbol" (see FIGS. 197 to 204 described later) is displayed on the valid line (when the transition condition (6) is satisfied), the main The control circuit 90 shifts the gaming state from the RT2 state or the RT5 state to the RT4 state.

Further, in the RT4 state, when the symbol combination related to the abbreviation "RT5 transition symbol" (see FIGS. 197 to 204 described later) is displayed on the valid line (when the transition condition (7) is satisfied), the main control circuit 90 Shifts the gaming state from the RT4 state to the RT5 state.

Here, in pachi-slot 1, when a symbol combination displayed on the valid line is used as a transition condition to another RT state, the symbol combination is displayed on the valid line during the infinite RT state. It is necessary to shift to the RT state. The abbreviations "RT0 transition symbol" to "RT5 transition symbol" are symbol combinations that shift to the corresponding RT state when displayed on the effective line during the infinite RT state.

On the other hand, in the finite RT state, even if the abbreviations "RT0 transition symbol" to "RT5 transition symbol" are displayed on the effective line, it is possible to control not to shift to the corresponding RT state. Therefore, in the pachi-slot machine 1 of the present embodiment, in the RT1 state or the RT3 state which is the finite RT state, even if the abbreviations "RT0 transition symbol" to "RT5 transition symbol" are displayed on the effective line, the RT state is not transferred. By shifting the RT state when a predetermined number of games are played, the transition flow of the game state shown in FIG. 178 is realized.

On the other hand, in the infinite RT state, when the corresponding symbol combination is displayed on the valid line, it is necessary to shift to another RT state, so if there is an RT state that you do not want to shift from the viewpoint of playability, , The transition flow of the gaming state shown in FIG. 178 is realized by controlling so that the symbol combination that is the trigger for the transition to the RT state that the player does not want to shift is not displayed on the effective line during the corresponding RT state. is doing. For example, in the present embodiment, in the RT4 state and the RT5 state (more specifically, the RT0 state is also included), the abbreviation "RT3 transition symbol" that shifts to the RT3 state is controlled so as not to be displayed on the effective line. By doing so, the transition to the RT3 state is performed only from the RT2 state.

Further, when the bonus combination is determined as the internal winning combination in the bonus non-winning state, the main control circuit 90 shifts the gaming state from the bonus non-winning state to the inter-flag state. Specifically, when the internal winning combination related to the name "F_crown BB" or "F_blue BB" is determined as the bonus combination (when the transition condition (8) is satisfied), the main control circuit 90 sets the gaming state. It shifts from the bonus non-winning state to the RT6 state between the flags. Further, when the internal winning combination related to the name "F_red BB" is determined as the bonus combination (when the transition condition (9) is satisfied), the main control circuit 90 changes the gaming state from the bonus non-winning state to the flag-to-flag state. Move to RT7 state.

Further, when the bonus combination is won in the inter-flag state, the main control circuit 90 shifts the gaming state from the inter-flag state to the bonus state. The pachi-slot machine 1 of the present embodiment has CBB and NBB as bonus states, and the name "F_crown BB" wins a prize (design combination related to the abbreviation "crown BB" (see FIGS. 197 to 204 described later). Is displayed on the valid line) and (when the transition condition (10) is satisfied), the main control circuit 90 shifts the gaming state from the inter-flag state to the CBB. In addition, the name "F_red BB" or "F_blue BB" wins (the symbol combination related to the abbreviation "BB" (see FIGS. 197 to 204 described later) is displayed on the valid line) and (transition condition (transition condition). 11) is established), the main control circuit 90 shifts the gaming state from the inter-flag state to the NBB.

Further, when the number of medals exceeding the specified number is paid out in the bonus state and the bonus state ends (when the transition condition (12) is satisfied), the main control circuit 90 changes the gaming state from the bonus state to the RT0 state in which the bonus is not won. To migrate to. Here, in the present embodiment, the specified number of sheets that triggers the end of the bonus state is "396 sheets" in CBB and "232 sheets" in NBB.

<Structure of data table stored in main ROM>
Next, the configuration of various data tables stored in the main ROM 102 will be described.

[Design layout table]
First, the symbol arrangement table will be described with reference to FIG. 179. The symbol arrangement table is data that specifies the position of each symbol in each rotation direction of the left reel 3L, the middle reel 3C, and the right reel 3R, and the type of the symbol arranged at each position (hereinafter, symbol code (in FIG. 179). Refer to the symbol code table of)) and specify the correspondence with).

In the pachi-slot machine 1 of the second embodiment, as shown in the symbol code table, each reel has the symbols "red 7", "blue 7", "BAR", "replay", "bell 1", "bell 2", and "bell 3". "Watermelon 1" "Watermelon 2" and "Cherry" 10 types of symbols are displayed.

[Internal lottery table]
Next, the internal lottery table referred to when determining the internal winning combination will be described with reference to FIGS. 180 to 182. The internal lottery table is provided for each game state, and defines the correspondence between various internal winning combinations and the lottery value when each internal winning combination is determined. In the RT0 state of the bonus non-winning state, the internal lottery table for RT0 is referred to, and during the RT1 state of the bonus non-winning state, the internal lottery table for RT1 is referred to, and in the RT2 state of the bonus non-winning state. Refers to the internal lottery table for RT2, refers to the internal lottery table for RT3 during the RT3 state in the bonus non-winning state, and refers to the internal lottery table for RT4 during the RT4 state in the bonus non-winning state. Then, during the RT5 state in which the bonus is not won, the internal lottery table for RT5 is referred to.

Further, during the RT6 state in the inter-flag state in which the internal winning combination "F_crown BB" is carried over, the internal lottery table for the crown BB inter-flag (RT6) is referred to, and the internal winning combination "F_red BB" is carried over. During the RT7 state between the flags, the internal lottery table for the red BB flag (RT7) is referred to, and during the RT6 state of the flag state carrying over the internal winning combination "F_blue BB", the blue BB flag is used. The internal lottery table for interim (RT6) is referenced. Further, during the CBB bonus state, the internal lottery table for CBB is referred to, and during the NBB bonus state, the internal lottery table for NBB is referred to.

[Correspondence table between internal winning combination and symbol combination (symbol combination determination table)]
Next, with reference to FIGS. 183 to 196, a correspondence table (symbol combination determination table) between the internal winning combination and the symbol combination will be described. The symbol combination determination table defines the correspondence between various internal winning combinations and the symbol combinations (combinations) that can be displayed on the effective line associated with each internal winning combination. That is, when the internal winning combination is determined, the type of symbol combination that can be displayed on the valid line (type of display combination that can be won) is uniquely determined.

The various data described in the symbol combination column in each symbol combination determination table is for identifying the symbol combination that is permitted to be displayed along the valid line set over the left reel 3L, the middle reel 3C, and the right reel 3R. It is data. The relationship between each name described in the symbol combination (display combination) column and a specific symbol combination will be described later in FIGS. 197 to 204.

Further, the "○" mark described in the symbol combination determination table indicates a symbol combination (combination) that can be displayed on the effective line in the determined internal winning combination, that is, a display combination that can win a prize. It should be noted that the symbol combination determination table does not specify the case where the "internal winning combination" is "off", but this is all the symbols defined by the symbol combination tables shown in FIGS. 183 to 196. Indicates that the display of combinations is not allowed.

In the pachi-slot machine 1 of the present embodiment, the main control circuit 90 (main CPU 101) has different stop controls depending on the internal winning combination and the gaming state, and when a predetermined combination is determined as the internal winning combination, FIGS. 183 to 183. Rotation stop control of the left reel 3L, the middle reel 3C, and the right reel 3R is performed so that the corresponding symbol combinations (combinations) shown in FIG. 196 can be displayed. In the correspondence table shown in FIGS. 183 to 196, all the symbol combinations that can be displayed for the determined internal winning combination are listed by "○", but due to the priority of the symbols to be drawn in, all the symbol combinations are listed. Even the combination of symbols marked with "○" may not be displayed.

[Contents of symbol combination]
Next, the specific contents of the symbol combination will be described with reference to FIGS. 197 to 204. In FIGS. 197 to 204, the combination column indicates the design of each reel 3L, 3C, 3R displayed along the effective line when each reel 3L, 3C, 3R is stopped, and the name column is the combination column. Means the name of the combination of symbols indicated by. In addition, the payout column defines the number of medals to be paid out when the corresponding symbol combination is displayed. In addition, the abbreviation column indicates the role of each symbol combination and the abbreviation given from the characteristics of each symbol combination.

The combination names "R_3rd transition_01" to "R_1st transition_18" are symbol combinations related to the abbreviation "RT2 transition symbol", and when displayed along the valid line, 0 medals are paid out. Further, as described above, when the symbol combination according to the abbreviation "RT2 transition symbol" is displayed along the effective line during the infinite RT state, the gaming state shifts to the RT2 state (see FIG. 178).

Further, the combination names "T_stop control A" to "T_stop control L_02" are abbreviated as "control rolls", and when displayed along the valid line, 0 medals are paid out.

Further, the combination names "C_7RBR_01" and "C_7RBR_02" are symbol combinations related to the continuous operation device (BB) of the first-class special accessory, and the abbreviation is "crown BB". When the symbol combination of the abbreviation "crown BB" is displayed along the valid line, the gaming state shifts to the bonus state (CBB) (see FIG. 178).

Further, the combination names "C_7RRR" to "C_7BBB_02" are symbol combinations related to the continuous operation device (BB) of the first-class special accessory, and the abbreviation is "BB". When the symbol combination of the abbreviation "BB" is displayed along the valid line, the game state shifts to the bonus state (NBB) (see FIG. 178).

Further, the combination names "C_CD rip" to "C_CU rip_09" are symbol combinations related to the abbreviation "diagonal replay", and when displayed along the effective line, the replay operation is performed. In addition, in the symbol combination related to the abbreviation "diagonal replay", the symbol "replay" is displayed on the diagonal line (cross-down line or cross-up line) among the pseudo lines connecting the symbols of 3 rows × 3 columns. It is a symbol combination.

Further, the combination names "C_RT4 rip_01" to "C_RT4 rip_03" are symbol combinations related to the abbreviation "Oyama replay" (also known as the abbreviation "RT4 transition symbol"), and when displayed along the valid line, The re-game is activated. Further, as described above, when the symbol combination related to the abbreviation "Oyama Replay (= RT4 transition symbol)" is displayed along the effective line during the infinite RT state, the gaming state shifts to the RT4 state (FIG. 178). reference). The symbol combination related to the abbreviation "Oyama Replay" is in the lower unit symbol display area of the left reel 3L, the middle unit symbol display area of the middle reel 3C, and the lower unit symbol display area of the right reel 3R. It is a symbol combination in which the symbol "replay" is displayed.

Further, the combination names "C_RT3 rip A_01" to "C_RT3 rip D_04" are symbol combinations related to the abbreviation "weak chelip" (also known as the abbreviation "RT3 transition symbol"), and when displayed along the valid line, The re-game is activated. Further, as described above, when the symbol combination related to the abbreviation "weak chelip (= RT3 transition symbol)" is displayed along the effective line during the infinite RT state, the gaming state shifts to the RT3 state (FIG. 178). reference). The symbol combination related to the abbreviation "weak chelip" is a symbol combination in which the symbol "cherry" is displayed in the upper or lower unit symbol display area of the left reel 3L when the timing of the stop operation is appropriate. ..

Further, the combination names "C_BB Lip_01" to "C_BB Lip_18" are symbol combinations related to the abbreviation "BB Medium Replay". When the symbol combination of the abbreviation "BB medium replay" is displayed along the valid line, the replay operation is performed.

Further, the combination names "C_BT rip_01" to "C_TP rip_03" are symbol combinations related to the abbreviation "parallel replay" (also known as the abbreviation "RT1 transition symbol"), and when displayed along the valid line, The re-game is activated. Further, as described above, when the symbol combination according to the abbreviation "parallel replay (= RT1 transition symbol)" is displayed along the effective line during the infinite RT state, the gaming state shifts to the RT1 state (FIG. 178). reference). In addition, in the symbol combination related to the abbreviation "parallel replay", the symbol "replay" is displayed on the parallel line (bottom line, center line or top line) of the pseudo lines connecting the symbols of 3 rows × 3 columns. It is a combination of symbols.

Further, the combination names "C_RT5_01" to "C_RT5 rip_09" are symbol combinations related to the abbreviation "strong chance rip" (also known as the abbreviation "RT5 transition symbol"), and when displayed along the valid line, they are displayed again. The game is activated. Further, as described above, when the symbol combination related to the abbreviation "strong chance lip (= RT5 transition symbol)" is displayed along the effective line during the infinite RT state, the gaming state shifts to the RT5 state (Fig.). See 178). The symbol combinations related to the abbreviation "strong chance lip" are the unit symbol display area in the middle of the left reel 3L, the unit symbol display area in the middle of the middle reel 3C, and the unit symbol display area in the upper part of the right reel 3R. It is a symbol combination in which the symbol "replay" is displayed.

Further, the combination names "C_CD7 rip A_01" to "C_CU7 rip C_04" are symbol combinations related to the abbreviation "7-matched rip" (also known as the abbreviation "RT5 transition symbol"), and are displayed along the valid line. , The re-game is activated. Further, as described above, when the symbol combination related to the abbreviation "7-matched lip (= RT5 transition symbol)" is displayed along the effective line during the infinite RT state, the gaming state shifts to the RT5 state (Fig.). See 178). In addition, in the symbol combination related to the abbreviation "7-matched lip", when the timing of the stop operation is appropriate, the symbol "red 7" or the symbol "red 7" or one of the pseudo lines connecting the symbols of 3 rows × 3 columns is used. It is a symbol combination in which the symbol "blue 7" is displayed.

Further, the combination names "C_CUBAR Lip A" to "C_BTBAR Lip C_02" are symbol combinations related to the abbreviation "BAR matching lip" (also known as the abbreviation "RT5 transition symbol"), and are displayed along the valid line. , The re-game is activated. Further, as described above, when the symbol combination related to the abbreviation "BAR matching lip (= RT5 transition symbol)" is displayed along the effective line during the infinite RT state, the gaming state shifts to the RT5 state (Fig.). See 178). In the symbol combination related to the abbreviation "BAR alignment lip", the symbol "BAR" is displayed in any of the pseudo lines connecting the symbols of 3 rows × 3 columns when the timing of the stop operation is appropriate. It is a combination of symbols to be made.

Further, the combination names "C_fake A_01" to "C_fake G_04" are symbol combinations related to the abbreviation "fake rip", and when they are displayed along the effective line, the replay operation is performed. Further, the combination names "C_special rip A_01" to "C_special rip D_02" are symbol combinations related to the abbreviation "reach eye rip", and when displayed along the effective line, the replay operation is performed.

Further, the combination names "C_CD bell AAA_01" to "C_BT bell_09" are symbol combinations related to the abbreviation "bell", and when displayed along the valid line, eight medals are paid out. Of the symbol combinations related to the abbreviation "bell", the symbol combinations related to "C_CD bell AAA_01" to "C_CD bell BBB" are crossdowns (CDs) among pseudo lines connecting the symbols of 3 rows x 3 columns. ) This is a symbol combination in which the symbol "bell" is displayed on the line, and may be referred to as "CD bell" in the following. Similarly, among the symbol combinations related to the abbreviation "bell", the symbol combinations related to "C_TP bell_01" to "C_TP bell_18" are symbol combinations in which the symbol "bell" is displayed on the top (TP) line. Hereinafter, it may be referred to as "TP bell", and the symbol combination relating to "C_CT bell_01" to "C_CT bell_06" is a symbol combination in which the symbol "bell" is displayed on the center (CT) line. Then, it may be called "CT bell", and the symbol combination related to "C_CU bell_01" to "C_CU bell_18" is a symbol combination in which the symbol "bell" is displayed on the cross-up (CU) line. Then, it may be called "CU bell", and the symbol combination related to "C_BT bell_01" to "C_BT bell_09" is a symbol combination in which the symbol "bell" is displayed on the bottom (BT) line. , Sometimes called "BT bell".

Further, the combination names "C_left one-card combination A_01" to "C_right one-card combination B_06" are symbol combinations related to the abbreviation "first-sheet appearance", and when displayed along the effective line, one sheet is displayed. The medal will be paid out.

In addition, the combination names "C_left transition combination_01" to "C_right transition combination_06" are symbol combinations related to the abbreviation "RT0 transition symbol", and when displayed along the valid line, one medal is paid out. At the same time, the gaming state shifts to the RT0 state (see FIG. 178).

Further, the combination names "C_watermelon A_01" to "C_watermelon F_02" are symbol combinations related to the abbreviation "watermelon", and when displayed along the valid line, three medals are paid out. Further, the combination names "C_cherry A_01" to "C_cherry E_02" are symbol combinations related to the abbreviation "cherry", and when displayed along the valid line, three medals are paid out.

Further, the combination names "C_SP combination A_01" to "C_SP combination G" are symbol combinations related to the abbreviation "fixed roll", and when displayed along the valid line, one medal is paid out. Further, the combination names "C_V bell_01" to "C_V bell_18" are symbol combinations related to the abbreviation "CBB middle bell", and when displayed along the valid line, 12 medals are paid out.

[Correspondence between winning combination and symbol combination displayed stopped]
Subsequently, with reference to FIG. 205, the correspondence between the internal winning combination and the symbol combination displayed as stopped will be described. Note that FIG. 205 is a diagram showing a correspondence relationship between various internal winning combinations that can be determined and a symbol combination (abbreviation) that is stopped and displayed when each internal winning combination is determined.

In the pachi-slot machine 1 of the present embodiment, a so-called "pushing order combination" is provided, in which the symbol combinations displayed are different according to the order (pushing order) of the player's stop operations. In the pachi-slot machine 1 of the present embodiment, "F_6 choice maintenance rip 123" to "F_6 choice maintenance rip 321", "F_6 choice rush rip 123" to "F_6 choice rush rip 321", "F_6 choice fall rip 123" to "F6" "Selection fall rip 321", "F_3 selection promotion rip 1xx" to "F_3 selection promotion rip 3xx", and "F_123 bell A" to "F_321 bell B" are the push order roles. In the following, "F_6 choice maintenance rip 123" to "F_6 choice maintenance rip 321" may be referred to as "6 choice maintenance rip", and "F_6 choice rush rip 123" to "F_6 choice rush rip 321" may be referred to as "F_6 choice rush rip 321". Sometimes called "6 choice rush rip", "F_6 choice fall rip 123" to "F6 choice fall rip 321" may be called "6 choice fall rip", "F_3 choice promotion rip 1xx" to "F_3 choice" "Promotion lip 3xx" may be referred to as "three-choice promotion lip", and "F_123 bell A" to "F_321 bell B" may be referred to as "push order bell".

As described above, the push order combination indicates the correct push order as part of its name. For example, the internal winning combination with "1xx" as part of the name means that the correct push order is that the first stop operation is for the left reel 3L, and "2xx" is part of the name. A certain internal winning combination means that the correct push order is for the middle reel 3C, and an internal winning combination with "3xx" as part of the name is the correct push order. However, it means that the first stop operation is for the right reel 3R. In addition, the internal winning combination with "123" as part of the name of the internal winning combination means that the correct push order is "left, middle, right", which is one of the names of the internal winning combination. The internal winning combination with "132" in the part means that the correct push order is "left, right, middle", and the internal winning combination with "213" as part of the name of the internal winning combination. The combination means that the correct push order is "middle, left, right", and the internal winning combination with "231" as part of the name of the internal winning combination has the correct pressing order. It means that the order is "left, right, middle", and for the internal winning combination with "312" as part of the name of the internal winning combination, the correct push order is "right, left, middle". The internal winning combination, which has "321" as part of the name of the internal winning combination, means that the correct push order is "right, middle, left".

FIG. 205 (A) shows the correspondence between the internal winning combination and the symbol combination displayed as stopped in the combination in which the displayed symbol combination has no relation to the pressing order (non-pushing order combination). In the pachi-slot machine 1, when the non-pushing order combination is determined as the internal winning combination, any of the displayable symbol combinations shown in FIGS. 183 to 196 among the abbreviations of the symbol combinations associated with each other in FIG. 205 (A). Is displayed along the valid line. Of the non-pushing order combinations, the internal winning combinations "F_crown BB", "F_red BB", and "F_blue BB" are winning combinations in which so-called omissions occur, and the timing of the stop operation is accurate (so-called, so-called). When the push is accurate), one of the displayable symbol combinations shown in FIGS. 183 to 196 among the abbreviations of the symbol combinations shown in FIG. 205 (A) is displayed along the valid line. ..

FIG. 205 (B) shows the correspondence between the internal winning combination and the symbol combination displayed as stopped in the combination in which the displayed symbol combination is related to the pushing order (pushing order combination). Although the correspondence of the "pushing order bell" is omitted in FIG. 205 (B), the symbol combination to be displayed when the "pushing order bell" is determined as the internal winning combination will be described later. ..

As shown in FIG. 205 (B), the internal winning combination "6 choice maintenance lip" has a different symbol combination displayed according to the pressing order, and if the pressing order is correct, the combination name is "C_CU lip". Among the symbol combinations, any of the displayable symbol combinations shown in FIGS. 183 to 196 is displayed along the valid line. On the other hand, if the pressing order is not correct, one of the displayable symbol combinations shown in FIGS. 183 to 196 among the symbol combinations related to the combination name "C_BT lip" or "C_CT lip" is along the valid line. Is displayed.

The combination name "C_CU rip" means "C_CU rip_01" to "C_CU rip_09" other than the combination name "C_CD rip" in the abbreviation "diagonal replay" (see FIGS. 197 to 204). Further, the combination name "C_BT lip" means the combination names "C_BT lip_01" to "C_BT lip_09" in the abbreviation "parallel replay (RT1 transition symbol)", and the combination name "C_CT lip" is. , Refers to the combination names "C_CT rip_01" to "C_BT rip_06" in the abbreviation "parallel replay (RT1 transition symbol)".

Because the symbol combination related to the combination name "C_CU rip" displayed along the valid line when the push order is correct in the internal winning combination "6 choice maintenance rip" is a symbol combination that does not trigger the transition to the RT state. , "6 choice maintenance lip" is determined as an internal winning combination, and if the push order is correct, the RT state is maintained without shifting. On the contrary, the symbol combination related to the combination name "C_BT rip" or "C_CT rip" displayed along the valid line when the push order is not correct is the RT1 transition symbol, so "6 choices are maintained during infinite RT". If "Rip" is determined as the internal winning combination and the push order is incorrect, the RT state shifts to the RT1 state.

In addition, the internal winning combination "6 choice rush lip" has different symbol combinations displayed according to the pressing order, and if the pressing order is correct, the symbol combinations related to the abbreviation "Oyama Replay" are shown in FIGS. 183 to 183. Any of the displayable symbol combinations shown in FIG. 196 is displayed along the valid line. On the other hand, if the pressing order is not correct, one of the displayable symbol combinations shown in FIGS. 183 to 196 among the symbol combinations related to the combination name "C_BT lip" or "C_CT lip" is along the valid line. Is displayed.

The symbol combination related to the abbreviation "Oyama Replay" displayed along the valid line when the push order is correct in the internal winning combination "6 choice rush lip" is the RT4 transition symbol, and when the push order is not correct. The symbol combination related to the combination name "C_BT lip" or "C_CT lip" displayed along the valid line is the RT1 transition symbol. Therefore, if the "6 choice rush lip" is determined as the internal winning combination during infinite RT and the push order is correct, the RT state will shift to the RT4 state, and conversely, the push order will be incorrect. If the answer is correct, the RT state shifts to the RT1 state.

In addition, the internal winning combination "6 choice fall lip" has different symbol combinations displayed according to the push order, and if the push order is correct, the symbol combinations related to the abbreviation "C_CU lip" are shown in FIGS. 183 to 183. Any of the displayable symbol combinations shown in FIG. 196 is displayed along the valid line. On the other hand, if the push order is not correct, one of the displayable symbol combinations shown in FIGS. 183 to 196 among the symbol combinations related to the combination name "Oyama Replay" is displayed along the valid line.

The symbol combination related to the combination name "C_CU lip" displayed along the valid line when the push order is correct in the internal winning combination "6 choice fall lip" is a symbol combination that does not trigger the transition to the RT state. The symbol combination related to the combination name "Oyama Replay" displayed along the valid line when the pressing order is not correct is the RT4 transition symbol. Therefore, if the "6 choice fall lip" is determined as the internal winning combination during infinite RT and the push order is correct, the RT state will be maintained without shifting, and conversely, the push order. If is incorrect, the RT state shifts to the RT4 state.

In addition, the internal winning combination "3 choice promotion lip" has different symbol combinations displayed according to the pressing order, and if the pressing order is correct, FIG. 183 of the symbol combinations related to the abbreviation "strong chance lip". -One of the displayable symbol combinations shown in FIG. 196 is displayed along the valid line. On the other hand, if the pressing order is not correct, one of the displayable symbol combinations shown in FIGS. 183 to 196 among the symbol combinations related to the combination name "C_CU lip" or "C_BT lip" is along the valid line. Is displayed.

Since the symbol combination related to the abbreviation "strong chance lip" displayed along the valid line when the push order is correct in the internal winning combination "3 choice promotion lip" is the RT5 transition symbol, "3" during infinite RT. If the "selective promotion lip" is determined as the internal winning combination and the push order is correct, the RT state shifts to the RT5 state. On the other hand, among the symbol combinations displayed along the valid line when the push order is not correct, the symbol combination related to the combination name "C_CU lip" is a symbol combination that does not trigger the transition to the RT state, and is also a combination. The symbol combination according to the name "C_BT lip" or "C_CT lip" is an RT1 transition symbol. Therefore, if the "3-choice promotion lip" is determined as the internal winning combination during infinite RT and the push order is incorrect, the RT state may be maintained, and the RT state becomes the RT1 state. It may be migrated.

[Transition flow of game state considering whether or not the notification (ART) function is activated]
Subsequently, with reference to FIGS. 206 and 207, a transition flow of the gaming state in consideration of whether or not the notification (ART) function is activated will be described. In the present embodiment, the main control circuit 90 (main CPU 101) determines whether or not the function (ART function) for notifying a stop operation advantageous to the player is activated. Therefore, in the present embodiment, the activated / non-activated state of the ART function is also managed as the gaming state in the bonus non-operating state.

In the pachi-slot machine 1 of the present embodiment, in the non-bonus operating state, the main control circuit 90 sets the "normal state", "CZ (chance zone)" and "ART state" separately based on the presence or absence of notification (ART). (More specifically, as shown in FIG. 206, the precursor period and the preparation period for each gaming state are also managed as separate gaming states).

The normal state is a gaming state (non-navigation section) in which information on a stop operation advantageous to the player is not notified, and is a gaming state disadvantageous to the player. The normal state is any of the RT0 to RT5 states.

The CZ (chance zone) is a gaming state in which the probability of winning the ART lottery is higher than in the normal state, and is an advantageous gaming state for the player as compared with the normal state. In the pachi-slot machine 1 of the present embodiment, the CZ is composed of "first hit CZ" and "continuous CZ", and the continuous CZ is further composed of "CZ (after ART)" and "special CZ".

CZ is a game period of 10 games per set, but when the CZ is changed to the ART state, the remaining game period is extended by at least 5 games. As will be described later, in the pachi-slot machine 1, when the ART lottery is won during the CZ, the CZ is temporarily suspended and the game shifts to the ART state. Then, when the ART state ends after that, the suspended CZ is restarted. Further, when the ART lottery is won in the restarted CZ, the CZ is temporarily suspended to shift to the ART state, and the interrupted CZ is restarted after the end of the ART state.

At this time, each time the CZ shifts to the ART state, the remaining game period of the CZ is extended. Therefore, in the pachi-slot machine 1, the CZ and the ART state loop as long as the ART lottery in the CZ is won. The first hit CZ is the first CZ in such a loop between the CZ and the ART state, and the continuing CZ is the CZ used during the loop between the CZ and the ART state. That is, the loop between the CZ and the ART state starts from the first hit CZ, and when the ART lottery is won during the first hit CZ, it shifts to the ART state, and when this ART state ends, the continuous CZ and the ART state are changed thereafter. It will loop.

The first hit CZ is a CZ that shifts from a normal state (via a CZ precursor), and is a gaming state (non-navigation section) that does not notify information on a stop operation that is advantageous to the player. The first hit CZ is any of the RT0 to RT5 states.

The continuous CZ is a CZ that shifts from the ART state (without going through a precursor), and is a gaming state (navigation section) that notifies information on a stop operation that is advantageous to the player. The continuous CZ is basically either the RT4 state or the RT5 state. Of the continuous CZs, CZ (after ART) and special CZ have different probabilities of winning the ART lottery, and as will be described later, the special CZ wins the ART lottery more than the CZ (after ART). There is a high probability of doing it.

Further, the ART state is a gaming state (navigation section) for notifying information on a stop operation that is advantageous for the player, and is a gaming state that is advantageous for the player. Further, the ART state is basically either the RT4 state or the RT5 state. In the present embodiment, when the precursory game ends in the state of winning the ART and the RT state shifts to the RT4 state or the RT4 state, the ART state is started.

As shown in FIG. 206, the ART state includes "normal ART", "EP (episode)", and "ranking ART". Normally, ART is an ART state in which one set is 30 games, and after one set is completed, it always re-enters CZ (continuous CZ). The EP is a so-called additional special zone, and is a state in which the extension of the duration of the ART state is performed with a higher probability than the normal ART. In Pachislot 1 of the present embodiment, since the duration of the ART state is basically managed by the number of sets, the right of the ART state is granted with a high probability during EP (note that the right of the ART state is granted with high probability). , The rights in the ART state are stored in the main RAM 103, and when the rights in the ART state are granted, the granted number of rights are stored in the main RAM 103, and the gaming state is changed from the CZ or the normal state to the ART state. When shifting to, one right in the ART state stored in the main RAM 103 is erased).

The rank determination ART is a gaming state that is completed in the first game after the transition from the CZ to the ART state, and determines the rank during the normal ART that is performed thereafter. Although the details will be described later, the rank during normal ART is information that affects various additions during normal ART (for example, addition of the number of sets in the ART state and addition of the number of CZ games), and is a high rank. The more you can add, the more preferential treatment you have.

As shown in FIGS. 206 and 207, when the CZ lottery described later is won in the normal state and the number of CZ precursor games of one or more games is determined (when the transition condition (A1) is satisfied), the main control circuit 90 shifts the gaming state from the normal state to the CZ precursor. The CZ precursor is a precursor period performed before the transition to the CZ, and when the number of CZ precursor games is exhausted in the CZ precursor (when the transition condition (A2) is satisfied), the main control circuit 90 changes the gaming state to the CZ. Shift from the precursor to the first hit CZ.

Further, when the ART lottery described later is won in the first hit CZ, if the RT state in the winning game is a low RT state (RT0 to RT3 state) (when the transition condition (B1) is satisfied), the main control circuit 90 Shifts the gaming state from the first hit CZ to ART preparation. During the ART preparation, it is a preparation period for shifting the game state to the ART state after winning the ART lottery, and information on the stop operation required for shifting the RT state to the high RT state (RT4 or RT5 state) is provided. Be notified. As a result of this notification, when the RT state shifts to the high RT state (when the transition condition (B2) is satisfied), the main control circuit 90 shifts the gaming state from ART preparation to rank determination ART.

On the other hand, in the first hit CZ, when the RT state in the game won by the ART lottery is a high RT state (when the transition condition (B3) is satisfied), the main control circuit 90 ranks the game state from the first hit CZ. Decide to move to ART. Further, when the first hit CZ ends without winning the ART lottery (when the transition condition (B4) is satisfied), the main control circuit 90 shifts the gaming state from the first hit CZ to the normal state.

Further, the ART lottery is performed even in the normal state, and when the ART lottery is won in the normal state and the number of ART precursor games of one or more games is determined (when the transition condition (C1) is satisfied), the main control is performed. The circuit 90 shifts the gaming state from the normal state to the ART precursor. The ART precursor is a precursor period performed before the transition to the ART state. When the number of ART precursor games is exhausted in the ART precursor, when the RT state in the game in which the number of ART precursor games is digested is the low RT state (when the transition condition (C2) is satisfied), the main control circuit 90 , When the game state is changed from the ART precursor to the ART preparation, and the RT state in the game in which the number of ART precursor games is exhausted is the high RT state (when the transition condition (C3) is satisfied), the main control circuit 90 Shifts the game state from the ART precursor to the rank determination ART.

As shown in FIGS. 206 and 207, in the pachi-slot machine 1 of the present embodiment, the CZ precursor and the ART precursor may pass through when shifting from the normal state to the CZ or ART state, while the CZ to ART. There is no way to go through when shifting from the state or ART state to CZ.

Subsequently, the rank determination ART is completed in one game, and when one game is played, the game shifts to another gaming state based on the rank in the normal ART determined during the rank determination ART. Specifically, when the rank determined during the rank determination ART is 3 or less (when the transition condition (D) is satisfied), the main control circuit 90 shifts the gaming state from the rank determination ART to the normal ART. ..

Further, when the rank determined during the rank determination ART is 4 and the RT state at the end of the rank determination ART is the RT4 state (when the transition condition (E1) is satisfied), the main control circuit 90 determines. Rank the game status and shift from ART to EP preparation. During EP preparation, it is a preparation period for shifting the RT state to the RT5 state when shifting from the rank determination ART to the EP (EP is a gaming state performed during the RT5 state), and the EP is being prepared. When the RT state shifts to the RT5 state (when the transition condition (E2) is satisfied), the main control circuit 90 shifts the gaming state from EP preparation to EP. On the other hand, when the rank determined during the rank determination ART is 4 and the RT state at the end of the rank determination ART is the RT5 state (when the transition condition (E3) is satisfied), the main control circuit 90 determines. Rank the game status and shift from ART to EP.

Further, in the normal ART, when the "three-choice promotion lip" is determined as the internal winning combination during the navigation high accuracy and the game shifts to the RT5 state (when the transition condition (F) is satisfied), the main control circuit 90 Shifts the gaming state from normal ART to EP. In addition, in the game in which "3-choice promotion lip" is determined as the internal winning combination, the symbol combination related to the abbreviation "strong chance lip (RT5 transition symbol)" is displayed along the valid line when the push order is correct, and the RT state is displayed. While shifting to the RT5 state, the RT state does not shift to the RT5 state when the push order is incorrect. As will be described later, during normal ART, during navigation high accuracy, when "3-choice promotion lip" is determined as an internal winning combination, the correct push order is notified, while during non-navigation high accuracy, " When "3 choice promotion rip" is determined as an internal winning combination, the push order of incorrect answers (the push order in which the symbol combination related to the combination name "C_CU rip" is displayed) is notified. Therefore, as long as the notification of the push order during the ART state is followed, the RT state does not shift to the RT5 state during the non-navigation high accuracy, and the RT5 state is not followed during the non-navigation high accuracy. If the transition has occurred, the transition condition (F) is not satisfied because the navigation is not highly accurate, so that the gaming state does not shift to EP during the non-navigation high accuracy.

Further, in the EP, when the "six-choice fall lip" without guarantee is determined as the internal winning combination and the game shifts to the RT4 state (when the transition condition (G) is satisfied), the main control circuit 90 determines. The gaming state is changed from EP to normal ART. In addition, in the game in which "6 choice fall lip" is determined as the internal winning combination, the symbol combination related to the abbreviation "Oyama replay (RT4 transition symbol)" is displayed along the valid line when the push order is incorrect, and the RT state is displayed. While shifting to the RT4 state, the RT state does not shift to the RT4 state when the push order is correct. As will be described later, during the EP, if there is a guarantee to avoid falling to the RT4 state, the correct push order will be notified at the time of winning the "6 choice fall lip", but if there is no guarantee, " At the time of winning the "6 choice fall lip", neither the correct answer nor the incorrect answer is notified (that is, the push order itself is not notified). Therefore, during the EP without guarantee, you can continue the EP by hitting the correct push order by yourself at the time of winning the "6 choice fall lip", and conversely, if the push order becomes incorrect, The game state shifts from EP to normal ART.

Further, when the number of games of the normal ART is exhausted and one set of normal ART is completed (when the transition condition (H) is satisfied), the main control circuit 90 shifts the gaming state from the normal ART to the continuous CZ.

Further, when the transition condition (I) is satisfied in the continuous CZ, the main control circuit 90 shifts the gaming state from the continuous CZ to the normal ART. Here, the ART lottery is performed during the continuous CZ, and the transition condition (I) is satisfied when the ART lottery is won. Further, as will be described later, in the pachi-slot machine 1 of the present embodiment, the number of sets in the ART state may be added (stock), and if the stock of the number of sets remains at the end of the continuous CZ, the stock is released. And the game state shifts from continuous CZ to normal ART. Therefore, the transition condition (I) for shifting from the continuous CZ to the normal ART is either to win the ART lottery during the continuous CZ or to release the stock of the number of sets in the ART state. It holds when it is satisfied.

On the other hand, if the number of games in the continuous CZ is exhausted without the transition condition (I) being satisfied (when the transition condition (J) is satisfied), the main control circuit 90 keeps the gaming state from the continuous CZ. Move to the normal state. The pachi-slot machine 1 of the present embodiment has a special playability when shifting from the continuous CZ (the same applies to the first hit CZ) to the normal state, and the details of this point will be described later with reference to FIG. 210.

In addition, when the combination related to the bonus (“F_crown BB”, “F_red BB” or “F_blue BB”) is determined as the internal winning combination during the specific state (when the transition condition (K1) is satisfied), the main control The circuit 90 shifts the gaming state from the specific state to the normal flag. The specific state is either a normal state, a CZ precursor state, or an ART precursor state. Further, when the winning combination related to the bonus is won between the normal flags and the bonus is activated (when the transition condition (K2) is satisfied), the main control circuit 90 shifts the gaming state from between the normal flags to the normal BB. Then, when a predetermined number of medals are paid out in the normal BB and the operation of the bonus is completed (when the transition condition (K3) is satisfied), the main control circuit 90 shifts the gaming state from the normal BB to the specific state. The specific state of transition from the normal BB is the gaming state in which the player stayed when the transition condition (K1) was satisfied.

Further, when the ART lottery described later is won between the normal flags (when the transition condition (L) is satisfied), the main control circuit 90 shifts the gaming state from between the normal flags to between the flags during ART. Similarly, when the ART lottery described later is won in the normal BB (when the transition condition (M) is satisfied), the main control circuit 90 shifts the gaming state from the normal BB to the BB during ART.

Further, when the winning combination related to the bonus is determined as the internal winning combination during the predetermined state (when the transition condition (N1) is satisfied), the main control circuit 90 shifts the gaming state from the predetermined state to the ART flag. The predetermined state is any of CZ (first hit CZ and continuous CZ), ART preparation, rank determination ART, normal ART, EP precursor, and EP. Further, when the winning combination related to the bonus is won and the bonus is activated between the flags during ART (when the transition condition (N2) is satisfied), the main control circuit 90 shifts the gaming state from between the flags during ART to BB during ART. .. Then, when the specified number of medals are paid out in the BB during ART and the operation of the bonus is completed (when the transition condition (N3) is satisfied), the main control circuit 90 shifts the gaming state from the BB during ART to the preparation for ART. ..

As shown in FIG. 206, among the plurality of gaming states, the normal state, the CZ precursor, the ART precursor, and the first hit CZ are game states (non-navigation sections) in which the player is not notified of the stop operation information. Further, during the preparation for ART, the rank determination ART, the normal ART, the EP precursor, and the continuous CZ are game states (navigation sections) for notifying the player of the stop operation information. In addition, during EP, it is basically a navigation section, but it is treated as a non-navigation section only at the time of winning the "6 choice fall lip" when there is no guarantee.

Here, referring to FIG. 205 (B), in the navigation section, when the "6 choice maintenance lip" or the "6 choice rush lip" is determined as the internal winning combination, the correct push order is given to the player. Be notified. On the other hand, even in the navigation section, if the "three-choice promotion lip" is determined as the internal winning combination, the stop operation information that notifies depending on whether the navigation is highly accurate or non-navigating is provided. different. Specifically, during the navigation high accuracy in the navigation section, when the "three-choice promotion lip" is determined as the internal winning combination, the correct push order is notified and the symbol combination related to the abbreviation "strong chance lip" is displayed. In the non-navigation high accuracy in the navigation section, when "3 choice promotion lip" is decided as the internal winning combination, the symbol combination related to the combination name "C_CU lip" in the push order of incorrect answers is displayed. Notify the push order to be performed.

In addition, the push order notified at the time of winning the "6 choice fall lip" differs depending on whether or not there is a guarantee of fall avoidance during EP, and when there is a guarantee (navigation section), the correct push order is notified and the combination name "C_CU" is notified. It prompts the display of the symbol combination related to "Rip", and does not notify any push order when there is no guarantee (non-navigation section). Whether or not there is a guarantee of fall avoidance during EP is managed based on the fall mode described later.

[Correspondence between internal winning combination and lottery flag]
Subsequently, the details of the flow of the game in the pachi-slot machine 1 of the present embodiment will be described. Here, in the pachi-slot machine 1, various lottery is performed based on the internal winning combination and the like, but in the following, various lottery is performed after converting the internal winning combination into a lottery flag. FIG. 208 is a diagram showing the correspondence between the internal winning combination and the lottery flag. In the pachi-slot machine 1 of the present embodiment, various lottery may be performed at the start of reel rotation (at the start) or at the time of reel stop. FIG. 208 (A) shows the correspondence between the lottery flag used for various lottery performed at the start and the internal winning combination, and FIG. 208 (B) shows the lottery flag used for various lottery performed at the start or when the reel is stopped. Shows the correspondence with the internal winning role.

As shown in FIG. 208 (A), the lottery flag used for various lottery performed at the start is determined from the internal winning combination. For example, the internal winning combination "pushing order bell" and "F_common bell" correspond to the lottery flag "bell". Further, "out of BB (CBB or NBB)" corresponds to the lottery flag "bell out of A", and the internal winning combination "F_BB medium weak cherilip" corresponds to the lottery flag "bell out of B".

Subsequently, as shown in FIG. 209 (B), the lottery flag used for various lottery performed when the reels are stopped is determined from the symbol combination displayed along the effective line when the reels are stopped. As described above, the pachi-slot machine 1 of the present embodiment is provided with push order combinations in which the symbol combinations displayed according to the push order are different, and in such push order combinations, until the player actually performs the stop operation. , It is not possible to grasp the symbol combination displayed on the pachislot 1 side. Therefore, in the pachi-slot machine 1, the lottery flag is changed according to the displayed symbol combination (in other words, whether or not there is a correct answer in the pushing order) for a part of the pushing order combination.

During the navigation section such as the ART state, the player is notified of the stop operation information (pushing order), so that the pachislot 1 side grasps in advance the symbol combination to be displayed when the pushing order combination is won. can do. Therefore, as shown in FIG. 209 (B), in the pachi-slot machine 1, a part of the push order combination and the corresponding lottery flag are made different between the navigation section and the non-navigation section. In the pachislot 1, various lottery is performed when the reels are stopped during the non-navigation section where the symbol combination to be displayed (should be displayed) cannot be grasped in advance on the pachislot 1 side, and during the navigation section where the pachislot 1 side can grasp in advance. , Various lottery will be done at the start.

As shown in FIG. 209 (B), in the non-navigation section, the lottery flag "weak chance lip" corresponds to the internal winning combination "6 choice rush lip" when the push order is correct, and the lottery is done when the push order is incorrect. The flag for "normal lip" corresponds. In addition, the internal winning role "6 choice rush rip" corresponds to the lottery flag "weak chance rip" in the navigation section. As will be described later, in various lottery, the lottery flag "weak chance lip" is given preferential treatment to the lottery flag "normal lip".

Here, the internal winning combination "6 choice rush lip" is a winning combination that triggers a transition from the RT2 state to the RT4 state when the push order is correct, but the lottery flag used for various lottery is when the push order is correct (RT4). "Weak chance rip" corresponds to (shift to state), and "normal rip" corresponds to when the push order is incorrect (maintained in RT2 state), so the corresponding lottery flag and RT state are both when the push order is correct. Is given preferential treatment.

In addition, in the non-navigation section, the internal winning combination "6 choice fall rip" corresponds to the lottery flag "normal rip" when the push order is correct, and the lottery flag "weak chance rip" corresponds to the push order incorrect answer. do. In addition, the internal winning role "6 choice fall rip" corresponds to the lottery flag "weak chance rip" in the navigation section.

Here, the internal winning combination "6 selection fall lip" is a winning combination that triggers a transition (fall) from the RT5 state to the RT4 state when the push order is incorrect, but the lottery flags used for various lottery are the push order. When the answer is correct (maintained in RT5 state), "normal rip" is supported, and when the answer is incorrect (falls to RT4 state), "weak chance rip" is supported. The correct answer is given preferential treatment over the correct answer. On the other hand, since the RT state falls from the RT5 state to the RT4 state, from the viewpoint of the RT state, the correct answer in the push order is given preferential treatment over the incorrect answer in the push order.

Next, in the non-navigation section, the lottery flag "strong chance lip" corresponds to the internal winning role "3 choice promotion lip" when the push order is correct, and the lottery flag "normal lip" corresponds to the push order incorrect answer. handle. In addition, the internal winning combination "3 choice promotion lip" has different lottery flags depending on whether the navigation is highly accurate or non-navigation high accuracy during the navigation section, and the lottery flag is used when the navigation is highly accurate during the navigation section. "Strong chance rip" corresponds, and when the non-navigation is highly accurate during the navigation section, the lottery flag "normal rip" corresponds. As will be described later, in various lottery, the lottery flag "strong chance lip" is given preferential treatment to the lottery flag "normal lip".

Here, the internal winning combination "3-choice promotion lip" is a winning combination that triggers a transition (promotion) from the RT4 state to the RT5 state when the push order is correct, but the lottery flag used for various lottery is the push order correct answer. Since "strong chance rip" corresponds to the time (promoted to RT5 state) and "normal rip" corresponds to the wrong answer in the push order (maintain in the RT4 state), both the corresponding lottery flag and the RT state are the correct answer in the push order. Time is given preferential treatment.

[Playability during each game state]
Subsequently, with reference to FIGS. 209 to 214, the flow of the game during the typical game state in the pachi-slot machine 1 will be described.

<Playability in normal state>
First, the flow of the game in the normal state will be described with reference to FIG. 209. In the pachi-slot machine 1 of the present embodiment, the game is played aiming at the ART state during the normal state. The transition from the normal state to the ART state is a pattern of transitioning from the normal state to the ART state via CZ (see FIG. 209 (A)) and a pattern of directly shifting from the normal state to the ART state (FIG. 209 (B)). There are two patterns with (see).

In the pattern of shifting from the normal state to the ART state via the CZ with reference to FIG. 209 (A), the main control circuit 90 performs a CZ lottery during the normal state, and when the CZ lottery is won, the game state is normally changed. The game state is maintained in the normal state unless the state is shifted to the CZ (via the CZ precursor) and the CZ lottery is won. In the pachi-slot machine 1, while the main control circuit 90 is in the normal state, a CZ lottery based on the lottery flag “bell” (see FIG. 209 (A-1)) and a CZ lottery based on a lottery flag other than the bell (FIG. 209 (FIG. 209)). A-2)) is performed.

As shown in FIG. 209 (A-1), the pachi-slot machine 1 has four stages of mode 1, mode 2, mode 3 and mode 4 as modes in the normal state, and the main control circuit 90 has a main control circuit 90. , When the lottery flag is "bell", CZ lottery is performed based on the current mode. Of the four modes, the probability of winning a CZ lottery based on the lottery flag "bell" is lowest in mode 1, next lowest in mode 2, next lowest in mode 3, and highest in mode 4. ..

Further, as shown in FIG. 209 (A-2), the pachi-slot machine 1 has three stages of lottery states of low accuracy, high accuracy, and ultra-high accuracy as the lottery state in the normal state, and the main control circuit 90. Performs a CZ lottery based on the lottery flag and the current lottery state when the lottery flag is other than the bell. Of the three stages of lottery, the probability of winning a CZ lottery based on a lottery flag other than the bell is lowest for low accuracy, next for high accuracy, and highest for ultra-high accuracy.

The main control circuit 90 performs CZ lottery based on the lottery flag and the mode or the lottery state while shifting the mode and the lottery state at various triggers during the normal state. As a result, if the CZ lottery is won during the normal state, the game state is shifted from the normal state to the CZ (via the CZ precursor), and if the CZ lottery is not won, the game state is maintained in the normal state.

Further, as shown in FIGS. 209 (B-1) and 209 (B-2), two patterns are provided for the pattern of directly shifting from the normal state to the ART state. In the first pattern of directly shifting to the ART state, as shown in FIG. 209 (B-1), the main control circuit 90 performs ART lottery based on the lottery flag, the lottery state, and the like during the normal state. As a result, when the ART lottery is won, the game state is changed from the normal state to the ART state (via ART precursor and ART preparation), and if the ART lottery is not won, the game state is maintained in the normal state.

On the other hand, in the second pattern of directly shifting to the ART state, the main control circuit 90 grants the stock of the ART state when the RT state shifts to the RT3 state without performing the ART lottery, and then changes the gaming state. Transition from the normal state to the ART state (via ART precursor and ART preparation).

Here, as described above, the RT3 state shifts to the RT3 state when the symbol combination related to the abbreviation "Cherip", which is the RT3 transition symbol, is displayed during the infinite RT state. Referring to FIG. 205, the symbol combination related to the abbreviation "Cherip" is not displayed when "F_weak chelip" is displayed as an internal winning combination in the game and other combinations are determined as the internal winning combination. Further, referring to FIG. 180, in the infinite RT state, "F_weak chelip" is determined as an internal winning combination with a low probability (32/65536) during the RT2 state, and other infinite RT states (RT0 state, RT4 state and During the RT5 state), it is not determined as an internal winning combination, so that the RT3 state may be transferred only from the RT2 state and not from other RT states (see FIG. 178).

Therefore, in the second pattern of directly shifting to the ART state, the main control circuit 90 shifts the gaming state from the normal state to the ART state when the RT state shifts from the RT2 state to the RT3 state. In the RT1 state, which is a finite RT state, "F_weak chelip" is determined as an internal winning combination with a moderate probability (874/65536) (see FIG. 180), but the abbreviation "weak chelip" is used in the RT1 state. Even if the symbol combination according to "" is displayed, the RT1 state is a finite RT state, so that the RT3 state does not shift.

Further, during the RT3 state, "F_weak chelip" is determined as an internal winning combination with a high probability (18752/65536) (see FIG. 180). Therefore, when the RT3 state can be entered, the symbol combination related to the abbreviation "weak chelip" is frequently displayed. From the player's point of view, the frequent display of the symbol combinations related to the abbreviation "weak chelip" gives them a sense of expectation that they are in the RT3 state, that is, that the stock in the ART state is given. Become. As described above, in the pachi-slot machine 1 of the present embodiment, when a specific symbol combination is frequently displayed, it is possible to have a feeling of expectation that the privilege of stock in the ART state is given.

It should be noted that the start timing of the ART precursor is arbitrary when the state shifts to the ART state due to the shift to the RT3 state. That is, the gaming state may be changed from the normal state to the ART precursor when the RT3 state is entered, and the gaming state may be changed from the normal state to the ART precursor when an arbitrary number of games elapses during the RT3 state. Alternatively, the game state may be changed from the normal state to the ART precursor when the RT3 state is changed to the RT0 state.

<Playability in CZ>
Subsequently, the flow of the game in the CZ will be described with reference to FIGS. 210 and 211.

As shown in FIG. 210 (A), in the pachi-slot machine 1 of the present embodiment, an ART lottery is performed during the CZ, and when the ART lottery is won, the CZ is temporarily suspended and the state shifts to the ART state. Then, when the ART state ends, the suspended CZ is restarted, and the ART lottery is performed again. In this way, in pachislot 1, during CZ, the CZ and the ART state loop as long as the number of CZ games remains.

In addition, if the ART lottery is not won in the final game of CZ, the CZ will end, but depending on the stock status of the number of sets in the ART state, the stock may remain at the end of the final game of the CZ. be. In pachislot 1, even if the ART lottery is not won in the final game of CZ, if there is a stock of the number of sets in the ART state, one stock is released and the game state is shifted to the ART state. At this time, with the transition from the CZ to the ART state, the number of remaining games in the CZ is extended by at least 5 games, and as a result, the CZ and the ART state are looped thereafter, and the stock of the number of sets in the ART state is obtained. As long as is left, the stock will be released at the end of the final game of CZ, resulting in a loop between the CZ and the ART state.

On the other hand, in the final game of CZ, if the ART lottery is not won and there is no stock of the number of sets in the ART state, the CZ ends and the gaming state shifts to the normal state. At this time, in the pachi-slot machine 1 of the present embodiment, the ART lottery (one crying) is performed with a higher probability than the second and subsequent games only in the first game in the normal state after the end of the CZ. When the ART lottery performed in the first game after the end of the CZ is won, the game state is shifted to the ART state, and when the game is not won, the game state is maintained in the normal state. Also, even if the ART state is entered by winning the ART lottery performed in the first game after the end of the CZ, the number of remaining games in the CZ is extended by at least 5 games, and as a result, the CZ and the ART state are subsequently changed. As a result of the subsequent stock release of the final game of CZ and one ART lottery of crying, the CZ and the ART state will loop.

Here, as described above, in the present embodiment, the CZ transitioned from the normal state is referred to as an initial hit CZ, and the CZ after returning from the ART state during the loop between the CZ and the ART state is referred to as a continuous CZ. Next, the outline of the first hit CZ and the outline of the continuous CZ will be described.

As shown in FIG. 210 (B), during the first hit CZ, the trigger for shifting to the ART state differs depending on the number of remaining games of the CZ, and the first hit CZ is a lottery when the number of remaining games of the CZ is 1 or more. It is composed of a phase A and a lottery phase B when the number of remaining games in the CZ is 0. Further, as shown in FIG. 210 (C), the continuous CZ has a transition opportunity of shifting to the ART state by ART lottery and shifting to the ART state by releasing stock, and the continuous CZ is in the continuous CZ. It is composed of a lottery phase A to be performed in 1 and a release phase D when the number of remaining games in CZ is 0.

In the first game after the end of CZ, one ART lottery for crying is performed. For convenience, this one ART lottery for crying is called a lottery phase C (lottery phase C is ART in a normal state). It is a lottery and does not constitute a CZ).

Subsequently, an outline of each of these phases will be described with reference to FIG. 211 (D). The lottery phases A, B, and C are phases in which the ART lottery is performed based on the lottery flag and the like, and when the ART lottery is won, the game state shifts to the ART state and the number of remaining games in the CZ. Is extended (added) by at least 5 games. On the other hand, in the case of non-winning in this ART lottery, CZ continues as long as the number of CZ games remains, and when the number of CZ games does not remain, the state shifts to the normal state. In the pachi-slot machine 1 of the present embodiment, even if the ART lottery is won in the lottery phase C (one crying after the end of the CZ), the number of remaining games in the CZ is extended (added) by at least 5 games. As a result, when the ART lottery is won in the lottery phase C, the loop between the CZ and the ART state continues thereafter.

Further, the release phase D is a phase in which one stock held is released when the ART lottery is not won in the final game of the continuous CZ and there is a stock of the number of sets in the ART state. In the release phase D, when the stock of the number of sets in the ART state remains, the game state is shifted to the ART state, and the remaining number of games in the CZ is extended (added) by at least 5 games. On the other hand, in the release phase D, if there is no stock of the number of sets in the ART state (because the number of remaining games in the CZ is 0), the ART based on one lottery phase C of crying is used for the next game. A lottery will be held.

In the pachi-slot machine 1 of the present embodiment, a plurality of sets in the ART state may be stocked in one winning in the lottery phases A, B, and C. In this case, only the first stock will be released according to the winning of the ART lottery, and the remaining stock will be released in the release phase D.

Subsequently, a method for determining the type of continuous CZ will be described with reference to FIG. 211 (E). As described above, the pachi-slot machine 1 has a CZ (after ART) and a special CZ as continuous CZs. When the main control circuit 90 shifts from the CZ to the ART state (more specifically, during the rank determination ART (see FIG. 254)), the main control circuit 90 draws the type of the continuous CZ after returning from the ART state. As a result, if the special CZ is not won, the continuous CZ after returning from the ART state becomes the CZ (after ART), and if the special CZ is won, the continuous CZ after returning from the ART state becomes the special CZ.

Here, the CZ will continue for the number of CZ games, but if the special CZ is won and the continuous CZ becomes the special CZ, the main control circuit 90 will use the remaining number of CZ games up to that point as the special CZ. Set as the number of remaining CZ games. During the special CZ, the ART lottery is won with a higher probability than the CZ (after ART). Therefore, in Pachislot 1, if the special CZ is won in the lottery of the continuous CZ type, the value of the remaining CZ games will increase. ..

In addition, when the special CZ is won, "the number of remaining CZ games up to that point is set as the number of remaining CZ games of the special CZ" means that the number of remaining CZ games up to that point is set as the number of remaining CZ games of the special CZ. In this case, the number of remaining CZ games up to that point may be cleared (set to 0), and the number of remaining CZ games may be used as the number of remaining CZ games of the special CZ while maintaining the number of remaining CZ games up to that point. It may be set. In the former case, the number of remaining CZ games up to that point is cleared, so the total number of remaining games in the CZ at the time of winning the special CZ is only the number of CZ games in the special CZ, and in the latter case, up to that point. Since the number of remaining CZ games is also maintained, the total number of remaining CZ games at the time of winning the special CZ is the sum of the number of normal (CZ (after ART)) CZ games and the number of special CZ CZ games.

Subsequently, FIG. 211 (F) is a diagram showing a flow in the special CZ. As described above, the continuous CZ is composed of a lottery phase A and a release phase D. Once the special CZ is entered during the loop between the CZ and the ART state, as shown in FIG. 211 (F), as long as the special CZ is changed to the ART state due to the ART lottery of the lottery phase A in the subsequent special CZ. The continuous CZ is maintained as a special CZ. When the ART state is entered due to the ART lottery of the lottery phase A during the special CZ, the number of CZ games is added (at least 5 games) to the remaining number of games of the special CZ.

On the other hand, when the special CZ shifts to the ART state due to the stock release in the release phase D, the special CZ ends and the continuous CZ is rewritten to CZ (after ART). In this way, when the ART state is entered due to the stock release of the release phase D during the special CZ, the addition of the number of CZ games (minimum 5 games) is the normal (after CZ (after ART)) number of remaining CZ games. Will be done.

<Playability during ART>
Subsequently, the flow of the game in the ART state will be described with reference to FIGS. 212 and 213.

As shown in FIG. 212 (A), the ART state is composed of a rank-determining ART, a normal ART, and an EP. The rank determination ART is a game state that is completed in one game, the normal ART is a game state in which 30 games are set as one set, and the EP is a so-called additional special zone, which continues until it falls to the RT4 state. It is in a game state. During the ART state, while the number of ART games remains, the game is usually played with the aim of shifting from ART to EP. On the other hand, when the number of ART games is exhausted, the game state shifts from the ART state (normal ART) to the continuous CZ.

Normally, during ART, "low accuracy", "high accuracy", and "ultra-high accuracy" are provided as the lottery state during ART, and the ease of transition to EP is controlled according to the lottery state during ART. .. As shown in FIG. 212 (B), the lottery state during ART is uniquely determined according to the rank determined in the rank determination ART. Here, with reference to FIG. 212 (B), a lottery state during ART, that is, a method of determining the rank of ART will be described.

As shown in FIG. 212 (B), the main control circuit 90 tentatively determines the rank of ART at the time of winning the ART lottery. The tentative determination of the rank at the time of ART winning is performed based on the lottery flag (internal winning combination) at the time of winning the ART lottery, for example, the lottery flag (so-called strong) with a low probability of being determined as the internal winning combination. If you win the ART lottery based on the role of rare), it is easy to determine a high rank.

As described above, in the pachi-slot machine 1 of the present embodiment, a plurality of sets in the ART state may be stocked at one winning. When a plurality of sets in the ART state are stocked in one win, the main control circuit 90 determines the rank for each stock. As will be described later, the main control circuit 90 determines the rank of the first stock based on the lottery flag at the time of ART winning, and uses the lottery flag for the second and subsequent stocks. The rank is determined without limitation, but the rank is not limited to this, and the rank may be determined for the second and subsequent stocks based on the lottery flag at the time of winning the ART.

When the rank is determined (tentatively determined) for each stock at the time of winning the ART, the main control circuit 90 performs a promotion lottery of the rank tentatively determined at the time of winning in the ranking determination ART that shifts when the stock is released, and the ART Confirm the rank. The promotion lottery of this rank is performed based on the lottery flag in the rank determination ART that is completed in one game, for example, based on the lottery flag (so-called strong rare role) with a low probability of being determined as the internal winning combination. When the ART lottery is won, the rank is easily promoted.

For the promotion lottery during the rank determination ART, one of "rank maintenance", "rank +1", "rank +2", and "rank +3" is determined, and the main control circuit 90 promotes the rank tentatively determined at the time of winning the ART. It will be updated according to the lottery result. In this embodiment, the maximum rank is "Rank 4", so if the result of the promotion lottery is "Rank 4" or higher, it is set to "Rank 4".

As described above, in the pachi-slot machine 1 of the present embodiment, the rank of the ART is tentatively determined at the time of winning the ART, and in the first game (rank determination ART) at the start of the ART state, the tentatively determined rank is changed to the rank in the ART (during ART). The lottery state) is confirmed. In other words, in the pachi-slot machine 1 of the present embodiment, at the time of winning the ART, a rank having a width is determined as a rank in the ART, and then a specific rank is given from the rank having a width in the first game of the start of the ART state. Determine the rank. In the promotion lottery during the rank determination ART, at least "rank maintenance" is determined. Therefore, in the present embodiment, the rank tentatively determined at the time of winning the ART has a width only in the upward direction. Of course, if a lottery result (for example, "Rank-1") that lowers the rank in the promotion lottery is adopted, the rank tentatively determined at the time of winning the ART can be given a downward width.

Rank determination As a result of the promotion lottery during ART, when the rank during ART is confirmed, the lottery state during ART is uniquely determined from the confirmed rank. Specifically, when the confirmed rank is "Rank 1", the lottery state during ART is "low probability", and when the confirmed rank is "Rank 2", the lottery state during ART is "high probability". If the confirmed rank is "Rank 3", the lottery state during ART is "Ultra High Accuracy", and if the confirmed rank is "Rank 4", the lottery state during ART is "Ultra High Accuracy". And one stock of EP is given. If the confirmed rank is "Rank 4", it will be transferred to EP after the rank determination ART (see the transition conditions (E1) (E2) or (E3) in FIG. 206).

In the pachi-slot machine 1 of the present embodiment, the rank of the ART and the lottery state are suggested, and the player is made interested in the subsequent game (one set of normal ART). In this regard, with reference to FIG. 212 (C), the outline of the effect suggesting the rank of ART and the lottery state will be described.

In the pachi-slot machine 1, the sub-control circuit 200 displays a weapon according to the weapon rank at the time of transition to the ART state, thereby suggesting a rank having a range at the time of winning the ART. Specifically, in this embodiment, as weapons according to the weapon rank, video data corresponding to "weapon S", "weapon A", "weapon B", "weapon C", and "weapon D" are provided in descending order of weapon rank. The weapon rank is determined from the rank at the time of ART winning, and the image corresponding to the weapon rank is displayed. Although details of the correspondence between the rank at the time of winning the ART and the weapon rank are omitted, the sub-control circuit 200 draws the weapon rank with a probability according to the rank at the time of winning the ART, and according to the winning weapon rank. By displaying the displayed image, the rank at the time of winning the ART is suggested at the time of transition to the ART state.

For example, when "Rank 1" is tentatively determined at the time of winning the ART, the sub-control circuit 200 draws "Weapon C" or "Weapon D" having a low weapon rank with a high probability, and also at the time of winning the ART. If "Rank 4" is tentatively decided, on the contrary, "Weapon S" with a high weapon rank is drawn with a high probability.

In addition, as shown in FIG. 212 (C), video data corresponding to the weapon ranks "weapon?" And "weapon?" (That is, it does not suggest the rank at the time of winning ART).

In this regard, in the pachislot 1 of the present embodiment, when the sub-control circuit 200 shifts to the ART state (shifts from the lottery phases A, B, C to the ART state) when the ART lottery is won, the "weapon S" is used. By displaying the image corresponding to "Weapon D", the rank at the time of winning the ART is suggested, and when shifting to the ART state (shifting from the release phase D to the ART state) when the stock is released, " By displaying the image according to "Weapon?", The rank at the time of winning the ART is not suggested. The stock in the ART state released in the release phase D is the second and subsequent stocks when multiple stocks are made in one win during CZ, the stocks in the stock lottery in the ART state, and the like. be.

Further, the sub-control circuit 200 suggests the lottery state during ART based on the effect stage during normal ART. Specifically, when the lottery state is "low accuracy (rank 1)", the sub-control circuit 200 adopts stage 1 (daytime stage) as the staging stage during normal ART, and the lottery state is "high". If it is "certain (rank 2)", stage 2 (evening stage) is usually adopted as the production stage during ART, and if the lottery state is "ultra-high accuracy (ranks 3 and 4)", it is normal. Stage 3 (night stage) will be adopted as the production stage during ART.

Subsequently, a method of migrating from normal ART to EP will be described with reference to FIG. 212 (D). As mentioned above, during normal ART, when the "3-choice promotion lip" is determined as the internal winning combination, the symbol combination related to the correct push order (abbreviation "strong chance lip (RT5 transition symbol)" is displayed. There is a navigation high accuracy middle that notifies the push order) and a non-navigation high accuracy middle that notifies the push order of the incorrect answer (the push order in which the symbol combination related to the combination name "C_CU lip" is displayed). When "3 choice promotion lip" is determined as an internal winning combination during navigation high accuracy and the symbol combination related to the abbreviation "strong chance lip" is displayed according to the notified push order, the game state is usually changed from ART to EP. (See the transition condition (F) in FIG. 206).

Here, the navigation high accuracy middle and the non-navigation high accuracy middle are controlled based on the number of navigation high accuracy games. Specifically, the main control circuit 90 normally performs a lottery (acquisition lottery) for granting a number of highly accurate navigation games according to the lottery state during ART and the lottery flag (see FIG. 241 described later). , When the number of navigation high accuracy games is given by this lottery, the navigation high accuracy is in progress during the given number of games. The number of navigation high-accuracy games is subtracted by 1 for each game during navigation high accuracy, and when the number of navigation high-accuracy games becomes 0, non-navigation high-accuracy is achieved.

Here, since both the normal ART period and the navigation high accuracy period are managed by the number of games, the number of navigation high accuracy games may remain at the end of the normal ART. For example, if the number of remaining games in the normal ART is 3 and 5 games are given as the number of navigation high-accuracy games, 2 games remain in the navigation high-accuracy games after the end of the normal ART. In Pachislot 1, in such a case, the number of highly accurate navigation games may be carried over from the normal ART to the continuous CZ. That is, the navigation may be highly accurate even during continuous CZ. The details of the carry-over during such navigation high accuracy and the management method of the number of navigation high accuracy games will be described later.

Subsequently, the flow of the game during the EP will be described with reference to FIG. 213 (E). As shown in FIG. 213 (E), during the EP, when the lottery flag is "7 sets" or "BAR set", the number of sets in the ART state is given (stocked), and the lottery flag is set. In the case of "fake 7", the number of sets in the ART state is not given (in the case of other lottery flags, the ART lottery is performed, and the number of sets in the ART state is given based on the result (see FIG. 231 described later). )). Here, the EP is in the RT5 state, and in the RT5 state, the lottery flags are set to "7 sets" or "BAR sets" with a higher probability than in other RT states (in other words, "F_7 lip A" and "BAR set". Since there is a high probability that "F_7 rip B" and "F_BAR rip" are determined as internal winning combinations (see FIG. 180), the number of sets in the ART state is likely to be stocked during EP.

Also, during EP, the fall mode manages the fall from EP to normal ART, and in the fall mode "no guarantee", if you do not guess the correct answer by yourself at the time of winning the "6 choice fall lip" ( As a result of the RT state falling to the RT4 state) The gaming state shifts from EP to normal ART. On the other hand, when the fall mode is "short" or "long", the correct push order is notified at the time of winning the "6 choice fall lip", so that the EP normally continues without falling to ART.

As will be described later, the fall mode "short" or "long" may shift to the fall mode "no guarantee" when the lottery flag is "7 set", "BAR set" or "fake 7". , Other lottery flags do not shift to the fall mode "no guarantee" (see FIG. 245 below). However, until the lottery flag is once set to "7 sets" or "BAR set" during EP, the fall mode "no guarantee" will not be entered (that is, when the EP is set, the lottery flag "7 sets" will not be set. "Or the stock of ART state based on" BAR alignment "is given at least once). Further, as will be described later, the fall mode may be promoted when the so-called rare role or the correct answer in the push order of one's own force in the fall mode "no guarantee" (see FIG. 245 described later).

<Playability in BB>
Subsequently, the flow of the game in the BB will be described with reference to FIG. 214. As shown in FIG. 214, in the BB, the main control circuit 90 assigns various stocks when the lottery flag is "7 alignment" or "BAR alignment", and the lottery flag is "bell off A". If it is "Bell off B", various lottery will be performed, and if it is won, various stocks will be given, and if it is not won, no stock will be given. In addition, various stocks based on the lottery flag "7 alignment" or "BAR alignment" are assigned during the CBB, and various lottery based on the lottery flag "bell off A" or "bell off B" is NBB. Do it inside. Further, the main control circuit 90 ends the BB when a predetermined number of medals are paid out during the BB.

Here, the types of various lottery based on the lottery flag "Bell off A" or "Bell off B" and the types of stock to be given based on the lottery flag "7 sets" or "BAR set" depend on the state. Is different. Specifically, during normal BB (see FIG. 206), the main control circuit 90 performs CZ lottery and ART lottery based on the lottery flag "bell off A" or "bell off B", and the lottery flag. The number of sets in the ART state is given (stocked) based on "7 sets" or "BAR sets". Further, the main control circuit 90 performs ART lottery and EP addition lottery based on the lottery flag "bell off A" or "bell off B" during BB during ART (see FIG. 206), and the lottery flag. The number of sets and EPs in the ART state are given (stocked) based on "7 sets" or "BAR sets" (see FIG. 247 described later). If EP is given in the BB during ART, the process shifts to EP preparation via ART preparation (and rank determination ART if necessary) after the end of BB.

<Various data tables>
Subsequently, various data tables stored in the main ROM 102 will be described with reference to FIGS. 215 to 247. The main control circuit 90 uses a random number value in the range of 0 to 255 (that is, a probability denominator 256) to perform a lottery using the data table shown below.

[Mode transition lottery table]
FIG. 215 is a mode transition lottery table used to determine the mode in the normal state. As described above, in the normal state, when the lottery flag is "bell", CZ lottery is performed based on the current mode (see FIG. 209 (A-1)). The mode transition lottery table is a table for determining a mode in a normal state used for CZ lottery, and FIG. 215 (A) is a mode transition lottery table for determining a mode at the end of NBB, FIG. 215. (B) is a mode transition lottery table for determining a mode at the end of CBB, and FIG. 215 (C) shows the end of the first hit CZ that ended without shifting to the ART state (from the first hit CZ to the normal state). It is a mode transition lottery table for determining a mode at the time of transition to), and FIG. 215 (D) is a mode transition lottery table for determining a mode at the end of continuous CZ (shifting from continuous CZ to a normal state). , FIG. 215 (E) is a mode transition lottery table for determining a mode when a setting is changed.

The mode transition lottery table defines information on the lottery value for determining the mode (lottery result) of the transition destination. The main control circuit 90 determines the mode of the transition destination with reference to the mode transition lottery table. At the end of NBB, CBB or the first hit CZ, the mode of the migration destination is determined according to the mode before migration, and at the end of continuous CZ or when the setting is changed, the migration destination is irrespective of the mode before migration. Determine the mode.

[Status transition lottery table]
216 and 217 are state transition lottery tables used to determine the lottery state during the normal state. During the normal state, when the lottery flag is other than "bell", CZ lottery is performed based on the current lottery state and the lottery flag (see FIG. 209 (A-2)). The state transition lottery table is a table for determining the lottery state in the normal state used for CZ lottery, and FIG. 216 (A) shows the lottery state of the transition destination when the current lottery state is “low probability”. It is a state transition lottery table for determining, and FIG. 216 (B) shows the transition destination when the current lottery state is "high accuracy" and the number of high security certificate games described later is less than 10. It is a state transition lottery table for determining a lottery state, and FIG. 216 (C) is a state transition when the current lottery state is "high accuracy" and the number of high security certificate games described later is 10 or more. It is a state transition lottery table for determining the previous lottery state, and FIG. 217 (D) is a state transition lottery for determining the transition destination lottery state when the current lottery state is "ultra-high accuracy". It is a table. Further, FIG. 217 (E) is a state transition lottery table for determining the lottery state of the migration destination at the end of BB, and FIG. 217 (F) is a state for determining the lottery state of the migration destination when the setting is changed. It is a transition lottery table, and FIG. 217 (G) is a state transition lottery table for determining a lottery state of a transition destination at the end of CZ.

The state transition lottery table defines information on the lottery value for determining the lottery state (lottery result) of the transition destination. The main control circuit 90 determines the lottery state of the transition destination with reference to the state transition lottery table. When "High accuracy A" or "High accuracy B" is determined as the lottery state of the transition destination, the number of high security certificate games is referred to later in the lottery table for the number of high security certificate games (FIG. 218 described later). Is given. When the number of high security certificate games is "1" or more, even if "low accuracy" is determined as the lottery state of the transfer destination in the state transition lottery table shown in FIG. 216 (B), the lottery state does not shift. It is maintained as "high accuracy". On the other hand, when "no high security certificate" is determined as the lottery state of the migration destination, the lottery state of the migration destination becomes "high accuracy", but the number of high security certificate games is not given.

In addition, if "ultra-high accuracy" is determined as the lottery state of the migration destination while the number of high security certificate games remains, the number of high security certificate games may be cleared (set to 0), and the number of high security certificate games may be cleared (set to 0). It may be held. According to the state transition lottery table for "ultra-high accuracy" shown in FIG. 217 (D), "low accuracy" may be determined as the lottery state of the transition destination, but the number of high security certificate games is retained. In that case, even if "low accuracy" is determined as the lottery state of the migration destination from "ultra-high accuracy" before the transition, it will be maintained as "ultra-high accuracy" without shifting to "low accuracy". Also, it may be possible to shift to "high accuracy" instead of "low accuracy".

Referring to FIGS. 216 (A) to 217 (D), in the state transition lottery table referred to every game during the normal state, the lottery state of the migration destination is determined based on the lottery state before the transition and the lottery flag. In addition, in the state transition lottery table (FIGS. 217 (E) to (G)) referred to when the game transitions from another gaming state to the normal state, the lottery state of the transition destination is displayed without using the lottery flag. It is determined.

[High security certificate game number lottery table]
FIG. 218 is a high security certificate game number lottery table used for determining the number of high security certificate games when "high accuracy A" or "high accuracy B" is determined as the lottery state of the transition destination. The high security certificate game number lottery table defines information on the lottery value for the lottery result of the number of high security certificate games to be given for each type of high accuracy determined as the lottery state of the migration destination. When the main control circuit 90 determines "high accuracy A" or "high accuracy B" as the lottery state of the transition destination, the main control circuit 90 determines and assigns the number of high security certificate games by referring to the high security certificate game number lottery table. ..

[CZ lottery table by mode]
FIG. 219 is a mode-specific CZ lottery table used for the CZ lottery performed based on the mode during the normal state. The mode-specific CZ lottery table defines information on the lottery value for the lottery result of the CZ lottery for each current mode. When the lottery flag is "bell" in the normal state, the main control circuit 90 refers to the mode-specific CZ lottery table, performs CZ lottery based on the current mode, and if the lottery is won, the main control circuit 90 performs CZ lottery. The gaming state is transferred to the CZ (via the CZ precursor). If the ART lottery in the normal state performed in the same game is won, the CZ lottery is not performed.

[CZ lottery table by state at the time of BB winning and CZ lottery table by state]
Subsequently, FIGS. 220 and 221 are state-specific CZ lottery tables used for the CZ lottery performed based on the lottery state during the normal state, and FIG. 220 shows the winning of the BB in the normal state overlapping with the BB. It is a BB winning state-specific CZ lottery table for performing CZ lottery with reference to the lottery flag according to the combination, and FIG. 221 shows a CZ lottery with reference to the lottery flag at the time of BB non-winning in the normal state. It is a CZ lottery table according to the state for performing.

The BB winning state-specific CZ lottery table and the state-specific CZ lottery table are provided for each current lottery state, and each lottery flag defines information on the lottery value for the lottery result of the CZ lottery. The main control circuit 90 performs a CZ lottery based on the current lottery state and the lottery flag during the normal state, and when the CZ lottery is won, the game state is shifted to the CZ (via the CZ precursor). .. If the ART lottery in the normal state performed in the same game is won, the CZ lottery is not performed.

[CZ precursor game number lottery table]
Subsequently, FIG. 222 is a CZ precursor game number lottery table used for drawing a period (the number of CZ precursor games) from the normal state to the transition to CZ when the CZ lottery in the normal state is won. The CZ precursor game number lottery table defines information on the lottery value for the range of the CZ precursor game number (lottery result) according to the presence or absence of the BB win when the CZ lottery is won. When the main control circuit 90 wins the CZ lottery during the normal state, the lottery of the number of CZ precursor games is performed, the number of the winning CZ precursor games is set, and the gaming state is shifted to the CZ precursor game.

In the CZ precursor game number lottery table, a certain range is provided as a lottery result of the CZ precursor game number, but the main control circuit 90 evenly determines the CZ precursor game number from the winning range. Further, if the CZ lottery is won at the time of winning the BB, the main control circuit 90 sets the number of CZ precursor games won after the end of the BB. That is, if the CZ lottery is won during the normal state and the number of CZ precursor games is determined to be "1" or more, the game state is then changed from the normal state to the CZ precursor when the CZ is won when the BB is not won. At the time of winning the CZ at the time of winning the BB, the game state is then shifted to the CZ precursor after the end of the BB.

[BAR lottery table at the time of BB winning and ART lottery table at the time of normal times]
Subsequently, FIGS. 223 and 224 are ART lottery tables used for ART lottery performed based on a lottery flag or the like during the normal state, and FIG. 223 is a win that overlaps with the BB when the BB is won in the normal state. It is an ART lottery table at the time of BB winning for performing an ART lottery with reference to a lottery flag according to a combination, and FIG. 224 is for performing an ART lottery with reference to a lottery flag at the time of BB non-winning in a normal state. It is a normal ART lottery table.

At the time of BB winning, when the NBB winning and the lottery state is "normal" or "high accuracy", the BB winning ART lottery table shown in FIG. 223 (A) is referred to, and the CBB winning, When the lottery state is "normal" or "high accuracy", the BB winning ART lottery table shown in FIG. 223 (B) is referred to, and the lottery state is "ultra-high probability" or the game state is "super high probability". In the case of either "CZ precursor" or "ART precursor", the BB winning ART lottery table shown in FIG. 223 (C) is referred to regardless of the type of BB (CBB or NBB).

Further, in the case of non-winning BB, when the lottery state is "normal" or "high accuracy", the normal ART lottery table shown in FIG. 224 (A) is referred to, and the lottery state is "ultra-high probability". Alternatively, when the gaming state is either "CZ precursor" or "ART precursor", the normal ART lottery table shown in FIG. 224 (B) is referred to, and FIG. 224 (C) during the normal flag period. ) Is referred to in the normal ART lottery table.

The BB winning state-specific CZ lottery table and the state-specific CZ lottery table are provided for each current lottery state or game state, and each lottery flag defines information on the lottery value for the lottery result of the ART lottery. The main control circuit 90 performs an ART lottery based on a lottery flag or the like during a normal state, and when the ART lottery is won, the game state is shifted to the ART state (via an ART precursor).

[ART precursor game number lottery table]
Subsequently, FIG. 225 is an ART precursor game number lottery table used for drawing the period (the number of ART precursor games) from the normal state to the transition to the ART state when the ART lottery in the normal state is won. .. The ART precursor game number lottery table defines information on the lottery value for the range of the ART precursor game number (lottery result). When the main control circuit 90 wins the ART omen during the normal state, it draws the number of ART omen games, sets the number of the winning ART omen games, and shifts the gaming state to the ART omen.

In the ART precursor game number lottery table, a certain range is provided as a lottery result of the ART precursor game number, but the main control circuit 90 evenly determines the ART precursor game number from the winning range. If the ART lottery is won at the time of winning the BB or during the normal flag, the game state shifts between the flags during ART and shifts to during preparation for ART after the end of BB during ART (see FIG. 206). In this case, the main control circuit 90 does not draw the number of ART precursor games. That is, when the main control circuit 90 wins an ART lottery using the normal ART lottery table shown in FIGS. 224 (A) and 224 (B), the number of ART precursor games is drawn, and FIGS. 223 (A) to (C) ), And the ART lottery using the normal ART lottery table shown in FIG. 224 (C), the number of ART precursor games is not drawn.

[ART lottery table in CZ]
Subsequently, FIGS. 226 and 227 are CZ ART lottery tables used for ART lottery in CZ. FIG. 226 (A) is an ART lottery table in CZ that is referred to when the first hit CZ and the number of remaining games in the CZ is 1 or more, and FIG. 226 (B) is the first hit CZ and the CZ. It is an ART lottery table in CZ referred to when the number of remaining games of is 0, and FIG. 226 (C) is an ART lottery in CZ referred to in the next game (one crying) at the end of the first hit CZ. It is a table (note that the next game at the end of the first hit CZ is in a normal state in detail). Further, FIG. 226 (D) is a CZ medium ART lottery table referred to at the time of CZ (after ART) and non-navigation high accuracy, and FIG. 227 (E) is CZ (after ART) and navigation height. It is an ART lottery table in CZ referred to at a certain time, and FIG. 227 (F) shows an ART lottery table in CZ referred to in the next game (one time of crying) at the end of CZ (after ART) (Note that CZ (Note). The next game at the end of (after ART) is, in detail, in the normal state), and FIG. 227 (G) is a special CZ and an ART lottery table in CZ referred to at the time of non-navigation high accuracy. FIG. 227 (H) is a special CZ and an ART lottery table in CZ that is referred to when the navigation is highly accurate.

The ART lottery table in CZ is provided for each type of CZ and the like, and the lottery value information about the lottery result of the ART lottery is defined for each lottery flag. The main control circuit 90 performs an ART lottery based on a lottery flag or the like during the CZ, and when the ART lottery is won, the game state is changed to the ART state (via ART preparation if necessary). Let me. When the BB is won in the CZ, the ART lottery (FIG. 231 (D)) will be referred to later, instead of the ART lottery table in the CZ shown in FIGS. 226 and 227. Be sure to win).

[Stock lottery table during ART]
Subsequently, FIGS. 228 to 230 are ART stock lottery tables used for the additional lottery of the number of sets in the ART state performed during the ART state. FIG. 228 (A) is a stock lottery table during ART that is normally referred to during ART, the lottery state “low accuracy” or “high accuracy” during ART, and during non-navigation high accuracy, and FIG. 228 (B). ) Is a stock lottery table in ART that is normally ART and the lottery state during ART is "low accuracy" or "high accuracy" and is referred to during navigation high accuracy, and FIG. 228 (C) is a normal ART. The lottery state during ART is "ultra-high accuracy", and the stock lottery table during ART referred to during non-navigation high accuracy. FIG. 228 (D) shows the normal ART and the lottery state during ART. It is a stock lottery table during ART that is "ultra-high accuracy" and is referred to during navigation high accuracy. Further, FIG. 229 (E) is an ART stock lottery table referred to during EP and when the fall mode is “no guarantee”, and FIG. 229 (F) is during EP and when the fall mode is “short”. It is a stock lottery table in ART referred to, and FIG. 229 (G) is a stock lottery table in ART referred to during EP and in the fall mode “long”. Further, FIG. 230 (H) is a stock lottery table during ART that is referred to during rank determination ART or EP preparation and non-navigation high accuracy, and FIG. 230 (I) is ranking determination ART or EP preparation. Moreover, it is a stock lottery table during ART referred to during navigation high accuracy. Further, FIG. 230 (J) is an ART stock lottery table referenced during ART preparation, and FIG. 230 (K) is an ART stock lottery table referenced between the ART flags.

The stock lottery table during ART is provided for each current game state and the like, and the lottery value information about the lottery result of the additional lottery of the set number of the ART state is specified for each lottery flag. The main control circuit 90 performs an additional lottery based on a lottery flag or the like during the corresponding game state, and when the ART lottery is won, the number of sets in the ART state is added by a predetermined number.

[Stock lottery table at the time of BB winning during ART]
Subsequently, FIG. 231 is a stock lottery table at the time of BB winning during ART used for the additional lottery of the number of sets in the ART state performed at the time of winning BB during the ART state. FIG. 231 (A) is a stock lottery table at the time of BB winning during ART, which is referred to when the lottery state is "low accuracy" or "high accuracy" during normal ART, or when the fall mode is "no guarantee" during EP. FIG. 231 (B) is a stock lottery table at the time of BB winning during ART, which is referred to when the lottery state is “ultra-high accuracy” during normal ART or when the fall mode is “short” during EP, FIG. 231 (C). Is a stock lottery table at the time of BB winning during ART, which is referred to during rank determination ART or EP preparation, and FIG. 231 (D) shows the next game at the end of CZ or CZ, or the fall mode during EP ". It is a stock lottery table at the time of BB winning during ART referred to at the time of "long", and FIG. 231 (E) is a stock lottery table at the time of BB winning during ART referred to during ART preparation.

The stock lottery table at the time of BB winning during ART is provided for each current game state and the like, and the lottery value information about the lottery result of the additional lottery of the set number of the ART state is specified for each lottery flag. The main control circuit 90 performs an additional lottery based on a lottery flag or the like during the corresponding game state, and when the ART lottery is won, the number of sets in the ART state is added by a predetermined number.

[A lottery table for the number of stocks at the time of ART winning]
Subsequently, FIG. 232 shows the number of stocks at the time of winning the ART used for drawing the number of sets in the ART state to be given when the number of sets in the ART state is added to the lottery (that is, at the time of winning the ART). It is a lottery table. The lottery table for the number of stocks at the time of winning the ART defines the information of the lottery value for the number of sets of the ART state to be given for each winning opportunity at the time of winning the ART. The main control circuit 90 draws the number of sets in the ART state based on the winning opportunity corresponding to the winning of the ART, and assigns the number of the winning sets.

In addition, the winning opportunity "first hit" is when the ART lottery is won during the normal state (including the stocking of the ART state accompanying the transition to the RT3 state during the normal state), the ART lottery is won during the ART precursor. If so, it means either the case of winning the ART lottery during the first hit CZ, the case of winning the ART lottery during the normal BB flag, or the case of winning the ART lottery during the normal BB. "Addition A" means the case where the number of sets in the ART state is added to the lottery during EP, and the winning opportunity "Addition B" means the case where the number of sets in the ART state is won during the continuous CZ. The winning opportunity "additional C" refers to the case where the winning opportunity is an ART lottery or an additional lottery for the number of sets in the ART state in a situation other than the winning opportunity "first hit", "addition A", and "addition B".

[Special CZ transition lottery table]
Subsequently, FIG. 233 is a special CZ transition lottery table used for drawing whether or not to use the special CZ as the continuous CZ. The special CZ transition lottery table defines information on the lottery value for the lottery result for each presence or absence of stock of the number of sets in the ART state. The main control circuit 90 draws a lottery whether or not to use the special CZ according to the presence or absence of stock of the number of sets in the ART state at the start of the rank determination ART, and if it wins, the next continuous CZ is set as the special CZ. On the other hand, in the case of non-winning, the next continuous CZ is CZ (after ART).

After the next continuous CZ is set to the special CZ, the main control circuit 90 does not perform lottery using the special CZ transition lottery table until the special CZ ends. Further, when the lottery is won in a situation where there is no stock of the number of sets in the ART state, the main control circuit 90 assigns one set number in the ART state.

[ART winning rank lottery table]
Subsequently, FIGS. 234 to 238 are ART winning rank lottery tables used for determining the rank of the ART state won at the time of ART winning. At the time of winning ART, a plurality of sets of ART states may be given, but the ranks of the second and subsequent ART states are determined by the ART winning rank lottery table shown in FIG. 238 (O). The ART winning rank lottery table shown in FIGS. 234 (A) to 238 (N) is used to determine the rank of the first ART state.

FIG. 234 (A) is an ART winning rank lottery table used when the winning timing of the ART winning is in the normal state, the CZ precursor, the ART precursor, or the ART state other than EP, and is used when the BB is not won. 234 (B) is an ART winning rank lottery table used at the time of winning the NBB, in which the winning timing of the ART winning is in the normal state, the CZ precursor, the ART precursor, or the ART state other than EP, and FIG. 234 is shown in FIG. (C) is an ART winning rank lottery table used when the winning timing of the ART winning is in a normal state, a CZ precursor, an ART precursor, or an ART state other than EP, and is used at the time of winning the CBB.

Further, FIG. 235 (D) is an ART winning rank lottery table used when the winning timing of the ART winning is in preparation for ART and is used when the BB is not winning, and FIG. 235 (E) is the winning timing of the ART winning. Is an ART preparation and is an ART winning rank lottery table used at the time of NBB winning. In FIG. 235 (F), the winning timing of the ART winning is preparing for ART and the ART used at the time of CBB winning. It is a rank lottery table at the time of winning.

Further, FIG. 236 (G) shows an ART winning rank lottery table used when the winning timing of the ART winning is in EP and is used when the BB is not winning, and FIG. 236 (H) shows the winning timing of the ART winning. It is an ART winning rank lottery table that is in EP and is used at the time of NBB winning. In FIG. 236 (I), the winning timing of ART winning is in EP and the ART winning rank used at the time of CBB winning. It is a lottery table.

Further, FIG. 237 (J) shows an ART winning rank lottery table used when the winning timing of the ART winning is in CZ and is used when the BB is not winning, and FIG. 237 (K) shows the winning timing of the ART winning. It is an ART winning rank lottery table used at the time of NBB winning in CZ, and in FIG. 237 (L), the winning timing of ART winning is in CZ and the ART winning rank used at the time of CBB winning. It is a lottery table.

Further, FIG. 238 (M) is an ART winning rank lottery table used when the winning timing of ART winning is an inter-flag state (between normal flags or between flags during ART), and FIG. 238 (N) is an ART winning rank lottery table. It is an ART winning rank lottery table used when the winning timing of the ART winning is in BB, and FIG. 238 (O) is used to determine the rank of the second and subsequent ART states at the time of multiple stocks. It is a rank lottery table at the time of ART winning.

The ART winning rank lottery table is provided for each game state at the time of ART winning, and information on the lottery value for the lottery result is specified for each lottery flag at the time of ART winning. When the main control circuit 90 wins an ART lottery or an additional lottery for a set number of ART states, the main control circuit 90 determines the rank of the winning ART state by using the lottery flag that triggered the winning. The rank determined by using the rank lottery table at the time of ART winning is promoted based on the promotion lottery during the rank determination ART, and becomes the rank (lottery state) during normal ART (see FIG. 212 (B)).

[Stock release order lottery table]
Subsequently, FIG. 239 is a stock release order lottery table used for drawing the order of the stocks in the ART state to be released in the above-mentioned release phase D. The stock release order lottery table defines information on the lottery value for the order of ranks of the ART state to be released (lottery result). In the release phase D, the main control circuit 90 discharges one stock from the stock in the ART state held in accordance with the order determined with reference to the stock release order lottery table. For example, in the case of the release order "4, 3, 2, 1", the main control circuit 90 releases the stock of rank 4 among the stocks held in the release phase D with the highest priority, and the stock of rank 3 is released. The stock is released with priority next, the stock of rank 2 is released with priority next, and the stock of rank 1 is released with priority next.

The lottery of the release order may be performed only once during the loop between the CZ and the ART state, or may be performed each time the release phase D is reached. Further, the lottery timing when the lottery of the release order is performed only once during the loop between the CZ and the ART state is arbitrary, for example, the timing when the release phase D is first reached during the loop, or the first time from the CZ. It may be the timing when the state shifts to the ART state.

[Rank determination ART middle rank promotion lottery table]
Subsequently, FIG. 240 is a rank determination ART medium rank promotion lottery table used for promotion lottery during rank determination ART, and FIG. 240 (A) is a rank determination referred to during rank determination ART at the time of non-navigation high accuracy. It is an ART medium rank promotion lottery table, FIG. 240 (B) is a rank determination ART medium rank promotion lottery table referred to during the rank determination ART at the time of navigation high accuracy, and FIG. 240 (C) is one game. It is a rank determination ART medium rank promotion lottery table that is referred to when a BB is won during a complete rank determination ART.

The rank determination ART middle rank promotion lottery table is provided for each situation during the rank determination ART, and defines the lottery value information about the lottery result of the promotion lottery for each lottery flag. The main control circuit 90 updates the rank determined at the time of winning the ART based on the lottery result of the promotion lottery. If the result of the promotion lottery is rank 4 or higher, the main control circuit 90 sets the updated rank to rank 4.

[Navigation high-accuracy game number acquisition lottery table]
Subsequently, FIG. 241 is a navigation high-accuracy game number acquisition lottery table used for the acquisition lottery for the number of navigation high-accuracy games during normal ART, and FIG. It is a navigation high-accuracy game number acquisition lottery table referred to during the normal ART at the time of "rank 1)", and FIG. 241 (B) shows the normal ART when the lottery state during the ART state is "high accuracy (rank 2)". It is a lottery table for acquiring the number of navigation high-accuracy games referred to therein, and FIG. 241 (C) is referred to during a normal ART when the lottery state in the ART state is "ultra-high accuracy (ranks 3 and 4)". It is a lottery table for acquiring the number of highly accurate navigation games.

The navigation high-accuracy game number acquisition lottery table is provided for each lottery state in the ART state, and the lottery value information regarding the lottery result of the acquisition lottery for the navigation high-accuracy game number is defined for each lottery flag. The main control circuit 90 normally assigns the number of navigation high-accuracy games based on the lottery state and the lottery flag during ART. As a result, when the number of navigation high accuracy games is 1 or more, the navigation high accuracy is in progress. The number of highly accurate navigation games is normally updated (1 subtraction) for each game during ART, and this point will be described later.

[CZ game number acquisition lottery table]
Subsequently, FIG. 242 is a CZ game number acquisition lottery table used for additional lottery of CZ games, and FIG. 242 (A) is a CZ game number acquisition lottery table referred to during ART preparation, which is shown in FIG. 242 (A). B) is a CZ game number acquisition lottery table referred to at the time of normal ART and non-navigation high accuracy, and FIG. 242 (C) is a CZ game number acquisition lottery referred to at the time of normal ART and navigation high accuracy. It's a table. Further, FIG. 242 (D) is a CZ referred to when the ART lottery is won in the lottery phases A to C in the CZ, or when the stock in the ART state is released in the release phase D in the CZ. It is a lottery table for acquiring the number of games.

The CZ game number acquisition lottery table shown in FIGS. 242 (A) to 242 (C) defines information on the lottery value for the lottery result of the number of CZ games added for each game state and lottery flag. Further, the lottery table for acquiring the number of CZ games shown in FIG. 242 (D) defines information on the lottery value for the lottery result of the number of CZ games to be added (regardless of the lottery flag). The main control circuit 90 normally adds the number of CZ games based on the lottery flag during ART, and also adds the number of CZ games at the time of transition from the CZ to the ART state. As shown in FIG. 242 (D), at least 5 games are added at the time of transition from the CZ to the ART state.

[Lottery table for acquiring the number of ART games]
Subsequently, FIG. 243 is an ART game number acquisition lottery table used for the additional lottery of the number of ART games. The ART game number acquisition lottery table is referred to when "NBB" or "CBB" is determined as a lottery flag during the ART state (ranking ART, normal ART, EP preparation or EP), ART preparation or continuous CZ. The lottery value information about the lottery result of the number of ART games to be added for each lottery flag is specified. As can be seen by comparing the CZ game number acquisition lottery table shown in FIG. 242 with the ART game number acquisition lottery table shown in FIG. The number of CZ games is added based on the above, and the number of ART games is added based on the lottery flag of BB.

When the BB wins during the ART state, ART preparation, or continuous CZ, the main control circuit 90 adds the number of ART games. As a result, the normal ART game period, which will be transferred after the end of BB, will be extended.

[Fall mode lottery table]
Subsequently, FIG. 244 is a fall mode lottery table for drawing a fall mode at the time of EP winning. The fall mode lottery table is provided for each EP winning timing, and defines the lottery value information for the lottery result of the fall mode. In addition, EP is the timing when rank 4 is decided in the rank determination ART, the timing when "3 choice promotion lip" is decided as the internal winning role during the normal ART during navigation high accuracy, and the EP stock lottery in BB during ART. If the stock is given at the timing of winning and rank 4 is determined in the rank determination ART, the fall mode is drawn using the lottery value in the "Rank determination ART" column, and in other cases, the "rank determination ART" is used. Use the lottery value in the "Other than Medium" column to draw the fall mode.

When the stock of EP is given, the main control circuit 90 draws and sets the fall mode according to the timing. In addition, as shown in FIG. 245 that follows, the set fall mode shifts to EP.

[Fall mode transition lottery table]
Subsequently, FIG. 245 is a fall mode transition lottery table used to shift the fall mode during EP, and FIG. 245 (A) is referred to when the fall mode before the transition is “no guarantee”. It is a fall mode transition lottery table, FIG. 245 (B) is a fall mode transition lottery table referred to when the fall mode before transition is “short”, and FIG. 245 (C) is a fall before transition. A fall mode transition lottery table referenced when the mode is "long".

The fall mode transition lottery table is provided for each current fall mode, and the lottery value information for the fall mode of the transition destination is specified for each lottery flag. The main control circuit 90 shifts the fall mode during the EP based on the current fall mode and the lottery flag. In the fall mode transition lottery table at the time of "no guarantee" shown in FIG. 245 (A), there is a column "when EP is continued". This "when EP continues" is referred to when the correct answer is given in the order of pushing by oneself at the time of winning the "6 choice fall lip".

Further, if the lottery flag is "fake 7" in the fall mode "short" or "long", the fall mode may shift to "no guarantee" with a predetermined probability. However, as described above, during the EP, the lottery flag continues at least once until the lottery flag becomes "7-match" or "BAR-match". Therefore, the lottery flag "7-match" or "BAR-match" during the EP. If has never been won, the fall mode is not changed even if the lottery flag "fake 7" is won.

[During EP BB Winning fall mode transition lottery table]
Subsequently, FIG. 246 is a lottery table for shifting to the falling mode at the time of winning the BB during the EP, which is used to perform the transition of the falling mode at the time of winning the BB during the EP. The BB winning mode transition lottery table during EP defines the lottery value information for the transition destination fall mode for each type of BB won during EP and the fall mode before transition. When the BB wins during the EP, the main control circuit 90 determines the fall mode of the migration destination based on the type of the winning BB, the current fall mode, and the lottery flag. If the BB is hit during the EP, it returns to the EP after the end of the BB, but the determined fall mode is used in the EP that returns after the end of the BB.

[Various lottery tables in BB]
Subsequently, FIG. 247 is a lottery table used for various lottery in the BB, and FIG. 247 (A) is an ART lottery in the BB for performing an ART lottery in the normal BB or the BB in the ART based on the lottery flag. FIG. 247 (B) is a CZ lottery table in BB for performing CZ lottery based on a lottery flag during normal BB, and FIG. 247 (C) is a lottery flag in BB during ART. It is an EP stock lottery table in BB for performing an EP stock lottery based on.

As shown in FIG. 247, these various lottery tables define lottery value information for the lottery result for each lottery flag. When the main control circuit 90 wins the ART lottery in the BB, a predetermined number of stocks of the set number of the ART state is given, and the game state is shifted to the ART preparation after the end of the BB. Further, when the main control circuit 90 wins the CZ lottery in the BB, one stock of the CZ is given, and the gaming state is shifted to the CZ precursor or the CZ after the end of the BB. Further, when the EP stock lottery in the BB is won, the main control circuit 90 grants one stock of EP, and shifts the gaming state to EP (via ART preparation and EP preparation) after the end of BB.

<Explanation of operation of main control circuit>
Next, with reference to FIGS. 248 to 262, the contents of various processes executed by the main CPU 101 of the main control circuit 90 by using the program will be described. The same processing as that of the pachi-slot machine 1 of the first embodiment will be omitted or briefly described. For example, the power-on (reset interrupt) processing to the thumb check processing (non-standard) in FIGS. 64 to 80 are the same as those of the pachi-slot machine 1 of the first embodiment, and thus the description thereof will be omitted.

[Main processing of pachislot under the control of the main CPU]
First, the main process (main operation process) of the pachi-slot machine 1 executed under the control of the main CPU 101 will be described with reference to FIG. 248.

First, the main CPU 101 performs a RAM initialization process (S2001). Next, the main CPU 101 performs medal acceptance / start check processing (S2002). Next, the main CPU 101 performs a random number acquisition process (S2003). These processes are basically the same as those of the pachi-slot machine 1 of the first embodiment.

Next, the main CPU 101 performs an internal lottery process (S2004). Next, the main CPU 101 performs a symbol setting process (S2005). These processes are basically the same as those of the pachislot machine 1 of the first embodiment, but the type of the winning combination determined as the internal winning combination and the RT that shifts when the winning combination related to the bonus is determined as the internal winning combination. The type of state and the like match the specifications of the pachi-slot machine 1 of the second embodiment.

Next, the main CPU 101 performs a game number update process (S2006). In this process, the main CPU 101 updates the number of various games with the start of this game. As an example, the main CPU 101 updates (subtracts) the number of games in the RT1 state or RT3 state, the number of precursor games in the CZ precursor or ART precursor, the number of games in the CZ, or the number of games in the normal ART.

Next, the main CPU 101 performs a start command generation / storage process (S2007). Next, the main CPU 101 performs a second interface board control process (S2008). These processes are basically the same as those of the pachi-slot machine 1 of the first embodiment.

Next, the main CPU 101 performs a game control process according to the state at the start (S2009). In this process, the main CPU 101 mainly performs various lottery at the start according to the game state. The details of various lottery to be performed according to the game state will be described for each game state in FIGS. 249 to 262.

Next, the main CPU 101 performs a reel stop initial setting process (S2010). Next, the main CPU 101 performs a reel rotation start process (S2011). Next, the main CPU 101 performs a reel rotation start command generation / storage process (S2012). Next, the main CPU 101 performs a pull-in priority storage process (S2013). Next, the main CPU 101 performs a reel stop control process (S2014). Next, the main CPU 101 performs a winning search process (S2015). These processes are basically the same as those of the pachi-slot machine 1 of the first embodiment.

Next, the main CPU 101 performs an illegal hit check process (S2016). Next, the main CPU 101 performs a winning check / medal payout process (S2017). These processes are basically the same as those of the pachi-slot machine 1 of the first embodiment.

Next, the main CPU 101 performs a game control process according to the stopped state (S2018). In this process, the main CPU 101 mainly performs various lottery when the reels are stopped according to the gaming state. The details of various lottery to be performed according to the game state will be described for each game state in FIGS. 249 to 262.

Next, the main CPU 101 performs a BB check process (S2019). In this process, the main CPU 101 controls the operation and termination of the bonus state. Specifically, the main CPU 101 operates the BB (CBB) when the symbol combination related to the abbreviation "crown BB" is displayed along the effective line, and the symbol combination related to the abbreviation "BB" is the effective line. When displayed along, BB (NBB) is activated. Further, the main CPU 101 ends the operation of the BB when the number of medals paid out during the operation of the BB (CBB or NBB) reaches a predetermined number.

Next, the main CPU 101 performs an RT check process (S2020). In this process, the main CPU 101 controls the migration of the RT state according to the migration conditions shown in FIG. 178. When the RT state is changed to the RT3 state during the normal state, the main CPU 101 assigns the number of sets of the ART state (see FIG. 209 (B-2)).

Next, the main CPU 101 performs a notification state transition process (S2021). In this process, the main CPU 101 performs a game state transition control in consideration of whether or not the notification (ART) function is activated according to the transition conditions shown in FIGS. 206 and 207.

<Lottery content for each game state>
Subsequently, with reference to FIGS. 249 to 262, details of various lottery performed by the main CPU 101 of the main control circuit 90 in the game control process according to the start state and the game control process according to the stop state will be described. As described above, in the pachi-slot machine 1, the main control circuit 90 may perform various lottery at the start of reel rotation (at the start) or at the time of reel stop, depending on the internal winning combination (lottery flag). Since the timing of performing the lottery has already been described (see FIG. 208), the details of the timing of performing the lottery will be omitted below.

[Details of lottery performed during normal conditions]
First, with reference to FIG. 249, details of various lottery performed by the main CPU 101 of the main control circuit 90 during the normal state will be described.

In the normal state, when the lottery flag is determined based on the internal winning combination and the pushing order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 refers to the BB winning ART lottery table shown in FIG. 223 at the time of BB winning, based on the lottery flag corresponding to the internal winning combination that is duplicated with BB, and the current lottery state. Perform ART lottery. Further, when the BB is not won, the main CPU 101 refers to the normal ART lottery table shown in FIG. 224 (A) when the lottery state in the normal state is "low accuracy" or "high accuracy". ART lottery is performed based on the lottery flag, and when the lottery state in the normal state is "ultra-high accuracy", the lottery flag is referred to with reference to the normal ART lottery table shown in FIG. 224 (B). ART lottery is performed based on.

Here, referring to the normal ART lottery table, it can be seen that if the lottery flag is "7 sets" or "BAR set", the ART lottery in the normal state is always won, and the internal lottery in FIG. 180 is shown. With reference to the correspondence between the internal winning combination and the lottery flag in the table and FIG. 208, it corresponds to the lottery flag "7 alignment" or "BAR alignment" that always wins the ART lottery in the normal state during the RT5 state. It can be seen that the probability that "F_7 rip A", "F_7 rip B" or "F_BAR rip" is determined as an internal winning combination is much higher than in other RT states.

Therefore, in the pachi-slot machine 1 of the present embodiment, if the RT state shifts to the RT5 state during the normal state which is a non-navigation section, it is possible to expect to win the ART lottery in the subsequent game during the RT5 state.

Further, referring to the normal ART lottery table, it can be seen that when the lottery flag is "strong chance lip", the ART lottery in the normal state is won with a predetermined probability, and when referring to FIG. 208, it is normal. In the state (non-navigation section), in addition to the case where "strong chelip" is decided as the internal winning role, "3 choice promotion lip" is decided as the internal winning role, and the lottery is done when the push order is correct. It can be seen that the flag for is "strong chance lip". Then, if "strong chelip" is determined as the internal winning combination, or if the correct answer is given in the order of pressing "three-choice promotion lip", the symbol combination related to the abbreviation "strong chelip (RT5 transition symbol)" is displayed. It can be seen that the RT state shifts to the RT5 state (see FIG. 205).

Therefore, in the pachi-slot machine 1 of the present embodiment, if the RT state can be changed to the RT5 state by itself during the normal state which is a non-navigation section, the winning of the ART lottery can be expected even in the game which has changed to the RT5 state. become. That is, in the pachi-slot machine 1 of the present embodiment, not only in the RT5 state where there is a high probability that "7 alignment" or "BAR alignment" is determined as the lottery flag during the normal state, but also in other words, the timing of transition to the RT5 state. And, not only during the RT5 state, which is the chance period of the lottery flag "7 match" or "BAR match", but also at the entrance of the chance period, you can expect to win the ART lottery.

Further, when the RT state shifts to the RT3 state during the normal state as described above, the number of sets of the ART state is given (see FIG. 209 (B-2)). Here, when the RT3 state is entered during the normal state, the main CPU 101 performs a lottery following the ART lottery of (A).

Returning to FIG. 249, when the ART lottery of (A) is non-winning, the main CPU 101 subsequently performs the CZ lottery of (B). In this lottery, the main CPU 101 refers to the BB winning state-specific CZ lottery table shown in FIG. 220 at the time of BB winning, the lottery flag corresponding to the internal winning combination that is duplicated with BB, and the current lottery state. CZ lottery is performed based on. On the other hand, when the BB is not won, the main CPU 101 performs CZ lottery based on the current mode with reference to the mode-specific CZ lottery table shown in FIG. 219 when the lottery flag is "bell". Further, when the BB is not won and the lottery flag is other than "bell", the main CPU 101 refers to the state-specific CZ lottery table shown in FIG. 221 and uses the lottery flag and the CZ based on the current lottery state. Make a lottery.

When the BB is won and the lottery flag is "bell", in the present embodiment, only the CZ lottery with reference to the mode-specific CZ lottery table shown in FIG. 219 is performed, but the present invention is not limited to this. , The main CPU 101 refers to the CZ lottery referring to the mode-specific CZ lottery table shown in FIG. 219 and the mode-specific CZ lottery table shown in FIG. 219 when the BB is won and the lottery flag is "bell". You may do both of the CZ lottery.

Subsequently, when the CZ lottery of (B) is non-winning, the main CPU 101 subsequently performs the state transition lottery of (C). In this lottery, the main CPU 101 refers to the state transition lottery table shown in FIGS. 216 (A) to 217 (D), and refers to the current (before migration) lottery state and the lottery state of the migration destination based on the lottery flag. Is determined and set as the lottery state of the next game.

Subsequently, when "high accuracy A" or "high accuracy B" is determined as the lottery state of the transition destination in the state transition lottery of (C), the main CPU 101 subsequently draws the high security certificate game number lottery of (D). conduct. In this lottery, the main CPU 101 determines and grants the number of high security certificate games based on the lottery state determined as the migration destination with reference to the high security certificate game number lottery table shown in FIG. 218.

If both the ART lottery of (A) and the CZ lottery of (B) are non-winning, the state transition lottery of (C) and the high security certificate game number lottery of (D) will be performed in this game. The lottery to be done is finished. The game state of the next game (the game state in consideration of the presence or absence of notification) differs depending on each lottery result, but details will be described later.

Further, when the CZ lottery of (B) is won, the main CPU 101 subsequently performs the precursor game number lottery of (E). In this lottery, the main CPU 101 refers to the CZ precursor game number lottery table shown in FIG. 222, determines and sets the number of CZ precursor games based on the presence or absence of the BB win, and determines the lottery to be performed in this game. finish.

Further, when the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (F). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. In addition, referring to the ART lottery table at the time of winning ART shown in FIG. 232, it can be seen that when the ART lottery in the normal state is won, two or more sets are determined as the number of sets in the ART state.

The main CPU 101 subsequently performs a rank lottery of (G). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238. Specifically, the main CPU 101 sets the stock for the first ART state as the lottery flag at the time of ART winning by referring to the ART winning rank lottery table shown in FIGS. 234 (A) to 234 (C). Based on this, the rank of the ART state is determined, and for the stock of the second and subsequent ART states, the rank of the ART state is determined with reference to the ART winning rank lottery table shown in FIG. 238 (O).

Subsequently, the main CPU 101 performs a lottery for the number of precursor games of (H). In this lottery, the main CPU 101 determines and sets the number of precursor games in the ART state with reference to the ART precursor game number lottery table shown in FIG. 225, and ends the lottery to be performed in this game.

[Game state that shifts from the normal state]
When these lottery are performed during the normal state, the main CPU 101 sets the game state (game state in consideration of the presence or absence of notification) of the next game according to the lottery result. Although the transition of the gaming state in consideration of the presence or absence of notification has already been described in FIGS. 206 and 207, the types of gaming states that can be transitioned from the normal state and the conditions thereof are also shown in FIG. 249.

Specifically, when the ART lottery of (A) is won during the normal state and the BB is activated in this game (that is, the BB is won in this game and the ART lottery at the time of BB winning). When the symbol combination corresponding to the BB is displayed along the valid line), the main CPU 101 sets the BB during ART as the game state of the next game. In this case, the main CPU 101 clears the mode and the lottery state used during the normal state.

In addition, when the ART lottery of (A) is not won during the normal state and the BB is activated in this game (that is, the BB is won in this game and the ART lottery at the time of BB winning is not won). When the winning and the symbol combination corresponding to the BB are displayed along the valid line), the main CPU 101 sets the normal BB as the game state of the next game.

Further, when the BB is won but the BB does not operate during the normal state, the main CPU 101 sets between the normal flags as the game state of the next game. Further, when the ART lottery of (A) is won during the normal state, the main CPU 101 sets the ART precursor as the game state of the next game. In this case, the main CPU 101 clears the mode and the lottery state used during the normal state. Further, when the CZ lottery of (B) is won during the normal state, the main CPU 101 sets the CZ precursor as the game state of the next game. In this case, the main CPU 101 clears the lottery state used during the normal state.

[Details of lottery performed during CZ precursor]
Subsequently, with reference to FIG. 250, the details of various lottery performed by the main CPU 101 of the main control circuit 90 during the CZ precursor will be described.

In the CZ precursor, when the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 refers to the BB winning ART lottery table shown in FIG. 223 (C) at the time of BB winning, and draws an ART lottery based on the lottery flag corresponding to the internal winning combination that is duplicated with BB. conduct. Further, when the BB is not won, the main CPU 101 refers to the normal ART lottery table shown in FIG. 224 (B) and performs ART lottery based on the lottery flag.

When the ART lottery of (A) is non-winning, the main CPU 101 makes a different process based on the presence or absence of the BB winning, and the BB (“F_crown BB”, “F_red BB” or “F_blue BB”) is the internal winning. If it has not been decided as a role, the lottery to be performed in this game is terminated. On the other hand, when BB is determined as the internal winning combination, the main CPU 101 subsequently draws the number of precursor games of CZ in (B). In this lottery, the main CPU 101 determines the number of CZ precursor games by referring to the "BB winning time" column of the CZ precursor game number lottery table shown in FIG. 222, and determines the number of CZ precursor games currently set. The number of CZ precursor games is rewritten, and the lottery to be performed in this game is completed.

Further, when the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (C). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (D). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238. Subsequently, the main CPU 101 rewrites the number of precursor games of CZ to the number of precursor games of ART, and ends the lottery to be performed in this game.

[Game state transitioning from CZ precursor]
If the ART lottery of (A) is won during the CZ precursor and the BB is activated in this game (that is, the BB is won in this game, and the ART lottery at the time of BB winning is won, and , When the symbol combination corresponding to the BB is displayed along the valid line), the main CPU 101 sets the BB during ART as the game state of the next game. In this case, the main CPU 101 clears the mode and rewrites the number of precursor games of CZ to the number of precursor games of ART.

In addition, when the ART lottery of (A) is not won during the CZ precursor and the BB is activated in this game (that is, the BB is won in this game and the ART lottery at the time of BB winning is not won). When the winning and the symbol combination corresponding to the BB are displayed along the valid line), the main CPU 101 sets the normal BB as the game state of the next game.

Further, if the BB is hit during the CZ precursor but the BB does not operate, the main CPU 101 sets between the normal flags as the game state of the next game. Further, during the CZ precursor, when the ART lottery of (A) is won, the number of precursor games is updated to 0 in this game, and the RT state is a high RT state (RT4 state or RT5 state). , The main CPU 101 sets the rank determination ART as the game state of the next game. In this case, the main CPU 101 clears the mode.

In addition, when the ART lottery of (A) is won during the CZ omen, the number of omen games is updated to 0 in this game, and the RT state is a low RT state (RT0 state to RT3 state). The main CPU 101 sets ART preparation in progress as the game state of the next game. In this case, the main CPU 101 clears the mode.

Further, if the ART lottery of (A) is won during the CZ omen and the number of omen games is 1 or more even after the update of this game, the main CPU 101 is set as the game state of the next game. To set. In this case, the main CPU 101 clears the mode.

Further, when the number of precursor games of CZ is updated to 0 without winning the ART lottery of (A) during the precursor of CZ, the main CPU 101 sets the first hit CZ as the game state of the next game.

[Details of lottery performed during ART precursors]
Subsequently, with reference to FIG. 251, the details of various lottery performed by the main CPU 101 of the main control circuit 90 during the ART precursor will be described.

In the ART precursor, when the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 refers to the BB winning ART lottery table shown in FIG. 223 (C) at the time of BB winning, and draws an ART lottery based on the lottery flag corresponding to the internal winning combination that is duplicated with BB. conduct. Further, when the BB is not won, the main CPU 101 refers to the normal ART lottery table shown in FIG. 224 (B) and performs the ART lottery based on the lottery flag.

When the ART lottery of (A) is non-winning, the main CPU 101 ends the lottery to be performed in this game. On the other hand, when the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (B). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (C). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238, and ends the lottery to be performed in this game.

[Game state transitioning from ART precursor]
When the BB is activated during the ART precursor (that is, when the BB is won in this game and the symbol combination corresponding to the BB is displayed along the valid line), the main CPU 101 is in the game state of the next game. BB is set during ART. Further, if the BB is hit during the ART precursor but the BB does not operate, the main CPU 101 sets between the normal flags as the game state of the next game.

Further, when the number of precursor games of ART is updated to 0 during the precursor of ART and the RT state is a high RT state (RT4 state or RT5 state), the main CPU 101 ranks ART as the game state of the next game. When the number of precursor games of ART is updated to 0 during the precursor of ART and the RT state is a low RT state (RT0 state to RT3 state), the main CPU 101 sets ART as the game state of the next game. Set in preparation. In these cases, the main CPU 101 sets the number of CZ games to 10.

Normally, the loop between the ART state and the CZ starts from the first hit CZ, so the number of CZ games is already set at the time of transition to the ART state, but the transition from the ART precursor to the ART state (that is, from the normal state to ART). (Transition to ART state via precursor), the number of CZ games is not set because it does not go through CZ. Therefore, when the number of precursor games of ART is updated to 0 during the precursor of ART, 10 is set as the number of CZ games, and the subsequent loop between the ART state and CZ is enabled.

[Contents of lottery for the next game of the first hit CZ and the end of the first hit CZ]
Subsequently, with reference to FIG. 252, details of various lottery performed by the main CPU 101 of the main control circuit 90 for the next game of the first hit CZ and the end of the first hit CZ will be described.

In the next game of the first hit CZ and the end of the first hit CZ, when the lottery flag is determined based on the internal winning combination and the pushing order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 refers to the BB winning stock lottery table during ART shown in FIG. 231 (D) at the time of BB winning, and is based on the lottery flag corresponding to the internal winning combination that is duplicated with BB. The ART lottery is performed, and when the BB is not won, the ART lottery is performed based on the lottery flag with reference to the ART lottery table in CZ shown in FIGS. 226 (A) to 226 (C).

When the ART lottery of (A) is non-winning, the main CPU 101 ends the lottery to be performed in this game. On the other hand, when the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (B). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (C). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238.

Subsequently, the main CPU 101 performs a lottery for acquiring the number of CZ games in (D). In this lottery, the main CPU 101 refers to the CZ game number acquisition lottery table shown in FIG. 242 (D) to determine the number of CZ games to be added, and adds the number of games to be added to the current number of CZ games. The lottery to be done in this game is finished.

[Game state that shifts from the next game of the first hit CZ and the end of the first hit CZ]
When the BB is activated in the next game of the first hit CZ and the end of the first hit CZ, the main CPU 101 sets the BB in ART as the game state of the next game. Further, if the BB is hit during the ART precursor but the BB does not operate, the main CPU 101 sets between the ART flag as the game state of the next game. In these cases, the main CPU 101 clears the mode.

Further, in the next game of the first hit CZ and the end of the first hit CZ, when the ART lottery is won and the RT state is the high RT state (RT4 state or RT5 state), the main CPU 101 is the game of the next game. When the rank determination ART is set as the state, the ART lottery is won, and the RT state is the low RT state (RT4 state or RT5 state), the main CPU 101 is preparing for ART as the game state of the next game. set. In these cases, the main CPU 101 clears the mode.

Further, in the next game at the end of the first hit CZ, if the ART lottery is not won and there is a stock of CZ, the main CPU 101 sets the CZ precursor as the game state of the next game. In this case, the main CPU 101 draws and sets the number of precursor games of the mode and CZ.

Further, in the next game at the end of the first hit CZ, if the ART lottery is not won and there is no stock of CZ, the main CPU 101 sets the normal state as the game state of the next game. In this case, the main CPU 101 draws and sets the mode, the lottery state in the normal state, and the number of high security certificate games.

[Contents of lottery during ART preparation]
Subsequently, with reference to FIG. 253, the details of various lottery performed by the main CPU 101 of the main control circuit 90 during the preparation for ART will be described.

During the preparation for ART, when the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 refers to the BB winning stock lottery table during ART shown in FIG. 231 (E) at the time of BB winning, and is based on the lottery flag corresponding to the internal winning combination that is duplicated with BB. The ART lottery is performed, and when the BB is not won, the ART lottery is performed based on the lottery flag with reference to the stock lottery table during ART shown in FIG. 230 (J).

When the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (B). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (C). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238.

When the ART lottery of (A) is non-winning, or following the rank lottery of (C), the main CPU 101 performs a lottery for acquiring the number of CZ games of (D). In this lottery, the main CPU 101 refers to the CZ game number acquisition lottery table shown in FIG. 242 (A), determines the number of CZ games to be added based on the lottery flag, and sets the number of games to be added to the current CZ game. Add to the number.

Subsequently, the main CPU 101 performs a lottery for acquiring the number of ART games in (E). In this lottery, the main CPU 101 refers to the ART game number acquisition lottery table shown in FIG. 243 to determine the number of ART games to be added according to the type of the winning BB, and the number of games to be added is the current ART game. Add to the number and finish the lottery to be done in this game.

[Game state transitioning from ART preparation]
When the BB is activated during the preparation for ART, the main CPU 101 sets the BB during ART as the game state of the next game. Further, if the BB is hit during the ART precursor but the BB does not operate, the main CPU 101 sets between the ART flag as the game state of the next game.

Further, when the RT state shifts to the RT4 state during the preparation for ART, the main CPU 101 sets the following game state as the game state of the next game. Specifically, when the RT state shifts to the RT4 state during the ART preparation after the end of the winning BB during the normal ART or the rank determination ART, the main CPU 101 sets the normal ART as the game state of the next game. Further, when the RT state shifts to the RT4 state during the ART preparation after the end of the winning BB during the EP, the main CPU 101 sets the EP as the game state of the next game. Further, when the RT state shifts to the RT4 state during the preparation for ART with the stock of EP, the main CPU 101 sets EP as the game state of the next game (in this case, the main CPU 101 also performs the initial EP process. ). Further, when the RT state shifts to the RT4 state during the preparation for ART in other situations, the main CPU 101 sets the rank determination ART as the game state of the next game.

In the following, the initial EP process is the process of drawing and setting the fall mode during EP and clearing (making 0) the number of navigation high-accuracy games, which have not been completed yet. To do. That is, if none of the processes has been completed, the main CPU 101 performs both processes in the initial EP process, and if either process is completed, the main CPU 101 has not completed the initial EP process. If processing is performed and none of the processing is completed, neither processing is performed in the initial EP processing.

[Contents of lottery performed during rank determination ART]
Subsequently, with reference to FIG. 254, details of various lottery performed by the main CPU 101 of the main control circuit 90 during the rank determination ART will be described.

During the rank determination ART, when the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 performs the rank promotion lottery of (A). In this lottery, the main CPU 101 refers to the rank determination ART middle rank promotion lottery table shown in FIG. 240, performs a lottery for promotion of the rank in the ART state based on the lottery flag, whether or not the navigation is highly accurate, and the like. Based on the lottery result, the rank tentatively decided at the time of ART winning will be updated.

As a result of this rank promotion lottery, when the rank in the ART state is promoted to rank 4, the main CPU 101 subsequently performs the fall mode lottery (B). In this lottery, the main CPU 101 determines and sets the initial value of the fall mode with reference to the fall mode lottery table shown in FIG. 244.

Subsequently, the main CPU 101 performs the ART lottery of (C). In this lottery, the main CPU 101 refers to the BB winning stock lottery table during ART shown in FIG. 231 (C) at the time of BB winning, and is based on the lottery flag corresponding to the internal winning combination that is duplicated with BB. The ART lottery is performed, and when the BB is not won, the ART lottery is performed based on the lottery flag and whether or not the navigation is highly accurate with reference to the stock lottery table during ART shown in FIGS. 230 (H) and 230 (I).

When the ART lottery of (C) is won, the main CPU 101 subsequently performs the ART stock number lottery of (D). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (E). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238.

When the ART lottery of (C) is non-winning, or following the rank lottery of (E), the main CPU 101 performs (F) acquisition lottery of the number of ART games. In this lottery, the main CPU 101 refers to the ART game number acquisition lottery table shown in FIG. 243 to determine the number of ART games to be added according to the type of the winning BB, and the number of games to be added is the current ART game. Add to the number.

Subsequently, the main CPU 101 performs a lottery to activate the special CZ of (G). In this lottery, the main CPU 101 refers to the special CZ transition lottery table shown in FIG. 233 to draw a lottery as to whether or not to use the special CZ as the continuous CZ to be migrated after the end of the normal ART, and the lottery to be performed in this game. To finish.

[Game state to shift from rank determination ART]
When the BB is activated during the rank determination ART, the main CPU 101 sets the BB during the ART as the game state of the next game. Further, if the BB is won but the BB does not operate during the rank determination ART, the main CPU 101 sets between the ART flag as the game state of the next game.

Further, when the rank is promoted to rank 4 by the rank promotion lottery of (A) during the rank determination ART and the RT state is the RT5 state, the main CPU 101 sets EP as the game state of the next game. Further, when the player is promoted to rank 4 by the rank promotion lottery of (A) during the rank determination ART and is in the RT state other than the RT5 state, the main CPU 101 sets EP preparation as the game state of the next game. In these cases, the main CPU 101 performs the initial EP process.

Further, in cases other than the above-mentioned situations, the main CPU 101 normally sets ART as the game state of the next game.

[Details of lottery performed during normal ART]
Subsequently, with reference to FIG. 255, the details of various lottery performed by the main CPU 101 of the main control circuit 90 during the normal ART will be described.

Normally, during ART, when the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 refers to the BB winning stock lottery table in ART shown in FIGS. 231 (A) and 231 (B) at the time of BB winning, and is used for lottery corresponding to the internal winning combination that is duplicated with BB. ART lottery is performed based on the flag and the lottery state during the ART state, and when the BB is not won, the lottery flag, the lottery state during the ART state, and the navigation high accuracy are referred to with reference to the stock lottery table during ART shown in FIG. 228. ART lottery will be done based on whether it is medium or not.

When the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (B). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (C). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238.

When the ART lottery of (A) is non-winning, or following the rank lottery of (C), the main CPU 101 performs a lottery for acquiring the number of (D) CZ games. In this lottery, the main CPU 101 refers to the CZ game number acquisition lottery table shown in FIGS. 242 (B) and 242 (C), and determines the number of CZ games to be added based on the lottery flag and whether or not the navigation is highly accurate. , The number of games to be added is added to the current number of CZ games.

Subsequently, the main CPU 101 performs a lottery for acquiring the number of ART games in (E). In this lottery, the main CPU 101 refers to the ART game number acquisition lottery table shown in FIG. 243, and determines the number of ART games to be added according to the type of the winning BB. When the main CPU 101 wins the winning lottery for the number of ART games (it is the same as the winning lottery for the number of ART games because it always wins the winning lottery for the number of ART games when the BB wins during the normal ART), the addition is added. The number of games to be played is added to the current number of ART games, and the lottery to be performed in this game is completed.

On the other hand, when the lottery for acquiring the number of ART games in (E) is not won (it is the same as the normal BB non-winning time because it is always non-winning except when the BB is won), the main CPU 101 continues. Then, the lottery for acquiring the number of highly accurate navigation games in (F) is performed. In this lottery, the main CPU 101 refers to the navigation high-accuracy game number acquisition lottery table shown in FIG. 241 and adds the lottery flag and the lottery state (uniquely determined from the rank of the ART state) in the ART state. The number of navigation high-accuracy games to be played is determined, and the number of games to be added is added to the current number of navigation high-accuracy games.

Subsequently, if the current game is in high accuracy in navigation and the "3-choice promotion lip" is determined as the internal winning role in this game, the main CPU 101 subsequently falls (G). Perform a mode lottery. In this lottery, the main CPU 101 determines and sets the initial value of the fall mode with reference to the fall mode lottery table shown in FIG. 244, and ends the lottery to be performed in this game. On the other hand, if any of the above conditions is not satisfied, the main CPU 101 ends the lottery to be performed in this game.

[Game state that shifts from normal ART]
When the BB operates during the normal ART, the main CPU 101 sets the BB during the ART as the game state of the next game. Further, if the BB is hit during the normal ART but the BB does not operate, the main CPU 101 sets between the flags during ART as the game state of the next game.

Further, when the RT state shifts to the RT5 state during the navigation high accuracy during the normal ART, the main CPU 101 sets EP as the game state of the next game. In this case, the main CPU 101 performs the initial EP process.

Further, when the number of remaining games in the ART state is updated to 0 during normal ART and the special CZ is not won, the main CPU 101 sets CZ (after ART) as the game state of the next game. Further, when the number of remaining games in the ART state is updated to 0 during normal ART and the special CZ is won, the main CPU 101 sets the special CZ as the game state of the next game.

[Contents of lottery during EP preparation]
Subsequently, with reference to FIG. 256, details of various lottery performed by the main CPU 101 of the main control circuit 90 during EP preparation will be described.

During EP preparation, when the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 refers to the BB winning stock lottery table during ART shown in FIG. 231 (C) at the time of BB winning, and is based on the lottery flag corresponding to the internal winning combination that is duplicated with BB. The ART lottery is performed, and when the BB is not won, the ART lottery is performed based on the lottery flag and whether or not the navigation is highly accurate with reference to the stock lottery table during ART shown in FIGS. 230 (H) and 230 (I).

When the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (B). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (C). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238.

When the ART lottery of (A) is non-winning, or following the rank lottery of (C), the main CPU 101 performs a lottery for acquiring the number of ART games of (D). In this lottery, the main CPU 101 refers to the ART game number acquisition lottery table shown in FIG. 243, and determines the number of ART games to be added according to the type of the winning BB. If the lottery is won, the main CPU 101 adds the number of games to be added to the current number of ART games, and ends the lottery to be performed in this game, but if the lottery is not won, the lottery is completed. The main CPU 101 ends the lottery to be performed in this game.

[Game state that shifts from EP preparation]
When the BB is activated during the EP preparation, the main CPU 101 sets the BB during ART as the game state of the next game. If the BB is hit during the EP preparation but the BB does not operate, the main CPU 101 sets between the ART flags as the game state of the next game.

Further, when the RT state shifts to the RT5 state during EP preparation, the main CPU 101 sets EP as the game state of the next game. In this case, the main CPU 101 performs the initial EP process.

[Details of lottery performed during EP]
Subsequently, with reference to FIG. 257, the details of various lottery performed by the main CPU 101 of the main control circuit 90 during the EP will be described.

During the EP, when the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 corresponds to the internal winning combination that is duplicated with the BB by referring to the BB winning stock lottery table during ART shown in FIGS. 231 (A), (B), and (D) at the time of BB winning. The ART lottery is performed based on the lottery flag and the fall mode during the EP, and when the BB is not won, the stock lottery table during the ART shown in FIG. 229 is referred to, and the lottery flag and the fall mode during the EP are used. Perform ART lottery.

When the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (B). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (C). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238.

When the ART lottery of (A) is non-winning, or following the rank lottery of (C), the main CPU 101 performs a lottery for acquiring the number of ART games of (D). In this lottery, the main CPU 101 refers to the ART game number acquisition lottery table shown in FIG. 243, and determines the number of ART games to be added according to the type of the winning BB.

If the lottery for acquiring the number of ART games in (C) is not won, the main CPU 101 performs the fall mode transition lottery in (E). In this lottery, the main CPU 101 determines and sets the fall mode of the transition destination based on the lottery flag and the current fall mode with reference to the fall mode shift lottery table shown in FIG. 245. Subsequently, the main CPU 101 ends the lottery to be performed in this game.

On the other hand, when the lottery for acquiring the number of ART games in (C) is won, the main CPU 101 adds the number of games to be added to the current number of ART games, and subsequently performs the lottery for shifting to the fall mode in (F). In this lottery, the main CPU 101 refers to the BB winning fall mode transition lottery table in EP shown in FIG. 246, and the migration destination falls based on the type of BB won during EP and the falling mode before migration. Determine the mode and set it. Subsequently, the main CPU 101 ends the lottery to be performed in this game.

[Game state transitioned from EP]
When the BB is activated during the EP, the main CPU 101 sets the BB during ART as the game state of the next game. If the BB is won during the EP but the BB does not operate, the main CPU 101 sets between the ART flags as the game state of the next game.

Further, when the state shifts to the RT state other than the RT5 state during the EP and the EP is in stock, the main CPU 101 sets the EP preparation as the game state of the next game. Further, when the state shifts to the RT state other than the RT5 state during the EP and there is no stock of the EP, the main CPU 101 normally sets the ART as the game state of the next game.

[CZ (after ART), next game after CZ (after ART), and lottery contents performed during special CZ]
Subsequently, with reference to FIG. 252, details of the next game in which the main CPU 101 of the main control circuit 90 ends CZ (after ART), the end of CZ (after ART), and various lottery performed during the special CZ will be described.

In the next game after CZ (after ART), CZ (after ART), and special CZ, when the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 is of (A). ART lottery is performed (lottery phases A to C described above). In this lottery, the main CPU 101 refers to the BB winning stock lottery table during ART shown in FIG. 231 (D) at the time of BB winning, and is based on the lottery flag corresponding to the internal winning combination that is duplicated with BB. ART lottery is performed, and when BB is not won, the lottery flag, CZ type (CZ (after ART), CZ) are referred to in the ART lottery table in CZ shown in FIGS. 226 (D) to 227 (H). The next game (after ART), or special CZ), and the ART lottery will be performed based on whether or not the navigation is highly accurate.

When the ART lottery of (A) is non-winning, the main CPU 101 makes the subsequent processing different depending on whether or not the stock in the ART state is released. As described above, the stock in the ART state is released at the timing when the number of remaining games of CZ in the continuous CZ becomes 0 (release phase D described above), so that this game ends CZ (after ART). During the next game, CZ (after ART) or special CZ in which the number of remaining games of CZ is 1 or more, the stock in the ART state is not released, and the lottery to be performed in this game ends. Also, since the stock cannot be released when there is no stock in the ART state, even if the number of remaining games in the CZ is 0 during CZ (after ART), if there is no stock in the ART state, ART The lottery that should be done in this game is finished without releasing the stock in the state (Note that the special CZ ends when the stock in the release phase D is released, so the number of sets in the ART state is always during the special CZ. Is stocked at least one).

On the other hand, when there is an ART state stock in a CZ (after ART) or a special CZ in which the number of remaining games in the CZ is 0, the main CPU 101 subsequently performs the release order lottery of (B). In this lottery, the main CPU 101 releases from the stocked ART states based on the rank set for the stocked ART states with reference to the stock release order lottery table shown in FIG. 239. The ART state of the stock to be released in Phase D is determined. After this lottery, the main CPU 101 erases the determined ART state from the stock of the ART state, and is promoted to the ranking ART of the next game based on the rank set for the determined ART state. Make a lottery.

On the other hand, when the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (C). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (D). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238.

Following the release order lottery of (B) or the rank lottery of (D), the main CPU 101 performs the acquisition lottery of the number of CZ games of (E). In this lottery, the main CPU 101 refers to the CZ game number acquisition lottery table shown in FIG. 242 (D) to determine the number of CZ games to be added, and adds the number of games to be added to the current number of CZ games. The lottery to be done in this game is finished.

[CZ (after ART), next game after CZ (after ART), and game state to shift from special CZ]
When the BB is activated during the next game after CZ (after ART), the end of CZ (after ART), and the special CZ, the main CPU 101 sets the BB during ART as the game state of the next game. Further, if the BB is hit during the ART precursor but the BB does not operate, the main CPU 101 sets between the ART flag as the game state of the next game.

Further, when the next game at the end of CZ (after ART), CZ (after ART), and the special CZ are selected for the ART lottery or the stock in the ART state is released, the main CPU 101 is in the game state of the next game. Rank and set ART as.

Further, in the next game of CZ (after ART), if the ART lottery is not won and there is a stock of CZ, the main CPU 101 sets the CZ precursor as the game state of the next game. In this case, the main CPU 101 draws and sets the number of precursor games of the mode and CZ.

Further, in the next game of CZ (after ART), if the ART lottery is not won and there is no stock of CZ, the main CPU 101 sets the normal state as the game state of the next game. In this case, the main CPU 101 draws and sets the mode, the lottery state in the normal state, and the number of high security certificate games.

[Details of lottery performed during normal flags]
Subsequently, with reference to FIG. 259, the details of various lottery performed by the main CPU 101 of the main control circuit 90 during the normal flag period will be described.

When the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 performs the ART lottery of (A) among the normal flags. In this lottery, the main CPU 101 refers to the normal ART lottery table shown in FIG. 224 (C), and performs an ART lottery based on the lottery flag corresponding to the internal winning combination that is duplicated with the carried-over BB. .. If the ART lottery of (A) is not won, the main CPU 101 ends the lottery to be performed in this game.

On the other hand, when the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (B). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (C). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238, and ends the lottery to be performed in this game.

[Game state that shifts from between normal flags]
If the BB operates during the normal flag and there is no stock of the number of sets in the ART state when the BB operates, the main CPU 101 sets the normal BB as the game state of the next game. Further, when the BB operates during the normal flag and there is a stock of the number of sets in the ART state when the BB operates, the main CPU 101 sets the BB in the ART as the game state of the next game.

[Contents of lottery normally performed during BB]
Subsequently, with reference to FIG. 260, the details of various lottery performed by the main CPU 101 of the main control circuit 90 during the normal BB will be described.

Normally, in the BB, when the lottery flag is determined based on the internal winning combination and the pushing order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 refers to the ART lottery table in BB shown in FIG. 247 (A), and performs the ART lottery based on the lottery flag.

If the ART lottery of (A) is not won, the main CPU 101 subsequently performs the CZ lottery of (B). In this lottery, the main CPU 101 refers to the CZ lottery table in BB shown in FIG. 247 (B), performs a CZ lottery based on the lottery flag, and ends the lottery to be performed in this game. If the CZ lottery is won, the main CPU 101 grants (stocks) one CZ right.

On the other hand, when the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (C). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (D). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238, and ends the lottery to be performed in this game.

[Game state that shifts from normal BB]
When the ART lottery of (A) is won during the normal BB, the main CPU 101 sets the BB during the ART as the game state of the next game. Further, when the number of medals paid out during the normal BB reaches a predetermined number and the operation of the BB is completed, the main CPU 101 sets the game state of the next game according to the presence or absence of various stocks. Specifically, when there is a stock of the number of sets in the ART state and there is no precursor game number in the ART state, the main CPU 101 sets the ART preparation as the game state of the next game.

Further, when there is a stock of CZ and there is no precursor game number of CZ, the main CPU 101 sets the first hit CZ as the game state of the next game. In this case, the main CPU 101 sets the mode and the lottery state in the normal state. Further, when there is a stock of CZ and there is a number of precursor games of CZ, the main CPU 101 sets the precursor of CZ as the game state of the next game. In this case, the main CPU 101 sets the mode and the lottery state in the normal state. Further, when neither the ART state nor the CZ stock is available, the main CPU 101 sets the normal state as the game state of the next game. In this case, the main CPU 101 sets the mode and the lottery state in the normal state.

[Details of lottery performed during the ART flag]
Subsequently, with reference to FIG. 261, details of various lottery performed by the main CPU 101 of the main control circuit 90 during the ART flag will be described.

When the lottery flag is determined based on the internal winning combination and the push order (see FIG. 208), the main CPU 101 performs the ART lottery of (A) among the flags during ART. In this lottery, the main CPU 101 refers to the stock lottery table in ART shown in FIG. 230 (K), and performs the ART lottery based on the lottery flag corresponding to the internal winning combination that is duplicated with the carried-over BB. .. If the ART lottery of (A) is not won, the main CPU 101 ends the lottery to be performed in this game.

On the other hand, when the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (B). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (C). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238, and ends the lottery to be performed in this game.

[Game state that shifts from between the flags during ART]
When the BB is activated during the ART flag, the main CPU 101 sets the ART BB as the game state of the next game.

[Contents of lottery during ART and BB]
Subsequently, with reference to FIG. 262, the details of various lottery performed by the main CPU 101 of the main control circuit 90 during ART and BB will be described.

In the BB during ART, when the lottery flag is determined based on the internal winning combination and the pushing order (see FIG. 208), the main CPU 101 performs the ART lottery of (A). In this lottery, the main CPU 101 refers to the ART lottery table in BB shown in FIG. 247 (A), and performs the ART lottery based on the lottery flag.

When the ART lottery of (A) is won, the main CPU 101 subsequently performs the ART stock number lottery of (B). In this lottery, the main CPU 101 determines and assigns the number of sets in the ART state based on the winning opportunity of the ART lottery with reference to the stock number lottery table at the time of ART winning shown in FIG. 232. Subsequently, the main CPU 101 performs the rank lottery of (C). In this lottery, the main CPU 101 determines the rank of the winning ART state with reference to the ART winning rank lottery table shown in FIGS. 234 to 238, and ends the lottery to be performed in this game.

Further, when the ART lottery of (A) is not won, or following the rank lottery of (C), the main CPU 101 performs the EP stock lottery of (D). In this lottery, the main CPU 101 refers to the EP stock lottery table in BB shown in FIG. 247 (C), and performs the stock lottery of EP based on the lottery flag. If the EP stock lottery of (D) is not won, the main CPU 101 ends the lottery to be performed in this game.

On the other hand, when the EP stock lottery of (D) is won, the main CPU 101 subsequently performs the fall mode lottery of (E). In this lottery, the main CPU 101 draws and sets the fall mode in the EP with reference to the fall mode lottery table shown in FIG. 244, and ends the lottery to be performed in this game.

[Game state transitioning from BB during ART]
When the number of medals paid out during the BB during the ART reaches the specified number and the operation of the BB is completed, the main CPU 101 sets the ART preparation as the game state of the next game.

<Control peculiar to pachislot 1>
The playability of the pachi-slot machine 1 of the present embodiment has been described above. Subsequently, the control peculiar to the pachi-slot machine 1 of the present embodiment will be described individually.

[ART lottery and rank lottery]
In the Pachislot 1 of the present embodiment, as shown in the ART lottery table in CZ of FIGS. 226 (A) and 226, the probability of winning the ART lottery in CZ depends on the number of remaining games in CZ, but the figure is shown in the figure. As shown in the 237 ART winning rank lottery table, the rank lottery in the CZ has the same tendency of the determined rank regardless of the number of remaining games in the CZ, but is not limited to this. That is, both the ART lottery and the rank lottery performed during the CZ (first hit CZ and continuous CZ) may be different depending on the number of remaining games in the CZ.

Here, FIGS. 263 and 264 are conceptual diagrams of an ART lottery and a rank lottery performed during the CZ, and FIGS. 263 (A) and 263 (B) show the number of remaining games in the CZ and each lottery performed during the CZ. An example of the relationship is shown. Further, among the tables conceptually shown in FIGS. 263 and 264, the table used for ART lottery is a table corresponding to the ART lottery table in CZ shown in FIG. 226 and the like, and the table used for rank lottery is shown in FIG. It is a table corresponding to the ART winning rank lottery table shown in 234 and the like.

In the pachi-slot machine 1, the main control circuit 90 may perform an ART lottery that wins with a different probability depending on the number of remaining games in the CZ. Specifically, as shown in FIG. 263 (A), by having a lottery table used for ART lottery for each remaining game number of CZ, ART lottery that wins with a different probability according to the number of remaining games of CZ is obtained. It can be carried out.

In the example shown in FIG. 263 (A), when the number of remaining games in CZ is "7,8 games", ART lottery is performed using table A, and the number of remaining games in CZ is "5,6". If it is a "game", an ART lottery is performed using the table B, and if the number of remaining games in the CZ is "3,4 games", an ART lottery is performed using the table C, and the remaining games in the CZ are performed. If the number is "1, 2 games", the ART lottery is performed using the table D, and if the number of remaining games in the CZ is "0 games", the ART lottery is performed using the table E. It is supposed to be.

In this case, the relationship between the number of remaining games in the CZ and the probability of winning the ART lottery can be arbitrarily set according to the table to be referred to. For example, the longer the number of remaining games in the CZ, the more the ART lottery is won. The probability may be increased, and conversely, the shorter the number of remaining games in CZ, the higher the probability of winning the ART lottery. By doing so, during CZ, the number of remaining games decreases as the CZ is digested, and the probability of winning the ART lottery gradually decreases or increases. In the case of the example shown in 262 (A), it can be realized by increasing or decreasing the probability of winning the ART lottery in the order of tables A, B, C, D, and E.

In addition, the probability of winning the ART lottery may be increased or decreased in a specific number of remaining games. In the case of the example shown in FIG. 263 (A), for example, the probability of winning the table B in the ART lottery is set to the highest, the probability of winning the table D in the ART lottery is set to the next highest, and the table E is set to the ART lottery. The probability of winning the ART lottery is set to the next highest, the probability of winning the table A to the ART lottery is set to the next highest, and the probability of winning the table B to the ART lottery is set to the next highest. It is possible to mix a high number of games and a low number of games.

Further, in the pachi-slot machine 1, the main control circuit 90 may make the lottery result of the rank lottery different according to the number of remaining games in the CZ. Specifically, as shown in FIG. 263 (A), by having a lottery table used for rank lottery for each remaining game number of CZ, the lottery result of rank lottery is made different according to the number of remaining games of CZ. be able to.

In the example shown in FIG. 263 (A), when the number of remaining games in the CZ is "7,8 games", a rank lottery is performed using the table V, and the number of remaining games in the CZ is "5,6". If it is a "game", a rank lottery is performed using the table W, and if the number of remaining games in the CZ is "3,4 games", a rank lottery is performed using the table X, and the remaining games in the CZ are performed. If the number is "1, 2 games", the rank lottery is performed using the table Y, and if the number of remaining games in the CZ is "0 games", the rank lottery is performed using the table Z. It is supposed to be.

In this case, the relationship between the number of remaining games in CZ and the lottery result of rank lottery can be arbitrarily set according to the table to be referred to. For example, the longer the number of remaining games in CZ, the more the ART state at the time of winning ART. A high rank may be easily determined as the rank of the game, and conversely, the shorter the number of remaining games in the CZ, the easier it is to determine the high rank as the rank of the ART state at the time of winning the ART. By doing so, during CZ, the number of remaining games decreases with the digestion of CZ, and the rank of the ART state at the time of winning ART gradually becomes lower or higher. In the case of the example shown in 262 (A), it can be realized by making it easy or difficult to determine the high rank as the rank of the ART state in the order of the tables V, W, X, Y, Z.

Further, with a specific number of remaining games, a high rank may be easily or difficult to be determined as the rank of the ART state. In the case of the example shown in FIG. 263 (A), for example, by making it easy or difficult to determine the high rank as the rank of the ART state in the order of the tables X, W, Z, V, Y, ART is performed at the time of winning the ART. It is possible to mix the number of games in which the high rank is easily determined and the number of games in which the high rank is difficult to be determined as the rank of the state.

In FIG. 263 (A), the number of remaining games in the CZ is the same between the ART lottery and the rank lottery performed during the CZ, but the number is not limited to this. For example, as shown in FIG. 263 (B), the ART lottery in the CZ has the remaining number of games in the CZ "7,8 games", "5,6 games", "3,4 games", "1,2 games", "0". While making it different according to the "game", the rank lottery in the CZ is different depending on the number of remaining games in the CZ "6,7,8 games", "4,5 games", "0,1,2,3 games". I'm letting you. By doing so, various lottery in the CZ can be further diversified, and the lottery can be made rich in playability.

Further, in the pachi-slot machine 1, the main control circuit 90 may perform ART lottery and rank lottery in the CZ depending on the presence or absence of stock of the number of sets in the ART state. Specifically, as shown in FIG. 264 (A), by having a lottery table used for ART lottery and a lottery table used for rank lottery for each presence or absence of stock of the number of sets in the ART state, the main control is performed in the CZ. The circuit 90 can perform ART lottery and rank lottery in which the lottery results differ depending on the presence or absence of stock of the number of sets in the ART state.

In the example shown in FIG. 264 (A), when there is a stock of the number of sets in the ART state, the ART lottery is performed using the table A, and the rank lottery is performed using the table Z to perform the ART state. When there is no stock of the number of sets, the ART lottery is performed using the table B, and the rank lottery is performed using the table Y.

In this case, the relationship between the presence or absence of stock of the number of sets in the ART state and the lottery results of the ART lottery and the rank lottery can be arbitrarily set according to the table to be referred to, for example, the number of sets in the ART state. When there is stock, the probability of winning the ART lottery is lower than when there is no stock, and it may be easier to determine a lower rank as the rank of the ART state, and conversely, the probability of winning the ART lottery is high. It may be easy to determine a high rank as a high rank in the ART state. Further, for example, when there is a stock of the number of sets in the ART state, the probability of winning the ART lottery is lower than when there is no stock, but a high rank may be easily determined as the rank of the ART state. On the contrary, although the probability of winning the ART lottery is high, a low rank may be easily determined as the rank of the ART state.

It should be noted that the control for making the lottery results of the ART lottery and the rank lottery different depending on the presence or absence of stock of the number of sets in the ART state is not limited to the CZ, but is any of the normal state, the ART state, and the BB state. Can also be applied.

Further, in the pachi-slot machine 1, the main control circuit 90 may perform ART lottery and rank lottery in the CZ in consideration of both the number of remaining games in the CZ and the presence or absence of stock of the number of sets in the ART state. Specifically, as shown in FIG. 264 (B), by having a lottery table used for ART lottery and a lottery table used for rank lottery for each presence or absence of stock of the number of remaining games in CZ and the number of sets in the ART state. During the CZ, the main control circuit 90 can perform an ART lottery and a rank lottery in which the lottery results differ depending on the presence or absence of stock of the number of remaining games in the CZ and the number of sets in the ART state.

In the example shown in FIG. 264 (B), when there is a stock of the number of sets in the ART state and the number of remaining games in the CZ is "7,8 games", the ART lottery is performed using the table A. When the number of remaining games in the CZ is "5, 6 games", the ART lottery is performed using the table B and the rank lottery is performed using the table W, and the rank lottery is performed using the table W. When the number of remaining games is "3,4 games", the ART lottery is performed using the table C and the rank lottery is performed using the table X, and the number of remaining games in the CZ is "1,2 games". In that case, the ART lottery is performed using the table D and the rank lottery is performed using the table Y, and when the number of remaining games in the CZ is "0 games", the ART lottery is performed using the table E. The rank lottery will be performed using the table Z.

On the other hand, when there is no stock of the number of sets in the ART state, when the number of remaining games in the CZ is "7,8 games", the ART lottery is performed using the table F and the rank lottery is performed using the table Q. When the number of remaining games in CZ is "5,6 games", ART lottery is performed using table G and rank lottery is performed using table R, and the number of remaining games in CZ is "3,4 games". If the number of games remaining in the CZ is "1, 2 games", the ART lottery is performed using the table H and the rank lottery is performed using the table S. If the number of games remaining in the CZ is "1, 2 games", the table I is used. ART lottery is performed and rank lottery is performed using table T. If the number of remaining games in CZ is "0 games", ART lottery is performed using table J and rank lottery is performed using table U. It is supposed to be.

In this case as well, the relationship between the number of remaining games in CZ and the number of sets in the ART state and the probability of winning the ART lottery, and the presence or absence of stock in the number of remaining games in the CZ and the number of sets in the ART state. , The point that can be arbitrarily set according to the table that refers to the relationship with the lottery result of the rank lottery is as described above. In addition, since the presence or absence of stock of the number of sets in the ART state is further considered in the example of FIG. 264 as compared with the example of FIG. 263, there are cases where there is stock of the number of sets in the ART state and cases where there is no stock. , ART lottery and rank lottery tendencies can also be different.

For example, if there is a stock of the number of sets in the ART state, the probability of winning the ART lottery becomes low (or high) as the number of remaining games decreases with the digestion of CZ, while the stock of the number of sets in the ART state becomes low (or high). If not, it can be set so that the probability of winning the ART lottery becomes higher (or lower) as the number of remaining games decreases with the consumption of CZ. Further, for example, the number of games that are easy to win in the ART lottery can be different depending on whether or not there is a stock of the number of sets in the ART state.

Of course, the same applies to the rank lottery in the ART state. For example, if there is a stock of the number of sets in the ART state, the lower (or higher) rank as the rank in the ART state decreases as the number of remaining games decreases with the digestion of CZ. While it is easy to determine, if there is no stock of the number of sets in the ART state, it is set so that the high (or low) rank as the rank of the ART state is easily determined as the number of remaining games decreases with the digestion of CZ. You can also do it. Further, for example, the number of games in which a high rank can be easily determined as the rank of the ART state can be different depending on whether or not there is a stock of the number of sets in the ART state.

Further, in FIGS. 264 (A) and 264 (B), the number of remaining games in the CZ is aligned between the ART lottery and the rank lottery performed during the CZ, but the number is not limited to this, and FIG. 263 (B) shows. As illustrated in, the number of remaining games in the CZ may be different between the ART lottery and the rank lottery performed during the CZ.

Similarly, in FIGS. 264 (A) and 264 (B), the number of remaining games of CZ is aligned between the ART lottery performed when there is stock in the ART state and the ART lottery performed when there is no stock in the ART state. The number of remaining games in the CZ is the same between the rank lottery performed when there is stock in the ART state and the rank lottery performed when there is no stock in the ART state, but the present invention is not limited to this.

For example, as shown in FIG. 264 (C), when there is no stock in the ART state, the ART lottery in the CZ is the remaining number of games in the CZ "7,8 games", "5,6 games", "3,4". The rank lottery in the CZ is the number of remaining games in the CZ "6,7,8 games", "4,5 games", "0,1". , 2, 3 games ”, and if there is stock in the ART state, the ART lottery in the CZ will be the number of remaining games in the CZ“ 5,6,7,8 games ”“ 2,3 , 4 games ”“ 0,1 games ”, while the rank lottery in CZ is the number of remaining games in CZ“ 6,7,8 games ”“ 3,4,5 games ”“ 0,1 , 2 games ”may be different. By doing so, various lottery in the CZ can be further diversified, and the lottery can be made rich in playability.

As described above, in the pachi-slot machine 1 of the present embodiment, when the ART lottery is won, the rank lottery is performed and the rank in the ART state is determined. In addition, during the ART state, based on this rank (more specifically, the lottery state determined from the rank), benefits such as adding the number of CZ games and shifting to EP (more specifically, giving the number of highly accurate navigation games). Therefore, the lower ranks are given only small benefits, while the higher ranks are given large benefits. Therefore, the rank of the ART state can be said to be the size of the privilege given to the player.

At this time, in the pachi-slot machine 1, the lottery result of the rank lottery is different depending on the presence or absence of stock of the number of sets in the ART state. For example, if there is a stock of the number of sets in the ART state, it is easy to determine a low rank in the rank lottery, and conversely, if there is no stock of the number of sets in the ART state, it is easy to determine a high rank in the rank lottery. can do. As a result, when the ART lottery is won with the stock of the number of sets in the ART state, a lower rank can be expected than when the lottery is won with the stock of the number of sets in the ART state. Therefore, expectations for benefits in the subsequent ART state are suppressed.

In this way, in Pachislot 1, when there is a stock of the number of sets in the ART state, the rank of the ART state is determined to be relatively low, so that it is excessive for the player when the ART is further won with the stock. It is possible to suppress the granting of profits.

If there is a stock of the number of sets in the ART state, it is easy to determine a high rank in the rank lottery, and conversely, if there is no stock of the number of sets in the ART state, it is easy to determine a low rank in the rank lottery. You can also do it. Even in such a case, the rank of the second and subsequent stocks will be high, but the rank of the first stock can be kept low, which will result in excessive profit for the player. It is possible to suppress the granting.

Further, in the pachi-slot machine 1, the lottery result of the ART lottery is also different depending on the presence or absence of stock of the number of sets in the ART state. For example, by facilitating the winning of the ART lottery when there is a stock of the number of sets in the ART state, it is possible to easily determine the lower rank of the ART lottery when there is stock. By making it difficult to win the ART lottery when there is a stock of the number of sets in the ART state, it is difficult to win the ART lottery when there is stock, and even if it is won, it is easy to determine a low rank. can. As a result, various lottery in the CZ can be further diversified, and the lottery can be made rich in playability.

Further, in the pachi-slot machine 1, the lottery results of the ART lottery and the rank lottery are different depending on the number of remaining games in the CZ. As a result, various lottery in the CZ can be further diversified, and the lottery can be made rich in playability.

In Pachislot 1, the rank in the ART state is information that affects the addition of the number of CZ games. Therefore, if a high rank is determined, it can be expected to add the number of CZ games, and as a result, CZ and ART. It can be expected that the loop with the state will continue, and the playability will be improved.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a start operation detecting means, a symbol changing means, an internal winning combination determining means, a stop operation detecting means, a reel stop control means (stop control means), and a winning determination means.

Further, the main control board 71 determines whether or not to perform an ART lottery and shift to the ART state, and determines the degree of advantage in the ART state (that is, the rank in the ART state) when shifting to the ART state. It functions as a determination means, a transition determination means, and a mode determination means.
As described above, the rank in the ART state is information that affects the privilege given during the ART state (for example, the addition of the number of CZ games). Determining the rank of the ART state is the same as determining the size of the privilege of the ART state (that is, the higher the rank, the more advantageous the ART state is, and therefore the larger the privilege to be granted).

Further, when the main control board 71 wins the ART lottery, the game state is shifted to the ART state, and the game in the ART state is controlled based on the rank determined by the rank lottery (that is, the CZ game based on the rank). It functions as a privilege granting means and an advantageous state control means in order to grant a privilege such as adding a number.

Further, when the main control board 71 wins the ART lottery, the number of rights of the ART state to be granted is determined and stored in the main RAM 103, and when the gaming state is shifted to the ART state, it is stored in the main RAM 103. It functions as a right management means because it erases one right in the ART state.

Further, the main control board 71 functions as a state control means and a high-probability state control means in order to control the game in the CZ. When the main control board 71 wins the ART lottery during the CZ, the CZ is interrupted to shift the gaming state to the ART state, and then, when the ART state ends, the interrupted CZ is restarted. , CZ and ART state loop is realized.

[One ART lottery for crying after the end of CZ]
In the pachi-slot machine 1 of the present embodiment, even in the normal state, in the next one game in which the CZ is completed, an ART lottery with a high probability of winning is performed (see FIGS. 226 and 227). From the viewpoint of the player, since it is possible to have the expectation of the transition to the ART state even after the CZ is completed, it is possible to suppress the decline in the interest of the game.

In particular, in the pachi-slot machine 1 of the present embodiment, when the CZ is changed to the ART state, the number of remaining games of the CZ is added, but even when the ART lottery is won in the next one game in which the CZ is completed, the remaining CZ is left. The number of games is added, and as a result, the loop between the CZ and the ART state that ended with the end of the CZ is restarted, so that the fun of the game is improved. If the game state shifts to the ART state in the final game of CZ (the number of remaining games is "0") and "5 games" is added to the number of CZ games, the remaining number of CZ games at the end of the ART state is reached. Is "5 games". In addition, even if the ART lottery is won in the next one game in which the CZ is completed, the game state shifts to the ART state, and "5 games" is added to the number of CZ games, the CZ game at the end of the ART state is also obtained. The rest of the numbers are "5 games".

Further, the production content in the next one game in which the CZ is completed is arbitrary. For example, in the next one game in which the CZ ends, an end screen displaying the result of the advantageous section due to the loop between the CZ and the ART state is displayed, and the ART lottery in the next one game in which the CZ ends is won. Alternatively, the effect screen may be switched by reversing from this end screen. Further, the result of the advantageous section due to the loop between the CZ and the ART state is displayed in the final game of the CZ, and at the start of the next game (the next one game in which the CZ ends), the normal production in the normal state is performed. The screen may be displayed. In this case, if the ART lottery is won in the next game after the CZ is completed, for example, the normal effect screen is switched to the confirmation screen at any timing such as the first stop operation to the third stop operation. May be good.

Further, in the pachi-slot machine 1 of the above embodiment, the ART lottery with a high winning probability is performed in the next one game in which the CZ is completed, but the present invention is not limited to this. Since the continuous CZ and ART states are performed during the high RT state, for example, the ART lottery with a high winning probability may be performed only for one game at the timing of shifting to the low RT state after the end of the CZ. That is, at the end of the continuous CZ, the main control circuit 90 performs an ART lottery with a high winning probability only in the next one game in which the RT state shifts to any of the RT0 to RT2 states, and the first hit CZ. At the end, if the RT state at the end of the first hit CZ is already RT0 to RT2, ART lottery with a high winning probability is performed in the next game after the first hit CZ ends, and at the end of the first hit CZ. If the RT state of is RT4 state or RT5 state, the ART lottery with a high winning probability shall be performed only in the next one game in which the RT state shifts to any of the RT0 to RT2 states after the first hit CZ ends. May be.

Further, the ART lottery is performed based on the lottery flag, and the lottery flag is determined according to the internal winning combination and the presence / absence of the navigation section (see FIG. 208 (B)). The lottery result of the ART lottery in the next one game in which the CZ is completed will be different depending on whether or not one game is set as the navigation section. In this respect, the next game after the CZ is completed may be a navigation section, a non-navigation section, a navigation section during navigation high accuracy, and a navigation section during non-navigation high accuracy. May be.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a start operation detecting means, a symbol changing means, an internal winning combination determining means, a stop operation detecting means, a reel stop control means (stop control means), and a winning determination means.

Further, the main control board 71 performs an ART lottery, and when the ART lottery is won, the game state is changed to the ART state, so that the main control board 71 functions as a grant determination means and a privilege granting means.
Further, when the main control board 71 wins the ART lottery, the number of rights of the ART state to be granted is determined and stored in the main RAM 103, and when the gaming state is shifted to the ART state, it is stored in the main RAM 103. It functions as a privilege management means because it erases one right in the ART state.

Further, the main control board 71 functions as a state control means for controlling the game in the CZ. When the main control board 71 wins the ART lottery during the CZ, the CZ is interrupted to shift the game state to the ART state, and then, when the ART state ends, the interrupted CZ is restarted. , A loop between the CZ and the ART state is realized, but at this time, since the number of CZ games is added along with the transition from the CZ to the ART state, it functions as a high-probability state addition means.

[Rank lottery at the time of ART winning]
In the pachi-slot machine 1 of the present embodiment, when the ART lottery is won, the rank lottery is performed. For example, the main control circuit 90 refers to the ART winning rank lottery table shown in FIGS. 234 (A) to 238 (N) for the first stock of the ART state won in the ART lottery, and the ART winning. The rank at the time of ART winning is determined based on the internal winning combination of time (more specifically, the lottery flag), and for the second and subsequent stocks, the ART winning rank lottery shown in FIG. 238 (O). Refer to the table to determine the rank at the time of winning the ART.

Since the rank at the time of winning the ART is referred to for determining the lottery state of the ART state, if a high rank is determined at the time of winning the ART, the number of CZ games is added in the subsequent ART state. On the contrary, if a low rank is determined at the time of winning the ART, it may be difficult to add the number of CZ games in the subsequent ART state, and the games in the ART state are standardized. It can be prevented from being stored. In addition, since the rank at the time of winning the ART is determined based on the internal winning combination at the time of winning the ART, if the ART lottery is won with a strong role during CZ, there is an expectation for the subsequent ART state. It can improve the fun of the game.

Further, the rank at the time of winning the ART is suggested via the display device 11 under the control of the sub-control circuit 200 (see FIG. 212 (C)). Specifically, the sub-control circuit 200 has "weapon S", "weapon A", and "weapon B" for the first stock (that is, the stock whose rank at the time of ART winning is determined based on the internal winning combination). By displaying images corresponding to "Weapon C" and "Weapon D", an effect suggesting the rank of the first stock at the time of winning the ART is performed. On the other hand, for the second and subsequent stocks, the sub-control circuit 200 does not suggest the rank at the time of winning the ART by displaying the image corresponding to the "weapon?".

It should be noted that the timing at which the sub-control circuit 200 performs an effect that suggests or does not suggest the rank at the time of winning the ART is the timing at which the main control circuit 90 releases the stock in the ART state (that is, the game is based on the given stock in the ART state. It is the timing to shift the state to the ART state). Here, when a plurality of stocks in the ART state are given at one time in the ART lottery in the CZ, the main control circuit 90 shifts the game state from the CZ to the ART state once after the ART is won, so that the first one. The stock is released, and then, when the number of remaining games in the CZ is exhausted, the game state is changed from the CZ to the ART state, and the second stock is released. Therefore, the sub-control circuit 200 suggests the rank by displaying the image corresponding to the weapon rank at the time of ART winning for the first stock, and the second and subsequent stocks are the number of remaining games of CZ. By displaying the image corresponding to "Weapon?" When there is no more (release phase D), the rank at the time of winning the ART is not suggested.

Further, the rank of the ART state (lottery state) is determined through a two-stage lottery of a rank lottery at the time of winning the ART and a promotion lottery during the rank determination ART. The sub-control circuit 200 suggests the (provisional) rank at the time of winning the ART by displaying an image corresponding to the weapon rank, while performing the effect using the effect stage according to the lottery state during the ART state. Then, the confirmed rank (lottery state) after the promotion lottery is notified (see FIG. 212 (C)). For the player, since the degree of advantage of the current ART state can be grasped from the production stage during the ART state, various expectations can be expected for the subsequent game, and the interest is improved.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a start operation detecting means, a symbol changing means, an internal winning combination determining means, a stop operation detecting means, a reel stop control means (stop control means), and a winning determination means.

Further, the main control board 71 performs an ART lottery to determine whether or not to shift to the ART state, and when the ART lottery is won, the gaming state shifts to the ART state. It functions as a privilege determination means and a privilege granting means. Further, the main control board 71 performs a rank lottery when the ART lottery is won, determines the rank at the time of the ART winning based on the lottery flag determined from the internal winning combination at the time of the ART winning, and is promoted during the rank determination ART. In order to determine the lottery state of the ART state from the rank at the time of winning the ART by performing the lottery, the mode determination means, the mode determination information determination means, and the privilege determination means (note that the privilege in this case is the privilege of shifting to the ART state. Means).

Further, the main control board 71 grants a privilege such as adding the number of CZ games during the ART state based on the rank at the time of winning the ART (more specifically, the lottery state determined from the rank) during the ART state. Therefore, it functions as a means for giving benefits.

Further, when the main control board 71 wins the ART lottery, the number of rights of the ART state to be granted is determined and stored in the main RAM 103, and when the gaming state is shifted to the ART state, it is stored in the main RAM 103. It functions as a right management means because it erases one right in the ART state.

Further, since the main control board 71 manages the games in the CZ and ends the CZ when the number of remaining games in the CZ becomes 0, the main control board 71 functions as a high-probability state control means and a state control means.

Further, the sub-control board 72 and the display device 11 perform an effect of suggesting the rank at the time of ART winning, and when a plurality of stocks are stocked at one time of ART winning, the rank at the time of ART winning for the first stock is suggested. On the other hand, since it does not suggest the rank of the second and subsequent stocks at the time of winning the ART, it functions as a directing means.

[Rank promotion lottery during rank determination ART]
In the pachi-slot machine 1 of the present embodiment, in the first game (rank determination ART) that has transitioned to the ART state, the rank determined at the time of winning the ART is promoted to determine the lottery state during the ART state. Then, in the pachi-slot machine 1, since the number of CZ games is added and the number of highly accurate navigation games is added according to the lottery state during the ART state, the playability in the ART state differs depending on the lottery state.

Here, in Pachislot 1, the lottery state is determined through a two-step lottery of a rank lottery at the time of winning the ART and a promotion lottery during the rank determination ART. Therefore, for example, the lottery result of the rank lottery is not preferable. However, the lottery result of the promotion lottery may give a preferable result, and the playability in the ART state can be diversified. In addition, the rank lottery at the time of ART winning is performed based on the internal winning combination at the time of ART winning (more specifically, the lottery flag determined from the internal winning combination), and the promotion lottery is performed based on the internal winning combination (more specifically, the internal winning combination during the rank determination ART). More specifically, since it is performed based on the lottery flag determined from the internal winning combination), for example, if a strong winning combination is used as an opportunity to win an ART lottery, not only can the subsequent ART status be expected, but also a weak winning combination can be expected. Even if the ART lottery is won in the wake of the above, by winning a strong role during the rank determination ART, it is possible to expect the subsequent ART state, and the fun of the game is improved.

Further, if a privilege such as an addition of the number of CZ games is given based on the lottery state during the ART state, a loop between the CZ and the ART state can be expected after that, and the fun of the game is further improved.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a start operation detecting means, a symbol changing means, an internal winning combination determining means, a stop operation detecting means, a reel stop control means (stop control means), and a winning determination means.

Further, the main control board 71 performs an ART lottery to determine whether or not to shift to the ART state, and when the ART lottery is won, the gaming state shifts to the ART state. Function. Further, the main control board 71 performs a rank lottery when the ART lottery is won, and determines the rank at the time of the ART winning based on the lottery flag determined from the internal winning combination at the time of the ART winning, as a mode determination information determining means. Function.

Further, the main control board 71 performs a promotion lottery based on the lottery flag determined from the internal winning combination during the rank determination ART, promotes the rank at the time of the ART winning, and determines the lottery state in the ART state, so that the mode is determined. Functions as a means. In the pachi-slot machine 1 of the present embodiment, the first game in the ART state is ranked and the promotion lottery is performed as ART, but the present invention is not limited to this, and in the game after the game won in the ART lottery. You may also perform a promotion lottery.

Further, the main control board 71 functions as a privilege giving means because the privilege such as the addition of the number of CZ games is given based on the lottery state determined in the promotion lottery during the ART state.

[ART lottery at the time of self-help RT5 transition in the normal state]
In the pachi-slot machine 1 of the present embodiment, the RT state is shifted based on the RT transition symbol, and when the correct answer is given in the push order during the normal state, the state shifts to the RT4 state or the RT5 state, which is the high RT state even in the normal state. I have something to do. For example, as shown in FIG. 265 (A), when the "3-choice promotion lip" is determined as the internal winning combination in the RT4 state, if the correct answer is given in the order of pressing the winning "3-choice promotion lip", the abbreviation "strong chance lip" is given. (RT5 transition symbol) ”is stopped and displayed (see FIG. 205), and the RT state shifts from the RT4 state to the RT5 state.

Here, referring to the normal ART lottery table shown in FIG. 224, the lottery flag "strong chance lip" when the symbol combination related to the abbreviation "strong chance lip (RT5 transition symbol)" is stopped and displayed is the normal time. It can be seen that it is a lottery flag that is easy to win in the ART lottery.

Further, in the RT5 state, "F_7 rip A", "F_7 rip B", and "F_BAR rip" corresponding to the lottery flags "7 set" and "BAR set" that are always won in the normal ART lottery are determined as internal winning roles. High probability (see FIG. 180). Therefore, it can be said that the RT5 state in the normal state has a higher probability of winning the ART lottery than the RT4 state in the normal state.

Further, as shown in FIG. 265 (A), when the "6 choice fall rip" is determined as the internal winning combination in the RT5 state, if the winning "6 choice fall rip" is pressed in the wrong order, the abbreviation "Koyama replay" is used. (RT4 transition symbol) ”is stopped and displayed, and the RT state shifts (falls) from the RT5 state to the RT4 state. The symbol combination related to "Rip" is stopped and displayed (see FIG. 205), and as a result, the RT state is maintained in the RT5 state.

If the RT state can be maintained in the RT5 state, it is preferable to be able to receive the ART lottery that wins with a high probability in the RT5 state, but if the RT state falls to the RT4 state. Even if there is, referring to the CZ lottery table by state in FIG. 221, the lottery flag "weak chance lip" corresponding to the symbol combination related to the abbreviation "Koyama replay" displayed at the time of falling is displayed when the RT state is maintained. It is easier to win the CZ lottery at the normal time than the "normal lip" corresponding to the symbol combination related to the combination name "C_CU lip".

As described above, in the pachi-slot machine 1 of the present embodiment, it is possible to expect the winning of the ART lottery at the timing when the RT4 state is changed to the RT5 state (that is, the entrance of the RT5 state), and the RT5 state is changed to the RT4 state. You can expect to win the CZ lottery at the timing (that is, the exit of the RT5 state). In other words, in pachislot 1, it can be expected that benefits (ART state and CZ) will be given at both the entrance and the exit to the RT5 state where the ART lottery is won with high probability.

Although the pachi-slot machine 1 of the above embodiment shows an example in which no notification (navigation) is performed during the normal state, a predetermined notification may be performed even during the normal state. FIG. 265 (B) is a diagram showing an example of navigation control in a normal state. As shown in FIG. 265 (B), the pachi-slot machine 1 can include a normal navigation state and a non-navigation state as the navigation state in the normal state.

The normal navigation state is a state in which the player is notified of the push order within a certain range, and the non-navigation state is a state in which no notification is performed. Although a certain range is arbitrary, the pachi-slot machine 1 can, for example, notify the correct push order at the time of winning the "three-choice promotion lip" for shifting to the RT5 state. By doing so, it becomes easy to shift to the RT5 state in which the ART lottery is won with a high probability during the normal navigation state.

In addition, during the normal navigation state, instead of or in addition to the notification at the time of winning the "3-choice promotion lip", the correct push order is given at the time of winning the "6-choice fall lip" to avoid falling to the RT4 state. It may be notified. By doing so, once the RT5 state can be entered during the normal navigation state, the ART lottery in the RT5 state can be received while avoiding the fall to the RT4 state.

The method for shifting from the non-navigation state to the normal navigation state during the normal state is arbitrary. For example, it may be determined by lottery based on the lottery flag, and only the RT5 state is shifted. It may be possible to enter the normal navigation state with a predetermined probability at the timing when the RT4 state is changed to the normal navigation state. Here, referring to FIG. 178, the RT4 state is shifted to the RT4 state by correctly answering in the push order at the time of winning the "6 choice rush rip" in the RT2 state (the symbol combination related to the abbreviation "Oyama replay" is stopped and displayed). .. Therefore, for example, the main control circuit 90 of the pachi-slot machine 1 may determine whether or not to shift to the normal navigation state at the timing of shifting from the RT2 state to the RT4 state.

Further, the method for shifting from the normal navigation state to the non-navigation state is also arbitrary, for example, it may be determined by lottery based on the lottery flag, and the game in the normal navigation state is performed a predetermined number of times. It may be possible to shift from the normal navigation state to the non-navigation state on the condition that the normal navigation state is changed to the non-navigation state on the condition that the number of notifications performed during the normal navigation state reaches a specific number of times. It may be that.

Further, in the pachi-slot machine 1 of the above-described embodiment, when "F_7 rip A", "F_7 rip B", and "F_BAR rip" are determined as internal winning combinations, the abbreviations "7-matched rip" and "BAR-matched" are determined regardless of the mode of the stop operation. The symbol combination related to "Rip" is stopped and displayed (see FIG. 205), but the present invention is not limited to this. That is, when "F_7 rip A", "F_7 rip B", and "F_BAR rip" are determined as internal winning combinations, the mode of the stop operation is a predetermined mode (for example, if the correct answer is given in the order of pressing), the abbreviation " When the symbol combination related to "7-matched rip" and "BAR-matched rip" is stopped and displayed, and the mode of the stop operation is not a predetermined mode (for example, if the pressing order is incorrect), the abbreviations "7-matched rip" and "BAR-matched rip" are used. The symbol combination according to "" may not be stopped and displayed (for example, the symbol combination related to the abbreviation "fake clip" may be stopped and displayed).

In this case, if "F_7 rip A", "F_7 rip B", and "F_BAR rip" are determined as internal winning combinations during the RT5 state, a lottery flag is determined when the reels are stopped, and ART lottery is performed by the lottery flag. It will be. That is, in the main control circuit 90, when "F_7 rip A", "F_7 rip B", and "F_BAR rip" are determined as internal winning combinations during the RT5 state, the symbols related to the abbreviations "7 matching rip" and "BAR matching rip". When the combination is stopped and displayed, ART lottery is performed based on the lottery flags "7 alignment" and "BAR alignment".

Further, when the "F_7 rip A", "F_7 rip B", and "F_BAR rip" are used as the push order role in this way, the correct push order may be notified during the above-mentioned normal navigation state. As a result, during the normal navigation state, the ART lottery will be won with a high probability during the RT5 state, but during the non-navigation state, the ART lottery will not be won unless the correct answer is given during the RT5 state. Diversify.

In the pachi-slot machine 1 of the present embodiment, when the ART lottery is won during the normal state, the game state is shifted to the ART precursor, and then the game state is shifted to the ART state after the ART preparation is being performed. In this respect, since the RT5 state is a high RT state in which the ART state is performed, when the ART lottery at the normal time based on the lottery flag "strong chance lip", which is the entrance of the RT5 state, is won, or during the RT5 state. In the case of winning an ART lottery in a normal place based on the lottery flags "7 alignment" and "BAR alignment", it may be shifted to the ART state without shifting to the ART precursor.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a start operation detecting means, a symbol changing means, an internal winning combination determining means, a stop operation detecting means, a reel stop control means (stop control means), and a winning determination means.

Further, the main control board 71 shifts the RT state to the RT5 state when the symbol combination related to the abbreviation "strong chance lip (RT5 transition symbol)" is stopped and displayed during the RT4 state, and the abbreviation "Koyama" during the RT5 state. When the symbol combination related to "replay (RT4 transition symbol)" is stopped and displayed, the RT state is shifted to the RT4 state, so that it functions as an RT transition means.

Further, the main control board 71 performs ART lottery and CZ lottery based on the lottery flag, and when the lottery is won, the game state shifts to the ART state or the CZ state, and thus, as a grant determination means and a privilege granting means. Function. The ART lottery performed by the main control board 71 will be won with a predetermined probability when the symbol combination related to the abbreviation "strong chance lip" is stopped and displayed at the time of winning the "three-choice promotion lip", and also "F_7 lip". Be sure to win when "A", "F_7 Lip B", and "F_BAR Lip" are won (when used as a push order role, when the abbreviation "7 Matching Lip" and "BAR Matching Lip" are stopped and displayed). .. Further, in the CZ lottery performed by the main control board 71, when the symbol combination related to the abbreviation "Oyama Lip" is stopped and displayed at the time of winning the "6 choice fall lip", the symbol combination related to the combination name "C_CU Lip" is stopped and displayed. You will win with a higher probability than if you did.

Further, the main control board 71 determines whether or not to shift to the normal navigation state during the normal navigation state, and notifies the push order within a certain range during the normal navigation state. Functions as a means and a means of notification. Note that the notification of the push order can also be performed by a device controlled on the sub side such as a liquid crystal display, and in this case, the sub control board 72 also functions as the notification means.

[Transition to ART state triggered by transition to RT3 state]
In the pachi-slot machine 1 of the present embodiment, the RT state is shifted based on the RT transition symbol, and when the symbol combination related to the abbreviation "weak chelip (RT3 transition symbol)" is stopped and displayed in the RT2 state, the RT state is changed to the RT3 state. In addition, the privilege of stocking the number of sets in the ART state is given (see FIG. 209 (B-2)). In addition, since the symbol combination related to the abbreviation "weak chelip (RT3 transition symbol)" is stopped and displayed when "F_weak chelip" is determined as the internal winning combination, the RT state shifts to the RT3 state. The fact that the symbol combination related to the abbreviation "weak chelip (RT3 transition symbol)" is stopped and displayed during the RT2 state and that "F_weak chelip" is determined as the internal winning combination during the RT2 state are the same. means.

Further, in the above embodiment, the number of sets of the ART state is always given when the RT state shifts to the RT3 state, but the present invention is not limited to this, and the RT state shifts to the RT3 state. In this case, the number of sets in the ART state may be given with a predetermined probability.

Here, during the RT3 state, "F_weak chelip" is determined as an internal winning combination with a high probability (18752/65536) (see FIG. 180), so if it is possible to shift to the RT3 state, the abbreviation "weak chelip" is used. The symbol combination according to is frequently displayed. From the player's point of view, the frequent display of the symbol combinations related to the abbreviation "weak chelip" gives them a sense of expectation that they are in the RT3 state, that is, that the stock in the ART state is given. Become. As described above, in the pachi-slot machine 1 of the present embodiment, when "F_weak chelip" is continuously determined as the internal winning combination, it is possible to have the expectation that the privilege of stock in the ART state is given.

Further, in pachislot 1, "F_weak chelip" is determined as an internal winning combination with a predetermined probability, but even if the symbol combination related to the abbreviation "weak chelip" is stopped and displayed, it is set as an RT state that does not shift to another RT state. , Has RT1 state. Here, in the case of not having such an RT1 state, if the symbol combination related to the abbreviation "weak chelip" is stopped and displayed, the state shifts to the RT3 state, so that "F_weak chelip" is continuously performed. Regardless of whether or not you win, you can have the expectation that the privilege of stock in the ART state is given from the stop display of the symbol combination related to the abbreviation "weak chelip" once. On the other hand, by providing an RT state that does not shift to the RT3 state even if the symbol combination related to the abbreviation "weak chelip" is stopped and displayed, the player is staying in the RT3 state for the first time from the continuous winning of "F_weak chelip". As a result, you can have the expectation that the privilege of stock in the ART state will be given for the first time from the continuous winning of "F_weak chelip".

In addition, the privilege given in the wake of the transition to the RT3 state is the ART state performed during the high RT state, but during the high RT state, the symbol combination related to the abbreviation "weak chelip" is stopped and displayed. The "F_weak chelip" is not determined as an internal winning combination (see FIG. 180), and the pachi-slot machine 1 does not shift from the high RT state to the RT3 state. This makes it possible to clarify the role of each RT state.

In the RT3 state, there is a high probability that "F_weak chelip" is determined as an internal winning combination, but various lottery associated with the "F_weak chelip" winning in the RT3 state can be arbitrarily set. That is, at the time of winning the "F_weak chelip" in the RT3 state, the ART lottery and the CZ lottery may always be unwinned (or the lottery itself is not performed), and even in the RT3 state, the "F_weak" may be won. At the time of winning the "Cherip", the ART lottery and the CZ lottery may be won with a predetermined probability. The winning probability of the ART lottery and the CZ lottery at the time of winning the "F_weak chelip" in the RT3 state is the lottery flag "weak" in the state-specific CZ lottery table shown in FIG. 221 or the normal ART lottery table shown in FIG. 224. By specifying the lottery value corresponding to "cherry", it can be set arbitrarily.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a start operation detecting means, a symbol changing means, an internal winning combination determining means, a stop operation detecting means, a reel stop control means (stop control means), and a winning determination means.

Further, when the symbol combination related to the abbreviation "weak chelip (RT3 transition symbol)" is stopped and displayed during the infinite RT state, the main control board 71 shifts the RT state to the RT3 state, while during the finite RT state. Even if the symbol combination related to the abbreviation "weak chelip (RT3 transition symbol)" is stopped and displayed, the RT state is maintained without transition, and when 20 games are played during the RT3 state, the RT state is changed to RT3. It functions as an RT transition means for transitioning from the state to the RT0 state.

Further, the main control board 71 assigns a set number of ART states when the RT state shifts to the RT3 state, and then shifts the gaming state to the ART state when the RT state shifts from the RT3 state to the high RT state. Therefore, it functions as a means for determining grant and a means for granting benefits.

[Control when the push order bell is won]
In the pachi-slot machine 1 of the present embodiment, the symbol combination for which the stop display is displayed on the effective line is different according to the order of the stop operations (push order) when the push order bell is won. In a normal ART machine, if the push order at the time of winning the push order bell is incorrect, some disadvantage (for example, transition to the RT state) will occur, but in the pachi-slot machine 1 of the present embodiment, the push order is Even if the answer is incorrect, it may not suffer any disadvantage. Hereinafter, the control at the time of winning the push order bell in the pachi-slot machine 1 of the present embodiment will be described with reference to FIGS. 266 to 268.

In the following, "1 stop mistake" means that the type of the stop button to be operated in the first stop operation is wrong (in other words, the first push order is wrong), and similarly, "2 stop mistake". Means that the type of stop button to be operated in the second stop operation is wrong (in other words, the second pressing order is wrong), and "3 stop mistake" should be operated in the third stop operation. It means that the type of the stop button is wrong (in other words, the third pressing order is wrong). On the contrary, the fact that the type of the stop button to be operated in the first stop operation is correct (in other words, the first pressing order is correct) is called "1 stop correct answer" and is operated in the second stop operation. The correct type of stop button to be operated (in other words, the correct second pressing order) is called "2 stop correct answer", and the correct type of stop button to be operated in the 3rd stop operation (in other words, is correct). The third push order is correct) is called "three stop correct answer".

Further, in FIG. 266, the combination name "C_TP bell" means the combination names "C_TP bell_01" to "C_TP bell_18" among the symbol combinations related to the abbreviation "bell", and the combination name "C_CT bell" is used. , The combination name "C_CT bell_01" to "C_CT bell_06" in the symbol combination related to the abbreviation "bell", and the combination name "C_CU bell" is the combination name among the symbol combinations related to the abbreviation "bell". It means "C_CU bell_01" to "C_CU bell_18", and the combination name "C_BT bell" means the combination name "C_BT bell_01" to "C_BT bell_09" among the symbol combinations related to the abbreviation "bell". The combination name "C_CD bell" means the combination names "C_CD bell AAA_01" to "C_CD bell BBB" among the symbol combinations related to the abbreviation "bell".

Further, the combination name "C_left transition combination" refers to the combination names "C_left transition combination_01" to "C_left transition combination_03" among the symbol combinations related to the abbreviation "RT0 transition symbol", and the combination name "C_". The "middle transition role" means the combination names "C_middle transition role A_01" to "C_middle transition role B_06" among the symbol combinations related to the abbreviation "RT0 transition symbol", and the combination name "C_right transition role" is. , Refers to the combination names "C_right transition combination_01" to "C_right transition combination_06" among the symbol combinations related to the abbreviation "RT0 transition symbol".

Further, the combination name "R_3rd transition" refers to the combination names "R_3rd transition_01" to "R_3rd transition_18" among the symbol combinations related to the abbreviation "RT2 transition symbol", and the combination name "R_2nd transition" is an abbreviation. The combination names "R_2nd transition_01" to "R_2nd transition_09" among the symbol combinations related to the "RT2 transition symbol" are referred to, and the combination name "R_1st transition" is the symbol combination related to the abbreviation "RT2 transition symbol". The combination names are "R_1st transition_01" to "R_1st transition_18" (see FIGS. 197 to 204).

FIG. 266 is a diagram showing a correspondence relationship between the push order at the time of winning the push order bell and the symbol combination displayed as a stop. As shown in FIG. 266, the internal winning combination "pushing order bell (" F_123 bell A "to" F_321 bell B ")" has different symbol combinations displayed according to the pushing order, and the pushing order is correct. Is displayed along the valid line in any of the displayable symbol combinations shown in FIGS. 183 to 196 among the symbol combinations related to the combination name "C_TP bell".

On the other hand, if the push order is not correct, the symbol combinations that are stopped and displayed differ according to the order in which the push order is incorrect. "R_2nd transition" "R_1st transition") ", the symbol combination shown in FIG. 266 is stopped and displayed. For example, when the internal winning combination is "F_123 bell A" to "F_132 bell B", the push order of the first correct answer is left, so when the push order is "123" or "132", one stop. If the answer is correct and the push order is "213", "231", "312", or "321", one stop error will occur.

Further, when two stops are missed, the symbol combination shown in FIG. 266 among the symbol combinations related to the abbreviation "RT0 transition symbol (" C_left transition combination "," C_middle transition combination "," C_right transition combination ")" is stopped and displayed. Will be done. For example, when the internal winning combination is "F_123 bell A" or "F_123 bell B", the push order of the second correct answer is medium, so when the push order is "123", the push order is 2 stops and the push is made. When the order is "132", there is a 2-stop miss, and when the push order is "213", "231", "312", "321", there is a 1-stop miss.

As described above, in the pachi-slot machine 1 of the present embodiment, if the push order bell is incorrect and the push order is incorrect, the symbol combination related to the combination name "C_CD bell" or the abbreviation "RT2 transition symbol" is stopped and displayed when one stop is missed. In addition, when two stops are missed, the symbol combination related to the abbreviation "RT0 transition symbol" is stopped and displayed. Since the combination name "C_CD bell" is not an RT transition symbol, in the pachi-slot machine 1 of the present embodiment, the RT state may not shift even when the push order is incorrect. Further, since the RT state of the migration destination is different between the abbreviation "RT2 transition symbol" and the abbreviation "RT0 transition symbol", the RT state of the migration destination at the time of incorrect answer in the push order is different in the pachi-slot machine 1 of the present embodiment. Become. On the other hand, since the abbreviation "bell" is not an RT transition symbol, the RT state does not shift even if the symbol combination related to the abbreviation "bell" is stopped and displayed (that is, the main control circuit 90 changes the RT state to the current RT. Keep it in that state).

Further, when one stop is missed, the symbol combination related to the combination name "C_CD bell" or the abbreviation "RT2 transition symbol" is stopped and displayed, but in the pachi-slot machine 1 of the present embodiment, it is stopped according to the timing of the stop operation. The combination of symbols to be displayed is different. Here, referring to FIG. 266, it can be seen that in the pachi-slot machine 1, the four push order bells are grouped into one group. Specifically, in pachislot 1, "F_123 bell A", "F_123 bell B", "F_132 bell A", and "F_132 bell B" are grouped in the push order bell group in which the first correct push order is on the left. , "F_213 Bell A" "F_213 Bell B" "F_231 Bell A" "F_231 Bell B" are the group of push order bells in which the first correct push order is in the middle, and "F_312 Bell A" "F_312 Bell B" "F_321 bell A" and "F_321 bell B" are a group of push order bells in which the push order of the first correct answer is right.

In the pachi-slot machine 1, in each of these four push order bells, the timing of the stop operation in which the symbol combination related to the combination name “C_CD bell” is stopped and displayed at the time of one stop mistake is different. As an example, to explain the stop control at the time of one stop mistake in the group of "F_123 bell A" to "F_132 bell B", when the internal winning combination is "F_123 bell A", the symbol position "0" on the effective line. When the stop operation is performed at the timing when the symbol of "4" is positioned, the symbol combination related to the combination name "C_CD bell" is stopped and displayed, and the symbols of the symbol positions "5" to "20" are displayed on the effective line. When the stop operation is performed at the positioned timing, the abbreviation "RT2 transition symbol" is stopped and displayed. In addition, when the internal winning combination is "F_123 Bell B", the combination name "C_CD Bell" is changed when the stop operation is performed at the timing when the symbols of the symbol positions "5" to "9" are located on the effective line. When the symbol combination is stopped and displayed, and the stop operation is performed at the timing when the symbols at the symbol positions "0" to "4", "10" to "20" are located on the effective line, the abbreviation "RT2 transition symbol" is displayed. Stop is displayed.

Further, when the internal winning combination is "F_132 bell A", the combination name "C_CD bell" is changed when the stop operation is performed at the timing when the symbols of the symbol positions "10" to "14" are located on the effective line. When the related symbol combination is stopped and displayed, and the stop operation is performed at the timing when the symbols at the symbol positions "0" to "9" "15" to "20" are located on the effective line, the abbreviation "RT2 transition symbol" is displayed. Stop is displayed. Further, when the internal winning combination is "F_132 bell B", the combination name "C_CD bell" is changed when the stop operation is performed at the timing when the symbols of the symbol positions "15" to "20" are located on the effective line. The symbol combination is stopped and displayed, and when the stop operation is performed at the timing when the symbols of the symbol positions "0" to "14" are located on the effective line, the abbreviation "RT2 transition symbol" is stopped and displayed.

By doing so, in the pachi-slot machine 1 of the present embodiment, it is possible to stop and display the symbol combination related to the combination name "C_CD bell" in which the RT state does not shift with a probability of 1/4 even when one stop is missed. can.

Here, FIG. 267 and FIG. 268 show conceptual diagrams of the symbol combination and RT control displayed at the time of winning the push order bell. FIG. 267 (A) shows the symbol combination and RT control displayed at the time of winning the push order bell in the pachi-slot machine 1 of the present embodiment, and FIGS. 267 (B) to 268 (D) show the pachi-slot machine 1 according to the modified example. Pushing order bell Shows the symbol combination and RT control displayed at the time of winning.

As shown in FIG. 267 (A), in the pachi-slot machine 1 of the present embodiment, the main control circuit 90 performs stop control so that the symbol combination related to the abbreviation "bell" is stopped and displayed when the push order is correct. , Pay out 8 medals. Further, in the case of one stop error, the main control circuit 90 makes the symbol combination different according to the timing of the stop operation, so that the symbol combination related to the combination name "C_CD bell" is stopped and displayed with a probability of 1/4. As a result, 8 medals are paid out, and the stop control is performed so that the symbol combination related to the abbreviation "RT2 transition symbol" is stopped and displayed with a probability of 3/4, and as a result, the RT state is changed to RT2. Move to the state. Further, the main control circuit 90 performs papermaking control so that the symbol combination related to the abbreviation "RT0 transition symbol" is stopped and displayed regardless of the timing of the stop operation when two stops are missed, and as a result, the RT state is changed to the RT0 state. Move to.

In the pachi-slot machine 1 of the present embodiment (the same applies to the pachi-slot machine 1 of another example described below), when the symbol combination displayed as a stop is different according to the timing of the stop operation when the push order is incorrect, four minutes are taken. Although the probability of 1 is adopted, it is not limited to 1/4, and by arbitrarily setting the number of push order bells to be grouped, it is 1/2, 1/3 or 5 minutes. Any probability such as 1 can be adopted.

Further, in the pachi-slot machine 1 of the present embodiment (the same applies to the pachi-slot machine 1 of another example described below), an example of stop control comparing the time of one stop miss and the time of two stop misses is described, but the present invention is limited to this. It may be possible to compare the time of 1 stop mistake and the time of 3 stop mistakes, or it may be possible to compare the time of 2 stop mistakes and the time of 3 stop mistakes, and the reel to be stopped. When the number is 4 or more, any order may be further compared. Further, the order of comparison is not limited to two, and stop control may be performed by comparing three or more orders. That is, in the pachi-slot machine 1, the stop control is performed by comparing the correctness of the predetermined-th push order with the correctness of the specific-th push order after the predetermined-th.

Further, in the pachi-slot machine 1 of the present embodiment (the same applies to the pachi-slot machine 1 of another example described below), when one stop is missed, the state shifts to the RT2 state, and when two stops are missed, the state shifts to the RT0 state. The RT state to be transitioned is different between the time of a mistake and the time of a two-stop mistake, but the RT state of the transition destination can be set arbitrarily. Further, the RT states of the migration destination do not necessarily have to be different RT states, and may be the same RT state.

Further, in the pachi-slot machine 1 of the present embodiment (the same applies to the pachi-slot machine 1 of another example described below), the symbol combination displayed as a stop is different according to the timing of the stop operation when the push order is incorrect. Here, in the above-mentioned example, the type of the stop operation for which the timing of the stop operation is referred to is omitted, but in the pachi-slot machine 1, the above-mentioned stop control is referred to with reference to the timing of the stop operation in an arbitrary order. It can be performed.

For example, as in the case of the pachi-slot machine 1 of the present embodiment, when the symbol combination to be stopped and displayed is different according to the timing of the stop operation when one stop is missed, the stop display is displayed according to the timing of the first stop operation in which the push order is missed. The symbol combinations to be performed may be different, and the symbol combinations to be stopped and displayed according to the timing of the second stop operation (or the third stop operation) after the first stop operation in which the pressing order is mistaken may be different. It may be different. Further, as will be described later, when the combination of symbols to be stopped and displayed is different according to the timing of the stop operation at the time of two stop mistakes, the symbols to be stopped and displayed according to the timing of the second stop operation in which the push order is missed. The combination may be different, or the symbol combination displayed as stopped may be different according to the timing of the third stop operation after the second stop operation in which the pressing order is mistaken.

Next, another example of control at the time of winning the push order bell will be described. In the pachi-slot machine 1 of the present embodiment, as described above, the symbol combinations that are stopped and displayed according to the timing of the stop operation are different when one stop is missed, and the same symbol combination is stopped and displayed regardless of the timing of the stop operation when two stops are missed. I'm letting you. In this regard, as in another example 1 shown in FIG. 267 (B), the same symbol combination is stopped and displayed regardless of the timing of the stop operation when one stop is missed, and stopped and displayed according to the timing of the stop operation when two stops are missed. The combination of symbols may be different.

Since the idea is the same as that in FIG. 266, the illustration is omitted, but in this alternative example 1, the symbol combination related to the abbreviation "bell" is stopped and displayed when the push order is correct, and the abbreviation "RT0 shift" is displayed when one stop is missed. The symbol combination related to "symbol" is stopped and displayed, and when two stops are missed, the symbol combination related to the abbreviation "bell" or the abbreviation "RT2 transition symbol" is stopped and displayed according to the timing of the stop operation.

Here, as shown in FIG. 267 (B), in this alternative example 1, "F_123 bell C", "F_123 bell D", etc. are used as the push order bells in order to make the symbol combination displayed as a stop when two stops are missed different. Is newly added, and four push order bells corresponding to each push order are provided. The four push order bells "F_123 bell A", "F_123 bell B", "F_123 bell C", and "F_123 bell D" are grouped together.

In the push order bells "F_123 bell A" to "F_123 bell D", two stop mistakes occur when the push order is "132", and one stop mistake occurs when the push order is "213", "231", "312", and "321". Therefore, as described above, by making the stop control in the case of the push order "132" different in the push order bells "F_123 bell A" to "F_123 bell D", it is abbreviated with a probability of 1/4 when two stops are missed. It is possible to control so that the symbol combination related to the "bell" is stopped and displayed, and the symbol combination related to the abbreviation "RT2 transition symbol" is stopped and displayed with a probability of three-quarters.

As shown in FIG. 267 (B), according to the stop control of the first example, the main control circuit 90 performs stop control so that the symbol combination related to the abbreviation "bell" is stopped and displayed when the push order is correct. As a result, eight medals are paid out. Further, the main control circuit 90 performs stop control so that the symbol combination related to the abbreviation "RT0 transition symbol" is stopped and displayed regardless of the timing of the stop operation when one stop is missed, and as a result, the RT state is changed to the RT0 state. Move to. Further, when the main control circuit 90 misses two stops, the symbol combination is changed according to the timing of the stop operation, and the symbol combination related to the abbreviation "bell" is stopped and displayed with a probability of 1/4. Control is performed, and as a result, eight medals are paid out, and stop control is performed so that the symbol combination related to the abbreviation "RT2 transition symbol" is stopped and displayed with a probability of three-quarters. As a result, the RT state is changed to the RT2 state. Transition.

Next, another example 2 of the control at the time of winning the push order bell will be described. In the pachi-slot machine 1 of the present embodiment and the pachi-slot machine 1 of another example 1, the symbol combination displayed as a stop is different according to the timing of the stop operation only at the time of one stop mistake or the second stop mistake, and the other. Displays the same symbol combination as a stop regardless of the timing of the stop operation. In this regard, in another example 2 shown in FIG. 268 (C), the symbol combination displayed as a stop is different depending on the timing of the stop operation at the time of one stop mistake and the time of two stop mistakes.

Since the basic idea is the same as that of the pachi-slot machine 1 of the present embodiment and the pachi-slot machine 1 of another example, a detailed description will be described.
As shown in FIG. 268 (C), according to the stop control of the second example, the main control circuit 90 performs stop control so that the symbol combination related to the abbreviation "bell" is stopped and displayed when the push order is correct. As a result, eight medals are paid out. Further, the main control circuit 90 makes a different symbol combination according to the timing of the stop operation when one stop is missed, and stops control so that the symbol combination related to the abbreviation "bell" is stopped and displayed with a probability of 1/4. As a result, 8 medals are paid out, and stop control is performed so that the symbol combination related to the abbreviation "RT0 transition symbol" is stopped and displayed with a probability of 3/4, and as a result, the RT state is shifted to the RT0 state. do. Further, the main control circuit 90 makes the symbol combination different according to the timing of the stop operation even when two stops are missed, and the stop control is performed so that the symbol combination related to the abbreviation "bell" is stopped and displayed with a probability of 1/4. As a result, 8 medals are paid out, and stop control is performed so that the symbol combination related to the abbreviation "RT2 transition symbol" is stopped and displayed with a probability of 3/4, and as a result, the RT state is shifted to the RT2 state. do.

In another example 2, the symbol combination related to the abbreviation "bell" is stopped and displayed with a probability of 1/4 in both the case of 1 stop mistake and the time of 2 stop mistakes. The probability that the symbol combination related to "bell" can be stopped and displayed (that is, the timing of the stop operation required to stop and display the symbol combination related to the abbreviation "bell" when one stop is missed) and the abbreviation "bell" when two stops are missed. It may be different from the probability that the symbol combination related to "" can be stopped and displayed (that is, the timing of the stop operation required to stop and display the symbol combination related to the abbreviation "bell" when two stops are missed).

Next, another example 3 of the control at the time of winning the push order bell will be described. If you make a mistake in the type of stop button that should be operated in the second stop operation (2 stop mistakes), or if you make a mistake in the type of stop button that should be operated in the third stop operation (3 stop mistakes), the stop operation before that The order of may be correct, or the order of previous stop operations may be incorrect. For example, if the correct pressing order is "123", and the type of the stop button to be operated in the second stop operation is a stop button other than the middle stop button 17C, a two-stop mistake will occur, so the pressing order " All of 132, 213, 231 and 312 will be missed by two stops. Of these, the push order "132" is the correct type of stop button to be operated in the first stop operation, and the other push orders "213", "231", and "312" are the first stop operation and the second stop. The type of stop button to be operated is incorrect in any of the operations.

In another example 3, the control in which the stop control is different depending on the type of the first stop operation at the time of the second stop error will be described. In another example 3, the example is focused on the case of two stop mistakes, but the example is not limited to this, and is not limited to this, and is the predetermined number at the time of incorrect answer of the specific third push order after the predetermined push order. It includes making the stop control different depending on whether the push order is correct or not.

Since the basic idea is the same as that of the pachi-slot machine 1 of the present embodiment and the pachi-slot machine 1 of another example, a detailed description will be described.
As shown in FIG. 268 (D), according to the stop control of the third example, the main control circuit 90 performs stop control so that the symbol combination related to the abbreviation "bell" is stopped and displayed when the push order is correct. As a result, eight medals are paid out. Further, the main control circuit 90 has a symbol according to the timing of the stop operation at the time of one stop mistake and two stop mistakes (that is, the push order "213", "231", "312" with respect to the correct push order "123"). The combination is different, and stop control is performed so that the symbol combination related to the abbreviation "bell" is stopped and displayed with a probability of 1/4. As a result, 8 medals are paid out and the abbreviation "bell" is given with a probability of 3/4. Stop control is performed so that the symbol combination related to "RT0 transition symbol" is stopped and displayed, and as a result, the RT state is shifted to the RT0 state. Further, the main control circuit 90 makes the symbol combination different according to the timing of the stop operation even when the answer is 1 stop and the answer is 2 stops (that is, the push order "132" with respect to the push order "123" of the correct answer). Stop control is performed so that the symbol combination related to the abbreviation "Bell" is stopped and displayed with a probability of 1/2, and as a result, 8 medals are paid out and related to the abbreviation "RT2 transition symbol" with a probability of 1/2. Stop control is performed so that the symbol combination is stopped and displayed, and as a result, the RT state is shifted to the RT2 state. Further, in the main control circuit 90, when one stop is missed and two stops are correct (that is, the push order "321" with respect to the correct push order "123"), the abbreviation "1st card" is used regardless of the timing of the stop operation. The stop control is performed so that the symbol combination related to "" is stopped and displayed, and as a result, one medal is paid out.

In another example 3, the stop required to stop and display the symbol combination related to the abbreviation "bell" at the time of 1 stop mistake, 2 stop mistakes, 1 stop correct answer, and 2 stop mistakes. The timing of the operation is different, but the timing is not limited to this, and the timing of the stop operation required to stop and display the symbol combination related to the abbreviation "bell" may be the same in both cases. Further, in another example 3, it is required to stop and display the symbol combination related to the abbreviation "bell" when the answer is 1 stop and the answer is 2 stops, when the answer is 1 stop and the answer is 2 stops. The timing of the stop operation is strict (1/2 and 1/4), but it is not limited to this. The main control circuit 90 performs stop control so that the symbol combination related to the abbreviation "bell" is stopped and displayed with a probability of 1/4 when 1 stop is correct and 2 stops are missed, and there is a probability of 3/4. Stop control is performed so that the symbol combination related to the abbreviation "RT0 transition symbol" is stopped and displayed, and the symbol combination related to the abbreviation "bell" has a half probability at the time of one stop mistake and two stop mistakes. The stop control may be performed so that the stop display is performed, and the stop control may be performed so that the symbol combination related to the abbreviation "RT2 transition symbol" is stopped and displayed with a probability of 1/2.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a start operation detecting means, a symbol changing means, an internal winning combination determining means, a stop operation detecting means, a reel stop control means (stop control means), and a winning determination means.

Further, when the RT transition symbol is stopped and displayed during the infinite RT state, the main control board 71 shifts the RT state, and thus functions as an RT transition means.

[Navigation high accuracy in ART state]
Further, in the pachi-slot 1 of the present embodiment, when the number of navigation high accuracy games is given during the normal ART, it becomes the normal ART during the navigation high accuracy, and when the "three-choice promotion lip" is determined as the internal winning combination. , The abbreviation "Strong Chance Lip (RT5 transition symbol)" is notified to stop and display the symbol combination. As a result, in the normal ART during the navigation high accuracy, the RT5 state is shifted to when the "3-choice promotion lip" is won, and the gaming state is shifted from the normal ART to the EP. In addition, in the normal ART during non-navigation high accuracy, when the "3-choice promotion lip" is determined as the internal winning combination, the notification for stopping and displaying the symbol combination related to the abbreviation "diagonal replay (C_CU lip)" is sent. Therefore, there is no transition to the RT5 state.

Here, a method of managing the number of highly accurate navigation games will be described with reference to FIG. 269. The number of navigation high-accuracy games is stored in a predetermined area of the main RAM 103, and when the winning lottery (see FIG. 241), which is normally performed only during ART, is won, the number of winning navigation high-accuracy games is added. As shown in FIG. 269 (A), the number of navigation high-accuracy games is usually subtracted by 1 for each game during ART. In the example shown in FIG. 269 (A), the number of highly accurate navigation games "5 games" is given based on the lottery flag "strong cherry" in the second game, and is subtracted by one in the following third to fifth games. .. Further, the number of highly accurate navigation games can be added, and in the example shown in FIG. 269 (A), "5 games" are added based on the lottery flag "strong cherry" of the sixth game.

The main control circuit 90 controls the game as non-navigation high accuracy when the number of navigation high accuracy games is 0, and controls the game as non-navigation high accuracy game when the number of navigation high accuracy games is 1 or more. Therefore, when the number of navigation high-accuracy games is given in the situation where the number of navigation high-accuracy games is 0, the main control circuit 90 manages the next game as the navigation high-accuracy game, and the number of navigation high-accuracy games is 0. Then, the main control circuit 90 manages the next game as non-navigation high accuracy.

Subsequently, as shown in FIG. 269 (B), the main control circuit 90 clears (sets to 0) the number of navigation high accuracy games when the gaming state shifts from normal ART to EP during navigation high accuracy. In the example shown in FIG. 269 (B), the "three-choice promotion lip" is determined as the internal winning combination in the fourth game (navigation high accuracy). In the example shown in FIG. 269 (B), the symbol combination related to the abbreviation "strong chance lip" is displayed in the example shown in FIG. As a result, the gaming state has shifted from normal ART to EP. In the example shown in FIG. 269 (B), the remaining number of navigation high-accuracy games was "4 games" at the time of the fourth game, but since the game state has shifted to EP, the number of navigation high-accuracy games has increased. It has been cleared.

Further, as described above, in the pachi-slot machine 1, the number of navigation high-accuracy games is normally given only during ART, but the number of navigation high-accuracy games may be carried over to continuous CZ or rank determination ART. In the example shown in FIG. 269 (C), the number of navigation high-accuracy games assigned to the second game is carried over to the continuous CZ of the fourth game. When the number of navigation high-accuracy games is carried over to the continuous CZ, the main control circuit 90 subtracts the number of navigation high-accuracy games by 1 for each game even during the continuous CZ. On the other hand, when the gaming state shifts from the continuous CZ to the rank determination ART, the main control circuit 90 clears the number of navigation high accuracy games after the end of the rank determination ART (that is, during the rank determination ART). (Set to 0).

The main control circuit 90 may not subtract the number of navigation high-accuracy games during the RT5 state. During the RT5 state, there is no opportunity to notify the push order for shifting to the RT5 state peculiar to the navigation high accuracy state, so that the number of navigation high accuracy games given is not wasted. Here, the RT5 state basically shifts to the correct answer in the push order of the "3-choice promotion lip". In this case, as a result of the game state shifting to the EP, the number of highly accurate navigation games is cleared, but the navigation In the normal ART (RT4 state) during high accuracy, it may shift to the RT5 state based on the fact that "F_strong cherry", "F_7 lip A", "F_7 lip B", and "F_BAR lip" are decided as internal winning roles. In addition, the number of navigation high-accuracy games may be assigned during the continuous CZ in which the number of navigation high-accuracy games is carried over to the RT5 state, and then during the normal ART (RT5 state) during non-navigation high-accuracy. In such a case, since the normal ART (RT5 state) during the navigation high accuracy state is obtained, the main control circuit 90 does not subtract the number of navigation high accuracy games during the RT5 state.

Subsequently, with reference to FIG. 270, various lottery when the number of highly accurate navigation games is carried over to continuous CZ or rank determination ART will be described. FIG. 270 (A) is a diagram showing an outline of the ART lottery during the continuous CZ when the “three-choice promotion lip” is determined as the internal winning combination in the continuous CZ. In the continuous CZ during non-navigation high accuracy, the lottery flag corresponding to the "3-choice promotion lip" is "normal lip" (see FIG. 208), so the probability of winning the ART lottery during the continuous CZ is low (Fig. 226). See (D)). On the other hand, in the continuous CZ during continuous CZ, the lottery flag corresponding to the "3-choice promotion lip" is "strong chance lip" (see Fig. 208), so the ART lottery during the continuous CZ is always won (Fig.). See 227 (E)). In addition, when the "3 choice promotion rip" is won during the navigation high accuracy, the push order of the correct answer is notified, so if the "3 choice promotion rip" is decided as the internal winning role in the continuous CZ during the navigation high accuracy, Be sure to win the ART lottery, and the RT state of the next game (rank determination ART) will be the RT5 state.

Further, FIGS. 270 (B) and 270 (C) are diagrams showing an outline of the promotion lottery in the ranking determination ART. As shown in FIG. 270 (B), when the "3-choice promotion lip" is used as the internal winning role even during the rank determination ART, the navigation height is higher than the promotion lottery based on the lottery flag "normal lip" during non-navigation high accuracy. The rank is easier to be promoted by the promotion lottery based on the lottery flag "Strong Chance Lip" (see FIG. 240). Further, as shown in FIG. 270 (B), even when the internal winning combination is "off", the rank of the promotion lottery during non-navigation high accuracy is easier to be promoted than the promotion lottery during non-navigation high accuracy. (See FIG. 240).

In addition, when the number of navigation high-accuracy games is carried over to the continuous CZ, the RT state during the rank determination ART may become the RT5 state. FIG. 270 (D) is a diagram comparing the promotion lottery during the ranking determination ART in the RT4 state and the promotion lottery during the ranking determination ART in the RT5 state. When referring to the rank determination ART middle rank promotion lottery table shown in FIG. 240, it can be seen that the rank at the time of ART winning is easily promoted by the lottery flags "fake 7", "7 matching" and "BAR matching". Further, referring to the internal lottery table of FIG. 180, in the RT4 state and the RT5 state, "F_fake lip", "F_7 lip A", and "F_7" corresponding to the lottery flags "fake 7", "7 alignment", and "BAR alignment". It can be seen that the probability that "Rip B" and "F_BAR Lip" are determined as the internal winning combination is higher in the RT5 state than in the RT4 state. Therefore, during the rank determination ART in the RT5 state, the rank at the time of winning the ART is more likely to be promoted than the rank determination ART in the RT4 state.

As illustrated in FIGS. 270 (A) to 270 (D), when the number of highly accurate navigation games is carried over to the continuous CZ or the rank determination ART, both the ART lottery during the continuous CZ and the promotion lottery during the rank determination ART It tends to be a favorable result for the player. In particular, since the lottery results of the ART lottery and the promotion lottery based on one role of "three-choice promotion lip" differ depending on whether or not the navigation is highly accurate, the playability becomes diverse. In addition, even if the "3-choice promotion lip" is not determined as an internal winning combination in the normal ART during navigation high accuracy, if the number of navigation high accuracy games remains, the subsequent continuous CZ or rank Since the decision ART is advantageous, the player does not feel dissatisfied.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a start operation detecting means, a symbol changing means, an internal winning combination determining means, a stop operation detecting means, a reel stop control means (stop control means), and a winning determination means.

Further, the main control board 71 performs an ART lottery to determine whether or not to shift to the ART state, and when the ART lottery is won, the gaming state shifts to the ART state. Function. Further, the main control board 71 manages the games in the CZ and ends the CZ when the number of remaining games in the CZ becomes 0, so that the main control board 71 functions as a high-probability state control means.

Further, in the main control board 71, the "three-choice promotion lip" is determined as the internal winning combination during the ART state during the navigation high accuracy, and the symbol combination related to the abbreviation "strong chance lip" is followed by the notification during the navigation high accuracy. Is displayed, the game state is changed from the normal ART to the EP, so that it functions as a privilege granting means.

Further, the main control board 71 controls navigation high accuracy or non-navigation high accuracy based on the number of navigation high accuracy games, and when the game state shifts to EP during navigation high accuracy, the navigation high accuracy changes to non-navigation high accuracy. Since it switches to, it functions as a notification mode control means.

[Continuous CZ promotion control]
Further, in the pachi-slot machine 1 of the present embodiment, whether or not to use the special CZ as the continuous CZ when winning the ART lottery in the CZ and shifting from the CZ to the ART state (more specifically, during the rank determination ART). If the lottery is done and the lottery is won, the special CZ is used as the continuous CZ thereafter (see FIG. 233). As a result, the type of CZ may be switched during the loop between the CZ and the ART state, so that it is possible to prevent the game in the CZ from becoming monotonous.

Further, in the pachi-slot machine 1 of the present embodiment, if there is no stock of the number of sets in the ART state at the time of the transition to the special CZ, one set number in the ART state is given. As a result, when the game shifts to the special CZ, the game always shifts to the ART state, so that the game can be played with peace of mind. The number of stocks in the ART state to be given at the time of transition to the special CZ is arbitrary, and the main control circuit 90 may give two or more stocks. Further, instead of granting a fixed number of stocks at the time of transition to the special CZ, it is also possible to grant a required number of stocks until the stock of the number of sets in the ART state reaches a predetermined number. For example, when the stock of the number of sets in the ART state is given until the stock of the number of sets in the ART state becomes 3 at the time of transition to the special CZ, the number of stocks held at the time of transition to the special CZ is 0. Is given 3 stocks, 2 stocks are given when the number of stocks held at the time of transition to the special CZ is 1, and the number of stocks held at the time of the transition to the special CZ is 2. In some cases, one stock may be granted, and if the number of stocks held at the time of transition to the special CZ is 3 or more, the stock may not be granted.

Further, the game period of continuous CZ is managed by the number of CZ games, and the number of CZ games for special CZ and the number of CZ games for CZ (after ART) may be separately provided as the number of CZ games. Well, you may also use a common number of CZ games. When using different numbers of CZ games, when shifting to the special CZ, the main control circuit 90 sets the number of CZ games for CZ (after ART) as the number of CZ games for special CZ. At this time, the main control circuit 90 may keep the number of CZ games for CZ (after ART), or may clear (set to 0).

Further, when using different numbers of CZ games, the main control circuit 90 adds the number of CZ games for CZ (after ART) when shifting from CZ (after ART) to the ART state, and also adds ART during the special CZ. When the ART state is entered according to the winning of the lottery, the number of CZ games for special CZ is added. On the other hand, when the ART state is entered based on the release phase D during the special CZ, the number of CZ games for CZ (after ART) is added.

On the other hand, when a common number of CZ games is used, the main control circuit 90 may add the number of CZ games at the time of transition to the ART state without considering the type of CZ. The number of CZ games is managed in the main RAM 103 regardless of whether the number of CZ games is different or the number of CZ games is common.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a start operation detecting means, a symbol changing means, an internal winning combination determining means, a stop operation detecting means, a reel stop control means (stop control means), and a winning determination means.

Further, the main control board 71 functions as a grant determination means and a privilege granting means because the main control board 71 performs an ART lottery to determine whether or not to shift to the ART state, and shifts the game state to the ART state when the ART lottery is won. do.

Further, when the main control board 71 wins the ART lottery, the number of rights of the ART state to be granted is determined and stored in the main RAM 103, and when the gaming state is shifted to the ART state, it is stored in the main RAM 103. It functions as a right management means because it erases one right in the ART state.

Further, since the main control board 71 manages the games in the CZ and ends the CZ when the number of remaining games in the CZ becomes 0, the main control board 71 functions as a first high-probability state control means and a second high-probability state control means. ..

Further, the main control board 71 functions as a period management means when the number of CZ games common to the CZ (after ART) and the special CZ is used, and when using different numbers of CZ games, the main control board 71 of the special CZ. Since the number of CZ games for CZ (after ART) is set as the number of CZ games for special CZ at the time of transition, it functions as a period setting means.
Further, when the main control board 71 shifts to the ART state during CZ, the number of CZ games is added, so that the main control board 71 functions as a high-probability state addition means.

<Control on the sub side of pachislot 1>
Subsequently, the control on the sub (sub-control board 72) side in the pachi-slot machine 1 of the present embodiment will be described.

[Command sent from the main side]
First, with reference to FIGS. 271 to 274, the types of commands transmitted from the main (main control board 71) side to the sub side in the pachi-slot machine 1 will be described. In the pachislot machine, various commands are transmitted from the main side to the sub side according to the progress of the game, and the sub side controls the production according to this command.

As shown in FIG. 271, in the pachi-slot machine 1 of the present embodiment, when the start lever 16 is operated and the game is started, the “lever-time effect control 1 to 5” command and the “game start” command from the main side to the sub side. "The command and is sent. The details of these "lever-time effect control 1 to 5" commands and "game start" commands will be described later with reference to FIGS. 272 to 274. Further, the above-mentioned start command corresponds to these "lever-time effect control 1 to 5" command and "game start" command.

After that, when the reels 3L, 3C, and 3R start to rotate, a "rotation start rotation start" command is transmitted from the main side to the sub side. This "turning cylinder rotation start" command is a command for notifying the sub side that the rotation of the reels 3L, 3C, 3R has started, and corresponds to the above-mentioned reel rotation start command.

After that, when the rotation speeds of the reels 3L, 3C, and 3R reach a constant speed, a "constant speed start" command is transmitted from the main side to the sub side. This "constant speed start" command is a command that notifies the sub side that the reels 3L, 3C, and 3R have entered constant speed rotation.

After that, when the reels 3L, 3C, 3R are stopped in response to the operation of the stop buttons 17L, 17C, 17R, the stop operations of the first stop, the second stop, and the third stop are accepted from the main side to the sub side. Is sent, but it is omitted in FIG. 271.

After that, when the rotation of all reels 3L, 3C, 3R is stopped, the "3 off time effect control 1 to 5" command and the "winning operation" command are transmitted from the main side to the sub side. The "winning operation" command is a command that informs the sub side of the winning information (type of displayed symbol combination), the number of payouts, etc., and the "3 off time effect control 1 to 5" command is shown in FIGS. 272 to 272. It is a command to report the information shown in FIG. 274. The above-mentioned winning operation command corresponds to these "3 off time effect control 1 to 5" command and the "winning operation" command.

After that, when the payout of medals is completed, or when the freeze occurs after all reels 3L, 3C, 3R are stopped, the corresponding command is transmitted from the main side to the sub side, but in FIG. 271 It is omitted.

After that, at the end of BB, the payout counter for ending the bonus is cleared, the game state is changed from the bonus operation, etc., so from the main side to the sub side, "3 off time production control 1 ~ A "5" command and a "game stop" command are transmitted. The "game stop" command is a command that notifies the sub side of the start and end of the freeze at the end of the bonus.

After that, when the insertion of a medal for starting the next game is accepted, or when the start lever 16 can be operated, the corresponding command is sent from the main side to the sub side. It is omitted in 271.

Subsequently, with reference to FIGS. 272 and 273, the "lever-time effect control 1 to 5" command transmitted from the main side to the sub side when the start lever 16 is operated, and when all reels 3L, 3C, and 3R are stopped. The details of the "3 off time effect control 1 to 5" command transmitted from the main side to the sub side will be described. As shown in FIGS. 272 and 273, the "lever-time effect control 1 to 5" command and the "3 off-time effect control 1 to 5" command have the same configuration. The explanation will be given by taking the "lever effect control 1 to 5" command as an example, and the description of the "3 off effect control 1 to 5" command will be omitted.

As shown in FIG. 272, the "lever effect control 1" command has parameters such as a game state on the main side, a navigation pattern performed on the main side, a mode in a normal state, a lottery state in a normal state, and a high security certificate. It has the number of games and is configured so that the corresponding information can be specified from the values of these parameters. Further, the "lever time effect control 2" command has as parameters the number of stocks of CZ, the number of precursor games in the CZ or ART state, the number of remaining games of CZ, and the number of remaining games of normal ART, and the values of these parameters. It is configured so that the corresponding information can be specified.

Further, as shown in FIG. 273, the "lever-time effect control 3" command has parameters such as the rank of the ART state to be released next (rank at the time of winning ART), the number of stocks in the ART state of rank 1, and the rank 2. It has the number of stocks in the ART state, the number of stocks in the ART state of rank 3, and the number of stocks in the ART state of rank 4, and is configured so that the corresponding information can be specified from the values of these parameters. Further, the "lever-time effect control 4" command has as parameters a CZ phase, a stage during normal ART, a fall mode during EP, an EP (short) stock number, and an EP (long) stock number. The corresponding information can be specified from the values of these parameters. Further, the "lever-time effect control 5" command has the validity of the special CZ and the number of highly accurate navigation games as parameters, and is configured so that the corresponding information can be specified from the values of these parameters.

Subsequently, with reference to FIG. 274, the details of the “game start” command transmitted from the main side to the sub side when the start lever 16 is operated will be described. As shown in FIG. 274, the "game start" command has parameters such as a type between flags, a lottery flag, an RT state, and a BB end number management counter, and the corresponding information can be specified from the values of these parameters. It is configured in.

The sub-control board 72 grasps the current gaming state and the result of the current gaming by referring to the values of the parameters included in these commands received from the main side. At this time, in the pachi-slot machine 1 of the present embodiment, by using a combination of a plurality of parameters and using changes in the values of the parameters received at different timings, the types of parameters managed on the main side are reduced, and the data on the main side is used. The capacity can be reduced.

[Capacity reduction by combining parameters]
As shown in FIG. 275, in the pachi-slot machine 1 of the present embodiment, by combining the parameters included in the command transmitted from the main side, it is possible to manage more game states on the sub side than the game states managed on the main side. ing. As a result, on the sub side, it is possible to perform the staging control using various gaming states as compared with the main side.

As shown in FIG. 275, the value of the parameter "main side gaming state" of the "lever effect control (same for 3 off effect control (hereinafter omitted)) 1" command transmitted from the main side is "0 (normal)". Is set, the sub-control board 72 may set the game state on the sub side to "0 (normal)", "1 (CZ precursor)", and "2 (ART precursor)". Specifically, the value of the parameter "main side game state" of the "lever effect control 1" command is "0 (normal)", and the value of the parameter "precursor game number" of the "lever effect control 2" command. When is "0 (non-precursor)", the sub-control board 72 sets the gaming state on the sub side to "0 (normal)". On the other hand, the value of the parameter "main side game state" of the "lever effect control 1" command is "0 (normal)", and the value of the parameter "precursor game number" of the "lever effect control 2" command is ". All the values of the parameters "Rank 1 stock number" to "Rank 4 stock number" of "Lever time effect control 3" are "0 (no ART stock)". In this case, the sub control board 72 sets the gaming state on the sub side to "1 (CZ precursor)". Further, the value of the parameter "main side game state" of the "lever effect control 1" command is "0 (normal)", and the value of the parameter "precursor game number" of the "lever effect control 2" command is "0". Greater (in the omen) "and any value of any of the parameters" Rank 1 stock number "to" Rank 4 stock number "of" Lever effect control 3 "is larger than 0 (with ART stock)" In the case of, the sub-control board 72 sets the gaming state on the sub-side to "2 (ART precursor)".

Further, when "1 (first hit CZ)" is set as the value of the parameter "main side game state" of the "lever effect control 1" command transmitted from the main side, the sub control board 72 is set to the "lever". By combining with the value of the parameter "CZ phase" of "time effect control 4", the game state of the sub side can be changed to "3 (first hit CZ_end next game)" "4 (first hit CZ_final game)" "5 (first hit). CZ_number of games 1 or more) ”.

Further, when "2 (ART preparation)" is set as the value of the parameter "main side game state" of the "lever effect control 1" command transmitted from the main side, the sub control board 72 is on the sub side. When the game state is set to "6 (ART preparation)" and "3 (rank determination ART)" is set as the value of the parameter "main side game state", the sub control board 72 is in the sub side game state. Is set to "7 (rank determination ART)".

Further, when "4 (normal ART)" is set as the value of the parameter "main side gaming state" of the "lever time effect control 1" command transmitted from the main side, the sub control board 72 is set to "lever time". By combining with the value of the parameter "normal ART stage" of the effect control 4 ", the game state of the sub side is set to" 8 (normal ART with low accuracy in lottery state) "and" 9 (normal ART with high accuracy in lottery state). "10 (normal ART with ultra-high accuracy in the lottery state)" can be set.

Further, when "5 (EP preparation)" is set as the value of the parameter "main side game state" of the "lever effect control 1" command transmitted from the main side, the sub control board 72 is on the sub side. The game state is set to "11 (EP preparation)".

Further, when "6 (EP)" is set as the value of the parameter "main side gaming state" of the "lever time effect control 1" command transmitted from the main side, the sub control board 72 is set to "lever time effect control 1". By combining with the value of the parameter "fall mode" of "control 4", the game state of the sub side can be changed to "12 (EP when the fall mode is not guaranteed)", "13 (EP when the fall mode is shorted)", and "14 (fall mode). EP at long time) ”.

Further, when "7 (continuous CZ)" is set as the value of the parameter "main side gaming state" of the "lever time effect control 1" command transmitted from the main side, the sub control board 72 is set to "lever time". By combining with the value of the parameter "whether or not the special CZ is correct" of the "effect control 5", it is possible to distinguish whether the continuous CZ is a CZ (after ART) or a special CZ. Specifically, the value of the parameter "main side game state" of the "lever effect control 1" command is "7 (continuous CZ)", and the parameter of the "lever effect control 5" command "whether or not the special CZ is correct". When the value of is "1 (winning (before locking))" or "2 (winning (after locking))", the sub-control board 72 sets the gaming state of the sub-side to "20 (special CZ)".

On the other hand, the value of the parameter "main side game state" of the "lever effect control 1" command is "7 (continuous CZ)", and the value of the parameter "special CZ hit / fail" of the "lever effect control 5" command. When is "0 (non-winning)", the sub-control board 72 has the values of the parameters "number of stocks of rank 1" to "number of stocks of rank 4" of "lever effect control 3", and "effect at lever time". By combining with the value of the parameter "CZ phase" of "Control 4", the game state of the sub side can be changed to "15 (continuation CZ1_end next game)" "16 (continuation CZ1_final game)" "17 (continuation CZ1_game number 1 or more". ) "" 18 (continuous CZ2_final game) "" 19 (continuous CZ2_game number 1 or more) ". The continuous CZ1 corresponds to the CZ (after ART) when there is no stock in the ART state on the main side, and the continuous CZ2 corresponds to the CZ (after ART) when there is stock in the ART state on the main side. Corresponds to.

Further, when "8 (between normal flags)" is set as the value of the parameter "main side game state" of the "lever effect control 1" command transmitted from the main side, the sub control board 72 is on the sub side. When the game state of is set to "21 (between the normal flags)" and "9 (between the flags during ART)" is set as the value of the parameter "main side game state", the sub control board 72 is on the sub side. When the gaming state of is set to "22 (between the flags during ART)" and "10 (normal BB)" is set as the value of the parameter "main side gaming state", the sub control board 72 is on the sub side. When the gaming state is set to "23 (normal BB)" and "11 (BB during ART)" is set as the value of the parameter "main side gaming state", the sub control board 72 is in the sub side gaming state. Is "24 (BB during ART)".

As described above, in the pachi-slot machine 1, by combining a plurality of parameters, it is possible to specify a more detailed gaming state on the sub side. Specifically, even when a command indicating that the game state is in the normal state is received, by combining with other parameters, the game state is the normal state, CZ precursor, or ART precursor on the sub side. It can be grasped that it is. As a result, the main side does not have to have the parameters of the state of CZ precursor or ART precursor, and the capacity of the main side can be reduced.

Further, in the pachi-slot machine 1, by combining a plurality of parameters to specify the gaming state on the sub side, it is possible to manage more gaming states on the sub side than the gaming state on the main side. Here, since the sub control board 72 controls the effect, by making it possible to manage various game states (effect states) on the sub side, it is possible to perform the effect using more detailed states. It is possible to control the staging.

[Capacity reduction by comparing parameter values]
Further, in the pachi-slot machine 1 of the present embodiment, the capacity of the command transmitted from the main side can be reduced by comparing the values of the parameters included in the command transmitted from the main side and grasping the result of the game. As shown in FIG. 271, in the pachi-slot machine 1, commands specifying the same information are transmitted at different timings. Specifically, the "lever-time effect control 1 to 5" command is transmitted at the start of the game, and the "3 off-time effect control 1 to 5" command is transmitted at the end of the game.

The sub-control board 72 can grasp the information that is not directly received from the main side by comparing the parameter values included in the commands transmitted at different timings and grasping the change of the parameter value. can. The commands to be compared can be set as appropriate. For example, the "3 off time effect control 1 to 5" command of the previous game and the "lever time effect control 1 to 5" command of this game can be set. It may be compared, and the "lever time effect control 1 to 5" command of this game and the "3 off time effect control 1 to 5" command of this game may be compared.

As an example, when the ART state or the stock of CZ is added, or the number of remaining games of ART or the remaining number of games of CZ is added, in the Pachislot 1 of the present embodiment, the command received before the addition is performed. By comparing the value of the number of stocks and the number of remaining games included in the value with the value of the number of stocks and the number of remaining games included in the command received after the addition is performed, the number of stocks and games added on the sub side You can figure out the number. Specifically, in the command immediately before, the number of games remaining in the normal ART was "20", but in the command received after that, when the number of games remaining in the normal ART changed to "30", the sub-control board 72 can compare the two and can grasp that the number of remaining games of the normal ART is added by "10".

It is also possible to grasp the result of the game by combining changes in the values of a plurality of parameters. For example, when the stock in the ART state is consumed and the stock is not consumed, it can be grasped that the stock in the ART state is added together with the consumption of the stock in the ART state. Specifically, when the game state of the main side shifts from the continuous CZ to the rank-determined ART, the stock in the ART state is consumed, but the stock in the ART state is consumed even though the stock in the ART state shifts from the continuous CZ to the rank-determined ART. If it is not consumed, it can be grasped that the stock in the ART state has been added.

In this way, in Pachislot 1, in order to compare the values of the parameters received at different timings and grasp the result of this game from the change, it is possible to reduce the parameters transmitted from the main side and increase the capacity of the main side. Can be mitigated. For example, in the case of the above example, the number of games remaining in the current normal ART is used as a parameter transmitted from the main side, and the number of games remaining in the normal ART at different timings is compared to increase the number of games added. Since it can be grasped, the main control board 71 does not need to transmit the parameter of the number of additional games (“10” in the above example). On the other hand, since the sub-control board 72 can grasp the number of additional games from the change in the value of the parameter, the effect (for example, the number of additional games) related to the parameter (for example, the number of additional games) that is not directly transmitted from the main side can be obtained. , Additional production) can be performed.

[Song SU production]
Subsequently, with reference to FIGS. 276 to 285, the song step-up (step-up is hereinafter referred to as “SU”) production in the pachi-slot machine 1 of the present embodiment will be described.

Conventionally, in gaming machines such as pachislot machines and pachinko machines, SU production may be performed in order to notify the degree of expectation of granting benefits such as bonuses. The SU effect is an effect in which the expectation of privilege grant is notified by changing a plurality of step stages in order, and the higher the expectation of privilege grant, the higher the step stage is promoted. For example, the effect of step 1 is performed with the start of the game (the start lever 16 is operated), and then the step stage is promoted with the first stop operation to perform the effect of step 2. In conjunction with this, SU production was performed.

In this respect, the song SU effect in the pachi-slot machine 1 of the present embodiment is not linked to the progress of the game, and the plurality of step stages change according to the passage of time. That is, the promotion from step 1 to step 2 is performed after a predetermined time elapses, regardless of the progress of the game.

Specifically, the song SU production in pachislot 1 is performed by a BGM or the like that flows during the game. In the song SU production, a predetermined song is played as a BGM during the game, and the higher the step stage, the longer this song. It will continue. As an example, in step 1, the A melody of this song is played, in step 2, the B melody following the A melody is played, and in step 3, the chorus following the B melody is played.

Here, even in the conventional gaming machine, the production using the BGM being played is performed. For example, if the condition is satisfied during the ART state, the BGM changes from the normal BGM to the special BGM (BGM change). Has been done. In such a gaming machine, the condition of the BGM change is, for example, that the number of stocks in the ART state is a predetermined number or more and the number of additional games is a predetermined number or more, and when the BGM change occurs, for example. , It will be confirmed that the condition is satisfied.

On the other hand, in the song SU production, even if a predetermined BGM is played, the grant of the privilege is not confirmed, and the degree of expectation of the privilege grant is notified according to the extent to which the song SU production is promoted. become.

That is, unlike the conventional SU effect, the song SU effect in the pachi-slot machine 1 of the present embodiment is an effect in which a plurality of step stages change according to the passage of time without being linked to the progress of the game. Unlike the conventional BGM change, it is a production that makes you interested in the degree of step-up because the grant of the privilege is not confirmed only by the flow of the predetermined BGM. In the pachi-slot machine 1 of the present embodiment, the result of the CZ lottery or the ART lottery in the normal state is suggested according to the degree of step-up by performing the song SU effect in the normal state. If promoted to step 3, the winning of CZ or ART is confirmed (CZ or higher is confirmed), and if promoted to step 4, the winning of ART is confirmed.

Subsequently, FIGS. 276 to 278 are diagrams showing an example of the production of the song SU. The song SU production consists of a BGM that flows during the game and a video display that matches the BGM. As shown in FIG. 276 (A), in LV1 (step 1) of the song SU effect, a musical piece (for example, A melody) corresponding to the step is played as a BGM, and the sub-display device 18 is used for the song SU effect. An image matched to the BGM is displayed. At this time, since the game can proceed regardless of the progress of the song SU effect during the song SU effect, the normal effect performed in accordance with the progress of the game is performed on the display device 11.

Subsequently, at the time of transition from LV1 to LV2 (step 2) of the song SU effect, as shown in FIG. 276 (B), the sub-display device 18 performs an effect that raises the expectation of promotion from LV1 to LV2. For example, in the present embodiment, at the time of transition to step-up, a ribbon is displayed on the screen of the sub-display device 18, and depending on whether or not the image corresponding to the song SU effect continues after the ribbon is unwound, at the time of step-up. It is supposed to be directed. At this time, the interlude (without vocals) portion of the music played during the song SU production is output from the speakers 65L and 65R. That is, when the song SU production ends at LV1 (step 1), the A melody and the interlude of the music flow as BGM, and when the song SU production ends and continues to LV2 (step 2), the A melody and the interlude Then the B melody will be played.

Even at the time of such a transition from LV1 to LV2, the game can proceed regardless of the song SU effect, so that the normal effect performed in accordance with the progress of the game is performed on the display device 11.

Subsequently, as shown in FIG. 276 (C), when the transition to LV2 of the song SU effect is performed, a musical piece (for example, B melody) corresponding to the step is played as a BGM, and the song is played on the sub display device 18. An image that matches the BGM produced by SU is displayed. Further, on the display device 11, a normal effect performed according to the progress of the game is performed.

Subsequently, as shown in FIG. 277 (D), at the time of transition from LV2 to LV3 (step 3) of the song SU effect, the sub-display device 18 performs an effect that raises the expectation of promotion from LV2 to LV3 and BGM. The interlude part following the B melody flows. Further, on the display device 11, a normal effect performed according to the progress of the game is performed.

Subsequently, as shown in FIG. 277 (E), when the transition to LV3 of the song SU effect is performed, the music corresponding to the step (for example, chorus 1) is played as a BGM, and the sub-display device 18 plays a song. An image that matches the BGM produced by SU is displayed. Further, on the display device 11, a normal effect performed according to the progress of the game is performed.

Subsequently, as shown in FIG. 277 (F), at the time of transition from LV3 to LV4 (step 4) of the song SU effect, the sub-display device 18 is used to perform an effect that raises the expectation of promotion from LV3 to LV4 and BGM. The interlude part following the chorus 1 flows. Further, on the display device 11, a normal effect performed according to the progress of the game is performed.

Subsequently, as shown in FIG. 278 (G), when the transition to LV4 of the song SU effect is performed, the music corresponding to the step (for example, chorus 2) is played as BGM, and the sub-display device 18 plays the song. An image that matches the BGM produced by SU is displayed. Further, on the display device 11, a normal effect performed according to the progress of the game is performed.

Subsequently, as shown in FIG. 278 (H), when the LV4 of the song SU effect ends with the passage of time, the sub-display device 18 is covered with the ribbon, and the song SU effect ends. Further, on the display device 11, a normal effect performed according to the progress of the game is performed.

After that, when the song SU effect is completed, as shown in FIG. 278 (I), the normal effect is performed on the display device 11 and the sub display device 18.
In the pachi-slot machine 1 of the present embodiment, when the song SU effect is transferred to LV4, the privilege of winning the ART is confirmed. Therefore, when the song SU effect is transferred to LV4, LV4 After the music corresponding to the above is finished, the BGM may be played in a loop from the beginning.

[Example of production data used for song SU production]
Next, an example of production data for executing the song SU production will be described. As shown in FIG. 279, the sub-control board 72 of the pachi-slot machine 1 has sound data and video data for performing a song SU effect. FIG. 279 (A) is a conceptual diagram of sound data for performing a song SU effect, and the pachi-slot machine 1 has sound data for each LV of the song SU effect. Specifically, as sound data for LV1 of song SU production, it has sound data composed of "A melody" and "interlude 1" of a predetermined music, and is predetermined as sound data for LV2 of song SU production. It has sound data consisting of "A melody", "interlude 1", "B melody" and "interlude 2" of the song, and as sound data for LV3 of the song SU production, "A melody" of the predetermined song. It has sound data consisting of "interlude 1", "B melody", "interlude 2", "sabi 1", and "interlude 3". It has sound data including "A melody", "interlude 1", "B melody", "interlude 2", "chorus 1", "interlude 3", and "chorus 2".

Here, the sound data for the song SU production LV1 has a length of 18072 msec, and the sound data for the song SU production LV2 has a length of 38626 msec, and is for the song SU production LV3. The sound data has a length of 72008 msec, and the sound data for LV4 produced by the song SU has a length of 108110 msec.

Since the pachi-slot machine can play a game once every 4.1 seconds at the shortest, the main control board 71 can play a plurality of games depending on the operation of the player during the execution of the song SU production. Can be done. Since the song SU production progresses regardless of the progress of the game, the player can stop the game and listen to the BGM when the BGM corresponding to the song SU production suddenly flows. You can continue the game while playing BGM.

Further, as shown in FIG. 279 (B), in the pachislot 1, "video data for A melody", "video data for B melody", and "video data for chorus 1" are used as video data for the song SU production. And "video data for rust 2" and "video data for connection at the time of step-up". The sub-control board 72 outputs the video data in accordance with the sound data flowing as the BGM, so that the sub-display device 18 displays the video in accordance with the BGM produced by the song SU.

Here, in order to synchronize the sound data and the video data, as shown in FIG. 280 (A), an interlocking marker is set in the sound data. When the sound and the video are linked for a certain period of time or longer, if the sound and the video are output only at the first timing, the video will be delayed due to the difference in the processing load on the way. Therefore, in the pachi-slot machine 1 of the present embodiment, the sound reproduction time is observed on the sound control side, and an interlocking request is issued to the video side to prevent synchronization deviation between the sound and the video. The interlocking marker is information that defines the timing for issuing an interlocking request to the video control side.

When the sound data of each LV is read in the song SU production, the interlocking marker is added every time a predetermined number of seconds elapses in the production sequence control. Specifically, in the sound sequence control of the sub-control board 72, the timing for switching the video such as the start of sound data playback, the transition from the A melody to the interlude 1, and the end of the interlude 1 should be returned. Add an interlocking marker to the read sound data at the timing. Then, in the video sequence control of the sub-control board 72, when the interlocking marker is read out, the corresponding video data is read out by looking at the information of the interlocking marker read out, and the sound and the video are synchronized.

In the example shown in FIG. 280 (A), when "1-1" is read as the interlocking marker, "video data for A melody" is read as video data, and the BGM "A melody" and the video "A" are read. It will be linked with "video data for melody". In FIG. 280, only LV1 and LV2 of the song SU effect are shown, and the illustration of LV3 and LV4 is omitted, but the data of LV3 and LV4 also have the same configuration.

Further, as shown in FIG. 280 (B), a rewriting point is set in the production data (sound data) of the song SU production. As described above, the song SU production is a production that suggests the expectation level of privilege grant by stepping up, but since it is possible to play multiple times during the song SU production, the result of the privilege grant during the song SU production is May change. For example, although the ART was not won at the start of the song SU production, the ART lottery may be won during the song SU production. In such a case, the song SU production currently being executed can be rewritten. Is preferable.

On the other hand, since the song SU production is a production performed by playing BGM, if the connection becomes unnatural due to the rewriting of the production, it is not preferable in terms of the production, and the player rewrites the production. May be noticed. The rewriting point is set to a point where the volume of the connection is reduced so that the connection does not become unnatural before and after rewriting. In the example shown in FIG. 280 (B), for example, in the sound data of LV1, the rewriting point is set at the point where the volume is reduced by fading when switching from the A melody to the interlude 1, and the sound data is rewritten. Even so, I try not to cut off the sound.

In the pachi-slot machine 1 of the present embodiment, when the sub-control board 72 receives a request for rewriting the song SU effect at a timing before the rewrite point, the sub-control board 72 performs the song SU effect at the timing when the sound data advances to the rewrite point. rewrite. On the other hand, when there is a request for rewriting the song SU effect at a timing after the rewriting point, the sub-control board 72 discards the rewrite request without rewriting the song SU effect.

Therefore, the rewriting point means the timing of rewriting the running song SU production to another song SU production. Further, the period before the rewrite point can be said to be the rewritable period, and the period after the rewrite point can be said to be the non-rewritable period.

Subsequently, an example of rewriting the song SU effect will be described with reference to FIG. 281. FIG. 281 (A) shows an example of rewriting the song SU effect from LV1 to LV4, and FIG. 281 (B) shows an example of rewriting the song SU effect from LV2 to LV4.

In the example shown in FIG. 281 (A), LV1 (step 1) is initially determined as the song SU effect, and the A melody is played as the BGM according to the LV1, and the ART lottery is performed during the execution of the LV1 of the song SU effect. As a result of winning the prize, a request for rewriting the song SU production (LV1 to LV4) has been made. As described above, the sub-control board 72 rewrites the song SU effect when this rewrite request is made in a period (rewritable period) before the rewrite point set for the sound data of LV1. , If it is performed in a period after the rewrite point (non-rewritable period), the rewrite request is discarded.

When rewriting the song production, the sub-control board 72 switches the sound data at the rewriting point. This rewriting point is set at a timing when the volume of the BGM is low, for example, so that the connection does not become unnatural, so even if the sound data is switched at the rewriting point, it does not become unnatural and the game. It is possible to prevent people from being noticed.

Further, in the song SU production, a predetermined image is displayed on the sub display device 18 together with the BGM. The sub-control board 72 synchronizes the sound and the video by using the interlocking marker added to the sound data. Specifically, when the BGM is output based on the sound data of the LV1, the sub-control board 72 reads out the corresponding video data based on the interlocking marker added to the sound data of the LV1 to obtain the sound and the video. After rewriting the song SU effect, the sound and the video are synchronized by reading out the corresponding video data based on the interlocking marker added to the sound data of the LV4.

Further, the same applies to the rewriting of the song SU effect from LV2 to LV4, and the sub-control board 72 performs the rewriting request in the period before the rewriting point set for the sound data of LV2 (rewritable period). If it is, the song SU effect is rewritten, and if it is performed in a period after the rewriting point (non-rewritable period), the rewriting request is discarded.

Here, in the example shown in FIG. 281, only one timing is set as the rewriting point, but the present invention is not limited to this, and a plurality of timings at two or more locations may be set. In this case, the period before the latest of the plurality of timings is the rewritable period, and the period after the latest timing is the non-rewritable period. When rewriting the song SU production, it is sufficient if the rewritten sound data can be played to the end. Therefore, as in the present embodiment, only one rewriting point is used to prevent the processing from becoming complicated. Can be and is suitable.

Further, in the above example, the timing of changing from the A melody to the interlude 1, the generation timing of the interlocking marker, and the generation timing of the connected video are all illustrated at the same timing, but if the sound and the video do not become unnatural. , There is no problem even if the timing is off, such as the processing on the video side being delayed. That is, the important point when rewriting the song SU production is to provide a rewriting point at a place where the sound connection does not become unnatural, and to set the period before that as the rewritable period.

[Production control when the same music as the song SU production is used in other productions]
Subsequently, a method of effect control by the sub-control board 72 when the same music as the song SU effect is used in other effects will be described. In a pachi-slot machine, a predetermined song may be played as a BGM in a BB or the like, and it is also conceivable to use the same song as the song used in the song SU direction as the BGM in the BB (that is, the BGM of another production). ..

Here, FIG. 282 shows a control example in which the same music as the song SU production is used in other productions for comparison with the control in the pachi-slot machine 1 of the present embodiment. FIG. 282 shows an example in which the BB starts while the B melody of the song SU production is being output, and the same music as the song SU production is played as a BGM in this BB.

In Comparative Example 1 shown in FIG. 282 (A), while the BGM in the song SU production is output, the BGM is also started to be output in the other productions with the start of the BB. In Comparative Example 2 shown in FIG. 282 (B), the sound output of the BGM in the other production is started with the start of the BB, while the sound output of the BGM in the song SU production is stopped.

In the control as in Comparative Example 1, the BGM in the song SU production and the BGM in the BB are simultaneously output, and the reproduced portion is shifted, so that the player feels annoyed. Further, in the control as in Comparative Example 2, since the music that was played as BGM in the song SU production is cut off in the middle, the suggestion of the degree of expectation of the privilege grant by the song SU production becomes meaningless and the same music. Will flow from the beginning again, so the production will be inconsistent and the player will feel annoyed.

On the other hand, in the pachi-slot machine 1 of the present embodiment, the sub-control board 72 performs the control shown in FIG. 283. Specifically, as shown in FIGS. 282 (A) and 282 (B), when the sub-control board 72 starts an effect of playing the same song as a BGM during the song SU effect (BB medium effect), the sub-control board 72 may be used for another effect. The reproduction timing of the sound data to be used is delayed until the song SU production is completed. FIG. 282 (A) shows a control example during execution of the song SU effect of LV4, and FIG. 282 (B) shows a control example during execution of the song SU effect of LV2.

In the LV4 song SU production (A melody, interlude 1, B melody, interlude 2, chorus 1, interlude 3, chorus 2), the music is played as a whole, so the sub-control board 72 is used for the song SU production. Waits for the reading of the sound data by another production until the end of the song, and after the song SU production is completed, the sound data of the same song is read from the beginning again and the sound is output. On the other hand, in the song SU production of LV2 (A melody, interlude 1, B melody, interlude 2), the music ends in the middle, so that the sub-control board 72 uses the sound data of other productions until the song SU production ends. After the song SU production is completed, the song is read from the part of the sound data of the same song following the sound data of LV2, and the sound is output.

According to the control of the present embodiment as described above, since the BGM in the song SU production and the BGM in the BB are not output at the same time, the player does not feel annoyed. Further, since the BGM being produced by the song SU and the BGM being produced by other songs are connected in a series, the image of the music is not spoiled.

As shown in FIG. 283 (C), the sub-control board 72 waits for reading of sound data by another effect until the song SU effect is completed, and after the song SU effect is completed, the same song is played again. Sound data may be read from the beginning and output. That is, comparing the control examples shown in FIGS. 283 (B) and 283 (C), the song SU effect of LV2 (A melody, interlude 1, B melody, interlude 2) is waited for reading of sound data by another effect. However, after that, when the song SU production of LV2 is completed, in the control example shown in FIG. 283 (B), the sound data of the same song is read from the part following the sound data of LV2. On the other hand, the control example shown in FIG. 283 (C) differs in that the sound data of the same music is read from the beginning.

According to such control, the suggestion of the degree of expectation of the privilege grant by the song SU production is appropriately performed, which is preferable. On the other hand, although the same song will be played from the beginning again, the song SU production will not be interrupted in the middle, so by dividing the song at an appropriate place for each LV (step) of the song SU production. , Does not spoil the image of the song.

Subsequently, FIG. 284 is a video example in which the same music as the song SU production is used in other productions. The timings T1, T2, and T3 in FIG. 284 correspond to the timings T1, T2, and T3 in FIG. 283 (B), respectively. That is, the timing T1 is the time when no other production using the same music as the song SU production is performed, and only the song SU production is performed, and the timing T2 is the song SU production during the song SU production. The timing T3 is the time when the song SU production is finished and the sound output of the music by the other production is started.

As shown in FIG. 284 (A), the song SU effect is performed at the timing T1. As described above, since the normal effect can be performed on the display device 11 even during the song SU effect, the normal effect is performed on the display device 11 at the time of the timing T1.

Subsequently, as shown in FIG. 284 (B), at the timing T1, BB is started as a result of displaying the symbol combination of "7-7-7". At this time, the sub-control board 72 continues to output the BGM by the song SU effect in the sound control, and waits for the BGM sound output by the other effect, while the display device 11 and the sub in the video control. The display of the display device 18 is switched to the image in the BB. Further, as shown in FIG. 284 (C), the sub-control board 72 continues to play the corresponding image during the BB, and the image in the BB is also flowing at the time of the timing T3.

When performing another effect using the same music during the song SU effect, the sub-control board 72 waits for the sound control of the other effect until the sound control of the song SU effect is completed, while controlling the image. Will start without waiting for the end of the song SU production.

[Various data tables used for song SU production]
Subsequently, with reference to FIG. 285, various data tables used when executing the song SU effect will be described. FIG. 285 (A) is a song SU production lottery table for deciding which step stage to promote to when performing a song SU production, and FIG. 285 (B) is a song SU production when performing a song SU production. It is a song start timing lottery table for determining the timing to start the SU production.

As shown in FIG. 285 (A), the song SU effect lottery table is provided according to the result of the privilege grant and the size of the privilege to be granted, and the lottery value is set for each type of the song SU effect determined as the lottery result. Prescribe information. Here, in the pachi-slot machine 1 of the present embodiment, stock in the CZ or ART state may be given as a privilege during the normal state, and the magnitude of the privilege is larger in the ART state in the CZ and the ART state. Therefore, in the example shown in FIG. 285 (A), the song SU staging lottery table for "non-winning both ART and CZ" when the privilege is not given, and "ART non-winning" when the small privilege CZ is given later. There is provided a song SU production lottery table for "winning and CZ winning" and a song SU production lottery table for "ART winning" when the ART state, which is a big privilege, is given later.

If both the ART lottery and the CZ lottery in the normal state are not won, the song SU production lottery table for "both ART and CZ are not won" is referred to, and the ART lottery in the normal state is not won and the CZ lottery is not won. In the case of winning, the song SU production lottery table for "ART non-winning and CZ winning" is referred to, and in the case of winning the ART lottery in the normal state, the song SU production lottery for "ART winning" is referred to. The table is referenced.

In the example shown in FIG. 285, the song SU effect is drawn according to the result of the ART lottery or the CZ lottery, but the song SU effect is further considered in consideration of the lottery flag (that is, the internal winning combination). It may be a lottery. For example, the sub-control board 72 has a role with a high expectation of winning (so-called rare role) and a role with a low expectation of winning (so-called normal small role) in the ART lottery and CZ lottery on the main side. The lottery results of the production may be different.

Further, the song SU production lottery table when the grant of the privilege is decided may be referred to in a plurality of games from the decision of the grant of the privilege to the grant of the privilege. , May be referred to only in the game for which the grant of the privilege is decided. Specifically, if you win an ART lottery in the normal state, every game until you move to the ART state (or until you are notified that you have won the ART lottery), a song for "ART win" Song by referring to the SU production lottery table You may also draw a song by referring to the SU production lottery table, and only for games that win the ART lottery in the normal state, sing by referring to the song SU production lottery table. The SU production may be drawn. The same applies to the song SU production lottery table for "ART non-winning and CZ winning".

In addition, the song SU production lottery table when the grant of the privilege is decided is only when the precursor period (the above-mentioned CZ precursor or ART precursor (see FIG. 206)) until the privilege is granted is equal to or longer than the predetermined time. It may be referred to. In this case, it may be possible to refer to the song SU production lottery table when the grant of the privilege is decided only in the game in which the grant of the privilege is decided and the precursor period is longer than the predetermined period. , In the game in which the grant of the privilege is decided, when the precursor period is equal to or longer than the predetermined period, the song SU production lottery table in the case where the grant of the privilege is decided may be referred to. Specifically, the former is a song with reference to the song SU production lottery table for "ART win" only in one game in which the number of precursor games is determined to be more than the predetermined number of wins in the ART lottery. The latter is to draw a SU effect, and the latter is to use a song SU effect lottery table for "ART win" in a plurality of games when the remaining number of precursor games after winning the ART lottery is equal to or more than a predetermined number of games. Refer to it and draw a song SU production.

With reference to FIG. 285 (A), it can be seen that the song SU effect of LV3 or higher is given the privilege of CZ or higher (CZ or ART state), and the song SU effect of LV4 is given the stock of ART state. You can see that it will be done. Further, referring to FIG. 285 (A), the lottery result of the song SU effect differs depending on the result of the CZ lottery or the ART lottery, and when the CZ lottery or the ART lottery is won, the song SU with a higher LV is obtained. It can be seen that the production is more likely to be determined, and it can be seen that the high LV song SU production is more likely to be determined when the ART lottery is won than when the CZ lottery is won. In other words, in the pachi-slot machine 1 of the present embodiment, when the grant of the privilege is decided, the song SU production with a higher LV than when the grant of the privilege is not decided (in other words, promotion to a higher step stage). It is easy to determine the song SU production to be performed), and when the grant of a large privilege is determined, it is easier to determine the song SU production with a high LV than when the grant of a small privilege is determined.

The above-mentioned rewriting of the song SU effect can be performed by any method. For example, the sub-control board 72 is a lottery using the song SU effect lottery table shown in FIG. 285 (A), and is currently being executed. When a song SU production with an LV higher than the LV of the song SU production is determined, the song SU production may be rewritten, and a rewriting lottery table (not shown) is provided for each LV of the running song SU production. It may be provided, and the song SU effect may be rewritten according to the result of the lottery of the rewriting lottery table. Further, when rewriting the song SU effect, the LV of the rewriting destination may be limited. Specifically, the sub-control board 72 rewrites the song SU effect only when the song SU effect of LV or higher for which the privilege grant is confirmed is determined, and the LV of the rewriting destination is an LV for which the privilege grant is not confirmed. It may be decided not to rewrite the song SU production. In this respect, in the pachi-slot machine 1 of the present embodiment, the sub-control board 72 rewrites the song SU effect only when the LV of the rewrite destination is LV4, and rewrites the song SU effect when the LV is 3 or less. Do not do.

Subsequently, with reference to FIG. 285 (B), the song start timing lottery table defines information on the lottery value for the start timing when the song SU effect is executed. When the sub-control board 72 decides to execute the song SU effect of a predetermined LV with reference to the song SU effect lottery table, the song start timing lottery table is referred to to determine the timing to start the song SU effect. At that timing, the song SU production is started. As described above, since the song SU effect proceeds regardless of the progress of the game, the start timing can be set to any timing.

Therefore, in the example shown in FIG. 285 (B), the elapsed time from the determination of the song SU production is defined as the start timing. Since the game progresses in response to the player's operation in the pachi-slot machine 1, the song SU production can be started at a timing not intended by the player by defining the elapsed time as the start timing. As a specific example, the song SU production can be started even when the game is stopped or when the player is away from the desk.

Of course, the start timing is not limited to the elapsed time, and may be, for example, a start operation, a first stop operation, a second stop operation, a third stop operation in the game in which the song SU effect is determined, and the following. It may be a start operation after a game or a plurality of games, a first stop operation, a second stop operation, and a third stop operation.

[Additional production control at the time of canst]
Subsequently, with reference to FIG. 286, the additional staging control at the time of canst in the pachi-slot machine 1 of the present embodiment will be described. In a pachi-slot machine, the end condition of a predetermined state may be managed by numerical information. For example, when a predetermined value is set in the counter and the counter is subtracted based on the result of the game, the value of the counter becomes 0. Exit the predetermined state. Here, the value of the counter is added when the addition lottery is won, but since the counter has a limit, the counter may reach the upper limit value when a lot of additions are made. .. In the pachi-slot machine 1 of the present embodiment, when such a counter reaches the upper limit value (at the time of canst), a special addition effect is performed.

In the example shown below, the ART state is described as an example in which the end condition is managed by numerical information, but the present invention is not limited to this, and the control shown below is applied to any state. Can be done. In the following, an example of managing the duration by the number of games is shown as an end condition, but the duration is not limited to this, and the duration is managed by the number of medals paid out during a predetermined state or the difference number. It may be done, or the duration may be managed by the number of notifications (number of navigations) that affect the payout of medals.
In this case, the target of addition is appropriately adjusted according to the management method of the duration such as the number of games, the number of sets, the number of navigations, and the number of differences.

FIG. 286 is an example of the addition effect performed on the sub side when the addition of 20 games is won in the addition lottery. When the sub-control board 72 grasps the number of added games based on the command received from the main side, it can control the display device 11 and perform an additional effect of notifying the number of added games at a predetermined timing thereafter. .. Here, the method of grasping the number of added games is arbitrary. For example, the added number of games itself may be directly received from the main side, and the difference between the number of games before the addition and the number of games after the addition. The number of games actually added may be calculated from. That is, "the counter updating means receives information on the actual increase amount indicating the increased amount of the numerical information" may mean receiving the added number of games, and the number of games before the addition. And the number of games after the addition may be received. In the pachi-slot machine 1 of the present embodiment, the sub-control board 72 receives the number of games before the addition and the number of games after the addition from the main side, and calculates the number of games actually added from these differences. There is.

FIG. 286 (A) is an example of the addition effect at the time of non-canst. When the sub-control board 72 receives the number of additional games from the main side at the time of non-canning, the sub-control board 72 performs the additional effect. Here, in the example shown in FIG. 286 (A), 20 games are added at the timing when the number of remaining games is 60 games. Therefore, the sub-control board 72 performs an additional effect of "+ 20G" indicating that the number of added games is 20 games.

When the sub-control board 72 is added, the sub-control board 72 may or may not perform the additional effect of notifying the number of added games. If the additional effect is not performed, the value of the internal counter that counts the number of remaining games in the ART state and the value of the display counter displayed on the display device 11 do not match, but as is already known, in the pachislot machine. For example, by performing an additional effect at the end of the ART state, the amount of mismatch between the internal counter and the display counter is adjusted. Further, the addition effect may be performed in the game in which the addition is performed, or may be performed in the game after the game in which the addition is performed.

Therefore, the additional effect is performed at the time when the additional game is performed or when the additional game is approximately won, such as within a few games from the game, and is performed at the timing when the apparent number of games is exhausted (the latter is "post-addition"). And so on). In addition, when the effect control means of the present invention receives from the game control means information about the actual increase amount indicating the amount of the numerical information increased by the counter update means as information about the result of the game, a predetermined timing is obtained. Then, the "predetermined timing" in "the additional effect indicating that the numerical information has increased can be executed by controlling the effect means" means the time when the additional effect is approximately won, and the number of apparent games has disappeared. The timing may be excluded, or it may mean both the time when the addition is abbreviated and the timing when the apparent number of games is exhausted.

Further, the pachi-slot machine 1 is characterized in that the addition effect is not performed at this predetermined timing, and the addition effect for a fraction up to the canst may be performed at a timing other than the predetermined timing. The timing other than this predetermined timing is an arbitrary timing until the number of remaining games in the ART state is exhausted. That is, in the pachi-slot machine 1, the addition of fractions is not performed at the time of the canst, but in the end, the addition effect for adjusting the self-sufficiency may be performed. When such an additional effect is performed, the player will eventually understand that the counter has been stopped, but since the ART state has continued for a long period of time, the counter will immediately grasp the additional effect. Compared to the case where it is done, it is possible to suppress the decline in interest. In addition, if a canst occurs, there is a high possibility that the number of games in the ART state cannot be exhausted during the business hours of the amusement store. In such a case, the player may notice the canst until the store closes. It is possible to suppress the decline in interest.

Subsequently, FIG. 286 (B) shows an example of additional control at the time of canst for comparison with respect to the control of the present embodiment. In the following, it is assumed that the upper limit of the internal counter for counting the number of remaining games in the ART state is 255 games. Further, in the pachi-slot machine 1 of the present embodiment, the number of remaining games in the ART state is managed on the main side.
Further, in the following, the number of games determined as a result of the additional lottery is referred to as "the number of games resulting in the lottery", the number of games actually added is referred to as the "number of actual additional games", and the number of games actually added is referred to as the "number of additional games" and is drawn in the additional lottery. The number of candidate games to be obtained is called the "number of candidate games".

In the example shown in FIG. 286 (B), when the number of remaining games in the ART state is 248 games, the additional lottery is won, and 20 games are determined as the lottery result games. However, since the upper limit of the internal counter is 255, the main side that manages the counter cannot add the entire number of lottery result games (20 games) to the counter, and up to the upper limit. The remaining 7 games are added to the counter (that is, the actual number of additional games is 7 games).

At this time, in the comparative example shown in FIG. 286 (B), the sub-control board 72 receives information indicating that the actual number of additional games is 7 games from the main side, and as a result, performs an additional effect of "+ 7G". There is. That is, in the comparative example, when the actual number of added games is smaller than the number of lottery result games as a result of the canst, an additional effect is performed indicating that a fractional number of games less than the lottery result games has been added. ..

From the player's point of view, if a fraction is added, it will be possible to grasp that the counter has reached the upper limit, and as a result, it feels like a so-called loss situation, and as a result, the hobby of the game. Will drop.

On the other hand, as shown in FIG. 286 (C), in the pachi-slot machine 1 of the present embodiment, when the fraction is added as a result of the canst, the addition effect is not performed. That is, in the example shown in FIG. 286 (C), although the internal counter adds up to the upper limit value, the additional effect is not performed on the display device 11. As a result, it is possible to make it difficult for the player to know that the counter has reached the upper limit value, and it is possible to suppress a decrease in the interest caused by the counter.

Here, an example of a method of determining that the counter managed on the main side has reached the upper limit value on the sub side will be described. It is possible to transmit information indicating that the counter has been completed from the main side to the sub side, but since the capacity of the main side is limited, in the pachi-slot machine 1 of the present embodiment, the counter on the main side is set on the sub side. It is determined that the upper limit has been reached. Specifically, the sub-control board 72 determines that the counter on the main side has reached the upper limit value when a fraction is added to the number of ART games.

As an example, the sub-control board 72 determines whether or not a fraction has been added by comparing the number of lottery result games, the number of actual additional games, and the number of candidate games, and the counter on the main side has reached the upper limit. Judge whether or not.

In the case of a pachislot machine that does not transmit the result of the additional lottery (the number of lottery result games) from the main side to the sub side like the pachislot 1 of the present embodiment, the sub control board 72 is also drawn on the sub side in the additional lottery. The number of candidate games that can be played (number of candidate games) is stored, and the actual number of additional games obtained according to the information transmitted from the main side is compared with the number of candidate games stored in advance on the sub side. By doing so, it is determined whether or not the fraction has been added. As an example, when the number of candidate games is 10, 20, and 30 games and the actual number of additional games is 7, the sub-control board 72 determines that the fraction has been added (the counter on the main side determines. It is judged that the upper limit has been reached), and no additional production is performed.

Further, in the case of a pachislot machine that transmits an additional lottery result (number of lottery result games) from the main side to the sub side, the sub control board 72 is the actual number of additional games obtained based on the information transmitted from the main side. By comparing with the number of lottery result games, it is determined whether or not a fraction has been added. As an example, when the number of lottery result games is 20 games and the actual number of additional games is 7, the sub-control board 72 determines that the fraction has been added (the counter on the main side has reached the upper limit value). (Judgment), and no additional production is performed.

In the method of comparing the actual number of additional games and the number of candidate games, depending on the current value of the counter, it may not be determined as an additional fraction even though it is at the time of cant. For example, when the number of candidate games is 10, 20, and 30 games, and 20 games are determined as the number of lottery result games from these candidate games, the actual number of additional games may be increased depending on the current value of the counter. It may be 10 games. In such a case, the sub-control board 72 does not determine that the fraction is added even though it is at the time of cant.

Therefore, when comparing the actual number of additional games and the number of candidate games, the sub-control board 72 can execute the additional effect even at the time of cant. Since the number of additional games notified in this case is only one of the preset number of candidate games, the player can grasp that the internal counter has reached the upper limit. However, the interest of the game does not decline.

By the way, depending on the pachislot machine, the number of candidate games may differ depending on the internal winning combination (lottery flag) that triggered the addition. Therefore, when comparing the actual number of additional games and the number of candidate games, the sub-control board 72 may determine the addition of fractions in consideration of the internal winning combination that triggered the addition. Specifically, the sub-control board 72 stores the number of candidate games for each internal winning combination, and stores the information regarding the internal winning combination received from the main side and the information regarding the actual number of additional games in advance. Comparing with the number of candidate games for each internal winning combination, if the actual number of additional games does not match any of the number of candidate games set for the internal winning combination that triggered the addition, a fraction is added. It is determined that it has been broken (it is determined that the counter on the main side has reached the upper limit).

Next, another example of the additional effect control at the time of canst will be described. Depending on the current value of the counter, the actual number of additional games at the time of cant may be a value between a plurality of candidate games. Here, if an additional effect is performed to notify the actual number of additional games (fractions) different from the number of candidate games, the player will be aware that the number of ART games has been completed, but the number of candidate games is notified. As long as it is, it will not be known that the number of ART games has been completed. Therefore, when the actual number of additional games at the time of cant is a value between a plurality of candidate games, the sub-control board 72 notifies the maximum number of candidate games smaller than the actual number of additional games. I do.

The example shown in FIG. 286 (D) is an effect control example in which 20 games are determined as the number of lottery result games in a state where the internal counter before addition is counting 238. Since the upper limit of the counter is 255, the actual number of additional games is 17, and if the actual number of additional games is notified, the player will know that the number of ART games has been completed. On the other hand, when the number of candidate games is 10, 20, or 30, it is possible to notify that 10 games have been added. Therefore, in the example shown in FIG. 286 (D), the sub-control board 72 performs an additional effect of "+ 10G" indicating that the number of added games is 10.

Depending on the pachi-slot machine, there may be a situation where the addition is confirmed, and in such a case, the inability to perform the addition effect may cause the player to feel distrust. In this respect, as in the case of another control, by performing an additional effect of notifying the largest number of candidate games that are smaller than the actual number of additional games even at the time of cant, the additional is appropriately added in the situation where the additional is confirmed. It is suitable because it can produce an effect.

In addition, regarding such another control, the maximum number of candidate games smaller than the actual number of additional games should be notified in consideration of the internal winning combination (lottery flag) that triggered the addition. Can be done. That is, when the internal winning combination that triggered the addition is the first combination, the number of candidate games associated with the first combination is smaller than the actual number of additional games. If the internal winning combination that triggered the addition is the second role, the number of candidate games associated with the second role is selected. , The largest number of candidate games smaller than the actual number of additional games can be specified, and the additional effect can be performed.

Further, the determination of whether or not the actual number of additional games at the time of cant is a value between the number of a plurality of candidate games is determined by determining whether or not there is a number of candidate games smaller than the actual number of additional games. This can be done by determining whether or not there are a number of candidate games equal to or less than the actual number of additional games, and the sub-control board 72 is smaller than the actual number of additional games (or the actual number of additional games) even at the time of cant. An additional effect may be performed to notify the maximum number of candidate games (below).

By the way, in recent years, a pachislot machine that notifies one addition in a plurality of times, for example, when the actual number of additional games is 10 games, the first time after the game or several games in which the 10 games are added. As a notification of, an additional effect is performed to notify that 5 games have been added, and then, when the number of apparent ART games becomes 0, etc., the remaining 5 games are added as a second notification. Pachislot machines that perform additional effects are also known. Such a control (divided notification control) in which one addition is notified in a plurality of times can be applied to the pachi-slot machine 1 of the present embodiment.

In the above example, the provisional addition effect can be performed only when the number of actual addition games is a value between a plurality of candidate games, but when such division notification control is applied, the actual addition is performed at the time of cant. Even if there is no candidate game number smaller than (or less than or equal to) the number of games, it is possible to perform an additional effect without being noticed by the player. That is, by setting the minimum number of additional games that can be notified in the split notification effect to a value smaller than any of the number of candidate games (number of candidate games) that can be drawn in the additional lottery, the player can strike. It is possible to perform an additional production without being noticed. For example, assuming that the actual number of additional games is 7 games, the minimum number of additional games that can be notified in the split notification effect is 5 games, and the minimum number of candidate games is 10 games, the split notification control is not applied. If the additional effect is performed at a predetermined timing, the fraction of 7 games will be notified, and the player will notice that the game is being played. On the other hand, when the split notification control is applied, it is possible to notify the player of 5 games, which is the minimum number of additional games that can be notified in the split notification effect, at a predetermined timing. You won't notice what you're doing. In addition, the notification for the remaining 2 games will be done at any time until the number of remaining games in the ART state is exhausted, but it is often the case that the store closes before this notification, so tentatively, this Even if the notification is given, it can be said that a player who has already played a game in the ART state for a long period of time is less likely to worry about a slight loss due to truncation due to the canst.

Further, when the actual number of added games at the time of cant is a multiple of the number of candidate games, the sub-control board 72 may perform the following control. Here, as another modification, for example, the number of candidate games is 10, 20, and 40 games, and although 40 games are determined as the number of lottery result games, the actual number of additional games is 30 games due to the cant. Think about the case. In such a case, the sub-control board 72 may perform the additional effect of 10 games three times, or the additional effect of 10 games once and the additional effect of two games once. Of course, the same applies to the case where the actual number of additional games associated with the canst is between the number of candidate games such as 33 games.

That is, when the actual number of additional games in the event of a cant matches (or is greater than) a value that can be calculated as a multiple of one of the candidate games or the sum of a plurality of candidate games. The sub-control board 72 may perform additional effects for the number of candidate games a plurality of times. It should be noted that such control is premised on performing the additional effect multiple times, but the additional trigger (such as the winning of a predetermined internal winning combination) occurs only once in the game until the additional effect is performed multiple times. If this is not the case, an expert who has grasped the type of candidate game number may be able to grasp that a cant has occurred from the total number of additional games notified by one additional opportunity. be. Therefore, if the addition trigger occurs only once in the game leading up to the addition effect, it may be treated as a fraction and the addition effect may not be performed, and the value that can be notified in the number of candidate games. (For example, an additional effect for notifying that 20 games have been added) may be performed. As a result, the additional effect can be executed without the player noticing that the player is in a cant.

In addition, when the additions are made multiple times in a short period of time, the actual number of additional games does not match the number of candidate games, but the total value matches the number of candidate games (or from the number of candidate games). Is also large). In such a case, the sub-control board 72 determines that the total value of the actual number of additional games matches the number of candidate games, and provides an additional effect of notifying that the number of candidate games has been added. You may do it. For example, taking the case where there are 10 candidate games as an example, if the actual number of additional games of 3 games is generated in the first addition at the time of the canst and 7 games are generated in the second addition, the total number of actual additional games is 10. Become a game. Therefore, the sub-control board 72 determines that the total value of the actual number of additional games matches the number of candidate games of 10, and notifies that the addition of 10 games, which is the total value of the actual number of additional games, has been performed. It may be possible to perform a notification effect. Such control is provided with, for example, a counter on the sub side that holds and adds the value of the fraction that was not notified, and whether or not the current value of the counter matches the number of candidate games when the fraction is added. It can be realized by making a judgment as to whether or not, and performing an additional effect when a match is made.

Further, depending on the pachislot machine, when it is notified that a specific number of games have been added in the additional effect, the set value is equal to or higher than a predetermined value (for example, set when 6 games are notified in the additional effect 6). The set value may be suggested depending on the number of games notified. Here, when the addition of the fraction accompanying the canst is finally notified, the value of the fraction may match the specific number of games suggesting the setting, and in such a case, the player sets the setting. You may misunderstand the value. Therefore, in order to prevent such a misunderstanding, the sub-control board 72 may perform an additional effect suggesting an advantageous situation such as a set value and an additional effect at the time of canst in different modes. For example, in the addition effect suggesting setting 6, the addition of 6 games is displayed in gold or rainbow color, and the addition effect is accompanied by a dedicated sound effect, while the addition effect at the time of canst is displayed in black. And so on.

By the way, in the case of performing an additional effect suggesting an advantageous situation such as such a setting value, a specific number of games is set as the number of candidate games (for example, among the number of candidate games in setting 6). There are 6 games, and there are no 6 games in the number of candidate games in settings 1-5). Here, when a control for notifying the number of candidate games is adopted when there is a candidate game number that can be notified at the time of a cant as described above, this specific number of games can be frequently notified. There is sex. For example, if the number of lottery result games is 10 but the actual number of additional games is 6 to 9 due to the cant, an additional effect is performed to notify that 6 games have been added. I will be broken. Normally, the effect that suggests the setting is selected with a relatively low probability, so if it is performed frequently in this way, the balance will be lost. Therefore, when notifying the number of candidate games at the time of cant, the sub-control board 72 determines the number of candidate games to be notified from the number of candidate games that can be selected by all the settings among the plurality of candidate games. Is preferable.

[Fail-safe function on the sub side]
Subsequently, the fail-safe function on the sub (sub-control board 72) side will be described. In the pachi-slot machine 1, information about the game is transmitted from the main side to the sub side by transmitting a command, and the sub side controls the production according to the game result grasped from the received command. Here, if an error occurs in the communication between the main and the sub (communication error), or if there is an error in the parameter of the command sent from the main side (parameter bug), the main on the sub side. The information on the side cannot be obtained properly. In the pachi-slot machine 1 of the present embodiment, when such an error occurs, the following control is performed on the sub side to prevent the progress of the game from being hindered by the error.

[Fail-safe function 1 (fail-safe when transitioning from CZ to ART state)]
First, as a fail-safe function on the sub side, a fail-safe function at the time of transition from the CZ to the ART state will be described. In the pachi-slot machine 1, the main control board 71 determines the rank of the ART state at the time of winning the ART, promotes the rank at the time of winning the ART during the ranking determination ART, and uses the rank after the promotion to play a game during normal ART. Control. At this time, as described above, the sub-control board 72 indicates the weapon corresponding to the weapon rank at the time of transition to the ART state, thereby suggesting the rank at the time of winning the ART.

Here, at the time of transition to the ART state (that is, at the time of transition to rank determination ART), information (parameter) regarding the rank (initial rank) of the target to be promoted during the rank determination ART is transmitted from the main side to the sub side. Then, on the sub side, based on this initial rank, a weapon is displayed to suggest the initial rank. At this time, if the sub side cannot receive the information about the initial rank transmitted from the main side, or if there is an error in the information about the initial rank, the sub side suggests the initial rank at the time of transition to the ART state. Can't do.

In this regard, in the pachi-slot machine 1 of the present embodiment, when the sub-control board 72 cannot receive information on the initial rank from the main side at the time of transition to the ART state (that is, at the time of transition to rank determination ART), a dedicated notification is given. It is possible to prevent the progress of the game from being hindered by performing the production. Specifically, the sub-control board 72 has a weapon rank (“weapon S”, “weapon A”, “weapon B”, and “weapon” determined according to the initial rank when no error has occurred in the parameters related to the initial rank. By displaying the image corresponding to "C" and "Weapon D"), the effect suggesting the initial rank at the time of transition to the ART state is performed, while if an error occurs in the parameter related to the initial rank, "weapon" Display the video corresponding to "?" (Dedicated notification production).

Here, since the information regarding the result of the game such as the payout is strictly managed on the main side, even if there is an error in the parameter related to the initial rank acquired on the sub side, the initial on the main side. As long as the rank and the rank after promotion are properly grasped, it does not affect the progress of the game. Therefore, in the pachi-slot machine 1, in the situation where the parameter error occurs only on the sub side, the situation where the parameter error occurs is passed by performing the dedicated notification effect without stopping the progress of the game. In addition, since the command from the main side to the sub side is transmitted at various timings, an error can be obtained by acquiring the parameters that could not be received from the command transmitted from the main side after passing the parameter error by the dedicated notification effect. It is possible to correct the situation in which the above occurs, and it is possible to perform appropriate staging control.

[Fail-safe function 2 (bonus notification effect during ART state)]
Next, as a fail-safe function on the sub side, a fail-safe function when performing a bonus notification effect will be described.

In pachislot machines, when the role related to the bonus is determined as the internal winning role, a bonus notification effect may be performed to inform that the bonus is won, but if the bonus notification effect is performed immediately after the bonus winning. Since the game becomes monotonous, a bonus announcement effect may be performed after several games have passed since the bonus was won. In a pachi-slot machine where the capacity of the main side is limited, it is common to manage the timing of performing such a bonus notification effect not on the main side but on the sub side. Specifically, when the winning combination related to the bonus is determined as the internal winning combination in the internal lottery on the main side, the sub side is notified that the bonus has been won based on the command transmitted from the main side. On the sub side, when the bonus winning is grasped, the number of precursor games until the bonus announcement effect is performed is determined, and when the games corresponding to the number of precursor games are performed, the bonus announcement effect is performed.

Such control, which is performed several games after winning the bonus notification effect, is also performed during the game state managed by the number of games. For example, even if the bonus is won during the ART state, the bonus is obtained. Instead of performing a bonus notification effect immediately after winning, a bonus notification effect is performed when the number of games played for the number of precursor games is performed after the bonus winning. Here, in a normal pachislot machine, a display counter is provided to notify the player of the number of remaining games during the ART state, but the update of the display counter may have been stopped after winning the bonus. , The player knows that the bonus has been won, and there is no point in performing the bonus notification effect after the number of precursor games. Therefore, even after winning the bonus, this display counter is used until the bonus announcement effect is performed. Continues to update.

Therefore, although the number of precursor games is basically determined to be smaller than the number of remaining games in the ART state, the display counter is set due to a lottery error on the sub side, a precursor game number, or a display counter update error. Even if it becomes 0, there is a possibility that a situation may occur in which the number of precursor games remains. In such a case, from the aspect of staging, even though the bonus was won during the ART state, it looks as if the bonus was won after the end of the ART state, which gives the player an unnecessary misunderstanding. It is not preferable because it may end up.

Therefore, in the Pachislot 1 of the present embodiment, when the sub-control board 72 wins the bonus during the ART state, the number of precursor games is determined, and basically, the bonus is announced that the games for the number of precursor games are performed. If the value of the display counter reaches a specific value (for example, 0) before the games for the number of precursor games are performed, the bonus notification effect is performed without waiting for the number of precursor games to elapse. Is to be done.

In the following, the fail-safe function on the sub side will be described by taking the ART state as an example, but the applicable game state is a game state in which the duration is managed by numerical information, and this numerical information is displayed by the counter. It suffices as long as it is possible to play. The duration may be managed by, for example, the number of games, the number of medals to be paid out or the difference number, and the notification that affects the payout of medals is performed. It may be managed by the number of times (number of navigations). That is, in the sub-control board 72, the value of the display counter indicating the number of remaining medals that can be paid out before the game for the number of precursor games is played is a specific value (for example, depending on the number of medals paid after winning the bonus). If it becomes 0), the bonus notification effect may be performed without waiting for the elapse of the number of precursor games, and the game for the number of precursor games may be played by the notification such as the push order after winning the bonus. If the value of the display counter indicating the remaining number of navigations reaches a specific value (for example, 0) before the game is played, the bonus notification effect may be performed without waiting for the number of precursor games to elapse. ..

FIG. 287 is a flowchart showing a control example on the sub side for realizing the fail-safe function 2. For example, when the sub control board 72 (sub CPU201) receives the above-mentioned start command, the sub control board 72 performs the control shown below. ..

First, the sub CPU 201 determines whether or not the bonus is won (S2501). For example, the sub CPU 201 gives a bonus based on whether or not the internal winning combination includes a combination related to the bonus, or whether or not the gaming state is between the ART in-progress flags, based on the command received from the main side. Determine if you have won. If the bonus is not won (NO), the sub CPU 201 ends this process (bonus notification process).

On the other hand, when the bonus is won, the sub CPU 201 determines whether or not the precursor game number has not been set yet (S2502). If the number of precursor games has not yet been set (YES), the sub CPU 201 subsequently determines and sets the number of precursor games (S2503). In this process, the sub CPU 201 determines the number of precursor games smaller than the number of remaining games by referring to the number of remaining games in the ART state from the number of precursor games of 1 to 8 games. The sub CPU 201 clears the set number of precursor games when the bonus notification effect is performed or when the gaming state shifts to the bonus state.

Following the process of S2503, or when the number of precursor games has already been set in S2502 (NO), the sub CPU 201 updates the number of precursor games (-1) (S2504). Subsequently, the sub CPU 201 determines whether or not the number of precursor games is greater than 0 (S2505). When the number of precursor games is 0 or less (NO), the sub CPU 201 performs a bonus notification effect (S2506), subsequently clears the number of precursor games (S2507), and ends this process.

On the other hand, when the number of precursor games is larger than 0, the sub CPU 201 determines whether or not the display counter is 0 (S2506). The value of the display counter is updated according to the result of the game, and specifically, the sub CPU 201 subtracts 1 from the value of the display counter when one game is played. When the value of the display counter is not 0 (NO), that is, when the number of precursor games is larger than 0 and the value of the display counter is not 0, the sub CPU 201 ends this process.

On the other hand, when the value of the display counter is 0 (YES), that is, when the number of precursor games is larger than 0 and the value of the display counter is 0, the sub CPU 201 performs a bonus notification effect (S2506). ), Subsequently, the number of precursor games is cleared (S2507), and this process is terminated.

By performing such processing by the sub CPU 201, in the pachi-slot machine 1, when the value of the display counter becomes a specific value (for example, 0), a bonus notification effect is produced without waiting for the number of precursor games to elapse. It can have a fail-safe function of doing.

[Fail-safe function 3 (fail-safe for matching stock numbers)]
Subsequently, with reference to FIGS. 288 to 293, as a fail-safe function on the sub side, a fail-safe function when there is a discrepancy in the numerical values managed between the main side and the sub side will be described. In the following, the number of stocks will be described as an example of fail-safe, but the control shown below is applied not only to the number of stocks but also to any numerical value such as the number of games, the number of navigations, and the number of differences. be able to.

In recent pachislot machines that manage information on ball ejection on the main side, the number of stocks in the ART state is managed on both the main side and the sub side. In such a pachislot machine, the sub side manages the number of stocks in the ART state based on the command sent from the main side, but if a communication error or parameter error occurs, the ART state managed by the main side. There may be a discrepancy between the number of stocks in the stock and the number of stocks in the ART state managed on the sub side.

In the pachi-slot machine 1 of the present embodiment, when a deviation occurs between the main side and the sub side, the deviation is eliminated by adjusting the number of stocks in the ART state managed on the sub side to the value on the main side. There is. As an example, when the number of stocks on the sub side is larger than the number of stocks on the main side, the sub control board 72 subtracts the number of stocks on the sub side so as to match the number of stocks on the main side.

First, with reference to FIG. 288, the outline of the counter provided by the pachi-slot machine 1 of the present embodiment for managing the number of stocks in the ART state will be described. As shown in FIG. 288 (A), in the pachislot 1, as the main counter, a counter for rank 1 that counts the number of stocks in the ART state of rank 1 and a counter for rank 2 that counts the number of stocks in the ART state of rank 2 are used. A counter, a rank 3 counter that counts the number of stocks in the ART state of rank 3, and a counter for rank 4 that counts the number of stocks in the ART state of rank 4 are provided.

Further, in the pachi-slot machine 1, an unreported counter and a notified counter are provided as sub-side counters. The unreported counter is a counter that counts the number of stocks in the ART state determined to be granted to the player that has not been notified to the player that the stock has been granted. The completed counter is a counter that counts the number of stocks in the ART state determined to be given to the player, and the number of stocks notified to the player that the stock has been given. When the stock in the ART state is given on the main side, the unreported counter is first added on the sub side, and then the unreported counter is subtracted when the notification condition is satisfied and the notification is performed for the stock of the unreported portion. Add the notified counter. It should be noted that the notification condition may be satisfied when the value of the unreported counter is 1 or more, and the condition is arbitrary.

Further, as shown in FIG. 288 (A), these unreported counters and notified counters are provided with unreported counter silver, unreported counter money, notified counter silver, and notified counter money. Counter silver (unreported counter silver and notified counter silver) and counter gold (unreported counter gold and notified counter gold) have different ranks of corresponding ART states, and ranks 1 and 2 of the ART state are counter silver. The ranks 3 and 4 in the ART state are counted only by the counter of the type distributed with a predetermined probability among the counter silver and the counter gold. That is, when the stock in the ART state of rank 1 (or rank 2) is given on the main side, the unreported counter silver is added on the sub side, and then the notification condition is satisfied for the stock of the unreported portion and notification is performed. Then, the unreported counter silver is subtracted and the notified counter silver is added. Further, when the stock in the ART state of rank 3 (or rank 4) is given on the main side, the sub side first performs a distribution lottery to determine whether to distribute to counter silver or counter gold. Then, when it is decided to distribute to the counter silver by this distribution lottery, the unreported counter silver is added, and then, when the notification condition is satisfied and the notification is performed for the stock of the unreported portion, the unreported counter silver is subtracted. And the notified counter silver is added. On the other hand, when it is decided to distribute to the counter money by the distribution lottery, the unreported counter money is added, and then, when the notification condition is satisfied and the notification is performed for the stock of the unnotified amount, the unreported counter money is subtracted. And add the notified counter money.

Note that the mode of notification differs between the notification of stock according to the unreported counter silver and the notification of stock according to the unreported counter money. For example, the notification of stock according to the unreported counter silver produces a silver stock notification effect. The gold stock notification effect is performed in the stock notification according to the unreported counter money. From the player's point of view, it is possible to infer the rank of the ART state given from the mode of the notification effect.

Subsequently, FIG. 288 (B) shows basic control for updating these counters. In the following, the types of the main counter and the types of the sub counter are simplified. Further, in the following, the counter is updated one by one, but when a plurality of stocks in the ART state are given, the counter values are also updated multiple times, and the fact that a plurality of stocks are given at once. When notifying, multiple counter values are also updated.

When the stock in the ART state is given, on the main side, the main control board 71 adds 1 to the main side counter (more specifically, the main side counter according to the rank at the time of winning), and the value of the main side counter. To the sub side. Upon receiving the value of the main side counter, on the sub side, the sub control board 72 adds 1 to the value of the unreported counter (more specifically, the sub side counter distributed according to the rank).

The method of grasping that the stock in the ART state has been given is arbitrary. For example, information indicating that the stock in the ART state has been given is transmitted from the main side to the sub side. It is also possible to transmit the increase amount of the main side counter which has increased due to the addition of the stock in the ART state from the main side to the sub side, and the front and rear main side counters and the like may be transmitted. By looking at the change in the value, it may be possible to grasp on the sub side that the stock in the ART state has been given when the value has increased. Then, when the sub-control board 72 grasps that the stock in the ART state has been given, the value of the unreported counter is added by the number of stocks that have been found to have been given.

Further, when the notification condition is satisfied and the player is notified that the stock in the ART state has been given, on the sub side, the sub control board 72 subtracts 1 from the value of the unnotified counter and the notified counter. Add 1 to the value of.

Further, when the stock in the ART state is released (for example, when the gaming state shifts to the rank determination ART), on the main side, the main control board 71 subtracts 1 from the main side counter and sets the value of the main side counter. Send to the sub side. Upon receiving the value of the main side counter, on the sub side, the sub control board 72 subtracts 1 from the value of the unreported counter or the notified counter. At this time, in the pachislot 1 of the present embodiment, the sub-control board 72 subtracts 1 from the value of the unreported counter or the notified counter according to the released rank, but 1 in both the unreported counter and the notified counter. If the above values are counted, they are preferentially subtracted from the value of the notified counter. As an example, when the stock in the ART state of rank 1 is released on the main side, the sub-control board 72 preferentially performs subtraction at the time of release from the notified counter silver, and the value of the notified counter silver is 0. If so, subtract the value of the unreported counter.

The method of grasping that the stock in the ART state has been released is also arbitrary. For example, information indicating that the stock in the ART state has been released is transmitted from the main side to the sub side. It is also possible to transmit the decrease amount of the main side counter which has decreased due to the release of the stock in the ART state from the main side to the sub side, and the change of the game state before and after the game state, etc. For example, when the gaming state shifts to the rank determination ART, the sub side may grasp that the stock in the ART state has been released. Then, when the sub-control board 72 grasps that the stock in the ART state has been released, the value of the unreported counter or the notified counter is subtracted by the number of stocks grasped to be released.

Subsequently, with reference to FIGS. 289 and 290, a control example of updating the counter for counting the number of stocks in the ART state will be described. In the example shown in FIG. 289, the value of the main counter before the start of the game in the first game is "total 6 (total of the counters for rank 1 to the counter for rank 4)", and the value of the sub counter is ". It is assumed that the total is 6 (unreported counter “2”, notified counter “4”) ”. FIG. 289 shows an update control example of the counters of the first game and the second game, and FIG. 290 shows an update control example of the counters of the third game and the fourth game following FIG. 289.

When the game of the first game starts, a start command (“lever effect control 1 to 5” command, “game start” command) is transmitted from the main side to the sub side, and information on the result of this game is transmitted. .. On the sub side, the sub-control board 72 has whether or not the stock in the ART state has been added, whether or not the stock in the ART state has been released, and whether or not the notification conditions have been satisfied in this game. To judge. In the example shown in FIG. 289, in the game of the first game, neither the stock is added nor the stock is released, and the notification condition is not satisfied. Therefore, the sub-control board 72 finishes the process at the start of the game without updating the value of the sub-side counter.

Subsequently, at the end of the game of the first game, a winning operation command (“3 off production control 1 to 5” command, “winning operation” command) is transmitted from the main side to the sub side, and the main at the end of the game. The value of the side counter is sent to the sub side. On the sub side, the sub control board 72 compares the value of the main side counter with the value of the sub side counter, and determines whether or not the counter values match between the main and sub at the end of this game. do. In the example shown in FIG. 289, at the end of the game of the first game, the counter values match between the main and sub, so that the sub-control board 72 has completed the process at the end of the game.

As described above, in the pachi-slot machine 1, the above-mentioned fail-safe function is exhibited by comparing the counter values between the main and sub at the end of the game as well as at the start of the game. Note that FIGS. 289 and 290 show basic control examples relating to counter update when the fail-safe function is not exerted, and FIGS. 291 and 292 show control examples when the fail-safe function is exerted.

Subsequently, when the game of the second game starts, a start command is transmitted from the main side to the sub side, and information regarding the result of this game is transmitted. In the example shown in FIG. 289, in the game of the second game, stock is added, and as a result, the value of the main counter is updated from "total 6" to "total 7". On the sub side, the value of the unreported counter is added by 1 because the stock has been added. As a result, the value of the sub-side counter is also updated to "total 7" of the unreported counter "3" and the notified counter "4".

Subsequently, at the end of the second game, the winning operation command is transmitted from the main side to the sub side, and the value of the main side counter at the end of the game is transmitted to the sub side. On the sub side, the sub control board 72 compares the value of the main side counter with the value of the sub side counter, and determines whether or not the counter values match between the main and sub at the end of this game. do. In the example shown in FIG. 289, since the value of the sub-side counter is also updated according to the addition of stock, the value of the counter is the same between the main and sub.

Subsequently, when the game of the third game starts, a start command is transmitted from the main side to the sub side, and information regarding the result of this game is transmitted. In the example shown in FIG. 290, in the game of the third game, the stock is not given and the stock is not released, so that the value of the main counter is maintained at "total 7". In the example shown in FIG. 290, the notification condition is satisfied in the game of the third game. Therefore, the sub-control board 72 updates the value of the sub-side counter by subtracting 1 from the value of the unreported counter and adding 1 to the value of the notified counter.

Subsequently, at the end of the third game, a winning operation command is transmitted from the main side to the sub side, and the value of the main side counter at the end of the game is transmitted to the sub side. On the sub side, the sub control board 72 compares the value of the main side counter with the value of the sub side counter, and determines whether or not the counter values match between the main and sub at the end of this game. do. In the example shown in FIG. 290, although the value of the sub-side counter is updated as a result of satisfying the notification condition, the value of the sub-side counter is appropriately updated, so that the counter values match between the main and sub sides.

Subsequently, when the game of the fourth game starts, a start command is transmitted from the main side to the sub side, and information regarding the result of this game is transmitted. In the example shown in FIG. 290, in the game of the fourth game, the stock is released, and as a result, the value of the main counter is updated from "total 7" to "total 6". On the sub side, the value of the notified counter is subtracted by 1 because the stock has been released. As a result, the value of the sub-side counter is also updated to "total 6" of the unreported counter "2" and the notified counter "4".

Subsequently, at the end of the game of the fourth game, a winning operation command is transmitted from the main side to the sub side, and the value of the main side counter at the end of the game is transmitted to the sub side. On the sub side, the sub control board 72 compares the value of the main side counter with the value of the sub side counter, and determines whether or not the counter values match between the main and sub at the end of this game. do. In the example shown in FIG. 290, the value of the sub-side counter is also updated according to the release of the stock, so that the counter values match between the main and sub.

Subsequently, a control example in the case of exhibiting the fail-safe function will be described with reference to FIGS. 291 and 292.

At the end of the game, a winning operation command is transmitted from the main side to the sub side, and the value of the main side counter at the end of the game is transmitted to the sub side. On the sub side, the sub control board 72 compares the value of the main side counter with the value of the sub side counter. In the example shown in FIG. 291 (A), the value of the sub side counter is higher than the value of the main side counter. Is bigger. Therefore, the sub-control board 72 adjusts the value of the sub-side counter so as to match the value of the main-side counter.

In the example shown in FIG. 291 (A), the value of the main side counter at the end of the game is "total 7", and the value of the sub side counter is the "total" of the unreported counter "3" and the notified counter "5". Since it was "8", the sub-control board 72 subtracts 1 from the value of the unreported counter or the notified counter, and updates the value of the sub-side counter to "total 7".

Here, when the value of the sub-side counter is larger than the value of the main-side counter, it is arbitrary whether the value of the unreported counter or the notified counter is subtracted, but in the pachislot 1 of the present embodiment, for example. , The type of counter to be subtracted is determined according to whether or not the stock has been released in this game.

As a typical case where the value of the sub-side counter is larger than the value of the main-side counter, the value of the sub-side counter is not subtracted even though the value of the main-side counter is subtracted at the time of stock release. Conceivable. On the other hand, as a case where the value of the sub-side counter becomes larger than the value of the main-side counter even though the stock is not released in this game, for example, as a result of satisfying the notification condition, the sub-side is used. It is conceivable that the value of the unreported counter is not subtracted even though the value of the notified counter of the counter is added.

If the value of the unreported counter is 1 or more, the notification condition may be satisfied and the stock notification effect may be performed. Therefore, if the value of the unreported counter is maintained in the latter case, There is a possibility that the number of stocks in the ART state as seen by the player will be larger than the actual number of stocks.

For example, the main side counter is counting the number of stocks of "total 3", and the sub side counter is counting the number of stocks of "total 3" of the unreported counter "1" and the notified counter "2". Then, the apparent number of stocks seen by the player is "2". When the notification condition is satisfied and the stock release effect is performed in this state, the apparent number of stocks becomes "3". At this time, if normal processing is performed, the unreported counter "0" and the notified counter "3" are set, but if some error occurs and the value of the unreported counter is not subtracted, the value of the unreported counter is not subtracted. There is a possibility that the unreported counter "1" and the notified counter "3" will be displayed. If the values of the counters between the main and sub are matched by subtracting the value of the notified counter for this error, the unannounced counter "1" and the notified counter "2" will be obtained. After that, there is a possibility that the number of unnotified stocks will be notified. In the current state, the apparent stock number is "3", and even though it matches the actual stock number, if the unreported stock number is notified, the apparent stock number will be increased. It becomes "4" and exceeds the actual number of stocks.

Therefore, in the pachi-slot machine 1 of the present embodiment, the value of the sub-side counter of the sub-control board 72 is larger than the value of the main-side counter at the end of the game, even though the stock is not discharged in this game. If the error state is reached, the value of the counter between the main and sub is matched by preferentially subtracting from the value of the unreported counter of the sub-side counter.

The example shown in FIG. 291 (B) is an example of fail-safe control by the sub-control board 72 when the stock is not released in this game. In the example shown in FIG. 291 (B), the value of the main side counter at the end of the game is "total 7", and the value of the sub side counter is the "total" of the unreported counter "3" and the notified counter "5". 8 ". Since the stock has not been released from the sub-control board 72 in this game, the value of the unreported counter is subtracted by 1, and the value of the sub-side counter is updated to "total 7".

On the other hand, in the case where the value of the sub-side counter is not subtracted even though the value of the main-side counter is subtracted at the time of stock release, the apparent number of stocks does not become larger than the actual number of stocks. Therefore, in the pachi-slot machine 1 of the present embodiment, the sub-control board 72 preferentially subtracts the value of the notified counter to match the value of the counter between the main and sub. As a result, the value of the unreported counter is likely to remain, so that there is room for the stock notification effect after that, and the effect of the effect can be enhanced.

The example shown in FIG. 292 (C) is an example of fail-safe control by the sub-control board 72 when the stock is released in this game. In the example shown in FIG. 292 (C), the value of the main side counter at the end of the game is "total 7", and the value of the sub side counter is the "total" of the unreported counter "3" and the notified counter "5". 8 ". Since the stock is released from the sub-control board 72 in this game, the value of the notified counter is subtracted by 1, and the value of the sub-side counter is updated to "total 7".

Subsequently, FIG. 292 (D) is a diagram showing an example of fail-safe control by the sub-control board 72 when the value of the sub-side counter is smaller than the value of the main-side counter at the end of the game. When the value of the sub-side counter is smaller than the value of the main-side counter at the end of the game, the sub-control board 72 adds the value of the notified counter so that the value of the sub-side counter matches the value of the in-side counter. Adjust the value of.

Specifically, in the example shown in FIG. 292 (D), the value of the main side counter at the end of the game is "total 7", and the value of the sub side counter is the unreported counter "2" and the notified counter "2". It is "total 6" of "4". Therefore, the sub-control board 72 adds 1 to the value of the notified counter and updates the value of the sub-side counter to "total 7".

When the value of the sub-side counter is smaller than the value of the main-side counter, the sub-control board 72 depends on whether or not the notification condition is satisfied in this game (whether or not the stock notification effect is performed). , The type of counter to be subtracted may be determined. For example, when the value of the sub-side counter is smaller than the value of the main-side counter even though the notification condition is satisfied in this game, the value of the unreported counter is subtracted on the sub-side, but the notified counter. There may be an error that the value of is not added. Therefore, the sub-control board 72 preferentially adds the value of the notified counter, thereby avoiding the situation where the apparent stock number exceeds the actual stock number, and the counter value between the main and sub. Can be matched.

On the other hand, when the value of the sub-side counter is smaller than the value of the main-side counter even though the notification condition is not satisfied in this game, the sub-side is not notified when the stock is added. There may be an error not subtracting the value of the counter. Therefore, by preferentially adding the values of the unreported counters to the sub-control board 72, the counter values can be matched between the main and sub while leaving room for the stock notification effect.

Subsequently, FIG. 293 shows a specific example of the main / sub counter update in the pachi-slot machine 1 of the present embodiment. Here, in FIGS. 289 to 292, the counter type has been simplified and described, but in FIG. 293, a counter update example according to a specific counter type possessed by the pachi-slot machine 1 of the present embodiment will be described.

In FIG. 293 (A), at the timing T1, the value of the counter for rank 1 is "3" and the value of the counter for rank 3 is "1" on the main side, and a total of four stocks are counted. On the sub side, the value of the notified counter silver is "2", the value of the notified counter gold is "1", and the value of the unreported counter silver is "1", for a total of four stocks. Is counting.

At timing T2, stock is being released. For example, the stock is released in the release phase D during the CZ without winning the ART lottery. Since the stock is basically released in order from the one with the highest rank (see FIG. 239), at the timing T2, the stock of rank 3 is released on the main side. As a result, at the timing T2, the value of the rank 3 counter on the main side is subtracted by 1, and on the sub side, the value of the notified counter money is subtracted by 1 because it is basically released from the notified one. ing.

Subsequently, at the timing T3, the stock is similarly released in the release phase D in the CZ. At the timing T3, the stock of rank 1 is released on the main side, and as a result, the value of the rank 1 counter on the main side is decremented by 1, and the value of the notified counter silver is decremented by 1 on the sub side.

Subsequently, at the timing T4, the stock is similarly released in the release phase D in the CZ. At the timing T4, the stock of rank 1 is released on the main side, and as a result, the value of the rank 1 counter on the main side is decremented by 1, and the value of the notified counter silver is decremented by 1 on the sub side.

Subsequently, at the timing T5, the stock is similarly released in the release phase D in the CZ. At the timing T5, the stock of rank 1 is released on the main side, and as a result, the value of the rank 1 counter on the main side is decremented by 1, and the value of the unreported counter silver is decremented by 1 on the sub side.

In FIG. 293 (B), at the timing T6, the value of the counter for rank 1 is "3" and the value of the counter for rank 3 is "1" on the main side, and a total of four stocks are counted. On the sub side, the value of the notified counter silver is "2", the value of the notified counter gold is "1", and the value of the unreported counter silver is "1", for a total of four stocks. Is counting.

At timing T7, stock is released in the release phase D during CZ. At the timing T7, the stock of rank 3 is released on the main side, and as a result, the value of the rank 3 counter on the main side is decremented by 1, and the value of the notified counter money is decremented by 1 on the sub side.

Subsequently, at the timing T8, the stock is similarly released in the release phase D in the CZ. At the timing T8, the stock of rank 1 is released on the main side, and as a result, the value of the counter for rank 1 on the main side is decremented by 1, but as a result of an error in the effect control on the sub side, on the sub side, The value of the counter has not been subtracted. As a result, at the timing T8, the value of the sub-side counter becomes larger than the value of the main-side counter.

Therefore, at the subsequent timing T9, on the sub side, the sub control board 72 activates a fail-safe function for matching the value of the sub side counter with the value of the main side counter based on the command from the main side. Specifically, the sub-control board 72 subtracts 1 from the value of the notified counter silver, and makes the value of the sub-side counter match the value of the main-side counter.

Subsequently, at the timing T10, the stock is released in the release phase D in the CZ. At the timing T10, the stock of rank 1 is released on the main side, and as a result, the value of the rank 1 counter on the main side is decremented by 1, and the value of the notified counter silver is decremented by 1 on the sub side.

Subsequently, at the timing T11, the stock is released in the release phase D in the CZ. At the timing T11, the stock of rank 1 is released on the main side, and as a result, the value of the counter for rank 1 on the main side is subtracted by 1, but as a result of an error in the effect control on the sub side, on the sub side, The value of the counter has not been subtracted. As a result, at the timing T11, the value of the sub-side counter becomes larger than the value of the main-side counter.

Therefore, at the subsequent timing T12, on the sub side, the sub control board 72 activates a fail-safe function for matching the value of the sub side counter with the value of the main side counter based on the command from the main side. At this time, since the value of the notified counter is already 0 at the time of timing T11, the sub-control board 72 subtracts 1 from the value of the unannounced counter silver, and sets the value of the sub-side counter as the value of the main-side counter. Matching.

<Control peculiar to pachislot 1>
Subsequently, the specific control of the pachi-slot machine 1 according to the present embodiment will be described individually.

[Song SU production]
In the pachi-slot machine 1 of the present embodiment, the song SU is produced according to the result of the ART lottery or the CZ lottery in the normal state. Unlike the conventional SU production, this song SU production is a production in which a plurality of step stages change according to the passage of time without being linked to the progress of the game, and is different from the conventional BGM change. , It is a production that makes you interested in the degree of step-up without confirming the grant of benefits just by playing a predetermined BGM.

Since the song SU production progresses regardless of the progress of the game, the player can stop the game and listen to the BGM when the BGM corresponding to the song SU production suddenly flows. You can also continue the game while playing. During the song SU production, the player will be interested in what step stage to continue the game, and each time he steps up, he can have the expectation of giving benefits, so the interest of the game is improves.

Further, during the song SU production, the sub-control circuit 200 also performs a normal production on the display device 11, so that not only the production does not become monotonous during the song SU production, but also the song flowing as a BGM. The staging effect can be enhanced by the synergistic effect of the step stage and the normal staging.

Further, since the sub-control circuit 200 determines the step stage of the promotion destination according to not only the lottery result of the privilege grant but also the size of the privilege to be granted, a large privilege is given every time the step is stepped up. Since you can have a sense of expectation, the fun of the game will improve.

As the size of the privilege, as in the present embodiment, a gaming state having different degrees of advantage such as CZ and ART state may be used, and for example, the number of initial games in the ART state or in the ART state. It may be possible to use a state related to addition. Specifically, for example, taking a pachislot machine having "50 games" or "100 games" as the initial number of games in the ART state as an example, when the ART state of the initial number of games "50 games" is won in the ART lottery. It can be said that a small privilege is given to the player, and a large privilege is given when the ART state of the initial number of games "100 games" is won. Further, for example, as an example of a pachislot machine having a normal state and a special addition zone as a state related to addition during the ART state, if the ART state of the normal state start is won in the ART lottery, a small privilege and addition are added. It can be said that a big privilege is given when the ART state of the special zone start is won.

Further, the sub-control circuit 200 can also rewrite the song SU effect being executed. Since it is possible to play a plurality of games during the song SU production, the result of granting the privilege may change during the song SU production. For example, although the ART was not won at the start of the song SU production, the ART lottery may be won during the song SU production. In such a case, the song SU production currently being executed can be rewritten. Is preferable. However, since the song SU production is not linked to the progress of the game, if the song SU production is rewritten according to the progress of the game, the connection between the front and back may become unnatural.

Therefore, when the sub-control circuit 200 receives a request to rewrite the song SU effect at a timing before the rewrite point, the sub-control circuit 200 rewrites the song SU effect at the timing when the song SU effect is advanced to the rewrite point, and the timing after the rewrite point. When there is a request for rewriting the song SU effect in, the rewrite request is discarded without rewriting the song SU effect. This makes it possible to prevent the connection from becoming unnatural before and after rewriting.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a game control means.

Further, the main control board 71 performs an ART lottery or a CZ lottery, and when the lottery is won, the game state shifts to the ART state or the CZ, so that the main control board 71 functions as a granting determination means and a privilege granting means.

Further, the sub-control board 72 controls the sub-display device 18 and the speakers 65L and 65R to perform a song SU effect, and controls the display device 11 to perform a normal effect. Therefore, the sub-control board 72 and the sub-display device The 18 and the speakers 65L and 65R function as the staging means or the first staging means, and the sub-control board 72 and the display device 11 function as the second staging means.
In addition, the sub-control board 72 determines the effect to be executed, and also determines to which step stage the song SU effect is promoted according to the result of the determination of the privilege grant and the size of the privilege to be granted. Functions as a means.

Further, when the sub-control board 72 determines another song SU effect during the song SU effect, it determines whether the song SU effect being executed can be rewritten, and if it can be rewritten, the sub-control board 72 determines the song SU effect being executed. When it cannot be rewritten and rewritten to another song SU effect, it functions as a determination means and an effect change means in order to discard the rewrite request and maintain the running song SU effect.

[Fail-safe for bonus announcement]
In the pachislot 1 of the present embodiment, the sub-control board 72 determines the number of precursor games when the bonus is won during the ART state, and basically, when the games corresponding to the precursor games are performed, the bonus notification effect is produced. However, if the value of the display counter becomes 0 before the games for the number of precursor games are played, the bonus notification effect is performed without waiting for the elapsed number of precursor games.
As a result, if a bonus is won during the ART state, it can be notified during the apparent ART state, so that the bonus notification effect can be performed at an appropriate timing, and as a result, the player can be notified. It does not give unnecessary misunderstandings.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a combination determining means, a stop operation detecting means, and a stop control means.

Further, the main control board 71 shifts the game state to the bonus state when the symbol combination corresponding to the bonus operation is displayed, and shifts the game state to the ART state when the ART lottery is won. It functions as a first game control means and a second game control means.

Further, the sub-control board 72 functions as a means for determining the number of notification games because, when the combination related to the bonus is determined as the internal winning combination, the number of precursor games until the bonus notification effect is performed is determined. Further, the sub-control board 72 displays a display counter indicating the remaining game period in the ART state on the display device 11 during the ART state, and updates the value of this display counter according to the result of the game. The display device 11 and the display device 11 function as a display counter.

Further, the sub-control board 72 displays after the winning combination related to the bonus is determined as the internal winning combination and then the games for the number of precursor games are performed, or after the winning combination related to the bonus is determined as the internal winning combination. When the value of the counter becomes 0, the bonus notification effect is performed via the display device 11, so that the wipe control board 72 and the display device 11 function as the effect means.

[Fail-safe when transitioning from CZ to ART state]
In the pachi-slot machine 1 of the present embodiment, at the time of transition from the CZ to the ART state (rank determination ART), the sub-control board 72 receives information on the initial rank from the main side, and displays a weapon based on this initial rank. And perform a production that suggests the initial rank. At this time, if the sub side cannot receive the information on the initial rank transmitted from the main side, or if an error occurs in the information on the initial rank, the sub control board 72 is not an individual weapon according to the initial rank. , Performs a special announcement production using "weapon?", Which is unknown how many initial ranks it has. As a result, even if an error that the initial rank cannot be received occurs at the time of transition from the CZ to the ART state, the progress of the game is not stopped.

In addition, since information on the results of games such as ball ejection is strictly managed on the main side, even if an error occurs on the sub side, the main side can properly grasp the initial rank and the rank after promotion. As long as it does not affect the progress of the game. Therefore, in Pachislot 1, when a parameter error occurs only on the sub side, by performing a dedicated notification effect without stopping the progress of the game, the situation where the parameter error occurs is overtaken, and the subsequent ART state is in progress. By receiving the rank information from the command transmitted from the main side, it is possible to correct the situation where an error has occurred, and it is possible to perform appropriate staging control.

As described above, the rank of the ART state is used for lottery of privilege grant during the ART state such as the addition of the number of CZ games. Therefore, when the rank with high expectation of addition is used, the subsequent CZ and ART You can have expectations about the loop with the state.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a game control means.

Further, the main control board 71 performs an ART lottery or a CZ lottery, and when the lottery is won, the game state shifts to the ART state or the CZ, so that the main control board 71 functions as a transition determination means, an advantageous state control means, and a high probability state control means. do. Further, the main control board 71 functions as a privilege granting means because it grants a privilege such as an addition of the number of CZ games based on the rank of the ART state.
Further, the main control board 71 functions as a transmission means because it transmits various commands including information on the result of the game to the sub control board 72.

Further, since the sub-control board 72 controls the display device 11 at the time of transition to the rank determination ART and displays the image according to the weapon rank, the sub-control board 72 and the display device 11 are the staging determination means and the staging means. Functions as.

[Fail-safe for matching stock numbers]
In the pachi-slot machine 1 of the present embodiment, the sub-control board 72 compares the value of the main-side counter with the value of the sub-side counter at the end of the game, and if they do not match, the value of the sub-side counter is used as the main-side counter. Match the value. For example, when the value of the sub-side counter is smaller, the sub-control board 72 adjusts the value of the sub-side counter to the value of the main-side counter by adding the value of the notified counter.

When the value of the sub-side counter is larger, the sub-control board 72 adjusts the value of the sub-side counter to the value of the main-side counter by subtracting the value of the unreported counter or the notified counter. More specifically, when the stock is released in this game, the sub-control board 72 preferentially subtracts the counter value from the notified counter among the unannounced counter and the notified counter. In addition, when the stock is not released in this game, the value of the counter is subtracted with priority from the unreported counter. As a result, it is possible to eliminate the abnormality without interrupting the game when an abnormality such as a mismatch in the number of stocks between the main side and the sub side occurs.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a game control means.

Further, the main control board 71 performs an ART lottery or a CZ lottery, and when the lottery is won, the game state shifts to the ART state or the CZ, so that the main control board 71 functions as a privilege determining means and a privilege granting means. Further, the main control board 71 includes a main side counter (counter for rank 1 to counter for rank 4) that counts the number of stocks in the ART state, and in order to update the value of this counter, the main side counter and the main side counter are updated. Functions as a means.
Further, the main control board 71 functions as a transmission means because it transmits various commands including information on the result of the game to the sub control board 72.

Further, the sub-control board 72 counts the number of stocks in the ART state determined to be given to the player that has not been notified to the player that the stock has been given. It has a counter and a notified counter that counts the number of stocks notified to the player that the stock has been given among the number of stocks in the ART state determined to be given to the player. Since the value of the counter is updated, it functions as a first sub-side counter and a second sub-side counter.

Further, the sub-control board 72 functions as a determination means for determining whether or not the stock has been released in the current game at the end of one game. Further, the sub-control board 72 compares the value of the sub-side counter with the value of the main-side counter at the end of one game, and if they do not match, the sub-side counter so as to match the value of the main-side counter. Since the value is updated, it functions as a comparison means and a sub-counter update means.

[Additional production control at the time of canst]
In a normal pachislot machine, when the number of games in the ART state is added, the added game, the added game, the game after a predetermined game (for example, 1 to 5 games), or the apparent ART. The additional effect is performed at the normal timing (predetermined timing) for performing the additional effect such as the game at the end of the state or the game immediately before the end. On the other hand, in the pachi-slot machine 1 of the present embodiment, when the number of games in the ART state is added, the addition effect is basically performed at the above-mentioned normal timing, but the counter is set to the upper limit value with the addition. When it reaches, the additional effect is not performed at the above-mentioned normal timing.

More specifically, the sub-control board 72 determines whether or not a fraction is generated in the actual number of additional games actually added, and if the fraction is generated, determines that the counter has reached the upper limit value and performs an additional effect. Not performed. As a result, in the pachi-slot machine 1, since the addition of the fraction at the time of the counter stop is not notified at the normal timing, it becomes difficult for the player to grasp that the counter stop has occurred, and as a result, the player feels a loss. I won't let you.

Further, in the pachi-slot machine 1, even at the time of a cant, if the actual number of additional games is a value between the number of a plurality of candidate games, the additional effect can be produced. Specifically, when the sub-control board 72 has a number of candidate games smaller than (or less than or equal to) the actual number of additional games even at the time of cant, the maximum number of candidate games is selected at normal timing. It is possible to perform an additional effect to notify. As a result, it is possible to perform the additional effect in a manner in which it is not possible to grasp that the canst has occurred at the normal timing when the additional effect should be performed.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a game control means.

Further, the main control board 71 includes a counter for counting the number of games in the ART state, and since the value of this counter is updated, it functions as a counter and a counter updating means. Further, the main control board 71 functions as an increase amount determining means for determining the number of games to be added when the number of ART games is added to the lottery.
Further, the main control board 71 functions as a transmission means because it transmits various commands including information on the result of the game to the sub control board 72.

Further, when the number of ART games is added to the sub-control board 72, the additional effect can be performed at a predetermined timing via the display device 11, and the additional effect is not performed at the predetermined timing at the time of cant. Therefore, the sub-control board 72 functions as an effect control means, and the display device 11 functions as an effect means.

[Reduction of control load on the main side]
In the pachi-slot machine 1 of the present embodiment, the sub-control board 72 makes it possible to manage more gaming states on the sub side than the gaming states managed on the main side by combining the parameters included in the commands received from the main side. There is. As a result, on the sub side, it is possible to perform the effect control using more various game states than on the main side, and on the main side, it corresponds to the detailed game state used on the sub side as the value of the parameter related to the game state. Since it is not necessary to have a value, the control load on the main side can be reduced.

Further, in the pachi-slot machine 1 of the present embodiment, the sub-control board 72 compares the values of the parameters included in the commands received from the main side, and specifies the result of the game. As a result, the main side does not need to have the game result obtained as a result of comparison as a parameter to be transmitted to the sub side, and the capacity (parameter type) of the command transmitted from the main side can be reduced. As a result, the control load on the main side can be reduced.

[Various functions of the main control board and sub control board]
In order to realize the control peculiar to the pachi-slot machine 1 as described above, the main control board (main control circuit 90, main CPU 101) and the sub-control board (sub-control circuit 200, sub CPU 201) of the pachi-slot machine 1 are as follows. Has a function.

The main control board 71 is connected to the start switch 79 and the stop switch board 80, and controls the progress of the game shown in FIG. Therefore, the main control board 71 functions as a game control means.
Further, the main control board 71 functions as a transmission means because it transmits various commands including information on the result of the game to the sub control board 72.

Further, the sub-control board 72 specifies the current gaming state by combining the values of a plurality of parameters received from the main side, and the value of the parameter received at the first timing and the parameter received at the second timing. In order to specify the result of the current game by comparing with the value of, it functions as a game state specifying means and a game result specifying means.

[Modification example]
In the second embodiment described above, when the game shifts to the ART state, the rank determination ART is performed in the first game of the ART state, and the rank at the time of winning the ART is promoted. However, the present invention is not limited to this, and the rank determination ART is performed. (Promotion lottery) may not be performed. In this case, during the ART state, various lottery will be performed based on the lottery state determined from the rank at the time of winning the ART.

Further, in the second embodiment, various lottery is performed according to the lottery flag, but since the lottery flag is determined from the internal winning combination, various lottery is performed according to the internal winning combination. It can be said that it is. That is, the main control circuit 90 can perform various lottery according to the internal winning combination.

Further, in the second embodiment, when there is stock in the ART state at the end of BB (that is, at the end of BB during ART), the gaming state shifts to during ART preparation, and then the RT state changes during ART preparation. When the state shifts to the RT4 state, the gaming state shifts to the ART state. Here, since the RT state shifts to the RT0 state at the end of the BB, the RT state shifts from the RT0 state to the RT4 state during ART preparation. At this time, the transition from the RT0 state to the RT2 state is performed by stopping and displaying the symbol combination related to the abbreviation "RT2 transition symbol" due to a push order error when the push order bell is won. Therefore, the main control circuit 90 If the push order bell is hit during ART preparation, the correct push order may not be notified while staying in the RT0 state (note that the correct push order may be notified while staying in another RT state. , Also, it may not be notified).

Further, in the second embodiment, the RT state may shift to the RT1 state or the RT3 state during the ART preparation, and the main control circuit 90 shifts from the RT state to the RT1 state or the RT3 state during the ART preparation. In addition, the privilege described later may be given. When the RT state shifts to the RT1 state during ART preparation (that is, before shifting to the RT4 state), there are cases where the RT state shifts from the RT0 state to the RT1 state and cases where the RT2 state shifts to the RT1 state. However, the transition from the RT2 state to the RT1 state is a case where the notified push order is ignored and the push order is missed (see FIG. 178). Therefore, the main control circuit 90 is in the RT2 state during ART preparation. If the state shifts from the RT1 state to the RT1 state, the privilege may not be given, and if the RT0 state shifts to the RT1 state during the preparation for ART, the privilege may be given (note that in the internal lottery table shown in FIG. 180). , In the RT0 state, "F_normal rip" is not determined independently as an internal winning combination, but by allocating a predetermined lottery value to "F_normal rip", it is possible to shift from the RT0 state to the RT1 state. Can be).
In addition, the privilege is given not only when the RT state shifts to the RT1 state or the RT3 state during the preparation for ART, but also in addition to (or instead of) the trigger, the inside in the RT1 state or the RT3 state. Benefits may be given according to the winning combination (lottery flag). For example, during the RT1 state or the RT3 state, there is a high probability that "F_weak chelip" is determined as an internal winning combination, and the RT1 state and the RT3 state continue until the fixed number of games is exhausted, so that ART preparation is performed. The longer the inside, the higher the expectation of granting benefits.

Further, in the second embodiment, when shifting from the CZ to the ART state, the number of remaining games in the CZ is kept, and the number of remaining games held after the end of the ART state is changed to the ART state. CZ is performed for the number of games obtained by adding the number of additional games, but the present invention is not limited to this. For example, the main control circuit 90 may discard the remaining number of games in the CZ when shifting from the CZ to the ART state, and may perform CZ for a predetermined number of games after the end of the ART state. The predetermined number of games is arbitrary, but may be determined according to, for example, the rank used for the completed ART state (the rank at the time of winning or the rank after the promotion lottery). good. Further, the timing for determining the predetermined number of games may be the timing when the CZ shifts to the ART state (when the CZ is interrupted), or the timing when the rank determination ART shifts to the normal ART (at the end of the rank determination ART). ), Or it may be the timing of transition from the ART state to the CZ (usually at the end of ART).

Further, in the pachi-slot machine 1 of the above embodiment, various benefits are given, but the benefits given to the player are arbitrary. For example, not only the benefits related to the payout given to the player (for example, transition to the ART state, addition of the duration of the ART state, transition to the CZ, addition of the duration of the CZ), but also benefits other than the payout. (For example, opening of a privilege video, custom opening of pachislot 1, etc.) may be used.

Further, the content of the notification performed during the ART state is not limited to the above-mentioned example, and is arbitrary. For example, the order of stop operations (pushing order) in which a special symbol combination that is advantageous to the player is displayed may be notified, or the timing of the stop operation required for displaying the symbol combination (the timing of the stop operation (pushing order)). The symbol to be aimed at) may be notified.

As a state advantageous for the player, the winning probability of the internal winning combination related to the re-game does not change (or changes within a range that does not affect the playability), but the mode of the stop operation advantageous to the player is used. It may be in a gaming state in which the notification function, that is, the AT function is activated. Further, as an advantageous state for the player, a replay high probability state (replay time) in which the winning probability of the internal winning combination related to the replay is high is activated, and the mode of the stop operation advantageous for the player is notified. It may be in a gaming state in which the function is activated, that is, the ART function is activated.

Further, the method of managing the duration of the ART state is also arbitrary. For example, the duration may be managed by the number of games, the duration may be managed by the number of sets, and the duration may be managed by the number of medals paid out during the ART state or the difference number. It may be possible to manage the duration by the number of notifications (number of navigations) that affect the payout of medals during the ART state, and the continuation performed at any timing during the ART state. The duration may be managed by determination, or the ART state may be terminated when a specific symbol combination is displayed during the ART state.
In this case, the target of addition is appropriately adjusted according to the management method of the duration of the ART state, such as the number of games, the number of sets, the number of navigations, and the number of differences.

Also, management of the duration of CZ is optional. The duration may be managed by the number of games, the duration may be managed by the number of sets, or the duration may be managed by the continuation determination performed at any timing during the CZ. Further, the CZ may be terminated when a specific symbol combination is displayed in the CZ, or the duration may be managed by the number of ART lottery performed during the CZ, or during the CZ. The duration may be managed according to the number of transitions to the ART state.
In this case, the target of addition is appropriately adjusted according to the management method of the duration of CZ such as the number of games, the number of sets, and the number of lottery.

Further, in the pachi-slot machine 1 of the above embodiment, an example of displaying various display screens on the sub-display device 18 provided on the left side of the reel display window 4 when viewed from the player side has been described, but the present invention is not limited thereto. .. For example, another sub-display device may be provided on the right side of the reel display window 4 when viewed from the player side, and various display screens may be displayed in this sub-display device as well. In this case, a touch sensor is provided on the display surface of the sub display device provided on the right side of the reel display window 4, and the display screen of the sub display device is switched based on the touch input information output from the touch sensor. You may do it.

Further, in the pachi-slot machine 1 of the above embodiment, the notification (ART) function is operated under the control of the main (main control board 71) side, but the present invention is not limited to this, and the sub (sub-control) is not limited to this. The notification (ART) function may be operated by the control on the board 72) side.

Further, in the pachi-slot machine 1 of the above embodiment, the CZ or ART state is shifted to the CZ or ART state by winning the transition lottery performed during the normal state. Here, in the pachi-slot machine 1 of the above-described embodiment, a setting difference may be given to the transition lottery, but the transition lottery may be performed based on "information having no difference in the set value". In addition, "information with no difference in set values" means a combination determined as an internal winning combination with the same probability in all setting values in the internal lottery process (setting unquestioned combination), or all settings when all reels are stopped. It includes at least a symbol combination (a symbol combination with no setting difference) that will be displayed with the same probability in the value.

That is, in the modified example of pachislot 1, when the unquestioned combination is determined as the internal winning combination, a lottery for transition to the CZ or ART state is performed, and the combination with the setting difference (setting difference combination) is determined as the internal winning combination. In that case, the lottery for transition to the CZ or ART state is not performed. Further, in the pachi-slot machine 1, when a symbol combination having no setting difference is displayed when all reels are stopped, a lottery for transition to the CZ or ART state is performed, and when a symbol combination having a setting difference is displayed, the CZ is displayed. And transition to ART state Do not draw lots.
In addition, in this specification, not performing a lottery includes not only not performing the lottery itself, but also including the fact that the lottery is done but the lottery is always unwinning.

Further, the lottery for transition to the CZ or ART state may be performed based on a predetermined perfect probability that does not change at all. The "predetermined perfect probability that does not change at all" means a probability that does not change at least based on the set value (that is, the probability that the winning probability is the same regardless of the set value).
It should be noted that the "complete probability that is predetermined and does not fluctuate at all" may further include the probability that is uniquely determined for "information with no difference in the set value". In recent gaming machines, a state in which it is easy to win a transition lottery and a state in which it is difficult to win may be provided. In such a case, when the transition lottery is performed with the "probability uniquely determined for the information having no difference in the set value", for example, at the time of winning the setting unquestioned role, in any gaming state. The transition lottery that wins with the same probability will be performed. On the contrary, in the case of performing a migration lottery with a "probability that is not a uniquely determined probability (that is, a probability that fluctuates) for information with no difference in set values", for example, at the time of winning a setting unquestioned role, A transition lottery that wins with a probability according to the current gaming state, that is, if the current gaming state is a high probability state, a transition lottery that wins with a high probability is performed, and the current gaming state is a low probability state. In that case, a transition lottery, which wins with a low probability, will be performed.

In this way, the transition lottery performed based on "information with no difference in the set value" is performed with the same probability of winning regardless of the set value. The degree of expectation regarding migration can be made the same for each set value, and the difference in ball ejection performance can be suppressed to the winning probability of the setting difference combination with the setting difference.

In addition, the lottery for shifting to the CZ or ART state includes (1) an internal lottery for determining the internal winning combination, (2) a transition lottery for whether or not to perform the transition, and (3) a transition for the transition. Three lottery of advantageous section type lottery for deciding the destination can be considered. In pachi-slot 1, these three lottery may be performed by using individual random number values, all lottery may be performed by using a common random number value, and two lottery may be performed in common. It may be performed by using the random value of the above, and the remaining one lottery may be performed by using the individual random value. It should be noted that using a common random number value means, for example, (1) when a predetermined set unquestioned combination is determined in the random number range of "0 to 128" in the internal lottery, (2) "0 to 64" is transferred. Random number range of non-winning lottery, "65-128" is the random number range of the winning lottery, and (3) "65-83" is the random number range where the destination is CZ1, and "83-99" is transferred. The destination is a random number range of CZ2, "99 to 115" is a random number range of CZ3, and "115 to 128" is a random number range of an ART state. In other words, the lottery results of other lottery are assigned to a part of the random number range that is won in one lottery.

Further, in the above-described embodiment and various modified examples, a pachi-slot machine has been described as an example of a gaming machine, but the present invention is not limited thereto. Features other than the features peculiar to the pachi-slot machine 1, such as the features related to reel control and the features related to setting change and confirmation of the present invention, can be applied to a gaming machine called "pachinko", and the same effect can be obtained. For example, checksum generation and determination processing, various processing using the main CPU 101 dedicated instruction code (address specification processing using the Q register, soft timer update processing, 7-segment LED drive processing, communication data generation and storage processing, etc.) ), Various processes using the non-standard ROM area and the non-standard RAM area, and the like can also be applied to "pachinko".

<Supplementary note (summary of the present invention)>
[First gaming machine]
Conventionally, in a gaming machine having the above-described configuration, there is known a gaming machine that obtains a checksum of data stored in a RAM at the time of power failure and performs a checksum determination process at the time of power failure (when the power is restored). For example, see Japanese Patent Application Laid-Open No. 2009-011375). In the gaming machine of JP-A-2009-011375, in the checksum determination process at the time of power restoration, an error notification is performed when the checksum obtained at the time of power restoration does not match the checksum obtained at the time of power failure.

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complexity of the game playability, and there is a demand for reducing the capacity of processing programs and tables other than the game playability managed by the main control circuit.

The present invention has been made to solve the above-mentioned first problem, and the first object of the present invention is to reduce the capacity of processing programs, tables, etc. other than playability managed by the main control circuit. It is an object of the present invention to provide a gaming machine capable of increasing the free capacity of the ROM of the main control circuit and enhancing the game playability by utilizing the free space of the ROM corresponding to the increased capacity.

In order to solve the first problem, the present invention provides a first gaming machine having the following configuration.

An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling a game operation, and a first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. A second storage means (for example, main RAM 103) for storing information necessary for executing the calculation process by the calculation processing means, and a power supply means for supplying a power supply voltage (for example, a power supply board 53b and a switching regulator 94). ) And the starting means (for example, the reset signal output processing of the power management circuit 93) that outputs a starting signal to the arithmetic processing means when the power supply voltage exceeds a predetermined starting voltage value (for example, 10V). ) And the power failure means (for example, power failure detection of the power management circuit 93) that outputs a power failure signal to the arithmetic processing means when the power supply voltage falls below a predetermined power failure voltage value (for example, 10.5 V). The operation processing means includes a flag register (for example, a flag register F) for storing data corresponding to the result of the operation processing, and the power failure means outputs the power failure signal. A sum value calculation means (for example, a check sum generation process) for calculating a sum value by cumulatively adding all the information stored in a predetermined storage area (for example, a gaming RAM area) in the second storage means. ) And the start signal is output, and the information stored in the predetermined storage area is sequentially subtracted from the sum value generated by the sum value calculation means at the time of the latest power failure. When the subtraction process by the thumb value subtraction means is completed for the sum value subtraction means (for example, S122 to S131 during the thumb check process) and all the information stored in the predetermined storage area, the flag is displayed. A thumb value determining means (for example, S134 during thumb check processing) for determining the presence or absence of an abnormality based on the data corresponding to the subtraction result set in a predetermined bit area (for example, the zero flag) in the register, and A gaming machine characterized by having.

Further, in the first gaming machine of the present invention, the sum value calculating means executes a specific command (for example, a POP command) when adding information stored in the predetermined storage area. The continuously stored 2 bytes of information are acquired and added, and the information of the read start address of the information is updated by 2 bytes, and the sum value subtracting means is the sum generated when a power failure occurs. When the information stored in the predetermined storage area is subtracted from the value, the information for two consecutively stored bytes is acquired and subtracted by executing the specific instruction, and the information is read out. The information of the start address may be updated by 2 bytes.

Further, in the first gaming machine of the present invention, the arithmetic processing means has a stack pointer capable of setting the address of the predetermined storage area of the second storage means, and the sum value calculation means stores the predetermined storage. The specific instruction executed when adding the information stored in the area may be a dedicated instruction for operating the stack pointer (for example, a POP instruction).

According to the first gaming machine of the present invention having the above configuration, the capacity of processing programs and tables other than playability is reduced to increase the free capacity of the ROM (first storage means) of the main control circuit, and the capacity is increased. The playability can be improved by using the free area of the ROM corresponding to the capacity.

[2nd to 5th gaming machines]
Conventionally, in the gaming machine having the above-described configuration, a gaming machine equipped with a main control device that processes numerical data by using a stack pointer in an operation command has been proposed (see, for example, Japanese Patent Application Laid-Open No. 2005-237737). ).

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complication of playability, and there is a demand for reducing the capacity of processing programs and tables managed by the main control circuit.

The present invention has been made to solve the above-mentioned second problem, and a second object of the present invention is to reduce the capacity of a processing program, a table, etc. managed by the main control circuit to reduce the capacity of the main control circuit. It is an object of the present invention to provide a gaming machine capable of increasing the free space of the ROM and enhancing the game playability by utilizing the free area of the ROM corresponding to the increased capacity.

In order to solve the second problem, the present invention provides a second gaming machine having the following configuration.

An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling a game operation, and a first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. And a second storage means (for example, the main RAM 103) in which information necessary for executing the calculation process by the calculation processing means is stored, the calculation processing means is the calculation processing by the calculation processing means. A general-purpose register in which data is stored at the time of execution, a dedicated register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and data are stored and stored when the arithmetic processing is executed by the arithmetic processing means. It has an expansion register (for example, a Q register) capable of designating a part of an address in the first storage means or the second storage means based on the data, and the arithmetic processing means uses the expansion register. A gaming machine characterized in that it can execute predetermined commands (for example, "BITQ" command, "SETQ" command, "LDQ" command, etc.) capable of designating an address in the second storage means.

Further, in the second gaming machine of the present invention, a part of the address that can be specified by the expansion register may be an upper address value constituting the address.

Further, in order to solve the second problem, the present invention provides a third gaming machine having the following configuration.

A charging operation detecting means (for example, a BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, a variable display means (for example, three reels 3L, 3C, 3R) that variablely displays the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and a stop operation by the player. The change display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. The stop control means (for example, reel stop control process) to be caused, the arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling the stop operation of the display column by the stop control means, and the arithmetic processing means. A first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing is stored, and a second storage means (for example, for example) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. The main RAM 103) is provided, and the arithmetic processing means stores a general-purpose register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and data is stored when the arithmetic processing is executed by the arithmetic processing means. A dedicated register and an expansion register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and a part of an address in the first storage means or the second storage means can be specified by the stored data (an expansion register). For example, a Q register), and the arithmetic processing means can specify an address in the second storage means by using the expansion register in the process of checking the stop state of the display column. (For example, the "LDQ" instruction) is executed to read information indicating the state of the variable display of the predetermined display column stored in the second storage means, and then the expansion register is used. A predetermined logical sum operation instruction (for example, an "ORQ" instruction) capable of designating an address in the second storage means is executed, and the other display column stored in the second storage means is executed. While reading the information indicating the state of the variable display , The logical sum operation of the information and the information indicating the state of the variable display of the predetermined display column is performed, and then the execution of the predetermined logical sum operation instruction is repeated, and the result of the logical sum operation and the rest. All display columns are stopped based on the result of the OR operation obtained when the OR operation for all the display columns is completed by repeating the OR operation with the information indicating the variable display state of each display column. A gaming machine characterized in determining whether or not it is in a state.

Further, in the third gaming machine of the present invention, a part of the address that can be specified by the expansion register may be an upper address value constituting the address.

Further, in order to solve the second problem, the present invention provides a fourth gaming machine having the following configuration.

A charging operation detecting means (for example, a BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The change display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. The stop control means (for example, the reel stop control process) to be caused, the arithmetic processing means (for example, the main CPU 101) that performs the arithmetic processing for controlling the determination operation of the internal winning combination by the internal winning combination determining means, and the arithmetic. A first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing by the processing means is stored, and a second storage means in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. (For example, the main RAM 103), the arithmetic processing means includes a general-purpose register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and data is stored when the arithmetic processing is executed by the arithmetic processing means. Data is stored at the time of executing the arithmetic processing by the stored dedicated register and the arithmetic processing means, and a part of the address in the first storage means or the second storage means can be specified by the stored data. The internal winning combination, which has an expansion register (for example, a Q register) and is determined by the internal winning combination determining means, is set to adjust the expected value at which the internal winning combination related to the privilege grant is determined. An internal winning combination for each setting is provided in which the winning probability changes according to the value, and the arithmetic processing means uses the expansion register to specify an address in the second storage means in the process of determining the internal winning combination. By executing a predetermined addition instruction (for example, "ADDQ" instruction) that can be performed, the current lottery value is stored at the start address of the area in which the lottery value for each set value of the internal winning combination for each setting to be lottery is stored. The set value is added and associated with the current set value. A gaming machine characterized in that an address in which a lottery value of an internal winning combination for each setting is stored is specified and the lottery value is acquired.

Further, in the fourth gaming machine of the present invention, a part of the address that can be specified by the expansion register may be an upper address value constituting the address.

Further, in order to solve the second problem, the present invention provides a fifth gaming machine having the following configuration.

A charging operation detecting means (for example, BET switch 77) for detecting the charging operation of the game medium, and a starting operation detecting means (for example, for example) for detecting the starting operation by the player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. When the change display of the plurality of display columns is stopped by the stop control means (for example, reel stop control process) and the stop control means, on the determination line set across the plurality of display columns. It controls the privilege grant determination means (for example, winning search processing) for determining whether or not the combination of symbols corresponding to the internal winning combination related to the payout of the game medium is stopped and displayed, and the determination operation by the privilege grant determination means. An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for the purpose, a first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and the arithmetic processing. A second storage means (for example, a main RAM 103) for storing information necessary for executing the arithmetic processing by the means is provided, and the arithmetic processing means stores data when the arithmetic processing means executes the arithmetic processing. The arithmetic processing means is predetermined in the process of determining whether or not the combination of symbols corresponding to the internal winning combination related to the payout of the game medium is stopped and displayed on the determination line. Of the game medium, which can be given when a read command (for example, a "LDIN" command) is executed and a combination of symbols corresponding to the internal winning combination related to the payout of the game medium is stopped and displayed on the determination line. A game characterized by simultaneously acquiring data on the number of payouts and determination data indicating the type of combination of symbols corresponding to the internal winning combination related to the payout of the game medium, which is associated with the data on the number of payouts. Machine.

Further, in the fifth game machine of the present invention, the arithmetic processing means determines whether or not the combination of symbols corresponding to the internal winning combination related to the payout of the game medium is stopped and displayed on the determination line. In the process, a predetermined determination command (for example, a "JSLAA" command) that can execute a determination command, a process jump destination address designation command, and a process jump operation command with one command is executed, and the game medium is paid out. It may be determined whether or not the combination of symbols corresponding to the internal winning combination according to the above is stopped and displayed.

According to the second to fifth gaming machines of the present invention having the above configuration, the capacity of the processing programs and tables managed by the main control circuit is reduced to free up the free capacity of the ROM (first storage means) of the main control circuit. It is possible to increase the playability by increasing the number and using the free area of the ROM corresponding to the increased capacity.

[6th and 7th gaming machines]
Conventionally, in a gaming machine having the above-mentioned configuration, when an abnormality occurs in the data stored in the RAM of the main control unit, the RAM abnormality error state is controlled, the progress of the game is disabled, and the setting change mode is performed. When a new setting value is selected / set based on the setting change operation, a gaming machine has been proposed that cancels the disabled state of the progress of the game and makes the progress of the game possible. For example, see Japanese Patent Application Laid-Open No. 2007-209810).

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complication of playability, and there is a demand for reducing the capacity of processing programs and tables managed by the main control circuit.

The present invention has been made to solve the above-mentioned third problem, and a third object of the present invention is to reduce the capacity of a processing program, a table, etc. managed by the main control circuit to reduce the capacity of the main control circuit. It is an object of the present invention to provide a gaming machine capable of increasing the free space of the ROM and enhancing the game playability by utilizing the free area of the ROM corresponding to the increased capacity.

In order to solve the third problem, the present invention provides a sixth gaming machine having the following configuration.

A charging operation detecting means (for example, BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. Stop control means (for example, reel stop control process), data transmission means for transmitting command data related to the game operation (for example, S904 (communication data transmission process) during interrupt processing), and internal winning related to privilege grant. Setting change confirmation means (for example, setting change confirmation processing) that can execute setting value change processing and setting value confirmation processing for adjusting the expected value for which the combination is determined, and the setting value by the setting change confirmation means. An arithmetic processing means (for example, main CPU 101) that performs arithmetic processing for controlling a change operation or a confirmation operation, and a first storage means (for example,) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. The main ROM 102) and a second storage means (for example, the main RAM 103) for storing information necessary for executing the calculation process by the calculation processing means are provided, and the calculation processing means changes the set value. Alternatively, at the start of the setting value confirmation process, the start command generation means for generating the first command data (for example, S43 during the setting change confirmation process) and the set value change process or the set value confirmation process. At the end, the first command data having an end command generation means (for example, S57 during the setting change confirmation process) for generating the second command data and being executed by the start command generation means. The game machine is characterized in that the generation process of the second command data and the generation process of the second command data executed by the command generation means at the end are shared.

Further, in the sixth gaming machine of the present invention, the arithmetic processing means has a general-purpose register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and the arithmetic processing means is the first. When generating the command data of, the first value (for example, "005H") is set in a predetermined register (for example, L register) of the general-purpose register, the generation process is executed, and the second When generating the command data of, a second value (for example, "004H") may be set in a predetermined register of the general-purpose register to execute the generation process.

Further, in order to solve the third problem, the present invention provides a seventh gaming machine having the following configuration.

A charging operation detecting means (for example, BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. The stop control means (for example, reel stop control process) to be caused, the data transmission means for transmitting command data related to the game operation (for example, S904 (communication data transmission process) during interrupt processing), and the command data are created. Communication data generation means (for example, setting change command generation and storage processing and communication data storage processing), setting value change processing and setting value confirmation processing for adjusting the expected value for which the internal winning combination related to privilege grant is determined. To control the setting change confirmation means (for example, the setting change confirmation process) that can execute the above, the command data generation operation by the communication data generation means, and the setting value change operation or confirmation operation by the setting change confirmation means. The arithmetic processing means (for example, the main CPU 101) that performs the arithmetic processing, the first storage means (for example, the main ROM 102) in which the information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and the arithmetic processing means. A second storage means (for example, main RAM 103) for storing information necessary for executing the calculation process is provided, and the calculation processing means starts the setting value change process or the set value confirmation process. At the end of the start command generation means (for example, S43 during the setting change confirmation process) for generating the start command data and the end of the set value change process or the set value confirmation process, the end command data is generated. End-time command generation means (for example, S57 during setting change confirmation processing), the start-time command data generation process executed by the start-time command generation means, and the end-time command generation unit. The end-time command data generation process executed by the stage is shared, and the arithmetic processing means has a plurality of types of data in which a plurality of types of data are stored at the time of execution of the arithmetic processing by the arithmetic processing means. Having a general-purpose register, the arithmetic processing means corresponds to a communication parameter used among a plurality of types of communication parameters constituting the command data in the command data generation process among the plurality of general-purpose registers. The communication parameters used set in the general-purpose register are stored in a predetermined storage area (for example, a communication data temporary storage area) in the second storage means, and the plurality of types of communication are performed. If there is a communication parameter that is not used among the parameters, the data stored in the general-purpose register associated with the unused communication parameter when the command data is generated is stored in the predetermined storage area as a communication parameter. A gaming machine characterized in that a sum value of the command data is generated based on the data stored in the general-purpose register associated with the communication parameter.

Further, in the seventh game machine of the present invention, in the command data generation process, the value stored in the general-purpose register associated with the communication parameter is added to the value stored in the accumulator of the general-purpose register. By doing so, the sum value of the command data may be generated, and the generated sum value may be stored in the predetermined storage area.

According to the sixth and seventh gaming machines of the present invention having the above configuration, the capacity of the processing program and the table managed by the main control circuit is reduced to increase the free capacity of the ROM of the main control circuit, and the increased capacity is increased. It is possible to improve the playability by using the free area of the ROM for the minute.

[8th and 9th gaming machines]
Conventionally, in a gaming machine having the above-described configuration, a gaming machine that transmits a command from a gaming control board (main control circuit) to an effect control board (sub-control circuit) is known (see, for example, Japanese Patent Application Laid-Open No. 2002-360766). ).

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complication of playability, and there is a demand for reducing the capacity of processing programs and tables managed by the main control circuit.

The present invention has been made to solve the above-mentioned fourth problem, and a fourth object of the present invention is to reduce the capacity of a processing program, a table, etc. managed by the main control circuit to reduce the capacity of the main control circuit. It is an object of the present invention to provide a gaming machine capable of increasing the free space of the ROM and enhancing the game playability by utilizing the free area of the ROM corresponding to the increased capacity.

In order to solve the fourth problem, the present invention provides an eighth gaming machine having the following configuration.

An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling a game operation, and a first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. A second storage means (for example, the main RAM 103) that stores information necessary for executing the calculation process by the calculation processing means, and a data transmission means (for example, during interrupt processing) for transmitting communication data related to the game operation. S904 (communication data transmission processing)) and communication data generation in which the communication data is created and the generated communication data is stored in a communication data storage area provided in a predetermined address range in the second storage means. The storage means (for example, communication data storage processing and communication data pointer update processing) are provided, and the communication data generation storage means moves from the storage area of the start address of the predetermined address range to the storage area of the last address. Sequentially, when storing the communication data in the communication data storage area, a predetermined update instruction (for example, "ICPLD" instruction) that can execute an update instruction, an upper limit determination instruction, and a determination branch instruction with one instruction is executed. Thereby, the current value of the communication data pointer, which is a parameter related to the address designation in the communication data storage area, is compared with the upper limit value of the communication data pointer corresponding to the last address, and the current communication data is compared. If the pointer is less than the upper limit value, the communication data pointer is added and updated, and if the current communication data pointer is equal to or more than the upper limit value, the communication data pointer is used as the communication data pointer corresponding to the start address. A gaming machine characterized by changing to a lower limit.

Further, in the eighth gaming machine of the present invention, when the communication data generation / storage means changes the communication data pointer to the lower limit value of the communication data pointer corresponding to the start address, the communication data storage area The communication data stored in may be invalidated.

Further, in order to solve the fourth problem, the present invention provides a ninth gaming machine having the following configuration.

An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling a game operation, and a first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. And a second storage means (for example, the main RAM 103) in which information necessary for executing the calculation process by the calculation processing means is stored, the calculation processing means has a predetermined value related to the progress of the game operation. In the data value counting process (for example, the medal payout number check process), when updating the predetermined data value, a predetermined update that can execute an update command, a lower limit determination command, and a judgment branch command with one command. By executing an instruction (for example, a "DCPLD" instruction), the current value of the predetermined data is compared with the lower limit of the value of the predetermined data, and the current value of the predetermined data is the predetermined value. If it is larger than the lower limit of the value of the predetermined data, the value of the predetermined data is subtracted and updated, and if the current value of the predetermined data is equal to or less than the lower limit of the value of the predetermined data, the predetermined data A gaming machine characterized in that the value is held at the lower limit value.

Further, in the ninth gaming machine of the present invention, the predetermined data may be the number of payouts of the gaming medium.

According to the eighth and ninth gaming machines of the present invention having the above configuration, the capacity of the processing programs and tables managed by the main control circuit is reduced to free up the free capacity of the ROM (first storage means) of the main control circuit. It is possible to increase the playability by increasing the number and using the free area of the ROM corresponding to the increased capacity.

[10th gaming machine]
Conventionally, in the gaming machine having the above-described configuration, a gaming machine controlled by a timer subtraction process by software is known (see, for example, Japanese Patent Application Laid-Open No. 2004-041261).

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complication of playability, and there is a demand for reducing the capacity of processing programs and tables managed by the main control circuit.

The present invention has been made to solve the above-mentioned fifth problem, and a fifth object of the present invention is to reduce the capacity of a processing program, a table, etc. managed by the main control circuit to reduce the capacity of the main control circuit. It is an object of the present invention to provide a gaming machine capable of increasing the free space of the ROM and enhancing the game playability by utilizing the free area of the ROM corresponding to the increased capacity.

In order to solve the fifth problem, the present invention provides a tenth gaming machine having the following configuration.

An arithmetic processing means (for example, main CPU 101) that performs arithmetic processing for controlling a game operation, and a first storage means (for example, main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. A second storage means (for example, a main RAM 103) for storing information necessary for executing the calculation process by the calculation processing means is provided, and the calculation processing means counts the number of timers of a soft timer (for example). For example, in the timer update process), by executing a predetermined update instruction (for example, a "DCPWLD" instruction) that can execute an update instruction, a lower limit determination instruction, and a determination branch instruction with one instruction, the current soft timer While comparing the number of timers with the lower limit of the number of timers, if the current number of timers of the soft timer is larger than the lower limit, the number of timers of the soft timer is subtracted and updated, and the current number of timers of the soft timer is updated. When is equal to or less than the lower limit value, the gaming machine is characterized in that the number of timers of the soft timer is held at the lower limit value.

In the tenth gaming machine of the present invention, the soft timer may be a 2-byte soft timer.

Further, in the tenth gaming machine of the present invention, the arithmetic processing means has a fixed cycle processing means (for example, an interrupt process repeatedly executed at a cycle of 1.1172 msec) that performs processing at a fixed cycle. The counting process of the number of timers by the soft timer is executed by the fixed cycle processing means, and the elapsed time of the soft timer is determined based on the cycle performed by the fixed cycle processing means and the number of timers. You may do so.

Further, in the tenth gaming machine of the present invention, the processing by the fixed cycle processing means is executed based on the interrupt signal generated by the timer function (for example, the timer circuit 113) built in the arithmetic processing means. You may do so.

According to the tenth gaming machine of the present invention having the above configuration, the capacity of processing programs and tables managed by the main control circuit is reduced to increase the free capacity of the ROM (first storage means) of the main control circuit. It is possible to provide a gaming machine capable of enhancing the game playability by utilizing the free area of the ROM corresponding to the increased capacity.

[11th and 12th gaming machines]
Conventionally, in the gaming machine having the above-described configuration, there is known a gaming machine that displays an internal lottery result by a 7-segment LED under the control of a main control circuit (see, for example, Japanese Patent Application Laid-Open No. 2008-237337).

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complication of playability, and there is a demand for reducing the capacity of processing programs and tables managed by the main control circuit.

The present invention has been made to solve the above-mentioned sixth problem, and a sixth object of the present invention is to reduce the capacity of a processing program, a table, etc. managed by the main control circuit to reduce the capacity of the main control circuit. It is an object of the present invention to provide a gaming machine capable of increasing the free space of the ROM and enhancing the game playability by utilizing the free area of the ROM corresponding to the increased capacity.

In order to solve the sixth problem, the present invention provides an eleventh gaming machine having the following configuration.

An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling the game operation, a plurality of 7-segment LEDs for notifying specific information about the game, and a 7-segment LED drive for driving the plurality of 7-segment LEDs. Necessary for execution of the means (for example, 7-segment LED drive processing), the LED drive control means for controlling the drive operation of the plurality of 7-segment LEDs by the 7-segment LED drive means, and the calculation processing by the calculation processing means. It is provided with a first storage means (for example, main ROM 102) in which various information is stored, and a second storage means (for example, main RAM 103) in which information necessary for executing the calculation process by the calculation processing means is stored. The LED drive control means performs dynamic drive control on the plurality of 7-segment LEDs, executes a predetermined read command (for example, "LDW" command), and is common to the plurality of 7-segment LEDs. A gaming machine characterized by outputting selection data and cathode data at the same time.

Further, in the eleventh gaming machine of the present invention, the arithmetic processing means has a fixed cycle processing means (for example, an interrupt process repeatedly executed at a cycle of 1.1172 msec) that performs processing at a fixed cycle. The fixed cycle processing means may count the number of times the process is executed by the fixed cycle processing means, and when the counted value is an even number, the control process by the LED drive control means may be executed. ..

Further, in order to solve the sixth problem, the present invention provides a twelfth gaming machine having the following configuration.

A loading operation detecting means (for example, BET switch 77) for detecting the loading operation of the game medium, and a starting operation detecting means (for example, for example) for detecting the starting operation by the player after the loading operation is detected by the loading operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, the variable display means (for example, three reels 3L, 3C, 3R) that variablely displays the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. A stop control means (for example, a reel stop control process) to be caused, an instruction display (for example, an instruction monitor) including a plurality of 7-segment LEDs for notifying information regarding a stop operation of the variation display of the plurality of display columns, and the plurality. 7-segment LED driving means for driving the 7-segment LED (for example, 7-segment LED driving processing) and arithmetic processing for controlling the driving operation of the plurality of 7-segment LEDs by the 7-segment LED driving means. For the means (for example, the main CPU 101), the first storage means (for example, the main ROM 102) in which the information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and the execution of the arithmetic processing by the arithmetic processing means. A second storage means (for example, main RAM 103) for storing necessary information is provided, and the arithmetic processing means performs dynamic drive control on the plurality of 7-segment LEDs and a predetermined read instruction (for example, for example). A gaming machine characterized by executing an "LDW" command) and simultaneously outputting common selection data and cathode data to the plurality of 7-segment LEDs.

Further, in the twelfth gaming machine of the present invention, the arithmetic processing means has a general-purpose register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and a general-purpose register when the arithmetic processing is executed by the arithmetic processing means. The data is stored, and the stored data has an expansion register (for example, a Q register) capable of designating a part of the address in the second storage means, and the arithmetic processing means uses the expansion register. By executing a predetermined read instruction (for example, "LDQ" instruction) capable of designating an address in the second storage means, the second storage means is arranged and the plurality of display columns are changed. The address of the stop operation instruction information storage area (for example, the navigation data storage area) for storing the information related to the display stop operation is specified, and the information regarding the stop operation of the variable display of the plurality of display columns is stored. It may be stored in the area.

According to the eleventh and twelfth gaming machines of the present invention having the above configuration, the capacity of the processing programs and tables managed by the main control circuit is reduced to free up the free capacity of the ROM (first storage means) of the main control circuit. It is possible to increase the playability by increasing the number and using the free area of the ROM corresponding to the increased capacity.

[13th gaming machine]
Conventionally, in a gaming machine having the above-described configuration, a gaming machine in which a gaming control board (main control board) controls a reel unit is known (see, for example, Japanese Patent Application Laid-Open No. 2012-034914).

By the way, in the rotation control of the reel (rotating cylinder), the lack of stability of the rotation operation of the reel causes discomfort to the player (especially a skilled person), and there is a possibility that the discomfort may reduce the interest of the game. There is. In this case, the game store may be disadvantaged and the sales of the game machine itself may be affected.

The present invention has been made to solve the above-mentioned seventh problem, and a seventh object of the present invention is to suppress a lack of stability in the rotational operation of the reel and not to give a player discomfort. It is to provide a gaming machine that can be used.

In order to solve the seventh problem, the present invention provides a thirteenth gaming machine having the following configuration.

An input operation detecting means (for example, BET switch 77) for detecting the input operation of the game medium, and a start operation detecting means (for example, for example) for detecting the start operation by the player after the input operation is detected by the input operation detecting means. A variable display means (for example, three reels 3L, which includes a start switch 79) and a plurality of display columns and variablely displays a symbol provided in each display column based on the detection of a start operation by the start operation detecting means. 3C, 3R), a stop operation detecting means (for example, a stop switch board 80) for detecting a stop operation by a player, and an arithmetic processing means (for example, a main CPU 101) for performing arithmetic processing for controlling a game operation. The first storage means (for example, the main ROM 102) in which the information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and the information necessary for executing the arithmetic processing by the arithmetic processing means is stored. The two storage means (for example, the main RAM 103) and the setting switch for initializing a predetermined area of the second storage means (for example, the setting key type switch 54) are provided, and the arithmetic processing means is described as described above. The internal winning combination determining means (for example, internal lottery processing) that determines the internal winning combination with a predetermined probability based on the detection of the starting operation by the start operation detecting means, the determination result of the internal winning combination determining means, and the stop. Based on the detection of the stop operation by the operation detection means, the stop control means (for example, reel stop control processing) for stopping the variation display of the symbol, and the input state and output port of the input port when a power failure occurs when the power is restored. When the output state of the above is set and the display column is changing at the time of power failure, the fluctuation control management information of the display column at the time of power failure stored in the second storage means (for example, It is characterized by having a game return means (for example, a game return process) that clears the reel control management information) and sets information instructing the change start of the display column in the change control management information of the display column. A game machine to play.

Further, in the thirteenth gaming machine of the present invention, when the setting switch is off, the arithmetic processing means executes processing by the game return means, and when the setting switch is on. Alternatively, the predetermined area of the second storage means may be initialized without executing the process by the game return means.

According to the thirteenth gaming machine of the present invention having the above configuration, it is possible to suppress the lack of stability in the rotation operation of the reel (variation display operation of the display column) so as not to cause discomfort to the player. ..

[14th gaming machine]
Conventionally, in a gaming machine having the above-described configuration, a gaming machine capable of displaying a set value (1 to 6) by operating a setting change switch is known (for example, Japanese Patent Application Laid-Open No. 2008-245704 and Japanese Patent Application Laid-Open No. 2008-245704). (See 2013-042870).

By the way, conventionally, while a game is being played in a game state advantageous to the player, such as during a bonus game or an ART game, a gaming machine whose set value cannot be confirmed is the mainstream. In such a gaming machine, if a bonus game or an ART game is started immediately after a fraudulent act called "goto", the fraudulent act cannot be confirmed, which may be disadvantageous to the game store. be.

The present invention has been made to solve the above-mentioned eighth problem, and an eighth object of the present invention is to play a game even while the game is being played in a gaming state which is advantageous to the player. It is to provide a gaming machine capable of confirming information such as set values and deterring fraudulent acts such as goto.

In order to solve the eighth problem, the present invention provides a fourteenth gaming machine having the following configuration.

Necessary for executing the arithmetic processing by the setting switch arranged at a predetermined position inside the game machine main body, the arithmetic processing means (for example, the main CPU 101) for performing arithmetic processing for controlling the game operation, and the arithmetic processing means. A first storage means (for example, main ROM 102) in which various information is stored, a second storage means (for example, main RAM 103) in which information necessary for executing the calculation process by the calculation processing means is stored, and a game medium. A closing operation detecting means (for example, BET switch 77) for detecting the closing operation of the player, and a starting operation detecting means (for example, a start switch) for detecting the starting operation by the player after the closing operation is detected by the closing operation detecting means. 79), the internal winning combination determining means (for example, internal lottery processing) that determines the internal winning combination with a predetermined probability based on the detection of the starting operation by the starting operation detecting means, and the internal winning combination determining means. Based on the determined internal winning combination, the advantageous gaming means (for example, a bonus game described later) that executes a gaming state advantageous to the player, and the probability that the internal winning combination is determined according to the operation of the setting switch. A setting change confirmation means (for example, S233 during the medal reception / start check process) capable of changing or confirming the setting value according to the above, and a plurality of display columns are included, and based on the detection of the start operation by the start operation detection means. A variable display means (for example, three reels 3L, 3C, 3R) for variablely displaying a symbol provided in each display row, and a stop operation detecting means (for example, a stop switch board 80) for detecting a stop operation by a player. A stop control means (for example, reel stop control process) for stopping the variation display of the symbol based on the determination result of the internal winning combination determination means and the detection of the stop operation by the stop operation detection means, and the game. The game start determination means (for example, medal reception / start check processing) for determining whether or not the game can be started is provided, and the setting change confirmation means is internally won according to the operation of the setting switch when the power is turned on. When it is possible to change the set value related to the probability that the combination is determined, it is determined that the game can be started by the game start determination means, and the setting switch is operated, the inside is irrespective of the game state. A gaming machine characterized in that a set value related to the probability that a winning combination is determined can be confirmed by a process by the setting change confirmation means.

Further, in the fourteenth gaming machine of the present invention, when the power is turned on to the gaming machine while the setting switch is operated, the setting change confirmation means has a predetermined storage area of the second storage means. May be initialized, the set value may be changed, and the changed set value may be stored in the second storage means.

According to the fourteenth gaming machine of the present invention having the above configuration, even during a game being played in a gaming state advantageous to the player, such as during a bonus game or an ART game, the set value and the like can be set. Information can be confirmed, and fraudulent acts such as goto can be deterred.

[15th and 16th gaming machines]
Conventionally, in the gaming machines having the above-described configuration, there are known gaming machines provided with a display device for displaying the number of inserted medals (see, for example, Japanese Patent Application Laid-Open No. 1999-178983).

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complication of playability, and there is a demand for reducing the capacity of processing programs and tables managed by the main control circuit.

The present invention has been made to solve the above-mentioned ninth problem, and a ninth object of the present invention is to reduce the capacity of a processing program, a table, etc. managed by the main control circuit to reduce the capacity of the main control circuit. It is an object of the present invention to provide a gaming machine capable of increasing the free space of the ROM and enhancing the game playability by utilizing the free area of the ROM corresponding to the increased capacity.

In order to solve the ninth problem, the present invention provides a fifteenth gaming machine having the following configuration.

A charging operation detecting means (for example, BET switch 77) for detecting the charging operation of the game medium, and a starting operation detecting means (for example, for example) for detecting the starting operation by the player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, a variable display means (for example, three reels 3L, 3C, 3R) that variablely displays the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and a stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. Detected by the stop control means (for example, reel stop control process), the game medium detection means (for example, the medal sensor) for detecting the acceptance state (for example, the medal sensor input state) of the game medium, and the game medium detection means. A game medium reception state determination means for determining whether or not the current change mode of the reception state of the game medium is normal, based on the reception state of the game medium detected in the previous process, by arithmetic processing. (For example, S255 to S258 during the medal insertion check process) and a gaming machine.

In the fifteenth gaming machine of the present invention, the game medium reception state determining means is a normal value of the reception state of the game medium that can be detected in the current process based on the reception state of the game medium detected in the previous process. May be calculated by a logical operation, and the normal value may be compared with the current reception state of the game medium to determine whether or not the change mode of the reception state of the game medium is normal. ..

Further, in the fifteenth gaming machine of the present invention, the game medium reception state determination means determines whether or not the change mode of the reception state of the game medium is normal by using two bits in the 1-byte information. You may do so.

In order to solve the ninth problem, the present invention provides a sixteenth gaming machine having the following configuration.

A charging operation detecting means (for example, BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. Stop control means (for example, reel stop control process) and display means (for example, first LED to third LED) for notifying information indicating the number of input of the game medium in a display mode corresponding to the number of input of the game medium. And, the arithmetic processing means (for example, the main CPU 101, the medal insertion processing) which performs the arithmetic processing for controlling the notification operation by the display means, and the information necessary for the execution of the arithmetic processing by the arithmetic processing means are stored. The arithmetic processing means includes a first storage means (for example, the main ROM 102) and a second storage means (for example, the main RAM 103) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. It is characterized in that lighting control data for notifying information indicating the number of input of the game medium in a display mode corresponding to the number of input of the game medium is generated by logical calculation processing based on the number of input of the game medium. A game machine.

Further, in the 16th gaming machine of the present invention, in the logical operation processing, the lighting control data of the gaming medium may be generated from 3 bits of information in 1 byte.

According to the fifteenth and sixteenth gaming machines of the present invention having the above configuration, the capacity of the processing program and the table managed by the main control circuit is reduced to increase the free capacity of the ROM of the main control circuit, and the increased capacity is increased. It is possible to improve the playability by using the free area of the ROM for the minute.

[17th and 18th gaming machines]
Conventionally, in a gaming machine having the above-described configuration, a gaming machine in which a main board (main control board) and a sub board (sub control board) are connected by communication and a command is transmitted from the main board to the sub board is known. (See, for example, Japanese Patent No. 5725590).

By the way, conventionally, the communication between the main control board that controls the game and the sub control board that controls the effect is one-way communication from the main control board to the sub control board, and when the power is turned on. There is a large gap between the start-up time of the main control board and that of the sub-control board. Therefore, the communication connection between the main control board and the sub control board at the time of turning on the power may become unstable.

The present invention has been made to solve the tenth problem, and the tenth object of the present invention is a main control board (main control means) and a sub control board (sub control means) at the time of turning on the power. It is to provide a gaming machine capable of stably operating communication between the two.

In order to solve the tenth problem, the present invention provides a seventeenth gaming machine having the following configuration.

A main control means (for example, a main control circuit 90) for transmitting communication data related to a game operation is provided, and the main control means executes an interruption process at a predetermined cycle during the control process by the main control means to interrupt. When there is no communication data related to the game operation at the time of processing execution, an interruption processing execution means (for example, interruption processing) that sends a non-operation command and a power restoration processing execution that executes a predetermined power restoration processing when the power is restored. It has means (for example, power-on processing), and the power restoration processing execution means waits until the interruption processing execution means can execute the interruption processing after the power restoration processing is started. Processing (for example, S7 and S8 during power-on processing) is performed, and the interruption processing execution means executes the interruption processing at the end of the standby by the power recovery processing execution means to execute the non-operation command. Is transmitted to the sub-control means.

Further, in the seventeenth gaming machine of the present invention, the main control means performs the interrupt processing based on the timer circuit (for example, timer circuit 113) for measuring the predetermined cycle and the timeout signal of the timer circuit. It has an interrupt circuit (for example, an interrupt controller 112) for generating an interrupt signal for execution, and the power recovery processing execution means sets initial settings for generating the timeout signal in the predetermined cycle. After setting in the timer circuit, a process of waiting until the interrupt process can be executed by the interrupt process executing means is performed, and the end of the wait is based on the presence or absence of the timeout signal of the timer circuit. You may make a judgment.

Further, in order to solve the tenth problem, the present invention provides an eighteenth gaming machine having the following configuration.

Arithmetic processing means (for example, main CPU 101) that performs arithmetic processing for controlling game operation, and communication data generation means (for example, setting change command generation / storage processing and communication data storage processing) that create command data related to game operation. , The interrupt processing execution means that executes the interrupt processing at a predetermined cycle during the control processing by the arithmetic processing means and transmits a non-operation command when there is no command data related to the game operation at the time of executing the interrupt processing ( For example, the interrupt processing), the power restoration processing execution means (for example, the power-on processing) that executes a predetermined power restoration processing at the time of power restoration, and the information necessary for executing the arithmetic processing by the arithmetic processing means are stored. A first storage means (for example, main ROM 102) and a second storage means (for example, main RAM 103) for storing information necessary for executing the calculation process by the calculation processing means are provided, and the power is restored. After the power restoration process is started, the process execution means performs a process of waiting until the interrupt process can be executed by the interrupt process execution means (for example, S7 and S8 during the power-on process), and the process is described. The interrupt processing execution means executes the interruption processing and transmits the non-operation command at the end of the standby by the power recovery processing execution means, and the arithmetic processing means is the arithmetic processing by the arithmetic processing means. Has a plurality of general-purpose registers in which a plurality of types of data are stored at the time of execution, the command data is composed of a command type, a plurality of communication parameters, and a sum value, and the plurality of the communication parameters are each a plurality of. The communication data generation means assigned to the general-purpose register is set in the general-purpose register after setting the communication parameter in the general-purpose register assigned to the communication parameter according to the command type of the command data. Communication parameters are stored in a predetermined storage area (for example, communication data temporary storage area) in the second storage means, and among the plurality of communication parameters, communication parameters that are not used based on the command type of the command data. Even if there is, the data stored in the general-purpose register associated with the unused communication parameter is stored in the predetermined storage area as the communication parameter, and the command type and the communication parameter are assigned. A gaming machine characterized in that a sum value of the command data is generated based on the data stored in a general-purpose register.

Further, the eighteenth gaming machine of the present invention includes a power supply monitoring means (for example, a power supply monitoring port) for monitoring the state of the power supply voltage, and the arithmetic processing means has a case where the state of the power supply voltage is not stable. After initializing the timer circuit, serial communication circuit, and random number circuit of the arithmetic processing means on the condition that the state of the power supply voltage is stable, the process waits until the state of the power supply voltage is stable. The predetermined area of the second storage means is used to confirm whether or not the second storage means is normal, and the no-operation command is transmitted on condition that the second storage means is normal. You may do so.

According to the 17th and 18th gaming machines of the present invention having the above configuration, it is possible to stably operate the communication between the main control board and the sub control board when the power is turned on.

[19th and 20th gaming machines]
Conventionally, in the gaming machine having the above-described configuration, there is known a gaming machine that executes, for example, a control called pull-in control of a winning symbol on a reel or a control called kicking control of a winning symbol on a reel based on a lottery result. (For example, refer to JP-A-2002-219213).

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Furthermore, in recent years, as the playability has become complicated and the pattern combination pattern of the winning combination has increased, the RAM capacity of the main control circuit has been squeezed, and the efficiency of the processing executed by the main control circuit has been improved. , There is a need to develop a technique that can effectively utilize the limited RAM capacity of the main control circuit.

The present invention has been made to solve the eleventh problem, and the eleventh object of the present invention is to improve the efficiency of processing executed by the main control circuit and to make the RAM capacity of the main control circuit effective. It is to provide a game machine that can be utilized.

In order to solve the eleventh problem, the present invention provides a nineteenth gaming machine having the following configuration.

An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling a game operation, and a first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. And a second storage means (for example, main RAM 103) in which information necessary for executing the calculation process by the calculation processing means is stored, the calculation processing means has an internal winning with a predetermined probability. An internal lottery means (for example, internal lottery processing) that determines flag status information (for example, a winning request flag status) related to a combination, and an internal winning combination that generates an internal winning combination from the flag status information acquired by the internal lottery means. Correspondence between the generation means (for example, S321 during the symbol setting process), the internal winning combination, the corresponding flag data, and the storage destination data that specifies the storage destination of the flag data in the second storage means. And a flag table expanding means (for example, S324 during the symbol setting process) that expands the flag data table (for example, the hit request flag table) stored in the first storage means in the second storage means. With the flag storage area designating means (for example, S329 during the symbol setting process) that is arranged in the second storage means and specifies the address of the flag data storage area (for example, the hit request flag storage area) that stores the flag data. , The flag data corresponding to the internal winning combination generated by the internal winning combination generating means is transferred from the flag table to the flag data storage area based on the corresponding storage destination data and stored. A gaming machine characterized by having a data storage means (for example, S330 during a symbol setting process).

Further, in the 19th gaming machine of the present invention, the arithmetic processing means calculates on-bit information indicating the storage destination data of the flag data table and sets it to the on-bit information to be transferred. The flag data may be transferred to the flag data storage area.

Further, in order to solve the eleventh problem, the present invention provides a twentieth gaming machine having the following configuration.

A charging operation detecting means (for example, BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A variable display means (for example, three reels 3L, which includes a start switch 79) and a plurality of display columns and variablely displays a symbol provided in each display column based on the detection of a start operation by the start operation detecting means. 3C, 3R), a stop operation detecting means (for example, a stop switch board 80) that detects a stop operation by a player, and an arithmetic processing means (for example, a main CPU 101) that performs arithmetic processing for controlling a game operation. The first storage means (for example, the main ROM 102) in which the information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and the information necessary for executing the arithmetic processing by the arithmetic processing means is stored. The arithmetic processing means includes two storage means (for example, a main RAM 103), and the arithmetic processing means includes a general-purpose register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and execution of the arithmetic processing by the arithmetic processing means. Data is sometimes stored, and an expansion register (for example, a Q register) that can specify a part of the address in the first storage means or the second storage means by the stored data, and a predetermined probability. An internal lottery means (for example, internal lottery processing) that determines flag status information (for example, a winning request flag status) regarding an internal winning combination, and an internal that generates an internal winning combination from the flag status information acquired by the internal lottery means. Winning combination generation means (for example, S321 during the symbol setting process), the internal winning combination, the winning flag data corresponding to the winning combination, and the storage destination data for designating the storage destination of the winning flag data in the second storage means. The winning flag table expanding means (for example, S324 during the symbol setting process) that expands the winning flag data table (for example, the winning request flag table) that defines the correspondence with the second storage means, and the expansion register. By executing a predetermined read instruction (for example, "LDQ" instruction) capable of designating an address in the second storage means, the data is arranged in the second storage means and the winning flag data is stored. The winning flag storage area designating means (for example, S329 during the symbol setting process) for designating the address of the winning flag data storage area (for example, the winning request flag storage area) and the inside thereof. The winning flag data corresponding to the internal winning combination generated by the winning combination generating means is transferred from the winning flag table to the winning flag data storage area based on the corresponding storage destination data and stored. A stop control means for stopping the variation display of the symbol based on the flag data storage means (for example, S330 during the symbol setting process), the determination result of the internal lottery means, and the detection of the stop operation by the stop operation detection means. (For example, reel stop control processing) and when the variable display of the plurality of display columns is stopped by the stop control means, the internal winning combination is placed on a determination line set across the plurality of display columns. By executing the winning combination determining means (for example, winning search processing) for determining whether or not the combination of symbols corresponding to the above is stopped and displayed, and the predetermined reading command, the data is arranged in the second storage means. Winning flag storage area designating means for designating the address of the winning flag data storage area (for example, the winning operation flag storage area) for storing the winning flag data corresponding to the combination of the symbols stopped and displayed on the determination line (for example, the symbol). By executing S648) during the code acquisition process and the predetermined read command, the symbol code data corresponding to the combination of the symbols arranged in the second storage means and stopped and displayed on the determination line is stored. A gaming machine characterized by having a symbol code storage area setting means (for example, S650 during a symbol code acquisition process) for designating an address of a symbol code storage area.

Further, in the twentieth gaming machine of the present invention, a part of the address that can be specified by the expansion register may be an upper address value constituting the address.

According to the 19th and 20th gaming machines of the present invention having the above configuration, it is possible to improve the efficiency of the processing executed by the main control circuit and effectively utilize the RAM (second storage means) capacity of the main control circuit. ..

[21st and 22nd gaming machines]
Conventionally, in the gaming machine having the above-mentioned configuration, the stop control of the variable display of the reel symbol is performed based on the internal winning combination and the stop operation of the player, the winning judgment is made by the combination of the symbols, and the hopper is determined based on the result of the winning judgment. A gaming machine that controls (medal payout device) to control medal payout is known (see, for example, Japanese Patent Application Laid-Open No. 2008-119498).

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complexity of playability, and there is a demand for reducing the capacity of processing programs and tables managed by the main control circuit.

The present invention has been made to solve the twelfth problem, and the twelfth object of the present invention is to reduce the capacity of a processing program, a table, etc. managed by the main control circuit to reduce the capacity of the main control circuit. It is an object of the present invention to provide a gaming machine capable of increasing the free space of the ROM and enhancing the game playability by utilizing the free area of the ROM corresponding to the increased capacity.

In order to solve the twelfth problem, the present invention provides a twenty-first gaming machine having the following configuration.

A charging operation detecting means (for example, BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The change display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. The stop control means (for example, reel stop control process) to be caused, the arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling the stop operation of the display column by the stop control means, and the arithmetic processing means. A first storage means (for example, main ROM 102) in which information necessary for executing the arithmetic processing is stored, and a second storage means (for example, for example) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. The main RAM 103) is provided, and the arithmetic processing means stores a general-purpose register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and data is stored when the arithmetic processing is executed by the arithmetic processing means. An expansion register (for example, a Q register) capable of designating a part of an address in the second storage means by the stored data, and an address designation in the second storage means can be performed using the expansion register. Stop operation detection result acquisition means (for example, S714 during reel stop control processing) for acquiring the detection result of the stop operation by the stop operation detection means by executing a predetermined read command (for example, "LDQ" command) that can be performed. When the player's stop operation with respect to the predetermined display column is detected by the stop operation detecting means, by executing the predetermined read command, the data is arranged in the second storage means and the predetermined display is displayed. Stop control data storage area setting means for designating the address of the stop control data storage area for storing the stop control data of the column variation display (for example, the source code “LDQ IX, wR1_CTRL- (wR” in FIG. 139). 2_CTRL-wR1_CTRL) ”), and a gaming machine characterized by having.

Further, in the 21st gaming machine of the present invention, a part of the address that can be specified by the expansion register may be an upper address value constituting the address.

Further, in order to solve the twelfth problem, the present invention provides a 22nd gaming machine having the following configuration.

A charging operation detecting means (for example, a BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. When a plurality of types of internal winning combinations are determined by the stop control means (for example, reel stop control processing) and the internal winning combination determining means, a plurality of types of symbols corresponding to the plurality of types of internal winning combinations are used. Among the combinations, the priority stop symbol determining means (for example, the pull-in priority acquisition process) for determining the combination of the symbols to be preferentially stopped and displayed on the determination line set across the plurality of display columns, and the above. An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling the stop operation of the display column by the stop control means and the determination operation of the combination of symbols to be stopped and displayed by the priority stop symbol determining means, and the above. A first storage means (for example, main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and a second storage in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. The arithmetic processing means includes means (for example, a main RAM 103), and the arithmetic processing means includes a general-purpose register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and data when the arithmetic processing means executes the arithmetic processing. Is stored, and an expansion register (for example, a Q register) that can specify a part of the address in the second storage means by the stored data, and an address designation in the second storage means using the expansion register. The stop operation detection result acquisition means (for example, the reel stop control process) for acquiring the detection result of the stop operation by the stop operation detection means by executing a predetermined read command (for example, the “LDQ” command). With S714) in When the player's stop operation with respect to the predetermined display column is detected by the stop operation detecting means, the stop operation is arranged in the second storage means and the predetermined display column is executed by executing the predetermined read command. With the stop control data storage area setting means for designating the address of the stop control data storage area for storing the stop control data of the variation display (for example, the source code "LDQ IX, wR1_CTRL- (wR2_CTRL-wR1_CTRL)" in FIG. 139). In the process of determining the combination of symbols to be stopped and displayed on the determination line with priority by the priority stop symbol determining means, a comparison determination command, a process jump destination address designation command, and a process jump operation command are issued. By executing a predetermined determination command (for example, a "JCP" command) that can be executed by one command, a specific display column currently being determined (for example, a combination of symbols corresponding to the internal winning combination to be determined) ( For example, it is determined whether or not a predetermined combination of symbols (for example, "ANY" combination) in which the stop symbol on the determination line on the right reel 3R) is arbitrary is included, and the internal winning combination to be determined is determined. When it is determined that the combination of symbols corresponding to is included in the combination of the predetermined symbols, the arbitrary combination handling processing means for prohibiting the stop display of the combination of the symbols corresponding to the internal winning combination to be determined (for example). , S683) in the process of acquiring the pull-in priority, and the gaming machine.

Further, in the 22nd gaming machine of the present invention, a part of the address that can be specified by the expansion register may be an upper address value constituting the address.

According to the 21st and 22nd gaming machines of the present invention having the above configuration, the capacity of the processing program and the table managed by the main control circuit is reduced to increase the free capacity of the ROM of the main control circuit, and the increased capacity is increased. It is possible to improve the playability by using the free area of the ROM for the minute.

[23rd to 25th gaming machines]
Conventionally, in the gaming machine having the above-described configuration, there is known a gaming machine that controls the stop of a symbol by using a pull-in priority table at the time of stopping control of the symbol (see, for example, Japanese Patent Application Laid-Open No. 2007-175450).

By the way, conventionally, as a limitation peculiar to the above-mentioned gaming machine, the program capacity of the main control circuit is limited to a small capacity by a rule. Further, in recent years, the capacity of the ROM of the main control circuit has been squeezed due to the complication of playability, and there is a demand for reducing the capacity of processing programs and tables managed by the main control circuit.

The present invention has been made to solve the thirteenth problem, and the thirteenth object of the present invention is to reduce the capacity of a processing program, a table, etc. managed by the main control circuit to reduce the capacity of the main control circuit. It is an object of the present invention to provide a gaming machine capable of increasing the free space of the ROM and enhancing the game playability by utilizing the free area of the ROM corresponding to the increased capacity.

In order to solve the thirteenth problem, the present invention provides a twenty-third gaming machine having the following configuration.

A charging operation detecting means (for example, a BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. When a plurality of types of internal winning combinations are determined by the stop control means (for example, reel stop control processing) and the internal winning combination determining means, a plurality of types of symbols corresponding to the plurality of types of internal winning combinations are used. Among the combinations, the priority stop symbol determining means (for example, the pull-in priority acquisition process) for determining the combination of the symbols to be preferentially stopped and displayed on the determination line set across the plurality of display columns, and the above. Necessary for executing the arithmetic processing by the arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling the operation of determining the combination of symbols to be preferentially stopped and displayed by the priority stop symbol determining means, and the arithmetic processing means. It is provided with a first storage means (for example, main ROM 102) in which various information is stored and a second storage means (for example, main RAM 103) in which information necessary for executing the calculation process by the calculation processing means is stored. The arithmetic processing means is a general-purpose register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and data is stored when the arithmetic processing is executed by the arithmetic processing means, and the stored data is used as the storage data. In a process of having an expansion register (for example, a Q register) capable of designating a part of an address in the second storage means, and determining a combination of symbols to be preferentially stopped and displayed by the priority stop symbol determining means. The arithmetic processing means uses the expansion register to execute a predetermined read instruction (for example, an “LDQ” instruction) capable of designating an address in the second storage means, thereby causing the second storage means. It is placed inside and the internal winning combination The winning flag storage area specifying means (for example, S686 during the pull-in priority acquisition process) that specifies the address of the winning flag data storage area (for example, the winning request flag storage area) that stores the winning flag data corresponding to the above. By executing the read command of, the winning flag data storage area (for example, winning operation) for storing the winning flag data corresponding to the combination of the symbols arranged in the second storage means and stopped and displayed on the determination line. The logical product of the winning flag storage area designating means (for example, S686 during the attraction priority acquisition process) that specifies the address of the flag storage area), the winning flag data, and the corresponding winning flag data. A gaming machine characterized by having a calculation means (for example, S686 during a pull-in priority acquisition process).

Further, in the 23rd game machine of the present invention, in the process of determining the combination of the symbols to be preferentially stopped and displayed by the priority stop symbol determining means, the combination of the symbols corresponding to the internal winning combination to be determined. In the case where a predetermined combination of symbols (for example, "ANY" combination) in which the stop symbol on the determination line in the specific display column (for example, the right reel 3R) currently being determined is arbitrary is included. The arithmetic processing means includes an address designation process of the winning flag data storage area by the winning flag storage area designating means, an address designation process of the winning flag data storage area by the winning flag storage area designating means, and a logical product operation. The logical product operation processing by the means may not be executed.

Further, in order to solve the thirteenth problem, the present invention provides a twenty-fourth gaming machine having the following configuration.

A charging operation detecting means (for example, a BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. When a plurality of types of internal winning combinations are determined by the stop control means (for example, reel stop control processing) and the internal winning combination determining means, a plurality of types of symbols corresponding to the plurality of types of internal winning combinations are used. Among the combinations, the priority stop symbol determining means (for example, the pull-in priority acquisition process) for determining the combination of the symbols to be preferentially stopped and displayed on the determination line set across the plurality of display columns, and the above. Necessary for executing the arithmetic processing by the arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling the operation of determining the combination of symbols to be preferentially stopped and displayed by the priority stop symbol determining means, and the arithmetic processing means. It is provided with a first storage means (for example, main ROM 102) in which various information is stored and a second storage means (for example, main RAM 103) in which information necessary for executing the calculation process by the calculation processing means is stored. The arithmetic processing means is a general-purpose register in which data is stored when the arithmetic processing is executed by the arithmetic processing means, and data is stored when the arithmetic processing is executed by the arithmetic processing means, and the stored data is used as the storage data. A symbol having an expansion register (for example, a Q register) capable of designating a part of an address in the first storage means or the second storage means, and preferentially stopped and displayed by the priority stop symbol determining means. In the process of determining the combination, the arithmetic processing means executes a predetermined read instruction (for example, "LDQ" instruction) capable of designating an address in the second storage means by using the expansion register. , Placed in the second storage means In addition, the winning flag storage area specifying means (for example, during the attraction priority acquisition process) that specifies the address of the winning flag data storage area (for example, the winning request flag storage area) that stores the winning flag data corresponding to the internal winning combination. S686) and the winning flag data storage that stores the winning flag data corresponding to the combination of the symbols arranged in the second storage means and stopped and displayed on the determination line by executing the predetermined read command. Logic of the winning flag storage area specifying means (for example, S686 during the attraction priority acquisition process) that specifies the address of the area (for example, the winning operation flag storage area), the winning flag data, and the corresponding winning flag data. A combination of symbols to be stopped and displayed between the combination of the logical product calculation means for performing the product operation (for example, S686 during the pull-in priority acquisition process) and the combination of the plurality of types of symbols by executing the predetermined read command. A gaming machine characterized by having a priority data table acquisition means (for example, S687 during a pull-in priority acquisition process) for acquiring a data table in which priorities are defined.

Further, in the 24th gaming machine of the present invention, in the process of determining the combination of the symbols to be preferentially stopped and displayed by the priority stop symbol determining means, the combination of the symbols corresponding to the internal winning combination to be determined. In the case where a predetermined combination of symbols (for example, "ANY" combination) in which the stop symbol on the determination line in the specific display column (for example, the right reel 3R) currently being determined is arbitrary is included. The arithmetic processing means includes an address designation process of the winning flag data storage area by the winning flag storage area designating means, an address designation process of the winning flag data storage area by the winning flag storage area designating means, and a logical product operation. The logical product operation processing by the means may not be executed.

Further, in order to solve the thirteenth problem, the present invention provides a twenty-fifth gaming machine having the following configuration.

A charging operation detecting means (for example, BET switch 77) that detects a charging operation of a game medium, and a start operation detecting means (for example, a start operation detecting means) that detects a start operation by a player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, variable display means (for example, three reels 3L, 3C, 3R) that variablely display the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and the stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. An operation for controlling a stop control means (for example, a reel stop control process), an error detecting means for determining the presence / absence of an illegal hit error (for example, an illegal hit check process), and a determination operation by the error detecting means. The arithmetic processing means (for example, the main CPU 101) for performing the processing, the first storage means (for example, the main ROM 102) in which the information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and the arithmetic processing means. A general-purpose storage means (for example, a main RAM 103) for storing information necessary for executing arithmetic processing is provided, and the arithmetic processing means stores data when the arithmetic processing means executes the arithmetic processing. A register, an extension register (for example, a Q register) in which data is stored when the arithmetic processing is executed by the arithmetic processing means and a part of an address in the second storage means can be specified by the stored data. In the process of determining whether or not an illegal hit error has occurred by the error detecting means, the arithmetic processing means can specify an address in the second storage means by using the expansion register. By executing a read command (for example, a "LDQ" command), it corresponds to a combination of symbols arranged in the second storage means and stopped and displayed on a determination line set across the plurality of display columns. Winning flag storage area specifying means for specifying the address of the winning flag data storage area (for example, winning operation flag storage area) for storing the winning flag data (for example, illegal hit check processing) A logical product calculation means (for example, illegal) that performs a logical product calculation of S781) in the process, the winning flag data stored in the winning flag data storage area, and the winning flag data indicating the corresponding internal winning combination. It has S784) during the hit check process and an error determination means (for example, S785 during the illegal hit check process) for determining whether or not an illegal hit error has occurred based on the calculation result by the logical product calculation means. The gaming machine, characterized in that the configuration of the winning flag data storage area (for example, the winning request flag storage area) in which the winning flag data is stored is the same as the configuration of the winning flag data storage area.

Further, in the 25th gaming machine of the present invention, a part of the address that can be specified by the expansion register may be an upper address value constituting the address.

Further, in the 25th gaming machine of the present invention, the arithmetic processing means has an error processing means for performing error processing when it is determined by the error detecting means that there is an illegal hit error. The error processing means may visually notify the illegal hit error and stop the game until the illegal hit error is cleared.

According to the 23rd to 25th gaming machines of the present invention having the above configuration, the capacity of the processing programs and tables managed by the main control circuit is reduced to increase the free capacity of the ROM of the main control circuit, and the increased capacity is increased. It is possible to improve the playability by using the free area of the ROM for the minute.

[26th gaming machine]
Conventionally, in a gaming machine having the above-described configuration, a gaming machine that transmits command data from a gaming control board (main control board) to an effect control board (secondary control board) is known (for example, Japanese Patent Application Laid-Open No. 2013-027655). And Japanese Patent Application Laid-Open No. 2014-033751).

By the way, in recent years, with the diversification of playability, there is a tendency that the processing related to playability increases in the staging control by the sub-control circuit. Therefore, a fraudulent act called "goto" that falsifies the communication data transmitted from the main control circuit to the sub control circuit has occurred, causing damage to the amusement shop. On the other hand, conventionally, as proposed in Japanese Patent Application Laid-Open No. 2014-033751 and the like, measures have been taken to prevent the transmission data from being lumped in the main control circuit. However, the addition of such anti-goto processing causes a problem that the program capacity of the main control circuit is squeezed.

The present invention has been made to solve the above-mentioned fourteenth problem, and the fourteenth object of the present invention is to suppress fraudulent acts without performing fraud prevention processing on transmitted data, and to prevent fraudulent activities. It is to provide a gaming machine capable of eliminating the pressure on the program capacity of the main control circuit due to fraud prevention processing.

In order to solve the 14th problem, the present invention provides a 26th gaming machine having the following configuration.

Data transmission means for transmitting communication data related to the game operation (for example, main control circuit 90), communication data generation means for creating the communication data (for example, communication data storage processing), and communication data by the communication data generation means. An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling the generation operation of the data, and a first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. ) And a second storage means (for example, the main RAM 103) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and the arithmetic processing means is the arithmetic processing by the arithmetic processing means. Has a plurality of general-purpose registers in which a plurality of types of data are stored at the time of execution, and the arithmetic processing means has a plurality of types of communication parameters constituting the communication data in the communication data generation processing by the communication data generation means. Are assigned to the plurality of general-purpose registers, and the communication parameter is set in the corresponding general-purpose register among the plurality of general-purpose registers based on the type of the communication data among the plurality of types of communication parameters constituting the communication data. Then, the communication parameters set in the general-purpose register are stored in a predetermined storage area (communication data temporary storage area) in the second storage means, and among the plurality of types of communication parameters, the communication data is not generated at the time of generation. The data stored in the general-purpose register associated with the communication parameter used is stored in the predetermined storage area as a communication parameter, and the data set in the plurality of general-purpose registers according to the plurality of types of communication parameters is stored. A gaming machine characterized in that a sum value of the communication data is generated based on the above.

Further, in the 26th gaming machine of the present invention, the communication data generation means is set in the plurality of general-purpose registers when there is no space in a predetermined storage area in the second storage means. The communication data generation process may be terminated without storing the parameter in the predetermined storage area in the second storage means.

According to the 26th gaming machine of the present invention having the above configuration, fraudulent activity can be suppressed without performing fraud prevention processing on the transmitted data (communication data), and the program capacity of the main control circuit by the fraud prevention processing is performed. The pressure on the machine can be eliminated.

[27th game machine]
Conventionally, in the gaming machine having the above-described configuration, there is known a gaming machine having a function of updating the number of credits according to the number of medals paid out under the control of the main control circuit (for example, Japanese Patent Application Laid-Open No. 2009-). See Japanese Patent Publication No. 077977).

By the way, conventionally, in games during ART or bonus, the frequency of paying out medals is high, but at this time, the payout interval for each medal is often controlled uniformly (constantly). In this case, a wasteful waiting time occurs during the medal payout period. Therefore, for example, in a long-time game such as ART, the game period becomes unnecessarily long, which may be a mental burden on the player.

The present invention has been made to solve the above fifteenth problem, and the fifteenth object of the present invention is to reduce unnecessary waiting time during the medal payout period and reduce the mental burden on the player. It is to provide a gaming machine capable of doing so.

In order to solve the fifteenth problem, the present invention provides a twenty-seventh gaming machine having the following configuration.

A charging operation detecting means (for example, BET switch 77) for detecting the charging operation of the game medium, and a starting operation detecting means (for example, for example) for detecting the starting operation by the player after the loading operation is detected by the charging operation detecting means. A start switch 79), an internal winning combination determining means (for example, internal lottery processing) that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means, and a plurality of display columns. Including, a variable display means (for example, three reels 3L, 3C, 3R) that variablely displays the symbols provided in each display column based on the detection of the start operation by the start operation detection means, and a stop operation by the player. The variation display of the symbol is stopped based on the determination result of the stop operation detecting means (for example, the stop switch board 80) for detecting the above, the determination result of the internal winning combination determination means, and the detection of the stop operation by the stop operation detecting means. When the change display of the plurality of display columns is stopped by the stop control means (for example, reel stop control process) and the stop control means, on the determination line set across the plurality of display columns. The game medium is paid out by the privilege grant determination means (for example, winning search processing) for determining whether or not the combination of symbols corresponding to the internal winning combination related to the payout of the game medium is stopped and displayed, and the privilege grant determination means. When it is determined that the combination of symbols corresponding to the internal winning combination according to the above is stopped and displayed on the determination line, the game medium payout means (for example, winning check / medal payout process) for paying out the game medium and the above A game medium storage means (for example, a credit function) for storing a game medium, and an arithmetic processing means (for example, a main CPU 101) for performing arithmetic processing for controlling the payout operation of the game medium by the game medium payout means. In addition, the arithmetic processing means determines that the combination of symbols corresponding to the internal winning combination related to the payout of the game medium is stopped and displayed on the determination line by the privilege grant determination means, and the game medium storage means When the number of stored game media stored in the game medium is less than the upper limit, the game medium adding means for adding 1 to the number of stored game media (for example, S805 during the winning check / medal payout process). And, after the game medium is added by 1 to the number of stored game media by the game medium addition means, the combination of symbols corresponding to the internal winning combination related to the payout of the game medium is stopped and displayed. The payout of all the payouts of the game medium has been completed. When it is determined by the payout end determination means (for example, S807 during the winning check / medal payout process) and the payout end determination means that the total number of payouts of the game medium has not been paid out. The gaming machine is characterized by having a weight generating means (for example, S808 during a winning check / medal payout process) that generates a weight in which an operation related to the game becomes invalid for a predetermined period.

Further, in the 27th gaming machine of the present invention, the arithmetic processing means has an interrupt processing executing means for executing interrupt processing at a predetermined cycle, and the operation related to the game by the wait generating means becomes invalid. In the wait, the interrupt process by the interrupt process execution means may be executed a predetermined number of times.

According to the 27th gaming machine of the present invention having the above configuration, it is possible to reduce unnecessary waiting time and reduce the mental burden on the player during the medal (game medium) payout period.

[28th and 29th gaming machines]
Conventionally, in the gaming machine having the above-described configuration, there is known a gaming machine in which a lottery table for determining an internal winning combination or an AT game is stored in a ROM (see, for example, Japanese Patent Application Laid-Open No. 2009-125459).

By the way, in the gaming machine described in JP-A-2009-125459, the lottery table and the lottery processing program for AT games are stored in a ROM provided on a sub-control board having a sufficient storage capacity. However, for reasons peculiar to the gaming machine industry in recent years, it is necessary to store the table and the program related to the lottery of AT games in the ROM provided on the main control board. Therefore, the ROM capacity of the main control board, which is limited to a small capacity, is compressed.

The present invention has been made to solve the above 16th problem, and the 16th object of the present invention is to reduce the amount of data used in the processing of the main control circuit and to free the ROM of the main control circuit. It is to provide a gaming machine capable of increasing the capacity.

In order to solve the 16th problem, the present invention provides a 28th gaming machine having the following configuration.

A start operation detecting means (for example, a start switch 79) that detects a start operation by a player, and an internal winning combination determination that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means. Based on the means (for example, internal lottery processing) and the internal winning combination determined by the internal winning combination determining means, a privilege grant determination is determined by lottery to determine whether or not to grant a gaming state advantageous to the player as a privilege. The lottery table includes means (for example, CT lottery processing during CT) and a lottery table referred to by the privilege grant determination means (for example, CT lottery table during CT), and the lottery table is the internal lottery target. Judgment data (for example, determination bit) that specifies the type of combination and the lottery value of the internal winning combination of the lottery target specified in the determination data are defined, and the lottery value of the internal winning combination that is not subject to lottery. Is not specified, and a value other than 0 is specified for the lottery value of the internal winning combination of the lottery target having a winning probability of less than 100%, and the lottery value of the internal winning combination of the lottery target having a winning probability of 100%. A game machine characterized in that 0 is specified for.

Further, in the 28th gaming machine of the present invention, the privilege granting determining means acquires a 1-byte random number value from a soft latch random number, and draws a lottery using the acquired random number value and the lottery value. , It may be decided whether or not to grant a gaming state advantageous to the player as a privilege.

In order to solve the 16th problem, the present invention provides a 29th gaming machine having the following configuration.

A start operation detecting means (for example, a start switch 79) that detects a start operation by a player, and an internal winning combination determination that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means. Based on the means (for example, internal lottery processing) and the internal winning combination determined by the internal winning combination determining means, a privilege grant determination is determined by lottery to determine whether or not to grant a gaming state advantageous to the player as a privilege. A means (for example, CT lottery processing during CT) and a lottery table (for example, a CT lottery table during CT) which is referred to by the privilege granting determination means and is provided for each type of the internal winning combination are currently determined. A lottery table selection table for selecting the lottery table associated with the internal winning combination (for example, a table selection relative table for each winning combination) is provided, and in the lottery table selection table, the type of the internal winning combination is provided. For each, a selection value is defined that can determine whether or not the internal winning combination of the type is a lottery target and can specify the placement destination of the lottery table associated with the internal winning combination of the type. The selection value of the internal winning combination that is not subject to lottery is defined as 0, which treats the lottery result by the privilege grant determination means as a loss, and the selection value of the internal winning combination that is subject to lottery is 0. A game machine characterized in that data other than the above are specified.

Further, in the 29th gaming machine of the present invention, the selection value of the lottery table selection table is a relative value up to the lottery table to be selected, and even if the relative value is a 1-byte value. good.

According to the 28th and 29th gaming machines of the present invention having the above configuration, it is possible to reduce the amount of data used in the processing of the main control circuit and increase the free capacity of the ROM of the main control circuit.

[30th gaming machine]
Conventionally, in the gaming machine having the above-described configuration, the program and the table are respectively arranged in a fixed area in the ROM mounted on the main control board (see, for example, Japanese Patent Application Laid-Open No. 2012-110635).

By the way, as in the gaming machine described in Japanese Patent Application Laid-Open No. 2012-110635, the programs and tables that can be arranged in the ROM of the main control board are restricted by the rules of the gaming machine industry, and the ROM of the main control board. The extensibility of programs and tables within is extremely poor.

The present invention has been made to solve the above 17th problem, and the 17th object of the present invention is a gaming machine capable of enhancing the expandability of a program and a table in the ROM of the main control board. Is to provide.

In order to solve the 17th problem, the present invention provides a 30th gaming machine having the following configuration.

An arithmetic processing means (for example, the main CPU 101) that performs arithmetic processing for controlling a game operation, and a first storage means (for example, the main ROM 102) in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored. A second storage means (for example, a main RAM 103) for storing information necessary for executing the calculation process by the calculation processing means, and the first storage means is a game performed by a player. It is arranged in a game storage area (for example, a game ROM area) in which information necessary for executing a process related to the gameability of the game is stored, and an area different from the game storage area, and is executed by the player. A gaming machine characterized in that an out-of-specification storage area (for example, an out-of-specification ROM area) in which information necessary for executing a process not related to the playability of the game is stored is provided.

Further, in the thirtieth gaming machine of the present invention, the second storage means is for gaming in which information necessary for executing a process related to the gameability of the game performed by the player is temporarily stored. The game playability of the game, which is arranged in an area different from the game temporary storage area (for example, the game RAM area) including the work area and the game stack area and the game temporary storage area, and is performed by the player. An extra-specified work area for temporarily storing information necessary for executing processing that is not related to the above and an extra-specified temporary storage area (for example, an unspecified RAM area) including an unspecified stack area are provided. May be good.

Further, in the thirtieth gaming machine of the present invention, the arithmetic processing means has a stack pointer as a dedicated register, and the arithmetic processing means is a program stored in the non-specified storage area of the first storage means. When executing, the address of the non-specified stack area of the second storage means is set in the stack pointer, and the program stored in the non-specified storage area of the first storage means is terminated. The address of the game stack area of the second storage means saved when the program stored in the non-specified storage area is executed is set in the stack pointer, and the game storage of the first storage area is set. You may return to the program stored in the area.

According to the thirtieth gaming machine of the present invention having the above configuration, the expandability of the program and the table in the ROM of the main control board can be enhanced.

[31st gaming machine]
Conventionally, in the gaming machine having the above-mentioned configuration, in order to use the information of the internal winning combination determined by the main control circuit in the staging control of the sub-control circuit, the internal winning combination is converted into a sub-flag that summarizes the types in group units. A gaming machine having a function is known (see, for example, Japanese Patent Application Laid-Open No. 2010-051471).

In the gaming machine described in JP-A-2010-051471, the conversion table and the conversion processing program for converting the internal winning combination into sub-flags are stored in a ROM provided on the sub-control board having a sufficient storage capacity. Has been done. However, for reasons peculiar to the gaming machine industry in recent years, the information of the internal winning combination determined by the main control circuit cannot be transmitted to the sub control circuit, and a conversion table and a conversion processing program related to the sub flag are also provided on the main control board. It is necessary to store it in the ROM. In this case, these tables and programs will put pressure on the ROM capacity of the main control board, which is limited to a small capacity. Therefore, it is required to develop a technology that can suppress the pressure on the ROM capacity of the main control board by the conversion table and conversion processing program related to the sub-flags, and can efficiently respond to changes in the model, planning, specifications, etc. of the gaming machine. ing.

The present invention has been made to solve the above-mentioned eighteenth problem, and the eighteenth object of the present invention is to suppress pressure on the ROM capacity of the main control board, and to model, plan, and specify a gaming machine. It is to provide a gaming machine capable of efficiently responding to such changes.

In order to solve the 18th problem, the present invention provides a 31st gaming machine having the following configuration.

A start operation detecting means (for example, a start switch 79) that detects a start operation by a player, and an internal winning combination determination that determines an internal winning combination with a predetermined probability based on the detection of the start operation by the start operation detecting means. A first sub-flag conversion means (for example, a sub-flag) that converts a means (for example, an internal lottery process) and an internal winning combination determined by the internal winning combination determining means into a first sub-flag (for example, a sub-flag) with reference to a conversion table. For example, the sub-flag conversion process) and the first sub-flag obtained by the conversion process by the first sub-flag conversion means are referred to a lottery table (for example, various flag conversion lottery tables), and the second sub-flag is drawn by lottery. A second sub-flag conversion means (for example, flag conversion processing) for converting to (for example, sub-flag EX) is provided, and in the conversion table, the internal winning combination and the control status data associated with the internal winning combination , The correspondence with the first sub-flag is defined, the control status data of the same value is assigned to the first sub-flag of the same type, and the lottery by the second sub-flag conversion means is the control status. A game machine characterized by being performed based on data.

Further, the gaming machine of the present invention includes a data transmitting means for transmitting command data related to the gaming operation, and the data transmitting means is triggered by the start operation detecting means detecting the start operation. The sub-flag of may be transmitted as a communication parameter of command data.

According to the 31st gaming machine of the present invention having the above configuration, it is possible to suppress the pressure on the ROM capacity of the main control board and efficiently respond to changes in the model, planning, specifications, etc. of the gaming machine.

[32nd to 35th gaming machines]
Further, in recent years, a gaming machine that notifies a player of information advantageous to the player, such as information for establishing an internal winning combination, so as not to miss the role determined as the internal winning combination. Are known. It should be noted that the notification of information that is advantageous to the player in this way is generally referred to as navigating (navigating), and the period during which the navigating is performed is referred to as AT (assist time), and has an AT function. Gaming machines are called AT machines and ART machines.

As such an AT (ART) machine, Japanese Patent Application Laid-Open No. 2014-036725 describes a gaming machine provided with a high-probability winning zone (hereinafter referred to as “chance zone”) for an AT having a high expectation of winning an AT. Have been described. According to such a gaming machine, it is possible to set a difference in the winning probability of the AT between the game in the non-chance zone and the game in the chance zone, and the winning probability of the AT is not uniform and the game I was able to enhance the interest.

However, in the above-mentioned gaming machine, the AT lottery is performed using the same lottery table regardless of whether or not the AT winning has already been determined. As a result, the AT winning has already been determined. Even in such a situation, there is a risk that the AT will be drawn with the same winning probability as in the state where the winning of the AT has not been determined, and an excessive profit will be given to the player.

The present invention has been made to solve the above 19th problem, and the 19th object of the present invention is to provide a gaming machine capable of suppressing giving an excessive benefit to a player. To provide.

In order to solve the 19th problem, the present invention provides a 32nd gaming machine having the following configuration.

A plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed, a symbol display means (for example, a reel display window 4) for displaying a part of the plurality of symbols displayed on the reels, and the like. The symbol is rotated by rotating the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player and the start operation detected by the start operation detecting means. An internal winning combination that determines an internal winning combination with a predetermined probability from a plurality of combinations according to the symbol changing means (for example, the main control circuit 90, the stepping motor) to be changed and the detection of the start operation by the start operation detecting means. A determination means (for example, a main control circuit 90) and a stop operation detection means (for example, a main control circuit 90, a stop switch board) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means, the rotation of the reel is stopped to cause the symbol display means. Whether or not to give a privilege (for example, stock of the number of sets in the ART state) to the player and the reel stop control means (for example, the main control circuit 90, the stepping motor) for stopping the fluctuation of the displayed symbol. , And a privilege determining means (for example, the main control circuit 90) for determining the size of the privilege (for example, the rank of the ART state) when granting, and determining that the privilege determining means determines to grant the privilege. When the privilege granting means (for example, the main control circuit 90) for granting the privilege of the size and the privilege determining means decide to grant the privilege, the right to receive the privilege is stored and the privilege granting means is stored. A right management means (for example, main control circuit 90, main RAM 103) that erases one of the rights when the privilege is granted, and a probability that the privilege determining means determines that the privilege is granted when a predetermined condition is satisfied. Shifts the gaming state to a high probability state (for example, CZ), and when the end condition is satisfied during the high probability state, the state control means (for example, the main control circuit 90) that ends the high probability state. In addition, the privilege management means does not store the right in the right management means as compared with the case where it is determined to grant the privilege in the high probability state in which the right is stored in the right management means. If it is decided to grant the above privilege during the high probability state, it will be granted. A gaming machine characterized in that the size of the above-mentioned privilege is relatively large.

Further, the privilege determining means can determine that one or a plurality of the benefits are given by one decision, and the state control means determines that the privilege determining means grants the privilege during the high probability state. , The high probability state is interrupted until the privilege is granted (for example, until the ART state ends), and after the privilege is granted (for example, after the ART state ends). When the state is restarted and the right is stored in the right management means when the termination condition in the high probability state is satisfied, the privilege granting means grants the privilege according to the right. May be.

In order to solve the 19th problem, the present invention provides a 33rd gaming machine having the following configuration.

A plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed, a symbol display means (for example, a reel display window 4) for displaying a part of the plurality of symbols displayed on the reels, and the like. The symbol is rotated by rotating the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player and the start operation detected by the start operation detecting means. An internal winning combination that determines an internal winning combination with a predetermined probability from a plurality of combinations according to the symbol changing means (for example, the main control circuit 90, the stepping motor) to be changed and the detection of the start operation by the start operation detecting means. A determination means (for example, a main control circuit 90) and a stop operation detection means (for example, a main control circuit 90, a stop switch board) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means, the rotation of the reel is stopped to cause the symbol display means. Whether or not to give a privilege (for example, stock of the number of sets in the ART state) to the player and the reel stop control means (for example, the main control circuit 90, the stepping motor) for stopping the fluctuation of the displayed symbol. , And a privilege determining means (for example, the main control circuit 90) for determining the size of the privilege (for example, the rank of the ART state) when granting, and determining that the privilege determining means determines to grant the privilege. When the privilege granting means (for example, the main control circuit 90) for granting the privilege of the size and the privilege determining means decide to grant the privilege, the right to receive the privilege is stored and the privilege granting means is stored. Provided a right management means (for example, a main control circuit 90, a main RAM 103) for erasing one of the rights when the privilege is granted, and the privilege determining means stores the right in the right management means. It is determined that the privilege is granted with different probabilities depending on whether the right is stored or not stored in the right management means, and the right is more likely to be granted than when the right is stored in the right management means. A gaming machine characterized in that the size of the privilege to be granted is determined relatively larger when the right is not stored in the management means.

In addition, the privilege determining means has a relatively higher probability of receiving the privilege when the right is not stored in the right management means than when the right is stored in the right management means. You may decide to grant it,
In addition, the privilege determining means has a relatively higher probability of receiving the privilege when the right is stored in the right management means than when the right is not stored in the right management means. It may be decided to grant it.

In order to solve the 19th problem, the present invention provides a 34th gaming machine having the following configuration.

A plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed, a symbol display means (for example, a reel display window 4) for displaying a part of the plurality of symbols displayed on the reels, and the like. The symbol is rotated by rotating the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player and the start operation detected by the start operation detecting means. An internal winning combination that determines an internal winning combination with a predetermined probability from a plurality of combinations according to the symbol changing means (for example, the main control circuit 90, the stepping motor) to be changed and the detection of the start operation by the start operation detecting means. A determination means (for example, a main control circuit 90) and a stop operation detection means (for example, a main control circuit 90, a stop switch board) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means, the rotation of the reel is stopped to cause the symbol display means. Whether or not to give a privilege (for example, stock of the number of sets in the ART state) to the player and the reel stop control means (for example, the main control circuit 90, the stepping motor) for stopping the fluctuation of the displayed symbol. , And a privilege determining means (for example, the main control circuit 90) for determining the size of the privilege (for example, the rank of the ART state) when granting, and determining that the privilege determining means determines to grant the privilege. When the privilege granting means (for example, the main control circuit 90) for granting the privilege of the size and the privilege determining means decide to grant the privilege, the right to receive the privilege is stored and the privilege granting means is stored. A right management means (for example, main control circuit 90, main RAM 103) that erases one of the rights when the privilege is granted, and a probability that the privilege determining means determines that the privilege is granted when a predetermined condition is satisfied. Shifts the gaming state to a high probability state (for example, CZ), and when the remaining gaming period of the high probability state reaches a threshold value, the state control means (for example, the main control circuit 90) ends the high probability state. , The privilege determining means determines to grant the privilege with a different probability depending on the remaining gaming period of the high probability state, and the high probability state in which the right is stored in the right management means. When it is decided to grant the privilege during, and before the right management means A gaming machine characterized in that the tendency of the size of the privilege determined to be granted differs between the case where the privilege is determined to be granted during the high probability state in which the writing right is not stored.

Further, the privilege determining means is relatively higher when the remaining gaming period in the high-probability state is shorter than the predetermined period than when the remaining gaming period in the high-probability state is longer than the predetermined period. It may be decided to grant the above-mentioned privilege with a probability,
Further, the privilege determining means is relatively higher when the remaining gaming period in the high-probability state is longer than the predetermined period than when the remaining gaming period in the high-probability state is shorter than the predetermined period. It may be decided to grant the above-mentioned privilege with a probability.

In order to solve the 19th problem, the present invention provides a 35th gaming machine having the following configuration.

A normal state (for example, a normal state), an advantageous state (for example, an ART state) that is more advantageous to the player than the normal state, and a high probability state (for example, an ART state) that has a higher probability of shifting to the advantageous state than the normal state (for example). For example, in a gaming machine having a CZ), a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed and a part of a plurality of symbols displayed on the reels are displayed. For detecting the start operation by the symbol display means (for example, the reel display window 4), the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player, and the start operation detecting means. Correspondingly, from among a plurality of combinations depending on the symbol changing means (for example, the main control circuit 90, the stepping motor) that changes the symbol by rotating the reel and the detection of the start operation by the start operation detection means. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination with a predetermined probability, and a stop operation that is provided corresponding to the plurality of reels and detects a stop operation for stopping each reel. The above, depending on the detection means (for example, the main control circuit 90, the stop switch board 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means. A reel stop control means (for example, a main control circuit 90, a stepping motor) that stops the fluctuation of the symbol displayed on the symbol display means by stopping the rotation of the reel, and whether or not to shift to the advantageous state. When the transition determination means (for example, the main control circuit 90) to be determined and the transition determination means determine to transition to the advantageous state, a plurality of modes (for example, the rank of the ART state or the rank) having different probabilities of granting the privilege are used. When it is determined that the mode determining means (for example, the main control circuit 90) for determining one mode from the determined lottery state) and the transition determining means shift to the advantageous state, the gaming state shifts to the advantageous state. When the first termination condition is satisfied during the advantageous state, the advantageous state control means (for example, the main control circuit 90) for terminating the advantageous state and the one mode determined by the mode determining means are used. It is determined that the privilege granting means (for example, the main control circuit 90) for granting a privilege (for example, adding the number of CZ games or granting the number of navigation high-accuracy games) and the transition determining means shift to the advantageous state during the state. Then, the right to shift to the advantageous state is memorized, and the advantageous state is stored. When the control means shifts the gaming state to the advantageous state, the right management means (for example, the main control circuit 90, the main RAM 103) that erases one of the rights, and when a predetermined condition is satisfied, the gaming state is changed to the high probability state. A high-probability state control means (for example, the main control circuit 90) that terminates the high-probability state when the second end condition is satisfied during the transition and the high-probability state is provided, and the mode determination means has the right. In the high-probability state in which the right is not stored in the right management means, as compared with the case where the transition determination means decides to shift to the advantageous state during the high-probability state in which the right is stored in the management means. A gaming machine characterized in that, when the transition determining means determines to transition to the advantageous state, a mode having a relatively high probability of granting a privilege is determined as the one mode.

Further, when the advantageous state control means determines that the transition determining means shifts to the advantageous state during the high probability state, the gaming state shifts from the high probability state to the advantageous state, and the high probability state control means shifts to the advantageous state. When the gaming state shifts to the advantageous state during the high probability state, the high probability state is interrupted until the advantageous state ends, and the high probability state is restarted with the end of the advantageous state. The second end condition, which is a condition for ending the high-probability state, is that the remaining gaming period of the high-probability state reaches a threshold value, and the privilege-giving means responds to the one mode during the advantageous state. , The privilege of extending the remaining gaming period in the high probability state by a predetermined period may be given.

According to the 32nd to 35th gaming machines of the present invention having the above configuration, it is possible to prevent the player from being given an excessive privilege.

[36th to 37th gaming machines]
As an AT (ART) machine, Japanese Patent Application Laid-Open No. 2014-036725 describes a gaming machine provided with a high-probability winning zone (hereinafter referred to as “chance zone”) of an AT having a high expectation of winning an AT. There is. According to such a gaming machine, it is possible to set a difference in the winning probability of the AT between the game in the non-chance zone and the game in the chance zone, and the winning probability of the AT is not uniform and the game I was able to enhance the interest.

However, in the above-mentioned gaming machine, when the AT is won, the AT game is started after the transition to the high RT state. Therefore, if the AT is won with the number of chance zone games remaining, there is no remaining chance zone. It was treated as if it was a game, and it was not possible to receive an advantageous lottery for the number of games in the remaining chance zone, which gave the player a sense of loss and could reduce the interest of the game.

The present invention has been made to solve the twentieth problem, and a twentieth object of the present invention is to provide a gaming machine capable of suppressing a decrease in the interest of a game.

In order to solve the twentieth problem, the present invention provides a thirty-sixth gaming machine having the following configuration.

A gaming machine having a normal state (for example, a normal state) and a high probability state (for example, CZ) having a higher probability of determining that a privilege is given to a player than the normal state, and has a plurality of symbols. Is displayed by a plurality of reels (for example, reels 3L, 3C, 3R), a symbol display means for displaying a part of the plurality of symbols displayed on the reel (for example, a reel display window 4), and a player. A symbol that changes the symbol by rotating the reel according to the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation and the detection of the start operation by the start operation detecting means. An internal winning combination determining means (for example, a main control circuit 90, a stepping motor) and an internal winning combination determining means for determining an internal winning combination from a plurality of combinations according to detection of a start operation by the start operation detecting means (for example, a main control circuit 90, a stepping motor). For example, a main control circuit 90) and a stop operation detecting means (for example, a main control circuit 90, a stop switch board 80) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. , The internal winning combination determined by the internal winning combination determining means and the timing at which the stop operation is detected by the stop operation detecting means are displayed on the symbol display means by stopping the rotation of the reel. It is determined whether or not the reel stop control means (for example, the main control circuit 90, the stepping motor) for stopping the fluctuation of the symbol and the privilege (for example, the stock of the number of sets in the ART state) are given to the player. When the grant determination means (for example, the main control circuit 90) and the grant determination means determine to grant the privilege, the privilege granting means (for example, the main control circuit 90) for granting the privilege and the grant determination means When it is decided to grant the privilege, the right to receive the privilege is stored, and when the privilege granting means grants the privilege, the privilege management means (for example, main control circuit 90, main) which erases one of the rights. RAM103) and a state control means (for example, a main control circuit 90) that shifts the gaming state to the high probability state when a predetermined condition is satisfied and ends the high probability state when the end condition is satisfied during the high probability state. ), And when the state control means determines that the grant determination means grants the privilege during the high probability state, the privilege is granted until the privilege is granted (for example, until the ART state ends). After interrupting the high probability state and granting the above benefits (eg, After the end of the ART state), the high-probability state is restarted, and when the end condition is satisfied during the high-probability state, the privilege management means does not store the right. A gaming machine characterized in that it is determined that the privilege is granted with a higher probability than the normal state in the next game after the game in which the high probability state is completed.

In order to solve the twentieth problem, the present invention provides a thirty-seven gaming machine having the following configuration.

A gaming machine having a normal state (for example, a normal state) and a high probability state (for example, CZ) having a higher probability of determining that a privilege is given to a player than the normal state, and has a plurality of symbols. Is displayed by a plurality of reels (for example, reels 3L, 3C, 3R), a symbol display means for displaying a part of the plurality of symbols displayed on the reel (for example, a reel display window 4), and a player. A symbol that changes the symbol by rotating the reel according to the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation and the detection of the start operation by the start operation detecting means. An internal winning combination determining means (for example, a main control circuit 90, a stepping motor) and an internal winning combination determining means for determining an internal winning combination from a plurality of combinations according to detection of a start operation by the start operation detecting means (for example, a main control circuit 90, a stepping motor). For example, a main control circuit 90) and a stop operation detecting means (for example, a main control circuit 90, a stop switch board 80) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. , The internal winning combination determined by the internal winning combination determining means and the timing at which the stop operation is detected by the stop operation detecting means are displayed on the symbol display means by stopping the rotation of the reel. It is determined whether or not the reel stop control means (for example, the main control circuit 90, the stepping motor) for stopping the fluctuation of the symbol and the privilege (for example, the stock of the number of sets in the ART state) are given to the player. The granting determination means (for example, the main control circuit 90) and the privilege granting means (for example, the main control circuit 90) for granting the privilege when the grant determination means determines to grant the privilege satisfy predetermined conditions. The state control means (for example, the main control circuit 90) that shifts the gaming state to the high probability state and ends the high probability state when the remaining gaming period of the high probability state reaches the threshold, and the privilege granting means. When the privilege is given, the high-probability state adding means (for example, the main control circuit 90) for adding a predetermined period as the remaining gaming period of the high-probability state is provided, and the granting determining means ends the high-probability state. When it is determined that the privilege is given with a higher probability than the normal state in the next game of the game, and the state control means determines that the grant determination means grants the privilege during the high probability state, the privilege is given. The high probability state is interrupted until the grant is made (for example, until the ART state ends). At the same time, after the privilege is granted (for example, after the ART state ends), the high-probability state is restarted, and the grant determination means is used in the next game of the game in which the high-probability state ends. When the privilege is granted due to the decision to grant the privilege, the high-probability state in which the predetermined period added by the high-probability state adding means is the remaining gaming period after the privilege is granted. A gaming machine characterized by starting.

According to the 36th and 37th gaming machines of the present invention having the above configuration, it is possible to suppress a decrease in the interest of the game.

[38th-40th gaming machines]
As an AT (ART) machine, a gaming machine provided with a high-probability winning zone (hereinafter referred to as “chance zone”) of an AT having a high expectation of winning an AT is known. For example, Japanese Patent Application Laid-Open No. 2015-000141. In the gazette, during the chance zone, a strong rare role (strong watermelon or strong cherry) was determined as an internal winning role compared to a case where a weak rare role (weak watermelon or weak cherry) was determined as an internal winning role. A game machine in which the probability of winning the AT is higher in the case is described. According to such a gaming machine, by winning a strong rare role in the chance zone, it is possible to expect to win the AT lottery, so that the interest of the game can be enhanced.

However, in the above-mentioned gaming machines, although there is a difference in the winning probability of the AT lottery depending on the strength of the winning combination, the performance of the AT itself is the same regardless of the winning combination at the time of the AT winning. Later games were standardized, and there was a risk that the interest of the games would decline.

The present invention has been made to solve the 21st problem, and a 21st object of the present invention is to provide a gaming machine capable of suppressing a decrease in the interest of a game.

In order to solve the 21st problem, the present invention provides a 38th gaming machine having the following configuration.

A normal state (for example, a normal state), an advantageous state (for example, an ART state) that is more advantageous to the player than the normal state, and a high probability state (for example, an ART state) that has a higher probability of shifting to the advantageous state than the normal state (for example). For example, in a gaming machine having a CZ), a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed and a part of a plurality of symbols displayed on the reels are displayed. For detecting the start operation by the symbol display means (for example, the reel display window 4), the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player, and the start operation detecting means. Correspondingly, from among a plurality of combinations depending on the symbol changing means (for example, the main control circuit 90, the stepping motor) that changes the symbol by rotating the reel and the detection of the start operation by the start operation detection means. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination with a predetermined probability, and a stop operation that is provided corresponding to the plurality of reels and detects a stop operation for stopping each reel. The above, depending on the detection means (for example, the main control circuit 90, the stop switch board 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means. A reel stop control means (for example, a main control circuit 90, a stepping motor) that stops the fluctuation of the symbol displayed on the symbol display means by stopping the rotation of the reel, and whether or not to shift to the advantageous state. The transition determining means for determining (for example, the main control circuit 90), the transition determining means for determining whether or not to transition to the advantageous state (for example, the main control circuit 90), and the transition determining means transition to the advantageous state. Then, the mode determination means (for example, the main control circuit 90) for determining one mode from a plurality of modes (for example, the lottery state or rank of the ART state) having different probabilities of granting the privilege and the transition determination are made. When it is determined that the means shifts to the advantageous state, the gaming state shifts to the advantageous state, and when the first termination condition is satisfied during the advantageous state, the advantageous state control means (for example, a main control circuit) that terminates the advantageous state. 90) and the privilege giving means (for example, adding the number of CZ games and giving the number of highly accurate navigation games) during the advantageous state according to the one mode determined by the mode determining means (for example). For example, when the main control circuit 90) and a predetermined condition are satisfied, the gaming state is shifted to the high probability state. The high-probability state control means (for example, the main control circuit 90) that ends the high-probability state when the second end condition is satisfied during the high-probability state, and the transition determination means is the high-probability state. In the process, it is determined whether or not to shift to the advantageous state according to the internal winning combination determined by the internal winning combination determining means, and the mode determining means shifts to the advantageous state when the transition determining means shifts to the advantageous state. A gaming machine characterized in that the one mode is determined according to the internal winning combination in the determined game.

Further, when the advantageous state control means determines that the transition determining means shifts to the advantageous state during the high probability state, the gaming state shifts from the high probability state to the advantageous state, and the high probability state control means shifts to the advantageous state. When the gaming state shifts to the advantageous state during the high-probability state, the high-probability state is interrupted until the advantageous state ends, and the high-probability state is restarted with the end of the advantageous state. The second end condition, which is a condition for ending the high-probability state, is that the remaining gaming period of the high-probability state reaches a threshold value, and the privilege-giving means responds to the one mode during the advantageous state. It may be characterized in that the privilege of extending the remaining gaming period in the high probability state by a predetermined period is given.

In order to solve the 21st problem, the present invention provides a 39th gaming machine having the following configuration.

A normal state (for example, a normal state), an advantageous state (for example, an ART state) that is more advantageous to the player than the normal state, and a high probability state (for example, an ART state) that has a higher probability of shifting to the advantageous state than the normal state (for example). For example, in a gaming machine having a CZ), a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed and a part of a plurality of symbols displayed on the reels are displayed. For detecting the start operation by the symbol display means (for example, the reel display window 4), the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player, and the start operation detecting means. Correspondingly, from among a plurality of combinations depending on the symbol changing means (for example, the main control circuit 90, the stepping motor) that changes the symbol by rotating the reel and the detection of the start operation by the start operation detection means. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination with a predetermined probability, and a stop operation that is provided corresponding to the plurality of reels and detects a stop operation for stopping each reel. The above, depending on the detection means (for example, the main control circuit 90, the stop switch board 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means. A reel stop control means (for example, a main control circuit 90, a stepping motor) that stops the fluctuation of the symbol displayed on the symbol display means by stopping the rotation of the reel, and whether or not to shift to the advantageous state. When the transition determining means (for example, the main control circuit 90) to be determined and the transition determining means determine to transition to the advantageous state, the mode in the advantageous state (for example, the lottery state in the ART state) is determined. The mode determination information determining means (for example, the main control circuit 90) for determining one mode determination information from a plurality of mode determination information (for example, the rank at the time of winning ART) and the transition determination means shift to the advantageous state. Then, when the gaming state is shifted to the advantageous state and the first termination condition is satisfied during the advantageous state, the advantageous state control means (for example, the main control circuit 90) that terminates the advantageous state and the gaming state are changed. In the first game that shifts to the advantageous state, a mode in which one mode is determined from a plurality of modes having different probabilities of granting a privilege according to the one mode determination information determined by the mode determination information determining means. The determination means (for example, the main control circuit 90) and the mode determination means are determined. A privilege granting means (for example, a main control circuit 90) for granting a privilege (for example, adding a number of CZ games or granting a number of highly accurate navigation games) during the advantageous state according to the determined one mode. A high-probability state control means (for example, a main control circuit 90) that shifts the gaming state to the high-probability state when a predetermined condition is satisfied and ends the high-probability state when the second end condition is satisfied during the high-probability state. ) And the mode determination information determining means, when the mode determination information is determined, the effect means for suggesting the one mode determination information determined in the game (for example, display device 11, sub-control circuit 200). The transition determination means determines whether or not to shift to the advantageous state according to the internal winning combination determined by the internal winning combination determining means during the high probability state, and the mode. The determination information determining means is a gaming machine characterized in that the one mode determination information is determined according to the internal winning combination in the game in which the transition determining means has determined to transition to the advantageous state.

In order to solve the 21st problem, the present invention provides a 40th gaming machine having the following configuration.

A plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed, a symbol display means (for example, a reel display window 4) for displaying a part of the plurality of symbols displayed on the reels, and the like. The symbol is rotated by rotating the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player and the start operation detected by the start operation detecting means. An internal winning combination that determines an internal winning combination with a predetermined probability from a plurality of combinations according to a symbol changing means (for example, a main control circuit 90, a stepping motor) to be changed and a start operation detected by the start operation detecting means. A determining means (for example, a main control circuit 90) and a stop operation detecting means (for example, a main control circuit 90, a stop switch board) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means, the rotation of the reel is stopped to cause the symbol display means. Reel stop control means (for example, main control circuit 90, stepping motor) for stopping the fluctuation of the displayed symbol, and whether or not to give a privilege (for example, ART state) to the player, and when giving. The privilege determining means (for example, the main control circuit 90) for determining the size of the privilege (for example, the lottery state or rank in the ART state) and the determined size when the privilege determining means determines to grant the privilege. When the privilege granting means (for example, the main control circuit 90) for granting the privilege and the privilege determining means determine to grant the privilege, the right to receive the privilege is stored and the privilege granting means When the privilege is given, there is a probability that the right management means (for example, main control circuit 90, main RAM 103) that erases one of the rights and the privilege determining means decides to give the privilege when a predetermined condition is satisfied. When the gaming state is shifted to the high probability state (for example, CZ) and the end condition is satisfied during the high probability state, the state control means (for example, the main control circuit 90) that ends the high probability state and a predetermined state. The effect determining means includes an effect means (for example, a display device 11, a sub-control circuit 200) for performing an effect, and the privilege determining means responds to the internal winning combination determined by the internal winning combination determining means during the high probability state. Then, it is decided whether or not to grant the above-mentioned privilege, and one or more in one decision. It is possible to determine to grant the privilege, and the privilege determining means determines the size of the privilege to be granted to each of the plurality of the benefits when it is determined to grant the plurality of the benefits. With respect to at least one of the benefits, the size of the privilege is determined according to the internal winning combination in the game in which the privilege is determined to be granted, and in the staging means, the privilege determining means grants a plurality of the benefits. Then, when it is decided, for the one said privilege whose size of the privilege is determined according to the internal winning combination in the game, an effect suggesting the size of the privilege is performed, and for the other said privilege, the effect is performed. , A gaming machine characterized in that it does not perform an effect suggesting the size of the other benefits.

Further, when the state control means determines that the privilege determining means grants a plurality of the benefits during the high probability state, until the one of the benefits is granted (for example, until the ART state ends). The high-probability state is interrupted, the high-probability state is restarted after the one said privilege is granted (for example, after the end of the ART state), and the privilege-giving means is in the high-probability state. If there is the privilege that has not been granted when the termination condition is satisfied, the privilege that has not been granted may be granted.

According to the 38th to 40th gaming machines of the present invention having the above configuration, it is possible to provide a gaming machine capable of suppressing a decrease in the interest of the game.

[41st to 42nd gaming machines]
As an AT (ART) machine, a gaming machine provided with a high-probability winning zone (hereinafter referred to as “chance zone”) of an AT having a high expectation of winning an AT is known. For example, Japanese Patent Application Laid-Open No. 2015-000141. In the gazette, during the chance zone, a strong rare role (strong watermelon or strong cherry) was determined as an internal winning role compared to a case where a weak rare role (weak watermelon or weak cherry) was determined as an internal winning role. A game machine in which the probability of winning the AT is higher in the case is described. According to such a gaming machine, by winning a strong rare role in the chance zone, it is possible to expect to win the AT lottery, so that the interest of the game can be enhanced.

However, in the above-mentioned gaming machines, although there is a difference in the winning probability of the AT lottery depending on the strength of the winning combination, the performance of the AT itself is the same regardless of the winning combination at the time of the AT winning. Later games were standardized, and there was a risk that the interest of the games would decline.

The present invention has been made to solve the 22nd problem, and a 22nd object of the present invention is to provide a gaming machine capable of suppressing a decrease in the interest of a game.

In order to solve the 22nd problem, the present invention provides a 41st gaming machine having the following configuration.

A gaming machine having a normal state (for example, a normal state) and an advantageous state (for example, an ART state) that is more advantageous to the player than the normal state, and a plurality of reels (for example, an ART state) on which a plurality of symbols are displayed. , Reel 3L, 3C, 3R), a symbol display means for displaying a part of a plurality of symbols displayed on the reel (for example, a reel display window 4), and a start operation detecting means for detecting a start operation by a player. (For example, the main control circuit 90, the start switch 79) and the symbol changing means (for example, the main control circuit 90) that changes the symbol by rotating the reel in response to the detection of the start operation by the start operation detecting means. , Stepping motor), an internal winning combination determining means (for example, the main control circuit 90) that determines an internal winning combination from a plurality of combinations according to the detection of the starting operation by the starting operation detecting means. It is determined by a stop operation detecting means (for example, a main control circuit 90, a stop switch board 80) that is provided corresponding to the plurality of reels and detects a stop operation for stopping each reel, and the internal winning combination determining means. Reel stop to stop the fluctuation of the symbol displayed on the symbol display means by stopping the rotation of the reel according to the internal winning combination and the timing when the stop operation is detected by the stop operation detection means. The control means (for example, the main control circuit 90, the stepping motor), the transition determining means for determining whether or not to shift to the advantageous state (for example, the main control circuit 90), and the transition determining means shift to the advantageous state. Then, one mode determination information (for example, the rank at the time of winning ART) is determined from a plurality of mode determination information for determining the mode in the advantageous state (for example, the lottery state in the ART state). When it is determined that the mode determination information determining means (for example, the main control circuit 90) and the transition determining means shift to the advantageous state, the gaming state shifts to the advantageous state, and when the termination condition is satisfied during the advantageous state, The mode determination information determination means is determined in the advantageous state control means (for example, the main control circuit 90) that terminates the advantageous state and the first game (for example, during the rank determination ART) in which the gaming state shifts to the advantageous state. Mode determination to determine one mode from a plurality of modes having different probabilities of granting benefits (for example, adding the number of CZ games or granting the number of highly accurate navigation games) according to the above-mentioned one mode determination information. The means (for example, the main control circuit 90) and the mode determining means A gaming machine comprising, for example, a privilege giving means (for example, a main control circuit 90) for granting a privilege during the advantageous state according to the determined one mode.

Further, in the game in which the transition determining means determines that the transition determining means shifts to the advantageous state, the mode determining information determining means obtains the one mode determining information according to the internal winning combination determined by the internal winning combination determining means. The mode determining means may determine the one mode according to the internal winning combination determined by the internal winning combination determining means in the first game in which the gaming state shifts to the advantageous state. good.

In order to solve the 22nd problem, the present invention provides a 42nd gaming machine having the following configuration.

A normal state (for example, a normal state), an advantageous state (for example, an ART state) that is more advantageous to the player than the normal state, and a high probability state (for example, an ART state) that has a higher probability of shifting to the advantageous state than the normal state (for example). For example, a gaming machine having a CZ), which has a normal state (for example, a normal state) and an advantageous state (for example, an ART state) that is more advantageous to the player than the normal state. , A plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed, and a symbol display means (for example, a reel display window 4) for displaying a part of the plurality of symbols displayed on the reels. , The symbol by rotating the reel in response to the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player and the detection of the start operation by the start operation detecting means. The internal winning combination is determined with a predetermined probability from a plurality of combinations according to the detection of the starting operation by the symbol changing means (for example, the main control circuit 90, the stepping motor) and the starting operation detecting means. A combination determining means (for example, a main control circuit 90) and a stop operation detecting means (for example, a main control circuit 90, a stop switch) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. The symbol display means by stopping the rotation of the reel according to the substrate 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means. Reel stop control means (for example, main control circuit 90, stepping motor) for stopping the fluctuation of the symbol displayed on the above, and transition determination means (for example, main control circuit 90) for determining whether or not to shift to the advantageous state. ), And when the transition determination means determines to transition to the advantageous state, one mode determination is made from a plurality of mode determination information for determining the mode in the advantageous state (for example, the lottery state in the ART state). When the mode determination information determining means (for example, the main control circuit 90) for determining the information (for example, the rank at the time of winning ART) and the transition determining means determine to shift to the advantageous state, the gaming state shifts to the advantageous state. Then, when the termination condition is satisfied during the advantageous state, the advantageous state control means (for example, the main control circuit 90) that terminates the advantageous state and the mode determination information determining means determine the one mode determination information. Benefits (for example, during rank determination ART) in later games (for example, during rank determination ART) For example, a mode determination means (for example,) for determining one mode from a plurality of modes having different probabilities of adding the number of CZ games or granting the number of navigation high-accuracy games according to the one mode determination information. , The main control circuit 90), the privilege granting means (for example, the main control circuit 90) that grants the privilege during the advantageous state according to the one mode determined by the mode determining means, and a predetermined condition are satisfied. And a high-probability state control means (for example, a main control circuit 90) that shifts the gaming state to the high-probability state and ends the high-probability state when the remaining gaming period of the high-probability state reaches a threshold value. When the advantageous state control means determines that the transition determining means shifts to the advantageous state during the high probability state, the gaming state shifts from the high probability state to the advantageous state, and the high probability state control means shifts to the advantageous state. When the gaming state shifts to the advantageous state during the high-probability state, the high-probability state is interrupted until the advantageous state ends, and the high-probability state is restarted with the end of the advantageous state. The granting means grants a privilege (for example, an addition of the number of CZ games) to extend the remaining gaming period of the high probability state by a predetermined period during the advantageous state according to the one mode during the advantageous state. A game machine characterized by that.

Further, in the game in which the transition determining means determines that the transition determining means shifts to the advantageous state, the mode determining information determining means obtains the one mode determining information according to the internal winning combination determined by the internal winning combination determining means. The mode determining means determines, and in a game after the game in which the mode determining information determining means determines the one mode determining information, the mode determining means responds to the internal winning combination determined by the internal winning combination determining means. The mode may be determined.

According to the 41st to 42nd gaming machines of the present invention having the above configuration, it is possible to suppress a decrease in the interest of the game.

[43rd to 44th gaming machines]
Further, in recent years, a gaming machine having a low RT state in which replay is established with a low probability and a high RT state in which a replay is established with a high probability, and having a so-called ART function for notifying information advantageous to the player in the high RT state has been introduced. Are known. As a gaming machine having such an ART function, Japanese Patent Application Laid-Open No. 2012-176104 states that the RT state is shifted to the high RT state by winning a promotion replay, and the RT state is not changed to the low RT state in the high RT state. A gaming machine that can receive medals while maintaining a high RT state by notifying information for avoiding winning a profit symbol is described. According to such a gaming machine, it is possible to enhance the interest of the game by providing a difference in the payout of medals between the ART game and the non-ART game.

In such a gaming machine, if the promotion replay can be won by oneself even in the situation where the ART is not won, the machine shifts to the high RT state, but in the non-ART game, the disadvantageous symbol winning is avoided. Because it is difficult to do so, it immediately falls to a low RT state, so it was not possible to enhance the interest if the RT state could be changed on its own.

The present invention has been made to solve the above-mentioned 23rd problem, and a 23rd object of the present invention is to provide a gaming machine capable of enhancing the interest of gaming with the transition of the RT state. be.

In order to solve the 23rd problem, the present invention provides a 43rd gaming machine having the following configuration.

A plurality of gaming machines having at least a first RT state (for example, RT4 state) and a second RT state (for example, RT5 state) as RT states having different probabilities that the replay related to the replay is determined as an internal winning combination. A plurality of reels (for example, reels 3L, 3C, 3R) on which the symbols of 1 are displayed, a symbol display means (for example, a reel display window 4) for displaying a part of the plurality of symbols displayed on the reels, and a game. The symbol is changed by rotating the reel according to the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the person and the detection of the start operation by the start operation detecting means. Internal winning combination determination with a predetermined probability from a plurality of combinations according to the symbol changing means (for example, the main control circuit 90, the stepping motor) and the detection of the starting operation by the starting operation detecting means. Means (for example, main control circuit 90) and stop operation detecting means (for example, main control circuit 90, stop switch board 80) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. ), And the internal winning combination determined by the internal winning combination determining means and the timing at which the stop operation is detected by the stop operation detecting means are displayed on the symbol display means by stopping the rotation of the reel. A reel stop control means (for example, a main control circuit 90, a stepping motor) for stopping the fluctuation of the symbol, and a first symbol combination (for example, a symbol display means) with the symbol display means when the rotation of the reel is stopped in the first RT state (for example). For example, when the abbreviation "strong chance lip (RT5 transition symbol)") is stopped and displayed, the RT transition means (for example, the main control circuit 90) that shifts the RT state to the second RT state and the player When the granting determination means (for example, the main control circuit 90) for determining whether or not to grant the privilege (for example, the ART state) and the grant determination means determine to grant the privilege, the privilege is given to the player. The privilege granting means (for example, the main control circuit 90) to be granted is provided, and the plurality of combinations are the first, depending on the mode of the stop operation detected by the stop operation detecting means when the internal winning combination is determined. The first combination (for example, "F_3 selective promotion lip") capable of stopping and displaying the symbol combination of 1 or the second symbol combination (for example, "C_CU lip"), and the third combination when determined as an internal winning combination. A second role (for example, "F_") capable of stopping and displaying a symbol combination (for example, abbreviated as "7-matched lip") 7 rip ") is included, and the internal winning combination determining means can determine the second winning combination as an internal winning combination in the second RT state with a higher probability than in the first RT state, and the granting determining means is When the third symbol combination is stopped and displayed when the second combination is determined as the internal winning combination, it is determined that the privilege is given to the player, and the first combination is used as the internal winning combination. A gaming machine characterized in that when the first symbol combination is stopped and displayed when the determination is made, it is determined that the privilege is given to the player with a predetermined probability.

Further, the second combination is the third symbol combination or the fourth symbol combination (for example, abbreviated as "fake clip") depending on the mode of the stop operation detected by the stop operation detecting means when the internal winning combination is determined. ) Can be stopped and displayed, and the notification determining means (for example, the main control circuit 90) for determining whether or not to start the notification state for notifying the player of the mode of the stop operation, and the notification determining means are described above. When it is determined to start the notification state, the normal time notification control means (for example, the main control circuit 90) which starts the notification state, and when the first combination is determined as the internal winning combination during the notification state, the above When the mode of the stop operation required for the first symbol combination to be stopped and displayed is notified, and when the second combination is determined as the internal winning combination during the notification state, the third symbol combination is released. It may be further provided with a notification means (for example, a main control circuit 90, a sub control circuit 200) for notifying the mode of the stop operation required for the stop display.

Further, the gaming machine has at least a first RT state (for example, RT4 state) and a second RT state (for example, RT5 state) as RT states in which the probability that the replay related to the replay is determined as the internal winning combination is different. , A plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed, and a symbol display means (for example, a reel display window 4) for displaying a part of the plurality of symbols displayed on the reels. , The symbol by rotating the reel in response to the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player and the detection of the start operation by the start operation detecting means. The internal winning combination is determined with a predetermined probability from a plurality of combinations according to the detection of the starting operation by the symbol changing means (for example, the main control circuit 90, the stepping motor) and the starting operation detecting means. A combination determining means (for example, a main control circuit 90) and a stop operation detecting means (for example, a main control circuit 90, a stop switch) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. The symbol display means by stopping the rotation of the reel according to the substrate 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means. A reel stop control means (for example, a main control circuit 90, a stepping motor) for stopping the fluctuation of the symbol displayed on the symbol, and a first symbol on the symbol display means due to the rotation stop of the reel in the first RT state. When the combination (for example, abbreviated as "strong chance lip (RT5 transition symbol)") is stopped and displayed, the RT transition means (for example, the main control circuit 90) that shifts the RT state to the second RT state and the player When the granting determination means (for example, the main control circuit 90) for determining whether or not to grant the privilege (for example, the ART state) and the grant determination means determine to grant the privilege, the player is informed of the above. The privilege granting means (for example, the main control circuit 90) for granting the privilege is provided, and the plurality of combinations correspond to the mode of the stop operation detected by the stop operation detecting means when the internal winning combination is determined. When the first symbol combination or the second symbol combination (for example, "C_CU lip") can be stopped and displayed as the first combination (for example, "F_3 selective promotion lip") and the internal winning combination are determined. Regardless of the mode of the stop operation, the third symbol combination (for example, the abbreviation "7-matched lip" is always used. ”) Is included, and the internal winning combination determining means internally includes the second combination in the second RT state with a higher probability than in the first RT state. The winning combination can be determined, and the granting determination means determines that when the second combination is determined as the internal winning combination, the privilege is given to the player, and the first combination is the internal winning combination. When the first symbol combination is stopped and displayed, the gaming machine may be characterized in that it is determined that the privilege is given to the player with a predetermined probability.

Further, it is determined that the notification determination means (for example, the main control circuit 90) for determining whether or not to start the notification state for notifying the player of the mode of the stop operation and the notification determination means start the notification state. Then, when the normal time notification control means (for example, the main control circuit 90) that starts the notification state and the first combination are determined as the internal winning combination during the notification state, the first symbol combination is obtained. It may be further provided with a notification means (for example, a main control circuit 90, a sub control circuit 200) for notifying the mode of the stop operation required for the stop display.

In order to solve the 23rd problem, the present invention provides a 43rd gaming machine having the following configuration.

A plurality of gaming machines having at least a first RT state (for example, RT4 state) and a second RT state (for example, RT5 state) as RT states having different probabilities that the replay related to the replay is determined as an internal winning combination. A plurality of reels (for example, reels 3L, 3C, 3R) on which the symbols of 1 are displayed, a symbol display means (for example, a reel display window 4) for displaying a part of the plurality of symbols displayed on the reels, and a game. The symbol is changed by rotating the reel according to the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the person and the detection of the start operation by the start operation detecting means. Internal winning combination determination with a predetermined probability from among a plurality of combinations according to the symbol changing means (for example, the main control circuit 90, the stepping motor) and the detection of the starting operation by the starting operation detecting means. Means (for example, main control circuit 90) and stop operation detecting means (for example, main control circuit 90, stop switch board 80) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. ), And the internal winning combination determined by the internal winning combination determining means and the timing at which the stop operation is detected by the stop operation detecting means are displayed on the symbol display means by stopping the rotation of the reel. A reel stop control means (for example, a main control circuit 90, a stepping motor) for stopping the fluctuation of the symbol, and a first symbol combination (for example, a symbol display means) with the symbol display means when the rotation of the reel is stopped in the first RT state (for example). For example, when the abbreviation "strong chance lip (RT5 transition symbol)") is stopped and displayed, the RT state is shifted to the second RT state, and in the second RT state, the symbol display means is subjected to a third symbol combination (for example,). , Abbreviation "Koyama replay (RT4 transition symbol)") is stopped and displayed, the RT transition means (for example, the main control circuit 90) that shifts the RT state to the first RT state, and a privilege (for example) for the player. , ART state or CZ) is granted to the player when the granting determination means (for example, the main control circuit 90) and the grant determination means determine to grant the privilege. A privilege giving means (for example, a main control circuit 90) is provided, and the plurality of combinations include the first stop operation according to the mode of the stop operation detected by the stop operation detection means when the internal winning combination is determined. Symbol combination or second symbol combination (for example, "C_CU lip") The first combination (for example, "F_3 selection promotion lip") capable of stopping and displaying, and the third symbol combination according to the mode of the stop operation detected by the stop operation detecting means when determined as the internal winning combination. Alternatively, a second combination (for example, "F_6 selective fall lip") capable of stopping and displaying the fourth symbol combination (for example, "C_CU lip") is included, and the grant determination means is said to be said during the second RT state. When it is determined that the privilege is given to the player with a higher probability than in the first RT state, and when the first combination is determined as the internal winning combination, the first symbol combination is stopped and displayed. , It is determined that the privilege is given to the player with a predetermined probability, and when the second combination is determined as the internal winning combination, the third symbol combination is stopped and displayed. A gaming machine characterized in that it is determined that the privilege is given to a player with a higher probability than when the symbol combination is stopped and displayed.

Further, it is determined that the notification determination means (for example, the main control circuit 90) for determining whether or not to start the notification state for notifying the player of the mode of the stop operation and the notification determination means start the notification state. Then, when the normal time notification control means (for example, the main control circuit 90) that starts the notification state and the first combination are determined as the internal winning combination during the notification state, the first symbol combination is obtained. The mode of the stop operation required for the stop display is notified, and when the second combination is determined as the internal winning combination during the notification state, the fourth symbol combination is stopped and displayed. A notification means (for example, a main control circuit 90, a sub control circuit 200) for notifying a necessary stop operation mode may be further provided.

According to the 43rd to 44th gaming machines of the present invention having the above configuration, it is possible to enhance the interest of the game with the transition of the RT state.

[45th to 47th gaming machines]
As an AT (ART) machine, Japanese Patent Application Laid-Open No. 2014-036725 describes a gaming machine provided with a high-probability winning zone (hereinafter referred to as “chance zone”) of an AT having a high expectation of winning an AT. There is. In this gaming machine, during the non-chance zone, there is a low probability of winning the ART lottery when winning a specific role (rare role such as watermelon or cherry), and during the chance zone, there is a high probability of winning the ART lottery when winning the specific role. Since it is a winning, it is possible to have an expectation that the ART lottery will be won when a specific winning combination is established.

However, in the above-mentioned gaming machine, even if a specific winning combination is frequently won in a short period of time, the ART lottery is simply performed for each winning of the specific combination, and the fact that the specific combination is frequently won is nothing. I couldn't even have the expectation of.

The present invention has been made to solve the above-mentioned twenty-fourth problem, and the twenty-fourth object of the present invention is to provide a gaming machine capable of having a sense of expectation when a specific combination is consecutive. be.

In order to solve the 24th problem, the present invention provides a 45th gaming machine having the following configuration.

A plurality of gaming machines having at least a first RT state (for example, RT2 state) and a second RT state (for example, RT3 state) as RT states having different probabilities that the replay related to the replay is determined as an internal winning combination. A plurality of reels (for example, reels 3L, 3C, 3R) on which the symbols of 1 are displayed, a symbol display means (for example, a reel display window 4) for displaying a part of the plurality of symbols displayed on the reels, and a game. The symbol is changed by rotating the reel according to the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the person and the detection of the start operation by the start operation detecting means. Internal winning combination determination with a predetermined probability from a plurality of combinations according to the symbol changing means (for example, the main control circuit 90, the stepping motor) and the detection of the starting operation by the starting operation detecting means. Means (for example, main control circuit 90) and stop operation detecting means (for example, main control circuit 90, stop switch board 80) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel. ), And the internal winning combination determined by the internal winning combination determining means and the timing at which the stop operation is detected by the stop operation detecting means are displayed on the symbol display means by stopping the rotation of the reel. A specific symbol combination (for example, a combination of a reel stop control means (for example, a main control circuit 90, a stepping motor) for stopping the fluctuation of the symbol and a symbol display means with the rotation stop of the reel in the first RT state (for example). When the abbreviated "weak chelip" symbol combination) is stopped and displayed, the RT state is shifted to the second RT state, and in the second RT state, the symbol combination stopped and displayed on the symbol display means is other than the other. RT transition means (for example, main control circuit 90) that shifts to another RT state when a predetermined number of games are played without shifting to the RT state, and a privilege (for example, ART state) for the player. When the granting determination means (for example, the main control circuit 90) for determining whether or not to grant the privilege and the grant determination means determine to grant the privilege, the privilege granting means for granting the privilege to the player (for example, for example). The main control circuit 90) and the plurality of combinations include a specific combination (for example, "F_weak chelip") capable of stopping and displaying the specific symbol combination when the internal winning combination is determined. , The specific combination is internally assigned to the grant determination means during the first RT state. When it is determined as a lottery combination, it is determined that the privilege is given to the player, and the privilege granting means determines that the granting determination means grants the privilege according to the specific combination in the first RT state. After the RT transition means shifts the RT state from the second RT state to another RT state, the privilege is given to the player, and the internal winning combination determining means is said in the second RT state. A gaming machine characterized in that the specific combination can be determined as an internal winning combination with a higher probability than the probability of determining the specific combination as an internal winning combination during the first RT state.

Further, the grant determination means may determine that the privilege is not granted to the player when the specific combination is determined as the internal winning combination during the second RT state.
Further, when the specific combination is determined as the internal winning combination during the second RT state, it may be determined that the player is given a privilege with a specific probability.

In order to solve the 24th problem, the present invention provides a 46th gaming machine having the following configuration.

The RT states in which the probability that the replay related to the replay is determined as the internal winning combination are different are the first RT state (for example, RT1 state), the second RT state (for example, RT2 state), and the third RT state (for example, RT3 state). A plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed, and a symbol display means (for example, a symbol display means for displaying a part of the plurality of symbols displayed on the reels). For example, the reel display window 4), the start operation detecting means for detecting the start operation by the player (for example, the main control circuit 90, the start switch 79), and the start operation being detected by the start operation detecting means. A symbol changing means (for example, a main control circuit 90, a stepping motor) that changes the symbol by rotating a reel, and a predetermined probability from a plurality of combinations depending on the detection of the start operation by the start operation detecting means. An internal winning combination determining means (for example, a main control circuit 90) for determining an internal winning combination, and a stop operation detecting means (for example, a stop operation detecting means provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel). , Main control circuit 90, stop switch board 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means. The reel stop control means (for example, main control circuit 90, stepping motor) that stops the fluctuation of the symbol displayed on the symbol display means by stopping, and the reel stop rotation stop in the second RT state. When a specific symbol combination (for example, a symbol combination related to the abbreviation "weak chelip") is stopped and displayed on the symbol display means, the RT state is shifted to the third RT state, while the reel is in the first RT state. Even if the specific symbol combination is stopped and displayed on the symbol display means due to the stop of rotation, the RT state is maintained in the first RT state, and in the third RT state, the symbol display means is stopped and displayed. In the symbol combination, the RT transition means (for example, the main control circuit 90) that shifts to another RT state when a predetermined number of games are played without shifting to another RT state, and the RT transition means are the second RT. Granting determination means (for example, main control circuit 90) for determining whether or not to grant a privilege (for example, ART state) to a player according to the transition of the RT state from the state to the third RT state. And the grant determination means grants the privilege Then, when it is determined, the privilege granting means (for example, the main control circuit 90) for granting the privilege to the player is provided, and the plurality of combinations have the specific symbol when determined as the internal winning combination. A specific combination capable of stopping and displaying the combination (for example, "F_weak chelip") is included, and the internal winning combination determining means determines the specific combination as the internal winning combination during the first RT state in the third RT state. A gaming machine characterized in that the specific combination can be determined as an internal winning combination with a higher probability than either the probability of playing the game or the probability of determining the specific combination as an internal winning combination during the second RT state.

Further, the grant determination means may determine that the privilege is not granted to the player when the specific combination is determined as the internal winning combination during the third RT state.
Further, the grant determination means may determine that the privilege is granted to the player with a specific probability when the specific combination is determined as the internal winning combination during the third RT state.

In order to solve the 24th problem, the present invention provides a 47th gaming machine having the following configuration.

The RT states in which the probability that the replay related to the replay is determined as the internal winning combination are different are the first RT state (for example, RT2 state), the second RT state (for example, RT3 state), and the third RT state (for example, RT4 state). A plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed, and a symbol display means (for example, a symbol display means for displaying a part of the plurality of symbols displayed on the reels). For example, the reel display window 4), the start operation detecting means for detecting the start operation by the player (for example, the main control circuit 90, the start switch 79), and the start operation being detected by the start operation detecting means. A symbol changing means (for example, a main control circuit 90, a stepping motor) that changes the symbol by rotating a reel, and a predetermined probability from a plurality of combinations depending on the detection of the start operation by the start operation detecting means. An internal winning combination determining means (for example, a main control circuit 90) for determining an internal winning combination, and a stop operation detecting means (for example, a stop operation detecting means provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel). , Main control circuit 90, stop switch board 80), the internal winning combination determined by the internal winning combination determining means, and the timing at which the stop operation is detected by the stop operation detecting means. The reel stop control means (for example, a main control circuit 90, a stepping motor) for stopping the fluctuation of the symbol displayed on the symbol display means by stopping is provided, and the third RT state is the first RT state and the said. The replay is a high RT state in which the probability that the replay is determined as an internal winning combination is higher than that in the second RT state, and the first RT state and the third RT state are stopped and displayed on the symbol display means as the reel stops rotating. It is a symbol transition RT state that shifts to another RT state according to the symbol combination, and the second RT state is a predetermined state without shifting to another RT state in the symbol combination that is stopped and displayed by the symbol display means. It is a game number transition RT state that shifts to another RT state when the number of games is played, and in the symbol transition RT state, a specific symbol combination (for example, a symbol combination related to the abbreviation "weak reel") is used for the symbol display means. ) Is stopped and displayed, the RT state is shifted to the second RT state, and in the symbol transition RT state, a predetermined symbol combination (for example, a symbol combination according to the abbreviation "Koyama Replay") is used in the symbol display means. ) Is stopped and displayed, the above RT transition means (for example, main control circuit 90) that shifts the RT state to the third RT state, and shifts the RT state to another RT state when a predetermined number of games are played in the game number shift RT state. And, according to the fact that the RT transition means shifts the RT state to the second RT state, a grant determination means (for example, an grant determination means) for determining whether or not to grant a privilege (for example, an ART state) to the player. When the main control circuit 90) and the grant determining means determine that the privilege is granted, the player is notified according to the fact that the RT transition means shifts the RT state to the third RT state, which is the high RT state. On the other hand, the privilege granting means (for example, the main control circuit 90) for granting the privilege is further provided, and the specific symbol combination can be stopped and displayed for the plurality of combinations when the internal winning combination is determined. A specific combination (for example, "F_weak chelip") is included, and the internal winning combination determining means has a higher probability of determining the specific combination as an internal winning combination during the first RT state in the second RT state. The gaming machine is characterized in that the specific combination can be determined as an internal winning combination, and in the third RT state, the specific combination cannot be determined as an internal winning combination.

Further, the grant determination means may determine that the privilege is not granted to the player when the specific combination is determined as the internal winning combination during the second RT state.
Further, the grant determination means may determine that the privilege is granted to the player with a specific probability when the specific combination is determined as the internal winning combination during the second RT state.

According to the 45th to 47th gaming machines of the present invention having the above configuration, it is possible to have a sense of expectation when the specific combinations are continuous.

[48th to 51st gaming machines]
Further, in recent years, a gaming machine having a low RT state in which replay is established with a low probability and a high RT state in which a replay is established with a high probability, and having a so-called ART function for notifying information advantageous to the player in the high RT state has been introduced. Are known. As a gaming machine having such an ART function, Japanese Patent Application Laid-Open No. 2012-176104 states that the RT state is shifted to the high RT state by winning a promotion replay, and the RT state is not changed to the low RT state in the high RT state. A gaming machine that can receive medals while maintaining a high RT state by notifying information for avoiding winning a profit symbol is described. According to such a gaming machine, it is possible to enhance the interest of the game by providing a difference in the payout of medals between the ART game and the non-ART game.

By the way, in such a gaming machine, in the high RT state during the non-AT period, if the push order is incorrect, a disadvantageous symbol is displayed and the RT state shifts to the low RT state. Here, the push order is basically unlikely to be correct, such as 6 choices or 3 choices, so even if it is possible to shift to a high RT state during the non-AT period, it will be low immediately thereafter. I fell into the RT state, and the game when the push order was incorrect was monotonous.

The present invention has been made to solve the above-mentioned 25th problem, and a 25th object of the present invention is to provide a gaming machine capable of various controls when a push order is incorrect.

In order to solve the 25th problem, the present invention provides a 48th gaming machine having the following configuration.

A gaming machine having a plurality of RT states having different probabilities that a replay related to a replay is determined as an internal winning combination, and a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed. A symbol display means (for example, a reel display window 4) that displays a part of a plurality of symbols displayed on the reel, and a start operation detection means (for example, a main control circuit 90, a start switch) that detects a start operation by a player. 79), a symbol changing means (for example, a main control circuit 90, a stepping motor) that changes the symbol by rotating the reel in response to the detection of the start operation by the start operation detecting means, and the start operation detection. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination from a plurality of winning combinations according to the detection of a start operation by the means, and the plurality of reels are provided. , The stop operation detecting means (for example, the main control circuit 90, the stop switch board 80) for detecting the stop operation for stopping each reel, the internal winning combination determined by the internal winning combination determining means, and the stop operation detection. A reel stop control means (for example, the main control circuit 90, etc.) that stops the fluctuation of the symbol displayed on the symbol display means by stopping the rotation of the reel according to the timing at which the stop operation is detected by the means. The stepping motor), the RT transition means (for example, the main control circuit 90) that shifts the plurality of RT states according to predetermined conditions, and the reel stop control means among the plurality of combinations. The first symbol combination (for example, the symbol combination according to the abbreviation "RT2 transition symbol") and the second symbol combination (for example, the abbreviation "RT0 transition symbol"" are used according to the order of the stop operation which is the order of stopping the reels. A plurality of push order combinations (eg, push order bells) capable of stopping and displaying a plurality of symbol combinations including a third symbol combination (for example, a symbol combination according to the abbreviation "bell") are included. In the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the order of the stopping operations detected by the stopping operation detecting means is predetermined with respect to the pushing order combination. When the order is determined (for example, the correct answer in the push order), the fluctuation of the symbols is stopped so that the third symbol combination is stopped and displayed on the symbol display means, and the stop operation detecting means detects the first. The type of the reel for which the stop operation is to be stopped is the predetermined order in the predetermined order. If it is not the type of the reel to be stopped second (for example, one stop error), the first symbol combination or the third stop operation is detected according to the timing when the stop operation is detected by the stop operation detection means. The fluctuation of the symbol is stopped so that the symbol combination is stopped and displayed on the symbol display means, and the stop operation detected by the stop operation detecting means at a specific th after the predetermined th is the stop target of the reel. When the type is not the type of the reel to be stopped at the specific th in the predetermined order (for example, two stop mistakes), the second symbol combination is stopped and displayed on the symbol display means. When the first symbol combination is stopped and displayed on the symbol display means as the rotation of the reel is stopped, the RT transition means changes the RT state to the first RT state (for example, for example). When the second symbol combination is stopped and displayed on the symbol display means due to the rotation stop of the reel, the RT state is shifted to the second RT state (for example, RT0 state). A gaming machine characterized in that when the third symbol combination is stopped and displayed on the symbol display means when the rotation of the reel is stopped, the RT state is maintained.

Further, in the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the stopping operation detected by the stopping operation detecting means at the predetermined order is the stop target. When the type of the reel is not the type of the reel to be stopped at the predetermined order in the predetermined order, the first symbol corresponds to the timing at which the stop operation of the predetermined order is detected. The variation of the symbol may be stopped so that the combination or the third symbol combination is stopped and displayed on the symbol display means.

Further, in the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the stopping operation detected by the stopping operation detecting means at the predetermined order is the stop target. When the type of the reel is not the type of the reel to be stopped at the predetermined order in the predetermined order, the stop operation for the reel stopped after the predetermined order is detected. Therefore, the fluctuation of the symbols may be stopped so that the first symbol combination or the third symbol combination is stopped and displayed on the symbol display means.

In order to solve the 25th problem, the present invention provides a 49th gaming machine having the following configuration.

A gaming machine having a plurality of RT states having different probabilities that a replay related to a replay is determined as an internal winning combination, and a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed. A symbol display means (for example, a reel display window 4) that displays a part of a plurality of symbols displayed on the reel, and a start operation detection means (for example, a main control circuit 90, a start switch) that detects a start operation by a player. 79), a symbol changing means (for example, a main control circuit 90, a stepping motor) that changes the symbol by rotating the reel in response to the detection of the start operation by the start operation detecting means, and the start operation detection. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination from a plurality of winning combinations according to the detection of a start operation by the means, and the plurality of reels are provided. , The stop operation detecting means (for example, the main control circuit 90, the stop switch board 80) for detecting the stop operation for stopping each reel, the internal winning combination determined by the internal winning combination determining means, and the stop operation detection. A reel stop control means (for example, the main control circuit 90, etc.) that stops the fluctuation of the symbol displayed on the symbol display means by stopping the rotation of the reel according to the timing at which the stop operation is detected by the means. The stepping motor), the RT transition means (for example, the main control circuit 90) that shifts the plurality of RT states according to predetermined conditions, and the reel stop control means among the plurality of combinations. The first symbol combination (for example, the symbol combination according to the abbreviation "RT0 transition symbol") and the second symbol combination (for example, the abbreviation "RT2 transition symbol"" are used according to the order of the stop operation which is the order of stopping the reels. A plurality of push order combinations (eg, push order bells) capable of stopping and displaying a plurality of symbol combinations including a third symbol combination (for example, a symbol combination according to the abbreviation "bell") are included. In the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the order of the stopping operations detected by the stopping operation detecting means is predetermined with respect to the pushing order combination. When the order is determined (for example, the correct answer in the push order), the fluctuation of the symbols is stopped so that the third symbol combination is stopped and displayed on the symbol display means, and the stop operation detecting means detects the first. The type of the reel for which the stop operation is to be stopped is the predetermined order in the predetermined order. When it is not the type of the reel to be stopped second (for example, one stop error), the change of the symbol is stopped so that the first symbol combination is stopped and displayed on the symbol display means, and the stop operation is performed. The type of the reel to be stopped by the stop operation detected at the specific th after the predetermined th is not the type of the reel to be stopped at the specific th in the predetermined order. In the case (for example, two stop mistakes), the second symbol combination or the third symbol combination is stopped and displayed on the symbol display means according to the timing when the stop operation is detected by the stop operation detecting means. When the first symbol combination is stopped and displayed on the symbol display means as the rotation of the reel is stopped, the RT transition means changes the RT state to the first RT state (for example, for example). When the second symbol combination is stopped and displayed on the symbol display means due to the rotation stop of the reel, the RT state is shifted to the second RT state (for example, RT2 state). A gaming machine characterized in that when the third symbol combination is stopped and displayed on the symbol display means when the rotation of the reel is stopped, the RT state is maintained.

Further, in the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the stopping operation detected by the stopping operation detecting means at the specific order is the stop target. When the type of the reel is not the type of the reel to be stopped at the specific th in the predetermined order, the second symbol is based on the timing at which the stop operation of the specific th is detected. The variation of the symbol may be stopped so that the combination or the third symbol combination is stopped and displayed on the symbol display means.

Further, in the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the stopping operation detected by the stopping operation detecting means at the specific order is the stop target. When the type of the reel is not the type of the reel to be stopped at the specific th in the predetermined order, the stop operation for the reel that stops after the specific th is detected. Therefore, the variation of the symbols may be stopped so that the second symbol combination or the third symbol combination is stopped and displayed on the symbol display means.

In order to solve the 25th problem, the present invention provides a 50th gaming machine having the following configuration.

A gaming machine having a plurality of RT states having different probabilities that a replay related to a replay is determined as an internal winning combination, and a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed. A symbol display means (for example, a reel display window 4) that displays a part of a plurality of symbols displayed on the reel, and a start operation detection means (for example, a main control circuit 90, a start switch) that detects a start operation by a player. 79), a symbol changing means (for example, a main control circuit 90, a stepping motor) that changes the symbol by rotating the reel in response to the detection of the start operation by the start operation detecting means, and the start operation detection. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination from a plurality of winning combinations according to the detection of a start operation by the means, and the plurality of reels are provided. , The stop operation detecting means (for example, the main control circuit 90, the stop switch board 80) for detecting the stop operation for stopping each reel, the internal winning combination determined by the internal winning combination determining means, and the stop operation detection. A reel stop control means (for example, the main control circuit 90, etc.) that stops the fluctuation of the symbol displayed on the symbol display means by stopping the rotation of the reel according to the timing at which the stop operation is detected by the means. The stepping motor), the RT transition means (for example, the main control circuit 90) that shifts the plurality of RT states according to predetermined conditions, and the reel stop control means among the plurality of combinations. The first symbol combination (for example, the symbol combination according to the abbreviation "RT0 transition symbol") and the second symbol combination (for example, the abbreviation "RT2 transition symbol"" are used according to the order of the stop operation which is the order of stopping the reels. A plurality of push order combinations (eg, push order bells) capable of stopping and displaying a plurality of symbol combinations including a third symbol combination (for example, a symbol combination according to the abbreviation "bell") are included. In the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the order of the stopping operations detected by the stopping operation detecting means is predetermined with respect to the pushing order combination. When the order is determined (for example, the correct answer in the push order), the fluctuation of the symbols is stopped so that the third symbol combination is stopped and displayed on the symbol display means, and the stop operation detecting means detects the first. The type of the reel for which the stop operation is to be stopped is the predetermined order in the predetermined order. When the type of the reel is not the second target to be stopped (for example, one stop error), the first symbol combination or the third stop operation is detected according to the timing when the stop operation is detected by the stop operation detection means. The reel that stops the fluctuation of the symbol so that the symbol combination of the above is stopped and displayed on the symbol display means, and the stop operation detected by the stop operation detecting means at a specific th after the predetermined th is the stop target. When the type of is not the type of the reel of the target to be stopped at the specific th in the predetermined order (for example, two stop mistakes), depending on the timing when the stop operation is detected by the stop operation detection means. Then, the fluctuation of the symbol is stopped so that the second symbol combination or the third symbol combination is stopped and displayed on the symbol display means, and the RT transition means displays the symbol as the rotation of the reel stops. When the first symbol combination is stopped and displayed on the means, the RT state is shifted to the first RT state (for example, RT0 state), and the second symbol display means is displayed as the reel stops rotating. When the symbol combination is stopped and displayed, the RT state is shifted to the second RT state (for example, RT2 state), and when the rotation of the reel is stopped, the symbol display means stops and displays the third symbol combination. , A gaming machine characterized by maintaining the RT state.

Further, in the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the stopping operation detected by the stopping operation detecting means at the predetermined order is the stop target. When the type of the reel is not the type of the reel to be stopped at the predetermined order in the predetermined order, the first symbol corresponds to the timing at which the stop operation of the predetermined order is detected. The variation of the symbol may be stopped so that the combination or the third symbol combination is stopped and displayed on the symbol display means.

Further, in the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the stopping operation detected by the stopping operation detecting means at the specific order is the stop target. When the type of the reel is not the type of the reel to be stopped at the specific th in the predetermined order, the second symbol is based on the timing at which the stop operation of the specific th is detected. The variation of the symbol may be stopped so that the combination or the third symbol combination is stopped and displayed on the symbol display means.

Further, in the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the stopping operation detected by the stopping operation detecting means at the predetermined order is the stop target. When the type of the reel is not the type of the reel to be stopped at the predetermined order in the predetermined order, the stop operation for the reel stopped after the predetermined order is detected. Therefore, the fluctuation of the symbols may be stopped so that the first symbol combination or the third symbol combination is stopped and displayed on the symbol display means.

Further, in the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the stopping operation detected by the stopping operation detecting means at the specific order is the stop target. When the type of the reel is not the type of the reel to be stopped at the specific th in the predetermined order, the stop operation for the reel that stops after the specific th is detected. Therefore, the fluctuation of the symbols may be stopped so that the second symbol combination or the third symbol combination is stopped and displayed on the symbol display means.

In order to solve the 25th problem, the present invention provides a 51st gaming machine having the following configuration.

A gaming machine having a plurality of RT states having different probabilities that a replay related to a replay is determined as an internal winning combination, and a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed. A symbol display means (for example, a reel display window 4) that displays a part of a plurality of symbols displayed on the reel, and a start operation detection means (for example, a main control circuit 90, a start switch) that detects a start operation by a player. 79), a symbol changing means (for example, a main control circuit 90, a stepping motor) that changes the symbol by rotating the reel in response to the detection of the start operation by the start operation detecting means, and the start operation detection. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination from a plurality of winning combinations according to the detection of a start operation by the means, and the plurality of reels are provided. , The stop operation detecting means (for example, the main control circuit 90, the stop switch board 80) for detecting the stop operation for stopping each reel, the internal winning combination determined by the internal winning combination determining means, and the stop operation detection. A reel stop control means (for example, the main control circuit 90, etc.) that stops the fluctuation of the symbol displayed on the symbol display means by stopping the rotation of the reel according to the timing at which the stop operation is detected by the means. The stepping motor), the RT transition means (for example, the main control circuit 90) that shifts the plurality of RT states according to predetermined conditions, and the reel stop control means among the plurality of combinations. The first symbol combination (for example, the symbol combination according to the abbreviation "RT2 transition symbol") and the second symbol combination (for example, the abbreviation "RT1 transition symbol"" are used according to the order of the stop operation which is the order of stopping the reels. A plurality of push order combinations (eg, push order bells) capable of stopping and displaying a plurality of symbol combinations including a third symbol combination (for example, a symbol combination according to the abbreviation "bell") are included. In the reel stop control means, when the push order combination is determined as the internal winning combination by the internal winning combination determining means, the order of the stopping operations detected by the stopping operation detecting means is predetermined with respect to the pushing order combination. When the order is determined (for example, the correct answer in the push order), the fluctuation of the symbols is stopped so that the third symbol combination is stopped and displayed on the symbol display means, and the stop operation detecting means detects the first. The type of the reel for which the stop operation is to be stopped is the predetermined order in the predetermined order. The type of the reel to be stopped first, and the type of the reel to be stopped by the stop operation detected at the specific th after the predetermined th is specified in the predetermined order. When it is not the type of the reel to be stopped second (for example, 1 stop correct answer and 2 stop mistakes), the first stop operation is detected according to the timing when the stop operation detection means detects the first stop operation. The reel that stops the fluctuation of the symbol so that the symbol combination or the third symbol combination is stopped and displayed on the symbol display means, and the stop operation detected by the stop operation detecting means at the predetermined order is the stop target. The type of the reel is not the type of the reel to be stopped at the predetermined order in the predetermined order, and the type of the reel to which the stop operation detected at the specific order is the target to be stopped is the type of the reel. When the type of the reel is not the target to be stopped at the specific order in the specified order (for example, 1 stop miss and 2 stop miss), at the timing when the stop operation is detected by the stop operation detection means. Accordingly, the fluctuation of the symbol is stopped so that the second symbol combination or the third symbol combination is stopped and displayed on the symbol display means, and the RT transition means causes the symbol to stop rotating with the reel. When the first symbol combination is stopped and displayed on the display means, the RT state is shifted to the first RT state (for example, RT2 state), and the second symbol is displayed on the symbol display means when the rotation of the reel is stopped. When the combination is stopped and displayed, the RT state is shifted to the second RT state (for example, RT0 state), and when the third symbol combination is stopped and displayed on the symbol display means due to the rotation stop of the reel, the said A gaming machine characterized by maintaining an RT state.

Further, when the type of the reel to be stopped by the stop operation detected at the specific order is not the type of the reel to be stopped at the specific order in the predetermined order, the reel stop control means. The timing at which the stop operation capable of stopping and displaying the third symbol combination is detected is such that the types of the reels for which the stop operation detected at the predetermined order is to be stopped are in the predetermined order. The type of the reel to be stopped at the predetermined order may be different from the type of the reel to be stopped at the predetermined order in the predetermined order.

According to the 48th to 51st gaming machines of the present invention having the above configuration, it is possible to provide a gaming machine capable of various controls when the push order is incorrect.

[52nd to 54th gaming machines]
As an AT (ART) machine, Japanese Patent Application Laid-Open No. 2014-036725 describes a gaming machine provided with a high-probability winning zone (hereinafter referred to as “chance zone”) of an AT having a high expectation of winning an AT. There is. In this gaming machine, during the non-chance zone, there is a low probability of winning the ART lottery when winning a specific role (rare role such as watermelon or cherry), and during the chance zone, there is a high probability of winning the ART lottery when winning the specific role. Since it is a winning, it is possible to have an expectation that the ART lottery will be won when a specific winning combination is established.

However, in the above-mentioned gaming machine, the ART lottery in the chance zone is performed with a probability according to the winning combination, so unless the winning combination with a high probability of winning the ART lottery is won, the expectation for winning the ART lottery is expected. It was not possible to have it, and the result of the ART lottery tended to be uniform, which could lead to a decrease in the interest of the game.

The present invention has been made to solve the above-mentioned 25th problem, and a 25th object of the present invention is to provide a gaming machine capable of suppressing a decrease in the interest of a game.

In order to solve the 25th problem, the present invention provides a 52nd gaming machine having the following configuration.

A normal state (for example, a normal state), an advantageous state (for example, an ART state) that is more advantageous to the player than the normal state, and a high probability state (for example, an ART state) that has a higher probability of shifting to the advantageous state than the normal state (for example). For example, in a gaming machine having a CZ), a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed and a part of a plurality of symbols displayed on the reels are displayed. For detecting the start operation by the symbol display means (for example, the reel display window 4), the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player, and the start operation detecting means. Correspondingly, from among a plurality of combinations depending on the symbol changing means (for example, the main control circuit 90, the stepping motor) that changes the symbol by rotating the reel and the detection of the start operation by the start operation detection means. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination with a predetermined probability, and a stop operation that is provided corresponding to the plurality of reels and detects a stop operation for stopping each reel. It is displayed on the symbol display means by stopping the rotation of the reel according to the detection means (for example, the main control circuit 90, the stop switch board 80) and the internal winning combination determined by the internal winning combination determining means. A reel stop control means (for example, main control circuit 90, stepping motor) for stopping the fluctuation of the symbol, and a transition determination means (for example, main control circuit 90) for determining whether or not to shift to the advantageous state. When the transition determining means determines to shift to the advantageous state, the gaming state shifts to the advantageous state, and when the first end condition is satisfied during the advantageous state, the advantageous state control means (for example, the advantageous state control means) ends the advantageous state. When the main control circuit 90) and the first condition are satisfied, the gaming state shifts to the high probability state, and when the second end condition is satisfied during the high probability state, the high probability state ends. A control means (for example, a main control circuit 90) and a privilege giving means (for example, a main control circuit 90) for giving a privilege (for example, transition to EP) to a player are provided, and the plurality of roles are included. Is a first symbol combination (for example, a symbol combination according to the abbreviation "strong chance lip") or a second symbol combination (for example, the abbreviation "diagonal") depending on the mode of the stop operation detected by the stop operation detecting means. A specific combination (for example, "three-choice promotion lip") capable of stopping and displaying the symbol combination related to "replay" is included, and the play is performed during the advantageous state and the high probability state. As a notification mode for notifying the technician of the mode of the stop operation, when the specific combination is determined as the internal winning combination, the mode of the stop operation required to stop and display the first symbol combination is notified. The first notification mode (for example, during navigation high accuracy) and the second mode of the stop operation necessary for stopping and displaying the second symbol combination when the specific combination is determined as the internal winning combination. When it has a notification mode (for example, during non-navigation high accuracy) and the second condition is satisfied during the second notification mode (for example, when the number of navigation high accuracy games is given), the second notification mode When the notification mode is switched from the first notification mode to the first notification mode and the third condition is satisfied during the first notification mode (for example, when the number of highly accurate navigation games becomes 0), the second notification mode is changed to the second. The notification mode control means (for example, the main control circuit 90) for switching the notification mode to the notification mode is further provided, and the notification mode control means satisfies the third condition in the advantageous state in the first notification mode. If it ends without any, the first notification mode can be maintained even in the high probability state that resumes after the end of the advantageous state (for example, the navigation high accuracy can be carried over to the continuous CZ), and the privilege granting means is said. In response to the stop display of the first symbol combination during the advantageous state, the privilege is given to the player, and the transition determination means is the specific in the first notification mode in the high probability state. When the combination is determined as the internal winning combination, it is determined that the specific combination shifts to the advantageous state with a higher probability than when the specific combination is determined as the internal winning combination during the second notification mode. A game machine to play.

In order to solve the 25th problem, the present invention provides a 53rd gaming machine having the following configuration.

A normal state (for example, a normal state), an advantageous state (for example, an ART state) that is more advantageous to the player than the normal state, and a high probability state (for example, an ART state) that has a higher probability of shifting to the advantageous state than the normal state (for example). For example, in a gaming machine having a CZ), a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed and a part of a plurality of symbols displayed on the reels are displayed. For detecting the start operation by the symbol display means (for example, the reel display window 4), the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player, and the start operation detecting means. Correspondingly, from among a plurality of combinations depending on the symbol changing means (for example, the main control circuit 90, the stepping motor) that changes the symbol by rotating the reel and the detection of the start operation by the start operation detection means. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination with a predetermined probability, and a stop operation that is provided corresponding to the plurality of reels and detects a stop operation for stopping each reel. It is displayed on the symbol display means by stopping the rotation of the reel according to the detection means (for example, the main control circuit 90, the stop switch board 80) and the internal winning combination determined by the internal winning combination determining means. A reel stop control means (for example, main control circuit 90, stepping motor) for stopping the fluctuation of the symbol, and a transition determination means (for example, main control circuit 90) for determining whether or not to shift to the advantageous state. When the transition determining means determines to shift to the advantageous state, the gaming state shifts to the advantageous state, and when the first end condition is satisfied during the advantageous state, the advantageous state control means (for example, the advantageous state control means) ends the advantageous state. When the main control circuit 90) and the first condition are satisfied, the gaming state shifts to the high probability state, and when the second end condition is satisfied during the high probability state, the high probability state ends. A control means (for example, a main control circuit 90) and a privilege giving means (for example, a main control circuit 90) for giving a privilege (for example, transition to EP) to a player are provided, and the plurality of roles are included. Is a first symbol combination (for example, a symbol combination according to the abbreviation "strong chance lip") or a second symbol combination (for example, the abbreviation "diagonal") depending on the mode of the stop operation detected by the stop operation detecting means. A specific combination (for example, "three-choice promotion lip") capable of stopping and displaying the symbol combination related to "replay" is included, and the play is performed during the advantageous state and the high probability state. As a notification mode for notifying the technician of the mode of the stop operation, when the specific combination is determined as the internal winning combination, the mode of the stop operation required to stop and display the first symbol combination is notified. The first notification mode (for example, during navigation high accuracy) and the second mode of the stop operation necessary for stopping and displaying the second symbol combination when the specific combination is determined as the internal winning combination. When it has a notification mode (for example, during non-navigation high accuracy) and the second condition is satisfied during the second notification mode (for example, when the number of navigation high accuracy games is given), the second notification mode When the notification mode is switched from the first notification mode to the first notification mode and the third condition is satisfied during the first notification mode (for example, when the number of highly accurate navigation games becomes 0), the second notification mode is changed to the second. The notification mode control means (for example, the main control circuit 90) for switching the notification mode to the notification mode is further provided, and the notification mode control means satisfies the third condition in the advantageous state in the first notification mode. If it ends without any, the first notification mode can be maintained even in the high probability state that resumes after the end of the advantageous state (for example, the navigation high accuracy can be carried over to the continuous CZ), and the privilege granting means is said. In response to the stop display of the first symbol combination during the advantageous state, the privilege is given to the player, and the transition determination means is the specific in the first notification mode in the high probability state. When the combination is determined as the internal winning combination, it is determined that the specific combination will shift to the advantageous state with a higher probability than when the specific combination is determined as the internal winning combination during the second notification mode, and the notification mode is determined. The second condition in which the control means switches the notification mode from the second notification mode to the first notification mode is not satisfied during the high probability state, but is satisfied only during the advantageous state, and the notification mode control The third condition for the means to switch the notification mode from the first notification mode to the second notification mode is that the privilege is granted by the privilege granting means, or the remaining gaming period of the first notification mode is. A gaming machine characterized in that it is established when the threshold is reached.

In order to solve the 25th problem, the present invention provides a 54th gaming machine having the following configuration.

A normal state (for example, a normal state), an advantageous state (for example, an ART state) that is more advantageous to the player than the normal state, and a high probability state (for example, an ART state) that has a higher probability of shifting to the advantageous state than the normal state (for example). For example, in a gaming machine having a CZ), a plurality of reels (for example, reels 3L, 3C, 3R) on which a plurality of symbols are displayed and a part of a plurality of symbols displayed on the reels are displayed. For detecting the start operation by the symbol display means (for example, the reel display window 4), the start operation detecting means (for example, the main control circuit 90, the start switch 79) for detecting the start operation by the player, and the start operation detecting means. Correspondingly, from among a plurality of combinations depending on the symbol changing means (for example, the main control circuit 90, the stepping motor) that changes the symbol by rotating the reel and the detection of the start operation by the start operation detection means. An internal winning combination determining means (for example, a main control circuit 90) that determines an internal winning combination with a predetermined probability, and a stop operation that is provided corresponding to the plurality of reels and detects a stop operation for stopping each reel. It is displayed on the symbol display means by stopping the rotation of the reel according to the detection means (for example, the main control circuit 90, the stop switch board 80) and the internal winning combination determined by the internal winning combination determining means. A reel stop control means (for example, main control circuit 90, stepping motor) for stopping the fluctuation of the symbol, and a transition determination means (for example, main control circuit 90) for determining whether or not to shift to the advantageous state. When the transition determining means decides to shift to the advantageous state, the gaming state shifts to the advantageous state, and when the first end condition is satisfied during the advantageous state, the advantageous state control means (for example, the advantageous state control means) ends the advantageous state. When the main control circuit 90) and the first condition are satisfied, the gaming state shifts to the high probability state, and when the second end condition is satisfied during the high probability state, the high probability state ends. A control means (for example, a main control circuit 90) and a privilege giving means (for example, a main control circuit 90) for giving a privilege (for example, transition to EP) to a player are provided, and the plurality of roles are included. Is a first symbol combination (for example, a symbol combination according to the abbreviation "strong chance lip") or a second symbol combination (for example, the abbreviation "diagonal") depending on the mode of the stop operation detected by the stop operation detecting means. A specific combination (for example, "three-choice promotion lip") capable of stopping and displaying the symbol combination related to "replay" is included, and the play is performed during the advantageous state and the high probability state. As a notification mode for notifying the operator of the mode of the stop operation, when the specific combination is determined as the internal winning combination, the mode of the stop operation required to stop and display the first symbol combination is notified. The first notification mode (for example, during navigation high probability) and the second mode of the stop operation necessary for stopping and displaying the second symbol combination when the specific combination is determined as the internal winning combination. Special replays (for example, "F_7 Lip A" and "F_7") as a plurality of RT states having a notification mode (for example, non-navigation high accuracy) and having different probabilities that the replay related to the replay is determined as an internal winning combination. It has at least a special RT state (for example, RT5 state) in which the probability that "Rip B" and "F_BAR Lip") is determined as an internal winning combination is higher than that of other RT states, and the second condition during the second notification mode. When the condition is satisfied (for example, when the number of navigation high-probability games is given), the notification mode is switched from the second notification mode to the first notification mode, and the third condition is satisfied during the first notification mode. (For example, when the number of navigation high-probability games becomes 0), in the notification mode control means for switching the notification mode from the first notification mode to the second notification mode, and in the first game in which the gaming state shifts to the advantageous state. Advantageous state mode determining means for determining one advantageous state mode to be used for the advantageous state this time from among a plurality of advantageous state modes (for example, rank in ART state or lottery state) having different probabilities of satisfying the second condition. (For example, when the first symbol combination is stopped and displayed on the symbol display means when the rotation of the reel is stopped (for example, the main control circuit 90), the RT transition means for shifting the RT state to the special RT state (for example). , Main control circuit 90), and the notification mode control means restarts after the end of the advantageous state when the advantageous state in the first notification mode ends without satisfying the third condition. The first notification mode can be maintained even in the high probability state (for example, the navigation high accuracy can be carried over to the continuous CZ), and the privilege granting means stops the first symbol combination during the advantageous state. In response to the display, the privilege is given to the player, and the transition determination means is determined in the high probability state when the specific combination is determined as the internal winning combination during the first notification mode. , It is determined that the specific combination will shift to the advantageous state with a higher probability than when the specific combination is determined as the internal winning combination during the second notification mode, and the advantageous state mode The determining means is an advantageous state in which there is a high probability that the second condition is satisfied as the one advantageous state mode when the special replay is determined as an internal winning combination in the first game in which the game state shifts to the advantageous state. A gaming machine characterized in that a mode is determined (for example, a rank is greatly promoted by a promotion lottery during a rank determination ART).

According to the 52nd to 54th gaming machines of the present invention having the above configuration, it is possible to provide a gaming machine capable of suppressing a decrease in the interest of the game.

[55th to 57th gaming machines]
As an AT (ART) machine, a gaming machine provided with a high-probability winning zone (hereinafter referred to as “chance zone”) of an AT having a high expectation of winning an AT is known. For example, Japanese Patent Application Laid-Open No. 2017-051798. The publication describes a gaming machine in which a plurality of chance zones having different expectations for winning an AT are provided as chance zones, and an AT (pseudo-bonus) is given when black BARs are aligned in the chance zones. According to such a gaming machine, various playability can be realized by providing chance zones having different expectations.

However, in the above-mentioned gaming machine, once the type of the chance zone is determined, the type of the chance zone does not change until the end of the chance zone, so that the game in the chance zone may become monotonous.

The present invention has been made to solve the above-mentioned 26th problem, and the 26th object of the present invention is to provide a gaming machine capable of suppressing a decrease in the interest of a game in a state where there is a high expectation of granting benefits. To provide.

In order to solve the 26th problem, the present invention provides a 55th gaming machine having the following configuration.

A normal state (for example, a normal state) and a first high probability state (for example, CZ (after ART)) in which a player is more likely to decide to grant a privilege (for example, an ART state) than the normal state. , A gaming machine having a second high probability state (for example, special CZ) having a higher probability of determining to grant a privilege to a player than the first high probability state, and a plurality of symbols are displayed. A plurality of reels (for example, reels 3L, 3C, 3R), a symbol display means for displaying a part of a plurality of symbols displayed on the reel (for example, a reel display window 4), and a start operation by the player. The start operation detecting means (for example, the main control circuit 90, the start switch 79) to be detected, and the symbol changing means (for example, the symbol changing means for changing the symbol by rotating the reel in response to the detection of the start operation by the start operation detecting means). For example, the main control circuit 90 (stepping motor) and the internal winning combination determining means (for example, the main) that determines the internal winning combination from a plurality of combinations according to the detection of the starting operation by the starting operation detecting means. A control circuit 90), a stop operation detecting means (for example, a main control circuit 90, a stop switch board 80) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel, and the inside thereof. The symbol displayed on the symbol display means by stopping the rotation of the reel according to the internal winning combination determined by the winning combination determining means and the timing at which the stopping operation is detected by the stopping operation detecting means. A reel stop control means for stopping the fluctuation (for example, the main control circuit 90, a stepping motor), a grant determination means for determining whether or not to grant the privilege to the player (for example, the main control circuit 90), and When the grant determining means determines to grant the privilege, the privilege granting means (for example, the main control circuit 90) for granting the privilege and the grant determining means determine to grant the privilege, the privilege is granted. When the right is memorized and the privilege granting means grants the privilege, the right management means (for example, main control circuit 90, main RAM 103) that erases one of the rights and the first condition are satisfied (for example, for example). (When the ART state ends), the gaming state shifts to the first high-probability state, and when the remaining gaming period of the first high-probability state reaches the threshold value, the first high-probability state ends the first high-probability state. When the control means (for example, the main control circuit 90) and the second condition are satisfied (for example, the lottery during the rank determination ART). Then, the gaming state is shifted from the first high probability state to the second high probability state, and when the remaining gaming period of the second high probability state reaches the threshold value, the second high probability state is terminated. When the two high-probability state control means (for example, the main control circuit 90) and the second high-probability state control means shift the gaming state to the second high-probability state, the rest of the first high-probability state before the shift. A period setting means (for example, the main control circuit 90) for setting the game period as the remaining game period in the second high probability state is provided, and the right management means stores when the second condition is satisfied. A gaming machine characterized in that when the number of the rights to be stored is less than a predetermined number, the number of stored rights is added so that the number of the rights to be stored becomes the predetermined number.

Further, when the period setting means sets the remaining gaming period of the first high-probability state before the transition as the remaining gaming period of the remaining gaming period of the second high-probability state, the first high-probability state before the transition is set. You may clear the remaining game period.

In order to solve the 26th problem, the present invention provides a 56th gaming machine having the following configuration.

A normal state (for example, a normal state) and a first high probability state (for example, CZ (after ART)) in which a player is more likely to decide to grant a privilege (for example, an ART state) than the normal state. , A gaming machine having a second high probability state (for example, special CZ) having a higher probability of determining to grant a privilege to a player than the first high probability state, and a plurality of symbols are displayed. A plurality of reels (for example, reels 3L, 3C, 3R), a symbol display means for displaying a part of a plurality of symbols displayed on the reel (for example, a reel display window 4), and a start operation by a player. The start operation detecting means (for example, the main control circuit 90, the start switch 79) to be detected, and the symbol changing means (for example, the symbol changing means for changing the symbol by rotating the reel in response to the detection of the start operation by the start operation detecting means). For example, the main control circuit 90 (stepping motor) and the internal winning combination determining means (for example, the main) that determines the internal winning combination from a plurality of combinations according to the detection of the starting operation by the starting operation detecting means. A control circuit 90), a stop operation detecting means (for example, a main control circuit 90, a stop switch board 80) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel, and the inside thereof. The symbol displayed on the symbol display means by stopping the rotation of the reel according to the internal winning combination determined by the winning combination determining means and the timing at which the stopping operation is detected by the stopping operation detecting means. A reel stop control means for stopping the fluctuation (for example, the main control circuit 90, a stepping motor), a grant determination means for determining whether or not to grant the privilege to the player (for example, the main control circuit 90), and When the grant determination means determines to grant the privilege, the privilege granting means (for example, the main control circuit 90) for granting the privilege and the remaining gaming period of the first high probability state or the second high probability state are managed. When the period management means (for example, the main control circuit 90) and the first condition are satisfied (for example, when the ART state ends), the gaming state is shifted to the first high probability state, and the first high probability state is entered. When the remaining gaming period managed by the period management means reaches a threshold value, the first high probability state control means (for example, the main control circuit 90) that ends the first high probability state and the second condition are set. When the condition is satisfied (for example, when the lottery during the rank determination ART is won), the gaming state is shifted from the first high probability state to the second high probability state, and the second high is performed. When the remaining gaming period managed by the period management means reaches a threshold value during the probability state, the second high probability state control means (for example, the main control circuit 90) that ends the second high probability state, and the first. When the privilege granting means grants the privilege during the high probability state or the second high probability state, the high probability state adding means (for example, the main control circuit) that adds a predetermined period to the gaming period managed by the period management means. 90), and a gaming machine characterized by being provided with.

In order to solve the 26th problem, the present invention provides a 57th gaming machine having the following configuration.

A normal state (for example, a normal state) and a first high probability state (for example, CZ (after ART)) in which a player is more likely to decide to grant a privilege (for example, an ART state) than the normal state. , A gaming machine having a second high probability state (for example, special CZ) having a higher probability of determining to grant a privilege to a player than the first high probability state, and a plurality of symbols are displayed. A plurality of reels (for example, reels 3L, 3C, 3R), a symbol display means for displaying a part of a plurality of symbols displayed on the reel (for example, a reel display window 4), and a start operation by a player. The start operation detecting means (for example, the main control circuit 90, the start switch 79) to be detected, and the symbol changing means (for example, the symbol changing means for changing the symbol by rotating the reel in response to the detection of the start operation by the start operation detecting means). For example, the main control circuit 90 (stepping motor) and the internal winning combination determining means (for example, the main) that determines the internal winning combination from a plurality of combinations according to the detection of the starting operation by the starting operation detecting means. A control circuit 90), a stop operation detecting means (for example, a main control circuit 90, a stop switch board 80) provided corresponding to the plurality of reels and detecting a stop operation for stopping each reel, and the inside thereof. The symbol displayed on the symbol display means by stopping the rotation of the reel according to the internal winning combination determined by the winning combination determining means and the timing at which the stopping operation is detected by the stopping operation detecting means. A reel stop control means for stopping the fluctuation (for example, the main control circuit 90, a stepping motor), a grant determination means for determining whether or not to grant the privilege to the player (for example, the main control circuit 90), When the grant determination means determines to grant the privilege, the privilege granting means for granting the privilege (for example, the main control circuit 90) and the first condition (for example, when the ART state ends), the first. 1 The first high-probability state control means (for example, the main control circuit 90) that shifts the gaming state to the high-probability state and ends the first high-probability state when the remaining gaming period of the first high-probability state reaches the threshold value. ) And the second condition is satisfied (for example, when the lottery during the rank determination ART is won), the gaming state is shifted from the first high probability state to the second high probability state, and the second high probability state is entered. When the remaining gaming period of the game reaches the threshold value, the second high-probability state control means (for example, the main control circuit 90) that ends the second high-probability state and the second high-probability state. When the control means shifts the gaming state to the second high-probability state, the period setting means (for example, for example, the remaining gaming period of the first high-probability state before the shift is set as the remaining gaming period of the second high-probability state). When the privilege granting means grants the privilege during the main control circuit 90) and the first high probability state, a predetermined period is added as the remaining gaming period of the first high probability state, and the second high probability state is added. When the privilege granting means grants the privilege, the privilege is provided with a high probability state adding means (for example, the main control circuit 90) that adds the predetermined period as the remaining gaming period of the second high probability state. When the remaining gaming period of the second high-probability state reaches the threshold value, the granting means grants the privilege, and the high-probability state adding means reaches the threshold value of the remaining gaming period of the second high-probability state. When the privilege granting means grants the privilege in response to the above, a predetermined period is added as the remaining gaming period of the first high probability state, and the first high probability state control means is in the second high probability state. When the privilege granting means grants the privilege in response to the remaining gaming period reaching the threshold, the gaming state is shifted to the first high probability state after the privilege is granted. A game machine to play.

When the period setting means sets the remaining game period of the first high-probability state before the transition as the remaining game period of the remaining game period of the second high-probability state, the remaining game of the first high-probability state before the transition is set. You may clear the period.

According to the 55th to 57th gaming machines of the present invention having the above configuration, it is possible to suppress a decrease in the interest of the game while the expectation of granting the privilege is high.

[58th to 61st gaming machines]
As shown in Japanese Patent Application Laid-Open No. 2014-036725, information advantageous to the player, such as information for establishing the internal winning combination, so as not to miss the role determined as the internal winning combination in recent years, is provided. A gaming machine that notifies a player is known. It should be noted that the notification of information that is advantageous to the player in this way is generally referred to as navigating (navigating), and the period during which the navigating is performed is referred to as AT (assist time), and has an AT function. Gaming machines are called AT machines and ART machines.

In the pachi-slot machine, for example, a plurality of production stages from step 1 to step 4 may be provided, and a step-up effect may be performed in which the effect stage is promoted according to the progress of the game. In such a step-up production, if it is decided to grant benefits such as bonuses and ATs, the player can be promoted to the earlier production stage, so that the player can expect the privilege to be granted from the final production stage. You can guess.

Further, in recent years, a pachi-slot machine that improves the playability by a BGM during a game is also known. A pachi-slot machine that changes BGM is also known. In a pachi-slot machine that changes BGM like this, the BGM is switched during AT, so the player is surprised, and after that, it is possible to grasp that the number of stocks is more than a predetermined number due to the change in BGM, and the interest is improved. do.

However, since the above-mentioned step-up effect is stepped up according to the progress of the game, it is completed in one game, and the effect becomes monotonous. Further, as for the above-mentioned BGM change, only the information (the number of stocks is more than a predetermined number) is already confirmed at the stage when the BGM is changed, and it is not possible to give a sense of expectation over a plurality of games.

The present invention has been made to solve the 27th problem, and the 27th object of the present invention is to expect the player to give a privilege in a production that progresses regardless of the progress of the game. It is to provide a game machine that can be guessed.

In order to solve the 27th problem, the present invention provides a 58th gaming machine having the following configuration.

As a feasible effect, the gaming machine has a predetermined effect (for example, a song SU effect) that changes a plurality of effect stages according to the passage of time, and is used on a plurality of identification displays (for example, reels 3L, 3C, 3R). A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying the displayed symbol), and after the variable display of the variable display means, the variable display is stopped based on the player's stop operation. A game control means (for example, the main control circuit 90) that controls the progress of the game, and a grant determination means (for example, the main control circuit) that can determine that a privilege (for example, an ART state or CZ) is given to the player. 90), and when the grant determination means determines that the privilege is to be granted, the privilege granting means (for example, the main control circuit 90) that grants the privilege at a predetermined timing thereafter (for example, after the end of the precursor). Based on the determination result of the granting determination means, the effect determining means (for example, the sub-control circuit 200) capable of determining to which stage of the plurality of the effect stages are changed in the predetermined effect, and the effect determining means are determined. A staging means (for example, a sub-control circuit 200, a display device 11) capable of executing the predetermined staging that changes to the staging stage at the stage of the staging is provided, and the staging means is used by the player during the execution of the staging. It is possible to change the effect stage by elapse of time according to the current effect stage without changing the effect stage when various operations are detected, and the game control means is the predetermined. When various operations of the player are detected during the execution of the effect, the game can be advanced according to the operation, and the game can be advanced a plurality of times during the execution of the predetermined effect. Machine.

The privilege granting means may grant the privilege to the player when the game is played a predetermined number of times after the grant determining means determines that the privilege is to be granted.

In order to solve the 27th problem, the present invention provides a 59th gaming machine having the following configuration.

As a feasible effect, the gaming machine has a predetermined effect (for example, a song SU effect) that changes a plurality of effect stages according to the passage of time, and is used on a plurality of identification displays (for example, reels 3L, 3C, 3R). A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying the displayed symbol), and after the variable display of the variable display means, the variable display is stopped based on the player's stop operation. A game control means (for example, the main control circuit 90) that controls the progress of the game, and a grant determination means (for example, the main control circuit) that can determine that a privilege (for example, an ART state or CZ) is given to the player. 90), when the granting determination means determines that the privilege is to be granted, the privilege granting means (for example, the main control circuit 90) for granting the privilege and the first effect means (for example) capable of executing the predetermined effect. , Sub-control circuit 200, sub-display device 18), a second effect means (for example, sub-control circuit 200, display device 11) capable of performing an effect different from the predetermined effect, and the first effect means or the first effect. 2 The effect determining means (for example, the sub-control circuit 200) capable of determining the effect to be executed by the effect means, and the effect determining means determines the predetermined effect as the effect to be executed. Based on the determination result, it is possible to determine which stage of the plurality of the effect stages is to be changed in the predetermined effect, and the first effect means changes to the effect stage at the stage determined by the effect determination means. The predetermined effect can be executed, and when various operations of the player are detected during the execution of the predetermined effect, the time corresponding to the current effect stage elapses without changing the effect stage. It is possible to change the effect stage, and when various operations of the player are detected during the execution of the effect, the second effect means can proceed with the effect being executed in response to the operation. When various operations of the player are detected during the execution of the predetermined effect, the game control means advances the game according to the operation and plays a plurality of games during the execution of the predetermined effect. A game machine characterized by being able to proceed.

Further, when the effect determining means determines that the privilege is to be granted, the effect determining means has a higher probability of being ahead of the case when it is determined not to grant the privilege. The predetermined effect that changes up to the effect stage may be determined.

In order to solve the 27th problem, the present invention provides a 60th gaming machine having the following configuration.

As a feasible effect, the gaming machine has a predetermined effect (for example, a song SU effect) that changes a plurality of effect stages according to the passage of time, and is used on a plurality of identification displays (for example, reels 3L, 3C, 3R). A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying the displayed symbol), and after the variable display of the variable display means, the variable display is stopped based on the player's stop operation. A game control means for controlling the progress of the game (for example, the main control circuit 90), whether or not to give the privilege to the player, and the size of the privilege to be given when the privilege is given (for example,). An grant determining means (for example, the main control circuit 90) capable of determining the ART state or CZ) and a privilege granting means (eg,) for granting the privilege of the determined size when the grant determining means determines to grant the privilege. , Main control circuit 90) and the effect to be executed can be determined, and when the predetermined effect is determined as the effect to be executed, the predetermined effect is determined according to the size of the privilege determined by the grant determination means. A staging determining means (for example, a sub-control circuit 200) that can determine which stage of the plurality of staging stages is to be changed in the staging, and the predetermined staging that is changed to the staging stage at the stage determined by the staging determining means. The staging means includes an executable staging means (for example, a sub-control circuit 200, a display device 11), and the staging means changes the staging stage when various operations of the player are detected during the execution of the predetermined staging. It is possible to change the effect stage by elapse of time according to the current effect stage, and the game control means detects various operations of the player during the execution of the predetermined effect. At that time, the gaming machine is characterized in that the game can be advanced according to the operation and the game can be advanced a plurality of times during the execution of the predetermined effect.

Further, when the granting determination means determines to grant a large privilege, the effect determining means has a higher probability than when it is determined to grant a small privilege to the further stage of the effect. The predetermined effect to be changed may be determined.

In order to solve the 27th problem, the present invention provides a 61st gaming machine having the following configuration.

As a feasible effect, a plurality of predetermined effects (for example, a song SU effect) in which a plurality of effect stages are changed according to the passage of time, and a plurality of different stages of the plurality of effect stages are changed. A game machine having a predetermined effect, and a variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and the above. After the variable display of the variable display means, the game control means (for example, the main control circuit 90) that controls the progress of the game by stopping the variable display based on the stop operation of the player, and the privilege (for example, the player). For example, when the granting determination means (for example, the main control circuit 90) that can determine that the ART state or CZ) is to be granted and the grant determination means determines that the privilege is to be granted, a predetermined timing thereafter (for example, for example). , After the end of the precursory sign), and based on the determination result of the privilege granting means (for example, the main control circuit 90) and the granting determination means, the predetermined effect changes to any of the plurality of stage of the effect. An effect determining means (for example, a sub-control circuit 200) that can be determined to be to be made, and an effect means (for example, the sub-control circuit 200) that can execute the predetermined effect that changes to the effect stage at the stage determined by the effect determining means. When the display device 11) and the effect means determine another predetermined effect different from the predetermined effect being executed while the effect determining means is executing the predetermined effect, the predetermined effect being executed is changed to the other predetermined effect. When the determination means (for example, the sub-control circuit 200) for determining whether or not to change to the predetermined effect and the determination means determine that the effect can be changed, the predetermined effect being executed by the effect means is changed to the other predetermined effect. When the determination means is changed and the determination means determines that the change is not possible, the effect changing means (for example, the sub-control circuit 200) that discards the other predetermined effect determined by the effect determining means and maintains the predetermined effect being executed. When various operations of the player are detected during the execution of the predetermined effect, the effect means does not change the effect stage, and the time corresponding to the current effect stage elapses. The effect stage can be changed, and when various operations of the player are detected during the execution of the predetermined effect, the game control means advances the game according to the operation and the predetermined operation. It is possible to proceed with a plurality of games during the execution of the effect, and the determination means is from a timing (for example, a rewriting point) preset for the predetermined effect being executed. If the effect determining means determines the other predetermined effect before (for example, the rewritable period), it is determined that the predetermined effect being executed can be changed, and after the timing (for example, the non-rewritable period). A gaming machine characterized in that when the effect determining means determines the other predetermined effect, it is determined that the predetermined effect being executed cannot be changed.

Further, when the determination means determines that the effect can be changed, the effect changing means may change the predetermined effect being executed at the timing to the other predetermined effect.

According to the 58th to 61st gaming machines of the present invention having the above configuration, it is possible to provide a gaming machine in which a player can infer the degree of expectation of privilege grant in a production that progresses regardless of the progress of the game. ..

[62nd gaming machine]
Further, Japanese Patent Application Laid-Open No. 2007-54229 discloses a gaming machine that, when a role related to a bonus is determined as an internal winning combination, gives a notification effect that the bonus is won. From the player's point of view, it is possible to know that the bonus has been won from the notification effect, so that the game can be played with peace of mind without stopping the game even though the bonus is being won.

By the way, in recent gaming machines, the main control side controls the ball ejection such as the determination of the internal winning combination, while the sub-control side controls the effect related to the ball ejection such as the notification effect. Is common. Therefore, if an internal parameter error occurs on the sub-control side, the game may proceed without the notification effect, and in such a case, the interest of the game may be reduced. be.

The present invention has been made to solve the 28th problem, and a 28th object of the present invention is to provide a gaming machine capable of performing a notification effect at an appropriate timing.

In order to solve the 28th problem, the present invention provides a 62nd gaming machine having the following configuration.

A plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) can be variablely displayed based on the establishment of a start condition (for example, the start lever 16 is operated with a predetermined number of medals inserted). A variable display means (for example, reels 3L, 3C, 3R) and a combination determining means (for example, a main control circuit 90) that determines a winning combination from a plurality of combinations with a predetermined probability based on the establishment of the start condition. The stop operation detecting means (for example, the main control circuit 90, the stop switch board 80) for detecting the stop operation for stopping the variation display, the winning combination determined by the combination determining means, and the stop operation detecting means. A stop control means (eg, main control circuit 90, stepping motor) that stops the variation display based on the detection of the stop operation, and a specific display result (for example, abbreviated as "BB") when the variation display is stopped. When the symbol combination) is displayed, the first game control means (for example, the main control circuit 90) that shifts to a special game state (for example, a bonus state) that is advantageous to the player, and the specific display result are displayed. When the combination determining means determines a possible specific role (for example, "F_red BB") as the winning combination, a notification effect (for example, a bonus notification effect) for notifying that the specific combination is determined as the winning combination is performed. After the notification game number determination means (for example, the sub-control circuit 200) for determining the number of notification games (for example, the number of precursor games) indicating the number of games to be played, and the combination determination means have determined the specific combination as the winning combination. When the number of played games reaches the number of announced games, the effect means for performing the notification effect (for example, the sub-control circuit 200, the display device 11) and the predetermined conditions are satisfied (for example, when the ART lottery is won). , A second game control means (for example, the main control circuit 90) that shifts the game state to a predetermined game state (for example, ART state), and information indicating the remaining game period of the predetermined game state (for example, the remaining game in the ART state). The effect means is provided with a display counter (for example, sub-control circuit 200, display device 11) that displays the number) and updates the display of information indicating the remaining game period according to the result of the game. When the display counter updates the display of the information indicating the remaining gaming period up to the information indicating that the remaining gaming period has reached the end threshold of the predetermined gaming state, the combination determining means determines the specific combination as the winning combination. It is characterized in that the notification effect is performed regardless of whether or not the number of games played after the game has reached the number of notification games. Pachinko machine.

According to the 62nd gaming machine of the present invention having the above configuration, the notification effect can be performed at an appropriate timing.

[63rd to 69th gaming machines]
In addition, in pachinko machines, if an abnormality occurs during a game, the progress of the game may have to be interrupted until the abnormality is resolved. Attempts have been made to do so, and Japanese Patent Application Laid-Open No. 2004-181219 states that when an abnormality occurs, the information regarding the abnormality is changed according to the passage of time so that the store clerk can smoothly repair the abnormality. The game machines that can be played are disclosed.

However, in the above-mentioned gaming machine, even if the repair time is shortened, the progress of the game is interrupted during the repair, so that the interest of the game may be reduced.

The present invention has been made to solve the 29th problem, and a 29th object of the present invention is to provide a gaming machine capable of eliminating an abnormality without interrupting the game when a predetermined abnormality occurs. That is.

In order to solve the 29th problem, the present invention provides the 63rd gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game machine including a game control means for controlling (for example, a main control circuit 90) and an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), wherein the game control means is a player. A transition determining means (eg, for example) that determines whether or not to transition to an advantageous state (for example, ART state) that is advantageous to the user, and rank information (for example, the rank of the ART state) indicating the magnitude of the degree of advantage during the advantageous state. With respect to the main control circuit 90), the advantageous state control means (for example, the main control circuit 90) that shifts the gaming state to the advantageous state, and the staging control means when it is determined that the transition determining means shifts to the advantageous state. A transmission means (for example, the main control circuit 90) for transmitting information regarding the result of the game is provided, and the staging control means shifts the advantageous state to the advantageous state as information regarding the result of the game from the game control means. Upon receiving the information indicating to be performed and the rank information in the advantageous state to be transferred, one rank suggestion effect (for example, a weapon according to the rank) is displayed from a plurality of rank suggestion effects according to the rank information. An effect determining means (for example, a sub-control circuit 200) capable of determining an effect to be performed) and an effect means (for example, a sub-control circuit 200, a display device 11) for executing the one rank suggestion effect determined by the effect determining means. And, the effect determining means of the effect control means receives information from the game control means regarding the result of the game, indicating that the advantageous state shifts to the advantageous state. A gaming machine characterized in that a dedicated notification effect is determined as an effect to be performed by the effect means when the rank information in the advantageous state cannot be received.

In order to solve the 29th problem, the present invention provides a 64th gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game machine including a game control means for controlling (for example, a main control circuit 90) and an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), wherein the game control means is a player. A transition determination means (eg, for example) that determines whether or not to shift to an advantageous state (for example, ART state) that is advantageous to the user, and rank information (for example, the rank of the ART state) indicating the magnitude of the degree of advantage during the advantageous state. The main control circuit 90), the advantageous state control means (for example, the main control circuit 90) that shifts the gaming state to the advantageous state when it is determined that the transition determining means shifts to the advantageous state, and the said during the advantageous state. The privilege granting means (for example, the main control circuit 90) capable of granting the privilege according to the rank information determined by the transition determining means, and the transmitting means (for example) for transmitting information regarding the result of the game to the effect control means. , The main control circuit 90), and the effect control means includes information indicating that the advantageous state shifts to the advantageous state as information regarding the result of the game from the game control means, and the transitioning advantageous state. Upon receiving the rank information, an effect determining means (for example, an effect of displaying a weapon according to the rank) can be determined from a plurality of rank suggestion effects according to the rank information. The sub-control circuit 200) and the effect means (for example, the sub-control circuit 200, the display device 11) for executing the one rank suggestion effect determined by the effect control means are provided, and the effect determination of the effect control means is provided. When the means cannot receive the rank information of the advantageous state to be transferred even though the information indicating that the advantageous state shifts to the advantageous state is received from the game control means as information regarding the result of the game. , The dedicated notification effect is determined as the effect to be executed by the effect means, and the transmission means of the game control means transmits the rank information as information regarding the result of the game in each game in the advantageous state, and the effect control means. The effect determining means is characterized in that, in each game in the advantageous state, the effect in the advantageous state is determined based on the rank information received from the game control means.

In order to solve the 29th problem, the present invention provides a 65th gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A gaming machine including a game control means for controlling (for example, a main control circuit 90) and an effect control means for controlling an effect related to a game (for example, a sub control circuit 200). It has an advantageous state (for example, ART state) that is advantageous to the player as compared with the normal state, and a high probability state (for example, CZ) that has a higher probability of shifting to the advantageous state than the normal state. The game control means is a transition determining means (for example, a main control circuit) that determines whether or not to shift to the advantageous state and rank information (for example, the rank of the ART state) indicating the magnitude of the degree of advantage in the advantageous state. 90), the advantageous state control means (for example, the main control circuit 90) that shifts the gaming state to the advantageous state when it is determined that the transition determining means shifts to the advantageous state, and the gaming state when a predetermined condition is satisfied. The game control is provided with a high-probability state control means (for example, a main control circuit 90) that shifts to the high-probability state and ends the high-probability state when the remaining game period of the high-probability state reaches a threshold value. When the advantageous state control means of the means determines that the transition determining means shifts to the advantageous state during the high probability state, the gaming state shifts from the high probability state to the advantageous state, and the game control means said. When the gaming state shifts to the advantageous state during the high-probability state, the high-probability state control means interrupts the high-probability state until the advantageous state ends, and the high-probability state with the end of the advantageous state. The game control means can extend the remaining game period in the high probability state by a predetermined period during the advantageous state according to the rank information determined by the transition determination means (for example, mainly). The control circuit 90) is further provided with a transmission means (for example, a main control circuit 90) for transmitting information regarding the result of the game to the effect control means, and the effect control means is from the game control means to the game. When the information indicating that the advantageous state shifts to the advantageous state and the rank information in the transitioning advantageous state are received as the information regarding the result, one of a plurality of rank suggestion effects is received according to the rank information. An effect determining means (for example, an auxiliary control circuit 200) capable of determining a rank suggestion effect (for example, an effect of displaying a weapon according to a rank), and The effect determining means of the effect control means includes the effect means (for example, the sub-control circuit 200, the display device 11) for executing the one rank suggestion effect determined by the effect determining means, and the effect determining means of the effect control means is the game control means. As information related to the result of the game, when the information indicating that the advantageous state shifts to the advantageous state is received, but the rank information of the transitioning advantageous state cannot be received, the staging means executes the effect. A game machine characterized by deciding a dedicated announcement production.

In order to solve the 29th problem, the present invention provides a 66th gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game machine including a game control means for controlling (for example, a main control circuit 90) and an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), wherein the game control means is a player. A privilege determining means (for example, the main) for determining whether or not to grant a privilege (for example, ART state) to the user, and the number of the privilege to be granted (for example, the number of stocks in the ART state) when the privilege is granted. When the control circuit 90) and the privilege determining means determine that the privilege is to be granted, the privilege granting means (for example, the main control circuit 90) that grants the privilege at a predetermined timing thereafter can be granted to the player. When the main side counter (for example, the main control circuit 90, the main side counter) that counts the first numerical information indicating the number of the privilege and the privilege determining means decide to give the privilege, the first numerical information is used. When the number of the privilege determined to be granted is added and the privilege granting means grants the privilege, the first numerical information counted by the main counter is subtracted by 1. The main control circuit 90 is provided with a main counter updating means (for example, the main control circuit 90) and a transmission means (for example, the main control circuit 90) for transmitting information regarding the result of the game to the effect control means. The control means counts the second numerical information indicating the number of the benefits that have not been notified to the player that the grant of the benefits has been decided among the number of the benefits that can be granted to the player. Of the number of the first sub-side counter (for example, the sub-control circuit 200, the unreported counter) and the privilege that can be granted to the player, the player is informed that the privilege is determined to be granted. The second sub-side counter (for example, the sub-control circuit 200, the notified counter) that counts the third numerical information indicating the number of the notified benefits, and the second numerical information whose first sub-side counter has a predetermined value or more. When the notification condition is satisfied in the state of counting, the notification means (for example, the sub-control circuit 200, the display device 11) for notifying that a specific number of the above benefits have been granted and the first sub-side counter count. The second numerical value information is provided, and the sub-side counter updating means (for example, the sub-control circuit 200) for updating the third numerical value information counted by the second sub-side counter is provided. When the sub-side counter updating means of the effect control means grasps that the value of the first numerical information has increased when the information regarding the result of the game is received from the game control means, the second numerical information When a value corresponding to the grasp is added to the above (for example, an unreported counter is added at the time of stocking) and the notification means notifies that the privilege has been granted, the second numerical information is used as described above. The specific number notified by the notification means is subtracted, the specific number notified by the notification means is added to the third numerical value information (for example, the unreported counter is subtracted when the notification condition is satisfied). , The notified counter is added), and when it is found that the value of the first numerical information has decreased when the information regarding the result of the game is received from the game control means, the second numerical information or the second numerical information or The value corresponding to the grasp is subtracted from the third numerical value information (for example, the sub-side counter is subtracted at the time of stock release), and the effect control means receives the main as information about the result of the game from the game control means. The first numerical information counted by the side counter, the second numerical information counted by the first sub-side counter updated by the sub-side counter updating means in the current game, and the sub-side counter updating means are the current game. A comparison means (for example, the sub-control circuit 200) for comparing the fourth numerical value information, which is the total value of the third numerical value information counted by the second sub-side counter updated in the above, at the end of one game. Further, in the sub-side counter updating means of the effect control means, when the fourth numerical information is larger than the first numerical information as a result of the comparison of the comparison means, the fourth numerical information is the first. A gaming machine characterized in that the value of the second numerical information or the third numerical information is subtracted so as to match the numerical information.

In order to solve the 29th problem, the present invention provides a 67th gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game machine including a game control means for controlling (for example, a main control circuit 90) and an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), wherein the game control means is a player. A privilege determining means (for example, the main) for determining whether or not to grant a privilege (for example, ART state) to the user, and the number of the privilege to be granted (for example, the number of stocks in the ART state) when the privilege is granted. When the control circuit 90) and the privilege determining means determine that the privilege is to be granted, the privilege granting means (for example, the main control circuit 90) that grants the privilege at a predetermined timing thereafter can be granted to the player. When the main side counter (for example, the main control circuit 90, the main side counter) that counts the first numerical information indicating the number of the privilege and the privilege determining means decide to give the privilege, the first numerical information is used. When the number of the privilege determined to be granted is added and the privilege granting means grants the privilege, the first numerical information counted by the main counter is subtracted by 1. The main control circuit 90 is provided with a main counter updating means (for example, the main control circuit 90) and a transmission means (for example, the main control circuit 90) for transmitting information regarding the result of the game to the effect control means. The control means counts the second numerical information indicating the number of the benefits that have not been notified to the player that the grant of the benefits has been decided among the number of the benefits that can be granted to the player. Of the number of the first sub-side counter (for example, the sub-control circuit 200, the unreported counter) and the privilege that can be granted to the player, the player is informed that the privilege is determined to be granted. The second sub-side counter (for example, the sub-control circuit 200, the notified counter) that counts the third numerical information indicating the number of the notified benefits, and the second numerical information whose first sub-side counter has a predetermined value or more. When the notification condition is satisfied in the state of counting, the notification means (for example, the sub-control circuit 200, the display device 11) for notifying that a specific number of the above benefits have been granted and the first sub-side counter count. The second numerical value information is provided, and the sub-side counter updating means (for example, the sub-control circuit 200) for updating the third numerical value information counted by the second sub-side counter is provided. When the sub-side counter updating means of the effect control means grasps that the value of the first numerical information has increased when the information regarding the result of the game is received from the game control means, the second numerical information When a value corresponding to the grasp is added to the above (for example, an unreported counter is added at the time of stocking) and the notification means notifies that the privilege has been granted, the second numerical information is used as described above. The specific number notified by the notification means is subtracted, the specific number notified by the notification means is added to the third numerical value information (for example, the unreported counter is subtracted when the notification condition is satisfied). , The notified counter is added), and when it is found that the value of the first numerical information has decreased when the information regarding the result of the game is received from the game control means, the second numerical information or the second numerical information or The value corresponding to the grasp is subtracted from the third numerical value information (for example, the sub-side counter is subtracted at the time of stock release), and the effect control means receives the main as information about the result of the game from the game control means. The first numerical information counted by the side counter, the second numerical information counted by the first sub-side counter updated by the sub-side counter updating means in the current game, and the sub-side counter updating means are the current game. A comparison means (for example, the sub-control circuit 200) for comparing the fourth numerical value information, which is the total value of the third numerical value information counted by the second sub-side counter updated in the above, at the end of one game. Further, in the sub-side counter updating means of the effect control means, when the fourth numerical information is smaller than the first numerical information as a result of the comparison of the comparison means, the fourth numerical information is the first. A gaming machine characterized in that the value of the third numerical information is added so as to match the numerical information.

In order to solve the 29th problem, the present invention provides a 68th gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game machine including a game control means for controlling (for example, a main control circuit 90) and an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), wherein the game control means is a player. A privilege determining means (for example, the main) for determining whether or not to grant a privilege (for example, ART state) to the user, and the number of the privilege to be granted (for example, the number of stocks in the ART state) when the privilege is granted. When the control circuit 90) and the privilege determining means determine that the privilege is to be granted, the privilege granting means (for example, the main control circuit 90) that grants the privilege at a predetermined timing thereafter can be granted to the player. When the main side counter (for example, the main control circuit 90, the main side counter) that counts the first numerical information indicating the number of the privilege and the privilege determining means decide to give the privilege, the first numerical information is used. When the number of the privilege determined to be granted is added and the privilege granting means grants the privilege, the first numerical information counted by the main counter is subtracted by 1. The main control circuit 90 is provided with a main counter updating means (for example, the main control circuit 90) and a transmission means (for example, the main control circuit 90) for transmitting information regarding the result of the game to the effect control means. The control means counts the second numerical information indicating the number of the benefits that have not been notified to the player that the grant of the benefits has been decided among the number of the benefits that can be granted to the player. Of the number of the first sub-side counter (for example, the sub-control circuit 200, the unreported counter) and the privilege that can be granted to the player, the player is informed that the privilege is determined to be granted. The second sub-side counter (for example, the sub-control circuit 200, the notified counter) that counts the third numerical information indicating the number of the notified benefits, and the second numerical information whose first sub-side counter has a predetermined value or more. When the notification condition is satisfied in the state of counting, the notification means (for example, the sub-control circuit 200, the display device 11) for notifying that a specific number of the above benefits have been granted and the first sub-side counter count. The second numerical value information is provided, and the sub-side counter updating means (for example, the sub-control circuit 200) for updating the third numerical value information counted by the second sub-side counter is provided. When the sub-side counter updating means of the effect control means grasps that the value of the first numerical information has increased when the information regarding the result of the game is received from the game control means, the second numerical information When a value corresponding to the grasp is added to the above (for example, an unreported counter is added at the time of stocking) and the notification means notifies that the privilege has been granted, the second numerical information is used as described above. The specific number notified by the notification means is subtracted, the specific number notified by the notification means is added to the third numerical value information (for example, the unreported counter is subtracted when the notification condition is satisfied). , The notified counter is added), and when it is found that the value of the first numerical information has decreased when the information regarding the result of the game is received from the game control means, the second numerical information or the second numerical information or The value corresponding to the grasp is subtracted from the third numerical value information (for example, the sub-side counter is subtracted at the time of stock release), and the effect control means is the privilege granting means as information regarding the result of the game from the game control means. A determination means (for example, the sub-control circuit 200) for determining whether or not the information indicating that the privilege has been granted is received at the end of one game, and information on the result of the game from the game control means. The first numerical value information counted by the main side counter received as, the second numerical value information counted by the first sub side counter updated by the sub side counter updating means in this game, and the sub side counter update. A comparison means (for example, a sub-control circuit) for comparing the fourth numerical value information, which is the total value of the third numerical information counted by the second sub-side counter updated in the current game, at the end of one game. 200), and the sub-side counter updating means of the effect control means has the fourth numerical value information larger than the first numerical value information as a result of comparison of the comparison means, and the determination means. When it is determined that the privilege has been granted in this game, the game is characterized in that the value of the third numerical information is subtracted so that the fourth numerical information matches the first numerical information. Machine.

In order to solve the 29th problem, the present invention provides a 69th gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game machine including a game control means for controlling (for example, a main control circuit 90) and an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), wherein the game control means is a player. A privilege determining means (for example, the main) for determining whether or not to grant a privilege (for example, ART state) to the user, and the number of the privilege to be granted (for example, the number of stocks in the ART state) when the privilege is granted. When the control circuit 90) and the privilege determining means determine that the privilege is to be granted, the privilege granting means (for example, the main control circuit 90) that grants the privilege at a predetermined timing thereafter can be granted to the player. When the main side counter (for example, the main control circuit 90, the main side counter) that counts the first numerical information indicating the number of the privilege and the privilege determining means decide to give the privilege, the first numerical information is used. When the number of the privilege determined to be granted is added and the privilege granting means grants the privilege, the first numerical information counted by the main counter is subtracted by 1. The main control circuit 90 is provided with a main counter updating means (for example, the main control circuit 90) and a transmission means (for example, the main control circuit 90) for transmitting information regarding the result of the game to the effect control means. The control means counts the second numerical information indicating the number of the benefits that have not been notified to the player that the grant of the benefits has been decided among the number of the benefits that can be granted to the player. Of the number of the first sub-side counter (for example, the sub-control circuit 200, the unreported counter) and the privilege that can be granted to the player, the player is informed that the privilege is determined to be granted. The second sub-side counter (for example, the sub-control circuit 200, the notified counter) that counts the third numerical information indicating the number of the notified benefits, and the second numerical information whose first sub-side counter has a predetermined value or more. When the notification condition is satisfied in the state of counting, the notification means (for example, the sub-control circuit 200, the display device 11) for notifying that a specific number of the above benefits have been granted and the first sub-side counter count. The second numerical value information is provided, and the sub-side counter updating means (for example, the sub-control circuit 200) for updating the third numerical value information counted by the second sub-side counter is provided. When the sub-side counter updating means of the effect control means grasps that the value of the first numerical information has increased when the information regarding the result of the game is received from the game control means, the second numerical information When a value corresponding to the grasp is added to the above (for example, an unreported counter is added at the time of stocking) and the notification means notifies that the privilege has been granted, the second numerical information is used as described above. The specific number notified by the notification means is subtracted, the specific number notified by the notification means is added to the third numerical value information (for example, the unreported counter is subtracted when the notification condition is satisfied). , The notified counter is added), and when it is found that the value of the first numerical information has decreased when the information regarding the result of the game is received from the game control means, the second numerical information or the second numerical information or The value corresponding to the grasp is subtracted from the third numerical value information (for example, the sub-side counter is subtracted at the time of stock release), and the effect control means is the privilege granting means as information regarding the result of the game from the game control means. A determination means (for example, the sub-control circuit 200) for determining whether or not the information indicating that the privilege has been granted is received at the end of one game, and information on the result of the game from the game control means. The first numerical value information counted by the main side counter received as, the second numerical value information counted by the first sub side counter updated by the sub side counter updating means in this game, and the sub side counter update. A comparison means (for example, a sub-control circuit) for comparing the fourth numerical value information, which is the total value of the third numerical information counted by the second sub-side counter updated in the current game, at the end of one game. 200), and the sub-side counter updating means of the effect control means has the fourth numerical value information larger than the first numerical value information as a result of comparison of the comparison means, and the determination means. When it is determined that the privilege is not given in this game, the value of the second numerical information is subtracted so that the fourth numerical information matches the first numerical information. A game machine to play.

According to the 63rd to 69th gaming machines of the present invention having the above configuration, it is possible to eliminate the abnormality without interrupting the game when a predetermined abnormality occurs.

[70th to 73rd gaming machines]
Further, as an AT (ART) machine, Japanese Patent Application Laid-Open No. 2004-181219 describes a gaming machine that performs an additional effect when an AT period is added and notifies the extended period. For the player, it is possible to grasp that the AT period has been extended from the additional production, so that the interest of the game can be enhanced.

By the way, even if the AT period is added, if the player can grasp that some disadvantage has occurred due to the additional effect, the additional effect may rather reduce the interest of the game. As an example, when the AT period reaches the upper limit due to the addition of the AT period (canst), the player performs a so-called pull when the addition effect is performed and the player is notified that the addition of the fractional minutes up to the canst has been performed. I can understand that it was a loss, and I feel dissatisfied.

The present invention has been made to solve the thirtieth problem, and the thirtieth object of the present invention is to provide a gaming machine capable of suppressing a decrease in the interest of the game when the additional effect is executed. It is to be.

In order to solve the thirtieth problem, the present invention provides a 70th gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game control means for controlling (for example, a main control circuit 90), an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), and an effect means capable of executing a predetermined effect (for example, a display device 11). The game control means includes a counter (for example, the main control circuit 90) for counting predetermined numerical information (for example, the number of remaining games in the ART state), and the counter for counting. A counter updating means for updating numerical information (for example, the main control circuit 90), and a plurality of increase amounts (for example, the number of candidate games) that are predetermined and have different values when predetermined conditions are satisfied. An increase amount determining means (for example, the main control circuit 90) for determining one increase amount (for example, the number of lottery result games) and a transmission means (for example, the main control circuit 90) for transmitting information regarding the result of the game to the effect control means. The counter updating means of the game control means includes a control circuit 90), and when the increase amount determining means determines the increase amount of the one, the counter counts even if the increase amount of the one is added. When the numerical information does not reach the upper limit value, the increase amount of the one is added to the numerical information counted by the counter, and when the increase amount of the one is added, the numerical value counted by the counter. When the information reaches the upper limit value, the numerical information counted by the counter is added up to the upper limit value, and the numerical information counted by the counter is subtracted according to the game. When the counter updating means receives the information regarding the actual increase amount (for example, the actual number of additional games) indicating the amount of the increased numerical information as the information regarding the result of the game from the game control means, the said An additional effect indicating that the numerical information has increased can be executed by controlling the effect means, but when the actual increase amount does not match any of the predetermined increase amounts, the above-mentioned A gaming machine characterized in that the additional effect is not performed at a predetermined timing.

In order to solve the thirtieth problem, the present invention provides a 71st gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game control means for controlling (for example, a main control circuit 90), an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), and an effect means capable of executing a predetermined effect (for example, a display device 11). The game control means includes a counter (for example, the main control circuit 90) for counting predetermined numerical information (for example, the number of remaining games in the ART state), and the counter for counting. A counter updating means for updating numerical information (for example, the main control circuit 90), and a plurality of increase amounts (for example, the number of candidate games) that are predetermined and have different values when predetermined conditions are satisfied. An increase amount determining means (for example, the main control circuit 90) for determining one increase amount (for example, the number of lottery result games) and a transmission means (for example, the main control circuit 90) for transmitting information regarding the result of the game to the effect control means. The counter updating means of the game control means includes a control circuit 90), and when the increase amount determining means determines the increase amount of the one, the counter counts even if the increase amount of the one is added. When the numerical information does not reach the upper limit value, the increase amount of the one is added to the numerical information counted by the counter, and when the increase amount of the one is added, the numerical value counted by the counter. When the information reaches the upper limit value, the numerical information counted by the counter is added up to the upper limit value, and the numerical information counted by the counter is subtracted according to the game. When the counter updating means receives the information regarding the actual increase amount (for example, the actual number of additional games) indicating the amount of the increased numerical information as the information regarding the result of the game from the game control means, the said An additional effect indicating that the numerical information has increased can be executed by controlling the effect means, but when the actual increase amount does not match any of the predetermined increase amounts, the above-mentioned When there is an increase amount of a value smaller than the actual increase amount among the plurality of predetermined increases, the maximum amount of the increase amount of the value smaller than the actual increase amount at the predetermined timing. The additional effect indicating that the numerical information has increased by the amount of increase in the value is performed, and the increase is smaller than the actual increase in the plurality of predetermined increases. A gaming machine characterized in that the addition effect is not performed at the predetermined timing when there is no increase in the minimum value.

In order to solve the thirtieth problem, the present invention provides a 72nd gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game control means for controlling (for example, a main control circuit 90), an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), and an effect means capable of executing a predetermined effect (for example, a display device 11). The game control means includes a counter (for example, the main control circuit 90) for counting predetermined numerical information (for example, the number of remaining games in the ART state), and the counter for counting. A counter updating means for updating numerical information (for example, the main control circuit 90), and a plurality of increase amounts (for example, the number of candidate games) that are predetermined and have different values when predetermined conditions are satisfied. An increase amount determining means (for example, the main control circuit 90) for determining one increase amount (for example, the number of lottery result games) and a transmission means (for example, the main control circuit 90) for transmitting information regarding the result of the game to the effect control means. The counter updating means of the game control means includes a control circuit 90), and when the increase amount determining means determines the increase amount of the one, the counter counts even if the increase amount of the one is added. When the numerical information does not reach the upper limit value, the increase amount of the one is added to the numerical information counted by the counter, and when the increase amount of the one is added, the numerical value counted by the counter. When the information reaches the upper limit value, the numerical information counted by the counter is added up to the upper limit value, and the numerical information counted by the counter is subtracted according to the game. When the counter updating means receives the information regarding the actual increase amount (for example, the actual number of additional games) indicating the amount of the increased numerical information as the information regarding the result of the game from the game control means, the said An additional effect indicating that the numerical information has increased can be executed by controlling the effect means, but when the actual increase amount does not match the one increase amount determined by the increase amount determining means, the above-mentioned A gaming machine characterized in that the additional effect is not performed at a predetermined timing.

In order to solve the thirtieth problem, the present invention provides a 73rd gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game control means for controlling (for example, a main control circuit 90), an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), and an effect means capable of executing a predetermined effect (for example, a display device 11). The game control means includes a counter (for example, the main control circuit 90) for counting predetermined numerical information (for example, the number of remaining games in the ART state), and the counter for counting. A counter updating means for updating numerical information (for example, the main control circuit 90), and a plurality of increase amounts (for example, the number of candidate games) that are predetermined and have different values when predetermined conditions are satisfied. An increase amount determining means (for example, the main control circuit 90) for determining one increase amount (for example, the number of lottery result games) and a transmission means (for example, the main control circuit 90) for transmitting information regarding the result of the game to the effect control means. The counter updating means of the game control means includes a control circuit 90), and when the increase amount determining means determines the increase amount of the one, the counter counts even if the increase amount of the one is added. When the numerical information does not reach the upper limit value, the increase amount of the one is added to the numerical information counted by the counter, and when the increase amount of the one is added, the numerical value counted by the counter. When the information reaches the upper limit value, the numerical information counted by the counter is added up to the upper limit value, and the numerical information counted by the counter is subtracted according to the game. When the effect control means receives from the game control means information regarding an actual increase amount (for example, the actual number of additional games) indicating the amount of the numerical information increased by the counter update means as information regarding the result of the game. It is possible to control the effect means to perform an additional effect indicating that the numerical information has increased at a predetermined timing, but the actual increase amount coincides with the one increase amount determined by the increase amount determining means. If not, if there is an increase in a value smaller than the actual increase in the plurality of predetermined increases, the increase in the value equal to or less than the actual increase at the predetermined timing. The additional effect indicating that the numerical information has increased by the amount of increase of the maximum value among them is performed, and the actual increase is made in the plurality of predetermined increases. A gaming machine characterized in that the addition effect is not performed at the predetermined timing when there is no increase in a value smaller than the addition amount.

According to the 70th to 73rd gaming machines of the present invention having the above configuration, it is possible to provide a gaming machine capable of suppressing a decrease in the interest of the game when the additional effect is executed.

[74th to 75th gaming machines]
Further, in a gaming machine such as a pachislot machine, in order to appropriately manage the payout rate (ball payout) of medals, it is required that the main side controls the payout of medals. However, since the main board has more restrictions than the sub board, in recent years, attention has been paid to measures for suppressing the control load on the main side. In this regard, for example, Japanese Patent Application Laid-Open No. 2016-209720 describes a gaming machine that notifies medal insertion on the sub side in order to reduce the control load on the main side.

According to such a gaming machine, although the control load on the main side can be reduced to a certain extent, there is room for further improvement in reducing the control load.

The present invention has been made to solve the above-mentioned 31st problem, and a 31st object of the present invention is to provide a gaming machine capable of reducing a control load on the main side.

In order to solve the 31st problem, the present invention provides the 74th gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. A game machine including a game control means for controlling (for example, a main control circuit 90) and an effect control means for controlling an effect related to a game (for example, a sub control circuit 200), wherein the game control means is the effect. A transmission means (for example, a main control circuit 90) for transmitting the values of a plurality of parameters related to the game in one unit game is provided to the control means, and the staging control means is one received from the game control means. A game state specifying means (for example, a sub-control circuit 200) for specifying the current game state by combining the value of the parameter and the value of another parameter corresponding to the information about the game different from the one parameter is provided. A featured gaming machine.

In order to solve the 31st problem, the present invention provides a 75th gaming machine having the following configuration.

A variable display means (for example, reels 3L, 3C, 3R) capable of variablely displaying a plurality of identification displays (for example, symbols displayed on the reels 3L, 3C, 3R) and a game progress using the variable display means. The game control means to be controlled (for example, the main control circuit 90) and the game control means have a plurality of parameters related to the game in the first timing and the second timing in one game with respect to the staging control means. A transmission means (for example, a sub-control circuit 200) for transmitting a value is provided, and the staging control means has a value of one parameter received from the game control means at the same timing and a game different from the one parameter. A game state specifying means (for example, the sub-control circuit 200) that specifies the current game state by combining with the values of other parameters corresponding to the information regarding the staging control means, and the parameter received from the staging control means at the first timing. The gaming machine is characterized by comprising a game result specifying means (for example, a sub-control circuit 200) for specifying the result of the current game from the value of the above and the value of the parameter received at the second timing.

According to the 74th to 75th gaming machines of the present invention having the above configuration, it is possible to provide a gaming machine capable of reducing the control load on the main side.

1 ... Pachislot, 3L, 3C, 3R ... Reel, 4 ... Reel display window, 6 ... Information display, 11 ... Display device, 17L, 17C, 17R ... Stop button, 18 ... Sub display device, 71 ... Main control board, 72 ... Sub control board, 90 ... Main control circuit, 91 ... Microprocessor, 101 ... Main CPU, 102 ... Main ROM, 103 ... Main RAM, 107 ... Arithmetic circuit, 114 ... First serial communication circuit, 115 ... Second serial Communication circuit, 200 ... Sub control circuit, 201 ... Sub CPU 201, 301 ... First interface board, 302 ... Second interface board

Claims (1)

A game control means that controls the game,
A staging control means that controls the staging,
A start operation detection means that can detect a start operation by a player,
Multiple reels with multiple types of symbols and
Based on the detection of the start operation by the start operation detection means, the rotation means for rotating the plurality of reels and the rotation means.
A stop operation detecting means provided corresponding to each reel of the plurality of reels and capable of detecting a stop operation,
A stop control means for stopping the rotation of the reel based on the detection of the stop operation by the stop operation detection means,
Equipped with
The game control means is
Arithmetic processing means that performs arithmetic processing related to the game,
A first storage means in which information necessary for executing the arithmetic processing by the arithmetic processing means is stored, and
A second storage means for storing information necessary for executing the calculation process by the calculation processing means, and a second storage means.
Information control means that can control multiple types of management information related to the transition of the game state,
Equipped with
The arithmetic processing means has a plurality of general-purpose registers in which data is stored when the arithmetic processing is executed by the arithmetic processing means.
The first storage means has at least a first storage area in which a program related to playability is stored and a second storage area in which a program not directly related to playability is stored.
The second storage means has a first storage area used by a program stored in the first storage area and a second storage area used by a program stored in the second storage area.
In the first storage area,
A constant speed rotation determination process for determining whether or not the rotation of the reel has reached a predetermined constant speed, and
A transmission process for transmitting the management information from the game control means to the staging control means, and
Is remembered,
The effect control means can determine the effect game state based on at least two or more types of the management information transmitted in the transmission process, and control the effect based on the effect game state. It is possible and
The gaming state includes a normal state, an advantageous state that is more advantageous to the player than the normal state, and a highly accurate state that makes it easier to determine that the transition to the advantageous state is more than the normal state .
The high-accuracy state ends with the lapse of a predetermined period from the start, and when the remaining period becomes equal to or less than a predetermined threshold value, the probability of determining the transition to the advantageous state may change. And
The effect control means can control the effect in the high accuracy state according to the information indicating that the gaming state is the high accuracy state and the information indicating the remaining period of the high accuracy state in the management information. ,
In the second storage area,
Port output processing that outputs on-data or off-data ports,
When the constant speed rotation determination process determines that the rotation of the reel has reached the predetermined constant speed, the on-data output process for outputting the on-data of the stoptable signal from the port output process and the on-data output process.
After the on-data output process outputs on-data, the off-data output process that outputs off-data of a stoptable signal from the port output process based on the fact that the stop operation is detected by the stop operation detection means, and the off-data output process. Is remembered,
In the on-data output process and the off-data output process executed by the arithmetic processing means, after saving the values of all the registers of the plurality of general-purpose registers, the port output process is called and then saved. After returning the values of all the registered registers to the plurality of general-purpose registers, it is possible to transfer to the program stored in the first storage area.
The off-data of the stoptable signal is generated by executing a plurality of logical operation instructions.
The on-data of the stoptable signal is generated by executing one logical operation instruction.
A gaming machine characterized by that.

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