JP7085054B1 - Synchronous rectification controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a synchronous rectification control device capable of operating with a high DUTY even when a converter is provided with a synchronous rectification function. A control device according to the present invention is a control device that controls the operation of a main switch 11 and a sub switch 12 of a DC / DC converter 301, and has an ascending time for increasing voltage and a descending time for decreasing voltage. The circuit for the main switch that generates the main switch gate signal Gm that turns the main switch 11 on and off by comparing the voltage of the triangular wave S2 with the threshold value (error amplification signal S1) using the triangular wave S2, and the rising time and the falling time. Sub-switch gate signals Gs that turn on the sub-switch after a predetermined time (dead time) from the time when the voltage of the triangular wave S2 reaches the threshold in one period and turn off the sub-switch when the period ends. It is characterized by comprising a synchronous rectification circuit for generating the above. [Selection diagram] Fig. 3

Description

The present disclosure relates to a synchronous rectification control device that controls a synchronous rectification operation of a converter.

There is a synchronous rectification method as a method of reducing the loss of the power semiconductor of the converter. The synchronous rectification method consists of two power semiconductors, a main switch and a sub switch (synchronous rectification switch). The gate signal for driving this main switch is generated by comparing a carrier signal that changes in a sawtooth shape as in Non-Patent Document 1 with a predetermined voltage. The gate signal of the sub switch is generated by logically inverting the gate signal of the power semiconductor that is the main switch (see FIG. 1). At this time, in order to prevent the two power semiconductors from being turned on at the same time, it is common to provide a dead time during which both power semiconductors are turned off (see, for example, Patent Document 1). In the present specification, the power semiconductor represented by reference numeral 11 of the DC / DC converter as shown in FIG. 2 will be referred to as a “main switch”, and the power semiconductor for synchronous rectification indicated by reference numeral 12 will be referred to as a “secondary switch”.

Japanese Unexamined Patent Publication No. 2017-070059

Edited by Takamasa Hori, "Power Electronics", Ohmsha, published on November 11, 2008

As shown in FIG. 1, it is necessary to provide a dead time for the gate signal in the main switch and the sub switch of the synchronous rectification type converter. Due to the existence of this dead time, there is an upper limit to the period during which the main switch can be turned on, and it is difficult to operate with a high duty (DUTY).

That is, the conventional synchronous rectification has a problem that it is difficult to operate with a high DUTY because the time during which the main switch can be turned on is reduced by the dead time provided in the gate signal of the main switch in the switching cycle. ..

Therefore, in order to solve the above problems, it is an object of the present invention to provide a synchronous rectification control device capable of operating with a high DUTY even when the converter is provided with a synchronous rectification function.

In order to achieve the above object, the synchronous rectification control device according to the present invention has decided to provide a dead time only in the gate signal of the sub switch that performs synchronous rectification.

Specifically, the control device according to the present invention is a synchronous rectification control device that controls the operation of the main switch of the DC / DC converter and the sub switch for synchronous rectification.
Using a triangular wave having an ascending time and a descending time, the voltage of the triangular wave is compared with the threshold value, and the voltage of the triangular wave is the threshold value during one of the ascending time and the descending time. A circuit for the main switch that turns off the main switch when becomes, and generates a main switch gate signal that turns on the main switch when the voltage of the triangular wave reaches the threshold value in the other period .
A sub switch gate that turns on the sub switch after a predetermined time (dead time) from the time when the voltage of the triangular wave reaches the threshold value in the one period, and turns off the sub switch when the one period ends. Synchronous rectification circuit that generates signals and
It is characterized by having.

The control device and the method thereof according to the present invention use a triangular wave as a carrier signal required for PWM. The comparison result between the triangular wave and the threshold value is replaced with the HIGH and LOW digital signals to be used as the gate signal of the main switch. Furthermore, the gate signal of the main switch is used to create a gate signal for the sub switch that prevents the main switch and the sub switch from being turned on at the same time. This eliminates the need to provide a dead time for the main switch and allows the converter to operate at a high DUTY.
It is preferable to set the triangular wave so that the ascending time and the descending time are different. By setting in this way, the ratio at which synchronous rectification is possible in the switching cycle can be increased as much as possible.
Therefore, the present invention can provide a synchronous rectification control device that can be operated with a high DUTY even when the converter has a synchronous rectification function.

The present invention can provide a synchronous rectification control device that can be operated with a high DUTY even when the converter has a synchronous rectification function.

It is a figure explaining the subject of this invention. It is a figure explaining the DC / DC converter provided with the control device which concerns on this invention. It is a figure explaining the control apparatus which concerns on this invention. It is a figure explaining the operation of the control device which concerns on this invention. It is a figure explaining the operation of the control device which concerns on this invention. It is a figure explaining the operation of the control device which concerns on this invention. It is a figure explaining the operation of the control device which concerns on this invention. It is a figure explaining the DC / DC converter provided with the control device which concerns on this invention. It is a figure explaining the DC / DC converter provided with the control device which concerns on this invention.

An embodiment of the present invention will be described with reference to the accompanying drawings. The embodiments described below are examples of the present invention, and the present invention is not limited to the following embodiments. In the present specification and the drawings, the components having the same reference numerals shall indicate the same components.

(Embodiment 1)
FIG. 2 is a diagram illustrating a DC / DC converter 301 to which the control device 50 of the present embodiment is connected. The DC / DC converter 301 includes a main switch 11, a sub switch 12, an inductor 13, and a capacitor 14.

The control device 50 is a control device that controls the operation of the main switch 11 and the sub switch 12 of the DC / DC converter 301.
The main switch gate signal _Gm that turns on and off the main switch 11 by comparing the voltage of the triangular wave S ₂ with the threshold value (error amplification signal S ₁ ) using the triangular wave S ₂ in which the rising time and the falling time of the voltage exist. The circuit for the main switch that generates
The sub switch 12 is turned on after a predetermined time (dead time) from the time when the voltage of the triangular wave S ₂ reaches the threshold value in one of the ascending time and the descending time, and when the period ends, the sub switch 12 is turned on. A synchronous rectification circuit that generates a sub-switch gate signal G _s that turns 12 off, and
It is characterized by having.

FIG. 3 is a diagram illustrating a circuit configuration of a control device 50 that generates a main switch gate signal G _m and a sub switch gate signal G _s from an error amplification signal S ₁ , a triangular wave S ₂ , and a determination signal S ₃ . The control device 50 includes a comparator 51, an inversion device 52, a dead time generator 53, an inversion device 54, a AND circuit 55, and a AND circuit 56. Of these, the comparator 51 corresponds to the main switch circuit, and the inverting device 52, the dead time generator 53, the inverting device 54, the AND circuit 55, and the AND circuit 56 correspond to the synchronous rectification circuit.

Further, FIG. 4 is a signal timing chart at various parts (A to I) of the circuit of the control device 50. Waveform W1 is an error amplification signal S ₁ , waveform W2 is a triangular wave S ₂ , waveform W3 is a judgment signal S ₃ , waveform W4 is a main switch gate signal G _m , waveform W 5 is a logic inversion signal of the main switch gate signal G _m , and waveform W 7 Is the dead time for the sub switch 12, and the waveform W8 is the sub switch gate signal _Gs . The above _- mentioned "threshold value" is the waveform W1 of the error amplification signal S1.

The circuit of FIG. 3 is an example, and any circuit may be used as long as it can obtain the signal as shown in FIG. In the circuit of FIG. 3, the comparator 51 corresponds to the main switch circuit, and the inverting device 52, the dead time generator 53, the inverting device 54, the AND circuit 55, and the AND circuit 56 are the synchronous rectification circuits. Corresponds to.
Further, each waveform in FIG. 4 is composed of HIGH and LOW, but if the timing is correct, HIGH and LOW may be reversed for each waveform.

The triangular wave S2 used by the control device 50 is a triangular wave waveform W2 in which an ascending _time for increasing the voltage and a descending time for decreasing the voltage exist. Here, the waveform W2 is not a sawtooth wave (a waveform in which the ascending or descending time is infinitely close to zero) as shown in FIG. If it is a sawtooth wave, it becomes impossible to distinguish between the rising time and the falling time of the voltage. As will be described later, the determination signal S3 is a waveform in which the rising time of the waveform W1 is HIGH and the falling time of the voltage is LOW, where HIGH is a synchronous rectification possible period and LOW is a pulse representing a synchronous rectification prohibition period. When the waveform W1 is a sawtooth wave, the synchronous rectification prohibition period disappears, and the main switch 11 and the sub switch 12 may be turned on at the same time. By setting the descending time as the prohibition period, the synchronous rectification is turned off, and the main switch 11 and the sub switch 12 are prevented from being turned on at the same time.

Further, in the triangular wave S2, it is preferable that the ascending _time and the descending time are not the same length, but the period is the longer of the ascending time and the descending time. That is, it is preferable that the triangular wave S2 has a longer period during which the synchronous rectification is possible. If the ascending time and the descending time are 50:50, synchronous rectification cannot be performed for at least half of the switching cycle, and the synchronous rectification possible period becomes short.

In the example of _FIG . 4, a triangular wave S2 having a long rising time is described. The determination signal S ₃ of the waveform W3 is generated with the voltage rise time of the triangular wave S ₂ being HIGH and the voltage drop time being LOW. It should be noted that a reverse _- phase triangular wave S2 having a long descending time may be used. In this case _, the waveform W3 of the determination signal S3 has a voltage rise time of LOW and a voltage fall time of HIGH.

_The comparator 51 compares the waveform W2 of the triangular wave S2 with the waveform W1 of the error amplification signal S1 which is the threshold value, turns on the main switch when the waveform W2 is lower _than the waveform W1, and the waveform W2 is higher than the waveform W1. Generates a main switch gate signal _Gm that turns off the main switch. The waveform _W4 of the main switch gate signal Gm can be observed at the point D in FIG. Here, the voltage error amplification signal S ₁ is the output of the error amplifier, and fluctuates in the direction of eliminating the error between the output voltage V _out of the DC / DC converter 301 and its target voltage.

The inverting device 52 generates a waveform W5 in which the main switch gate signal _Gm is inverted. The waveform W5 can be observed at point E. The logical product circuit 55 generates a waveform W6 that is a logical product of the waveform W3 (determination signal _S3 ) and the waveform W5. This AND waveform W6 can be observed at the point F.

When the main switch 11 is turned on (waveform W4 is HIGH), the waveform W1 is descending and the waveform W3 is LOW. Therefore, when the waveform W4 becomes HIGH due to the logical product of the logical product circuit 55, the gate signal _Gs (waveform W8) of the sub switch 12 does not become HIGH, and the main switch 11 and the sub switch 12 are turned on at the same time. Can be avoided.

Further, it is necessary to provide a dead time at the rising edge of the gate signal _Gs (waveform W8) of the sub switch 12. Therefore, the dead time generator 53 generates a waveform W7 (observable at the point G) representing the dead time portion from the waveform W5, and the inversion device 54 inverts the waveform W7. This inverted waveform is the waveform shown by hatching in the waveform W7, and can be observed at the point H. Finally, the logical AND circuit 56 generates a waveform W8 that is a logical product of the waveform W6 and the waveform shown by hatching among the waveforms W7. This waveform W8 is the gate signal _Gs of the sub switch 12 to which the dead time is added, and can be observed at the point I. When the main switch 11 is turned off, the sub switch gate signal G _s is LOW, and it is possible to prevent the main switch 11 and the sub switch 12 from being turned on at the same time.

In this way, the control device 50 can eliminate the dead time of the main switch by controlling the main switch 11 and the sub switch 12 of the DC / DC converter 301 as described above. Therefore, when the DUTY needs to be used in a wide range under the input / output conditions of the DC / DC converter 301, the control device 50 enables synchronous rectification without reducing the on-time of the main switch 11 and reduces the circuit loss. Can be reduced.

(Embodiment 2)
In this embodiment, the operation when the threshold value (error amplification signal S ₁ ) rises and approaches the peak voltage (upper limit) of the triangular wave S ₂ (when the DUTY is large) will be described. FIG. 5 is a timing chart of each signal when the DUTY of the DC / DC converter 301 is large. When the time for turning off the main switch 11 becomes shorter than the predetermined time, the synchronous rectification circuit generates a sub switch gate signal G _s for turning off the sub switch 12.

When it is necessary to lengthen the time that the main switch is turned on, the waveform W1 rises and approaches the peak voltage (upper limit) of the waveform W2, so that the LOW period of the main switch gate signal _Gm becomes shorter (DUTY becomes larger). .. At the same time, the HIGH period of the waveform W5 (logical inversion of the main switch gate signal) is also shortened. Since the period of the waveform W7 (dead time of the sub switch ₁₂ ) is constant, when the threshold value (error amplification signal S1) rises further, the HIGH period of the waveform W5 (logical inversion of the main switch gate signal) becomes shorter, and the waveform W7 (error amplification signal S1) becomes shorter. It will be included within the dead time of the sub switch 12).

In this state, the off time of the main switch 11 is shorter than the dead time of the sub switch 12, and the gate signal Gs of the sub switch 12, which is the waveform _W8 , is always off. Therefore, when the waveform W1 of the error amplification signal S1 rises and approaches the peak voltage of the waveform W2 of the triangular wave S2, the control device ₅₀ always stops the sub switch ₁₂ and stops the synchronous rectification.

When the DUTY is large as described above, the time when the main switch 11 is off, that is, the time when the body diode of the sub switch conducts is short, and the effect of improving efficiency by synchronous rectification is originally small. Therefore, even if the synchronous rectification is stopped when the DUTY is large, the efficiency of the DC / DC converter 301 does not significantly decrease.

(Embodiment 3)
_In this embodiment, the operation when the waveform W1 of the error amplification signal S1 is lowered and approaches the peak voltage ( _lower limit) of the waveform W2 of the triangular wave S2 will be described. FIG. 6 is a timing chart of each signal when the DUTY of the DC / DC converter 301 is small. The synchronous rectification circuit confirms the main switch gate signal G _m after a certain fixed time from the end of the period, and the main switch gate signal G _m is a value (waveform W4 is LOW) that turns off the main switch 11. If so, a sub switch gate signal G _s that turns off the sub switch 12 is generated.

When it is necessary to shorten the time when the main switch is turned _on , the waveform W1 of the error amplification signal S1 descends and approaches the peak voltage ( _lower limit) of the waveform W2 of the triangular wave S2, so that the waveform _W4 of the main switch gate signal Gm HIGH period becomes shorter (DUTY becomes smaller). Then, when the waveform W1 further decreases and becomes lower than the peak voltage (lower limit) of the waveform W2, the main switch 11 is always turned off. Therefore, when the DUTY is small, the synchronous rectification is stopped from the viewpoint of preventing the switch from malfunctioning.

Specifically, the control device 50 confirms the main switch gate signal _Gm after a certain fixed time from the time when the determination signal _S3 becomes LOW (waveform W9). If the main switch gate signal _Gm is LOW (value that turns off the main switch 11) when this fixed time elapses, the control device 50 always stops the operation of the sub switch 12 and stops the synchronous rectification. do.

Here, the fixed time is of two types.
One of the fixed times is used when the time of the value of the main switch gate signal _Gm at which the main switch 11 is turned on decreases.
The other of the fixed times is used when the time of the value of the main switch gate signal _Gm at which the main switch 11 is turned on increases, and is preferably longer than one of the fixed times.

When the fixed time is one, when the off timing of the main switch 11 is close to the time after the fixed time elapses, the control becomes unstable without straddling / straddling it. Therefore, a constant hysteresis is provided by two types of fixed times to stabilize the control.

FIG. 7 is a diagram illustrating an operation when the fixed time is two. FIG. 7A is a scene in which the on-time of the main switch gate signal G _m is shortened, and FIG. 7 (B) is a scene in which the on-time of the main switch gate signal G _m is lengthened.

There are two types of fixed time, T1 and T2. Let T1 <T2.
In the scene of FIG. 7A, the period during which the main switch gate signal _Gm becomes HIGH becomes shorter as the time a, b, and c progress. In this case, the control device 50 confirms the main switch gate signal _Gm after the fixed time T1 after the waveform W3 becomes LOW. In the example of FIG. 7A, if the main switch gate signal _Gm is HIGH at the time to be confirmed as at times a and b, the operation of the sub switch 12 (synchronous rectification) is performed, but the time c If the main switch gate signal _Gm is LOW at the time of confirmation, the operation of the sub switch 12 (synchronous rectification) is always stopped.
In the scene of FIG. 7B, the period during which the main switch gate signal Gm becomes HIGH becomes longer as the time _d , e, and f progress. In the example of FIG. 7B, if the main switch gate signal Gm is LOW at the time to be confirmed as time _d and e, the operation (synchronous rectification) of the sub switch 12 is always stopped. If the main switch gate signal Gm is HIGH at the time to be confirmed, such as time _f , the operation of the sub switch 12 (synchronous rectification) is started.

(Embodiment 4)
Up to the third embodiment, a non-isolated DC / DC converter has been described as shown in FIG. However, the control device 50 of the present invention can also control the isolated DC / DC converter 302 as shown in FIG. 8 or 9. The input side and the output side of the DC / DC converter 302 are isolated by the transformer 15. The main switch 11 is arranged in the circuit on the input side, and the sub switch 12 is arranged in the circuit on the output side. The control device 50 also operates the main switch 11 and the sub switch 12 for the DC / DC converter 302 by using the main switch gate signal G _m and the sub switch gate signal G _s as described in the first to third embodiments. It can be controlled and the DC / DC converter 302 can be operated with high DUTY.

11: Main switch 12: Sub switch (synchronous rectification switch)
13: Inductor 14: Capacitor 15: Transformer 50: Control device 51: Comparator 52: Inverter 53: Dead time generator 54: Inductor 55: AND circuit 56: AND circuit 301, 302: DC / DC converter

Claims (5)

A synchronous rectification control device that controls the operation of the main switch of the DC / DC converter and the secondary switch for synchronous rectification.
Using a triangular wave having an ascending time and a descending time, the voltage of the triangular wave is compared with the threshold value, and the voltage of the triangular wave is the threshold value during one of the ascending time and the descending time. A circuit for the main switch that turns off the main switch when becomes, and generates a main switch gate signal that turns on the main switch when the voltage of the triangular wave reaches the threshold value in the other period.
A sub switch gate that turns on the sub switch after a predetermined time (dead time) from the time when the voltage of the triangular wave reaches the threshold value in the one period, and turns off the sub switch when the one period ends. Synchronous rectification circuit that generates signals and
A synchronous rectification control device characterized by being equipped with. The first aspect of claim 1, wherein the synchronous rectification circuit generates the sub switch gate signal for turning off the sub switch when the time for turning off the main switch is shorter than the predetermined time. Synchronous rectification controller. The synchronous rectification circuit confirms the main switch gate signal after a certain fixed time from the end of one of the periods, and if the main switch gate signal has a value that turns off the main switch, the sub The synchronous rectification control device according to claim 1, wherein the sub switch gate signal for turning off the switch is generated. There are two types of fixed time,
One of the fixed times is used when the time of the value of the main switch gate signal for turning on the main switch decreases.
The other of the fixed time is used when the time of the value of the main switch gate signal for turning on the main switch increases, and the other of the fixed time is longer than one of the fixed time. The synchronous rectification control device described. The aspect according to any one of claims 1 to 4, wherein the ascending time and the descending time are not the same length of time, and the one period is the longer of the ascending time and the descending time. The synchronous rectification control device described.

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