JP7061639B2 - Pachinko machine - Google Patents

Description

The present invention relates to a pachinko machine, an arrange ball machine, a sparrow ball game machine, a slot, an enclosed pachinko machine (managed game machine) that circulates an enclosed game ball internally, and the like. It relates to a gaming machine that can reduce the number and show the player the update of the cumulative display count value in a natural expression.

As a game machine such as a conventional pachinko machine, for example, a game machine as described in Patent Document 1 is known. In this gaming machine, display control is performed using the actual cumulative value obtained by counting the cumulative value, the actually displayed cumulative value during display, and the cumulative number of grants.

Japanese Unexamined Patent Publication No. 2018-191905

However, since the above-mentioned gaming machines perform display control using the actual cumulative value obtained by counting the cumulative value, the actually displayed cumulative value during display, and the cumulative number of grants, the control is performed. There was a problem that it was burdensome.

Therefore, in view of the above problems, it is an object of the present invention to provide a gaming machine capable of reducing the control load and showing the player to update the count value of the cumulative display in a natural expression.

The above object of the present invention is achieved by the following means. In addition, although the reference numerals of the embodiments described later are added in parentheses, the present invention is not limited thereto.

According to the gaming machine according to the invention of claim 1, a counting updating means for updating a predetermined count value as the game progresses, and a counting updating means.
It has a count display means (for example, a liquid crystal display device 41 shown in FIG. 5) for displaying a plurality of numbers side by side on the predetermined count value updated by the count update means.
The count display means (for example, the liquid crystal display device 41 shown in FIG. 5) is
A variable animation indicating that the predetermined count value is updated is displayed (see, for example, FIG. 27).
The variable animation is
In displaying the predetermined count value after the update on the count display means (for example, the liquid crystal display device 41 shown in FIG. 5) based on the updated value of the predetermined count value, the predetermined count value of the predetermined count value is displayed. The common high-speed fluctuation animation (for example, the common high-speed fluctuation animation KAI shown in FIGS. 27 (c-1) and (c-2)) regardless of the value before the update is displayed on the count display means (for example, the liquid crystal display shown in FIG. 5). It is characterized in that it is displayed on a display device 41) and then a predetermined count value after the update is displayed (see, for example, FIG. 27 (d)).
Further, according to the gaming machine according to the second aspect of the present invention, in the gaming machine according to the first aspect, the counting display means (for example, the liquid crystal display device 41 shown in FIG. 5) is
In displaying the predetermined count value after updating, the updated numerical image is displayed, and the variation animation is superimposed on the numerical image (for example, FIGS. 28 (c-1) to 1). (See (c-3)).
Further, according to the gaming machine according to the invention of claim 3, in the gaming machine according to claim 1 or 2, the common high-speed fluctuation animation (for example, FIGS. 27 (c-1), (c-2)). Common high-speed fluctuation animation KAI) shown in
When displaying the number to be updated on the count display means (for example, the liquid crystal display device 41 shown in FIG. 5) among the plurality of numbers, the size of the number to be updated is set among the plurality of numbers. The count display means (for example, the liquid crystal display device 41 shown in FIG. 5) is different from the size of the numbers that are not to be updated (see, for example, FIGS. 28 (b-2) and 27 (a) and 27 (d)). ) Is displayed.

According to the present invention, it is possible to reduce the control load and show the player to update the count value of the cumulative display in a natural expression.

It is a perspective view which shows the appearance of the gaming machine which concerns on one Embodiment of this invention. It is a front side perspective view which shows the state which opened the door of the gaming machine before mounting the gaming board which concerns on the said embodiment. It is a front view which shows the state which opened the door of the gaming machine before mounting the gaming board which concerns on the said embodiment. It is a perspective view of the back side which shows the appearance of the gaming machine which concerns on the same embodiment. It is a front view of the game board which concerns on the same embodiment. It is a block diagram which shows the control device of the gaming machine which concerns on the same embodiment. A diagram of the effect scenario table according to the same embodiment is shown, (a) shows a diagram in which a plurality of effect scenario data are stored, and (b) is stored in one layer data of the effect scenario data shown in (a). (C) is a diagram showing a control table referred to by the control code data shown in (b). It is a block diagram which shows the VDP which concerns on the same embodiment. (A) is an explanatory diagram for explaining the flow of the conventional game, (b) is an explanatory diagram for explaining the flow of the rescue game, and (c) is an explanatory diagram for explaining the flow of the game of the special electric support symbol. Is. (A) is a diagram showing a table in which a variation pattern table to be referred to according to a gaming state is stored, and (b) is a diagram showing a variation pattern table selected in a normal gaming state. (A) shows the variation pattern table selected in the first time-shortening gaming state (1st to 79th rotations), and (b) shows the variation pattern selected in the first time-shortening gaming state (80th to 99th rotations). It is a figure which shows the table. (A) shows the variation pattern table selected in the first time saving game state (100th rotation), and (b) shows the variation pattern table selected in the second time saving gaming state (first rotation). (C) is a figure which shows the variation pattern table selected in the 2nd time shortening game state (2nd to 100th rotation). It is a figure which shows the variation pattern table selected in the 2nd time short game state (101 to the final turn). It is explanatory drawing explaining the processing content when the small hit and the special electric support symbol are used together. It is a block diagram of the one-chip microcomputer mounted on the main control board shown in FIG. (A) is an explanatory diagram of a receive prescaler register built in the asynchronous serial communication circuit shown in FIG. 15, and (b) is an explanatory diagram of a receive buffer register built in the asynchronous serial communication circuit shown in FIG. be. (A) is an explanatory diagram of a transmission prescaler register built in the asynchronous serial communication circuit shown in FIG. 15, and (b) is an explanatory diagram of a transmission buffer register built in the asynchronous serial communication circuit shown in FIG. be. (A) to (c) are timing charts showing a serial communication format of one frame. (A) is an explanatory diagram of a communication setting register built in the synchronous serial communication circuit shown in FIG. 15, and (b) is an explanatory diagram of a transmission data register built in the synchronous serial communication circuit shown in FIG. , (C) is an explanatory diagram of a receiving data register built in the synchronous serial communication circuit shown in FIG. 15, and (d) is an explanatory diagram of a transmission / reception status register built in the synchronous serial communication circuit shown in FIG. It is a figure. It is a block diagram of the payout control one-chip microcomputer mounted on the payout / launch control board shown in FIG. (A) is an explanatory diagram of the serial communication baud rate setting register built in the asynchronous serial communication circuit shown in FIG. 20, and (b) is the serial communication setting register built in the asynchronous serial communication circuit shown in FIG. 20. It is explanatory drawing. (A) is an explanatory diagram of the asynchronous serial communication status register built in the asynchronous serial communication circuit shown in FIG. 20, and (b) is the serial communication data register built in the asynchronous serial communication circuit shown in FIG. 20. It is explanatory drawing. It is a timing chart diagram which shows the timing from the cutoff of an external power source to the drop of an internal voltage. (A) is an explanatory diagram for explaining a state in which the movable accessory device is moving to the front of the liquid crystal display device during the customer waiting demonstration, and (b) is the movable accessory device shown in (a). It is explanatory drawing explaining the state which returns to the origin position (the original position), stops the customer waiting demonstration on the liquid crystal display device, and displays the normal screen which performs the variable display of a special symbol. (A) to (d) are explanatory diagrams for explaining the flow of the conventional change effect of changing from the previous number of balls to a new number of balls in the count-up effect. (A) to (d) are explanatory diagrams illustrating a predetermined scene for displaying the numerical information of the previous number of balls and the numerical information of the new number of balls on the liquid crystal display device. (A) to (d) are explanatory views explaining the flow of the change effect which concerns on the embodiment which changes from the previous number of balls to a new number of balls in a count-up effect. (A-1) to (a-4) are explanatory diagrams for explaining a predetermined scene for displaying an image that changes from a common fluctuation animation to a new number of spheres on a liquid crystal display device, (b). -1) to (b-4) are explanatory diagrams for explaining the flow of an image that changes from a common fluctuation animation to a new number of spheres, and (c-1) to (c-4) are (a-). 1) It is an explanatory diagram explaining a predetermined scene for displaying an image changing from a common fluctuation animation to a new number of spheres on a liquid crystal display device by a method different from (a-4). .. (A) to (f) are explanatory views explaining the flow of an image which changes from a common variation animation to a new number of spheres when a new count-up effect occurs during the count-up effect. In (a) to (g), when performing a change effect of changing from the previous number of balls to a new number of balls in the count-up effect, a high-speed fluctuation animation is displayed on the liquid crystal display device by one place. The place of is an explanatory diagram explaining that a low-speed fluctuation animation that increases one by one is displayed. In (a) to (b), in the effect of subtracting the count of the timer or the like, the second decimal place digit displays the high-speed fluctuation animation on the liquid crystal display device, and the first decimal place digit displays the low-speed fluctuation animation. It is explanatory drawing explaining that it displays on a liquid crystal display device. (A) indicates a table in which a distribution table to be referred to according to the number of changes of the special symbol after the background change is stored, (b) indicates a first distribution table, and (c) is a second. A distribution table is shown, (d) is a diagram showing a third distribution table, and (e) is a diagram showing a fourth distribution table. (A) shows a sub-control fluctuation pattern distribution table, (b) shows a left symbol lottery distribution table, (c) shows a symbol change notice table, and (d) shows a change symbol lottery distribution table. It is a figure which shows. (A-1) to (a-5) show screen examples of the conventional background change effect showing the flow of change from the current background to the changed background, and (b-1) to (b-5) show. ) Shows a screen example of the background change effect according to the same embodiment showing the flow of change from the current background to the changed background, and (c-1) to (c-5) are from the current background. It is a figure which shows the screen example of the background change effect which concerns on other embodiment different from (b-1)-(b-5) which showed the flow which changes to the background after change. It is a flowchart explaining the main process of the main control which concerns on the same embodiment. It is a flowchart explaining the continuation of the main process of the main control shown in FIG. 35. It is a flowchart explaining the setting switching process shown in FIG. 35. It is a flowchart explaining the power supply abnormality check process. It is a flowchart explaining the timer interrupt process of the main control which concerns on the same embodiment. It is a flowchart explaining the ordinary symbol processing shown in FIG. 39. It is a flowchart explaining the special symbol processing shown in FIG. 39. It is a flowchart explaining the start opening check process 1 (2) shown in FIG. 41. It is a flowchart explaining the special symbol variation start processing shown in FIG. 41. It is a flowchart explaining the relief number command transmission shown in FIG. 43. It is a flowchart explaining the time saving number-of-time command transmission shown in FIG. 43. It is a flowchart explaining the hit determination process shown in FIG. 43. It is a flowchart explaining the special electric support symbol hit determination process shown in FIG. 43. It is a figure which shows the program example of the special electric support symbol hit determination table. It is a flowchart explaining the process during special symbol change shown in FIG. 41. It is a flowchart explaining the process during the special symbol confirmation time shown in FIG. 41. (A) shows a normal symbol hit determination table used when executing a normal symbol hit / fail lottery, and (b) shows a special symbol jackpot determination table used when executing a special symbol win / fail lottery. (C) shows a special symbol small hit determination table used when executing a special symbol hit / fail lottery, and (d) shows a special electric support symbol hit determination table used when executing a special symbol win / fail lottery. It is a figure which shows. It is a flowchart explaining the process during special symbol change which concerns on other embodiment. It is a flowchart explaining the relief count command transmission which concerns on other embodiment. It is a flowchart explaining the time saving number of times command transmission which concerns on other embodiment. It is a flowchart explaining the data division process shown in FIGS. 53 and 54. It is a flowchart which shows the main process of the sub control which concerns on the same embodiment. It is a flowchart which shows the data analysis process shown in FIG. 56. It is a flowchart which shows the command reception process of the sub control which concerns on the same embodiment. It is a flowchart which shows the timer interrupt processing of the sub control which concerns on the same embodiment. (A) is a flowchart for explaining an initial command list for moving images, (b) is a flowchart for explaining a stationary command list for moving images, and (c) is a flowchart for explaining a command list for still images. ..

Hereinafter, an embodiment of the gaming machine according to the present invention will be specifically described with reference to the drawings, using a pachinko gaming machine as an example. In the following description, when the directions of up, down, left, and right are shown, it means up, down, left, and right when viewed from the front of the illustration.

<Explanation of the appearance configuration of pachinko game machines>
First, the appearance configuration of the pachinko gaming machine according to the present embodiment will be described with reference to FIGS. 1 to 6.

<Explanation of the appearance configuration of the front of the pachinko machine>
As shown in FIG. 1, the pachinko gaming machine 1 has a wooden outer frame 2 and a hinge 4a (see FIG. 2) provided on the left side surface in front of the outer frame 2 around the vertical axis. It is provided with a rectangular front frame 3 that is pivotally attached so as to be openable and closable and detachable.

As shown in FIGS. 2 and 3, the front frame 3 includes an upper mounting portion 5 and a lower mounting portion 6 provided below the upper mounting portion 5. On the front side of the upper mounting portion 5, an upper opening / closing door 7 supporting transparent glass pivotally attached around the center of the vertical axis via the hinge 4a is provided, and the front side of the lower mounting portion 6 is provided. The lower opening / closing door 8 is pivotally attached to the lower opening / closing door 8 by a hinge 4b provided on the same side as the hinge 4a so as to be openable / closable and detachable.

Then, as shown in FIG. 1, the lower opening / closing door 8 has an upper tray 9 for storing the discharged game balls and a lower tray 9 for receiving and storing the surplus balls when the upper tray 9 is full. The saucer 10 is integrally formed. Further, the lower opening / closing door 8 is provided with a ball lending button 11 and a prepaid card ejection button 12 (card return button 12), and a built-in lamp (not shown) is lit on the upper plate surface portion of the upper tray 9. A push button type effect button device 13 that can change the effect effect by pressing the button occasionally is provided. Further, the upper saucer 9 is provided with a ball removal button 14 for pulling out the game ball stored in the upper saucer 9 downward, and further, a setting button 15 composed of a substantially cross key is provided. The setting button 15 can be operated by the player, and has a circular decision key 15a provided in the center, a triangular upper key 15b provided on the upper side of the figure of the decision key 15a, and a determination thereof. A triangular left key 15c provided on the left side of the key 15a, a triangular right key 15d provided on the right side of the decision key 15a, and a triangular shape provided on the lower side of the decision key 15a. It is composed of a lower key 15e.

On the other hand, on the right end side of the lower opening / closing door 8, as shown in FIG. 1, a firing handle 16 for operating the firing unit is provided, and as shown in FIGS. 1 to 3, both upper sides of the front frame 3 are provided. A speaker 17 that emits a BGM (Background music) or a sound effect is provided on the surface side and in the vicinity of the launch handle 16. Decorative lamps such as LED lamps that bring out the effect of the decoration of light are arranged in various places of the upper opening / closing door 7 and the lower opening / closing door 8.

On the other hand, as shown in FIGS. 2 and 3, the upper mounting portion 5 is provided with a game board mounting frame 18, and the game board YB (see FIG. 1) is attached to the game board mounting frame 18 in FIG. The game area 40 shown is mounted so as to face the front surface, and is fixed in the game board mounting frame 18. That is, as shown in FIG. 3, since the upper mounting portion 5 is provided with a plurality of connection connectors 19 (4 in the drawing) at the lower part on the right side surface side, the game board YB is provided on these connection connectors 19. By connecting a connector for connection (not shown) provided on the back surface of the game board, the game board YB is mounted in the game board mounting frame 18. Then, the game board YB is fixed in the game board mounting frame 18 by the fixing tools 20a and 20b provided in the vertical direction on the right side surface side. As a result, the game board YB is mounted in the game board mounting frame 18, so that the upper opening / closing door 7 supporting the transparent glass is provided on the front side of the game area 40 of the game board YB (see FIG. 1). ). The gaming area 40 is composed of an area surrounded by a ball guide rail UR (see FIG. 5) arranged on the surface of the game board YB.

On the other hand, as shown in FIGS. 2 and 3, the lower mounting portion 6 has a firing mechanism 21 arranged substantially in the center in the left-right direction, and a speaker 17 is arranged on the right side of the firing mechanism 21. As shown in FIG. 3, the launch mechanism 21 includes a support plate 22 made of sheet metal, a launch rail 23 mounted on the front surface of the support plate 22, and a game ball mounted on the front surface of the support plate 22 for launching. A ball holding portion 25 that holds the ball at the launch standby position 24 on the launch rail 23, a hitting mallet 27 that is swingably supported around the drive shaft 26 in the front-rear direction on the front surface of the support plate 22, and the back side of the support plate 22. It is equipped with a payout / launch control board 70 provided with a launch motor that is mounted on the batter and drives the striking mallet 27 in the striking direction via the drive shaft 26.

<Explanation of the appearance configuration of the game board>
On the other hand, in the game area 40 of the game board YB, as shown in FIG. 5, a liquid crystal display device 41 made of an LCD (Liquid Crystal Display) or the like is arranged in a substantially central portion. The liquid crystal display device 41 divides the display area into three areas, left, middle, and right, and can independently display numbers, characters, characters (character conversation, lyric telop, etc.) or special symbols. Is. Around such a liquid crystal display device 41, a decorative upper decoration 42a, a left decoration 42b, and a right decoration 42c are provided, and on the back side of the upper decoration 42a, the left decoration 42b, and the right decoration 42c. A movable accessory device 43 is arranged.

As shown in FIG. 5, the movable accessory device 43 has an upper movable accessory 43a, a left movable accessory 43b, a right movable accessory 43c, and an upper left movable accessory that perform a predetermined effect operation as the game progresses. It is composed of an object 43d and a motor (not shown) such as a two-phase stepping motor that drives the upper, left, right, and upper left movable accessories 43a to 43d, respectively. Decorative lamps such as LED lamps that produce an effect by decorating the light are arranged on the upper, left, right, and upper left movable accessories 43a to 43d.

On the other hand, a special symbol 1 starting port 44 is arranged directly below the liquid crystal display device 41, and a special symbol 1 starting port switch 44a (see FIG. 6) for detecting a winning ball is provided inside the special symbol 1 starting port 44. Then, the number of effective winning balls detected by the special symbol 1 starting port switch 44a (see FIG. 6), that is, the number of first holding holding balls is displayed on the liquid crystal display device 41 as a predetermined number (for example, 4). .. The number of first reserved balls is incremented by 1 (+1) when a game ball wins a special symbol 1 starting port 44 and is detected by the special symbol 1 starting port switch 44a (see FIG. 6). When the variable display of a special symbol such as a number, a character, or a symbol (decorative symbol) is started, 1 subtraction (-1) is performed.

On the other hand, a special symbol 2 starting port 45 is arranged on the lower right side of the liquid crystal display device 41, and a special symbol 2 starting port switch 45a (see FIG. 6) for detecting a winning ball is provided inside the special symbol 2 starting port 45. Then, the number of effective winning balls detected by the special symbol 2 starting port switch 45a (see FIG. 6), that is, the number of second starting holding balls is displayed on the liquid crystal display device 41 as a predetermined number (for example, 4). .. The number of reserved balls for the second start is incremented by 1 (+1) when the game ball wins the special symbol 2 start port 45 and is detected by the special symbol 2 start port switch 45a (see FIG. 6). When the variable display of a special symbol such as a number, a character, or a symbol (decorative symbol) is started, 1 subtraction (-1) is performed.

On the other hand, as shown in FIG. 5, the special symbol 2 starting port 45 is provided with an opening / closing member 45b, and when the opening / closing member 45b is opened, the game ball is easily won. The opening / closing member 45b is opened for a predetermined number of times for a predetermined time when a lottery for a normal symbol described later is won, and the opening / closing operation is controlled by a normal electric accessory solenoid 45c (see FIG. 6). In the following, a device combining such an opening / closing member 45b and an ordinary electric accessory solenoid 45c may be referred to as an ordinary electric accessory.

On the other hand, as shown in FIG. 5, a winning device 46 is arranged on the right side of the special symbol 1 starting port 44. The winning device 46 opens and closes so that the large winning opening (not shown) closed by the opening / closing door 46a opens when the lottery of the special symbol described later is won, that is, in the special gaming state generated by the big hit. The door 46a is driven and controlled by the special electric accessory solenoid 46b (see FIG. 6), and the game ball can enter the large winning opening (not shown). The game ball that has entered the large winning opening (not shown) is detected as a winning ball by the large winning opening switch 46c (see FIG. 6) provided inside the large winning opening (not shown).

On the other hand, when the special symbol lottery has not been won, that is, when the game is not in the special gaming state, the opening / closing door 46a is driven and controlled by the special electric accessory solenoid 46b (see FIG. 6), and the large winning opening (not shown). Is closed. As a result, the game ball cannot enter the large winning opening (not shown). In the following, a device combining such an opening / closing door 46a and a special electric accessory solenoid 46b may be referred to as a special electric accessory.

On the other hand, as shown in FIG. 5, a normal symbol start port 47 composed of a gate is arranged in the upper right portion of the liquid crystal display device 41, and inside the normal symbol start port switch 47a (which detects the passage of a game ball). (See FIG. 6) is provided. Further, general winning openings 48 are arranged on the right side of the winning device 46 and on the left side of the special symbol 1 starting port 44, respectively. The general winning opening 48 is the upper right general winning opening 48a arranged on the right side of the winning device 46, the upper left general winning opening 48b arranged on the left side of the special symbol 1 starting opening 44, and the left middle general winning opening 48b. It is composed of a mouth 48c and a lower left general winning mouth 48d. An upper right general winning opening switch 48a1 (see FIG. 6) for detecting the passage of the game ball is provided inside the upper right general winning opening 48a, and an upper left for detecting the passage of the game ball inside the upper left general winning opening 48b. A general winning opening switch 48b1 (see FIG. 6) is provided, and a left middle general winning opening switch 48c1 (see FIG. 6) for detecting the passage of a game ball is provided inside the left middle general winning opening 48c, and a lower left general winning opening switch 48c1 is provided. Inside the mouth 48d, a lower left general winning opening switch 48d1 (see FIG. 6) for detecting the passage of a game ball is provided.

On the other hand, directly below the special symbol 1 starting port 44, an out opening 49 is arranged in which a game ball (out ball) that has flowed down to the most downstream portion of the game area 40 without winning a prize is inserted. The game ball that has entered the out port 49 is detected by the out port switch 49a (see FIG. 6) provided inside as a non-winning ball, and the above-mentioned winning ball is also on the back side of the game board 4. Since it will flow down to the most downstream portion through it, it will be detected by the out port switch 49a (see FIG. 6). Therefore, the out port switch 49a (see FIG. 6) detects the total number of ejected outs, that is, the same number of game balls as the game balls launched into the game area 40 by the launch handle 16.

On the other hand, three 7-segments are arranged side by side in the lower right peripheral portion of the game area 40 of the game board 4, of which two 7-segments are the special symbol display device 50 and the other 7-segment display devices. 52a displays the special symbol 1, the special symbol 2, the number of start-holding balls of the normal symbol, and the game state. As shown in FIG. 5, the special symbol display device 50 is composed of a special symbol 1 display device 50a and a special symbol 2 display device 50b, and one on the left side of the special symbol 1 display device 50a is one. A normal symbol display device 51 composed of LEDs is provided, and a round lamp 52b for notifying the number of rounds of the jackpot game and a right-handed notification lamp 52c for notifying right-handed hitting are further provided.

Further, an identification lamp device 50A showing identification information corresponding to the special symbol 1 and the special symbol 2 is provided on the upper end side of the left decoration 43b.

In this identification lamp device 50A, the first and second identification lamps 50Aa and 50Ab for notifying the player of the information of the hit loss of the special symbol 1 and the special symbol 2 being changed or the special symbol 1 and the special symbol 2 being lost. have. The first identification lamp 50Aa corresponds to the special symbol 1, and the second identification lamp 50Ab corresponds to the special symbol 2. Then, when the special symbol 1 is changing, the first identification lamp 50Aa blinks, when the special symbol 1 hits, the first identification lamp 50Aa lights up, and when the special symbol 1 is lost, the first identification lamp 50Aa Turns off. Further, when the special symbol 2 is changing, the second identification lamp 50Ab blinks, when the special symbol 2 is a hit, the second identification lamp 50Ab is lit, and when the special symbol 2 is lost, the second identification lamp is a second identification lamp. 50Ab is to be turned off.

Although not shown, a plurality of game nails are arranged in the game area 40 of the game board 4, and a windmill 53 as a falling direction changing member of the game ball is arranged.

<Explanation of the appearance configuration of the back of the pachinko machine>
Thus, as shown in FIG. 4, the back surface of the pachinko gaming machine 1 configured as described above is provided with a frame-shaped back mechanism plate 54 that covers the gaming board mounting frame 18 and presses the gaming board YB from the back side. There is. A game ball storage tank 55 for storing game balls supplied from a game ball supply device (not shown) of the pachinko hall side island facility is provided on the upper right side of the back mechanism plate 54, and further. A tank rail 56 for leading out a ball from the game ball storage tank 55 is provided.

A payout device 57 and a payout passage 58 are attached to the lower end of the inclination of the tank rail 56, and when a game ball wins a prize in a winning opening such as a large winning opening (not shown), or a game ball lending device. When there is a ball lending command from (not shown), the game ball in the game ball storage tank 55 is paid out by the payout device 57 via the tank rail 56, and the game ball is paid out through the payout passage 58 to the upper tray 9 (not shown). (See Fig. 1).

Further, a transparent back cover 59 (see also FIG. 3) detachably attached to the back side of the game board YB is mounted in the substantially center of the back mechanism plate 54, and a sub is mounted in the back cover 59. A transparent sub-control board case 80a containing the control board 80 is detachably provided. A transparent main control board case 60a containing the main control board 60 is detachably provided below the sub control board case 80a, and payout / launch control is provided below the main control board case 60a. A transparent payout / launch control board case 70a containing the board 70 is detachably provided. Further, below the main control board case 60a, a power supply board case 130a containing the power supply board 130 is detachably provided.

<Explanation of control device>
Next, a control device for electronically controlling according to the progress of the game provided in the pachinko gaming machine 1 having the appearance configuration as described above will be described with reference to FIG. As shown in FIG. 6, this control device includes a main control board 60 that controls overall game operations, a payout / launch control board 70 that pays out game balls based on control commands from the main control board 60, and the like. It is mainly composed of an image and a sub-control board 80 that controls light and sound.

<Explanation of main control board>
The main control board 60 is a one-chip microcomputer composed of a main control CPU 600a, a main control ROM 600b that stores a game program or the like that describes a series of game control procedures, and a main control RAM 600c that functions as a work area, a buffer memory, or the like. Display (performance display) of the computer 600 and the ratio of how many prize balls were won at the time of low probability (normal low probability state of winning lottery), and generate a special gaming state advantageous to the player. It is mainly equipped with a measurement / setting display device 610 consisting of 7 segments that also display the probability setting contents, a RAM clear switch 620, and a setting key switch 630.

A payout / launch control board 70 that controls the payout motor M to pay out the game ball is connected to the main control board 60 configured in this way. Further, a special symbol 1 starting port switch 44a for detecting a prize in the special symbol 1 starting port 44, a special symbol 2 starting port switch 45a for detecting a winning in the special symbol 2 starting port 45, and a normal symbol starting port 45a. The normal symbol start port switch 47a that detects the passage of 47 and the general winning opening 48 (upper right general winning opening 48a, upper left general winning opening 48b, left middle general winning opening 48c, lower left general winning opening 48d) are detected. Upper right general winning opening switch 48a1, upper left general winning opening switch 48b1, left middle general winning opening switch 48c1, lower left general winning opening switch 48d1, and large winning opening (not shown) opened or closed by the opening / closing door 46a. The large winning opening switch 46c to be detected and the out opening switch 49a capable of detecting the same number of gaming balls as the gaming balls launched into the gaming area 40 by the firing handle 16 are connected. Furthermore, a normal electric accessory solenoid 45c that controls the operation of the opening / closing member 45b, a special electric accessory solenoid 46b that controls the operation of the opening / closing door 46a, a special symbol 1 display device 50a, and a special symbol 2 display device 50b. , The normal symbol display device 51, the 7-segment display device 52a, the round lamp 52b, and the right-handed notification lamp 52c are connected.

When the main control board 60 configured in this way receives a signal from the special symbol 1 start port switch 44a, the special symbol 2 start port switch 45a, or the normal symbol start port switch 47a by the main control CPU 600a, it is advantageous for the player. A lottery is performed to determine whether a special gaming state is generated (so-called "hit") or a special gaming state advantageous to the player is not generated (so-called "missing"), and the result of the lottery is based on the winning / failing information. The display contents of the variation pattern, the stop symbol, or the normal symbol of the special symbol are determined, and the determined information is transmitted to the special symbol 1 display device 50a, the special symbol 2 display device 50b, or the ordinary symbol display device 51. As a result, the lottery result is displayed on the special symbol 1 display device 50a, the special symbol 2 display device 50b, or the normal symbol display device 51. Further, the main control board 60, that is, the main control CPU 600a, generates an effect control command DI_CMD including the determined information and transmits it to the sub control board 80. The main control board 60, that is, the main control CPU 600a, has a special symbol 1 start port switch 44a, a special symbol 2 start port switch 45a, an upper right general winning opening switch 48a1, an upper left general winning opening switch 48b1, and a left middle general winning opening switch. When a signal is received from 48c1, the lower left general winning opening switch 48d1, and the large winning opening switch 46c, it is decided how much game ball to be paid out to the player, and the payout control command PAY_CMD including the decided information is paid out. -By transmitting to the launch control board 70, the payout / launch control board 70 pays out the game ball to the player.

Further, as a result of the lottery, when the lottery of the ordinary symbol is won, the ordinary electric accessory solenoid 45c is driven and controlled so that the opening / closing member 45b is opened a predetermined number of times for a predetermined time, and the lottery of the special symbol is won. The special electric accessory solenoid 46b is controlled to open the large winning opening (not shown).

On the other hand, the main control board 60, that is, the main control CPU 600a, has a special symbol 1 start port switch 44a, a special symbol 2 start port switch 45a, an upper right general winning opening switch 48a1, an upper left general winning opening switch 48b1, and a left middle general winning opening switch. The number of prize balls is measured each time a signal is received from 48c1, the lower left general winning opening switch 48d1, and the large winning opening switch 46c, and the total number of game balls ejected each time the signal from the out opening switch 49a is received. To measure. Then, the main control board 60, that is, the main control CPU 600a, based on the measured number of prize balls and the total number of ejected game balls, describes the content (performance display) regarding the ratio of how many prize balls were awarded at the time of low accuracy. Output to the measurement / setting display device 610. As a result, the content (performance display) relating to the ratio of how many prize balls were awarded at the time of low accuracy is displayed on the measurement / setting display device 610.

Further, the measurement / setting display device 610 can display, for example, the setting contents of the probability of generating a special gaming state advantageous to the player in six stages of "1" to "6". .. Then, when changing such a setting content, when a dedicated key is inserted into the setting key switch 630 and turned on, the probability that the RAM clear switch 620 will generate a special gaming state advantageous to the player. The setting contents can be changed in 6 stages of, for example, "1" to "6" (for example, the setting "6" has the highest probability of generating a special gaming state advantageous to the player. , The setting "1" has the lowest probability of generating a special gaming state that is advantageous to the player). Then, the setting change content is displayed on the measurement / setting display device 610, and when the setting change content is confirmed, the dot on the lower right side of the 7-segment lights up to indicate that the setting content has been confirmed. It has become.

On the other hand, the RAM clear switch 620 clears all the memory area of the main control RAM 600c (see FIG. 6) when the RAM clear switch 620 is pressed except when the dedicated key is inserted into the setting key switch 630 and turned on. Instead, only a part of the memory area is cleared.

<Explanation of payout / launch control board>
The payout / launch control board 70 receives the payout control command PAY_CMD from the main control board 60 (main control CPU 600a), and generates a payout motor signal based on the received payout control command PAY_CMD. Then, the payout motor M is controlled by the generated payout motor signal, and the game ball is paid out to the player. Further, the payout / launch control board 70 fires the game ball in response to the player's operation based on the prize ball counting signal indicating the payout operation of the game ball and the status signal related to the abnormality of the payout operation. Performs the process of starting or stopping.

On the other hand, a touch sensor is provided on the peripheral portion of the launch handle 16 shown in FIG. 1, and when the player's hand comes into contact with the touch sensor of the launch handle 16, the touch sensor outputs a detection signal as shown in FIG. It is output to the payout / launch control board 70. In response to this, the payout / launch control board 70 transmits the detection signal to the main control board 60 (main control CPU 600a). Then, the main control board 60 (main control CPU 600a) transmits the detection signal to the sub control board 80 as an effect control command DI_CMD. This makes it possible to transmit information on whether or not the player has touched the handle 16 to play the game to the sub-control board 80.

<Explanation of sub-control board>
The sub-control board 80 receives the effect control command DI_CMD from the main control board 60 (main control CPU 600a) to execute and control various effects, and also controls the display image displayed on the liquid crystal display device 41 with the sub-control CPU 800a. , A sub-one-chip microcomputer composed of a sub-control ROM 800b that stores a control program that describes an effect control procedure and an effect scenario table PR_TBL shown in FIG. 7, and a sub-control RAM 800c that functions as a work area, a buffer memory, or the like. It is equipped with 800.

Further, the sub control board 80 is displayed on the liquid crystal display device 41 based on the instructions of the sound LSI 801 that generates a desired BGM and sound effect, the sound RAM 802 that functions as a work area, a buffer memory, and the like, and the sub one-chip microcomputer 800. DDR2 SDRAM 804 composed of VDP 803 for generating image data to be generated, a work area for decompressing moving image compressed data, and a frame buffer area for temporarily storing image data displayed on the liquid crystal display device 41, and still image compression. A game ROM 805 in which CG data of data and moving image compression data and sound data such as BGM and sound effects are stored in advance is installed. The still image is a so-called sprite image, and shows a single image such as text data such as characters, a background image, or a special pattern. Further, the moving image means a set of a plurality of continuously changing still images (for a plurality of frames), and a plurality of still images are continuously drawn on the liquid crystal display device 41 for smooth operation. Is reproduced.

A decorative lamp board 90 on which a decorative lamp such as an LED lamp that exhibits a lamp effect is mounted is connected to the sub-control board 80 configured in this way, and a built-in lamp (not shown) is further connected. ) A push-button type effect button device 13 that can change the effect by being pressed by the player during lighting is connected, and a speaker 17 that emits a BGM, a sound effect, or the like is connected. Further, a movable accessory device 43 that performs a predetermined effect operation as the game progresses is connected to the sub control board 80, and the special symbol 1 and the special symbol 2 are being changed, or the special symbol 1 and the special symbol 1 and the special symbol are being changed. An identification lamp device 50A for notifying the player of the hit loss information of 2 is connected, a setting button 15 capable of various settings is connected, and a liquid crystal display device 41 is connected. Needless to say, the decorative lamp substrate 90 is also equipped with decorative lamps arranged on the upper, left, right, and upper left movable accessories 43a to 43d.

Thus, the sub-control board 80 configured in this way is based on the special symbol variation pattern based on the lottery result transmitted from the main control board 60 (main control CPU 600a), the current gaming state, the number of start-holding balls, and the lottery result. The sub-control CPU 800a receives the effect control command DI_CMD containing the basic information required for the decorative symbol to be stopped. Then, the sub-control CPU 800a determines the effect pattern corresponding to the received effect control command DI_CMD by lottery from a large number of effect patterns stored in advance in the sub-control ROM 800b, and executes the determined effect pattern. The control signal to be instructed is temporarily stored in the sub control RAM 800c.

The sub-control CPU 800a transmits a control signal related to sound among the control signals for instructing execution of the effect pattern stored in the sub-control RAM 800c to the sound LSI 801. In response to this, the sound LSI 801 reads the sound data corresponding to the control signal from the game ROM 805 or the sound RAM 802 and outputs it to the speaker 17. As a result, the BGM and sound effects corresponding to the above-determined effect pattern are emitted from the speaker 17.

Further, the sub-control CPU 800a transmits a control signal related to light among the control signals for instructing execution of the effect pattern stored in the sub-control RAM 800c to the decorative lamp substrate 90. As a result, the decorative lamp substrate 90 controls to turn on or off the decorative lamp such as the LED lamp that exerts the lamp effect effect, so that the lamp effect corresponding to the above-determined effect pattern is executed. ..

Then, the sub-control CPU 800a transmits a command list related to the image to the VDP 803 among the control signals for instructing the execution of the effect pattern stored in the sub-control RAM 800c. As a result, the VDP 803 generates image data so as to display an image based on the command list, and transmits the generated image data to the liquid crystal display device 41 to obtain an image corresponding to the above-determined effect pattern. It will be displayed on the liquid crystal display device 41.

Further, the sub-control CPU 800a transmits a control signal related to the movable accessory among the control signals for instructing the execution of the effect pattern stored in the sub-control RAM 800c to the movable accessory device 43. As a result, the movable accessory device 43 is movable in accordance with the above-determined effect pattern.

<Explanation of the production scenario table>
Here, the effect scenario table PR_TBL stored in the sub-control ROM 800b will be described in detail with reference to FIG. 7. As shown in FIG. 7A, the effect scenario table PR_TBL stores a plurality of effect scenario data PS_DATA corresponding to the effect patterns determined by the sub-control CPU 800a. In this effect scenario data PS_DATA, a plurality of 1-layer data PS_DATA1 which are data for each layer used when drawing image data to be displayed on the liquid crystal display device 41 are stored. As shown in FIG. 7B, the one-layer data PS_DATA1 shows frame data PS_DATA10 for drawing 1 to 10 frames, control code data PS_DATA11, and positions for displaying on the liquid crystal display device 41. Coordinate data PS_DATA12, pixel calculation data PS_DATA13 such as image deformation, enlargement, reduction, and transparency, and enlargement / reduction data PS_DATA14 indicating image enlargement / reduction are stored. Further, the sound data PS_DATA15 indicating the sound emitted from the speaker 17, the movable accessory data PS_DATA16 for moving the movable accessory device 43, and the decorative lamp such as the LED lamp that exhibits the lamp effect are turned on or turned on. The lamp data PS_DATA17 for turning off the lamp is stored.

Further, the control code data PS_DATA11 stores the address address of the sub-control ROM 800b in which the control table CH_TBL shown in FIG. 7C is stored, and the data of the contents shown in the address address is referred to. .. That is, as shown in FIG. 7C, the control table CH_TBL stores a plurality of character data CH_DATA, and the character data CH_DATA includes data PS_DATA110 indicating whether it is a still image or a moving image, and game ROM 805. The address data PS_DATA111 indicating the address address, the image size data PS_DATA112 indicating the image size, the button data PS_DATA113 indicating the validity / invalidity of the continuous hitting effect of the setting button 15 or the pressing effect of the effect button device 13, and the movable accessory device 43. The movable accessory timing data PS_DATA114, which indicates the timing at which the movement of the moving object is started, is stored. As a result, the control code data PS_DATA 11 refers to one character data CH_DATA from the plurality of character data CH_DATA stored in the control table CH_TBL shown in FIG. 7 (c). The one-layer data PS_DATA1 stored in the effect scenario data PS_DATA is stored in order from the one with the lowest priority, and a moving image is displayed from the control table CH_TBL shown in FIG. 7 (c) at the position where the priority is lower. The control code data PS_DATA11 such that the data PS_DATA110 is referred to is stored, and the control code data such that the data PS_DATA110 indicating a still image is referred to from the control table CH_TBL shown in FIG. 7C at a position having a high priority. PS_DATA11 is stored.

<Explanation of VDP>
On the other hand, the VDP 803 that generates the image data to be displayed on the liquid crystal display device 41 is configured as shown in FIG.

As shown in FIG. 8, the VDP 803 includes an interface circuit (I / F) 8030 for the DDR2 SDRAM 804, an interface circuit (I / F) 8031 for the game ROM 805, and an interface circuit (I / F) for the sub-one chip microcomputer 800. ) 8032 and is built-in. Further, the VDP 803 has a system control register 8033 accessed from the sub one-chip microcomputer 800 (sub control CPU 800a) via the interface circuit (I / F) 8032, a command memory 8034 for storing the command list, and a command list. A command parser 8035 to analyze, a CG memory controller 8036 to control reading of data in the game ROM 805, a still image decoder 8037 to decode still image compressed data, a moving image decoder 8038 to decode moving image compressed data, and a still image decoder. The image decoded (stretched) by the 8037 and the moving image decoder 8038 is displayed on the geometry engine 8039, the built-in VRAM 8040, and the liquid crystal display device 41, which perform affine conversion such as enlargement / reduction / rotation / movement and projection conversion. Image data generated by the rendering engine 8041 to the rendering engine 8041 that generates the image data, the DDR2 SDRAM controller 8042 that controls the reading of the data in the DDR2 SDRAM 804 and the writing of the data into the DDR2 SDRAM 804, and the liquid crystal display device 41. It is composed of a display controller 8043 that controls the timing of displaying the data, and an LVDS transmission unit 8044 that transmits image data in the LVDS (Low Voltage Differential Signaling) format when transmitting the image data to the liquid crystal display device 41.

The system control register 8033 is a register group in which the sub-one-chip microcomputer 800 (sub-control CPU 800a) writes instruction data for the VDP 803, and a register in which the sub-one-chip microcomputer 800 (sub-control CPU 800a) reads information indicating the operating state of the VDP 803. It is roughly divided into groups. As a result, the sub-one-chip microcomputer 800 (sub-control CPU 800a) operates the VDP 803 appropriately by writing the necessary setting value to the predetermined input register, and operates the VDP 803 by referring to the value of the necessary output register. It becomes possible to grasp the state.

On the other hand, the command memory 8034 stores a command list, and this command list is transmitted from the sub-one-chip microcomputer 800 (sub-control CPU 800a) via the interface circuit (I / F) 8032. .. More specifically, the sub-one-chip microcomputer 800 (sub-control CPU 800a) stores in advance the effect pattern corresponding to the effect control command DI_CMD received by the main control board 60 (main control CPU 600a) in the sub-control ROM 800b. It is determined by lottery from a large number of produced effect patterns, a command list is created based on the determined effect pattern, and the command list is transmitted to the command memory 8034 via the interface circuit (I / F) 8032. In response to this, the command memory 8034 stores the command list.

On the other hand, the command parser 8035 analyzes the command list stored in the command memory 8034, and the command list analysis executes the drawing operation every frame. That is, the still image decoder 8037 is stationary from the address address of the game ROM 805 shown in the address data PS_DATA111 (see FIG. 7C) using the CG memory controller 8036 based on the analysis result of the command list by the command parser 8035. The image compressed data is read, and the read still image compressed data is decoded (decompressed). Then, the decoded still image data is temporarily stored in the built-in VRAM8040.

On the other hand, the moving image decoder 8038 uses the CG memory controller 8036 to compress the moving image from the address address of the game ROM 805 shown in the address data PS_DATA111 (see FIG. 7C) based on the analysis result of the command list by the command parser 8035. The data is read, and the read video compressed data is decoded (decompressed). Then, the decoded moving image data is temporarily stored in the DDR2 SDRAM 804.

The still images and moving images (moving images for one frame) decoded in this way are the analysis results of the command list by the command parser 8035, that is, various data (frame data PS_DATA10, shown in FIG. 7B). Based on the coordinate data PS_DATA12, pixel calculation data PS_DATA13, scaling data PS_DATA14), the geometry engine 8039 has performed affine conversion such as enlargement / reduction / rotation / movement and projection conversion, and the processing has been performed. The image data is stored in the built-in VRAM8040, and the moving image data is stored in the DDR2 SDRAM 804.

After that, the rendering engine 8041 functions, the moving image data stored in the DDR2 SDRAM 804 is read by the DDR2 SDRAM controller 8042, and the moving image data is drawn by the rendering engine 8041. Next, the still image data is read from the built-in VRAM 8040, and the still image data is drawn. As a result, the still image data is overwritten and drawn on the moving image data, so that the image data displayed on the liquid crystal display device 41 is generated. The generated image data is written in the frame buffer area in the DDR2 SDRAM 804 by the DDR2 SDRAM controller 8042.

Thus, the image data written in the frame buffer area is read from the DDR2 SDRAM controller 8042 by the display controller 8043 and transmitted to the liquid crystal display device 41 by the LVDS transmission unit 8044. As a result, the image data generated by the rendering engine 8041 is displayed on the liquid crystal display device 41.

By the way, the image data displayed on the liquid crystal display device 41 is updated every frame, and the figure is made so that the sub-one-chip microcomputer 800 (sub-control CPU 800a) can grasp that the display operation of this one frame is completed. 6. The VSYNC (vertical synchronization signal) shown in FIG. 8 is transmitted from the VDP 803 to the sub-control CPU 800a as an interrupt signal. As a result, the sub-control CPU 800a can grasp that the image data for one frame is displayed on the liquid crystal display device 41. The VSYNC interrupt signal is set to be generated every 33 ms, for example.

<Explanation of power supply board>
By the way, the power supply to each of the above-described boards is supplied from the power supply board 130 shown in FIG. The power supply board 130 includes a voltage generation unit 1300, a voltage monitoring unit 1310, and a system reset generation unit 1320. The voltage generation unit 1300 receives an AC voltage AC24V, which is an external power supply supplied from a transformer (not shown) installed in a game store, and generates a plurality of types of DC voltage. Although not shown, it is supplied to each substrate.

Further, the voltage monitoring unit 1310 monitors the voltage of the AC voltage AC24V, and when this voltage is cut off or a power failure occurs and a voltage abnormality is detected, the voltage abnormality signal ALARM is used as the main control board 60. It is output to. The voltage abnormality signal ALARM outputs an "L" level signal when the voltage is abnormal, and outputs an "H" level signal when the voltage is normal.

On the other hand, the system reset generation unit 1320 generates a system reset signal RST when the power is turned on, and the generated system reset signal RST is output to each board.

<Explanation of relief games and special electric support games>
Next, the rescue game and the special electric support game will be specifically described with reference to FIGS. 9 to 14.

<Explanation of conventional games>
As shown in FIG. 9A, in the conventional game, the normal game state (the state without low probability electric support) is changed to the big hit game state, and then the game state is changed to the probability change hit or the non-probability change hit game state. Will be. If the game state shifts to the probabilistic game state, the game shifts to the probabilistic game state (state with high probability electric support) and shifts to the big hit game state. On the other hand, if it shifts to the non-probability change game state, it shifts to the time-saving game state (the state with low probability power support) and shifts to the big hit game state, or the special symbol changes a predetermined number of times (for example, 100 times). ) Is reached, a game such as a transition to a normal game state (a state without low probability electric support) will be performed. The low probability indicates a gaming state in which the jackpot lottery probability is a low probability state, the high probability indicates a gaming state in which the jackpot lottery probability is a high probability state, and the probability variation game state indicates a jackpot lottery probability. In the high probability state, the fluctuation time of the special symbol is shortened, and the game state in which the electric support state is reached is shown. The time is shortened, and the game state in which the electric support state is reached is shown, and the electric support indicates the electric chew support. Under the electric chew (ordinary electric accessory) support state, the operating rate (opening time and number of times of opening) of the opening / closing member 45b of the special symbol 2 starting port 45 is improved, and the winning rate for the special symbol 2 starting port 45 is increased. Since the winning frequency per unit time increases, the gaming state is advantageous for the player as compared with the case where the electric chew support state is not used (normal gaming state).

<Explanation of relief games>
On the other hand, in the relief game, as shown in FIG. 9B, the game state shifts from the normal game state (state without low probability electric support) to the jackpot game state, and then shifts to the probability change hit or non-probability change game state. Will be done. If the game state shifts to the probabilistic game state, the game shifts to the probabilistic game state (state with high probability electric support) and shifts to the big hit game state. On the other hand, if it shifts to the non-probability change game state, it shifts to the first short-time game state (the state with low probability electric support) and shifts to the big hit game state, or the special symbol changes a predetermined number of times (for example,). When it reaches 100 times), a game such as a transition to a normal game state (a state without low probability electric support) will be performed.

However, the flow of the game described above is the same as that of the conventional game. In this relief game, as shown in FIG. 9B, the difference from the conventional game is that the special symbol is displaced from the normal game state (without low probability electric support) a predetermined number of times (for example, 1000 times). When executed, it shifts to the second time-saving game state (state with low probability electric support), and then shifts to the jackpot game state, or the special symbol changes reach a predetermined number of times (for example, 1000 times). Then, the difference is that a game such as a transition to a normal game state (a state without low probability electric support) is performed.

By providing such a game, it is possible to add a purpose for playing a game other than the big hit, and to reduce the disadvantage to the player due to the state of not winning the big hit for a long time.

By the way, in the above-mentioned relief game, in the present embodiment, the following processing is performed.

That is, as shown in FIG. 9B, when shifting from the game state per non-probability change to the first time-shortening game state (state with low probability electric support), the ending of the jackpot effect in the game state per non-probability change. Then, on the liquid crystal display device 41, a game state notification image after the end of the jackpot effect showing the first time-saving game state such as "chance time rush 100 times" and the time-saving number of times indicating the maximum number of fluctuations in which the first time-saving game state is maintained. The time-saving rush effect including the notification is executed by the sub-control CPU 800a. However, when the out-of-order fluctuation of the special symbol is executed a predetermined number of times (for example, 1000 times) and the game shifts to the second time-saving game state (state with low probability electric support), the special number of times (for example, 1000 times) is special. When the symbol is out of alignment, the sub-control CPU 800a does not execute the time saving rush effect, and immediately after shifting to the second time saving gaming state (state with low probability electric support), for example, at the time of the 1001st special symbol change, the liquid crystal display. A time-saving rush effect such as displaying an image prompting the player to "hit right" on the display device 41 is executed. As a result, the opening / closing member 45b of the special symbol 2 starting port 45 is opened immediately after the player strikes to the right, so that the player can enjoy the time-saving game, thereby improving the player's interest. be able to. In addition, when the second time-shortening gaming state is reached, the special symbol 2 that may be in a more advantageous gaming state for the player as compared with the special symbol 1 is changed, so that the second time-saving gaming state ( Immediately after shifting to the low probability power support state), for example, at the time of the 1001st special symbol change, the time saving rush effect takes longer than the out-of-order change in the normal game state (low probability power support state), and the sub It will be executed by the control CPU 800a. As a result, the second start hold ball can be stored, and it is possible to prevent the first start hold ball from being digested immediately after the second short game state is reached. Further, since the time-saving rushing effect to the second time-saving game state is performed during the fluctuation, it is better to display the effect time shorter than the time-saving rushing effect to the first time-saving game state. At this time, since the production time is short, unlike the time reduction effect of entering the first time reduction game state, only the display indicating the second time reduction game state such as "help time entry" is displayed, and the time reduction in which the second time reduction game state is maintained is maintained. It is preferable not to display the number of times.

On the other hand, in the present embodiment, the average fluctuation time per fluctuation in the out-of-hours fluctuation of the first time-shortened gaming state (state with low-probability power support) and the out-of-time fluctuation of the second time-shortened gaming state (state with low-probability power support). It is set so as to be different from the average fluctuation time per fluctuation in. That is, of the number of time reductions in the first time reduction game state (state with low probability electric support) and the number of time reductions in the second time reduction game state (state with low probability electric support), the average fluctuation per fluctuation with the larger number of time reductions. The time is set to be short. As a result, the fluctuation efficiency can be improved, and thus the interest of the player can be improved.

On the other hand, in the first short-time game state (state with low probability electric support), the latter half of the big hit production is to make the player expect whether or not it will be a big hit again before shifting to the normal game state after the big hit production. However, compared to the first half of the jackpot production, the selection ratio of out of reach is increased. On the other hand, in the second time-shortened game state (with low probability electric support), the number of fluctuations is larger than in the first time-shortened game state, so the selection ratio of reach loss is lowered toward the latter half of the second time-shortened game state. .. As a result, the fluctuation efficiency can be improved, and thus the interest of the player can be improved.

On the other hand, as shown in FIG. 9B, the sub-control is performed when the special symbol is displaced a predetermined number of times (for example, 1000 times) to shift to the second time-saving game state (state with low probability electric support). The CPU 800a executes a time-saving rush effect such as displaying an image prompting the player to "right-hand" on the liquid crystal display device 41, but when shifting to the second time-saving gaming state (state with low probability electric support). Even if a special symbol lottery is won and a big hit is obtained, the time saving including right-handed notification such as displaying an image prompting the player to "right-handed" on the liquid crystal display device 41 on the sub-control CPU 800a. The rush effect is executed first, and the effect changes from the middle. However, in this way, when shifting to the second time-saving game state (state with low probability electric support), if a special symbol lottery is won and a big hit is obtained, a partly common effect with the time-saving rush effect is performed. If the right-handed notification is given at the start of the time-saving rush effect, the player cannot determine whether it is a hit or a miss, and thus the interest of the player can be improved. That is, when shifting to the second time-saving game state (state with low probability electric support), if a special symbol lottery is won and a big hit is obtained, the time-saving rushing effect is not performed and the hit fluctuation such as reach is performed while special. If the player does not win the lottery of the symbol and is out of the game, the player can determine whether it is a hit or a miss, and the interest of the player is lowered. It will make you. Therefore, in the present embodiment, when the game shifts to the second time-saving game state (state with low probability electric support), if a special symbol lottery is won and a big hit is obtained, a partly common effect with the time-saving rush effect is performed. , Right-handed notification is given at the start of the time-saving rush effect. Further, when shifting to the second short-time gaming state (state with low probability electric support), the right-handed notification lamp 52c (see FIG. 5) for notifying right-handed is turned on at the start of the 1001st change of the special symbol. At this time, when shifting to the second short-time game state (state with low probability electric support), if a special symbol lottery is won and a big hit is obtained, the LCD shows that the big hit was made by the fanfare production of the big hit start that will be transferred after that. Since the display is displayed on the entire liquid crystal display of the display device 41, the right-handed notification may be temporarily hidden. In this case, by turning on the right-handed notification lamp 52c (see FIG. 5) and continuing the right-handed notification, the right-handed display started by shifting to the second short-time gaming state is hidden. As a result, the player can continue the right-handed state without hesitating whether or not the player can continue the right-handed state.

On the other hand, as shown in FIG. 9B, the power source is supplied before the transition to the second time-saving game state (state with low probability electric support) after the special symbol deviation fluctuation is executed a predetermined number of times (for example, 1000 times). When the power is turned on again and the game is restored, the sub-control CPU 800a is displayed on the liquid crystal display device 41 according to the remaining number of times up to the predetermined number of times (for example, 1000 times). The background image (video) is made different from the background image (video) at the time of returning to the game, or a part of the lighting of the decorative lamp is made different from the lighting of the decorative lamp at the time of returning to the game. As a result, the hall side can know the gaming machine 1 that is close to the predetermined number of times (for example, 1000 times), so that the disadvantage of the hall side can be corrected. That is, if the power is cut off (power cut) while the special symbol is executed 900 times at the end of the business on the previous day, the deviation of the special symbol is 100 in the business on the next day. If it is executed once, it will shift to the second short game state (state with low probability electric support). Then, the hall side unintentionally provides the player with the second time-saving game state by executing the relief game for the number of fluctuations on the previous day over the days, and the hall side suffers a disadvantage. Will be. Therefore, in the present embodiment, the gaming machine 1 that is close to the predetermined number of times (for example, 1000 times) is notified to the hall side. As a result, the employee on the hall side can take measures such as pressing the RAM clear switch 620 to clear the main control RAM 600c in which the number of deviation fluctuations of the special symbol is held. The disadvantages can be corrected.

On the other hand, as shown in FIG. 9B, the power supply is executed before the special symbol is displaced a predetermined number of times (for example, 1000 times) to shift to the second time-saving game state (state with low probability electric support). When the power is turned on again and the game is restored, the sub-control CPU 800a will perform the above-mentioned predetermined number of times (for example, 1000 times) in the change of the special symbol in the first rotation after the game is restored. Try to execute the production according to the remaining number of times. As a result, the player can either keep the number of missed fluctuations of the special symbol at the end of business on the previous day, or press the RAM clear switch 620 to hold the main control RAM 600c holding the number of missed fluctuations of the special symbol. It is possible to infer whether the state is cleared, and thus the player's motivation to continue playing can be improved.

On the other hand, in the normal gaming state (state without low probability electric support) as shown in FIG. 9B, when the player hits right, the sub-control CPU 800a gives the player "left hit" to the liquid crystal display device 41. A warning will be given, such as displaying an image that prompts the user. However, as shown in FIG. 9B, when the special symbol deviation variation is executed a predetermined number of times (for example, 1000 times) and the game shifts to the second time-saving game state (state with low probability electric support), the second If the player hits the right due to the fluctuation of the special symbol before shifting to the time-saving game state (state with low probability electric support), the above warning is not given. As a result, it is possible to prevent a situation in which the interest of the player who knows the number of times until the transition to the second time-saving gaming state (state with low probability electric support) shown in FIG. 9B is reduced.

<Explanation of the game of special electric support design>
Next, the game of the special electric support symbol will be described with reference to FIG. 9 (c).

In the game of the special electric support symbol, as shown in FIG. 9 (c), the game state shifts from the normal game state (state without low probability electric support) to the big hit game state, and then the game state of probable change or non-probability change. Will move to. If the game state shifts to the probabilistic game state, the game shifts to the probabilistic game state (state with high probability electric support) and shifts to the big hit game state. On the other hand, if it shifts to the non-probability change game state, it shifts to the first short-time game state (the state with low probability electric support) and shifts to the big hit game state, or the special symbol changes a predetermined number of times (for example,). When it reaches 100 times), a game such as a transition to a normal game state (a state without low probability electric support) will be performed.

However, the flow of the game described above is the same as that of the conventional game. In the game of this special electric support symbol, as shown in FIG. 9 (c), the difference from the conventional game is that the special electric support symbol (no jackpot operation) is changed from the normal game state (no low probability electric support) to the special electric support symbol. If you win, you will be in the second short game state (with low probability power support), and then you will be in the big hit game state, or if the special symbol changes reach a predetermined number of times (for example, 100 times or more). The difference is that a game such as shifting to a normal game state (a state without low probability electric support) is performed.

By providing such a game, it is possible to add a purpose for playing a game other than the big hit, and to reduce the disadvantage to the player due to the state of not winning the big hit for a long time.

Thus, in the game of the special electric support symbol as described above, in the present embodiment, the following processing is performed.

From the first time saving state (state with low probability electric support) shown in FIG. 9 (c) or FIG. 9 (b), the change of the special symbol reaches a predetermined number of times (for example, 100 times), and the normal gaming state (low probability). When returning to the state without electric support), the sub-control CPU 800a displays the result effect on the liquid crystal display device 41 (per XX times, the number of acquisitions) with the final fluctuation (for example, the 100th time) of a predetermined number of times (for example, 100 times). ○○○ points, etc. are displayed). However, the fluctuation of the special symbol reaches a predetermined number of times (for example, 100 times or more) from the second short-time gaming state (state with low probability power support) shown in FIG. 9 (c), and the normal game state (state without low probability power support). ), Or from the second short-time gaming state (state with low probability electric support) shown in FIG. 9 (b), the change of the special symbol reaches a predetermined number of times (for example, 1000 times), and the normal gaming state (low probability). When returning to the state without electric support), the sub-control CPU 800a controls so that the result effect is not displayed on the liquid crystal display device 41 after the final fluctuation of a predetermined number of times. Thereby, appropriate information can be provided to the player. That is, in the second time-saving game state (state with low-probability power support) shown in FIG. 9 (c) or the second time-saving game state (state with low-probability power support) shown in FIG. 9 (b), a big hit is obtained. Since it is not via the route, there is no information that the player can obtain even if the result effect is displayed on the liquid crystal display device 41. Therefore, as shown in the present embodiment, even in the same time-saving game state, if the effect is different depending on the rushing opportunity, it is possible to provide appropriate information to the player.

By the way, in determining whether or not to perform the result effect as described above, the tables as shown in FIGS. 10 to 12 are used. This point will be described in detail below.

The table TBL shown in FIG. 10A is stored in the main control ROM 600b, and a variation pattern table designation code corresponding to each gaming state and a variation pattern table to be referred to are stored. The fluctuation pattern table designation code is data for referring to the fluctuation pattern table managed on the program.

Specifically, in the table TBL shown in FIG. 10A, "00H" is selected as the variation pattern table designation command in the normal gaming state, and NOR_TBL is used as the variation pattern table to be referred to. It becomes. Further, in the first time-saving game state shown in FIG. 9 (b) or the first time-saving game state shown in FIG. 9 (c), in the change of the special symbol at the 1st to 79th rotations, as a change pattern table designation command. “01H” is selected, and JT1_TBL1 is used as the variation pattern table to be referred to. Then, in the first time-saving game state shown in FIG. 9 (b) or the first time-saving game state shown in FIG. 9 (c), in the change of the special symbol at the 80th to 99th rotations, as a change pattern table designation command. "02H" is selected and JT1_TBL2 is used as the fluctuation pattern table to be referred to. In the fluctuation of the special symbol at the 100th rotation, "03H" is selected as the fluctuation pattern table designation command and is to be referred to as the fluctuation pattern table. Will use JT1_TBL3.

On the other hand, in the second time-shortening game state shown in FIG. 9B or the second time-saving game state shown in FIG. Is selected, and JT2_TBL1 will be used as the variation pattern table to be referred to. Then, in the second time-saving game state shown in FIG. 9 (b) or the second time-saving game state shown in FIG. 9 (c), in the change of the special symbol at the 2nd to 100th rotations, the change pattern table designation command is used. "05H" is selected, JT2_TBL2 is used as the fluctuation pattern table to be referred to, and "06H" is selected as the fluctuation pattern table designation command in the fluctuation of the special symbol from the 101st to the final rotation, and the fluctuation pattern to be referred to is selected. As the table, JT2_TBL3 will be used.

On the other hand, in the probabilistic gaming state shown in FIG. 9B or the probabilistic gaming state shown in FIG. 9C, "07H" is selected as the variation pattern table designation command, and the variation pattern table to be referred to is HI_TBL. Will be selected. The description of HI_TBL is not shown and will be omitted.

By the way, the variation pattern table NOR_TBL referred to in the normal gaming state is as shown in FIG. 10 (b). Specifically, if the lottery of the special symbol is not won and the number of the first start holding ball or the second start hold ball is "0", the normal fluctuation of 12 seconds is selected with the probability shown in the figure. With the probability shown, normal reach loss (20 seconds) is selected, and with the probability shown, SP reach loss (50 seconds) is selected. When the number of the first start holding ball or the second start holding ball is "1", the normal fluctuation of 8 seconds is selected with the probability shown in the figure, and the normal reach loss (20 seconds) is selected with the probability shown in the figure. With the probability of, SP reach loss (50 seconds) will be selected. Further, when the number of the first start holding ball or the second start holding ball is "2", the normal fluctuation of 5 seconds is selected with the probability shown in the figure, and the normal reach loss (20 seconds) is selected with the probability shown. With the probability shown in the figure, SP reach loss (50 seconds) will be selected. Furthermore, when the number of the first start hold ball or the second start hold ball is "3", the normal fluctuation of 3 seconds is selected with the probability shown in the figure, and the normal reach loss (20 seconds) is selected with the probability shown. With the probability shown in the figure, SP reach loss (50 seconds) will be selected.

On the other hand, as shown in FIG. 10B, when the special electric support symbol small hit A or the special electric support symbol small hit B is won in the special symbol lottery, the normal reach is lost with the probability shown in the figure. + Time saving rush effect (25 seconds) is selected, and with the probability shown in the figure, SP reach is off + Time saving rush effect (55 seconds) is selected. As described above, when the special electric support symbol is won, a series of variation patterns for performing a time-saving rush effect are selected after performing a shift effect during the variation of the special symbol.

On the other hand, as shown in FIG. 10B, when the small hit C is won in the special symbol lottery, the normal reach loss (20 seconds) is selected. At this time, the small hit effect is executed by the sub-control CPU 800a during the small hit operation.

On the other hand, as shown in FIG. 10B, when a special symbol lottery is won and a probability variation hit is won, the normal reach per (30 seconds) is selected with the probability shown in the figure, and the SP reach hit with the probability shown in the figure. (60 seconds) is selected, and (100 seconds) per total rotation fluctuation is selected with the probability shown in the figure.

On the other hand, as shown in FIG. 10B, when a special symbol lottery is won and a non-probability change is won, the normal reach per (30 seconds) is selected with the probability shown in the figure, and the SP is selected with the probability shown in the figure. Per reach (60 seconds) will be selected.

Next, the variation pattern table JT1_TBL1 referred to in the variation of the special symbol at the 1st to 79th rotations in the first time-saving gaming state is as shown in FIG. 11A. Specifically, if the lottery for the special symbol 1 is not won and the number of first starting hold balls is "0" to "3" in the case of a miss, a normal fluctuation of 12 seconds is selected. Then, if the lottery for the special symbol 2 is not won and the number of second start holding balls is "0", the normal fluctuation of 5 seconds is selected with the probability shown in the figure, and the normal reach is lost with the probability shown in the figure. (20 seconds) is selected, and with the probability shown in the figure, SP reach loss (50 seconds) is selected. Furthermore, if the special symbol 2 lottery is not won and the number of second start holding balls is "1" to "3", the normal variation of 3 seconds is selected with the probability shown in the figure, and the probability shown is shown. Then, the normal reach loss (20 seconds) is selected, and the SP reach loss (50 seconds) is selected with the probability shown in the figure.

On the other hand, as shown in FIG. 11A, when the small hit A of the special electric support symbol is won in the special symbol lottery, the normal fluctuation of 3 seconds is selected.

By the way, when the small hit and the special electric support symbol are used in combination, the processing as shown in FIG. 14 is performed. That is, if the small hit A is won with a probability of 1/200, it is also used as a special electric support symbol, and after the small hit, 1000 times are given as the number of time reductions. Then, if the small hit A of the special electric support symbol is won during the time saving game, 1000 times is not reset as the time saving number of times. On the other hand, if the small hit B is won with a probability of 100/200, it is also used as a special electric support symbol, and after the small hit, 100 times are given as the number of time reductions. Then, if the small hit B of the special electric support symbol is won during the time saving game, the time saving number of times is not reset to 100 times. On the other hand, if the small hit C is won with a probability of 99/200, it is not used as a special electric support symbol. In this way, if the small hit and the special electric support symbol are used in combination, it is possible to provide a new game property of whether or not a time reduction is given after the small hit. It is possible to improve the interest of the person.

Therefore, even if the small hit A of the special electric support symbol is won during the time saving game, the time saving is not added again. Therefore, as shown in FIG. 11A, the special symbol is drawn by lottery. When the small hit A of the electric support symbol is won, the normal fluctuation of 3 seconds, which is the same fluctuation pattern as the normal fluctuation deviation, is selected.

On the other hand, as shown in FIG. 11A, when the small hit B of the special electric support symbol is won in the special symbol lottery, the normal reach loss + time saving rush effect (25 seconds) is selected with the probability shown in the figure. , With the probability shown in the figure, SP reach loss + time saving rush effect (55 seconds) is selected. Then, when the small hit B of the special electric support symbol is won during the time saving game, as shown in FIG. 14, in order to reset the time saving number of times, a series of fluctuation patterns for performing the time saving rush effect are selected in this way. Will be done. It should be noted that the time saving rush effect can be switched according to each game state so that the sub control CPU 800a performs the time saving number reset effect.

On the other hand, as shown in FIG. 11A, when the small hit C is won in the special symbol lottery, the normal fluctuation (3 seconds) is selected.

On the other hand, as shown in FIG. 11A, when a special symbol lottery is won and a probability variation hit is won, the normal reach per (30 seconds) is selected with the probability shown in the figure, and the SP reach hit with the probability shown in the figure. (60 seconds) is selected, with the probability shown, per full rotation fluctuation (100 seconds) is selected, and with the probability shown, per sudden (10 seconds) is selected.

On the other hand, as shown in FIG. 11A, when a special symbol lottery is won and a non-probability change is won, the normal reach per (30 seconds) is selected with the probability shown in the figure, and the SP is selected with the probability shown in the figure. Per reach (60 seconds) will be selected.

Next, the variation pattern table JT1_TBL2 referred to in the variation of the special symbol at the 80th to 99th rotations in the first time-saving gaming state is as shown in FIG. 11 (b). Specifically, if the lottery for the special symbol 1 is not won and the number of first starting hold balls is "0" to "3" in the case of a miss, a normal fluctuation of 12 seconds is selected. Then, if the lottery for the special symbol 2 is not won and the number of second start holding balls is "0", the normal fluctuation of 5 seconds is selected with the probability shown in the figure, and the normal reach is lost with the probability shown in the figure. (20 seconds) is selected, and with the probability shown in the figure, SP reach loss (50 seconds) is selected. Furthermore, if the special symbol 2 lottery is not won and the number of second start holding balls is "1" to "3", the normal variation of 3 seconds is selected with the probability shown in the figure, and the probability shown is shown. Then, the normal reach loss (20 seconds) is selected, and the SP reach loss (50 seconds) is selected with the probability shown in the figure.

Therefore, as shown in FIG. 11B, the selection ratio of the reach (normal reach, SP reach) is increased in the fluctuation of the special symbol at the 80th to 99th rotations approaching the end of the first short game state. ing. This makes it possible to give the player a sense of expectation that he may win.

On the other hand, as shown in FIG. 11B, when the small hit A of the special electric support symbol is won in the special symbol lottery, the normal fluctuation of 3 seconds is selected. Further, as shown in FIG. 11B, when the small hit B of the special electric support symbol is won in the special symbol lottery, the normal reach loss + time saving rush effect (25 seconds) is selected with the probability shown in the figure. , With the probability shown in the figure, SP reach loss + time saving rush effect (55 seconds) is selected.

On the other hand, as shown in FIG. 11B, when the small hit C is won in the special symbol lottery, the normal fluctuation (3 seconds) is selected.

On the other hand, as shown in FIG. 11B, when a special symbol lottery is won and a probability variation hit is won, the normal reach per (30 seconds) is selected with the probability shown in the figure, and the SP reach hit with the probability shown in the figure. (60 seconds) is selected, with the probability shown, per full rotation fluctuation (100 seconds) is selected, and with the probability shown, per sudden (10 seconds) is selected.

On the other hand, as shown in FIG. 11B, when a special symbol lottery is won and a non-probability change is won, the normal reach per (30 seconds) is selected with the probability shown in the figure, and the SP is selected with the probability shown in the figure. Per reach (60 seconds) will be selected.

Next, the variation pattern table JT1_TBL3 referred to in the variation of the special symbol at the 100th rotation in the first time-saving gaming state is as shown in FIG. 12 (a). Specifically, if the lottery of the special symbol is not won and the number of the first start hold ball or the second start hold ball is "0" to "3", the result effect of the loss (30 seconds) Will be selected.

On the other hand, if the small hit A of the special electric support symbol is won in the special symbol lottery, the result effect (30 seconds) of the loss will be selected. However, even if a small hit of the special electric support symbol is won during the time saving game, as shown in FIG. 14, the time saving is not added again, so that the special electric support symbol is selected by lottery. When the small hit A is won, the result effect of the deviation, which is the same fluctuation pattern as the normal fluctuation deviation, is selected.

Further, as shown in FIG. 12A, when the small hit B of the special electric support symbol is won in the special symbol lottery, the one that performs the reset effect (80 seconds) is selected from the result effect. Will be. Then, when the small hit B of the special electric support symbol is won during the time saving game, as shown in FIG. 14, in order to reset the time saving number of times, a series of fluctuations from the result effect to the reset effect are performed in this way. The pattern will be selected.

On the other hand, as shown in FIG. 12A, when the small hit C is won in the special symbol lottery, the result effect (30 seconds) of the loss is selected.

On the other hand, as shown in FIG. 12A, when a special symbol lottery is won and a probable change hit is won, or when a non-probability change hit is won, a series of fluctuation patterns (100) in which a hit effect is performed from the result effect. Seconds) will be selected.

Next, the variation pattern table JT2_TBL1 referred to in the variation of the special symbol in the first rotation in the second short game state is as shown in FIG. 12 (b). Specifically, as shown in FIG. 12 (b), in the case where the lottery of the special symbol is not won and the first start holding ball or the second start holding ball is "0" to "3". In that case, the out-of-order rush effect (12 seconds) will be selected.

On the other hand, as shown in FIG. 12 (b), when the small hit A and the small hit C of the special electric support symbol are won in the special symbol lottery, the out-of-order rush effect (12 seconds) is selected. Become. Then, when the small hit B of the special electric support symbol is won, a series of fluctuation patterns (80 seconds) for performing the reset effect from the rush effect are selected.

On the other hand, as shown in FIG. 12B, when a special symbol lottery is won and a probable change hit is won, or when a non-probability change hit is won, a series of fluctuation patterns (100) in which a hit effect is performed from a rush effect. Seconds) will be selected.

Next, the variation pattern table JT2_TBL2 referred to in the variation of the special symbol at the 2nd to 100th rotations in the second short game state is as shown in FIG. 12 (c). Specifically, if the lottery for the special symbol 1 is not won and the number of first starting hold balls is "0" to "3" in the case of a miss, the normal fluctuation of 5 seconds is selected. If the special symbol 2 is not won in the lottery and the number of second start holding balls is "0" to "3", the normal fluctuation of 1.5 seconds is selected with the probability shown in the figure. With the probability of, normal reach loss (20 seconds) is selected, and with the probability shown in the figure, SP reach loss (50 seconds) is selected.

On the other hand, as shown in FIG. 12 (c), when the small hit A or the small hit C of the special electric support symbol is won in the special symbol lottery, the normal fluctuation of 1.5 seconds is selected. Become.

On the other hand, as shown in FIG. 12 (c), when the small hit B of the special electric support symbol is won in the special symbol lottery, the normal reach loss + time saving rush effect (25 seconds) is selected with the probability shown in the figure. Then, with the probability shown in the figure, SP reach loss + time saving rush effect (55 seconds) is selected.

On the other hand, as shown in FIG. 12 (c), when the special symbol lottery is won and the probability variation is won, or when the non-probability variation is won, the normal reach (30 seconds) is selected with the probability shown in the figure. Then, with the probability shown in the figure, a sudden hit (10 seconds) will be selected.

Next, the variation pattern table JT2_TBL3 referred to in the variation of the special symbol from the 101st to the final rotation in the second short game state is as shown in FIG. Specifically, if the lottery for the special symbol 1 is not won and the number of first starting hold balls is "0" to "3" in the case of a miss, the normal fluctuation of 5 seconds is selected. If the special symbol 2 is not won in the lottery and the number of second start holding balls is "0" to "3", the normal fluctuation of 1.5 seconds is selected with the probability shown in the figure. With the probability of, the normal reach loss (20 seconds) is selected.

On the other hand, as shown in FIG. 13, when the small hit A or the small hit C of the special electric support symbol is won in the special symbol lottery, the normal fluctuation of 1.5 seconds is selected.

On the other hand, as shown in FIG. 13, when the small hit B of the special electric support symbol is won in the special symbol lottery, the normal reach loss + time saving rush effect (25 seconds) is selected with the probability shown in the figure. With the probability of, SP reach loss + time saving rush effect (55 seconds) is selected.

On the other hand, as shown in FIG. 13, when the lottery of the special symbol is won and the probability variation is won, or when the non-probability variation is won, the normal reach per (30 seconds) is selected with the probability shown in the figure. With the probability of, a sudden hit (10 seconds) will be selected.

Thus, using such a variation pattern table, it is selected whether or not the result effect is performed. Therefore, in the first time-saving game state, when the first time-saving game state ends, the variation pattern table JT1_TBL3 shown in FIG. 12 (a) is selected, and before the end, it is shown in FIG. 11 (b). The variation pattern table JT1_TBL2 will be selected, and thus a different variation pattern table will be selected. On the other hand, in the second time-saving game state, when the second time-saving game state ends at the 100th rotation or 1000 rotations, and even before the end, the variation pattern table JT2_TBL2 shown in FIG. 12 (c). Is selected, or the variation pattern table JT2_TBL3 shown in FIG. 13 is selected, so that the same variation pattern table is selected. As a result, whether or not the result effect is performed is selected, and appropriate information can be provided to the player.

By the way, as shown in FIG. 9B, a predetermined number of times (for example, 1000 times) a predetermined number of times (for example, 1000 times) a predetermined number of times (for example, 1000 times) the special symbol is displaced, which triggers a transition to a second time-saving game state (a state with low probability electric support). The number of times may be any number, but it is preferable that the number of times is equal to or less than the number obtained by triple the denominator of the jackpot probability. In this way, if the number of times the denominator of the jackpot probability is tripled or less, there are many cases where the jackpot is hit up to the number of times less than the tripled number, and even if the jackpot is not reached by this number of times, the game It is possible to prevent a person from forcibly continuing the game aiming at the second time-saving game state (state with low probability electric support) shown in FIG. 9B.

In addition, the number of time reductions given when shifting to the second time reduction game state (state with low probability electric support) shown in FIG. 9B may be any number, but the denominator of the jackpot probability is quadrupled. It is preferable that the number of times is less than or equal to the number of times. In this way, if the number of times the denominator of the jackpot probability is quadrupled or less, there is a possibility that one jackpot will always be achieved by the number of times less than the quadrupled number, so the game was continued. Benefits can be given to the player.

By the way, when a large number of time reductions (the number of time reductions exceeding the denominator of the jackpot probability) is given in this way, the current number of time reductions may not be displayed on the liquid crystal display device 41 until the predetermined number of times is reached. The fixed number of times such as 100 times is displayed on the liquid crystal display device 41. More specifically, every time the number of time reductions changes, the main control board 60 (main control CPU 600a) transmits a time reduction command indicating the number of time reductions. Then, the sub-control CPU 800a receives the time saving command. At this time, even if the sub-control CPU 800a receives the time reduction number command indicating the time reduction number, the sub-control CPU 800a controls so that the current time reduction number is not displayed on the liquid crystal display device 41 until the time reduction number is equal to or less than the predetermined time reduction number, or 100. It is controlled so that the fixed number of times such as the number of times is displayed on the liquid crystal display device 41. Then, when the predetermined number of time reductions is reached, the sub-control CPU 800a controls the liquid crystal display device 41 to display the time reduction number information based on the time reduction number command indicating the received time reduction number. However, in this way, the interest of the player can be improved. That is, in the case of a large number of time reductions (the number of time reductions exceeding the denominator of the jackpot probability), if the time reduction state continues until the next jackpot is won, the number of time reductions is displayed and the countdown is performed. It will arouse the anxiety of the player, and will reduce the interest of the player. On the other hand, when the remaining number of times reaches a predetermined number of times such as 100 times, it is better to notify the player that the time-saving game may end, so if the number of times is displayed, the game can be played. It is possible to prevent a situation in which a time-saving game ends without the person's knowledge. However, according to the present embodiment, it is possible to improve the interest of the player.

By the way, in the present embodiment, an example in which the rescue game and the game of the special electric support symbol are described separately is shown, but the game is not limited to this, and a game having both games may be performed.

<Explanation of serial communication>
Next, serial communication will be specifically described with reference to FIGS. 15 to 24.

<Main control board: Explanation of one-chip microcomputer>
The one-chip microcomputer 600 shown in FIG. 6 has a configuration as shown in FIG. 15 in detail. That is, as described above, the one-chip microcomputer 600 includes a main control CPU 600a, a main control ROM 600b that stores a game program or the like that describes a series of game control procedures, and a main that functions as a work area, a buffer memory, or the like. A control RAM 600c is mainly built in, and a clock generation circuit 640 is also built in. The clock generation circuit 640 divides an external clock (not shown) to generate a clock to be used inside the one-chip microcomputer 600.

Further, as shown in FIG. 15, the one-chip computer 600 has a built-in reset controller 641, which is a system reset signal generated by the system reset generation unit 1320 (see FIG. 6). It controls a reset signal such as an abnormal reset signal generated by RST and WDT (watchdog timer) 643 described later.

Further, as shown in FIG. 15, the one-chip microcomputer 600 has a built-in interrupt controller 642, and the interrupt controller 642 receives a timer interrupt signal generated by a CTC (Counter Timer Circuit) 644 described later. It controls.

Furthermore, as shown in FIG. 15, the one-chip microcomputer 600 has a built-in WDT (watchdog timer) 643, which detects a program abnormality due to noise or the like and generates an abnormality reset signal. It is something to do. This abnormal reset signal is input to the reset controller 641 to reset the inside of the one-chip microcomputer 600. Therefore, the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648, which will be described later, are also reset.

On the other hand, as shown in FIG. 15, the one-chip microcomputer 600 has a built-in CTC (Counter Timer Circuit) 644, and when a predetermined time is set, the CTC 644 outputs a timer interrupt signal at predetermined time intervals. It is what is generated. This timer interrupt signal is output to the interrupt controller 642.

Further, as shown in FIG. 15, the one-chip microcomputer 600 has a built-in random number circuit 645, and the random number circuit 645 generates a hardware random number used for a random number lottery of a special symbol.

Further, the one-chip microcomputer 600 has a built-in asynchronous serial communication circuit (CH0) 646 and an asynchronous serial communication circuit (CH1) 647, and serial communication is possible. The asynchronous serial communication circuit (CH0) 646 indicates that it is an asynchronous serial communication circuit of channel 0, and the asynchronous serial communication circuit (CH1) 647 indicates that it is an asynchronous serial communication circuit of channel 1. Therefore, the internal structure is the same. In the following, it is assumed that the internal structures of the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 are the same.

The asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 each have a built-in receive prescaler register RXPRE shown in FIG. 16A (actually, RXPRE0 and RXPRE1 exist). However, since the internal structure is the same, in the present embodiment, it is illustrated as one receive prescaler register RXPRE). As shown in FIG. 16A, the reception prescaler register RXPRE is composed of 16 bits, and the lowest bit (0th bit) to the 12th bit is composed of a reception baud rate setting register RPR in which the reception baud rate can be set. The 13th bit is unused, the 14th bit is composed of the parity presence / absence setting register RPEN that can set the presence / absence of parity, and the most significant bit (15 bits) sets whether odd parity or even parity. It is composed of the parity odd-even setting register REVEN that can be used.

The reception baud rate setting register RPR has an initial value of 0000h, can read and write values, and can set the reception baud rate with a register that can be set from 0000h to 1FFFh. The received baud rate (bps) is calculated by the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) frequency / (received baud rate setting register RPR × 32). Specifically, for example, assuming that the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) frequency is 20 MHz and 01F4h (= 500) is set in the receive baud rate setting register RPR, the receive baud rate (= 500) is set. bps) is calculated at 20 (MHz) / (500 × 32) and becomes 1,250 (bps). When 0000h is set in the reception baud rate setting register RPR, it is calculated as if 0001h is set in the reception baud rate setting register RPR.

On the other hand, the parity presence / absence setting register RPEN has an initial value of 0 and can read / write the value. When 0 is set, it is set without parity, and when 1 is set, it is set with parity. Further, the parity odd / even setting register REVEN has an initial value of 0 and can read / write the value. When 0 is set, it is set to even parity, and when 1 is set, it is set to odd parity.

On the other hand, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 further include the receive buffer register RXBUF shown in FIG. 16B. The receive buffer register RXBUF has an initial value of 00h, can only read the value, and can store data from 00h to FFh.

Thus, in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647, data is set in the reception baud rate setting register RPR so as to be the same as the transmission speed of the transmitted data, and the parity is set. When 0 is set in the presence / absence setting register RPE N, the data shown in FIG. 18A can be received. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 have an "L" level start bit length, 8-bit length data, and an "H" level stop bit length of one frame (1 frame). It is possible to receive data having a communication format set to the timing T10 section). Then, the 8-bit length data is stored in the receive buffer register RXBUF.

On the other hand, in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647, data is set in the reception baud rate setting register RPR so as to be the same as the transmission speed of the transmitted data, and the parity is set. When 1 is set in the presence / absence setting register RPE N, the data shown in FIG. 18B can be received. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 have an "L" level start bit length, 8-bit length data, a parity bit, and an "H" level stop bit length. It is possible to receive data having a communication format in which one frame (see the timing T11 section). Then, the 8-bit length data is stored in the receive buffer register RXBUF. If the parity bit on the transmitting side is set to even parity, 0 is set in the parity odd / even setting register REVEN, and if it is set to odd parity, 1 is set in the parity odd / even setting register REVEN. It will be.

By the way, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 further include a transmission prescaler register TXPRE shown in FIG. 17A, and the transmission prescaler register TXPRE is As shown in FIG. 17A, it consists of 16 bits, and the lowest bit (0th bit) to the 12th bit is composed of the transmission baud rate setting register TPR in which the transmission baud rate can be set, and the 13th bit is composed of the transmission baud rate setting register TPR. , Unused, the 14th bit is composed of the parity presence / absence setting register TPN that can set the presence / absence of parity, and the most significant bit (15 bits) is the parity odd / even setting register TEVEN that can set whether it is odd parity or even parity. It is composed of.

The transmission baud rate setting register TPR has an initial value of 0000h, can read and write values, and can set the transmission baud rate with a register that can be set from 0000h to 1FFFh. The transmission baud rate (bps) is calculated by the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) frequency / (transmission baud rate setting register TPR × 32), and is calculated in the same manner as the reception baud rate (bps). To.

On the other hand, the parity presence / absence setting register TPN has an initial value of 0 and can read / write the value. When 0 is set, it is set without parity, and when 1 is set, it is set with parity. Further, the parity odd / even setting register TEVEN has an initial value of 0 and can read / write the value. When 0 is set, it is set to even parity, and when 1 is set, it is set to odd parity.

Further, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 have a built-in transmission buffer register TXBUF shown in FIG. 17B, and the transmission buffer register TXBUF is initially used. The value is 00h, only the value can be written, and the data from 00h to FFh can be stored.

Thus, in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647, when predetermined data is set in the transmission baud rate setting register TPR and 0 is set in the parity presence / absence setting register TPE, FIG. The data shown in (a) can be transmitted. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 have an "L" level start bit length, 8-bit length data, and an "H" level stop bit length of one frame (1 frame). It is possible to transmit data having a communication format set to the timing T10 section). The 8-bit length data is stored in the transmission buffer register TXBUF.

On the other hand, when 1 is set in the parity presence / absence setting register TPN, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 can transmit the data shown in FIG. 18B. .. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 have an "L" level start bit length, 8-bit length data, a parity bit, and an "H" level stop bit length. It is possible to transmit data having a communication format in one frame (see the timing T11 section). The 8-bit length data is stored in the transmission buffer register TXBUF, and the parity bit is even parity if 0 is set in the parity odd / even setting register REVEN, and the parity bit is 1 in the parity odd / even setting register REVEN. If is set, it is an odd parity.

By the way, as shown in FIG. 15, the one-chip microcomputer 600 has a built-in synchronous serial communication circuit 648, and serial communication is possible. The synchronous serial communication circuit 648 has a built-in communication setting register SPIFM shown in FIG. 19 (a). As shown in FIG. 19A, this communication setting register SPIFM consists of 8 bits, and the lowest bit (0th bit) to the 3rd bit is the synchronization clock component for which the frequency division ratio of the synchronization clock can be set. It is composed of the peripheral ratio setting register CLK, and the most significant bit (7th bit) to the 4th bit is composed of the data length setting register LENG in which the data length can be set.

The initial value of the synchronous clock division ratio setting register CLK is 00h, and the value can be read and written. When 01h is set, the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) is 1. When the frequency is divided by / 2 and 02h is set, the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) is divided by 1/4, and ..., 09h is set. And the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) is divided by 1/512, and when 0Ah is set, the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) is generated. The clock) is divided by 1/1024.

That is, as shown in FIG. 15, the frequency division clock divided according to the value set in the synchronous clock division ratio setting register CLK is synchronized with the synchronization clock 649 built in the one-chip computer 600. It is input to the serial communication circuit 648 and output from the synchronous serial communication circuit 648 together with the transmission data. If a value other than 01h to 0Ah is set in the synchronous clock division ratio setting register CLK, the clock is not output from the synchronous clock 649.

On the other hand, the data length setting register LENG can set the format of communication data. The initial value is 00h, the value can be read and written, and when 01h is set, the data length is set to 1 bit. ..., When 08h is set, the data length is set to 8 bits.

On the other hand, the synchronous serial communication circuit 648 further includes a transmission data register TRBUF shown in FIG. 19B. The transmission data register TRBUF has an initial value of 00h, can only write the value, and can store data from 00h to FFh. The data stored in the transmission data register TRBUF is transferred to a transmission shift register (not shown) and output in synchronization with the frequency division clock output from the synchronization clock 649.

On the other hand, the synchronous serial communication circuit 648 further includes a reception data register REBUF shown in FIG. 19 (c). The reception data register REBUF has an initial value of 00h, can only read the value, and can store data from 00h to FFh. When the synchronous serial data is received, the received data is stored in the reception data register REBUF. In this reception data register REBUF, data is stored in synchronization with the frequency division clock transmitted from the transmission side.

On the other hand, the synchronous serial communication circuit 648 also has a built-in transmission / reception status register SPIST shown in FIG. 19D. As shown in FIG. 19D, this transmission / reception status register SPIST is read-only and consists of 8 bits, and the lowest bit (0th bit) is a transmission flag register indicating whether or not data is being transmitted. The first bit is composed of SPTMT, the first bit is composed of the transmission shift register flag register TRSHF indicating whether or not the transmitted data is transferred to the transmission shift register (not shown), and the second bit is FIG. 19 (b). It is composed of a transmission register flag register TRREF indicating whether or not data is stored in the transmission data register TRBUF shown in FIG. 19, and the third bit is stored in the reception data register REBUF shown in FIG. 19 (c). The reception register flag register REREF indicating whether or not the status is set is configured, and the 4th bit to the most significant bit (7th bit) are configured to be unused.

The transmission flag register SPTMT is set to "1" when data is being transmitted, and is set to "0" when data is not being transmitted.

On the other hand, the transmission shift register flag register TRSHF is set to "0" when the transmitted data has not been transferred to the transmission shift register (not shown), and the transmitted data has been transferred to the transmission shift register (not shown). In that case, "1" is set.

On the other hand, the transmission register flag register TRREF is set to "0" when no data is stored in the transmission data register TRBUF shown in FIG. 19 (b), and the transmission data register shown in FIG. 19 (b) is set. When data is stored in TRBUF, "1" is set.

On the other hand, the reception register flag register REREF is set to "0" when no data is stored in the reception data register REBUF shown in FIG. 19 (c), and the reception data register shown in FIG. 19 (c) is set. When data is stored in REBUF, "1" is set.

Thus, the one-chip microcomputer 600 configured as described above transmits predetermined data to the payout / launch control board 70 by serial transmission using the asynchronous serial communication circuit (CH0) 646 shown in FIG. , Asynchronous serial communication circuit (CH1) 647 is used to transmit predetermined data to the sub control board 80 by serial transmission. Although the synchronous serial communication circuit 648 is not used in this embodiment, it may be used when serially transmitting predetermined data to the payout / launch control board 70 or the sub control board 80.

<Payout / launch control board: Explanation of payout control one-chip microcomputer>
Here, the payout / launch control board 70 will be described in detail with reference to FIG. 20. Since the sub control board 80 is equipped with the same serial communication circuit as the payout / launch control board 70, the description thereof will be omitted. Further, the same configurations as those of the one-chip microcomputer 600 shown in FIG. 15 are designated by the same reference numerals, and the description thereof will be omitted.

As shown in FIG. 20, the payout / launch control board 70 includes a payout control CPU 700a, a payout control ROM 700b that stores a payout program or the like describing a series of payout control procedures, and a payout control that functions as a work area, a buffer memory, or the like. It is equipped with a payout control one-chip microcomputer 700 mainly composed of a RAM 700c. The payout control one-chip microcomputer 700 further includes an external bus interface 701, which controls the direction of the address bus, the data bus, and each control signal.

Further, as shown in FIG. 20, the payout control one-chip microcomputer 700 has a built-in clock circuit 702, and the clock circuit 702 divides an external clock (not shown) to divide the payout control one-chip microcomputer. Generates a clock used inside the computer 700. The synchronous clock 649 shown in FIG. 20 divides the clock used inside the payout control one-chip microcomputer 700.

Further, as shown in FIG. 20, the payout control one-chip microcomputer 700 has a built-in reset controller 703, and a WDT (watchdog timer) 703a is built in the reset controller 703. The WDT703a detects a program abnormality due to noise or the like and generates an abnormality reset signal. The reset controller 703 controls reset signals such as a system reset signal RST generated by the system reset generation unit 1320 (see FIG. 6) and an abnormal reset signal generated by the WDT (watchdog timer) 703a. Is.

On the other hand, as shown in FIG. 20, the payout control one-chip microcomputer 700 has a built-in CTC (Counter Timer Circuit) 704, and when a predetermined time is set, the CTC 704 interrupts a timer at predetermined time intervals. It produces a signal. This timer interrupt signal is output to the interrupt controller 705, which will be described later.

Further, as shown in FIG. 20, the payout control one-chip microcomputer 700 has a built-in interrupt controller 705, a timer interrupt signal generated by the CTC 704, and an asynchronous serial communication circuit 706 described later. It controls the interrupt signal.

On the other hand, as shown in FIG. 20, the payout control one-chip microcomputer 700 has a built-in asynchronous serial communication circuit 706, and serial communication is possible. The asynchronous serial communication circuit 706 has a built-in serial communication baud rate setting register SCBR shown in FIG. 21 (a), and the serial communication baud rate setting register SCBR has an initial value of 000h, can read and write values, and starts from 000h. It is a register that can be set up to FFFh. The baud rate (bps) is calculated by the internal clock (clock generated by the clock circuit 702 shown in FIG. 20) frequency / (serial communication baud rate setting register SCBR × 16). Specifically, for example, assuming that the internal clock (clock generated by the clock circuit 702 shown in FIG. 20) has a frequency of 15 MHz and 0 BCh (= 188) is set in the serial communication baud rate setting register SCBR, the baud rate (bps) is set. ) Is 15 (MHz) / (188 × 16) = 4896.7 (bps). The baud rate setting described in the one-chip microcomputer 600 shows an example in which the received baud rate and the transmission baud rate can be set separately, but the baud rate is common to both transmission and reception. Further, when 000h is set in the serial communication baud rate setting register SCBR, it is calculated assuming that 001h is set in the serial communication baud rate setting register SCBR.

Further, the asynchronous serial communication circuit 706 has a built-in serial communication setting register SCFM shown in FIG. 21 (b). As shown in FIG. 21B, this serial communication setting register SCFM is composed of 8 bits, and the lowest bit (0th bit) is composed of a parity type setting register PTP in which the parity type can be set, and 1 bit. The eyes are composed of the parity function setting register PEN that can set whether to use the parity function or not, the second bit is composed of the data length setting register FMT that can set the data length, and the third bit is the operation. The operation mode setting register MOD that can set the mode is used, the 4th and 5th bits are unused, and the 6th bit is the receiving function setting register REN that can set whether to use the receiving function. The 7th bit (7th bit) is composed of a transmission function setting register TEN that can set whether or not to use the transmission function.

As shown in FIG. 21B, this parity type setting register PTP has an initial value of 0 and can read and write values. When 0 is set, it is set to even parity, and when 1 is set, it is odd parity. Is set to. Further, the parity function setting register PEN has an initial value of 1, can read and write values, is set to unused parity when 0 is set, and is set to use parity when 1 is set.

On the other hand, as shown in FIG. 21B, the data length setting register FMT has an initial value of 1 and can read and write values. When 0 is set, the start bit length and 8 bit length of the "L" level are set. Data, communication format with "H" level stop bit length set to 1 frame (see FIGS. 18A and 18B), and when 1 is set, "L" level start bit length, 8 bits It is a communication format in which long data and a stop bit length of "H" level for two pulses are set to one frame (see the timing T12 section in FIG. 18C). When 0 is set in the parity function setting register PEN, the parity is set to unused. Therefore, as shown in FIGS. 18A and 18C, parity is not added to the communication format, but the parity function When 1 is set in the setting register PEN, parity is set to use, so that parity is added to the communication format as shown in FIG. 18 (b). At this time, it becomes an even parity in which 0 is set in the parity type setting register PTP, and it becomes an odd parity when 1 is set.

Further, as shown in FIG. 21B, the operation mode setting register MOD has an initial value of 0 and can read and write the value. When 0 is set, it becomes a normal mode, and when 1 is set, it becomes a FIFO mode. Will be. That is, it is possible to set whether or not to use the reception register 706a and the transmission register 706b built in the asynchronous serial communication circuit 706 shown in FIG. 20 as the FIFO. Therefore, when 0 is set in the operation mode setting register MOD, the receive register 706a and the transmit register 706b are not used as FIFOs, and when 1 is set, the receive register 706a and the transmit register 706b are used as FIFOs. Will be used as.

On the other hand, as shown in FIG. 21B, the reception function setting register REN has an initial value of 0 and can read and write the value. When 0 is set, the reception function is disabled and 1 is set. When it is done, the reception function is enabled. At the moment when 0 is set in the reception function setting register REN, the reception function is set to disable use.

Further, as shown in FIG. 21B, the transmission function setting register TEN has an initial value of 0 and can read and write the value. When 0 is set, the transmission function is disabled and 1 is set. When it is done, the send function is enabled. When 0 is set in the transmission function setting register TEN, if there is data in the middle of transmission, transmission is prohibited after the transmission is completed.

On the other hand, the asynchronous serial communication circuit 706 has a built-in serial communication setting status register SCST shown in FIG. 22 (a). As shown in FIG. 22A, this serial communication setting status register SCST is read-only and consists of 8 bits, and the lowest bit (0th bit) is a parity error flag register indicating whether or not a parity error has been detected. The first bit is composed of PE, the first bit is composed of the framing error flag register FE indicating whether or not a framing error is detected, and the second bit is composed of the break code detection flag register BRK indicating whether or not a break code is detected. The eyes are composed of the overrun detection flag register ORE indicating whether or not overrun is detected, the fourth bit is composed of the noise detection flag register NF indicating whether or not noise is detected, and the fifth bit is the reception register 706a. It is composed of a receive data flag register RDRF indicating whether or not data is stored in (see FIG. 20), and the sixth bit serially transmits the data stored in the transmission register 706b (see FIG. 20). It is composed of a transmission data empty flag register TDBE indicating whether or not the data has been transferred to the transmission shift register 706d (see FIG. 20) used at the time, and the most significant bit (7th) transmits the data. It is composed of a transmission completion flag register TC indicating whether or not it is medium.

As shown in FIG. 22A, the parity error flag register PE has, for example, the parity data (see FIG. 18B) added to the data when the data is received by the asynchronous serial communication circuit 706. If it is an even parity, the asynchronous serial communication circuit 706 counts "1" of 8-bit length data, and if it is an even value, that is, if the parity bit is 0, it is not a parity error. "0" will be set. Further, if it is an odd parity, the asynchronous serial communication circuit 706 counts "1" of 8-bit length data, and if it is an odd value, that is, if the parity bit is 1, it is not a parity error, so that the parity error flag register PE Will be set to "0". On the other hand, if it is set to even parity and the asynchronous serial communication circuit 706 counts "1" of 8-bit length data, if the parity bit is 1, it is a parity error and is set in the parity error flag register PE. "1" will be set. Further, it is set to an odd parity, and when the asynchronous serial communication circuit 706 counts "1" of 8-bit length data, if the parity bit is 0, it is a parity error, so it is set in the parity error flag register PE. "1" will be set. When "1" is set in the parity error flag register PE, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20), assuming that an error has occurred.

On the other hand, as shown in FIG. 22A, when the framing error flag register FE receives data in the asynchronous serial communication circuit 706, if the stop bit of the data is "L", a framing error has occurred. If "1" is set in the asynchronous serial communication circuit 706 and the stop bit is "H", "0" is set because no framing error has occurred. When "1" is set in the framing error flag register FE, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20), assuming that an error has occurred.

Further, as shown in FIG. 22A, the break code detection flag register BRK receives data in the asynchronous serial communication circuit 706, and the data is one frame (timing T10 section of FIG. 18A). b) Timing T11 section, (c) Timing T12 section) If it is "0" or more, "1" is set in the asynchronous serial communication circuit 706 as a break code is detected, and "0" for one frame or more. If not, "0" is set as break code not detected. When "1" is set in the break code detection flag register BRK, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20), assuming that an error has occurred.

On the other hand, as shown in FIG. 22A, when data is received by the asynchronous serial communication circuit 706, the overrun detection flag register ORE has overrun if the previously received data processing has not been completed. In the asynchronous serial communication circuit 706, "1" is set, otherwise "0" is set. When "1" is set in the overrun detection flag register ORE, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20), assuming that an error has occurred.

Further, as shown in FIG. 22A, the noise detection flag register NF is set to "1" in the asynchronous serial communication circuit 706 when noise is detected when the data is received by the asynchronous serial communication circuit 706. If no noise is detected, "0" is set.

On the other hand, as shown in FIG. 22A, the reception data flag register RDRF is a reception shift register 706c (reception shift register 706c) built in the asynchronous serial communication circuit 706 used when data is received by the asynchronous serial communication circuit 706. When data is transferred from the reception register 706a (see FIG. 20), "1" is set, and in other cases, "0" is set. When "1" is set in the received data flag register RDRF, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20).

Further, as shown in FIG. 22A, the transmission data empty flag register TDBE is connected to the asynchronous serial communication circuit 706 used when serially transmitting the data stored in the transmission register 706b (see FIG. 20). When the data is transferred to the built-in transmission shift register 706d (see FIG. 20), "1" is set, and in other cases, "0" is set. When "1" is set in the transmission data empty flag register TDBE, the asynchronous serial communication circuit 706 transmits an interrupt request signal to the interrupt controller 705 (see FIG. 20).

On the other hand, as shown in FIG. 22A, the transmission completion flag register TC is set to "0" when data is being transmitted from the asynchronous serial communication circuit 706, and is set to "1" when data transmission is completed. Will be done.

On the other hand, the asynchronous serial communication circuit 706 further incorporates the serial communication data register SCDT shown in FIG. 22 (b). The serial communication data register SCDT has an initial value of 00h, can read and write the value, and can store data from 00h to FFh. This serial communication data register SCDT functions as received data when read, and functions as transmitted data when written.

Thus, with respect to the payout / launch control board 70 or the sub-control board 80 configured as described above, the one-chip computer 600 has an asynchronous serial communication circuit (CH0) 646 and an asynchronous serial communication circuit shown in FIG. (CH1) 647 is used to serially transmit predetermined data.

<Explanation of serial communication settings>
By the way, the one-chip microcomputer 600 has the following settings for serially transmitting predetermined data to the payout / launch control board 70.

That is, when the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648 built in the one-chip microcomputer 600 are reset inside the one-chip microcomputer 600, It will be reset regardless of whether or not the backup process is performed. Therefore, the payout control command PAY_CMD is being serially transmitted to the payout / launch control board 70 using the asynchronous serial communication circuit (CH0) 646, or the payout control command PAY_CMD is sent to the transmission buffer register TXBUF shown in FIG. 17 (b). If the power is cut off (power cut) in the stored state, the asynchronous serial communication circuit (CH0) 646 is not backed up, so the payout control command PAY_CMD stored (set) before the power cut is It will not be transmitted to the payout / launch control board 70. Therefore, there is a problem that the payout / launch control board 70 cannot receive the payout control command PAY_CMD, and therefore the payout / launch control board 70 may not normally receive the payout number data.

Therefore, in the present embodiment, in serial communication using the asynchronous serial communication circuit (CH0) 646, the game operation is controlled after the transmission time <voltage abnormality signal ALARM becomes "L" in the serial communication. The following processing is performed so that the time until the voltage becomes unexecutable is reached.

That is, as shown in FIG. 23, when the power supply of the AC voltage AC24V, which is an external power supply supplied from a transformer (not shown) installed in the game store, is cut off (see timing T20), the voltage monitoring shown in FIG. 6 is performed. The unit 1310 outputs an “L” level voltage abnormality signal ALARM 20 to 30 ms after the power is cut off (see timing T20:00). Then, 20 ms or more after the timing T21 (see timing T22), the DC voltage DC5V generated by the voltage generation unit 1300 shown in FIG. 6 becomes 4.5V or less, or the DC12V becomes 9.6V or less. It becomes. As a result, the one-chip microcomputer 600 is not supplied with a voltage capable of executing the control of the game operation, so that the control of the game operation cannot be executed.

Therefore, in the present embodiment, the serial communication is longer than the time from when the voltage abnormality signal ALARM becomes “L” to when the voltage becomes such that the control of the game operation cannot be executed (see timing T21 to timing T22 shown in FIG. 23). The baud rate setting of the transmission baud rate setting register TPR shown in FIG. 17A is set as follows so that the transmission time is short.

That is, in order to improve the noise immunity to 01F4h (= 500) in the transmission baud rate setting register TPR shown in FIG. 17A when the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) has a frequency of 20 MHz. The baud rate is set low. At this time, the transmission baud rate (bps) is calculated at 20 (MHz) / (500 × 32) and becomes 1,250 (bps). Since this 1,250 (bps) means that 1250 bits can be transmitted per second, 5 bits can be transmitted in 4 ms. Then, the payout control command PAY_CMD serially transmitted from the one-chip microcomputer 600 to the payout / launch control board 70 using the asynchronous serial communication circuit (CH0) 646 is 8 bits, and the payout control command PAY_CMD is 8 bits. One bit is added as a start bit and one bit is added as a parity bit, so that a total of 10 bits are transmitted. Therefore, if 5 bits can be transmitted in 4 ms, the transmission will be completed in two timer interrupt processes (8 ms) in the timer interrupt process started every 4 ms in the main control described later. Thus, the transmission time for serial communication is set rather than the time from when the voltage abnormality signal ALARM becomes "L" to when the voltage becomes such that the control of the game operation cannot be executed (see timing T21 to timing T22 shown in FIG. 23). It can be a short time.

Therefore, even if the baud rate setting is set low in order to improve the noise immunity, the time from when the voltage abnormality signal ALARM becomes “L” until the voltage becomes such that the control of the game operation cannot be executed (FIG. 23). (See Timing T21 to Timing T22), serial communication is completed. That is, since the backup process is executed on the payout / launch control board 70 as in the program in the main control described later, the payout operation is normally performed once the serial communication is completed. Therefore, even if a power failure occurs in a situation where the prize ball information to be paid out remains on the main control side, the payout operation is normally performed.

On the other hand, when the boat rate setting is set high in order to increase the amount of data to be transmitted, for example, the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) has a frequency of 20 MHz, as shown in FIG. 17 (a). Assuming that 32h (= 50) is set in the transmission baud rate setting register TPR shown, the transmission baud rate (bps) is calculated at 20 (MHz) / (50 × 32) and becomes 12,500 (bps). Since this 12,500 (bps) means that 12,500 bits can be transmitted per second, 12.5 bits can be transmitted in 1 ms. Then, the payout control command PAY_CMD serially transmitted from the one-chip microcomputer 600 to the payout / launch control board 70 using the asynchronous serial communication circuit (CH0) 646 is 8 bits, and the payout control command PAY_CMD is 8 bits. One bit is added as a start bit and one bit is added as a parity bit, so that a total of 10 bits are transmitted. Therefore, if 12.5 bits can be transmitted in 1 ms, the transmission is completed in a shorter time than either the timer interrupt process started every 4 ms in the main control or the timer interrupt process started every 1 ms in the payout control. Will be done.

Therefore, even when the boat rate setting is set high in order to increase the amount of data to be transmitted, the voltage becomes such that the control of the game operation cannot be executed after the voltage abnormality signal ALARM becomes "L". Since the serial communication is completed in the time until (see timing T21 to timing T22 shown in FIG. 23), the power supply abnormality occurs in the situation where the prize ball information to be paid out remains on the main control side. Even if it occurs, the payout operation will be performed normally.

In this embodiment, the settings for the asynchronous serial communication circuit (CH0) 646 have been described, but the same settings are also applied to the asynchronous serial communication circuit (CH1) 647 that serially transmits predetermined data to the sub control board 80. It is possible to do.

By the way, when the abnormal reset signal is generated by the WDT643 shown in FIG. 15, the inside of the one-chip microcomputer 600 is reset, so that the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) are used. 647, the synchronous serial communication circuit 648 will also be reset. That is, it is reset regardless of whether or not there is transmission data in the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648. As a result, it is possible to reduce the situation in which abnormal data is transmitted. That is, when an abnormal reset occurs, there is a risk that abnormal data is stored in the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648. Therefore, regardless of whether or not there is transmission data in the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648, if the reset is performed, abnormal data is transmitted. It is possible to reduce the situation where it ends up.

On the other hand, in the present embodiment, when the player's hand comes into contact with the touch sensor of the firing handle 16, the touch sensor outputs a detection signal to the payout / firing control board 70 as shown in FIG. In response to this, the payout / launch control board 70 transmits the detection signal to the main control board 60 (main control CPU 600a). Then, the main control board 60 (main control CPU 600a) transmits the detection signal to the sub control board 80 as an effect control command DI_CMD. This makes it possible to transmit information on whether or not the player has touched the handle 16 to play the game to the sub-control board 80. However, if this is done, as shown in FIG. 24A, the movable accessory device 43 is moved to the front of the liquid crystal display device 41 during the customer waiting demonstration. Further, when the sub control board 80 receives information on whether or not the player touches the handle 16 to play a game, the sub control board 80 wins a game ball to the special symbol 1 starting port 44 (see FIG. 5). Even if this is not done, as shown in FIG. 24 (b), the movable accessory device 43 is controlled to return to the origin position (original position), and the liquid crystal display device 41 cancels the customer waiting demonstration and has a special symbol. It is possible to control the display of the normal screen (see the image P60A shown in FIG. 24B) for displaying the variation of the above. It should be noted that it is not possible to directly transmit the detection signal by the touch sensor of the firing handle 16 to the sub control board 80 due to the game rules.

<Explanation of count-up production>
Next, the count-up effect will be specifically described with reference to FIGS. 25 to 31.

In displaying the number of balls obtained by the big hit on the liquid crystal display device 41, a numerical count-up effect is performed. In this count-up effect, it is often the case that the number of balls is changed from the previous number to a new number. More specifically, as shown in FIG. 25 (a), the liquid crystal display device 41 has a ten thousand digit "0", a thousand digit "1", a hundred digit "5", and a tens digit "3". When "01538" indicating the ones place "8" is displayed and a count-up effect such as +14 count-up shown in FIG. 25 (b) occurs, from "01538" shown in FIG. 25 (a), It will change to "01552" shown in FIG. 25 (d). At this time, the change effect of changing from "01538" shown in FIG. 25 (a) to "01552" shown in FIG. 25 (d) will be performed, but the numbers are shown so as not to give the player a sense of discomfort. The changes need to be smooth. Therefore, conventionally, variable animation control is performed when changing the ones place from "8" to "2" and the tens place from "3" to "5". Specifically, when changing the ones place from "8" to "2", as shown in FIG. 25 (c-1), the numerical information of the new number of balls, which is a new fluctuation action scenario of the number of balls. Prepare AS1 (“2” in the figure) and the numerical information ZS1 (“8” in the figure) of the previous ball number, which is the fluctuation action scenario of the previous ball number, from the numerical information ZS1 of the previous ball number. , Performs a variable animation that changes the numerical information AS1 of the new number of balls. Then, in changing the tens digit from "3" to "5", as shown in FIG. 25 (c-2), the numerical information AS2 of the new number of balls, which is a new variation action scenario of the number of balls (illustrated). Then, "5") and the numerical information ZS2 of the previous number of balls ("3" in the figure), which is the fluctuation action scenario of the previous number of balls, are prepared, and new from the numerical information ZS2 of the previous number of balls. Perform a variable animation that changes the numerical information of the number of balls to AS2.

However, in this way, if two pieces of information, the numerical information ZS1 and ZS2 of the previous number of balls and the numerical information AS1 and AS2 of the new number of balls are prepared and the variation animation is performed according to the information, the control burden is increased. There was the problem of increasing. That is, the area displayed on the liquid crystal display device 41 is predetermined when performing a variable animation in which the ones place is changed from "8" to "2" and the tens place is changed from "3" to "5". .. Specifically, as shown in FIGS. 26 (a) to 26 (d), four scenes and objects L0 and L1 are prepared, and the numerical information ZS1 and ZS2 of the previous number of balls are set in the object L0. Numerical information AS1 and AS2 of a new number of balls are set in the object L1. Then, in this way, the variable animation is performed. That is, in the scene shown in FIG. 26A, the numerical information ZS1 and ZS2 of the previous number of balls set in the object L0 are displayed in the central portion of the liquid crystal display device 41. Next, in the scene shown in FIG. 26B, the upper half or more of the numerical information ZS1 and ZS2 of the previous number of balls set in the object L0 is displayed on the lower side of the liquid crystal display device 41 and set in the object L1. The lower half of the numerical information AS1 and AS2 of the new number of balls is displayed on the upper side of the liquid crystal display device 41. Next, in the scene shown in FIG. 26 (c), the upper portion of the numerical information ZS1 and ZS2 of the previous number of balls set in the object L0 is slightly displayed on the lower side of the liquid crystal display device 41 and set in the object L1. Numerical information AS1 and AS2 of the new number of balls are displayed on the upper side of the liquid crystal display device 41. Next, in the scene shown in FIG. 26 (d), the numerical information AS1 and AS2 of the new number of balls set in the object L1 are displayed in the central portion of the liquid crystal display device 41.

Thus, the variable animation is performed in this way. However, when such control is performed, it is necessary to set the numerical information ZS1 and ZS2 of the previous number of balls and the numerical information AS1 and AS2 of the new number of balls in the objects L0 and L1. The control burden will increase.

Therefore, in the present embodiment, the following processing is performed in order to solve the above-mentioned problems. That is, as shown in FIG. 27 (a), on the liquid crystal display device 41, the tenth place "0", the thousandth place "1", the hundreds place "5", the tens place "3", and the ones place " When "01538" indicating "8" is displayed and a count-up effect such as +14 count-up shown in FIG. 27 (b) occurs, "01538" shown in FIG. 27 (a) is displayed in FIG. 27 (d). ) Will change to "01552". At this time, when changing the ones place from "8" to "2" and the tens place from "3" to "5", as shown in FIGS. 27 (c-1) and 27 (c-2). After displaying the common high-speed fluctuation animation KAI of the same size as the number that does not change on the liquid crystal display device 41, the ones place is "2" (number information AS1 of the new number of balls) as shown in FIG. 27 (d). ), The tens digit is changed to "5" (numerical information AS2 of the new number of balls). By doing so, it is possible to break the relationship between the previous number of balls and the new number of balls and change the number without giving the player a sense of discomfort.

More specifically, as shown in FIGS. 28 (a-1) to 28 (a-4), four scenes and objects X1 to X3 and L1 are prepared. Then, by VDP803 (see FIG. 6), the common high-speed fluctuation animation KAI shown in FIG. 28 (b-1) is set in the scene shown in FIG. 28 (a-1). As a result, the common high-speed fluctuation animation KAI is displayed in the central portion of the liquid crystal display device 41.

Then, by VDP803 (see FIG. 6), the common high-speed fluctuation animation KAIA shown in FIG. 28 (b-2) is set in the scene shown in FIG. 28 (a-2). As a result, the common high-speed fluctuation animation KAIA is displayed in the central portion of the liquid crystal display device 41. The common high-speed fluctuation animation KAIa is enlarged and displayed (from the numbers that do not change) from the common high-speed fluctuation animation KAI shown in FIG. 28 (b-1).

Then, by VDP803 (see FIG. 6), the common high-speed fluctuation animation KAI shown in FIG. 28 (b-3) is set in the scene shown in FIG. 28 (a-3). As a result, the common high-speed fluctuation animation KAI is displayed in the central portion of the liquid crystal display device 41.

Next, by VDP803 (see FIG. 6), the numerical information AS1 of the new number of balls shown in FIG. 28 (b-4) is set in the scene shown in FIG. 28 (a-4). As a result, the numerical information AS1 of the new number of balls is displayed in the central portion of the liquid crystal display device 41.

However, in this way, if the common high-speed fluctuation animation is displayed regardless of the number of the previous number of balls, the common high-speed fluctuation animation KAI ⇒ enlarged display is displayed as a scenario. Common high-speed fluctuation animation KAIa ⇒ Common high-speed fluctuation animation KAI ⇒ Numerical information of new number of balls Only 10 scenarios of "0" to "9" need to be prepared. Therefore, it is not necessary to prepare the numerical information ZS1 and ZS2 of the previous number of balls as in the conventional case, and the control load can be reduced. Further, by displaying the common high-speed fluctuation animation KAI on the liquid crystal display device 41, the player can be shown the update of the count value of the cumulative display in a natural expression.

In the present embodiment, an example of displaying the enlarged common high-speed fluctuation animation KAIa on the liquid crystal display device 41 is shown, but the present invention is not limited to this, and only the common high-speed fluctuation animation KAI is continuously displayed. Is also good. However, by displaying the magnified common high-speed fluctuation animation KAIA, the display can be changed, and thus it is possible to prevent a situation in which the player's interest is reduced.

On the other hand, in the present embodiment, after displaying the common high-speed fluctuation animation KAI, the numerical information of the new number of balls is displayed, but the present invention is not limited to this, and FIGS. 28 (c-1) to (c-) are displayed. 4) may be used. That is, an object located behind the scene shown in FIG. 28 (c-1) when the common high-speed fluctuation animation KAI shown in FIG. 28 (b-1) is set by VDP803 (see FIG. 6). Numerical information AS1 of a new number of balls shown in FIG. 28 (b-4) is set in L1. In other words, the common high-speed fluctuation animation KAI is displayed on the liquid crystal display device 41 by superimposing it on the numerical information AS1 of the new number of balls shown in FIG. 28 (b-4). However, in this way, the player can only see the common high-speed fluctuation animation KAI.

Then, in that state (a state in which the numerical information AS1 of a new number of balls is set behind), the scene shown in FIG. 28 (c-2) is displayed by VDP803 (see FIG. 6) in FIG. 28 (b-2). ) Is set, and then the common high-speed fluctuation animation KAI shown in FIG. 28 (b-3) is set in the scene shown in FIG. 28 (c-3). After that, if the display of the high-speed fluctuation animation KAI is erased by VDP803 (see FIG. 6), it is shown in FIG. 28 (b-4) set in the object L1 as shown in FIG. 28 (c-4). The numerical information AS1 of the new number of balls will be displayed on the liquid crystal display device 41.

Even in this way, it is not necessary to prepare the numerical information ZS1 and ZS2 of the previous number of balls as in the conventional case, and the control load can be reduced. Further, by displaying the common high-speed fluctuation animation KAI on the liquid crystal display device 41, the player can be shown the update of the count value of the cumulative display in a natural expression.

By the way, in the present embodiment, an example from the generation to the end of the count-up effect such as +14 count-up shown in FIG. 27 (b) has been described, but FIGS. 27 (c-1) and (c-) have been described. While the common high-speed fluctuation animation KAI as shown in 2) is being displayed on the liquid crystal display device 41, a new count-up effect may occur. In such a case, as shown in FIG. 29, in a scenario in which the numerical information of the new number of balls becomes “2” (numerical information AS1 of the new number of balls), it is common as shown in FIG. 29 (a). After the high-speed fluctuation animation KAI is displayed on the liquid crystal display device 41, the enlarged common high-speed fluctuation animation KAI shown in FIG. 29 (b) is displayed on the liquid crystal display device 41, and then in FIG. 29 (b-1). The common high-speed fluctuation animation KAI shown is displayed on the liquid crystal display device 41, and the numerical information AS1 of the new number of balls shown in FIG. 29 (b-2) is displayed on the liquid crystal display device 41.

However, a new count-up effect has occurred, and the new number of balls has been replaced by "2" (new number of balls AS1), and the new number of balls has been changed to "5" (new). In the case of the numerical information of the number of balls AS2), the numerical information of the new number of balls is "2" (the numerical information of the new number of balls AS1) in the scenario where the numerical information of the new number of balls becomes "2". 5 ”(numerical information AS2 for the new number of balls) is overwritten. Specifically, after the enlarged common high-speed fluctuation animation KAI shown in FIG. 29 (b) is displayed on the liquid crystal display device 41, the common high-speed fluctuation animation KAI shown in FIG. 29 (c) is displayed on the liquid crystal display device 41. Is displayed on. After that, the enlarged common high-speed fluctuation animation KAIa shown in FIG. 29 (d) was displayed on the liquid crystal display device 41, and the common high-speed fluctuation animation KAI shown in FIG. 29 (e) was displayed on the liquid crystal display device 41. Later, the new numerical information AS2 of the number of balls shown in FIG. 29 (f) will be displayed on the liquid crystal display device 41.

However, in this way, since the display time of the common high-speed fluctuation animation is only lengthened, a new count-up effect can be executed without giving a sense of discomfort to the player. Furthermore, since the scenario is simply overwritten, the control method becomes simple.

On the other hand, in the present embodiment, when a count-up effect such as +14 count-up shown in FIG. 27 (b) occurs, a high-speed fluctuation animation of both the ones place and the tens place is displayed on the liquid crystal display device 41. However, as shown in FIG. 30, the high-speed fluctuation animation common to the ones place is displayed on the liquid crystal display device 41, and the tens place is a low-speed fluctuation animation (player) that increases by one. However, a low-speed fluctuation animation) may be displayed so that it can be visually recognized that the numbers are increasing one by one. That is, as shown in FIG. 30A, the liquid crystal display device 41 has a tenth place "0", a thousandth place "1", a hundreds place "0", a tens place "1", and a ones place "1". When "01018" indicating "8" is displayed and a count-up effect such as +14 count-up shown in FIG. 30 (b) occurs, "01018" shown in FIG. 30 (a) is displayed in FIG. 30 (g). ) Will change to "01032". At this time, when changing the tens digit from "1" to "3", the low speed of changing from "1" to "2" by VDP803 (see FIG. 6) as shown in FIG. 30 (c-2). The fluctuation animation is displayed on the liquid crystal display device 41, and then, as shown in FIG. 30 (d-2), the changed number "2" is displayed on the liquid crystal display device 41. Then, as shown in FIG. 30 (e-2), the low-speed fluctuation animation that changes from "2" to "3" is displayed on the liquid crystal display device 41 by VDP803 (see FIG. 6), and FIG. 30 (f-). As shown in 2), the changed number "3" is displayed on the liquid crystal display device 41. On the other hand, when changing the ones place from "8" to "2", until the tens place is changed to "3" by VDP803 (see FIG. 6) as shown in FIG. 30 (f-2). As shown in FIGS. 30 (c-1) to 30 (f-1), the common high-speed fluctuation animation KAI is repeatedly displayed on the liquid crystal display device 41. After that, as shown in FIG. 30 (g), the numerical information (“2” in the figure) of the new number of balls is displayed on the liquid crystal display device 41.

By doing so, the high-speed fluctuation animation common to the ones digit can be displayed on the liquid crystal display device 41, and the tens digit can display the low-speed fluctuation animation increasing one by one. At this time, in displaying the common high-speed fluctuation animation KAI on the liquid crystal display device 41, as shown in FIGS. 28 (c-1) to (c-3), numerical information of a new number of balls (in the figure, in the figure, “2”) may be superimposed behind the common high-speed fluctuation animation KAI. Further, the common high-speed fluctuation animation KAI is repeatedly displayed on the liquid crystal display device 41 a predetermined number of times or for a predetermined time until the tens digit changes to "3", and then the ones digit is changed to "2". A variable animation may be performed, and as shown in FIG. 30 (g), the numerical information (“2” in the figure) of the new number of balls may be displayed on the liquid crystal display device 41.

On the other hand, in the present embodiment, an example for the count-up effect is shown, but the present invention is not limited to this, and can be applied to an effect in which the count of a timer or the like is subtracted. That is, when performing an effect of subtracting a count of a timer or the like, as shown in FIG. 31 (a), a timer that displays up to the second decimal place is often used in the liquid crystal display device 41. In this case, if the speed at which the count is subtracted and the number changes is made the same for all digits, the player feels uncomfortable. Therefore, as shown in FIG. 31 (a), the common high-speed fluctuation animation KAI is displayed on the liquid crystal display device 41 for the second digit of the decimal point where the change is large. Then, for the first digit of the decimal point where the change is small, the liquid crystal display device 41 displays a low-speed fluctuation animation to the extent that the player can visually recognize how the numbers are subtracted one by one. Specifically, as shown in FIG. 31B, the liquid crystal display device 41 displays a low-speed fluctuation animation in which the first digit of the decimal point is subtracted by one from "3" to "2". However, by doing so, it is possible to show the player the change in the numbers in an easy-to-understand manner, and it is possible to reduce the control burden.

It should be noted that the common high-speed fluctuation animation KAI described in the present embodiment does not need to be an animation using all numbers from 0 to 9 because it is sufficient for the player to know the state of change. For example, "1 ⇒" Only a specific number of "8⇒4⇒9⇒5" may be displayed repeatedly.

Further, in the present embodiment, an example in which the common high-speed fluctuation animation KAI is applied only to the digits in which the numbers change is shown, but the present invention is not limited to this, and the digits may be applied to the digits in which the numbers do not change.

<Explanation of background change effect>
Next, the background change effect will be specifically described with reference to FIGS. 32 to 34.

In many cases, the background is changed (mode change) by the advance notice effect. If this background change does not change at all, the player feels monotonous, but if the change frequency is high, the player may not understand the game and may be confused. In addition, when a reach effect occurs due to a change in the background, there is a possibility that the background before the background change is displayed unless the background information displayed after the reach effect is properly managed.

Therefore, in the present embodiment, the following processing is performed in order to solve the above-mentioned problems. That is, the tables as shown in FIGS. 32 (a) to 32 (e) are used. This point will be described in detail below.

The table HK_TBL shown in FIG. 32 (a) is stored in the sub-control ROM 800b (see FIG. 6), and stores the number of fluctuations after the background change and the distribution table to be referred to.

Specifically, the table HK_TBL shown in FIG. 32 (a) is the first distribution table as a reference distribution table in the change of the special symbol after the background change and in the change of the special symbol in the 1st to 19th rotations. The table FR_TBL1 will be used. Then, in the variation of the special symbol at the 20th to 39th rotations, the second distribution table FR_TBL2 is used as the distribution table to be referred to. Further, in the variation of the special symbol at the 40th to 59th rotations, the third distribution table FR_TBL3 is used as the distribution table to be referred to. Further, in the fluctuation of the special symbol from the 60th rotation onward, the fourth distribution table FR_TBL4 is used as the distribution table to be referred to.

By the way, the first distribution table FR_TBL1 referred to in the variation of the special symbol at the 1st to 19th rotations is as shown in FIG. 32 (b). Specifically, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normally fluctuating (missing), it is won without changing the background. There is. Then, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normal reach (missing), the command is won without changing the background. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (missing), the command is won without changing the background. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is a normal reach (hit), the command is won without changing the background. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (hit), the command is won without changing the background.

Thus, the first distribution table FR_TBL1 is a distribution table in which all the distribution values at which the background change is executed are "0" (the background change is not won).

On the other hand, the second distribution table FR_TBL2 referred to in the variation of the special symbol at the 20th to 39th rotations is as shown in FIG. 32 (c). Specifically, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normally fluctuating (off), the probability shown in the figure is spring, summer, or autumn. , Winter, no background change. Then, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normal reach (off), the probability shown in the figure is spring, summer, autumn, winter, and background. It is designed to win either of the same. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (missing), the probability shown in the figure is spring, summer, autumn, winter, It is designed to win either with no background change. Furthermore, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is a normal reach (hit), the probability shown in the figure is spring, summer, autumn, winter, It is designed to win either with no background change. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (hit), the probability shown in the figure is spring, summer, autumn, and winter. , It is designed to win either with no background change.

Thus, the second distribution table FR_TBL2 is a distribution table in which it is difficult to win the background change, as shown in the probability shown in the figure.

On the other hand, the third distribution table FR_TBL3 referred to in the variation of the special symbol at the 40th to 59th rotations is as shown in FIG. 32 (d). Specifically, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normally fluctuating (off), the probability shown in the figure is spring, summer, or autumn. , Winter, no background change. Then, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normal reach (off), the probability shown in the figure is spring, summer, autumn, winter, and background. It is designed to win either of the same. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (missing), the probability shown in the figure is spring, summer, autumn, winter, It is designed to win either with no background change. Furthermore, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is a normal reach (hit), the probability shown in the figure is spring, summer, autumn, winter, It is designed to win either with no background change. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (hit), the probability shown in the figure is spring, summer, autumn, and winter. , It is designed to win either with no background change.

Thus, the third distribution table FR_TBL3 is a distribution table that is easy to win the background change, as shown in the probability shown in the figure.

On the other hand, the fourth distribution table FR_TBL4 referred to in the variation of the special symbol from the 60th rotation is as shown in FIG. 32 (e). Specifically, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normally fluctuating (off), the probability shown in the figure is spring, summer, or autumn. , It is supposed to win one of the winter. Then, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normal reach (off), the probability shown in the figure is any of spring, summer, autumn, and winter. It is supposed to win the crab. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (missing), the probability shown in the figure is that of spring, summer, autumn, and winter. You will win one of them. Furthermore, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is a normal reach (hit), the probability shown in the figure is that of spring, summer, autumn, and winter. You will win one of them. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (hit), the probability shown in the figure is spring, summer, autumn, and winter. It is designed to win one of the above.

Thus, the fourth distribution table FR_TBL4 is a distribution table in which the background change is always executed (the background change is always won).

Then, in this way, if the first distribution table FR_TBL1 which is a distribution table in which all the distribution values at which the background change is executed is "0" (does not win the background change) is prepared and lottery is performed, control is performed. It is not necessary to perform control such as not changing the background, which is a notice effect, and thus it is possible to reduce the control load. Furthermore, in the debugging work related to the lottery of the background change, which is a notice effect, it is only necessary to check the distribution table, so that the man-hours required for debugging can be reduced.

In this embodiment, the background change has been described as an example, but the present invention is not limited to this, and can be applied to any advance notice effect.

By the way, the column (offset value) of the first distribution table FR_TBL1 to the fourth distribution table FR_TBL4 shown in FIG. 32 is an effect control command DI_CMD which is a lottery result of a special symbol transmitted from the main control board 60 (main control CPU 600a). Is based on. Based on this content, after the branching variation pattern lottery is performed on the sub control board 80 side, the subsequent advance notice effect is performed with the variation pattern managed on the sub control board 80 side as an offset value. Will be. Hereinafter, a specific example will be described.

The sub-control fluctuation pattern distribution table SUB_FR_TBL shown in FIG. 33 (a) is stored in the sub-control ROM 800b (see FIG. 6), and the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a). The effect control command DI_CMD and the fluctuation pattern on the sub-control side are stored.

Specifically, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normally fluctuating (missing), the fluctuation pattern is won without change. It has become like. Then, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normal reach (missing), the fluctuation pattern is the normal reach 1 (missing) with the probability shown in the figure. , Normal reach 2 (off) is to be won. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (missing), the fluctuation pattern is SP reach 1 (with the probability shown in the figure). It is designed to win either (off) or SP reach 2 (out). Furthermore, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is normal reach (hit), the fluctuation pattern is the normal reach 1 (hit) with the probability shown in the figure. ), Normal reach 2 (hit) is to be won. Further, when the effect control command DI_CMD, which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a), is SP reach (hit), the fluctuation pattern is SP reach 1 with the probability shown in the figure. You will win either (hit) or SP reach 2 (hit).

Thus, by using such a sub-control fluctuation pattern distribution table SUB_FR_TBL, the fluctuation pattern on the sub-control side is determined. The result is a column (offset value) of the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b) and the symbol change notice table ZH_TBL shown in FIG. 33 (c). Specifically, in the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b), in the case of a normal fluctuation (off) fluctuation pattern, the left symbols displayed on the liquid crystal display device 41 are 1 to 8 with the probability shown in the figure. Win one of the above. Then, in the case of the normal reach 1 (off) fluctuation pattern, the left symbol displayed on the liquid crystal display device 41 wins any of 1 to 8 with the probability shown in the figure, and in the case of the normal reach 2 (off) fluctuation pattern, the figure is shown. With a probability, the symbol on the left displayed on the liquid crystal display device 41 wins any of 1 to 8. Further, in the case of the SP reach 1 (missing) fluctuation pattern, the left symbol displayed on the liquid crystal display device 41 wins any of 1 to 8 with the probability shown in the figure, and in the case of the SP reach 2 (missing) fluctuation pattern, With the probability shown in the figure, the symbol on the left displayed on the liquid crystal display device 41 wins any of 1 to 8. Furthermore, in the case of the normal reach 1 (hit) fluctuation pattern, the left symbol displayed on the liquid crystal display device 41 wins any of 1 to 8 with the probability shown in the figure, and in the case of the normal reach 2 (hit) fluctuation pattern, the figure is shown. With the probability of, the left symbol displayed on the liquid crystal display device 41 wins any of 1 to 8. Further, in the case of the SP reach 1 (hit) fluctuation pattern, the left symbol displayed on the liquid crystal display device 41 wins any of 1 to 8 with the probability shown in the figure, and in the case of the normal reach 2 (hit) fluctuation pattern, With the probability shown in the figure, the symbol on the left displayed on the liquid crystal display device 41 wins any of 1 to 8.

On the other hand, in the case of the normal fluctuation (off) fluctuation pattern, the symbol change notice table ZH_TBL shown in FIG. 33 (c) is elected without changing to another symbol. Then, in the case of the normal reach 1 fluctuation (missing) fluctuation pattern, it is won whether or not it changes to another symbol with the probability shown in the figure, and in the case of the normal reach 2 fluctuation (missing) fluctuation pattern, it is different with the probability shown in the figure. Win if it doesn't change or changes. Furthermore, in the case of the SP reach 1 fluctuation (missing) fluctuation pattern, it is won with the probability shown in the figure whether or not it changes to another symbol, and in the case of the SP reach 2 fluctuation (missing) fluctuation pattern, the probability shown is shown. , Win if it does not change to another pattern or if it changes. Furthermore, in the case of the normal reach 1 fluctuation (hit) fluctuation pattern, it is won whether or not it changes to another symbol with the probability shown in the figure, and in the case of the normal reach 2 fluctuation (hit) fluctuation pattern, the probability shown is shown. Win if it does not change to another pattern or if it changes. Further, in the case of the SP reach 1 fluctuation (hit) fluctuation pattern, the probability shown is that the symbol does not change or changes, and in the case of the SP reach 2 fluctuation (hit) fluctuation pattern, the probability shown is shown. Then, you will win if it does not change to another pattern or if it changes.

Thus, when the symbol change notice table ZH_TBL shown in FIG. 33 (c) is used to change to another symbol, a lottery is performed using the change symbol lottery distribution table HZC_FR_TBL shown in FIG. 33 (d). It becomes. The pattern of the column of the change symbol lottery distribution table HZC_FR_TBL is a row (variation) won by lottery using the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b).

Specifically, the change symbol lottery distribution table HZC_FR_TBL shown in FIG. 33 (d) is "3" when the left symbol of "1" is won in the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b). Win a prize either to change to the left symbol of "7" or to change to the left symbol of "7". Then, when the left symbol of "2" is won in the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b), it changes to the left symbol of "1" or changes to the left symbol of "3". Win a prize either to change to the left symbol of "5" or to change to the left symbol of "7". Further, when the left symbol of "3" is won in the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b), the winner is won without any change. Furthermore, when the left symbol of "4" is won in the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b), whether it changes to the left symbol of "1" or the left symbol of "3". , Change to the left symbol of "5" or change to the left symbol of "7". Further, when the left symbol of "5" is won in the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b), whether it changes to the left symbol of "1" or the left symbol of "3". , Change to the left symbol of "5" or change to the left symbol of "7". Furthermore, when the left symbol of "6" is won in the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b), whether it changes to the left symbol of "1" or the left symbol of "3". , Change to the left symbol of "5" or change to the left symbol of "7". Further, when the left symbol of "7" is won in the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b), the winner is won without change. Furthermore, when the left symbol of "8" is won in the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b), whether it changes to the left symbol of "1" or the left symbol of "3". , Change to the left symbol of "5" or change to the left symbol of "7".

Thus, the advance notice effect is performed using the table as shown in FIG. 33.

Then, the fluctuation pattern determined in this way is used as an offset value, and the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b) and the symbol change notice table ZH_TBL shown in FIG. 33 (c) based on the offset value. By performing a lottery using the above, it is possible to select a table according to the offset value, so that the control load can be reduced.

Further, by using the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b) and using the row (variation) won by lottery, the change symbol lottery distribution table HZC_FR_TBL shown in FIG. 33 (d) is used for lottery. , Since the table can be selected according to the row (variation), the control load can be reduced.

By the way, in the case of the above background change (mode change), we tried to manage the data for managing the background information (for example, spring: 0, summer: 1, autumn: 2, winter: 3) with one background data. In this case, if the background change lottery is won using the table shown in FIG. 32 and the background data is rewritten when the background changes, there is a problem that the background is suddenly switched when the decorative pattern starts to change. rice field. In particular, it was necessary to pay attention to the time-consuming background change such that the background changes when the shutter is closed and opened. This point will be specifically described with reference to the screen examples shown in FIGS. 34 (a-1) to 34 (a-5). The screen examples shown in FIGS. 34 (a-1) to 34 (a-5) are conventional screen examples showing an example in which the background changes from spring to summer. That is, as shown in FIG. 34 (a-1), the liquid crystal display device 41 displays a stopped decorative symbol (see image P100) in the center of the screen, and the number of start-holding balls (image) is displayed in the lower left corner of the screen. (See P101) is displayed, a resident symbol (see image P102) is displayed in the lower right corner of the screen, and the background is a spring screen. It should be noted that this resident symbol is a reduced number indicated by the decorative symbol that is variablely displayed, and is, in principle, variablely displayed in synchronization with the decorative symbol.

Next, as shown in FIG. 34 (a-2), the decorative design fluctuates (see image P103), and an effect such that the scene is switched due to reach or the like occurs, and the left shutter located on the left side of the screen (see image P106a). Then, it is assumed that the screen is closed by the right shutter (see image P106b) located on the right side of the screen. At this time, originally, the decorative pattern according to the spring background (see image P100), the background as it is in spring, and the number of start-holding balls according to the spring background (see image P101) are left shutters (image P106a). A screen hidden by the right shutter (see image P106b) and the right shutter (see image P106b) is displayed on the liquid crystal display device 41. However, when managed with one background data, as shown in FIG. 34 (a-2), the spring background changes to the summer background, and the decorative pattern according to the summer background (see image P103) and the summer. The number of start-holding balls (see image P106) according to the background of the above is displayed on the liquid crystal display device 41 to the extent that the player can visually recognize it from the gap between the left shutter (see image P106a) and the right shutter (see image P106b). It ends up. The resident symbol (see image P102) is not hidden by the left shutter (see image P106a) and the right shutter (see image P106b), and is displayed on the liquid crystal display device 41.

Next, from the state shown in FIG. 34 (a-2), as shown in FIG. 34 (a-3), except for the resident symbol (see image P102), the left shutter (see image P106a) and the right shutter (see image P106b). ) Is displayed on the liquid crystal display device 41.

Then, as shown in FIG. 34 (a-4), the left shutter (see image P106a) and the right shutter (see image P106b) open, and from the gap between the left shutter (see image P106a) and the right shutter (see image P106b). , The summer background, the decorative pattern corresponding to the summer background (see image P103), and the number of start-holding balls according to the summer background (see image P104) are displayed on the liquid crystal display device 41. Then, as shown in FIG. 34 (a-5), the liquid crystal display device 41 does not display the left shutter (see image P106a) and the right shutter (see image P106b), and is used as a summer background and a summer background. The corresponding decorative symbol (see image P103), the number of start-holding balls according to the summer background (see image P104), and the resident symbol (see image P102) are displayed on the liquid crystal display device 41.

However, originally, for the first time in the case shown in FIG. 34 (a-4), a summer background, a decorative pattern corresponding to the summer background (see image P103), and a start holding ball according to the summer background. The number (see image P104) is displayed on the liquid crystal display device 41, but when managed by one background data, the left shutter (see image P106a) and the right shutter are displayed as shown in FIG. 34 (a-2). When (see image P106b) is closed, the summer background, the decorative pattern corresponding to the summer background (see image P103), and the number of start-holding balls according to the summer background (see image P104) are displayed on the liquid crystal display device 41. There was a possibility that it would be displayed in. Therefore, there is a problem that the background display is inappropriate.

Therefore, in the present embodiment, the following processing is performed in order to solve the above-mentioned problems. That is, two first background data (current background) and two second background data (background after change) are prepared, and the data is transferred by the sub-control CPU 800a at an appropriate timing. This point will be specifically described with reference to the screen examples shown in FIGS. 34 (b-1) to 34 (b-5). When the background change lottery is won using the table shown in FIG. 32 and the background changes from spring to summer, the sub-control CPU 800a sets 0 (= spring) in the first background data and the second. Set 1 (= summer) in the background data. At this time, since the first background data is data indicating the current background, the VDP 803 (see FIG. 6) is based on this data on the liquid crystal display device 41 as shown in FIG. 34 (b-1). Display the spring screen as the background. At this time, a decorative pattern (see image P100) corresponding to the spring background is displayed in the center of the screen of the liquid crystal display device 41, and the number of start-holding balls (see image P101) according to the spring background is displayed in the lower left corner of the screen. A resident symbol (see image P102) is displayed in the lower right corner of the screen.

Next, since 0 (= spring) is still set in the first background data, the VDP 803 (see FIG. 6) is displayed on the liquid crystal display device 41 as a background as shown in FIG. 34 (b-2). The image that closes the left shutter (see image P106a) and the right shutter (see image P106b) is displayed while the spring screen is displayed. As a result, as shown in FIG. 34 (b-3), the screen hidden by the left shutter (see image P106a) and the right shutter (see image P106b) other than the resident symbol (see image P102) is displayed on the liquid crystal display device 41. Is displayed. At this time, the sub-control CPU 800a sets 1 (= summer) set in the second background data in the first background data. As a result, 1 (= summer) is set in the first background data.

Next, since 1 (= summer) is set in the first background data, the VDP803 (see FIG. 6) has a left shutter (see image P106a) and a right as shown in FIG. 34 (b-4). When the shutter (see image P106b) is opened, a summer screen is displayed as a background. At this time, the liquid crystal display device 41 displays the number of start-holding balls according to the summer background (see image P104) and the decorative design according to the summer background (see image P103) on the liquid crystal display device 41.

Next, since 1 (= summer) is still set in the first background data, VDP803 (see FIG. 6) is displayed on the liquid crystal display device 41 as a background as shown in FIG. 34 (b-5). While the summer screen is displayed, the left shutter (see image P106a) and the right shutter (see image P106b) are not displayed, and the summer screen is displayed as the background. At this time, the liquid crystal display device 41 has a number of start-holding balls according to the summer background (see image P104), a decorative symbol according to the summer background (see image P103), and a resident symbol (see image P102). Is displayed.

By doing so, the data can be transferred at an appropriate timing, so that an appropriate background display can be performed. Furthermore, the background control process can be simplified.

Further, in the present embodiment, when the left shutter (see image P106a) and the right shutter (see image P106b) are closed, the number of start-holding balls (see image P101) according to the spring background is hidden, and the left shutter (see image P106a) is hidden. ) And the right shutter (see image P106b), the number of start-holding balls (see image P104) according to the summer background is displayed, so that the player is made to recognize that the background has changed. It can be facilitated.

In the present embodiment, the number of start-holding balls according to the background is displayed on the liquid crystal display device 41, but the present invention is not limited to this, and the display of the number of start-holding balls can be shared in each background. At this time, as shown in FIGS. 34 (c-2) to (c-4), the number of start-holding balls (see image P110) is hidden by the left shutter (see image P106a) and the right shutter (see image P106b). Try not to. That is, as shown in FIGS. 34 (c-1) to (c-5), the number of start-holding balls (see image P110) is kept displayed on the liquid crystal display device 41. In this way, it is possible to execute the look-ahead hold change notice for the winning start hold ball without affecting the background transition situation.

<Explanation of production control commands in rescue games and games with special electric support symbols>
Next, the effect control commands in the relief game and the game of the special electric support symbol will be described.

As described above, in the rescue game, as shown in FIG. 9B, the number of time reductions in the second time reduction game state (with low probability electric support) exceeds 100 times, and in the special electric support symbol game. As shown in FIG. 9 (c), the number of time reductions in the second time reduction game state (state with low probability electric support) can exceed 100 times.

On the other hand, in the conventional game, as shown in FIG. 9A, the number of time reductions in the time reduction game state (state with low probability electric support) is up to 100 times. Therefore, the effect control command DI_CMD transmitted from the main control board 60 (main control CPU 600a) to the sub control board 80 (sub control CPU 800a) should be one command (2 bytes). That is, as a command mechanism, the effect control command DI_CMD is composed of two bytes, a high-order byte and a low-order byte. The high-order byte is composed of 80H to FFH in which the 7th bit (most significant bit) is 1, and the low-order byte is composed of 01H to 7FH in which the 7th bit (most significant bit) is 0. As a result, the sub-control CPU 800a can determine whether the 7th bit is 1 or 0, and the sub-control CPU 800a can determine whether the effect control command DI_CMD is a high-order byte or a low-order byte. Therefore, when the sub-control CPU 800a receives the effect control command DI_CMD, if the command is missing or abnormal due to noise or the like, it is possible to detect a command that is not the correct combination of the upper byte and the lower byte. Therefore, by controlling the abnormal command, it is possible to prevent the problem from occurring.

However, if the number of time reductions is 100, the effect control command DI_CMD can be expressed by 8001H to 64H with one command. That is, 80H of the upper byte is a type indicating that the transmission content is the number of time reductions, and the lower byte indicates 1 time (01H) to 100 times (64H) of the number of time reductions.

However, in the game of the special electric support symbol, the number of time reductions can exceed 100 times. Therefore, for example, when the number of times is 1000, the number that can be expressed by the lower byte of one command is described above. As described above, since it is necessary to set the 7th bit (most significant bit) of the lower byte to 0 so as not to cause a problem, it is from 01H to 7FH (1 time to 127 times). Therefore, since the digit goes up any more, it is necessary to use two commands.

By the way, in the case of two commands, if 1000 times are to be transmitted by the command, a method of dividing 1000 = 03E8H expressed in hexadecimal into upper bytes and lower bytes and transmitting them by two commands, 8003H and 81E8H, respectively, can be considered. Note that 80xxH is a type command indicating that the transmission content is the upper byte of the time reduction number of times, and 81xxH is a type command indicating that the transmission content is the lower byte of the time reduction number of times.

However, in the 81E8H, since the 7th bit (most significant bit) of the lower byte is 1, it is not possible to control the abnormal command and prevent the trouble from occurring. Therefore, it is conceivable to divide 1000 = "00111" and "1101000" expressed in binary numbers into 7 bits so that the 7th bit (most significant bit) of the lower byte becomes 0. However, in this case, there is a problem that a control load is applied because a process of dividing the main control CPU 600a and a process of recombining the sub control CPU 800a are performed.

Therefore, in the present embodiment, as a way of holding data when making two commands, the lower byte of the first command is a decimal number of thousands and hundreds (00 to 99), and the lower byte of the second command is a decimal number. The effect control command DI_CMD that is in the tens and ones place (00 to 99) is generated by the main control CPU 600a and transmitted to the sub control board 80 (sub control CPU 800a). The received sub-control CPU 800a multiplies the numerical value of the lower byte of the first command by 100, and adds the numerical value of the lower byte of the second command to it. As a result, it is possible to receive the number of times data composed of the original 2-byte data. Further, when the received sub-control CPU 800a uses the VDP803 to display a number on the liquid crystal display device 41, the numerical value of the first command is the number in the thousands and hundreds, and the numerical value of the second command is ten and one. All you have to do is display it as a digit.

However, by doing so, not only the command configuration can be made easy to understand, but also the control load can be reduced.

More specifically, if the number of time reductions is 1000, the first command can be divided into "10" and "00", and the second command can be expressed by 8101H. In addition, 0BH = 11, 01H = 01, which is different from "10" and "00", but this may cause a problem with data in which 1 byte is all 0, so the command is +1 to the actual value. It is expressed by 01H to 64H.

Thus, the sub-control CPU 800a that has received such a command subtracts 1 from 0BH of the lower byte of the first command to 10 and subtracts 01H of the lower byte of the second command to 00. Then, the sub-control CPU 800a adds the first command: 10 × 100 + the second command: 00, the numerical value obtained by subtracting the lower byte of the first command by 100, and the numerical value obtained by subtracting the lower byte of the second command by 1. As a result, the sub-control CPU 800a can receive the content indicating 1000 times of time reduction. Further, when displaying a number on the liquid crystal display device 41 using the VDP803, the numerical value obtained by subtracting the lower byte of the first command by 1 is subtracted by 1 from the thousands and hundreds digits, and the lower byte of the second command is subtracted by 1. It will be displayed as a number in the tens and ones place.

Further details of the above processing method will be described later.

By the way, in the present embodiment, the time reduction number of times has been described as an example, but the present invention is not limited to this, and a predetermined number of times (for example, 1000 times) in the rescue game shown in FIG. It is also used for the effect control command DI_CMD when counting the number of fluctuations of the special symbol until the transition to the 2 hour short game state (the state with low probability electric support) and transmitting it to the sub control CPU 800a.

<Main control: Program description>
Here, the outline of the program stored in the main control ROM 600b (see FIG. 6) processed by the main control board 60 will be described in more detail by referring to FIGS. 35 to 55. do.

<Main control: Explanation of main processing>
First, when the power is turned on to the pachinko gaming machine 1, a power-on signal indicating that the DC voltage generated by the voltage generation unit 1300 of the power supply board 130 (see FIG. 6) is turned on to each control board is sent. In response to the signal, the main control CPU 600a (see FIG. 6) reads out the program stored in the main control ROM 600b (see FIG. 6) and performs the main control main process shown in FIG. 35. At this time, the main control CPU 600a first sets itself in the interrupt disabled state (step S1).

Next, the main control CPU 600a performs a stack pointer setting process for setting the value of the stack pointer inside the main control CPU 600a corresponding to the final address of the normal stack area (step S2).

Next, the main control CPU 600a clears the WDT643 shown in FIG. 15 (step S3), and clears the output port that outputs the emission control signal (step S4).

Subsequently, the main control CPU 600a sets the startup waiting time of the sub control board 80 (step S5), decrements the set waiting time (-1) (step S6), and clears WDT643 shown in FIG. 15 (step). S7).

Next, the main control CPU 600a confirms whether or not the set waiting time has become "0" (step S8), and if it has not become "0" (step S8: ≠ 0), the process returns to the process of step S7. , If it is "0" (step S8: = 0), the process proceeds to step S9.

Next, the main control CPU 600a acquires the voltage abnormality signal ALARM (see FIG. 6) output from the power supply board 130 (voltage monitoring unit 1310) (see FIG. 6) twice, and the voltage abnormality signal ALARM acquired twice. After confirming whether or not the levels of the above are the same, the voltage abnormality signal ALARM is stored in the internal register of the main control CPU 600a (not shown), and the level of the voltage abnormality signal ALARM is confirmed (step S9). Then, if the level of the voltage abnormality signal ALARM is "L" level (step S10: YES), the process returns to the process of step S9, and if the level of the voltage abnormality signal ALARM is "H" level (step S10: NO). The process proceeds to step S11. That is, the main control CPU 600a repeats the same process until the voltage abnormality signal ALARM changes to a normal level (that is, “H” level) (steps S9 to S10). In this way, by acquiring the voltage abnormality signal ALARM twice, an accurate signal can be read.

Next, the main control CPU 600a permits data writing to the main control RAM 600c (step S11), and initially sets the work area of the main control RAM 600c (step S12). Specifically, 00H is set in the power supply abnormality confirmation counter, and 01H is set in the system operation status. Then, the main control CPU 600a sets the data in the reception baud rate setting register RPR (see FIG. 16A), sets the reception baud rate (bps), and sets the parity presence / absence setting register RPEN (see FIG. 16A). Set the data, set whether with or without parity, and if set with parity, set the data in the parity odd / even setting register REVEN (see FIG. 16A) and set whether it is even parity or odd parity. I do. Further, the data is set in the transmission baud rate setting register TPR (see FIG. 17 (a)), the transmission baud rate (bps) is set, and the data is set in the parity presence / absence setting register TPN (see FIG. 17 (a)). Set whether to have parity or not, and if it is set to have parity, set the data in the parity odd / even setting register TEVEN (see FIG. 17A) and set whether it is even parity or odd parity. Further, the main control CPU 600a sets the division ratio of the synchronization clock in the synchronization clock division ratio setting register CLK (see FIG. 19A), and sets the data length division ratio in the data length setting register LENG (see FIG. 19A). , Set the data length.

Thus, by making such a setting, the one-chip computer 600 uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. 15 to transmit predetermined data to the payout / launch control board 70 by serial transmission. It becomes possible to transmit, and it becomes possible to transmit predetermined data to a sub-control board 80 by serial transmission using an asynchronous serial communication circuit (CH1) 647.

However, according to the present embodiment, the main control CPU 600a (see FIG. 6) is initially set by turning on the power of the pachinko gaming machine 1 when setting the reception baud rate and the transmission baud rate (bps). The reception baud rate and the transmission baud rate (bps) are set without determining whether the initial setting is due to the internal reset of the one-chip microcomputer 600 due to the abnormal reset signal. As a result, it is possible to reduce the situation in which abnormal data is transmitted. That is, when an abnormal reset occurs, there is a risk that abnormal data is stored in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647. Therefore, whether it is the initial setting when the power is turned on to the asynchronous serial communication circuit (CH0) 646 and the pachinko gaming machine 1, or the initial setting when the inside of the one-chip microcomputer 600 is reset by the abnormal reset signal. If the baud rate is set without making a judgment, it is possible to reduce the situation where abnormal data is transmitted.

Further, in step S12, the main control CPU 600a performs a process of setting initial values in the transmission buffer register TXBUF (see FIG. 17B) and the transmission data register TRBUF (see FIG. 19B). However, by doing so, it is possible to reduce the situation in which abnormal data is transmitted due to the influence of noise or the like immediately after the serial communication is started. That is, when the power is turned on to the pachinko gaming machine 1, the transmission buffer register TXBUF (see FIG. 17B) is transmitted by the system reset signal RST generated by the system reset generation unit 1320 (see FIG. 6). The credit data register TRBUF (see FIG. 19B) will be initialized, but by clearly initializing it again on the program, it will be abnormal due to the influence of noise etc. immediately after the serial communication is started. It is possible to reduce the situation of transmitting various data.

Next, the main control CPU 600a transmits a processing command (effect control command DI_CMD) for displaying the standby screen on the liquid crystal display device 41 on the sub control board 80 (step S13).

Next, the main control CPU 600a clears WDT643 shown in FIG. 15 (step S14), and confirms whether or not a signal (power-on signal) indicating that the power has been turned on has arrived from the payout control board 70 (step S15). .. If the power-on signal has not arrived (step S15: OFF), the process returns to step S14, and if the power-on signal has arrived (step S15: ON), the process proceeds to step S16.

Next, the main control CPU 600a acquires the level data of the RAM clear switch 620 and the setting key switch 630, and saves the level data in the working area of the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c (step S16). ..

Next, as shown in FIG. 2, the main control CPU 600a has an upper opening / closing door 7, a door opening signal indicating whether or not the lower opening door 8 is open, and a RAM clear switch retracted to the work area of the main control RAM 600c. The signal of 620 and the signal of the setting key switch 630 are acquired (step S17), and it is confirmed whether or not all of them are turned on (step S18). If all are ON (step S18: YES), the main control CPU 600a performs the setting switching process (step S19).

<Main control: Main processing: Explanation of setting switching processing>
Here, this setting switching process will be specifically described with reference to FIG. 37.

First, the main control CPU 600a transmits a setting switching start command (effect control command DI_CMD) indicating that the setting is being changed to the sub control board 80 (step S50).

Next, the main control CPU 600a clears the backup flag (step S51). The backup flag is data indicating whether or not the backup process has been executed when a voltage drop due to a power failure or the like is detected in the power supply abnormality check process shown in FIG. 38. Further, this backup flag is cleared in order to detect in step S21 shown in FIG. 36, which will be described later, that the main control RAM 600c is not backed up normally due to power failure due to some reason during the setting switching process. Is.

Next, the main control CPU 600a sets 02H to the system operation status (step S52), and sets a set value of the probability of generating a special gaming state advantageous to the player stored in the main control RAM 600c (see FIG. 6). Acquire and set in the W register (step S53). Specifically, when the set value is, for example, "1" to "6", in the program, the set value "1" to "6" corresponds to the value of "00H" to "05H". It will be set in the W register.

Next, the main control CPU 600a compares the value set in the W register with the set maximum value of the probability of generating a special gaming state advantageous to the player (for example, "05H" corresponding to "6") (step S54). .. Then, if the value set in the W register of the main control CPU 600a is larger than the set maximum value of the probability of generating a special gaming state advantageous to the player (for example, "05H" corresponding to "6") (step S55). : YES), it is determined that the value is abnormal, and 00H is set in the W register (step S56).

On the other hand, if the value set in the W register is smaller than the set maximum value (for example, "05H" corresponding to "6") of the probability of generating a special gaming state advantageous to the player (step S55: NO), the normal value. Is determined, and the process proceeds to step S57.

Next, the main control CPU 600a sets a security signal output to a hall computer (not shown) used for managing the game islands of the game field to ON via an external terminal (not shown), and the security signal is shown in the figure. Output to a hall computer (not shown) via an external terminal (step S57).

Next, the main control CPU 600a sets 00H to the LED common port (step S58).

Next, the main control CPU 600a outputs the value set in the W register to the LED data port (step S59).

Next, the main control CPU 600a sets the LED common port for displaying the set value to ON (step S60).

Next, the main control CPU 600a sets a predetermined value in the register in the main control CPU 600a so that a wait of 4 ms is applied, and performs a process of counting down (step S61). In this process, when confirming the change in the level data of the RAM clear switch 620 (see FIG. 6) and the setting key switch 630 (see FIG. 6), it is necessary to wait at least 4 ms from the acquisition of the previous switch level. This is a process for confirming that the level data is not changed due to irregularities such as noise. Furthermore, when the change in the voltage abnormality signal in the subsequent power supply abnormality check process is confirmed and the power supply abnormality confirmation counter is counted, the "L" level of the voltage abnormality signal becomes noise by allowing a time of 4 ms. It is also a process for confirming that the level data is not irregular.

Next, the main control CPU 600a performs a power supply abnormality check process (step S62). This power supply abnormality check process will be specifically described with reference to FIG. 38.

<Main control: Main processing: Explanation of power supply abnormality check processing>
As shown in FIG. 38, the main control CPU 600a acquires the voltage abnormality signal ALARM (see FIG. 6) output from the power supply board 130 (voltage monitoring unit 1310) (see FIG. 6) twice (step S80). It is confirmed whether or not the levels of the voltage abnormality signals ALARM acquired twice are the same (step S81). If they match (step S81: YES), the main control CPU 600a confirms the level of the voltage abnormality signal ALARM (step S82), and if they do not match (step S81: NO), the process returns to the process of step S80.

Next, if the level of the voltage abnormality signal ALARM is "H" level (step S82: OFF), the main control CPU 600a clears the power supply abnormality confirmation counter (step S83), and ends the power supply abnormality check process.

On the other hand, if the level of the voltage abnormality signal ALARM is "L" level (step S82: ON), the main control CPU 600a increments (+1) the power supply abnormality confirmation counter (step S84) and sets the value of the power supply abnormality confirmation counter. Confirm (step S85). If the value of the power supply abnormality confirmation counter is not 2 or more (step S85: NO), the power supply abnormality check process is completed.

On the other hand, if the value of the power supply abnormality confirmation counter is 2 or more (step S85: YES), the main control CPU 600a transmits a power failure command (effect control command DI_CMD) indicating that the power supply has been cut off to the sub control board 80. (Step S86).

Next, the main control CPU 600a confirms the value of the system operation status (step S87). If the value of the system operation status is 02H, it is determined that the setting change process is in progress (step S87: YES), the backup flag is not set to ON, and the process proceeds to step S89. By doing so, it is possible to detect in step S21 shown in FIG. 36, which will be described later, when the main control RAM 600c is not normally backed up due to power failure due to some reason during the setting switching process.

On the other hand, if the value of the system operation status is not 02H, it is determined that the setting change process is not in progress (step S87: NO), and the backup flag is set to ON (step S88).

Next, the main control CPU 600a sets the data writing to the main control RAM 600c to the prohibited state (step S89), and clears the output data of all the output ports (step S90). Then, the timer interrupt is disabled (step S91), the infinite loop process is repeated, and the process of waiting for the voltage to drop is performed.

<Main control: Main processing: Explanation of setting switching processing>
Thus, when the power supply abnormality check process (step S62) is completed through the above process, the main control CPU 600a is subjected to the level data of the RAM clear switch 620 of the previous time and the present time, and the level data of the setting key switch 630. The switch edge data of the RAM clear switch 620 signal and the switch edge data of the setting key switch 630 signal are created (step S63). The main control CPU 600a stores the created edge data in the main control RAM 600c.

Next, the main control CPU 600a confirms the edge data stored in the main control RAM 600c, and if the setting key switch 630 is ON (step S64: NO), the process proceeds to step S65, and the setting key switch 630 is turned OFF. If (step S64: YES), the process proceeds to step S67.

Next, if the RAM clear switch 620 is ON (step S65: NO), the main control CPU 600a increments (+1) the value of the W register (step S66), and returns to the process of step S54.

On the other hand, if the RAM clear switch 620 is OFF (step S65: NO), the process returns to the process of step S57.

Thus, the above process is repeated until the setting key switch 630 is turned off, and when the setting key switch 630 is turned off, the main control CPU 600a stores the value of the W register in the main control RAM 600c (see FIG. 6). It overwrites and stores the set value of the probability of generating a special gaming state advantageous to the player (for example, the set value of "00H" to "05H" corresponding to "1" to "6") (step). S67).

Next, the main control CPU 600a outputs the setting confirmation display to the LED data port (step S68).

Next, the main control CPU 600a transmits a setting switching end command (effect control command DI_CMD) reflecting the set value to the sub control board 80 (step S69).

<Main control: Explanation of main processing>
Thus, when the setting switching process (step S19) shown in FIG. 35 is completed through the above processes, the main control CPU 600a proceeds to the process of step S26 shown in FIG. 36.

On the other hand, the main control CPU 600a confirms whether the signal of the RAM clear switch 620 and the signal of the setting key switch 630 are all ON (step S18), and if they are not all ON (step S18). : NO), the main control CPU 600a performs the process of step S20 shown in FIG.

That is, the main control CPU 600a corresponds to "00H" corresponding to the set value (for example, "1" to "6" of the probability of generating a special gaming state advantageous to the player stored in the main control RAM 600c (see FIG. 6). (The set value of "05H") is acquired, and it is confirmed whether or not it is equal to or less than the set maximum value (for example, "05H" corresponding to "6") (step S20). If it is equal to or less than the set maximum value (step S20: YES), it is confirmed whether or not the backup flag is set to ON (step S21).

<Main control: Main processing: Explanation of RAM error processing>
If it is not less than or equal to the set maximum value (step S20: NO), or if the backup flag is not set to ON (step S21: NO), the main control CPU 600a indicates that the sub control board 80 has a RAM error. An error command (effect control command DI_CMD) is transmitted (step S22).

Next, the main control CPU 600a outputs an error display to the LED data port (step S23).

Next, the main control CPU 600a performs a power supply abnormality check process (step S24), returns to the process of step S23, and repeats the process. The power supply abnormality check process is the same as the power supply abnormality check process shown in FIG. 38.

<Main control: Explanation of main processing>
On the other hand, if the backup flag is set to ON (step S21: YES), the signal of the RAM clear switch 620 is confirmed (step S25).

<Main control: Main processing: Explanation of RAM clear processing>
When the signal of the RAM clear switch 620 is ON (step S25: YES) or the setting switching process (step S19) shown in FIG. 35 is performed, the main control CPU 600a is the measurement RAM area of the main control RAM 600c and the measurement stack. The area is not cleared, but the normal RAM area and the normal stack area of the main control RAM 600c are cleared (step S26). At this time, the relief count counter described later is cleared (0000H is set).

Next, the main control CPU 600a sets the RAM clear notification timer to 30 seconds (30s) (step S27), and uses a hall computer (not shown) for managing the game islands of the game field via an external terminal (not shown). The timer for outputting the security signal output to is set to 30 seconds (30s) (step S28).

Next, the main control CPU 600a sets initial values in a part of the main control RAM 600c (step S29), and proceeds to the process of step S41. When setting this initial value, the initial value is set in the relief count counter described later.

<Main control: Explanation of main processing>
On the other hand, if the signal of the RAM clear switch 620 is OFF (step S25: NO), the main control CPU 600a has the upper opening / closing door 7, the door opening signal indicating whether or not the lower opening door 8 is open, and the setting key. The signal of the switch 630 is acquired (step S30), and it is confirmed whether or not all the signals are turned on (step S31). If all are not turned on (step S31: NO), the process proceeds to step S40.

<Main control: Main processing: Explanation of setting confirmation processing>
On the other hand, if all are ON (step S31: YES), the main control CPU 600a transmits a set value command (effect control command DI_CMD) reflecting the set value to the sub control board 80 (step S32).

Next, the main control CPU 600a sets a timer for outputting a security signal output to a hall computer (not shown) used for managing the game islands of the game field to 30 seconds (30s) via an external terminal (not shown). (Step S33).

Next, the main control CPU 600a sets the security signal output to the hall computer (not shown) used for managing the game islands of the game field to ON via an external terminal (not shown), and sets the security signal to ON via an external terminal (not shown). Then, a security signal is output to the hall computer (not shown) for 30 seconds (30 s) set by the timer (step S34).

Next, the main control CPU 600a outputs the set value to the LED data port (step S35).

Next, the main control CPU 600a sets a predetermined value in the register in the main control CPU 600a so that a wait of 4 ms is applied, and performs a process of counting down (step S36).

Next, the main control CPU 600a performs a power supply abnormality check process (step S37). The power supply abnormality check process is the same as the power supply abnormality check process shown in FIG. 38.

Next, the main control CPU 600a creates switch edge data of the setting key switch 630 signal from the level data of the setting key switch 630 of the previous time and the present time (step S38). The main control CPU 600a stores the created edge data in the main control RAM 600c.

Next, the main control CPU 600a confirms the edge data stored in the main control RAM 600c (step S39), and if the setting key switch 630 is ON (step S39: NO), returns to the process of step S34.

<Main control: Explanation of main processing>
On the other hand, if the setting key switch 630 is OFF (step S39: YES), initial values such as a backup flag and an error detection timer are set in a part of the main control RAM 600c (step S40).

Next, the main control CPU 600a transmits a command (effect control command DI_CMD) indicating whether the power is restored by clearing the RAM or the backup by clearing the RAM to the sub control board 80 (step S41). When transmitting a command (effect control command DI_CMD) indicating whether the power is restored by backup to the sub control board 80, the relief count command based on the value of the relief count counter described later is set as the effect control command DI_CMD and the sub control board. It will be transmitted to 80.

Next, the main control CPU 600a performs a game state notification information update process for updating the game state notification information (step S42).

Next, the main control CPU 600a sets the internal function register (step S43). Specifically, the launch control signal is set to ON and transmitted to the payout control board 70. As a result, the payout control board 70 controls to start the operation of the launch control board 71. Further, the CTC 644 (see FIG. 15), which is provided inside the main control CPU 600a and has a function of creating a pulse output having a constant cycle, a function of measuring time, and the like is set. That is, the main control CPU 600a sets the time constant register of the CTC 644 so that a timer interrupt is periodically applied every 4 ms.

Thus, the above processing is the initial processing in the main control main processing.

Next, the main control CPU 600a calculates the performance such as the total number of game balls fired in the game area 40 including the number of prize balls and the number of non-winning balls in a state where the interruption to itself is set to the disabled state (step S44). The process of the prize ball winning number management process 1 is performed (step S45). Then, the main control CPU 600a returns to the interrupt enabled state (step S47) after updating various random number counters (step S46), returns to step S44, and repeats the processes of steps S44 to S47. Perform processing. Note that this loop processing and the interrupt processing described later are steady processing.

However, according to the present embodiment, when the power is turned on again after the power is cut off for some reason during the setting change, if the setting switching process (step S19) shown in FIG. 35 is not performed, steps S22 to step S As shown in the process of S24, the RAM is abnormal, and only when the setting switching process (step S19) shown in FIG. 35 is performed, the game state is shifted to the normal gaming state. Further, as shown in step S57 shown in FIG. 37, a security signal is output from the external terminal during the setting change without monitoring the time during the setting change, and is shown in FIG. 36 after the setting change. As shown in step S33 and step S34, a security signal is output from the external terminal for a predetermined time by time monitoring. Note that the reason why the time is not monitored while the setting is being changed is that the time required for the setting change operation is undefined by the operator, so if the time is monitored, the output of the security signal may stop even during the operation. This is because the processing load increases when the processing of extending the monitoring time is added during the operation.

Thus, in the past, when an abnormality occurs in the RAM value due to a power failure, there is a possibility that the setting value or the like may be affected by the game and the setting may be restarted from the changed state. However, if the processing as in the present embodiment is performed, the possibility that the game is restarted can be reduced while the possibility of affecting the game remains.

Further, in the process of the present embodiment, if the setting switching process (step S19) shown in FIG. 35 is not performed when the power is turned on again after the power is cut off for some reason during the setting change, steps S22 to step S In the power supply abnormality check process, the main control CPU 600a clears the output data of the output port, but does not set the backup flag to ON so that the RAM error occurs as shown in the process of S24. The main control CPU 600a clears the output data of the output port (for example, LED data port or LED common port) used when changing the setting when clearing the output data of the output port, and is also used when changing the setting. The output data of the output port that does not exist is also cleared.

In this embodiment, the setting value of the probability of generating a special gaming state advantageous to the player (for example, the setting value of "00H" to "05H" corresponding to "1" to "6") is set in 6 steps. An example that can be changed is shown, but even if the setting value (for example, the setting value of "00H" corresponding to "1") has only one step, it has the setting change function as described above for the common use of members and programs. You may be doing it. At this time, in the setting switching process shown in FIG. 37, even if the set value stored in the W register is incremented by 1 in step S66, the maximum set value becomes “00H” corresponding to “1”, and the figure is always shown. In step S56 shown in 37, the process that the value of the W register becomes "00H" is performed. As a result, the setting change process can be executed by the same program as the program when there are a plurality of setting values. By doing so, even if the main control CPU 600a overwrites the set value stored in the main control RAM 600c (see FIG. 6) in step S67 shown in FIG. 37, the value becomes constant and fluctuates. There is nothing to do. This makes it possible to standardize members and programs.

<Main control: Explanation of timer interrupt processing>
Next, with reference to FIG. 39, a timer interrupt program that interrupts the above-mentioned main processing and is started every 4 ms will be described.

When this timer interrupt occurs, a save process for saving the contents of the register group in the main control CPU 600a to the stack area of the main control RAM 600c is executed (step S100), and then a voltage abnormality check process is executed (step S101). This voltage abnormality check process is the same process as the power supply abnormality check process shown in FIG. 38.

Next, the main control CPU 600a includes a special symbol 1 start port switch 44a (see FIG. 6), a special symbol 2 start port switch 45a (see FIG. 6), a normal symbol start port switch 47a (see FIG. 6), and a general upper right corner. Winning opening switch 48a1 (see Fig. 6), upper left general winning opening switch 48b1 (see Fig. 6), left middle general winning opening switch 48c1 (see Fig. 6), lower left general winning opening switch 48d1 (see Fig. 6), and out opening. ON / OFF signals of various switches including the switch 49a (see FIG. 6) and the large winning opening switch 46c (see FIG. 6) are input, and the ON / OFF signal level and its rise are input to the work area in the main control RAM 600c. The state is stored (step S102). At this time, the main control CPU 600a transmits information as to whether or not the player has touched the handle 16 to play the game as the effect control command DI_CMD to the sub control board 80. As a result, as shown in FIG. 24A, even when the movable accessory device 43 is moved to the front surface of the liquid crystal display device 41 during the customer waiting demonstration, the sub-control board 80 is used by the player. By receiving the information as to whether or not the player touches the handle 16 to play a game, the sub-control board 80 is shown in FIG. 24 (b) even if the game ball does not win a prize in the special symbol 1 starting port 44 (see FIG. 5). As shown, the movable accessory device 43 is controlled to return to the origin position (original position), and the liquid crystal display device 41 displays a normal screen (a normal screen display in which the customer waiting demonstration is stopped and a special symbol is variablely displayed). It is possible to control so that the image P60A shown in FIG. 24B) is displayed. When the information on whether or not the player touches the handle 16 to play the game is transmitted to the sub control board 80 as the effect control command DI_CMD, the one-chip microcomputer 600 uses the asynchronous serial communication circuit shown in FIG. CH1) 647 will be used for serial transmission to the sub-control board 80. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17B). At this time, if the big winning opening switch 46c (see FIG. 6) is ON, the counter for counting the winning balls by the big hit is updated.

Next, the main control CPU 600a performs a timer subtraction process of various timers (ordinary symbol variation timer, ordinary symbol accessory timer, etc.) that manage the time of each game operation (step S103).

Next, the main control CPU 600a performs a random number management process (step S104). Specifically, it performs a process of updating random numbers such as ordinary symbols and special symbols used in the winning / failing lottery.

Next, the main control CPU 600a performs an error management process (step S105). In the error management process, the supply of the game ball is stopped, or the game ball is clogged, the special symbol 1 start port switch 44a (see FIG. 6), the special symbol 2 start port switch 45a (see FIG. 6), and the like. Normal symbol start port switch 47a (see FIG. 6), upper right general winning opening switch 48a1 (see FIG. 6), upper left general winning opening switch 48b1 (see FIG. 6), left middle general winning opening switch 48c1 (see FIG. 6), lower left It determines whether there is any abnormality inside the device such as disconnection of the general winning opening switch 48d1 (see FIG. 6), the out opening switch 49a (see FIG. 6), and the large winning opening switch 46c (see FIG. 6). be. When an error occurs, a command (effect control command DI_CMD) corresponding to the error is transmitted to the sub control board 80. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. 15 to transmit serially to the sub-control board 80. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17B).

Next, the main control CPU 600a executes the prize ball management process (step S106). This prize ball management process outputs a payout control command PAY_CMD for causing the payout / launch control board 70 (see FIG. 6) to perform a payout operation. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. 15 to transmit serially to the payout / emission control board 70. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17B). In addition, a command (effect control command DI_CMD) corresponding to the value of the counter that counts the winning balls due to the big hit is transmitted to the sub control board 80. As a result, the sub-control CPU 800a transmits to the VDP 803 a command list related to the image (video) such that the information corresponding to the value of the received counter is displayed on the liquid crystal display device 41. As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41, thereby causing the liquid crystal display device 41 to display the image (video) data. Will display an image as shown in FIGS. 27 to 31.

Next, the main control CPU 600a executes normal symbol processing (step S107). In this ordinary symbol processing, the winning / failing lottery of the ordinary symbol is executed, and the fluctuation pattern of the ordinary symbol and the stop display state of the ordinary symbol are determined based on the lottery result. The details of this process will be described later.

Next, the main control CPU 600a executes a normal electric accessory management process (step S108). In this ordinary electric accessory management process, a signal related to the control of the ordinary electric accessory solenoid 45c (see FIG. 6) required for generating the ordinary electric accessory opening game is generated based on the lottery result of the ordinary symbol processing (step S107). It is a thing.

Next, the main control CPU 600a executes the special symbol processing (step S109). In this special symbol processing, the winning / failing lottery of the special symbol is executed, and the variation pattern of the special symbol and the stop display mode of the special symbol are determined based on the result of the lottery. The details of this process will be described later.

Next, the main control CPU 600a executes the special electric accessory management process (step S110). In this special electric accessory management process, mainly, when the big hit lottery result is "big hit" or "small hit", the setting process necessary for executing and controlling the winning game corresponding to the hit is performed. be. At this time, a signal relating to the control of the special electric accessory solenoid 46b (see FIG. 6) is also generated. If the big hit lottery result is "big hit" or "small hit", a command related to it (effect control command DI_CMD) is transmitted to the sub control board 80. Further, the main control CPU 600a sets an initial value in the relief number counter described later when the jackpot processing starts or the jackpot processing ends in the process of step S110. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. 15 to transmit serially to the sub-control board 80. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17B).

Next, the main control CPU 600a performs a right-handed notification information management process (step S111). In this right-handed notification information management process, right-handed situations are advantageous, such as when the opening / closing member 45b is opened a predetermined number of times for a predetermined time, or when the opening / closing door 46a is opened and the large winning opening (not shown) is opened. In, the process for displaying the "launch position guidance effect (right-handed notification effect)" that gives the right-handed instruction notification is performed. When the right-handed notification effect is performed, a command related to the right-handed notification effect (effect control command DI_CMD) is transmitted to the sub-control board 80 in this right-handed notification information management process. Further, in the right-handed notification information management process, in the normal game state (state without low probability electric support), when the player hits right, a command related to left-handed warning notification (effect control command DI_CMD) is sent to the sub-control board 80. Will be sent. As a result, a warning notification such as displaying an image prompting the player to "hit left" on the liquid crystal display device 41 is executed. However, as shown in FIG. 9B, when the special symbol deviation variation is executed a predetermined number of times (for example, 1000 times) and the game shifts to the second time-saving game state (state with low probability electric support), the second When the player hits right due to the fluctuation of the special symbol before shifting to the time-saving game state (state with low probability electric support), the command (directing control command DI_CMD) related to the left-handed warning notification is transmitted to the sub control board 80. Either not, or a command related to the left-handed warning notification (effect control command DI_CMD) is transmitted to the sub-control board 80, and the sub-control CPU 800a controls so that the left-handed warning notification is not performed. As a result, it is possible to prevent a situation in which the interest of the player who knows the number of times until the transition to the second time-saving gaming state (state with low probability electric support) shown in FIG. 9B is reduced. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. 15 to transmit serially to the sub-control board 80. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17B).

Next, the main control CPU 600a executes the LED management process (step S112).

Next, the main control CPU 600a executes the external terminal management process (step S113). In this external terminal management process, the hall computer (not shown) used for managing the game islands of the amusement park is provided with the number of hits, the number of occurrences of hits, the number of changes in special symbols, and the information on detecting winning balls in the winning opening. Predetermined game information such as time-saving game state information and security information is output from an external terminal (not shown). At this time, in the second time-saving game state (state with low probability electric support) shown in FIG. 9B, the information during the time-saving game state is output from the external terminal (not shown) together with the state transition information. Alternatively, after the state transition information is output from the external terminal (not shown), the time-saving gaming state information is output from the external terminal (not shown). Then, in the first time-saving game state (state with low probability electric support) shown in FIG. 9 (b) and the first time-saving game state (state with low probability electric support) shown in FIG. 9 (c), the jackpot information is combined. The time-saving game state information is output from the external terminal (not shown), or the jackpot information is output from the external terminal (not shown), and then the time-saving game state information is output from the external terminal (not shown). .. By doing so, the second time-saving game state (with low-probability electric support) shown in FIG. 9 (b) and the second time-saving game state (with low-probability power support) shown in FIG. 9 (c). Then, since it does not go through the hit, it is possible to distinguish between the one that went through the hit and the one that did not go through the hit. Therefore, by performing the above processing, the hall side appropriately processes the information. It becomes possible. The state transition information is output based on the fact that the rescue activation flag, which will be described later, is set to ON.

Next, the main control CPU 600a performs a solenoid management process (step S114). At this time, the main control CPU 600a confirms the signal related to the control of the ordinary electric accessory solenoid 45c (see FIG. 6) generated in the ordinary electric accessory management process (step S108), and also confirms the special electric accessory management process (step S108). Check the signal related to the control of the special electric accessory solenoid 46b (see FIG. 6) generated in step S110). Then, based on this signal, the operation / stop of the normal electric accessory solenoid 45c or the special electric accessory solenoid 46b is controlled, and the opening / closing member 45b (see FIG. 5) is opened or closed, or a large winning opening (not shown). The opening / closing door 46a (see FIG. 5) operates so as to open or close.

Next, the main control CPU 600a performs out-of-use processing (step S115). In this process, the performance display value calculated in the prize ball winning number management process 1 in step S45 shown in FIG. 36 is displayed on the measurement / setting display device 610 (see FIG. 6). Further, in the certification test (test firing test) of the gaming machine, a process of updating the test firing test signal used when outputting various signals related to the game to the testing machine is performed.

Next, the main control CPU 600a clears WDT643 shown in FIG. 15 (step S116), returns to the interrupt enable state (step S117), restores the contents of the registers saved in the stack area of the main control RAM 600c, and interrupts the timer. Is finished (step S118). As a result, the interrupt processing routine returns to the main processing (see FIG. 35).

Thus, as shown in FIG. 23, the first time after the voltage abnormality signal ALARM reaches the "L" level 20 to 30 ms after the power is cut off (see timing T20:00). Since the voltage (DC12V, DC5V) capable of executing the control of the game operation shown in FIG. 23 is supplied to the one-chip microcomputer 600 when the timer interrupt of FIG. Processing will be performed. Then, as shown in FIG. 23, the voltage (DC12V, DC5V) capable of executing the control of the game operation is not supplied 20 ms or more after the timing T21 (see the timing T2 2 o'clock), so that the second timer interrupt is performed. Will occur. At this time, when the voltage abnormality check process of step S101 shown in FIG. 39 is executed, the value of the power supply abnormality confirmation counter becomes 2 or more, so the processes of steps S86 to S91 shown in FIG. 38 are executed, and an infinite loop process is executed. The process of waiting for the voltage to drop is performed repeatedly. Therefore, in the first timer interrupt, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17B), but in the second timer interrupt, the main control CPU 600a is the transmission buffer. The data to be transmitted is not stored in the register TXBUF (see FIG. 17B).

Therefore, after the power is cut off, the data to be transmitted is not stored (set) in the transmission buffer register TXBUF (see FIG. 17B) except for the first timer interrupt. Therefore, the transmission time for serial communication is larger than the time from when the voltage abnormality signal ALARM becomes "L" to when the voltage becomes such that the control of the game operation cannot be executed (see timing T21 to timing T22 shown in FIG. 23). If the baud rate of the transmission baud rate setting register TPR shown in FIG. 17 (a) is set so that the time becomes short, the data stored (set) in the transmission buffer register TXBUF (see FIG. 17 (b)) can be stored (set). The serial communication is completed by the time until the voltage becomes such that the control of the game operation cannot be executed (see timing T21 to timing T22 shown in FIG. 23). As a result, even if a power failure occurs in a situation where the prize ball information to be paid out remains on the main control side, the payout operation is normally performed.

Further, the main control CPU 600a stores (sets) in the transmission buffer register TXBUF (see FIG. 17B) at the first timer interrupt after the power is cut off, to the effect that the backup process is started due to the power cutoff. Therefore, it is possible to transmit to the payout / launch control board 70 and the sub control board 80 that the power supply of the main control board 60 is cut off and the backup process is started. This makes it possible for these control boards to perform processing in preparation for power cutoff.

On the other hand, when the boat rate setting is set high in order to increase the amount of data to be transmitted, for example, 12.5 bits can be transmitted in 1 ms, so that the transmission buffer register TXBUF (Fig. In the data stored (set) in 17 (b)), the second timer interrupt occurs after the serial transmission is started, and the value of the power supply abnormality confirmation counter is 2 or more (step S85: shown in FIG. 38: By the time YES), serial communication will be completed. Even in this way, even if a power failure occurs in a situation where the prize ball information to be paid out remains on the main control side, the payout operation is normally performed.

On the other hand, as described in the timer interrupt process shown in FIG. 39, in one timer interrupt process, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. 15 for serial transmission. Then, when the payout control command PAY_CMD is transmitted to the payout / launch control board 70, only one payout control command PAY_CMD is stored (set) in the transmission buffer register TXBUF (see FIG. 17B). On the other hand, in one timer interrupt process, the one-chip computer 600 transmits the effect control command DI_CMD to the sub-control board 80 by serial transmission using the asynchronous serial communication circuit (CH1) 647 shown in FIG. In doing so, a plurality of effect control commands DI_CMD are stored (set) in the transmission buffer register TXBUF (see FIG. 17B).

Therefore, if only one payout control command PAY_CMD is stored (set) in the transmission buffer register TXBUF (see FIG. 17B) in one timer interrupt process in this way, it is performed once. One payout control command PAY_CMD can be transmitted by the timer interrupt of, so that untransmitted commands are not continuously stored (set) in the transmission buffer register TXBUF (see FIG. 17B). .. Therefore, even if the one-chip microcomputer 600 is reset due to the power being cut off, the untransmitted payout control command PAY_CMD is not stored (set) in the transmission buffer register TXBUF (see FIG. 17B). Therefore, it is possible to prevent a situation in which the player is disadvantaged by clearing the untransmitted payout control command PAY_CMD.

<Main control: Explanation of normal symbol processing>
Next, with reference to FIG. 40, the above-mentioned ordinary symbol processing will be described in detail.

As shown in FIG. 40, in the normal symbol processing, first, it is confirmed whether or not the passage of the game ball is detected at the normal symbol start port 47 (see FIG. 5) composed of the gate, that is, the normal symbol start port 47 of the normal symbol start port 47. Check the signal level of the normal symbol start port switch 47a (see FIG. 6) (step S150). When the passage of the game ball is detected (step S150: YES), the main control CPU 600a stores the number of start-holding balls of the normal symbol in order to determine whether or not the number of start-holding balls of the normal symbol is, for example, 4 or more. The main control RAM 600c is confirmed (step S151). At that time, if the number of start-holding balls of the normal symbol is less than 4 (step S151: ≠ MAX), the number of start-holding balls of the normal symbol is added by 1 (step S152). After that, the main control CPU 600a stores the random value for determining the hit of the normal symbol used for the winning / failing lottery of the normal symbol in the main control RAM 600c in which the number of start-holding balls of the normal symbol is stored (step S153), and then steps S154. Proceed to the process of.

On the other hand, when the passage of the game ball is not detected in step S150 (step S150: NO), when it is determined in step S151 that the number of start-holding balls of the normal symbol is 4 or more (step S151: = In MAX), the processing of steps S152 to S153 is not performed, and the process proceeds to step S154.

When the main control CPU 600a proceeds to the process of step S154, it confirms whether the normal symbol per operation flag is set to ON, that is, whether 5AH is set to the normal symbol per operation flag (step S154). If 5AH is set in the normal symbol per operation flag (step S154: ON), it is determined that the normal symbol is hit, and after updating the display data of the normal symbol (step S163), the normal symbol processing is performed. To finish.

On the other hand, if 5AH is not set in the normal symbol per operation flag (step S154: OFF), the processing state indicating the behavior of the normal symbol, that is, the value of the normal symbol operation status flag is confirmed (step S155). Then, if the normal symbol operation status flag is 00H, the main control CPU 600a determines that the state is before the start of the fluctuation of the normal symbol, proceeds to step S156, and determines whether or not the number of reserved balls for starting the normal symbol is 0. Confirm (step S156).

When the main control CPU 600a confirms the main control RAM 600c in which the number of start-holding balls of the normal symbol is stored and determines that it is 0 (step S156: = 0), the main control CPU 600a updates the display data of the normal symbol. After that (step S163), the normal symbol processing is completed. On the other hand, when it is determined that it is not 0 (step S156: ≠ 0), the number of start-holding balls of the normal symbol is subtracted by 1 (step S157).

After that, the main control CPU 600a uses the normal symbol hit determination table NPP_TBL shown in FIG. 51 (a) to perform a hit determination of a random number value corresponding to the number of start-holding balls of the normal symbol stored in the main control RAM 600c. That is, if the normal symbol probability change flag indicating the game state is OFF, the main control CPU 600a has a lower limit value (in the figure, the normal symbol hit detection table NPP_TBL (normal state)) in which the random number value is shown in FIG. 51 (a). 249) or more determines whether or not it is below the upper limit value (250 in the figure), and if it is above the lower limit value and below the upper limit value, set 5AH to the normal symbol collision detection flag and turn it ON. In other cases, the normal symbol collision detection flag is turned off.

On the other hand, if the normal symbol probability change flag indicating the game state is ON, the random value is the upper limit at the lower limit value (4 in the figure) or more of the normal symbol collision detection table NPP_TBL (probability change state) shown in FIG. 51 (a). It is determined whether or not it is a value (250 in the figure) or less, and if it is equal to or more than the lower limit value and less than or equal to the upper limit value, 5AH is set in the normal symbol collision detection flag and turned ON. In other cases, the process of setting the normal symbol collision detection flag to OFF is performed (step S158).

Then, the main control CPU 600a determines the stop symbol (normal symbol stop symbol) based on the lottery result determined in the random number lottery process (step S159).

Next, the main control CPU 600a confirms whether the normal symbol time reduction flag that shortens the fluctuation time of the normal symbol is set to ON, and if it is set to ON, sets the fluctuation time corresponding to the normal symbol fluctuation timer. If it is set to OFF, the process of setting the normal fluctuation time in the normal symbol fluctuation timer is performed (step S160).

In this embodiment, an example is described in which the winning probability of the normal symbol is a probabilistic state in which the winning probability is high in the electric support state, but it is executed in the "relief" game or the "special electric support symbol" game. In the second time-shortening game state to be performed, since the game shifts to the second time-shortening game state without going through the jackpot, it may be prohibited by the rules to set the winning probability of the normal symbol to the high probability state. In that case, the winning probability of the normal symbol remains the same as that of the normal gaming state, and the normal symbol time-saving gaming state is set to shorten the fluctuation time of the normal symbol. As a result, even if the normal symbol is not in the high probability state, the fluctuation time of the normal symbol is shortened, the lottery frequency of the normal symbol is increased, and the normal symbol is easily won. Further, when shifting to the first time-shortened gaming state, the winning probability of the normal symbol may be set to a high probability state, and when shifting to the second time-shortened gaming state, the winning probability of the normal symbol may not be changed from the normal gaming state. .. On the other hand, in both the case of shifting to the first time-shortened gaming state and the case of shifting to the second time-shortened gaming state, the winning probability of the normal symbol may not be changed from the normal gaming state.

Next, the main control CPU 600a shifts the storage area of the main control RAM 600c in which the random number value used for the winning / failing lottery of the normal symbol corresponding to the number of start-holding balls of the normal symbol is stored (step S161). That is, assuming that the maximum number of start-holding balls of the normal symbol can be held by 4, the random number value used for the winning / failing lottery of the normal symbol corresponding to the start-holding number of 4 of the normal symbol is set to 3 of the start-holding balls of the normal symbol. The random value used for the winning / failing lottery of the corresponding ordinary symbol is shifted to the main control RAM 600c in which the random number value used for the winning / failing lottery of the ordinary symbol corresponding to the number of reserved balls 3 for starting the ordinary symbol is started. Shift to the main control RAM 600c where the random number value used for the winning / failing lottery of the normal symbol corresponding to the number of reserved balls 2 is stored, and start the normal symbol. Is shifted to the main control RAM 600c in which the random number value used for the winning / failing lottery of the normal symbol corresponding to the starting reserved ball number 1 of the normal symbol is stored.

After this processing, the main control CPU 600a sets 01H to the normal symbol operation status flag used in step S155, and the random number value used for the winning / failing lottery of the normal symbol corresponding to the start pending ball number 4 of the normal symbol is set. A process of setting 00H to the stored main control RAM 600c is performed (step S162).

Then, after finishing the processing of the above step S162, the main control CPU 600a updates the display data of the normal symbol (step S163), and finishes the normal symbol processing.

On the other hand, in step S155, if the processing state indicating the behavior of the normal symbol, that is, the value of the normal symbol operation status flag is 01H, the main control CPU 600a determines that the normal symbol is changing. The determination is made, the process proceeds to step S164, and it is confirmed whether or not the normal symbol fluctuation timer is 0 (step S164). If the normal symbol fluctuation timer is not 0 (step S164: ≠ 0), the display data of the normal symbol is updated (step S163), and the normal symbol processing is completed. If the normal symbol fluctuation timer is 0 (step S164: = 0), the main control CPU 600a sets 02H to the normal symbol operation status flag used in step S155, and determines the result of the normal symbol winning / failing lottery. In order to maintain the time, for example, a time of about 600 ms is set in the normal symbol variation timer (step S165).

After finishing the process of step S165, the main control CPU 600a updates the display data of the normal symbol (step S163), and finishes the normal symbol process.

On the other hand, if the main control CPU 600a is in the processing state indicating the behavior of the normal symbol in step S155, that is, if the value of the normal symbol operation status flag is 02H, the main control CPU 600a has the normal symbol during the confirmation time (normal). It is determined that the symbol variation has ended and is stopped), the process proceeds to step S166, and it is confirmed whether or not the normal symbol variation timer is 0 (step S166). If the normal symbol fluctuation timer is not 0 (step S166: ≠ 0), the display data of the normal symbol is updated (step S163), and the normal symbol processing is completed. Then, if the normal symbol fluctuation timer is 0 (step S166: = 0), the main control CPU 600a sets 00H to the normal symbol operation status flag used in step S155 (step S167), and determines the normal symbol hit. It is confirmed whether the flag is set to ON (5AH is set) (step S168).

As a result, if the normal symbol collision detection flag is set to OFF (5AH is not set) (step S168: OFF), the main control CPU 600a updates the display data of the normal symbol (step S163). Normal design processing is completed. Then, if the normal symbol hit determination flag is set to ON (5AH is set) (step S168: ON), the main control CPU 600a turns on the normal symbol hit operation flag used in step S154 (5AH is set). After setting to (step S169), the normal symbol processing is finished.

<Main control: Explanation of special symbol processing>
Next, the special symbol processing will be described in detail with reference to FIGS. 41 to 50.

As shown in FIG. 41, in the special symbol processing, first, the winning ball (winning ball) of the game ball is inserted in the special symbol 1 starting port switch 44a (see FIG. 6) of the special symbol 1 starting port 44 (see FIG. 5). It is confirmed whether or not it has been detected (step S200), and further, the game ball is entered (winning ball) at the special symbol 2 starting port switch 45a (see FIG. 6) of the special symbol 2 starting port 45 (see FIG. 5). It is confirmed whether or not it has been detected (step S201).

<Main control: Special symbol processing: Explanation of starting port check processing>
Explaining this process in detail with reference to FIG. 42, the main control CPU 600a confirms whether or not the game ball has entered (winned) in the special symbol 1 starting port 44 or the special symbol 2 starting port 45, that is, special. The level of the special symbol 1 starting port switch 44a of the symbol 1 starting port 44 or the special symbol 2 starting port switch 45a of the special symbol 2 starting port 45 is confirmed (step S250). As a result, if the entry (winning) of the game ball is not detected (step S250: NO), the special symbol processing is completed.

On the other hand, if the winning (winning) of the game ball is detected (step S250: YES), the main control CPU 600a has a predetermined number of start-holding balls that trigger the change of the special symbol, and whether or not the main control RAM 600c stores the ball. (Step S251). If the number of reserved balls for starting is less than 4 (step S251: ≠ MAX), the number of reserved balls for starting is incremented by 1 (+1) (step S252).

Next, the main control CPU 600a stores the random number value used when the special symbol is stopped, the random value for the fluctuation pattern, and the random value for the jackpot determination in the main control RAM 600c in which the number of start-holding balls that triggers the fluctuation of the special symbol is stored. (Step 253).

Next, the main control CPU 600a confirms the current gaming state (whether or not the special symbol jackpot determination flag is set to ON, etc.), and determines whether or not it is in the look-ahead prohibition state (step S254). If the read-ahead prohibition state is not set (step S254: NO), the main control CPU 600a acquires a random number value for jackpot determination used for the winning / failing lottery of the special symbol stored in the main control RAM 600c in step S253 (step S255). ), Further, a random number determination table at the time of winning a start opening (not shown) is acquired (step S256).

Next, the main control CPU 600a performs a jackpot lottery using the jackpot determination random number value acquired in step S255 and the start opening winning random number determination table (not shown) acquired in step S256, and further, the above In step S253, the type of jackpot (per rank-up bonus, normal jackpot, etc.) is determined using the random number value for the special symbol stored in the main control RAM 600c, and the variation pattern is determined using the random number value for the variation pattern. Then, a special symbol start opening winning command corresponding to the winning command is generated (step S257). At this time, not only the big hit lottery but also the small hit lottery and the special electric support symbol lottery are performed, and the random value for the special symbol described above is used, or a random value different from the random value for the special symbol is used. It may be used to determine the type of small hit and the type of special electric support symbol, determine the fluctuation pattern using the random value for the fluctuation pattern, and generate the special symbol start opening winning command accordingly.

Next, the main control CPU 600a generates a start hold addition command for lower bytes corresponding to the generated special symbol start opening winning command (step S258).

On the other hand, the main control CPU 600a finishes the process of the step S258, or in the step S251, whether the number of start-holding balls of the special symbol 1 or 2 is 4 or more (step S251: = MAX), or pre-reading. If it is in the prohibited state (step S254: YES), the start hold addition command of the upper byte corresponding to the increased number of start hold balls is generated (step S259).

Next, the main control CPU 600a combines the start hold addition command of the lower byte generated in step S258 and the start hold addition command of the upper byte generated in step S259, and then the start hold addition command (effect). As the control command DI_CMD), a process of transmitting to the sub-control board 80 is performed (step S260).

<Main control: Explanation of special symbol processing>
Thus, when the processes of steps S200 and S201 shown in FIG. 41 are completed, the main control CPU 600a is set to ON for the special symbol small hit operation flag, that is, 5 AH is set for the special symbol small hit operation flag. It is confirmed whether or not (step S202). If 5AH is set in the special symbol small hit operation flag (step S202: ON), it is determined that the special symbol is in the small hit, and after updating the display data of the special symbol (step S208), the special symbol is special. Finish the design processing.

On the other hand, if 5AH is not set in the special symbol small hit operation flag (step S202: OFF), is the special symbol big hit operation flag set to ON, that is, is 5AH set in the special symbol big hit operation flag? Is confirmed (step S203). If 5AH is set in the special symbol jackpot operation flag (step S203: ON), it is determined that the special symbol is in the jackpot, and after updating the display data of the special symbol (step S208), the special symbol processing is performed. To finish.

On the other hand, if 5AH is not set in the special symbol jackpot operation flag (step S203: OFF), the processing state indicating the behavior of the special symbol, that is, the value of the special symbol operation status flag is confirmed (step S204). More specifically, if the value of the special symbol operation status flag is 00H or 01H, the main control CPU 600a is waiting for the special symbol change (in the standby state for the next change because the special symbol is not changed). (Indicates that there is), and the special symbol change start processing is performed (step S205).

<Main control: Special symbol processing: Explanation of special symbol change start processing>
Explaining this process in detail with reference to FIG. 43, the main control CPU 600a confirms whether or not the number of start-holding balls that triggers the fluctuation of the special symbol is 0 (step S300). That is, when the main control CPU 600a confirms whether or not it is stored in the main control RAM 600c and determines that the number of start-holding balls is 0 (step S300: = 0), the value of the special symbol operation status flag is 00H. It is confirmed whether or not (step S301). If the value of the special symbol operation status flag is 00H (step S301: YES), the special symbol change start process is terminated.

On the other hand, if the value of the special symbol operation status flag is not 00H (step S301: NO), the main control CPU 600a transmits the customer waiting demo command as the effect control command DI_CMD to the sub control board 80 (see FIG. 6) (step). S302).

Next, the main control CPU 600a sets the special symbol operation status flag to 00H (step S303), and ends the special symbol change start processing.

On the other hand, when the main control CPU 600a determines that the number of start holding balls is not 0 (step S300: ≠ 0), the number of start hold balls is subtracted by 1 (-1) (step S304), and the start hold subtraction command is produced and controlled. The command DI_CMD is transmitted to the sub control board 80 (sub control CPU 800a) (step S305).

Next, the main control CPU 600a confirms the value of the relief count counter described later, and transmits the relief count command as the effect control command DI_CMD to the sub control board 80 (sub control CPU 800a) (step S306). As a result, the sub-control CPU 800a can grasp how many times the deviation variation of the special symbol shown in FIG. 9B is executed. Therefore, as shown in FIG. 9B, before the special symbol deviation variation is executed a predetermined number of times (for example, 1000 times) and the game shifts to the second time-saving game state (state with low probability electric support). When the power is cut off (power cut off), when the power is turned on again and the game is restored, the sub-control CPU 800a is displayed on the liquid crystal display device 41 according to the remaining number of times up to the predetermined number of times (for example, 1000 times). The background image (video) is different from the background image (video) at the time of returning to the game, or a part of the lighting of the decorative lamp is controlled to be different from the lighting of the decorative lamp at the time of returning to the game. be able to. Further, as shown in FIG. 9 (b), the power supply is executed before the special symbol is displaced a predetermined number of times (for example, 1000 times) to shift to the second time-saving game state (state with low probability electric support). When the power is turned on again and the game is restored, the sub-control CPU 800a will perform the above-mentioned predetermined number of times (for example, 1000 times) in the change of the special symbol in the first rotation after the game is restored. It is possible to control to execute the effect according to the remaining number of times.

<Main control: Special symbol processing: Explanation of relief count command transmission>
Explaining this process in detail with reference to FIG. 44, the main control CPU 600a acquires the value (2-byte data) of the relief count counter described later (step S350).

Next, the main control CPU 600a confirms the value of the acquired relief count counter (step S351). If the value is 0 (step S351: YES), the process of transmitting the relief count command is completed.

On the other hand, if the value is not 0 (step S351: NO), the main control CPU 600a divides the acquired value of the relief count counter by 100. Then, the main control CPU 600a stores the divided quotient in the L register inside the main control CPU 600a, and stores the remainder in the H register inside the main control CPU 600a (step S352).

Next, the main control CPU 600a adds (+1) the L register and adds (+1) the H register (step S353).

Next, the main control CPU 600a stores the DBH in the D register inside the main control CPU 600a, and stores the value of the L register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub control board 80 (sub control CPU 800a) as the relief count command 1 (effect control command DI_CMD) of the first command (step S354).

Next, the main control CPU 600a stores the DCH in the D register inside the main control CPU 600a, and stores the value of the H register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub control board 80 (sub control CPU 800a) as the second command rescue count command 2 (effect control command DI_CMD) (step S355), and the rescue count command is transmitted. Finish the process of.

Thus, by doing so, the sub-control CPU 800a subtracts 1 from the lower byte of the first command and subtracts 1 from the lower byte of the second command. Then, the value of the lower byte of the first command subtracted by 1 is multiplied by 100, and the value of the lower byte of the second command subtracted by 1 is added. As a result, the sub-control CPU 800a can grasp how many times the deviation variation of the special symbol shown in FIG. 9B is executed. When displaying a number on the liquid crystal display device 41 using the VDP803, the numerical value obtained by subtracting the lower byte of the first command by 1 is subtracted by 1 from the thousands and hundreds digits, and the lower byte of the second command is subtracted by 1. It will be displayed as a number in the tens and ones place.

However, by doing so, not only the command configuration can be made easy to understand, but also the control load can be reduced.

<Main control: Special symbol processing: Explanation of special symbol change start processing>
Thus, after completing the process of transmitting the relief count command as described above (step S306), the main control CPU 600a confirms the value of the special symbol time reduction counter described later, and uses the time reduction command as the effect control command DI_CMD to subordinate. It is transmitted to the control board 80 (sub-control CPU 800a) (step S307). In response to this, the sub-control CPU 800a does not display the current number of time reductions on the liquid crystal display device 41 or displays a fixed number of times such as 100 times on the liquid crystal display device 41 until the number of time reductions is equal to or less than a predetermined number. The command list related to the image (video) is transmitted to the VDP803. As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41, thereby causing the liquid crystal display device 41 to display the image (video) data. Does not display the current time reduction number, or a fixed number such as 100 times is displayed. Then, when the predetermined number of time reductions is reached, the sub-control CPU 800a transmits to the VDP 803 a command list related to an image (video) such that the received time reduction information is displayed on the liquid crystal display device 41. As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41, thereby causing the liquid crystal display device 41 to display the image (video) data. Will display the current number of time reductions.

<Main control: Special symbol processing: Explanation of time saving command transmission>
Explaining this process in detail with reference to FIG. 45, the main control CPU 600a acquires the value (2-byte data) of the special symbol time reduction counter described later (step S360).

Next, the main control CPU 600a confirms the value of the acquired special symbol time reduction counter (step S361). If the value is 0 (step S361: YES), the process of transmitting the time saving command is completed.

On the other hand, if the value is not 0 (step S361: NO), the main control CPU 600a confirms whether or not the value of the acquired special symbol time reduction counter exceeds 100 (step S362). If the value exceeds 100 (step S362: YES), the main control CPU 600a stores the DDH in the D register inside the main control CPU 600a and stores 7FH in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register as a time saving number command (effect control command DI_CMD) to the sub control board 80 (sub control CPU 800a) (step S363), and finishes the process of transmitting the time saving command. In response to this, the sub-control CPU 800a can confirm that the number of time reductions is not less than the predetermined number of times (100), and therefore does not display on the liquid crystal display device 41 or displays a fixed number of times such as 100 times on the liquid crystal display. A command list related to an image (video) to be displayed on the device 41 is transmitted to the VDP 803. As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41, thereby causing the liquid crystal display device 41 to display the image (video) data. Does not display the current time reduction number, or a fixed number such as 100 times is displayed.

On the other hand, if the value is 100 or less (step S362: NO), the main control CPU 600a stores the DDH in the D register inside the main control CPU 600a, and saves the special symbol time in the E register inside the main control CPU 600a. Stores the value of the lower byte of the count counter. Then, the main control CPU 600a transmits the value of the DE register as a time saving number command (effect control command DI_CMD) to the sub control board 80 (sub control CPU 800a) (step S364), and finishes the process of transmitting the time saving command.

<Main control: Special symbol processing: Explanation of special symbol change start processing>
Thus, after completing the process of transmitting the time-reduced number of times command (step S307) as described above, the main control CPU 600a uses the random value for the special symbol stop, the random value for the fluctuation pattern, and the random value for the jackpot determination (FIG. 42). The storage area in the main control RAM 600c in which (step S253) is stored is shifted (step S308), and the random value used for the winning / failing lottery of the special symbol corresponding to the start hold 4 is stored in the main control RAM 600c. 0 is set in the area of (step S309).

Next, the main control CPU 600a performs a hit determination process (step S310).

<Main control: Special symbol processing: Explanation of collision detection processing>
Explaining this process in detail with reference to FIG. 46, the main control CPU 600a acquires the jackpot determination random number value from the main control RAM 600c in which the jackpot determination random number value (see step S253 in FIG. 42) is stored (see step S253 in FIG. 42). Step S370).

Next, the main control CPU 600a acquires the address address of the hit determination table according to the fluctuating special figure. That is, the address addresses of the special symbol jackpot determination table SDH_TBL shown in FIG. 51 (b) and the special symbol small hit determination table SDP_TBL shown in FIG. 51 (c) are acquired (step S371).

Next, the main control CPU 600a changes the acquired address address to the address address in which the determination value is stored (step S372).

Next, the main control CPU 600a acquires information on whether the determination value is different for each set value (step S373), and confirms the value of the acquired information (step S374). If the acquired value is "0" (step S374: = 0), the process proceeds to step S377, and if the acquired value is not "0" (step S374: ≠ 0), the main control CPU 600a is the main control. A set value of the probability of generating a special gaming state advantageous to the player stored in the RAM 600c (see FIG. 6) (for example, a set value of "00H" to "05H" corresponding to "1" to "6"). (Step S375).

Next, the main control CPU 600a changes to the address address in which the determination value corresponding to the acquired set value is stored (step S376). For example, when acquiring the judgment value of the upper limit value of the normal state (low probability state) of the game state, if the acquired setting value is "1", the address where the judgment value "10164" of the setting value 1 is stored. If the address is changed to an address and the set value is "6", the address address that refers to the data in the determination table is changed to the address address in which the determination value "10200" of the set value 6 is stored.

Next, the main control CPU 600a acquires a determination value from the current address address. For example, if it is related to a big hit and the information on whether the judgment value is different for each set value is "000H", the judgment value of "10000" is acquired and the information on whether the judgment value is different for each set value is " If it is "001H" and the set value is "1", the determination value of "10164" is acquired (step S377).

Next, the main control CPU 600a changes the address address to the start address address in which the next determination value is stored (step S378), and compares the acquired jackpot determination random number value with the acquired determination value (step S379).

Next, if the acquired jackpot determination random value is not smaller than the acquired determination value (step S380: NO), the main control CPU 600a returns to the process of step S373, and the acquired jackpot determination random value is from the acquired determination value. The process of step S373 to step S380 is repeated until the value becomes smaller (step S380: YES).

Next, if the acquired jackpot determination random value becomes smaller than the acquired determination value (step S380: YES), the main control CPU 600a acquires the special symbol jackpot determination flag and the special symbol small hit determination flag according to the gaming state. (Step S381), the hit determination process is completed.

<Main control: Special symbol processing: Explanation of special symbol change start processing>
Thus, after completing the hit determination process (step S310) as described above, the main control CPU 600a performs the special electric support symbol hit determination process (step S311). It should be noted that this process is a process of performing a lottery using a random number for determining a big hit when playing a game of a special electric support symbol without using it also as a small hit symbol.

<Main control: Special symbol processing: Explanation of special electric support symbol collision detection processing>
Explaining this process in detail with reference to FIG. 47, the main control CPU 600a acquires the jackpot determination random number value from the main control RAM 600c in which the jackpot determination random number value (see step S253 in FIG. 42) is stored (see step S253 in FIG. 42). Step S390).

Next, the main control CPU 600a acquires the address address of the symbol determination table for the special electric support according to the fluctuating special figure. Here, the address address of the special electric support symbol determination table D_RNDJDG2 shown in FIG. 48 corresponding to the fluctuating special figure 1 is acquired. The special electric support symbol hit determination table data corresponding to the special electric support symbol hit determination table TDS_TBL shown in FIG. 51 (d) is shown in FIG. 48. The special electric support symbol hit determination table will be described with reference to FIG. 48. The special electric support symbol hit determination table stores the determination value and the value of the special electric support symbol hit determination flag.

Specifically, as can be easily understood by referring to the special electric support symbol hit determination table TDS_TBL shown in FIG. 51 (d), the lower limit of the determination value is "30001".
DW 30000
DB 000H
Is programmed.

Further, as can be easily understood by referring to the special electric support symbol hit determination table TDS_TBL shown in FIG. 51 (d), the upper limit of the determination value is "30218".
DW 30218
DB 05AH
Is programmed.

On the other hand, in this special electric support symbol hit determination table, as shown in FIG. 48, the upper limit value (65535) of the big hit determination random number value is programmed as follows.
DW 65535
DB 000H

Therefore, if the determination value for winning the special electric support symbol does not overlap with the range of the winning determination value for either the big hit or the small hit, it is used in the hit determination process in step S310 shown in FIG. 43. It will be possible to perform a lottery using the random numbers for the big hit determination.

Thus, the main control CPU 600a acquires the address address of the special electric support symbol hit determination table as described above (step S391).

Next, the main control CPU 600a changes the acquired address address to the address address in which the determination value shown in FIG. 48 is stored (step S392).

Next, the main control CPU 600a acquires the determination value shown in FIG. 48 from the current address address (step S393).

Next, the main control CPU 600a changes the address address to the start address address in which the next determination value is stored (step S394), and compares the acquired jackpot determination random number value with the acquired determination value (step S395).

Next, if the acquired jackpot determination random value is not smaller than the acquired determination value (step S396: NO), the main control CPU 600a returns to the process of step S393, and the acquired jackpot determination random value is from the acquired determination value. The process of step S393 to step S396 is repeated until the value becomes smaller (step S396: YES).

Next, if the acquired jackpot determination random value becomes smaller than the acquired determination value (step S396: YES), the main control CPU 600a acquires the special electric support symbol hit determination flag shown in FIG. 48 (step S397). The special electric support symbol hit detection process is completed.

<Main control: Special symbol processing: Explanation of special symbol change start processing>
Thus, after completing the special electric support symbol hit detection process (step S311) as described above, the main control CPU 600a determines the random number value used when the special symbol is stopped stored in the main control RAM 600c in step S253 of FIG. 42. It is used to generate a stop symbol of a special symbol (step S312).

Next, the main control CPU 600a prepares to shift to a gaming state such as a normal state, a time saving state, a latent probability change state, and a probability change state (step S313). Here, among the normal symbol time saving flag, the normal symbol probability change flag, the special symbol time saving flag, and the special symbol probability change flag, which are set after the big hit in the case of a big hit, the flag according to the game state after the transition is turned ON. Prepare the flag data for this in advance. In addition, the number of time reductions set in the special symbol time reduction counter and the probability variation number set in the special symbol probability variation counter are also prepared.

Next, the main control CPU 600a generates a variation pattern of the special symbol using the random value for the variation pattern stored in the main control RAM 600c in step S253 of FIG. 42, and the variation pattern of the generated special symbol variation pattern. The command is transmitted to the sub control board 80 (sub control CPU 800a) as the effect control command DI_CMD (step S314). At this time, the main control CPU 600a will refer to the fluctuation pattern table shown in FIGS. 10 to 13. That is, first, the main control CPU 600a refers to the table TBL shown in FIG. 10A. Then, in the normal gaming state, the variation pattern table NOR_TBL shown in FIG. 10B is used as the variation pattern table to be referred to. Further, in the first time-shortening gaming state shown in FIG. 9B or the first time-saving gaming state shown in FIG. 9C, in the fluctuation of the special symbol at the 1st to 79th rotations, FIG. 11A is shown. The variation pattern table JT1_TBL1 shown in the above is used, and the variation pattern table JT1_TBL2 shown in FIG. 11B is used for the variation of the special symbol at the 80th to 99th rotations. The variation pattern table JT1_TBL3 shown in 12 (a) is used. Furthermore, in the second time-shortening gaming state shown in FIG. 9B or the second time-saving gaming state shown in FIG. 9C, the variation of the special symbol in the first rotation is shown in FIG. 12B. The variation pattern table JT2_TBL1 is used, and the variation pattern table JT2_TBL2 shown in FIG. 12B is used for the variation of the special symbol at the 2nd to 100th rotations. The variation pattern table JT2_TBL3 shown in 13 is selected. Then, the variation pattern of the special symbol is generated according to the variation pattern table selected in this way, and the variation pattern command of the generated variation pattern of the special symbol is used as the effect control command DI_CMD, and the sub control board 80 ( It is transmitted to the sub-control CPU 800a). In response to this, as shown in FIG. 9B, the sub-control CPU 800a is executed a predetermined number of times (for example, 1000 times) of the special symbol deviation fluctuation, and is in the second time-shortening gaming state (state with low probability electric support). ), For example, immediately after shifting to the second time-saving game state (state with low probability electric support) without executing the time-saving rush effect when the special symbol is out of alignment for the predetermined number of times (for example, 1000 times). At the time of the 1001st change of the special symbol, the time-saving rush effect such as displaying an image prompting the player to "right-hand" on the liquid crystal display device 41 is executed.

Further, as shown in FIG. 9B, the liquid crystal display device is used even when the special symbol lottery is won and a big hit is obtained when shifting to the second time-saving game state (state with low probability electric support). A time-saving rush effect including a right-handed notification such as displaying an image prompting the player to "right-handed" on 41 is first executed, and the effect changes from the middle.

Further, the change of the special symbol reaches a predetermined number of times (for example, 100 times) from the first time saving state (state with low probability electric support) shown in FIG. 9C or FIG. 9B, and the normal gaming state (for example, 100 times) When returning to the state without low probability power support), the sub-control CPU 800a displays a result effect on the liquid crystal display device 41 (hit XX times,) with the final fluctuation (for example, 100 times) of a predetermined number of times (for example, 100 times). The number of acquisitions ○○○ points, etc. is displayed). However, the fluctuation of the special symbol reaches a predetermined number of times (for example, 100 times or more) from the second short-time gaming state (state with low probability power support) shown in FIG. 9 (c), and the normal game state (state without low probability power support). ), Or from the second short-time gaming state (state with low probability electric support) shown in FIG. 9 (b), the change of the special symbol reaches a predetermined number of times (for example, 1000 times), and the normal gaming state (low probability). When returning to the state without electric support), since the fluctuation pattern is selected using the same fluctuation pattern table as before the final fluctuation, the fluctuation pattern command for executing the result effect is not transmitted to the sub-control CPU 800a. The sub-control CPU 800a controls the liquid crystal display device 41 so that the result effect is not displayed after the final fluctuation of a predetermined number of times.

In step S314, the main control CPU 600a sets the fluctuation time in the special symbol fluctuation timer.

Next, the main control CPU 600a sets the special symbol changing flag to 5AH and puts it in the ON state (step S315).

Next, the main control CPU 600a generates a symbol designation command for designating a special symbol displayed on the liquid crystal display device 41 (step S316), and the generated symbol designation command is used as an effect control command DI_CMD for the sub control board 80 (sub). A process of transmitting to the control CPU 800a) is performed (step S317).

Next, the main control CPU 600a sets 02H in the special symbol operation status flag (step S318), and ends the special symbol change start processing.

<Main control: Explanation of special symbol processing>
On the other hand, as shown in FIG. 41, when the value of the special symbol operation status flag is 02H, the main control CPU 600a determines that the special symbol is changing (indicating that the special symbol is currently changing), and is special. Processing during symbol change is performed (step S206).

<Main control: Special symbol processing: Explanation of processing during special symbol change>
Explaining this process in detail with reference to FIG. 49, first, the main control CPU 600a has elapsed the fluctuation time set in the special symbol fluctuation timer in step S314 of FIG. 43, that is, whether or not it has become 0. Is confirmed (step S400). If the special symbol change timer is not 0 (step S400: NO), the main control CPU 600a ends the process during special symbol change.

On the other hand, if the special symbol variation timer is 0 (step S400: YES), the main control CPU 600a transmits the symbol confirmation command as the effect control command DI_CMD to the sub control board 80 (sub control CPU 800a) (step S401).

Next, the main control CPU 600a sets 03H in the special symbol operation status flag and 00H in the special symbol changing flag. Further, the main control CPU 600a sets, for example, a time of about 500 ms in the special symbol variation timer in order to maintain the winning / failing lottery result of the special symbol for a certain period of time (step S402). After that, the main control CPU 600a ends the processing during the special symbol change.

<Main control: Explanation of special symbol processing>
On the other hand, as shown in FIG. 41, when the value of the special symbol operation status flag is 03H, the main control CPU 600a is in the process of confirming the special symbol (indicating that the change of the special symbol has ended and is stopped). Judgment is made, and processing is performed during the special symbol confirmation time (step S207).

<Main control: Special symbol processing: Explanation of processing during special symbol confirmation time>
Explaining this process in detail with reference to FIG. 50, first, the main control CPU 600a has elapsed the fluctuation time set in the special symbol fluctuation timer in step S314 of FIG. 43, that is, whether or not it has become 0. Is confirmed (step S450). If the special symbol variation timer is not 0 (step S450 ≠ 0), the main control CPU 600a ends the process during the special symbol confirmation time.

On the other hand, if the special symbol fluctuation timer is 0 (step S450 = 0), the main control CPU 600a sets the special symbol operation status flag to 01H (step S451), and is the special symbol jackpot determination flag set to ON? Confirm (whether 5AH is set) (step S452). If the special symbol jackpot determination flag is set to ON (if 5AH is set) (step S452: YES), 00H is set in the special symbol jackpot determination flag, and 5AH is set in the special symbol jackpot operation flag. Then, 00H is set in the normal symbol time reduction flag, 00H is set in the normal symbol probability change flag, 00H is set in the special symbol time reduction flag, and 00H is set in the special symbol probability change flag. Further, a process of setting 0000H to the special symbol time reduction counter and 00H to the special symbol probability variation counter, which will be described later, is performed (step S453).

Next, the main control CPU 600a sets 0000H to the relief number counter, and sets 0FFH to the relief activation flag indicating that the special symbol missed variation has been executed a predetermined number of times (for example, 1000 times) in the relief game (step S454). ). After that, the main control CPU 600a ends the processing during the special symbol confirmation time.

On the other hand, if the special symbol big hit determination flag is not set to ON (if 5AH is not set) (step S452: NO), is the main control CPU 600a set to the special symbol small hit determination flag to ON (step S452: NO)? Check if 5AH is set) (step S455). If the special symbol small hit determination flag is set to ON (if 5AH is set) (step S455: YES), 00H is set in the special symbol small hit determination flag, and 5AH is set in the special symbol small hit operation flag. Is set (step S456). If the small hit symbol and the special electric support symbol are also used, the normal symbol time reduction flag, the normal symbol probability change flag, and the special symbol time reduction flag are set to ON (5AH is set) in preparation for the transition to the second time reduction game state. ), And set the time reduction count in the special symbol time reduction counter. Alternatively, in step S110 shown in FIG. 39, when the jackpot processing starts or the jackpot processing ends, the normal symbol time reduction flag, the normal symbol probability change flag, and the special symbol time reduction flag are turned ON (5AH is set). Set the time reduction count in the special symbol time reduction counter. On the other hand, when the small hit symbol and the special electric support symbol are not used at the same time, if the special electric support symbol hit determination flag is set to ON as in step S455, 00H is set in the special electric support symbol determination flag. In preparation for the transition to the second time saving game state, the normal symbol time saving flag, the normal symbol probability change flag, and the special symbol time saving flag are turned ON (5AH is set), and the time saving number is set in the special symbol time saving number counter.

After finishing the process of step S456, or if the special symbol small hit determination flag is not set to ON (if 5AH is not set) (step S455: NO), the main control CPU 600a shortens the special symbol time. It is confirmed whether or not the value of the count counter is 0 (step S457).

If the value of the special symbol time reduction counter is not 0 (step S457: NO), the value of the special symbol time reduction counter is subtracted by 1 (-1) (step S458), and the main control CPU 600a again performs the special symbol time reduction counter. It is confirmed whether or not the value of the counter is 0 (step S459). If the value of the special symbol time reduction counter is 0 (step S459: YES), 00H is set for the normal symbol time reduction flag, 00H is set for the normal symbol probability change flag, and 00H is set for the normal symbol time reduction flag. To set. Further, an initial value is set in the relief count counter (step S460).

After the processing of step S460 is completed, or if the value of the special symbol time reduction counter is 0 (step S457: YES) or the value of the special symbol time reduction counter is not 0 (step S459: NO), the main The control CPU 600a confirms whether or not the value of the special symbol probability variation counter is 0 (step S461). If the value of the special symbol probability variation counter is 0 (step S461: YES), the process proceeds to step S465.

On the other hand, if the value of the special symbol probability variation counter is not 0 (step S461: NO), the main control CPU 600a subtracts 1 from the value of the special symbol probability variation counter (-1) (step S462), and again the special symbol. It is confirmed whether or not the value of the probability variation counter is 0 (step S463). If the value of the special symbol probability variation counter is not 0 (step S463: NO), the process proceeds to step S465.

On the other hand, if the value of the special symbol probability variation counter is 0 (step S463: YES), the main control CPU 600a sets the normal symbol time reduction flag to 00H, sets the normal symbol probability variation flag to 00H, and sets the special symbol time reduction flag. Is set to 00H, a process of setting 00H to the special symbol probability change flag is performed (step S464), and the process proceeds to step S465.

Next, the main control CPU 600a confirms whether or not the special symbol probability change flag is ON (5AH is set) (step S465). If the special symbol probability change flag is set to ON (if it is set to 5AH) (step S465: YES), the main control CPU 600a ends the process during the special symbol confirmation time.

On the other hand, if the special symbol probability change flag is not set to ON (if it is not set to 5AH) (step S465: NO), the main control CPU 600a determines whether the rescue activation flag is ON (5AH is set). Is confirmed (step S466). If the rescue activation flag is set to ON (if it is set to 5AH) (step S466: YES), the main control CPU 600a ends the process during the special symbol confirmation time.

On the other hand, if the rescue activation flag is not set to ON (if it is not set to 5AH) (step S466: NO), the main control CPU 600a confirms whether or not the value of the rescue count counter is 0 (step S467). ). If the value of the relief count counter is 0 (step S466: YES), the main control CPU 600a ends the process during the special symbol confirmation time.

On the other hand, if the value of the relief count counter is not 0 (step S467: NO), the value of the relief count counter is subtracted by 1 (-1) (step S468), and the main control CPU 600a again sets the value of the relief count counter. It is confirmed whether or not it is 0 (step S469). If the value of the relief count counter is not 0 (step S469: NO), the main control CPU 600a ends the process during the special symbol confirmation time. On the other hand, if the value of the relief count counter is 0 (step S469: YES), the main control CPU 600a turns on the special symbol time reduction flag (5AH is set), and sets the time reduction count in the special symbol time reduction counter. Further, the main control CPU 600a turns on the relief activation flag (sets 5AH), turns on the right-handed state flag (sets 5AH) (step S470), and finishes the process during the special symbol confirmation time. As described above, when the relief activation flag is set to ON, the state transition information is output from the external terminal (not shown) in step S113 shown in FIG. 39.

Then, after 0000H is set and cleared in step S26 shown in FIG. 36, the initial value of the relief count counter is set in step S29 shown in FIG. Then, in the normal gaming state, the count is executed in step S468 shown in FIG. 50, and the second time saving game state shown in FIG. 9B or FIG. 9C (the state in which the special symbol time saving flag is ON). In the case of, as shown in step S466: YES of FIG. 50, the relief count counter is not cleared (0000H is not set), and the count is not executed. Further, the relief count counter is set in step S460 shown in FIG. 50 when the second time saving game state (state in which the special symbol time saving flag is ON) shown in FIG. 9B or FIG. 9C is completed. , The initial value is set according to the state of the relief activation flag, and in the normal gaming state shifted from the second time-saving gaming state shown in FIG. 9B or FIG. 9C, step S468 shown in FIG. The count will be executed at. As a result, since the value of the relief count counter is set at an appropriate place and the count is executed, unnecessary processing can be omitted, and the processing can be simplified.

<Main control: Explanation of special symbol processing>
Thus, when any of the processes of step S205, step S206, and step S207 shown in FIG. 41 is completed, the main control CPU 600a ends the special symbol processing after updating the display data of the special symbol (step S208). ..

By the way, in the present embodiment, an example of subtracting the relief count counter is shown, but it may be added. This point will be described in detail with reference to FIG. 52. The same processes as those described above are designated by the same reference numerals, and the description thereof will be omitted.

<Main control: Special symbol processing: Explanation of processing during special symbol confirmation time (variation example)>
As shown in FIG. 52, the main control CPU 600a adds the value of the relief count counter (+1) if the special symbol probability change flag is not set to ON (if it is not set to 5AH) (step S465: NO). (Step S500), it is confirmed whether or not the value of the relief count counter has reached the number of relief arrivals (for example, 1000) (step S501). If the number of times the relief has been reached (for example, 1000) has been reached (step S501: YES), the process of step S470 is performed, and the process during the special symbol confirmation time is completed.

On the other hand, if the number of rescue arrivals (for example, 1000) has not been reached (step S501: NO), the main control CPU 600a confirms whether or not the value of the rescue count counter is 0000H (step S502). If the value of the relief count counter is not 0000H (step S502: NO), the processing during the special symbol confirmation time is completed.

On the other hand, if the value of the relief count counter is 0000H (step S502: YES), the value of the relief count counter is subtracted (-1) (step S503), and the processing during the special symbol confirmation time is completed. The reason why the value of the relief count counter is subtracted (-1) in step S503 is as follows. That is, if the special symbol probability change is not in progress, the relief count counter adds a value (+1). Therefore, after the value of the relief count counter reaches the number of relief arrivals, the relief count counter continues to count up to FFFFH, which is the upper limit of 2 bytes, unless a big hit is made. Therefore, when the count value of the relief count counter is added (+1) when it is FFFFH, the count value becomes 0000H, so that it is subtracted (-1) in order to return it to FFFFH (0000H-0001H = FFFFH). ).

However, even in this way, the same effect as described above can be obtained.

By the way, in either case of subtracting or adding the relief count counter, once the relief activation flag is set to ON (5AH is set), the special symbol jackpot determination flag is set to ON (5AH is set) (step). S452: YES), that is, unless a big hit is made, the rescue activation flag remains ON. Therefore, when the power is cut off (power cut off), the power is turned on again to return to the game, the rescue activation flag is ON, and the game is not in the second time-saving game state (state with low probability electric support), that is, the second time-saving game. When the state (the state with low probability electric support) is completed and the normal game state is set, the relief activation flag remains ON even if the special symbol is displaced a predetermined number of times (for example, 1000 times). Therefore, it will not enter the second short game state (state with low probability electric support). Therefore, in step S41 shown in FIG. 36, a command indicating this is transmitted to the sub-control board 80 as the effect control command DI_CMD. As a result, the sub-control CPU 800a can recognize this, and can notify the player or the like.

Further, the relief count command transmission shown in FIG. 44 and the time reduction count command transmission shown in FIG. 45 can be as shown in FIGS. 53 and 54. This point will be specifically described below.

<Main control: Special symbol processing: Explanation of relief count command transmission (modification example)>
As shown in FIG. 53, first, the main control CPU 600a confirms whether or not the relief activation flag is ON (step S510). If the rescue activation flag is ON (step S510: YES), the process of transmitting the rescue count command is completed. That is, if the relief activation flag is ON, it indicates that the missed variation of the special symbol has been executed a predetermined number of times (for example, 1000 times), so that the value of the relief number counter is set to the sub-control board 80 (sub-control). There is no need to transmit to the CPU 800a). Therefore, if the rescue activation flag is ON (step S510: YES), if the rescue count command is not transmitted and the process is completed, it is necessary to transmit an extra command to the sub control board 80 (sub control CPU 800a). The load on the sub-control board 80 (sub-control CPU 800a) can be reduced.

On the other hand, if the rescue activation flag is not ON (step S510: NO), the main control CPU 600a stores the value (2-byte data) of the rescue count counter in the HL register inside the main control CPU 600a (step S511). ..

Next, the main control CPU 600a confirms whether or not the value of the relief count counter stored in the HL register is 0 (step S512). If the value is 0 (step S512: YES), the process of transmitting the relief count command is completed.

On the other hand, if the value is not 0 (step S512: NO), the data division process is performed (step S513).

<Main control: Special symbol processing: Explanation of data division processing>
Explaining this process in detail with reference to FIG. 55, the main control CPU 600a divides the value of the HL register by 100. Then, the main control CPU 600a stores the divided quotient in the L register inside the main control CPU 600a, and stores the remainder in the H register inside the main control CPU 600a (step S550).

Next, the main control CPU 600a adds the L register (+1), adds the H register (+1) (step S551), and ends the data division process.

<Main control: Special symbol processing: Explanation of relief count command transmission (modification example)>
Thus, after completing the data division process (step S513) as described above, the main control CPU 600a stores the DBH in the D register inside the main control CPU 600a, and stores the DBH in the E register inside the main control CPU 600a. Stores the value of. Then, the main control CPU 600a transmits the value of the DE register to the sub control board 80 (sub control CPU 800a) as the relief count command 1 (effect control command DI_CMD) of the first command (step S514).

Next, the main control CPU 600a stores the DCH in the D register inside the main control CPU 600a, and stores the value of the H register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub control board 80 (sub control CPU 800a) as the second command rescue count command 2 (effect control command DI_CMD) (step S515), and the rescue count command is transmitted. Finish the process of.

Thus, by doing so, the sub-control CPU 800a subtracts 1 from the lower byte of the first command and subtracts 1 from the lower byte of the second command. Then, the value of the lower byte of the first command subtracted by 1 is multiplied by 100, and the value of the lower byte of the second command subtracted by 1 is added. As a result, the sub-control CPU 800a can grasp how many times the deviation variation of the special symbol shown in FIG. 9B is executed. When displaying a number on the liquid crystal display device 41 using the VDP803, the numerical value obtained by subtracting the lower byte of the first command by 1 is subtracted by 1 from the thousands and hundreds digits, and the lower byte of the second command is subtracted by 1. It will be displayed as a number in the tens and ones place.

However, even in this way, not only the command configuration can be made easy to understand, but also the control load can be reduced.

<Main control: Special symbol processing: Explanation of time saving command transmission (modification example)>
On the other hand, as shown in FIG. 54, the main control CPU 600a stores the value (2-byte data) of the special symbol time reduction counter in the HL register inside the main control CPU 600a (as shown in FIG. 54). Step S520).

Next, the main control CPU 600a confirms whether or not the value of the special symbol time reduction counter stored in the HL register is 0 (step S521). If the value is 0 (step S521: YES), the process of transmitting the command for the shortened number of times is completed.

On the other hand, if the value is not 0 (step S521: NO), the data division process shown in FIG. 55 is performed (step S522).

Next, the main control CPU 600a stores the DDH in the D register inside the main control CPU 600a, and stores the value of the L register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub control board 80 (sub control CPU 800a) as the first command time reduction command 1 (effect control command DI_CMD) (step S523).

Next, the main control CPU 600a stores the DEH in the D register inside the main control CPU 600a, and stores the value of the H register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register as the second command time reduction command 2 (effect control command DI_CMD) to the sub control board 80 (sub control CPU 800a) (step S524), and transmits the time reduction command. Finish the process of.

Thus, by doing so, the sub-control CPU 800a subtracts 1 from the lower byte of the first command and subtracts 1 from the lower byte of the second command. Then, the value of the lower byte of the first command subtracted by 1 is multiplied by 100, and the value of the lower byte of the second command subtracted by 1 is added. As a result, the sub-control CPU 800a can grasp the number of time reductions in the second time reduction game state (state with low probability electric support) shown in FIGS. 9B and 9C. When displaying a number on the liquid crystal display device 41 using the VDP803, the numerical value obtained by subtracting the lower byte of the first command by 1 is subtracted by 1 from the thousands and hundreds digits, and the lower byte of the second command is subtracted by 1. It will be displayed as a number in the tens and ones place.

However, even in this way, not only the command configuration can be made easy to understand, but also the control load can be reduced.

Further, as shown in FIG. 55, if the process of dividing 2-byte data into thousands and hundreds is made into a subroutine, the number of time reductions can be two commands to transmit thousand and hundreds and tens and ones. At this time, it can be used as a common subroutine with the relief count command, so that the program capacity can be reduced.

<Processing content of sub-control board>
Next, the processing method of the effect shown in FIGS. 25 to 34 will be specifically described with reference to the processing contents (outline of the program) of the sub-control board 80 shown in FIGS. 56 to 60.

First, when the power is turned on to the pachinko gaming machine 1, a power-on signal indicating that the power is turned on is sent from the power supply board 130 (see FIG. 6) to each control board. Then, in response to the signal, the sub-control CPU 800a performs the main process shown in FIG. 56.

<Sub control: Main processing>
As shown in FIG. 56, first, the sub-control CPU 800a initializes the registers provided inside and sets the input / output directions of the input / output ports. Further, the data transmitted from the output port set in the output direction is set to be serial transfer (step S1000).

Next, the sub-control CPU 800a initializes a memory area in the sub-control RAM 800c that stores the effect control command DI_CMD received from the main control board 60 (see FIG. 6) (step S1001). Then, the sub-control CPU 800a performs an interrupt permission setting process for the input port that receives the interrupt signal from the main control board 60 (step S1002).

Next, the sub-control CPU 800a initializes the memory area in the sub-control RAM 800c used as the work area and the stack area (step S1003), and issues an initialization command to the sound LSI 801 (see FIG. 6). As a result, the sound LSI 801 initializes the register provided inside the sound LSI 801 (step S1004).

Next, the sub-control CPU 800a determines whether or not an abnormality has occurred in the motors (not shown) that operate the upper, left, right, and upper left movable accessories 43a to 43d (see FIG. 5), and the motors (not shown). ) Is stored, and the memory area in the sub-control RAM 800c is confirmed. When the abnormality data is stored, the sub-control CPU 800a issues a command to return the motor to the origin position. As a result, the upper / left / right / upper left movable accessories 43a to 43d return to the initial positions (step S1005).

Next, the sub-control CPU 800a sets a CTC (Counter Timer Circuit) provided inside the sub-control CPU 800a, which has a function of creating a pulse output having a fixed period, a function of measuring time, and the like. That is, the sub-control CPU 800a sets the time constant register of the CTC so that a timer interrupt is periodically interrupted every 1 ms (step S1006).

Next, the sub-control CPU 800a performs a checksum operation, which is an 8-bit addition operation targeting the work area of the sub-control RAM 800c (step S1007), and uses the checksum operation value and a memory backup (see step S1015) described later. It is calculated and compared with the checksum calculation value stored in the sub-control RAM 800c, and it is confirmed whether or not they match (step S1008). If they do not match (step S1008: NO), a process of clearing all the areas in the sub-control RAM 800c is performed (step S1009).

On the other hand, after matching (step S1008: YES) or finishing the process of step S1009, the sub-control CPU 800a cancels the watch dock timer function (step S1010) (not shown), and hardware such as the sub-control CPU 800a and VDP803. Is refreshed (step S1011).

Next, the sub-control CPU 800a reads the effect control command DI_CMD received from the main control board 60 (see FIG. 6) stored in the memory area in the sub-control RAM 800c, and subordinates the effect pattern according to the content thereof. It is determined by lottery from a large number of effect patterns stored in advance in the control ROM 800b (step S1012). At this time, the sub-control CPU 800a draws a lot using the sub-control fluctuation pattern distribution table SUB_FR_TBL shown in FIG. 33A, and the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33B is based on the lottery result. A lottery is performed using the symbol change notice table ZH_TBL shown in (c). Then, when the sub-control CPU 800a uses the symbol change notice table ZH_TBL shown in FIG. 33 (c) to perform a lottery to win a change to another symbol, the change symbol lottery distribution shown in FIG. 33 (d) is performed. A lottery will be conducted using the table HZC_FR_TBL.

Then, the fluctuation pattern determined in this way is used as an offset value, and the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33 (b) and the symbol change notice table ZH_TBL shown in FIG. 33 (c) based on the offset value. By performing a lottery using the above, it is possible to select a table according to the offset value, so that the control load can be reduced.

On the other hand, the sub-control CPU 800a refers to the table HK_TBL shown in FIG. 32 (a), and refers to the first distribution table FR_TBL1 shown in FIG. 32 (b) in the change of the special symbol in the 1st to 19th rotations after the background change. And draw lots. At this time, regardless of the fluctuation pattern, the winner is won without changing the background.

Further, the sub-control CPU 800a draws a lottery with reference to the second distribution table FR_TBL2 shown in FIG. 32 (c) in the change of the special symbol at the 20th to 39th rotations after the background change. Then, the sub-control CPU 800a draws a lottery with reference to the third distribution table FR_TBL3 shown in FIG. 32 (d) in the change of the special symbol at the 40th to 59th rotations after the background change. Further, the sub-control CPU 800a draws a lottery with reference to the fourth distribution table FR_TBL4 shown in FIG. 32 (e) in the change of the special symbol from the 60th rotation after the background change. At this time, the background change is always executed regardless of the fluctuation pattern.

Then, in this way, if the first distribution table FR_TBL1 which is a distribution table in which all the distribution values at which the background change is executed is "0" (does not win the background change) is prepared and lottery is performed, control is performed. It is not necessary to perform control such as not changing the background, which is a notice effect, and thus it is possible to reduce the control load. Furthermore, in the debugging work related to the lottery of the background change, which is a notice effect, it is only necessary to check the distribution table, so that the man-hours required for debugging can be reduced.

On the other hand, when a command of 2-byte data is transmitted, the sub-control CPU 800a subtracts 1 from the lower byte of the first command and subtracts 1 from the lower byte of the second command. Then, the value of the lower byte of the first command subtracted by 1 is multiplied by 100, and the value of the lower byte of the second command subtracted by 1 is added.

Next, the sub-control CPU 800a performs a process of analyzing the input contents of the setting button 15 or the effect button device 13 acquired by the timer interrupt process described later (step S1013). Specifically, the player analyzes whether the setting button 15 or the effect button device 13 is pressed, released, or remains pressed by the player.

Next, the sub-control CPU 800a controls the operation of the upper / left / right / upper left movable accessories 43a to 43d (see FIG. 5) and the decorative lamp board 90 (see FIG. 5) based on the effect pattern determined by lottery in step S1012. (See FIG. 6), the lighting or extinguishing of decorative lamps such as LED lamps, the control of the speaker 17, and the control of the image displayed on the liquid crystal display device 41 are executed (step S1014). At this time, if the lottery for changing the background is won, the sub-control CPU 800a sets the current background in the first background data and sets the changing background in the second background data. Then, the sub-control CPU 800a counts the VSYNC interrupt signal, and as shown in FIGS. 34 (b-3) and (c-3), the frame in which the left shutter (see image P106a) and the right shutter (see image P106b) are closed. When it reaches, the changing background set in the second background data is set in the first background data.

Next, the sub-control CPU 800a performs a checksum operation, which is an 8-bit addition operation targeting the work area of the sub-control RAM 800c, and performs a memory backup process for storing the checksum operation value in the sub-control RAM 800c (step). S1015).

Next, the sub-control CPU 800a confirms whether or not the VSYNC interrupt signal has been transmitted from the VDP 803 to the sub-control CPU 800a (step S1016). If the VSYNC interrupt signal is not transmitted (step S1016: NO), the sub-control CPU 800a repeatedly executes the process of step S1016 until the VSYNC interrupt signal is transmitted, and when the VSYNC interrupt signal is transmitted. (Step S1016: YES), the process returns to the process of step S1007, and the processes of steps S1007 to S1016 are repeated.

<Sub-control: data analysis processing>
Subsequently, with reference to FIG. 57, the data analysis process in step S1014 of the main process will be described in detail. First, the sub-control CPU 800a selects the effect scenario data PS_DATA (see FIG. 7A) corresponding to the effect pattern determined by lottery in step S1012 from the effect scenario table PR_TBL, and stores it in the selected effect scenario data PS_DATA. An image to be displayed on the liquid crystal display device 41 on the VDP 803 based on various data (frame data PS_DATA10, control code data PS_DATA11, coordinate data PS_DATA12, pixel calculation data PS_DATA13, scaling data PS_DATA14) stored in the 1-layer data PS_DATA1. Generate a command list for generating data (step S1050). At this time, a command list for generating image data to be displayed on the liquid crystal display device 41 as described with reference to FIGS. 9 (b) and 9 (c) is also generated. Further, a command list for generating image data to be displayed on the liquid crystal display device 41 as described with reference to FIGS. 27 to 31 is also generated. Further, image data according to the contents set in the first background data, as specific examples, FIGS. 34 (b-1) to (b-5), FIGS. 34 (c-1) to (c-5). A command list for generating image data to be displayed on the liquid crystal display device 41 as described using the above is also generated.

Next, the sub-control CPU 800a has data or a setting button 15 indicating that the pressing effect of the effect button device 13 is effective for the button data PS_DATA113 (see FIG. 7C) stored in the selected effect scenario data PS_DATA. When the data indicating that the repeated hitting effect of the above is effective is stored, the data is stored in the memory area in the sub-control RAM 800c.

Further, the sub-control CPU 800a generates a control signal related to light based on the data content of the lamp data PS_DATA17 (see FIG. 7B) stored in the selected effect scenario data PS_DATA, and is in the sub-control RAM 800c. Performs the process of storing in. At this time, a control signal related to the light when the decorative lamp is turned on as described with reference to FIGS. 9 (b) and 9 (c) is also generated.

Further, the sub-control CPU 800a is based on the data content of the movable accessory data PS_DATA16 (see FIG. 7B) stored in the selected effect scenario data PS_DATA, and the upper / left / right / upper left movable accessory 43a. The operation contents of to 43d are determined, and the motor data of the motor (not shown) of the movable accessory device 43 according to the determined operation contents is generated.

Furthermore, the sub-control CPU 800a generates a control signal related to sound based on the data content of the sound data PS_DATA15 (see FIG. 7B) stored in the selected effect scenario data PS_DATA (step S1051).

Thus, the sub-control CPU 800a repeats the processes of step S1050 and step S1051 until all the data based on the effect pattern determined by lottery in step S1012 shown in FIG. 56 is generated (step S1052: NO). When all the data has been generated (step S1052: YES), the process proceeds to step S1053.

Next, the sub-control CPU 800a performs button activation processing based on the content stored in the sub-control RAM 800c in step S1051 and the input content of the setting button 15 or the effect button device 13 processed in step S1013 shown in FIG. 56. (Step S1053).

<Sub-control: Command reception interrupt processing>
Subsequently, with reference to FIG. 58, the processing when the effect control command DI_CMD and the interrupt signal are transmitted from the main control board 60 during the execution of such a main processing will be described.

As shown in FIG. 58, when the sub-control CPU 800a receives the interrupt signal, it executes a save process of saving the contents of each register to the stack area in the sub-control RAM 800c (step S1100). After that, the sub-control CPU 800a reads the register of the input port that has received the effect control command DI_CMD (step S1101), and calculates a pointer indicating the address address of the command transmission / reception memory area in the sub-control RAM 800c (step S1102).

After that, the sub-control CPU 800a again reads the register of the input port that has received the effect control command DI_CMD (step S1103), and whether or not the value read in step S1101 and the value read in step S1103 match. To confirm. If they do not match (step S1104: NO), the process proceeds to step S1107, and if they match (step S1104: YES), the effect control command received from the main control board 60 is sent to the address address corresponding to the calculated pointer. The DI_CMD is stored (step S1105). The stored effect control command DI_CMD will be read out to the sub-control CPU 800a during the process of step S1012 shown in FIG. 56.

Next, the sub-control CPU 800a updates the pointer indicating the address address of the command transmission / reception memory area in the sub-control RAM 800c (step S1106), and restores the register saved in the process of step S1100 (step S1107). As a result, the process returns to the main process shown in FIG. 56.

<Sub-control: timer interrupt processing>
Subsequently, with reference to FIG. 59, the process when the timer interrupt for each 1 ms set in the process of step S1006 (see FIG. 56) of the main process occurs will be described.

As shown in FIG. 59, when a timer interrupt every 1 ms occurs, the sub-control CPU 800a executes a save process of saving the contents of each register to the stack area in the sub-control RAM 800c (step S1150).

Next, the sub-control CPU 800a acquires the data of the setting button 15, the data of the effect button device 13, the motor data of the movable accessory device 43, etc. twice (step S1151), and whether the acquired data match. It is confirmed whether or not (step S1152). If the data do not match (step S1152: NO), the sub-control CPU 800a repeats the process of step S1151 until the data match, and if they match (step S1152: YES), the sub-control RAM 800c uses the matched data. Store in (step S1153).

Next, the sub-control CPU 800a receives a signal from the setting button 15 or the effect button device 13 (step S1154). This received signal will be analyzed by the button analysis process of step S1013 shown in FIG.

Next, the sub-control CPU 800a transmits a control signal regarding the light stored in the sub-control RAM 800c in step S1051 shown in FIG. 57 to the decorative lamp substrate 90 (see FIG. 6) (step S1155). A control signal necessary for turning on or off the identification lamp device 50A (see FIG. 5) is also transmitted.

Next, the sub-control CPU 800a restores the register saved in the process of step S1150 (step S1156). As a result, the process returns to the main process shown in FIG. 56.

<Sub-control: command list>
Here, the command list generated in step S1050 shown in FIG. 57 will be described in detail with reference to FIG. 60.

This command list is a command sequence in which commands for VDP803 (command parser 8035) are listed, but the description contents and description order are slightly different depending on whether a moving image is instructed or a still image is instructed. It's different.

When instructing VDP803 to draw a moving image, the initial command list in FIG. 60 (a) and the stationary command list in FIG. 60 (b) are configured.

As shown in FIG. 60A, the sub-control CPU 800a first generates a command for setting a memory area of the DDR2 SDRAM 804 in which the frame buffer area is set and a memory area for storing the moving image data of the DDR2 SDRAM 804 (). Step S1200). In setting the memory area of the DDR2 SDRAM 804 in which the frame buffer area is set, the image size data PS_DATA112 shown in FIG. 7C is referred to. That is, if the size is, for example, 640 × 320, the memory area corresponding to the size is set.

Next, a command for instructing the decoding of the moving image is generated (step S1201). Specifically, it is an instruction as to which moving image compressed data is to be decoded, and is instructed together with the address address of the CG data storage area of the game ROM 805 in which the corresponding moving image is stored, the number of frames of the moving image, and the like. The address data PS_DATA111 shown in FIG. 7C is referred to as the address address of the CG data storage area in which the corresponding moving image is stored, and the number of frames of the moving image is the frame data PS_DATA10 shown in FIG. 7B. Is referenced.

Next, the end processing command is entered and the generation of the initial command list is completed (step S1202).

Subsequently, the sub-control CPU 800a generates the stationary command list shown in FIG. 60 (b).

As shown in FIG. 60 (b), this stationary command list is composed of moving image drawing instructions, and in the above initial command list, the decoded data of which frame number is displayed on the liquid crystal display device 41 with respect to the decoded moving image data. A command for drawing at which coordinate position of the throat is generated (step S1203). Next, a command for termination processing is entered to complete the generation of the steady-state command list (step S1204). For the command generation for this drawing instruction, the frame data PS_DATA10, the coordinate data PS_DATA12, the pixel calculation data PS_DATA13, and the scaling data PS_DATA14 shown in FIG. 7B are referred to.

On the other hand, when instructing the VDP 803 to draw a still image, as shown in FIG. 60 (c), the sub-control CPU 800a first stores the memory area of the DDR2 SDRAM 804 in which the frame buffer area is set, and the still image data. A command for setting the memory area of the built-in VRAM8040 is generated (step S1210). In setting the memory area of the DDR2 SDRAM 804 in which the frame buffer area is set, the image size data PS_DATA112 shown in FIG. 8C is referred to. That is, if the size is, for example, 640 × 320, the memory area corresponding to the size is set.

Next, a command for instructing the decoding of the still image is generated (step S1211). Specifically, it is an instruction as to which still image compressed data is to be decoded, and is instructed together with the address address and data size of the CG data storage area of the game ROM 805 in which the corresponding still image is stored. The address data PS_DATA111 shown in FIG. 7C is referred to as the address address of the CG data storage area in which the corresponding still image is stored, and the image size data PS_DATA112 shown in FIG. 7C is used as the data size. Referenced.

Next, a command for drawing the decoded still image data at which coordinate position of the liquid crystal display device 41 and in what mode (rotation angle, reduction / enlargement, etc.) is generated (step S1212). Next, a command for end processing is entered to complete the generation of the command list related to the still image (step S1213). For the command generation for this drawing instruction, the frame data PS_DATA10, the coordinate data PS_DATA12, the pixel calculation data PS_DATA13, and the scaling data PS_DATA14 shown in FIG. 7B are referred to.

Thus, the command list related to such moving images and the command list related to still images are transmitted to VDP803 (see FIG. 9), appropriately processed, and then transmitted to the liquid crystal display device 41. As a result, the desired image (for example, FIGS. 27 to 31, FIGS. 34 (b-1) to (b-5), and FIGS. 34 (c-1) to (c-5)) is displayed on the liquid crystal display device 41. Will be done.

By the way, such a command list will instruct the drawing of a still image after instructing the drawing of a moving image. That is, the sub-control CPU 800a uses the effect control command DI_CMD transmitted from the main control CPU 600a to produce any one of the plurality of effect scenario data PS_DATA stored in the effect scenario table PR_TBL shown in FIG. 7 (a). This is because the scenario data PS_DATA is selected, the one-layer data PS_DATA1 stored in the selected effect scenario data PS_DATA is referred to in order from the lowest priority, and a command list is generated. That is, according to the present embodiment, the control code data such that the data PS_DATA110 (see FIG. 7 (c)) showing the moving image is referred to from the control table CH_TBL shown in FIG. 7 (c) at the position where the priority is low. PS_DATA11 is stored, and the control code data PS_DATA11 such that the data PS_DATA110 (see FIG. 7C) indicating a still image is referred to from the control table CH_TBL shown in FIG. 7C is stored in a position having a high priority. Therefore, the command list instructing the drawing of the moving image is generated first, and then the command list instructing the drawing of the still image is generated. As a result, after the moving image data is drawn, the still image data is overwritten and drawn on the drawn moving image data, so that the image data displayed on the liquid crystal display device 41 is generated.

By overwriting the still image data on the drawn moving image data in this way, the image data is generated, so that the characters can be clearly displayed even in the compressed image.

In this embodiment, only an example in which lighting is displayed as a display method of the measurement / setting display device 610 is shown, but the present invention is not limited to this, and the display of the measurement / setting display device 610 is blinked and displayed while the setting is being changed. You may do so.

Further, in the present embodiment, the sound LSI 801 and the VDP 803 are separately configured, but they may be integrated as one chip.

Further, in the present embodiment, the frame buffer area is set in the DDR2 SDRAM 804, but the present invention is not limited to this, and the frame buffer area may be set in the built-in VRAM 8040.

Further, in the present embodiment, the example in which the sub-control CPU 800a is provided in the sub-one-chip microcomputer 800 is shown, but the present invention is not limited to this, and the sub-control CPU 800a may be provided in the VDP 803.

1 Pachinko game machine 41 Liquid crystal display device (count display means)
KAI common high-speed fluctuation animation

Claims (3)

A count update means for updating a predetermined count value as the game progresses,
It has a count display means for displaying the predetermined count value updated by the count update means by arranging a plurality of numbers side by side.
The count display means is
A variable animation showing that the predetermined count value is updated is displayed.
The variable animation is
In displaying the predetermined count value after the update on the count display means based on the value after the update of the predetermined count value, a common high-speed fluctuation animation regardless of the value before the update of the predetermined count value. Is displayed on the count display means, and then a predetermined count value after the update is displayed. The count display means is
The gaming machine according to claim 1, wherein in displaying the predetermined count value after the update, the updated numerical image is displayed and the variable animation is superimposed on the numerical image. The common high-speed fluctuation animation is
In displaying the number to be updated among the plurality of numbers on the count display means, the size of the number to be updated is made different from the size of the number not to be updated among the plurality of numbers. The gaming machine according to claim 1 or 2, which is displayed on the count display means.

Images