JP2023033609A - game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine capable of reducing a control load, and showing a player updating of a count value of accumulated display in a natural expression.

SOLUTION: In displaying a predetermined count value after updating in a liquid crystal display device, a variable animation displays, in the liquid crystal display device, a common high speed variable animation KAI for a plurality of numbers to be updated irrespective of the value after updating of the predetermined count value, and then displays the predetermined count value after updating. That is, by a performance scenario for displaying number information after updating after displaying the common high speed variable animation KAI, the predetermined count value after updating is displayed in the liquid crystal display device.

SELECTED DRAWING: Figure 27

COPYRIGHT: (C)2023,JPO&INPIT

Description

The present invention relates to a game machine such as a pachinko machine, an arrange ball machine, a mammoth ball game machine, a slot, or an enclosed pachinko machine (management game machine) that internally circulates enclosed game balls. To provide a game machine capable of reducing the load and allowing a player to see update of a cumulative display count value in a natural expression.

2. Description of the Related Art As a conventional game machine such as a pachinko machine, for example, a game machine as described in Patent Document 1 is known. This game machine sets 0 if the number of times of time saving is 127 times or more to the lower byte of the time saving number command for transmitting the data of the number of times of saving time managed by the main control to the sub control.

Japanese Unexamined Patent Application Publication No. 2015-100700

However, the gaming machine as described above is unable to reduce the control burden, and furthermore, has the problem that it is not possible to show the update of the count value of the cumulative display to the player in a natural expression. rice field.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a gaming machine capable of reducing the control burden and allowing the player to see the update of the accumulated display count value in a natural expression. .

The above objects of the present invention are achieved by the following means. In addition, although the inside of parenthesis is attached with the reference code|symbol of embodiment mentioned later, this invention is not limited to this.

According to the gaming machine according to the invention of claim 1,
count display means (for example, the liquid crystal display device 41 shown in FIG. 5) that displays a predetermined count value by arranging a plurality of numbers;
and count updating means for updating the predetermined count value,
The count display means (for example, the liquid crystal display device 41 shown in FIG. 5)
displaying a variation animation indicating that the predetermined count value is updated (see, for example, FIG. 27);
The variation animation is
When displaying the updated predetermined count value on the count display means (for example, the liquid crystal display device 41 shown in FIG. 5), the plurality of numbers to be updated are displayed regardless of the updated predetermined count value. 27 (c-1), (c-2) common high-speed variation animation KAI) is displayed on the count display means (eg, the liquid crystal display device 41 shown in FIG. 5) , and then displaying the predetermined count value after the update,
The predetermined count value after the update is displayed on the count display means according to a production scenario (see paragraph [0208] of the specification) in which the numerical information after the update is displayed after the common specific variation animation is displayed. It is characterized by

According to the present invention, the control load can be reduced, and the update of the accumulated display count value can be shown to the player in a natural expression.

1 is a perspective view showing the appearance of a gaming machine according to one embodiment of the present invention; FIG. 2 is a front side perspective view showing a state in which the door of the game machine is opened before the game board according to the same embodiment is installed; FIG. It is a front view showing a state in which the door of the game machine is opened before the game board according to the same embodiment is installed. It is a perspective view of the back side showing the appearance of the gaming machine according to the same embodiment. It is a front view of the game board according to the same embodiment. It is a block diagram showing a control device of the game machine according to the same embodiment. FIG. 4 shows a drawing of a production scenario table according to the same embodiment, (a) shows a diagram in which a plurality of production scenario data are stored, and (b) is stored in one layer data of the production scenario data shown in (a). (c) shows a control table referenced by the control code data shown in (b). It is a block diagram which shows VDP which concerns on the same embodiment. (a) is an explanatory diagram explaining the flow of a conventional game, (b) is an explanatory diagram explaining the flow of a relief game, and (c) is an explanatory diagram explaining the flow of a special electric support symbol game. is. (a) shows a table in which a variation pattern table to be referred to according to the game state is stored, and (b) shows a variation pattern table selected in the normal game state. (a) shows the variation pattern table selected in the first time-saving gaming state (1st to 79th rotation), and (b) shows the variation pattern selected in the first time-saving gaming state (80th to 99th rotation) It is a figure which shows a table. (a) shows the variation pattern table selected in the first time-saving gaming state (100th rotation), (b) shows the variation pattern table selected in the second time-saving gaming state (1st rotation), (c) is a diagram showing a variation pattern table selected in the second time-saving gaming state (2nd to 100th rotations). It is a diagram showing a variation pattern table selected in the second time-saving gaming state (101 to the final rotation). It is an explanatory diagram for explaining the processing contents when the small hit and the special electric sapo symbol are used together. 7 is a block diagram of a one-chip microcomputer mounted on the main control board shown in FIG. 6; FIG. 15A is an explanatory diagram of a reception prescaler register incorporated in the asynchronous serial communication circuit shown in FIG. 15, and FIG. 15B is an explanatory diagram of a reception buffer register incorporated in the asynchronous serial communication circuit shown in FIG. be. 15A is an explanatory diagram of a transmission prescaler register incorporated in the asynchronous serial communication circuit shown in FIG. 15, and FIG. 15B is an explanatory diagram of a transmission buffer register incorporated in the asynchronous serial communication circuit shown in FIG. be. (a) to (c) are timing charts showing a serial communication format of one frame. (a) is an explanatory diagram of a communication setting register built into the synchronous serial communication circuit shown in FIG. 15, and (b) is an explanatory diagram of a transmission data register built into the synchronous serial communication circuit shown in FIG. , (c) is an explanatory diagram of the reception data register incorporated in the synchronous serial communication circuit shown in FIG. 15, and (d) is an explanation of the transmission/reception status register incorporated in the synchronous serial communication circuit shown in FIG. It is a diagram. 7 is a block diagram of a payout control one-chip microcomputer mounted on the payout/launch control board shown in FIG. 6. FIG. (a) is an explanatory diagram of a serial communication baud rate setting register built into the asynchronous serial communication circuit shown in FIG. 20, and (b) is a diagram of the serial communication setting register built into the asynchronous serial communication circuit shown in FIG. It is an explanatory diagram. (a) is an explanatory diagram of an asynchronous serial communication status register incorporated in the asynchronous serial communication circuit shown in FIG. 20, and (b) is an illustration of a serial communication data register incorporated in the asynchronous serial communication circuit shown in FIG. It is an explanatory diagram. FIG. 4 is a timing chart showing the timing from when the external power supply is cut off to when the internal voltage drops. (a) is an explanatory diagram for explaining a state in which the movable accessory device is moving to the front of the liquid crystal display device during the customer waiting demonstration; It is an explanatory diagram illustrating a state in which the liquid crystal display device returns to the origin position (original position), stops the customer waiting demonstration, and displays a normal screen for performing variable display of special symbols. (a) to (d) are explanatory diagrams for explaining the flow of a conventional change effect in which the previous number of balls is changed to a new number of balls in the count-up effect. (a) to (d) are explanatory diagrams for explaining predetermined scenes for displaying numerical information on the previous number of balls and numerical information on the new number of balls on the liquid crystal display device. (a) to (d) are explanatory diagrams for explaining the flow of a change effect according to the embodiment in which the previous number of balls is changed to a new number of balls in the count-up effect. (a-1) to (a-4) are explanatory diagrams for explaining predetermined scenes for displaying on the liquid crystal display device an image that changes from a common variation animation to a new number of balls; -1) to (b-4) are explanatory diagrams explaining the flow of images that change from a common variation animation to a new number of balls, (c-1) to (c-4) are (a- 1) to (a-4) are explanatory diagrams for explaining a predetermined scene for displaying on the liquid crystal display device an image in which the common variation animation is changed to a new number of balls by a method different from 1) to (a-4); . (a) to (f) are explanatory diagrams for explaining the flow of images that change from a common variation animation to a new number of balls when a new count-up effect occurs during the count-up effect. In (a) to (g), in the count-up effect, when performing a change effect in which the previous number of balls is changed to a new number of balls, a high-speed change animation is displayed on the liquid crystal display device only for the ones place, The digits are explanatory diagrams for explaining displaying a slow-moving animation that increments by one. In (a)-(b), the second decimal place displays a high-speed change animation on the liquid crystal display device, and the first decimal place displays a low-speed change animation. It is an explanatory view explaining what is displayed on the liquid crystal display device. (a) shows a table that stores a sorting table to be referred to according to the number of fluctuations in the special symbol after the background change, (b) shows the first sorting table, and (c) shows the second FIG. 8 shows a distribution table, (d) shows a third distribution table, and (e) shows a fourth distribution table. (a) shows a sub-control variation pattern sorting table, (b) shows a left symbol lottery sorting table, (c) shows a symbol change notice table, and (d) shows a changing symbol lottery sorting table. FIG. 4 is a diagram showing; (a-1) to (a-5) show examples of screens of conventional background change effect showing the flow of changing from the current background to the changed background, (b-1) to (b-5) ) shows a screen example of the background change effect according to the same embodiment showing the flow of changing from the current background to the changed background, and (c-1) to (c-5) are from the current background. 10 is a diagram showing a screen example of a background change effect according to another embodiment different from (b-1) to (b-5) showing the flow of changing the background after the change. FIG. It is a flowchart figure explaining the main process of the main control which concerns on the same embodiment. FIG. 36 is a flowchart for explaining the continuation of the main processing of the main control shown in FIG. 35; FIG. 36 is a flowchart for explaining the setting switching process shown in FIG. 35; It is a flowchart figure explaining a power supply abnormality check process. It is a flowchart figure explaining the timer interrupt processing of the main control which concerns on the same embodiment. It is a flowchart figure explaining the design process normally shown in FIG. It is a flowchart figure explaining the special design process shown in FIG. FIG. 42 is a flowchart for explaining a starting port check process 1 (2) shown in FIG. 41; 42. It is a flowchart figure explaining special design variation start processing shown in FIG. FIG. 44 is a flow chart diagram for explaining the transmission of a relief count command shown in FIG. 43; 44. It is a flowchart figure explaining time saving frequency|count command transmission shown in FIG. FIG. 44 is a flowchart for explaining the hit determination process shown in FIG. 43; 44. It is a flowchart figure explaining special electric sapo symbol hit determination processing shown in FIG. It is a figure which shows the example of a program of a special electric support symbol hit determination table. 41. It is a flowchart figure explaining the process during special design fluctuation|variation shown in FIG. 41. It is a flowchart figure explaining processing during special design confirmation time shown in FIG. (a) shows a normal symbol winning determination table used when executing a winning lottery of normal symbols, (b) shows a special symbol jackpot determining table used when executing a winning lottery of special symbols, (c) shows the special symbol small hit determination table used when executing the special symbol lottery, and (d) shows the special electric support symbol hit determination table used when executing the special symbol lottery. It is a figure which shows. It is a flow chart diagram explaining processing during special design fluctuation concerning other embodiments. FIG. 11 is a flowchart illustrating transmission of a relief count command according to another embodiment; It is a flowchart figure explaining time saving frequency|count command transmission which concerns on other embodiment. FIG. 55 is a flowchart for explaining the data division processing shown in FIGS. 53 and 54; FIG. It is a flowchart figure which shows the main process of sub-control which concerns on the same embodiment. FIG. 57 is a flow chart showing the data analysis processing shown in FIG. 56; It is a flowchart figure which shows the command reception process of sub-control which concerns on the same embodiment. It is a flowchart figure which shows the timer interrupt processing of sub control which concerns on the same embodiment. (a) shows a flow chart for explaining an initial command list for moving pictures, (b) shows a flow chart for explaining a stationary command list for moving pictures, and (c) is a flow chart for explaining a command list for still pictures. .

Hereinafter, one embodiment of the gaming machine according to the present invention will be specifically described with reference to the drawings, taking a pachinko gaming machine as an example. In the following description, when the directions of up, down, left, and right are indicated, they refer to up, down, left, and right when viewed from the front of the drawing.

<Description of pachinko machine exterior configuration>
First, referring to FIGS. 1 to 6, the external configuration of the pachinko gaming machine according to the present embodiment will be described.

<Description of the exterior configuration of the front of the pachinko machine>
As shown in FIG. 1, the pachinko game machine 1 includes a wooden outer frame 2 and a hinge 4a (see FIG. 2) provided on the front surface of the outer frame 2 and on the left side thereof. It is provided with a rectangular front frame 3 which is pivotally mounted so as to be openable and detachable.

The front frame 3 includes an upper mounting portion 5 and a lower mounting portion 6 provided below the upper mounting portion 5, as shown in FIGS. On the front side of the upper mounting portion 5, an upper opening/closing door 7 supporting a transparent glass is pivoted about the vertical axis via the hinge 4a so as to be openable and detachable. A lower opening/closing door 8 is pivotally attached to the hinge 4b provided on the same side as the hinge 4a so as to be openable and detachable.

As shown in FIG. 1, the lower opening/closing door 8 has an upper tray 9 for storing discharged game balls, and a lower tray for receiving and storing surplus balls when the upper tray 9 is full. A receiving plate 10 is integrally formed. In addition, a ball lending button 11 and a prepaid card ejection button 12 (card return button 12) are provided on the lower opening/closing door 8, and a built-in lamp (not shown) is lit on the surface of the upper tray 9. A push-button type performance button device 13 is provided which can change the performance effect by pressing it. Further, the upper receiving tray 9 is provided with a ball extracting button 14 for drawing down the game balls stored in the upper receiving tray 9, and further provided with a setting button 15 consisting of a substantially cross key. The setting button 15 can be operated by the player, and includes a circular determination key 15a provided in the center, a triangular up key 15b provided above the determination key 15a in the drawing, and a determination key 15b provided above the determination key 15a. A triangular left key 15c provided on the left side of the key 15a in the figure, a triangular right key 15d provided on the right side of the enter key 15a in the figure, and a triangular right key 15d provided on the lower side of the enter key 15a in the figure. and a lower key 15e.

On the other hand, on the right end side of the lower opening/closing door 8, as shown in FIG. 1, a firing handle 16 for operating the firing unit is provided, and as shown in FIGS. A speaker 17 that emits BGM (background music) or sound effects is provided on the face side and in the vicinity of the firing handle 16 . Decorative lamps, such as LED lamps, are arranged at various locations on the upper opening/closing door 7 and the lower opening/closing door 8 to produce a dramatic effect by light decoration.

On the other hand, as shown in FIGS. 2 and 3, the upper mounting portion 5 is provided with a game board mounting frame 18, and the game board YB (see FIG. 1) is attached to the game board mounting frame 18 as shown in FIG. It is installed with the game area 40 shown facing the front, and is fixed within the game board installation frame 18 . That is, as shown in FIG. 3, the upper mounting portion 5 is provided with a plurality of connectors 19 (four in the figure) for connection on the right side lower portion, so that these connectors 19 are connected to the game board YB. The game board YB is mounted in the game board mounting frame 18 by connecting a connector for connection (not shown) provided on the rear surface of the game board YB. Then, the game board YB is fixed within the game board mounting frame 18 by the fixtures 20a and 20b provided in the vertical direction on the right side. As a result, the game board YB is mounted in the game board mounting frame 18, and the upper opening/closing door 7 supporting the transparent glass is provided in front of the game area 40 of the game board YB (see FIG. 1). ). The game area 40 is an area surrounded by ball guide rails UR (see FIG. 5) arranged on the surface of the game board YB.

On the other hand, as shown in FIGS. 2 and 3 , the lower mounting portion 6 has a firing mechanism 21 arranged substantially in the center in the left-right direction, and a speaker 17 is placed on the right side of the firing mechanism 21 . As shown in FIG. 3, the shooting mechanism 21 includes a support plate 22 made of sheet metal, a shooting rail 23 attached to the front surface of the support plate 22, and a game ball attached to the front surface of the support plate 22 for shooting. a ball holding portion 25 that holds the ball at a firing standby position 24 on the firing rail 23; and a payout/shooting control board 70 equipped with a shooting motor for driving the hitting mallet 27 in the hitting direction via the drive shaft 26 .

<Description of the appearance configuration of the game board>
On the other hand, in the game area 40 of the game board YB, as shown in FIG. 5, a liquid crystal display device 41 comprising an LCD (Liquid Crystal Display) or the like is arranged substantially in the center. The liquid crystal display device 41 divides the display area into three areas, left, middle and right, and is capable of independently displaying numbers, characters, characters (character conversations, lyric telops, etc.) or special patterns. is. A top decoration 42a, a left decoration 42b, and a right decoration 42c are provided around the liquid crystal display device 41, and the back side of the top decoration 42a, the left decoration 42b, and the right decoration 42c are provided. A movable accessory device 43 is arranged.

As shown in FIG. 5, the movable accessory device 43 includes an upper movable accessory 43a, a left movable accessory 43b, a right movable accessory 43c, an upper left movable accessory, and a left movable accessory 43c, which performs a predetermined effect operation as the game progresses. It is composed of an object 43d and a motor (not shown) such as a two-phase stepping motor for driving the upper, left, right, and upper left movable accessories 43a to 43d, respectively. Decorative lamps, such as LED lamps, are arranged on these upper/left/right/upper left movable accessories 43a to 43d to produce a dramatic effect by light decoration.

On the other hand, right below the liquid crystal display device 41, a special symbol 1 starting port 44 is arranged, and a special symbol 1 starting port switch 44a (see FIG. 6) for detecting winning balls is provided therein. Then, the number of valid winning balls detected by the special symbol 1 starting port switch 44a (see FIG. 6), that is, the number of the first start holding balls is displayed on the liquid crystal display device 41 in a predetermined number (for example, 4). . It should be noted that the number of the first start and hold balls is added by 1 (+1) when a game ball enters the special symbol 1 start port 44 and is detected by the special symbol 1 start port switch 44a (see FIG. 6). When the variable display of special symbols such as numbers, characters or patterns (decorative patterns) is started, 1 is subtracted (-1).

On the other hand, a special symbol 2 starting port 45 is arranged on the lower right side of the liquid crystal display device 41, and a special symbol 2 starting port switch 45a (see FIG. 6) for detecting winning balls is provided therein. Then, the number of valid winning balls detected by the special pattern 2 starting port switch 45a (see FIG. 6), that is, the number of second start holding balls is displayed on the liquid crystal display device 41 in a predetermined number (for example, 4). . It should be noted that the number of the second starting and holding balls is added by 1 (+1) when a game ball enters the special symbol 2 starting port 45 and is detected by the special symbol 2 starting port switch 45a (see FIG. 6). When the variable display of special symbols such as numbers, characters or patterns (decorative patterns) is started, 1 is subtracted (-1).

On the other hand, as shown in FIG. 5, the special symbol 2 starting port 45 is provided with an opening/closing member 45b, and when the opening/closing member 45b is opened, a game ball is easily won. The opening/closing member 45b is opened a predetermined number of times for a predetermined period of time in the case of winning a lottery for a normal symbol, which will be described later. In addition, hereinafter, a device including such an opening/closing member 45b and a normal electric accessory solenoid 45c may be referred to as a normal electric accessory.

On the other hand, a winning device 46 is arranged on the right side of the special symbol 1 starting port 44, as shown in FIG. The winning device 46 opens and closes a large winning opening (not shown) that is closed by the open/close door 46a when a special symbol lottery, which will be described later, is won, that is, in a special game state caused by a big win. A door 46a is driven and controlled by a special electric accessory solenoid 46b (see FIG. 6), and a game ball can enter a big winning hole (not shown). A game ball entering this big winning hole (not shown) is detected as a winning ball by a big winning hole switch 46c (see FIG. 6) provided inside the big winning hole (not shown).

On the other hand, when the lottery for the special symbol is not won, that is, when it is not in the special game state, the opening/closing door 46a is driven and controlled by the special electric role item solenoid 46b (see FIG. 6), and a large winning opening (not shown) is opened. is closed. As a result, the game ball cannot enter the big winning hole (not shown). Incidentally, hereinafter, a device combining such an opening/closing door 46a and a special electric accessory solenoid 46b may be referred to as a special electric accessory.

On the other hand, in the upper right part of the liquid crystal display device 41, as shown in FIG. 5, a normal symbol starting port 47 consisting of a gate is arranged. 6) are provided. In addition, on the right side of the winning device 46 and on the left side of the special symbol 1 start opening 44, general winning openings 48 are arranged, respectively. The general prize winning openings 48 are an upper right general winning opening 48a arranged on the right side of the winning device 46, an upper left general winning opening 48b arranged on the left side of the special symbol 1 starting opening 44, and a middle left general winning opening. It is composed of an opening 48c and a lower left general winning opening 48d. An upper right general prize winning port switch 48a1 (see FIG. 6) for detecting passage of game balls is provided inside the upper right general prize winning port 48a, and an upper left switch for detecting passage of game balls is provided inside the upper left general prize winning port 48b. A general winning opening switch 48b1 (see FIG. 6) is provided, and a middle left general winning opening switch 48c1 (see FIG. 6) for detecting passage of game balls is provided inside the middle left general winning opening 48c, and a lower left general winning opening is provided. Inside the opening 48d, a lower left general winning opening switch 48d1 (see FIG. 6) for detecting passage of game balls is provided.

On the other hand, directly below the special symbol 1 starting port 44, an out port 49 is arranged into which a game ball (out ball) that has flowed down to the most downstream part of the game area 40 without winning a prize is entered. A game ball entering the out port 49 is detected as a non-winning ball by an out port switch 49a (see FIG. 6) provided inside. Since it will flow down to the most downstream part, it will be detected by the out port switch 49a (see FIG. 6). Therefore, the out port switch 49a (see FIG. 6) detects the total number of ejected outs, that is, the same number of game balls as the game balls shot into the game area 40 by the shooting handle 16. FIG.

On the other hand, in the lower right peripheral portion of the game area 40 of the game board 4, three 7-segments are arranged side by side, two of which are special symbol display devices 50, and the other 7-segment display devices. 52a is for displaying the special symbol 1, the special symbol 2, the number of start pending balls of normal symbols, and the game state. As shown in FIG. 5, the special symbol display device 50 is composed of a special symbol 1 display device 50a and a special symbol 2 display device 50b. A normal symbol display device 51 composed of LEDs is provided, and further, a round lamp 52b for informing the number of rounds of the jackpot game, and a right-handed informing lamp 52c for informing right-handed hitting are provided.

Further, an identification lamp device 50A indicating identification information corresponding to the special pattern 1 and the special pattern 2 is provided on the upper end side of the left decoration 43b.

This identification lamp device 50A has first and second identification lamps 50Aa and 50Ab for informing the player of the information that the special pattern 1 and the special pattern 2 are fluctuating or that the special pattern 1 and the special pattern 2 are hit and lost. have. The first identification lamp 50Aa corresponds to the special symbol 1, and the second identification lamp 50Ab corresponds to the special symbol 2. When the special symbol 1 is fluctuating, the first identification lamp 50Aa blinks, when the special symbol 1 wins, the first identification lamp 50Aa lights, and when the special symbol 1 fails, the first identification lamp 50Aa. turns off. Further, when the special pattern 2 is fluctuating, the second identification lamp 50Ab blinks, when the special pattern 2 is a win, the second identification lamp 50Ab lights, and when the special pattern 2 is lost, the second identification lamp. 50Ab is for extinguishing.

In the game area 40 of the game board 4, a plurality of game nails (not shown) are arranged, and a windmill 53 as a member for changing the falling direction of the game balls is arranged.

<Description of the exterior configuration of the back of the pachinko machine>
As shown in FIG. 4, the rear surface of the pachinko game machine 1 constructed as described above is provided with a frame-shaped back mechanism plate 54 that covers the game board mounting frame 18 and holds down the game board YB from the back side. there is A game ball storage tank 55 for storing game balls supplied from a game ball supply device (not shown) of the pachinko hall side island facility is provided on the upper right side of the back mechanism plate 54. A tank rail 56 is provided for leading out balls from the game ball storage tank 55 .

A payout device 57 and a payout passage 58 are attached to the inclined lower end of the tank rail 56, and when a game ball enters a winning opening such as a big winning opening (not shown), or a game ball lending device When there is a ball lending command from (not shown), the game balls in the game ball storage tank 55 are paid out by the payout device 57 through the tank rail 56, and the game balls are sent through the payout passage 58 to the upper tray 9 ( (See Fig. 1).

A transparent back cover 59 (see also FIG. 3) attached detachably to the back side of the game board YB is mounted substantially in the center of the back mechanism plate 54. A transparent sub-control board case 80a containing the control board 80 is detachably provided. Under the sub-control board case 80a, a transparent main control board case 60a containing the main control board 60 is detachably provided. A transparent payout/fire control board case 70a containing the board 70 is detachably provided. Further, below the main control board case 60a, a power board case 130a containing a power board 130 is detachably provided.

<Description of the control device>
Next, a control device that performs electronic control according to the progress of a game provided in the pachinko game machine 1 having the above-described exterior configuration will be described with reference to FIG. As shown in FIG. 6, this control device includes a main control board 60 that controls the overall game operation, a payout/shooting control board 70 that pays out game balls based on control commands from the main control board 60, It is mainly composed of a sub-control board 80 that controls images, light, and sound.

<Description on the main control board>
The main control board 60 is composed of a main control CPU 600a, a main control ROM 600b that stores a game program describing a series of game control procedures, and a main control RAM 600c that functions as a work area and a buffer memory. A computer 600 displays the content (performance display) of the ratio of how many prize balls have been won in a low probability time (normal low probability of winning lottery), and generates a special game state advantageous to the player. A measurement/setting display device 610 consisting of 7 segments, which is also used to display probability setting contents, a RAM clear switch 620, and a setting key switch 630 are mainly mounted.

A payout/shooting control board 70 for controlling the payout motor M to pay out game balls is connected to the main control board 60 configured as described above. And further, a special symbol 1 start port switch 44a for detecting winning to the special symbol 1 start port 44, a special symbol 2 start port switch 45a for detecting winning to the special symbol 2 start port 45, and a normal symbol start port A normal symbol start opening switch 47a for detecting the passage of 47 and a winning to the general winning opening 48 (upper right general winning opening 48a, upper left general winning opening 48b, middle left general winning opening 48c, lower left general winning opening 48d) are detected. An upper right general winning opening switch 48a1, an upper left general winning opening switch 48b1, a middle left general winning opening switch 48c1, a lower left general winning opening switch 48d1, and a large winning opening (not shown) opened or closed by the open/close door 46a. A large winning opening switch 46c for detection and an out opening switch 49a capable of detecting the same number of game balls as the game balls shot into the game area 40 by the shooting handle 16 are connected. Furthermore, a normal electric accessory solenoid 45c that controls the operation of the opening/closing member 45b, a special electric accessory solenoid 46b that controls the operation of the opening/closing door 46a, a special symbol 1 display device 50a, and a special symbol 2 display device 50b , a normal symbol display device 51, a 7-segment display device 52a, a round lamp 52b, and a right-handed informing lamp 52c are connected.

The main control board 60 configured in this way is advantageous to the player when the main control CPU 600a receives a signal from the special symbol 1 starting port switch 44a, the special symbol 2 starting port switch 45a, or the normal symbol starting port switch 47a. A lottery is conducted to determine whether to generate a special game state (so-called "win") or not to generate a special game state that is advantageous to the player (so-called "losing"), and the lottery result is the success or failure information. The variation pattern of the special design, the display contents of the stop design or the normal design are determined, and the determined information is transmitted to the special design 1 display device 50a, the special design 2 display device 50b or the normal design display device 51. As a result, the lottery result is displayed on the special symbol 1 display device 50a, the special symbol 2 display device 50b, or the normal symbol display device 51. Further, the main control board 60, that is, the main control CPU 600a generates an effect control command DI_CMD including the determined information and transmits it to the sub control board 80. In addition, the main control board 60, that is, the main control CPU 600a, the special symbol 1 starting opening switch 44a, the special symbol 2 starting opening switch 45a, the upper right general winning opening switch 48a1, the upper left general winning opening switch 48b1, the middle left general winning opening switch When receiving signals from 48c1, lower left general winning opening switch 48d1, and large winning opening switch 46c, determine how many game balls are to be paid out to the player, and pay out a payout control command PAY_CMD including the determined information. - By transmitting to the launch control board 70, the payout/launch control board 70 pays out game balls to the player.

As a result of the lottery, when the lottery for the normal symbol is won, the normal electric accessory solenoid 45c is driven and controlled so that the opening/closing member 45b is opened for a predetermined number of times and for a predetermined time, and when the lottery for the special symbol is won, A special electric accessary item solenoid 46b is controlled to open a large winning opening (not shown).

On the other hand, the main control board 60, that is, the main control CPU 600a, includes the special symbol 1 starting opening switch 44a, the special symbol 2 starting opening switch 45a, the upper right general winning opening switch 48a1, the upper left general winning opening switch 48b1, and the middle left general winning opening switch. Each time a signal is received from 48c1, a lower left general prize winning port switch 48d1, and a large winning prize port switch 46c, the number of prize balls is counted, and each time a signal is received from the out port switch 49a, the total number of discharged game balls is counted. to measure Then, the main control board 60, that is, the main control CPU 600a, based on the measured number of prize balls and the total number of game balls discharged, shows the content (performance display) related to the ratio of how many prize balls were played at the time of low probability. Output to the measurement/setting display device 610 . As a result, the measurement/setting display device 610 displays the content (performance display) related to the ratio of how many prize balls have been won at the time of low probability.

Furthermore, the measurement/setting display device 610 can display the setting contents of the probability of generating a special game state advantageous to the player, for example, in six stages from "1" to "6". . Therefore, in order to change such setting contents, when a dedicated key is inserted into the setting key switch 630 and turned ON, the RAM clear switch 620 is operated to increase the probability of generating a special game state advantageous to the player. For example, the setting contents can be changed in six stages from "1" to "6" (for example, the setting "6" has the highest probability of generating a special game state advantageous to the player). , setting "1" has the lowest probability of generating a special game state advantageous to the player). The content of the setting change is displayed on the measurement/setting display device 610, and when the content of the setting change is confirmed, the dot on the lower right side of the 7-segment lights up to indicate that the content of the setting has been confirmed. It's becoming

On the other hand, when the RAM clear switch 620 is pressed by inserting a dedicated key into the setting key switch 630 and when the RAM clear switch 620 is pressed, all the memory areas of the main control RAM 600c (see FIG. 6) are cleared. is not cleared, and only a part of the memory area is cleared.

<Description on payout/launch control board>
The payout/launch control board 70 receives a payout control command PAY_CMD from the main control board 60 (main control CPU 600a) and generates a payout motor signal based on the received payout control command PAY_CMD. Then, the generated payout motor signal is used to control the payout motor M to pay out game balls to the player. Further, the payout/shooting control board 70 responds to the player's operation to launch the game balls based on the prize ball counting signal indicating the payout operation of the game balls and the status signal related to the abnormality of the payout operation. Perform the process to start or stop.

On the other hand, a touch sensor is provided on the periphery of the firing handle 16 shown in FIG. Then, it is output to the payout/launch control board 70 . In response to this, the payout/launch control board 70 will transmit the detection signal to the main control board 60 (main control CPU 600a). And the main control board 60 (main control CPU 600a) will transmit the detection signal to the sub control board 80 as the effect control command DI_CMD. This makes it possible to transmit information as to whether or not the player touched the handle 16 to play the game to the sub-control board 80 .

<Description on the sub-control board>
The sub-control board 80 receives the effect control command DI_CMD from the main control board 60 (main control CPU 600a), executes and controls various effects, and controls the display image displayed on the liquid crystal display device 41. A sub-one-chip microcomputer composed of a sub-control ROM 800b that stores a control program describing the production control procedure, a production scenario table PR_TBL shown in FIG. 800 is installed.

Furthermore, the sub-control board 80 includes a sound LSI 801 that generates desired BGM and sound effects, a sound RAM 802 that functions as a work area and buffer memory, and a display on the liquid crystal display device 41 based on instructions from the sub-one-chip microcomputer 800 . DDR2 SDRAM 804 comprising a VDP 803 for generating image data to be processed, a work area for decompressing compressed moving image data, a frame buffer area for temporarily storing image data to be displayed on the liquid crystal display device 41, and still image compression. A game ROM 805 in which data, CG data of compressed moving image data, and sound data such as BGM and sound effects are stored in advance is installed. A still image is a so-called sprite image, which indicates a single image such as text data such as characters, a background image, or a special design. In addition, a moving image means a set of a plurality of still images (for a plurality of frames) that change continuously. is reproduced.

The sub-control board 80 configured in this manner is connected to a decorative lamp board 90 on which a decorative lamp such as an LED lamp that produces a lamp effect is mounted. ) A push-button type performance button device 13 is connected which can change the performance effect by being pressed by the player when lit, and a speaker 17 is connected to emit BGM, effect sound, and the like. Further, the sub-control board 80 is connected with a movable accessory device 43 that performs a predetermined effect operation as the game progresses, and the special symbol 1 and the special symbol 2 are changing, or the special symbol 1 and the special symbol are changing. An identification lamp device 50A for informing the player of the information of winning or losing 2 is connected, a setting button 15 capable of various settings is connected, and a liquid crystal display device 41 is connected. Needless to say, this decorative lamp board 90 is also equipped with the decorative lamps arranged on the upper, left, right, and upper left movable accessories 43a to 43d.

Thus, the sub-control board 80 configured in this manner is based on the special symbol variation pattern based on the lottery result transmitted from the main control board 60 (main control CPU 600a), the current game state, the number of start pending balls, and the lottery result. The sub-control CPU 800a receives the effect control command DI_CMD including basic information necessary for the decorative symbols to be stopped. Then, the sub-control CPU 800a determines an effect pattern corresponding to the received effect control command DI_CMD by lottery from a large number of effect patterns stored in advance in the sub-control ROM 800b, and executes the determined effect pattern. The instructing control signal is temporarily stored in the sub-control RAM 800c.

The sub-control CPU 800a transmits to the sound LSI 801 a control signal relating to sound among the control signals instructing execution of the performance pattern stored in the sub-control RAM 800c. In response to this, the sound LSI 801 reads sound data corresponding to the control signal from the game ROM 805 or the sound RAM 802 and outputs it to the speaker 17 . As a result, the speaker 17 emits BGM and sound effects corresponding to the determined production pattern.

Further, the sub-control CPU 800a transmits to the decoration lamp board 90 a control signal related to light, among the control signals for instructing execution of the performance pattern stored in the sub-control RAM 800c. As a result, the decorative lamp board 90 controls lighting or extinguishing of the decorative lamp such as the LED lamp that produces the lamp effect, so that the lamp effect corresponding to the determined effect pattern is executed. .

Then, the sub-control CPU 800a transmits to the VDP 803 a command list relating to images among the control signals instructing execution of the effect patterns stored in the sub-control RAM 800c. As a result, the VDP 803 generates image data so as to display an image based on the command list, and transmits the generated image data to the liquid crystal display device 41, thereby displaying an image corresponding to the determined effect pattern. It will be displayed on the liquid crystal display device 41 .

Further, the sub-control CPU 800a transmits to the movable accessory device 43 a control signal relating to the movable accessory, among the control signals for instructing execution of the performance pattern stored in the sub-control RAM 800c. As a result, the movable accessory device 43 moves according to the determined effect pattern.

<Description of production scenario table>
Here, the effect scenario table PR_TBL stored in the sub-control ROM 800b will be described in detail with reference to FIG. As shown in FIG. 7A, the effect scenario table PR_TBL stores a plurality of effect scenario data PS_DATA corresponding to effect patterns determined by the sub-control CPU 800a. The effect scenario data PS_DATA stores a plurality of 1-layer data PS_DATA1 which are data for each layer used when drawing image data to be displayed on the liquid crystal display device 41 . As shown in FIG. 7B, this 1-layer data PS_DATA1 includes frame data PS_DATA10 for drawing 1 to 10 frames, control code data PS_DATA11, and a position to be displayed on the liquid crystal display device 41. It stores coordinate data PS_DATA12, pixel calculation data PS_DATA13 such as image deformation, enlargement, reduction and transparency, and enlargement/reduction data PS_DATA14 indicating image enlargement/reduction. Furthermore, sound data PS_DATA 15 indicating the sound emitted from the speaker 17, movable accessory data PS_DATA 16 for moving the movable accessory device 43, and lighting or Lamp data PS_DATA17 for extinguishing the lamp are stored.

The control code data PS_DATA11 stores the address address of the sub-control ROM 800b in which the control table CH_TBL shown in FIG. . That is, the control table CH_TBL stores a plurality of character data CH_DATA, as shown in FIG. 7(c). address data PS_DATA 111 indicating the address address of , image size data PS_DATA 112 indicating the image size, button data PS_DATA 113 indicating the validity/invalidity of the continuous hitting effect of the setting button 15 or the pressing effect of the effect button device 13, and the movable accessory device 43 Movable role product timing data PS_DATA 114 indicating the timing of starting the movement of is stored. As a result, the control code data PS_DATA11 refers to one character data CH_DATA from a plurality of character data CH_DATA stored in the control table CH_TBL shown in FIG. 7(c). The 1-layer data PS_DATA1 stored in the effect scenario data PS_DATA are stored in descending order of priority. Control code data PS_DATA11 is stored such that the data PS_DATA110 shown in FIG. PS_DATA11 is stored.

<Description of VDP>
On the other hand, the VDP 803 that generates image data to be displayed on the liquid crystal display device 41 is configured as shown in FIG.

As shown in FIG. 8, the VDP 803 includes an interface circuit (I/F) 8030 for the DDR2SDRAM 804, an interface circuit (I/F) 8031 for the game ROM 805, and an interface circuit (I/F) for the sub-one-chip microcomputer 800. ) 8032 are incorporated. Further, the VDP 803 includes a system control register 8033 accessed from the sub one-chip microcomputer 800 (sub control CPU 800a) via an interface circuit (I/F) 8032, a command memory 8034 for storing command lists, and a command list. A command parser 8035 for analysis, a CG memory controller 8036 for controlling reading of data in the game ROM 805, a still image decoder 8037 for decoding compressed still image data, a moving image decoder 8038 for decoding compressed moving image data, and a still image decoder. The image decoded (decompressed) by the video decoder 8037 and video decoder 8038 is displayed on the geometry engine 8039 that executes affine transformation such as enlargement, reduction, rotation, movement, projection transformation, etc., the built-in VRAM 8040, and the liquid crystal display device 41. a rendering engine 8041 that generates image data, a DDR2 SDRAM controller 8042 that controls reading of data in the DDR2 SDRAM 804 and writing of data in the DDR2 SDRAM 804, and image data generated by the rendering engine 8041 to the liquid crystal display device 41. and an LVDS transmission unit 8044 for transmitting image data to the liquid crystal display device 41 in LVDS (Low Voltage Differential Signaling) format.

The system control register 8033 includes a register group in which the sub one-chip microcomputer 800 (sub-control CPU 800a) writes instruction data for the VDP 803, and a register in which the sub one-chip microcomputer 800 (sub-control CPU 800a) reads information indicating the operating state of the VDP 803. It is roughly divided into groups. As a result, the sub-one-chip microcomputer 800 (sub-control CPU 800a) appropriately operates the VDP 803 by writing the necessary set values to the predetermined input registers, and by referring to the values of the necessary output registers, the VDP 803 operates. It is possible to grasp the state.

On the other hand, the command memory 8034 stores a command list, which is sent from the sub one-chip microcomputer 800 (sub control CPU 800a) via an interface circuit (I/F) 8032. . More specifically, the sub one-chip microcomputer 800 (sub-control CPU 800a) pre-stores an effect pattern corresponding to the effect control command DI_CMD received by the main control board 60 (main control CPU 600a) in the sub-control ROM 800b. A lottery is determined from a large number of prepared performance patterns, a command list is created based on the determined performance pattern, and is transmitted to a command memory 8034 via an interface circuit (I/F) 8032.例文帳に追加In response to this, the command memory 8034 stores the command list.

On the other hand, the command parser 8035 analyzes the command list stored in the command memory 8034, and by this command list analysis, the drawing operation is executed every frame. That is, the still image decoder 8037 uses the CG memory controller 8036 based on the analysis result of the command list by the command parser 8035 to perform still image decoding from the address address of the game ROM 805 indicated by the address data PS_DATA111 (see FIG. 7(c)). Compressed image data is read, and the read compressed still image data is decoded (decompressed). The decoded still image data is temporarily stored in the built-in VRAM 8040 .

On the other hand, based on the analysis result of the command list by the command parser 8035, the video decoder 8038 uses the CG memory controller 8036 to compress the video from the address of the game ROM 805 indicated by the address data PS_DATA111 (see FIG. 7(c)). Data is read, and the read compressed moving image data is decoded (decompressed). Then, the decoded video data is temporarily stored in the DDR2SDRAM804.

In this way, the decoded (decompressed) still image and moving image (moving image for one frame) are converted into the analysis result of the command list by the command parser 8035, that is, the various data shown in FIG. 7B (frame data PS_DATA10, Based on the coordinate data PS_DATA 12, pixel calculation data PS_DATA 13, scaling data PS_DATA 14), the geometry engine 8039 performs processing such as affine transformation such as scaling, rotation, and movement, and projection transformation. Image data is stored in the built-in VRAM 8040 , and moving image data is stored in the DDR2 SDRAM 804 .

After that, the rendering engine 8041 functions, the moving image data stored in the DDR2SDRAM 804 is read by the DDR2SDRAM controller 8042, and the rendering engine 8041 draws the moving image data. Next, still image data is read out from the built-in VRAM 8040, and the still image data is drawn. As a result, image data to be displayed on the liquid crystal display device 41 is generated by overwriting the moving image data with the still image data. The generated image data is written into the frame buffer area within the DDR2 SDRAM 804 by the DDR2 SDRAM controller 8042 .

Thus, the image data written in the frame buffer area is read out from the DDR2 SDRAM controller 8042 by the display controller 8043 and transmitted to the liquid crystal display device 41 by the LVDS transmission section 8044 . As a result, the image data generated by the rendering engine 8041 is displayed on the liquid crystal display device 41 .

By the way, the image data displayed on the liquid crystal display device 41 is updated every frame. 6. The VSYNC (vertical synchronization signal) shown in FIG. 8 is transmitted as an interrupt signal from the VDP 803 to the sub-control CPU 800a. Thereby, the sub-control CPU 800 a can grasp that the image data for one frame has been displayed on the liquid crystal display device 41 . Note that this VSYNC interrupt signal is generated, for example, every 33 ms.

<Description of power supply board>
By the way, the power supply to each board described above is supplied from the power supply board 130 shown in FIG. The power supply board 130 includes a voltage generating section 1300 , a voltage monitoring section 1310 and a system reset generating section 1320 . The voltage generation unit 1300 receives an AC voltage of 24 V, which is an external power source supplied from a transformation transformer (not shown) installed in an amusement arcade, and generates a plurality of types of DC voltages. Although not shown, it is supplied to each substrate.

In addition, the voltage monitoring unit 1310 monitors the voltage of the AC 24V AC voltage, and when this voltage is interrupted or a power failure occurs and a voltage abnormality is detected, the voltage abnormality signal ALARM is sent to the main control board 60. is output to The voltage abnormality signal ALARM outputs a signal of "L" level when the voltage is abnormal, and outputs a signal of "H" level when it is normal.

On the other hand, the system reset generator 1320 generates a system reset signal RST at power-on, and the generated system reset signal RST is output to each substrate.

<Explanation of relief game and special electric support game>
Next, the relief game and the special electric support game will be specifically described with reference to FIGS. 9 to 14. FIG.

<Description of conventional games>
As shown in FIG. 9(a), in the conventional game, the normal game state (no low-accuracy power support state) shifts to the jackpot game state, and then the game state is changed to a game state with a probability variation or a non-probability variation. becomes. If it shifts to the game state of variable probability, it will shift to the variable probability game state (state with high probability electric support), and a game such as shifting to the jackpot game state will be performed. On the other hand, if it shifts to a non-probable variable winning game state, it shifts to a time-saving game state (state with low probability power support), shifts to a big hit game state, or changes in special symbols a predetermined number of times (for example, 100 times ), a game such as shifting to a normal game state (low-accuracy electric support no state) is performed. In addition, low probability indicates a gaming state in which the jackpot lottery probability is low probability state, high probability indicates a gaming state in which the jackpot lottery probability is in a high probability state, and probability variable gaming state means that the jackpot lottery probability is A game state in which the variation time of special symbols is shortened in a high probability state, and furthermore, the state of power supply is shown, and the time-saving game state is a state in which the jackpot lottery probability is low and the variation of the special symbols is changed. The time is shortened, and further, the game state in which the electric sapo state is shown, and the electric sapo indicates the electric chewing support. Under the electric chew (normal electric accessory) support state, the operating rate (opening time and number of times of opening) of the opening and closing member 45b of the special symbol 2 start port 45 is improved, and the winning rate to the special symbol 2 start port 45 is increased. Since the winning frequency per unit time is increased, the game state is more advantageous to the player than when the electric chew support state is not performed (normal game state).

<Description of Relief Game>
On the other hand, in the relief game, as shown in FIG. 9(b), the normal game state (the state without the low-accuracy electric power support) shifts to the jackpot game state, and then the game state shifts to the game state of the probability variable winning or the non-probability variable winning. It will be done. If it shifts to the game state of variable probability, it will shift to the variable probability game state (state with high probability electric support), and a game such as shifting to the jackpot game state will be performed. On the other hand, if it shifts to a non-variable per gaming state, it shifts to the first time-saving gaming state (state with low certainty power support), transitions to a big hit gaming state, or changes in special symbols a predetermined number of times (for example, 100 times), a game such as shifting to a normal game state (low voltage support no state) is performed.

Thus, the flow of the game explained above is the same as that of the conventional game. In this relief game, the difference from the conventional game is that, as shown in FIG. When it is executed, it shifts to the second time-saving gaming state (state with low-accuracy power support), and then shifts to the jackpot gaming state, or the fluctuation of the special symbol reaches a predetermined number of times (for example, 1000 times). Then, the difference is that a game such as shifting to a normal game state (low-voltage support-free state) is performed.

Thus, by providing such a game, it is possible to add a purpose to the game in addition to the big win, and to reduce the disadvantage to the player due to the long continuation of the state of not winning the big win.

By the way, in the relief game as described above, the following processing is performed in the present embodiment.

That is, as shown in FIG. 9(b), from the non-variable per game state, in the transition to the first time-saving gaming state (with low probability sapo state), to the ending of the jackpot production in the non-variable per game state Then, on the liquid crystal display device 41, a game state notification image after the end of the jackpot effect indicating the first time-saving game state such as "chance time entering 100 times", and the time-saving number of times indicating the maximum number of fluctuations in which the first time-saving game state is maintained. The time-saving rush effect including the notification is executed by the sub-control CPU 800a. However, a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and in shifting to the second time-saving gaming state (low-accuracy power support state), a predetermined number of times (for example, 1000 times) special At the time of fluctuation of the pattern, the sub-control CPU 800a does not execute the time-saving rush effect, and immediately after shifting to the second time-saving gaming state (state with low electric power support), for example, at the time of the 1001st special pattern fluctuation, the liquid crystal A time-saving rush effect such as displaying an image prompting the player to "beat right" on the display device 41 is executed. As a result, the opening/closing member 45b of the special pattern 2 starting port 45 is opened immediately after the player hits to the right, so that the player can enjoy the time-saving game, thereby improving the interest of the player. be able to. In addition, when the second time-saving game state is reached, the special symbol 2, which has the possibility of becoming an advantageous game state for the player compared to the special symbol 1, is changed, so the second time-saving game state ( For example, immediately after transitioning to low-accuracy support state), when the 1001st special pattern changes, the time-saving rush effect takes longer than the deviation fluctuation in the normal game state (low-accuracy support state). It will be executed by the control CPU 800a. As a result, it is possible to store the second start-holding ball and prevent the first start-holding ball from being consumed immediately after entering the second time-saving gaming state. In addition, since the time-saving performance to the second time-saving game state is performed during fluctuation, it is better to shorten the performance time than the time-saving performance to the first time-saving game state and display it simply. At this time, since the production time is short, unlike the time-saving rush production to the first time-saving game state, the second time-saving game state is maintained with only a display indicating the second time-saving game state, such as "help time rush". It is preferable not to display the number of times.

On the other hand, in this embodiment, the average fluctuation time per variation in the deviation fluctuation of the first time-saving gaming state (low-accuracy sapo state) and the deviation fluctuation of the second time-saving gaming state (low-accuracy electricity sapo state) is set to be different from the average fluctuation time per fluctuation in . That is, the number of time reductions in the first time-saving gaming state (with low-accuracy power support) and the number of time-savings in the second time-saving gaming state (with low-accuracy power support) Average variation per variation of the one with the larger number of time reductions set to be short. As a result, it is possible to improve the variation efficiency, thereby improving the interest of the player.

On the other hand, in the first time-saving gaming state (with low-accuracy power support state), before shifting to the normal gaming state after the jackpot production, the player expects whether or not it will be a big hit again. However, compared to the first half of the jackpot production, the selection ratio of reach out is increased. On the other hand, in the second time-saving game state (with low-accuracy power support), the number of fluctuations is greater than in the first time-saving game state, so the selection ratio of reach loss is reduced in the second half of the second time-saving game state. . As a result, it is possible to improve the variation efficiency, thereby improving the interest of the player.

On the other hand, as shown in FIG. 9(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and when shifting to the second time-saving gaming state (low-accuracy power support state), sub-control In the CPU 800a, a time-saving rush effect such as displaying an image prompting the player to "right-hand hit" on the liquid crystal display device 41 is executed. , Even if a special symbol lottery is won and a big hit is achieved, the sub-control CPU 800a displays an image prompting the player to "right hit" on the liquid crystal display device 41. A rush effect is executed first, and the effect changes from the middle. Thus, in this way, when shifting to the second time-saving game state (low-accuracy power support state), if you win a special symbol lottery and win a jackpot, perform a partly common production with the time-saving rush production, If the player hits right at the start of the time-saving performance, it becomes impossible for the player to determine whether the game is a win or a loss, thereby improving the player's interest. That is, when moving to the second time-saving gaming state (low-accuracy power support state), if you win a lottery with a special pattern and win a big hit, you will not perform a time-saving rush effect, but will perform hit fluctuations such as reach, while special If the pattern lottery is not won and the player loses, the player can determine whether the player wins or loses by performing a time-saving rush performance, thereby lowering the player's interest. I will let you. Therefore, in this embodiment, when shifting to the second time-saving gaming state (state with low electric power support), if you win a special symbol lottery and win a jackpot, a time-saving rush effect and a partly common effect will be performed. , Right-handed notification is performed at the start of the time-saving rush production. Also, when shifting to the second time-saving game state (state with low-accuracy power support), the right-handed informing lamp 52c (see FIG. 5) for informing right-handed hitting is lit at the start of the 1001st special symbol variation. At this time, when moving to the second time-saving game state (with low-accuracy power support), if you win a lottery with a special pattern and win a jackpot, the liquid crystal will show that you hit the jackpot with a fanfare effect that starts the jackpot after that. Since the entire liquid crystal of the display device 41 is used for display, there is a case where the right-handed information is temporarily hidden. In this case, by lighting the right-handed notification lamp 52c (see FIG. 5) and continuing the right-handed notification, the right-handed display started by shifting to the second time-saving game state is hidden. Accordingly, the player can continue the right-handed state without hesitation as to whether or not to continue right-handed hitting.

On the other hand, as shown in FIG. 9(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and the power supply is interrupted (power cut), the power is turned on again and the game is resumed. The background image (picture) is made different from the background image (picture) at the time of returning to the game, or part of the lighting of the decoration lamp is made different from the lighting of the decoration lamp at the time of returning to the game. As a result, the hall side can know the gaming machine 1 close to the predetermined number of times (for example, 1000 times), thereby correcting the disadvantage of the hall side. That is, at the end of the business on the previous day, if the power supply is interrupted (power cut) in a state where the special symbol loss variation has been executed, for example, 900 times, the special symbol loss variation will be 100 in the next day's business. When it is executed twice, it will shift to the second time-saving game state (state with low-accuracy power support). Then, the hall side unintentionally provides the player with the second time-saving game state by executing the relief game for the number of fluctuations in the previous day across the day, and thus the hall side suffers a disadvantage. becomes. Therefore, in the present embodiment, the hall side is notified of the gaming machine 1 that is close to the predetermined number of times (for example, 1000 times). As a result, the employee on the hall side can take measures such as pressing the RAM clear switch 620 to clear the main control RAM 600c that holds the number of fluctuations in the number of deviations of the special symbols. Disadvantages can be rectified.

On the other hand, as shown in FIG. 9(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and the power supply is interrupted (power cut), when the power is turned on again to return to the game, the sub-control CPU 800a determines the predetermined number of times (for example, 1000 times) in the fluctuation of the special symbol in the first rotation after returning to the game. To execute an effect according to the remaining number of times up to. As a result, the player can keep the number of times of special symbol winning fluctuations at the end of the previous day's business, or the RAM clear switch 620 is pressed, and the main control RAM 600c holding the number of special symbol losing fluctuations is cleared. It is possible to guess whether the state is cleared, and thus the player's desire to continue the game can be improved.

On the other hand, in the normal game state (state without low-accuracy power support) as shown in FIG. A warning is issued by, for example, displaying an image prompting the However, as shown in FIG. 9(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and when shifting to the second time-saving gaming state (low-accuracy power support state), the second When the player hits to the right due to the variation of the special symbols before shifting to the time-saving game state (state with low-accuracy power support), the above warning is not given. As a result, it is possible to prevent a situation in which the interest of a player who knows the number of times until transition to the second time-saving game state (state with low-accuracy power support) shown in FIG. 9(b) is reduced.

<Explanation of the game with the special electric sapo pattern>
Next, the game of the special electric sapo symbol will be described with reference to FIG. 9(c).

In the game of the special electric sapo symbol, as shown in FIG. 9(c), the normal game state (the state without the low electric power sapo) shifts to the jackpot game state, and then the game state of the probability variable winning or the non-variable winning. will move to If it shifts to the game state of variable probability, it will shift to the variable probability game state (state with high probability electric support), and a game such as shifting to the jackpot game state will be performed. On the other hand, if it shifts to a non-variable per gaming state, it shifts to the first time-saving gaming state (state with low certainty power support), transitions to a big hit gaming state, or changes in special symbols a predetermined number of times (for example, 100 times), a game such as shifting to a normal game state (low voltage support no state) is performed.

Thus, the flow of the game explained above is the same as that of the conventional game. In this special electric sapo symbol game, the difference from the conventional game is that, as shown in FIG. When winning, it shifts to the second time-saving gaming state (state with low-accuracy power support), and then shifts to the jackpot gaming state, or when the fluctuation of the special symbol reaches a predetermined number of times (for example, 100 times or more). The difference is that a game such as shifting to a normal game state (low voltage support no state) is performed.

Thus, by providing such a game, it is possible to add a purpose to the game in addition to the big win, and to reduce the disadvantage to the player due to the long continuation of the state of not winning the big win.

Thus, in the game of the special electric support symbol as described above, the following processing is performed in the present embodiment.

Figure 9 (c), or the first time-saving state shown in Figure 9 (b) from the state (with low-accuracy electric support) to a predetermined number of times (for example, 100 times), the normal game state (low-accuracy When returning to the state without electric support), the sub-control CPU 800a displays the result effect on the liquid crystal display device 41 at the final change (for example, 100th time) of a predetermined number of times (for example, 100th time). ○○○point, etc.). However, the variation of the special symbol reaches a predetermined number of times (for example, 100 times or more) from the second time-saving game state (state with low-accuracy electric support) shown in FIG. ), or when the variation of the special symbol reaches a predetermined number of times (for example, 1000 times) from the second time-saving game state (state with low probability power support) shown in FIG. When returning to the state without electric support, the sub-control CPU 800a controls the liquid crystal display device 41 so that the result effect is not displayed in the final variation of the predetermined number of times. This makes it possible to provide the player with appropriate information. That is, in the second time-saving gaming state (state with low-accuracy power support) shown in FIG. 9(c) or the second time-saving gaming state (state with low-accuracy power support) shown in FIG. Since it is not passed through, there is no information that the player can obtain even if the result effect is displayed on the liquid crystal display device 41 . Therefore, as shown in the present embodiment, even in the same time-saving game state, by making the effects different depending on the timing of entry, appropriate information can be provided to the player.

By the way, in determining whether or not to carry out the above-described result effect, a table as shown in FIGS. 10 to 12 is used. This point will be described in detail below.

The table TBL shown in FIG. 10(a) is stored in the main control ROM 600b, and stores a variation pattern table designation code corresponding to each game state and a variation pattern table to be referred to. The variation pattern table specification code is data for referring to the variation pattern table managed on the program.

Specifically, in the table TBL shown in FIG. 10(a), "00H" is selected as the variation pattern table designation command in the normal game state, and NOR_TBL is used as the variation pattern table to be referred to. becomes. Also, in the first time-saving gaming state shown in FIG. 9(b) or the first time-saving gaming state shown in FIG. "01H" is selected, and JT1_TBL1 is used as the variation pattern table to be referred to. Then, in the first time-saving game state shown in FIG. 9(b) or the first time-saving game state shown in FIG. "02H" is selected, JT1_TBL2 is used as the variation pattern table to be referred to, and "03H" is selected as the variation pattern table specification command in the 100th rotation special symbol variation, and as the variation pattern table to be referred to , JT1_TBL3 will be used.

On the other hand, in the second time-saving game state shown in FIG. 9(b) or the second time-saving game state shown in FIG. ” is selected, and JT2_TBL1 is used as the variation pattern table to be referred to. Then, in the second time-saving game state shown in FIG. 9(b) or the second time-saving game state shown in FIG. "05H" is selected, JT2_TBL2 is used as the reference variation pattern table, and "06H" is selected as the variation pattern table specification command in the variation of the special symbol of the 101st to the final rotation, and the variation pattern to be referred to As a table, JT2_TBL3 will be used.

On the other hand, in the variable probability gaming state shown in FIG. 9(b) or in the variable probability gaming state shown in FIG. 9(c), "07H" is selected as the variation pattern table specification command, and HI_TBL will be selected. Note that HI_TBL is not illustrated and will not be described.

By the way, the variation pattern table NOR_TBL referred to in the normal game state is as shown in FIG. 10(b). Specifically, if the lottery for the special symbol is not won and the number of the first start holding ball or the second start holding ball is "0", the normal fluctuation 12 seconds is selected with the probability shown. , Normal reach loss (20 seconds) is selected with the probability shown, and SP reach loss (50 seconds) is selected with the probability shown. Then, when the number of the first start holding ball or the second start holding ball is "1", the normal fluctuation of 8 seconds is selected with the probability shown in the figure, and the normal reach deviation (20 seconds) is selected with the probability shown in the figure. SP reach out (50 seconds) will be selected with a probability of . Furthermore, when the number of the first start holding ball or the second start holding ball is "2", the normal fluctuation 5 seconds is selected with the probability shown, and the normal reach deviation (20 seconds) is selected with the probability shown, With the probability shown in the figure, SP reach miss (50 seconds) will be selected. Furthermore, when the number of the first start holding ball or the second start holding ball is "3", the normal fluctuation of 3 seconds is selected with the probability shown, and the normal reach deviation (20 seconds) is selected with the probability shown, With the probability shown in the figure, SP reach miss (50 seconds) will be selected.

On the other hand, as shown in FIG. 10(b), in the special symbol lottery, if the special electric sapo symbol small hit A or the special electric sapo symbol small hit B is won, the normal reach is lost with the probability shown. + time-saving rush production (25 seconds) is selected, SP reach off + time-saving rush production (55 seconds) is selected with the probability shown. Thus, when the special electric sapo symbol is won, a series of variation patterns are selected in which the time-saving entry performance is performed after performing the losing performance during the variation of the special symbol.

On the other hand, as shown in FIG. 10(b), when a small hit C is won in a special symbol lottery, normal reach out (20 seconds) is selected. At this time, during the small winning operation, the sub-control CPU 800a executes the small winning effect.

On the other hand, as shown in FIG. 10 (b), if you win the special symbol lottery and win the probability variation, the probability shown in the figure, per normal reach (30 seconds) is selected, the probability shown in the figure, per SP reach (60 seconds) will be selected, and with the probability shown, (100 seconds) will be selected per full rotation variation.

On the other hand, as shown in FIG. 10(b), if you win the special symbol lottery and win the non-variable per, with the probability shown, per normal reach (30 seconds) is selected, with the probability shown, SP Per reach (60 seconds) will be selected.

Next, the variation pattern table JT1_TBL1 referred to in the variations of the special symbols of the 1st to 79th rotations in the first time-saving gaming state is as shown in FIG. 11(a). Specifically, if the lottery for the special symbol 1 is not won and the number of the first start holding balls is "0" to "3", the normal variation of 12 seconds is selected. Then, if the lottery for the special pattern 2 is not won and the number of the second start holding balls is "0", the normal fluctuation 5 seconds is selected with the probability shown, and the normal reach is lost with the probability shown. (20 seconds) is selected, and SP reach out (50 seconds) is selected with the probability shown. In addition, if the lottery for the special pattern 2 is not won and the number of the second start holding balls is "1" to "3", the normal fluctuation of 3 seconds is selected with the probability shown, and the probability shown is shown. , the loss of normal reach (20 seconds) is selected, and the loss of SP reach (50 seconds) is selected with the probability shown.

On the other hand, as shown in FIG. 11(a), in the special symbol lottery, when the small hit A of the special electric support symbol is won, the normal variation of 3 seconds is selected.

By the way, when the small hit and the special electric support symbol are used together, the processing as shown in FIG. 14 is performed. That is, when a small hit A is won with a probability of 1/200, it is also used as a special electric sapo symbol, and after the small hit, 1000 times are given as the number of times of time reduction. Then, when a small win A of the special electric support symbol is won during the time saving game, 1000 times are not reset as the number of times of time saving. On the other hand, if a small win B is won with a probability of 100/200, it is also used as a special electric sapo symbol, and after the small win, 100 times are given as the number of times of time reduction. Then, when a small hit B of the special electric support symbol is won during the time saving game, 100 times are not reset as the number of times of time saving. On the other hand, when the small hit C is won with a probability of 99/200, it is not used as a special electric sapo symbol. In this way, if the small hit and the special electric sapo symbol are used together, it is possible to provide a new game property such as whether or not the time reduction is given after the small hit. It can improve the interest of the person.

Thus, even if the small hit A of the special electric support symbol is won during the time saving game, since the time saving is not added again, as shown in FIG. When the small hit A of the electric sapo symbol is won, the normal fluctuation of 3 seconds, which is the same fluctuation pattern as the normal fluctuation loss, is selected.

On the other hand, as shown in FIG. 11(a), in the special pattern lottery, when the special electric sapo pattern small hit B is won, the probability shown in the figure is that the normal reach is lost + the time reduction rush effect (25 seconds) is selected. , With the probability shown, the SP reach out + time saving rush effect (55 seconds) is selected. Thus, when winning the small hit B of the special electric sapo symbol during the time saving game, as shown in FIG. It will be done. It should be noted that the time-saving rush effect is switched according to each game state so that the sub-control CPU 800a performs a time-saving number of times reset effect.

On the other hand, as shown in FIG. 11(a), when a small win C is won in the special symbol lottery, the normal variation (3 seconds) is selected.

On the other hand, as shown in FIG. 11 (a), if you win the special symbol lottery and win the probability variation, the probability shown in the figure, per normal reach (30 seconds) is selected, the probability shown in the figure, per SP reach (60 seconds) will be selected, with the probability shown, per full rotation variation (100 seconds) will be selected, and with the probability shown, per burst (10 seconds) will be selected.

On the other hand, as shown in FIG. 11 (a), if you win the special symbol lottery and win the non-variable per, with the probability shown, per normal reach (30 seconds) is selected, with the probability shown, SP Per reach (60 seconds) will be selected.

Next, the variation pattern table JT1_TBL2 referred to in the variations of the special symbols on the 80th to 99th rotations in the first time-saving gaming state is as shown in FIG. 11(b). Specifically, if the lottery for the special symbol 1 is not won and the number of the first start holding balls is "0" to "3", the normal variation of 12 seconds is selected. Then, if the lottery for the special pattern 2 is not won and the number of the second start holding balls is "0", the normal fluctuation 5 seconds is selected with the probability shown, and the normal reach is lost with the probability shown. (20 seconds) is selected, and SP reach out (50 seconds) is selected with the probability shown. In addition, if the lottery for the special pattern 2 is not won and the number of the second start holding balls is "1" to "3", the normal fluctuation of 3 seconds is selected with the probability shown, and the probability shown is shown. , the loss of normal reach (20 seconds) is selected, and the loss of SP reach (50 seconds) is selected with the probability shown.

Thus, as shown in FIG. 11(b), in the variation of the special symbols on the 80th to 99th rotations nearing the end of the first time-saving game state, the selection ratio of reach (normal reach, SP reach) is increased. ing. As a result, it is possible to give the player a sense of anticipation that he might win.

On the other hand, as shown in FIG. 11(b), in the special symbol lottery, when the small hit A of the special electric sapo symbol is won, the normal variation of 3 seconds is selected. Also, as shown in FIG. 11(b), in the special design lottery, when the special electric sapo design small hit B is won, the probability shown is that the normal reach is lost + the time reduction rush effect (25 seconds) is selected. , With the probability shown, the SP reach out + time saving rush effect (55 seconds) is selected.

On the other hand, as shown in FIG. 11(b), when a small win C is won in the special symbol lottery, the normal variation (3 seconds) is selected.

On the other hand, as shown in FIG. 11 (b), if you win the special symbol lottery and win the probability variation, the probability shown in the figure, per normal reach (30 seconds) is selected, the probability shown in the figure, per SP reach (60 seconds) will be selected, with the probability shown, per full rotation variation (100 seconds) will be selected, and with the probability shown, per burst (10 seconds) will be selected.

On the other hand, as shown in FIG. 11(b), if you win the special symbol lottery and win the non-probable variation, the probability shown is that normal reach (30 seconds) is selected, and the probability shown is SP. Per reach (60 seconds) will be selected.

Next, the variation pattern table JT1_TBL3 referred to in the variation of the 100th special symbol in the first time-saving gaming state is as shown in FIG. 12(a). Specifically, if you do not win the special symbol lottery and lose, and the number of the first start retention ball or the second start retention ball is "0" to "3", the result effect of losing (30 seconds) will be selected.

On the other hand, in the special symbol lottery, when the special electric sapo symbol small hit A is won, the losing result performance (30 seconds) is selected. Therefore, even if a small hit of the special electric support symbol is won during the time saving game, as shown in FIG. 14, the time saving is not added again. When the small winning A is won, the result performance of the loss, which is the same variation pattern as the normal variation, is selected.

In addition, as shown in FIG. 12(a), when a special symbol lottery wins a small hit B of a special electric sapo symbol, a re-set effect (80 seconds) is selected from the result effect. becomes. Thus, when winning the small hit B of the special electric support symbol during the time saving game, as shown in FIG. A pattern will be selected.

On the other hand, as shown in FIG. 12(a), if a small win C is won in a special symbol lottery, a losing result effect (30 seconds) is selected.

On the other hand, as shown in FIG. 12 (a), if you win the special symbol lottery and win the probability variable winning, or if you win the non-variable winning, a series of variation patterns (100 seconds) will be selected.

Next, the variation pattern table JT2_TBL1 referred to in the variation of the special symbols for the first rotation in the second time-saving gaming state is as shown in FIG. 12(b). Specifically, as shown in FIG. 12(b), if the lottery for the special symbol is not won and the number of the first start retention ball or the second start retention ball is "0" to "3" In this case, the rush effect (12 seconds) is selected.

On the other hand, as shown in FIG. 12(b), in the special symbol lottery, when the small winning A and the small winning C of the special electric sapo symbol are won, the rush effect (12 seconds) is selected. Become. Then, when a small hit B of the special electric sapo symbol is won, a series of variation patterns (80 seconds) are selected for resetting performance from rush performance.

On the other hand, as shown in FIG. 12(b), if you win a special symbol lottery and win a definite variable hit, or if you win a non-variable hit, a series of variation patterns (100 seconds) will be selected.

Next, the variation pattern table JT2_TBL2 referred to in the variations of the special symbols on the 2nd to 100th rotations in the second time-saving gaming state is as shown in FIG. 12(c). Specifically, if the lottery for the special symbol 1 is not won and the number of the first start holding balls is "0" to "3", the normal variation of 5 seconds is selected. Then, if the lottery for the special symbol 2 is not won and the number of the second start holding balls is "0" to "3", the normal fluctuation of 1.5 seconds is selected with the probability shown. Normal reach loss (20 seconds) is selected with a probability of , and SP reach loss (50 seconds) is selected with the probability shown.

On the other hand, as shown in FIG. 12(c), in the special symbol lottery, when the special electric support symbol small hit A or small win C is won, the normal fluctuation of 1.5 seconds is selected. Become.

On the other hand, as shown in FIG. 12(c), in the special pattern lottery, if the special electric sapo pattern small hit B is won, the normal reach loss + time reduction rush effect (25 seconds) is selected with the probability shown. Then, with the probability shown, SP reach out + time saving rush effect (55 seconds) is selected.

On the other hand, as shown in FIG. 12(c), if you win the special symbol lottery and win the probability variation, or if you win the non-variability per, the normal reach per (30 seconds) is selected with the probability shown. , and with the probability shown, a sudden hit (10 seconds) will be selected.

Next, the variation pattern table JT2_TBL3 referred to in the variations of the special symbols of the 101st to the final rotation in the second time-saving gaming state is as shown in FIG. Specifically, if the lottery for the special symbol 1 is not won and the number of the first start holding balls is "0" to "3", the normal variation of 5 seconds is selected. Then, if the lottery for the special symbol 2 is not won and the number of the second start holding balls is "0" to "3", the normal fluctuation of 1.5 seconds is selected with the probability shown. With a probability of , normal reach deviation (20 seconds) is selected.

On the other hand, as shown in FIG. 13, in the special symbol lottery, when the small winning A or the small winning C of the special electric support symbol is won, the normal variation of 1.5 seconds is selected.

On the other hand, as shown in FIG. 13, in the special pattern lottery, when the special electric sapo pattern small hit B is won, the normal reach loss + time saving rush effect (25 seconds) is selected with the probability shown. With a probability of , SP reach out + time saving rush effect (55 seconds) is selected.

On the other hand, as shown in FIG. 13, if you win the lottery of special symbols, if you win the probability variation, or if you win the non-variability per, with the probability shown, per normal reach (30 seconds) is selected, shown With a probability of , the sudden hit (10 seconds) will be selected.

Thus, using such a variation pattern table, it is determined whether or not the result effect is performed. Thus, in the first time-saving game state, when the first time-saving game state ends, the variation pattern table JT1_TBL3 shown in FIG. 12 (a) is selected, and before the end, shown in FIG. The variation pattern table JT1_TBL2 is selected, and thus a different variation pattern table is selected. On the other hand, in the second time-saving gaming state, when the second time-saving gaming state ends at the 100th rotation, or ends at 1000 rotations, and even before it ends, the variation pattern table JT2_TBL2 shown in FIG. 12 (c) is selected, or the variation pattern table JT2_TBL3 shown in FIG. 13 is selected, thereby selecting the same variation pattern table. As a result, it is possible to select whether or not the result effect is to be performed, thereby providing appropriate information to the player.

By the way, as shown in FIG. 9(b), a predetermined number of times (for example, 1000 times) the special symbol loss variation is executed, and the second time-saving gaming state (state with low-accuracy power support) is triggered by a predetermined The number of times may be any number, but it is preferable to set the number of times equal to or less than the number obtained by multiplying the denominator of the jackpot probability by three. In this way, if the number of times less than or equal to the tripled denominator of the probability of a big win is made, there are many cases where the big win occurs before the number of times equal to or less than the tripled number, and even if the big win does not occur before this number of times, the game is played. It is possible to prevent the player from forcibly continuing the game aiming at the second time-saving game state (state with low power supply support) shown in FIG. 9(b).

Also, when shifting to the second time-saving gaming state (state with low-accuracy power support) shown in FIG. It is preferable to set the number of times to be less than or equal to the number. In this way, if the number of times equal to or less than the number obtained by multiplying the denominator of the probability of a big win by four, there is a possibility that the number of times equal to or less than the quadrupled number will inevitably result in a big win once, so the game is continued. A privilege can be given to a player.

By the way, when the number of times of time saving is given in this way (the number of times of time saving exceeding the denominator of the jackpot probability), the current number of times of time saving is not displayed on the liquid crystal display device 41 until the predetermined number of times is reached, or A fixed number of times such as 100 times is displayed on the liquid crystal display device 41 . More specifically, every time the number of times of working hours changes, the main control board 60 (main control CPU 600a) transmits a number of times of working hours command indicating the number of times of working hours saving. Then, the sub-control CPU 800a receives the time saving command. At this time, even if the sub-control CPU 800a receives a time saving count command indicating the number of time saving times, the sub-control CPU 800a controls not to display the current number of time saving times on the liquid crystal display device 41 until the number of time saving times is equal to or less than the predetermined number of time saving times. Control is performed so that a fixed number of times such as times is displayed on the liquid crystal display device 41 . Then, when the predetermined number of times of time saving has been reached, the sub-control CPU 800a controls the liquid crystal display device 41 to display the number of times of working hours information based on the received number of times of working hours command indicating the number of times of working hours saving. Thus, by doing so, it is possible to improve the interest of the player. That is, in the case of a large number of times of time saving (the number of times of saving time exceeding the denominator of the jackpot probability), if the time saving state continues until the next jackpot is won, the number of times of saving time is displayed and counted down. Therefore, the player's interest is lowered. On the other hand, when the remaining number of times reaches a predetermined number such as 100 times, it is better to notify the player that the time-saving game may end. It is possible to prevent a situation in which a time-saving game ends without the player's knowledge. Thus, according to this embodiment, the interest of the player can be improved.

By the way, in the present embodiment, an example in which the relief game and the game with the special electric support symbol are described separately has been shown, but the game is not limited to this, and a game having both games may be performed.

<Description of serial communication>
Next, serial communication will be specifically described with reference to FIGS. 15 to 24. FIG.

<Main control board: Description of one-chip microcomputer>
The one-chip microcomputer 600 shown in FIG. 6 has a configuration as shown in FIG. 15 when explained in detail. That is, as described above, the one-chip microcomputer 600 includes a main control CPU 600a, a main control ROM 600b storing a game program describing a series of game control procedures, and a main control ROM 600b that functions as a work area, a buffer memory, and the like. A control RAM 600c is mainly incorporated, and a clock generation circuit 640 is also incorporated. This clock generation circuit 640 divides an external clock (not shown) to generate a clock used inside the one-chip microcomputer 600 .

15, the one-chip microcomputer 600 incorporates a reset controller 641. The reset controller 641 generates a system reset signal generated by the system reset generator 1320 (see FIG. 6). RST and a reset signal such as an abnormal reset signal generated by a WDT (watchdog timer) 643, which will be described later, are controlled.

Furthermore, as shown in FIG. 15, the one-chip microcomputer 600 incorporates an interrupt controller 642. This interrupt controller 642 outputs a timer interrupt signal generated by a CTC (Counter Timer Circuit) 644, which will be described later. control.

Further, the one-chip microcomputer 600 includes a WDT (watchdog timer) 643 as shown in FIG. It is something to do. This abnormal reset signal is input to the reset controller 641 to reset the inside of the one-chip microcomputer 600 . Therefore, an asynchronous serial communication circuit (CH0) 646, an asynchronous serial communication circuit (CH1) 647, and a synchronous serial communication circuit 648, which will be described later, are also reset.

On the other hand, the one-chip microcomputer 600 incorporates a CTC (Counter Timer Circuit) 644 as shown in FIG. It is generated. This timer interrupt signal is output to the interrupt controller 642 described above.

In addition, as shown in FIG. 15, the one-chip microcomputer 600 has a built-in random number circuit 645, which generates hardware random numbers used for random number lottery for special symbols.

Furthermore, the one-chip microcomputer 600 incorporates an asynchronous serial communication circuit (CH0) 646 and an asynchronous serial communication circuit (CH1) 647 to enable serial communication. The asynchronous serial communication circuit (CH0) 646 indicates that it is a channel 0 asynchronous serial communication circuit, and the asynchronous serial communication circuit (CH1) 647 indicates that it is a channel 1 asynchronous serial communication circuit. Therefore, the internal structure is the same. The following description is based on the assumption that the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 have the same internal structure.

The asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 respectively incorporate the reception prescaler registers RXPRE shown in FIG. However, since they have the same internal structure, they are shown as one receive prescaler register RXPRE in this embodiment). This receive prescaler register RXPRE consists of 16 bits, as shown in FIG. The 13th bit is unused, the 14th bit consists of a parity setting register RPEN that can set the presence or absence of parity, and the most significant bit (15th bit) sets odd parity or even parity. It consists of a parity odd/even setting register REVEN.

This reception baud rate setting register RPR has an initial value of 0000h, is a register that can read and write values, and can set a reception baud rate from 0000h to 1FFFh. The reception baud rate (bps) is calculated by internal clock (clock generated by clock generation circuit 640 shown in FIG. 15) frequency/(reception baud rate setting register RPR×32). Specifically, for example, if the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) frequency is 20 MHz and 01F4h (=500) is set in the reception baud rate setting register RPR, then the reception baud rate ( bps) is calculated by 20 (MHz)/(500×32), resulting in 1,250 (bps). Note that when 0000h is set in the reception baud rate setting register RPR, calculation is performed assuming that 0001h is set in the reception baud rate setting register RPR.

On the other hand, the parity presence/absence setting register RPEN has an initial value of 0, and the value can be read and written. When 0 is set, no parity is set, and when 1 is set, parity is set. The parity odd/even setting register REVEN has an initial value of 0 and can read and write values. When 0 is set, even parity is set, and when 1 is set, odd parity is set.

On the other hand, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 further incorporate a receive buffer register RXBUF shown in FIG. 16(b). This reception buffer register RXBUF has an initial value of 00h, can only read the value, and can store data from 00h to FFh.

Thus, in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647, data is set in the reception baud rate setting register RPR so as to be the same as the transmission speed of the transmitted data, and the parity is set. When 0 is set in the presence/absence setting register RPEN, the data shown in FIG. 18(a) can be received. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 set the "L" level start bit length, the 8-bit data length, and the "H" level stop bit length to one frame ( (See timing T10 section). Then, this 8-bit length data is stored in the reception buffer register RXBUF.

On the other hand, in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647, data is set in the reception baud rate setting register RPR so as to be the same as the transmission speed of the transmitted data, and parity is set. When 1 is set in the presence/absence setting register RPEN, the data shown in FIG. 18(b) can be received. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 each have a start bit length of "L" level, data of 8-bit length, parity bit, and stop bit length of "H" level. Data having a communication format of one frame (see timing T11) can be received. Then, this 8-bit length data is stored in the reception buffer register RXBUF. If the parity bit on the transmission side is set to even parity, 0 is set in the parity odd/even setting register REVEN, and if the parity bit is set to odd parity, 1 is set to the parity odd/even setting register REVEN. It will happen.

By the way, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 further incorporate a transmission prescaler register TXPRE shown in FIG. , as shown in FIG. 17(a), consists of 16 bits, the least significant bit (0th bit) to the 12th bit is composed of a transmission baud rate setting register TPR in which a transmission baud rate can be set, and the 13th bit is , is unused. The 14th bit is composed of a parity presence/absence setting register TPEN which can set the presence or absence of parity, and the most significant bit (15th bit) is a parity odd/even setting register TEVEN which can set odd parity or even parity. consists of

This transmission baud rate setting register TPR has an initial value of 0000h, can read and write values, and can set a transmission baud rate from 0000h to 1FFFh. The transmission baud rate (bps) is calculated by the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) frequency/(transmission baud rate setting register TPR×32), and is calculated in the same manner as the reception baud rate (bps). be.

On the other hand, the parity presence/absence setting register TPEN has an initial value of 0, and the value can be read and written. When 0 is set, no parity is set, and when 1 is set, parity is set. The parity odd/even setting register TEVEN has an initial value of 0 and can read and write values. When 0 is set, even parity is set, and when 1 is set, odd parity is set.

Furthermore, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 incorporate a transmission buffer register TXBUF shown in FIG. The value is 00h, and only the value can be written, and data from 00h to FFh can be stored.

Thus, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 are configured as shown in FIG. The data shown in (a) can be transmitted. That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 set the "L" level start bit length, the 8-bit data length, and the "H" level stop bit length to one frame ( (See timing T10 section). This 8-bit length data is data stored in the transmission buffer register TXBUF.

On the other hand, when 1 is set in the parity presence/absence setting register TPEN, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 can transmit the data shown in FIG. 18(b). . That is, the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 each have a start bit length of "L" level, data of 8-bit length, parity bit, and stop bit length of "H" level. It is possible to transmit data in a communication format of one frame (see timing T11). This 8-bit data is the data stored in the transmission buffer register TXBUF. The parity bit is even parity if 0 is set in the parity odd/even setting register REVEN, and 1 is set in the parity odd/even setting register REVEN. is set, it is odd parity.

By the way, as shown in FIG. 15, the one-chip microcomputer 600 incorporates a synchronous serial communication circuit 648 to enable serial communication. The synchronous serial communication circuit 648 incorporates a communication setting register SPIFM shown in FIG. 19(a). As shown in FIG. 19(a), this communication setting register SPIFM consists of 8 bits. It is composed of a frequency ratio setting register CLK, and the most significant bit (seventh bit) to the fourth bit is composed of a data length setting register LENG in which the data length can be set.

The initial value of this synchronous clock division ratio setting register CLK is 00h, and the value can be read and written. /2 and 02h is set, the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) is divided by 4 and . . . 09h is set. Then, the internal clock (the clock generated by the clock generation circuit 640 shown in FIG. 15) is divided by 1/512, and when 0Ah is set, the internal clock (generated by the clock generation circuit 640 shown in FIG. clock) is divided by 1/1024.

That is, the frequency-divided clock frequency-divided according to the value set in the synchronous clock division ratio setting register CLK is synchronized from the synchronous clock 649 incorporated in the one-chip microcomputer 600, as shown in FIG. It is input to the serial communication circuit 648 and output from the synchronous serial communication circuit 648 together with the transmission data. If a value other than 01h to 0Ah is set in the synchronous clock dividing ratio setting register CLK, the synchronous clock 649 will not output the clock.

On the other hand, the data length setting register LENG can set the format of the communication data. . . , 08h, the data length is set to 8 bits.

On the other hand, the synchronous serial communication circuit 648 further incorporates a transmission data register TRBUF shown in FIG. 19(b). This transmission data register TRBUF has an initial value of 00h, can only be written to, and can store data from 00h to FFh. The data stored in the transmission data register TRBUF is transferred to a transmission shift register (not shown) and output in synchronization with the frequency-divided clock output from the synchronization clock 649 .

On the other hand, the synchronous serial communication circuit 648 further incorporates a reception data register REBUF shown in FIG. 19(c). This reception data register REBUF has an initial value of 00h, can only read the value, and can store data from 00h to FFh. When synchronous serial data is received, the received data is stored in the reception data register REBUF. Data is stored in this reception data register REBUF in synchronization with the frequency-divided clock transmitted from the transmission side.

On the other hand, the synchronous serial communication circuit 648 further incorporates a transmission/reception status register SPIST shown in FIG. 19(d). As shown in FIG. 19(d), this transmission/reception status register SPIST can only be read, and consists of 8 bits. SPTMT, the first bit is composed of a transmission shift register flag register TRSHF indicating whether or not the data to be transmitted has been transferred to a transmission shift register (not shown), and the second bit is shown in FIG. 19(b). The third bit indicates whether or not data is stored in the transmission data register TRBUF shown in FIG. 19(c). The 4th bit to the most significant bit (7th bit) are not used.

This transmitting flag register SPTMT is set to "1" when data is being transmitted, and is set to "0" when data is not being transmitted.

On the other hand, the transmission shift register flag register TRSHF is set to "0" when the data to be transmitted has not been transferred to the transmission shift register (not shown), and indicates that the data to be transmitted has been transferred to the transmission shift register (not shown). In this case, "1" is set.

On the other hand, the transmission register flag register TRREF is set to "0" when no data is stored in the transmission data register TRBUF shown in FIG. 19(b). If data is stored in TRBUF, "1" is set.

On the other hand, the reception register flag register REREF is set to "0" when no data is stored in the reception data register REBUF shown in FIG. 19(c). If data is stored in REBUF, "1" is set.

Thus, the one-chip microcomputer 600 configured as described above uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. , the asynchronous serial communication circuit (CH1) 647 is used to transmit predetermined data to the sub-control board 80 by serial transmission. Although the synchronous serial communication circuit 648 is not used in this embodiment, it may be used to serially transmit predetermined data to the payout/launch control board 70 or the sub control board 80 .

<Payment/launch control board: Description of payout control one-chip microcomputer>
Here, the payout/launch control board 70 will be described in detail with reference to FIG. Since the sub-control board 80 is equipped with a serial communication circuit similar to that of the payout/launch control board 70, description thereof will be omitted. Also, the same components as those of the one-chip microcomputer 600 shown in FIG.

As shown in FIG. 20, the payout/launch control board 70 includes a payout control CPU 700a, a payout control ROM 700b storing a payout program describing a series of payout control procedures, and a payout control ROM 700b that functions as a work area, buffer memory, and the like. A payout control one-chip microcomputer 700 mainly composed of a RAM 700c is mounted. This payout control one-chip microcomputer 700 further includes an external bus interface 701, which controls the direction of an address bus, data bus, and control signals.

As shown in FIG. 20, the payout control one-chip microcomputer 700 has a built-in clock circuit 702. This clock circuit 702 divides an external clock (not shown) to It generates the clocks used inside the computer 700 . The synchronous clock 649 shown in FIG. 20 divides the clock used inside the payout control one-chip microcomputer 700 .

Furthermore, as shown in FIG. 20, the payout control one-chip microcomputer 700 incorporates a reset controller 703, in which a WDT (watchdog timer) 703a is incorporated. The WDT 703a detects a program abnormality due to noise or the like and generates an abnormality reset signal. The reset controller 703 controls reset signals such as the system reset signal RST generated by the system reset generator 1320 (see FIG. 6) and the abnormal reset signal generated by the WDT (watchdog timer) 703a. is.

On the other hand, the payout control one-chip microcomputer 700 has a built-in CTC (Counter Timer Circuit) 704 as shown in FIG. It generates a signal. This timer interrupt signal is output to the interrupt controller 705, which will be described later.

In addition, the payout control one-chip microcomputer 700, as shown in FIG. 20, has a built-in interrupt controller 705, the timer interrupt signal generated by the CTC704, as well as the asynchronous serial communication circuit 706 to be described later It controls interrupt signals.

On the other hand, as shown in FIG. 20, the payout control one-chip microcomputer 700 incorporates an asynchronous serial communication circuit 706 to enable serial communication. This asynchronous serial communication circuit 706 incorporates a serial communication baud rate setting register SCBR shown in FIG. This register can be set up to FFFh. The baud rate (bps) is calculated by internal clock (clock generated by clock circuit 702 shown in FIG. 20) frequency/(serial communication baud rate setting register SCBR×16). Specifically, for example, if the internal clock (clock generated by the clock circuit 702 shown in FIG. 20) has a frequency of 15 MHz and 0BCh (=188) is set in the serial communication baud rate setting register SCBR, the baud rate (bps ) is 15 (MHz)/(188×16)=4986.7 (bps). Although the baud rate setting explained in the one-chip microcomputer 600 has shown an example in which the reception baud rate and the transmission baud rate can be set separately, this baud rate is common to both transmission and reception. Further, when 000h is set in the serial communication baud rate setting register SCBR, calculation is performed assuming that 001h is set in the serial communication baud rate setting register SCBR.

Further, the asynchronous serial communication circuit 706 incorporates a serial communication setting register SCFM shown in FIG. 21(b). As shown in FIG. 21(b), this serial communication setting register SCFM consists of 8 bits. The second bit is composed of a parity function setting register PEN that can set whether or not to use the parity function, the second bit is composed of a data length setting register FMT that can set the data length, and the third bit is the operation. It consists of an operation mode setting register MOD that can set the mode, the 4th and 5th bits are unused, and the 6th bit consists of a reception function setting register REN that can set whether or not to use the reception function. The bit (7th bit) consists of a transmission function setting register TEN which can set whether or not to use the transmission function.

As shown in FIG. 21(b), the parity type setting register PTP has an initial value of 0 and can read and write values. When 0 is set, even parity is set, and when 1 is set, odd parity is set to The parity function setting register PEN has an initial value of 1 and can read and write values. When 0 is set, parity is not used, and when 1 is set, parity is used.

On the other hand, as shown in FIG. 21(b), the data length setting register FMT has an initial value of 1 and can read and write values. data, the communication format is such that the stop bit length of "H" level is 1 frame (see FIGS. 18A and 18B), and when 1 is set, the start bit length of "L" level is 8 bits. The communication format is one frame (refer to the timing T12 section in FIG. 18(c)) of the length data and the "H" level stop bit length for two pulses. When 0 is set in the parity function setting register PEN, the parity is set to unused, so as shown in FIGS. When 1 is set in the setting register PEN, parity use is set, so parity is added to the communication format as shown in FIG. 18(b). At this time, 0 is set in the parity type setting register PTP for even parity, and when 1 is set for odd parity.

The operation mode setting register MOD, as shown in FIG. 21(b), has an initial value of 0 and can read and write values. becomes. That is, it is possible to set whether or not to use the reception register 706a and the transmission register 706b built in the asynchronous serial communication circuit 706 shown in FIG. 20 as a FIFO. Therefore, when 0 is set in the operation mode setting register MOD, the receiving register 706a and the transmitting register 706b are not used as FIFOs, and when 1 is set, the receiving register 706a and the transmitting register 706b are used as FIFOs. will be used as

On the other hand, as shown in FIG. 21(b), the reception function setting register REN has an initial value of 0, which is readable and writable. Then, set the reception function to be available. Note that the use of the reception function is disabled at the moment 0 is set in the reception function setting register REN.

As shown in FIG. 21(b), the transmission function setting register TEN has an initial value of 0, which is readable and writable. Then set the transmission function to be available. When 0 is set in the transmission function setting register TEN, if there is data in the middle of transmission, the transmission is prohibited after the transmission is completed.

On the other hand, the asynchronous serial communication circuit 706 incorporates a serial communication setting status register SCST shown in FIG. 22(a). As shown in FIG. 22(a), this serial communication setting status register SCST can only be read, and consists of 8 bits. The first bit consists of a framing error flag register FE indicating whether or not a framing error has been detected, and the second bit consists of a break code detection flag register BRK indicating whether or not a break code has been detected. The fourth bit is composed of an overrun detection flag register ORE indicating whether or not an overrun is detected, the fourth bit is composed of a noise detection flag register NF which indicates whether or not noise is detected, and the fifth bit is the receiving register 706a. (See FIG. 20) is composed of a reception data flag register RDRF that indicates whether or not data is stored in the register 706b (see FIG. 20). The transmission data empty flag register TDBE indicates whether or not the data has been transferred to the transmission shift register 706d (see FIG. 20) used during transmission. It consists of a transmission completion flag register TC indicating whether or not the transmission is in progress.

As shown in FIG. 22(a), when data is received by the asynchronous serial communication circuit 706, the parity error flag register PE stores the parity data (see FIG. 18(b)) added to the data. If the parity is even, the asynchronous serial communication circuit 706 counts "1" of the 8-bit length data. If the parity bit is 0, it is not a parity error. 0” will be set. If the parity is odd, the asynchronous serial communication circuit 706 counts "1" of the 8-bit length data. If the parity bit is 1, the parity error flag register PE is set to "0". On the other hand, even parity is set, and when the asynchronous serial communication circuit 706 counts "1" in the 8-bit length data, if the parity bit is 1, a parity error occurs. "1" will be set. If the parity bit is 0 when the parity bit is 0 when the asynchronous serial communication circuit 706 counts "1" of the 8-bit length data, the parity error flag register PE is set to odd parity. "1" will be set. When "1" is set in the parity error flag register PE, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20) assuming that an error has occurred.

On the other hand, as shown in FIG. 22(a), when data is received by the asynchronous serial communication circuit 706, the framing error flag register FE indicates that a framing error has occurred if the stop bit of the data is "L". If "1" is set in the asynchronous serial communication circuit 706 and the stop bit is "H", "0" will be set assuming that no framing error has occurred. When "1" is set in the framing error flag register FE, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20) assuming that an error has occurred.

Also, as shown in FIG. 22(a), when data is received by the asynchronous serial communication circuit 706, the break code detection flag register BRK is set to 1 frame (timing T10 section of FIG. 18(a), ( b) Timing T11 interval, (c) Timing T12 interval) If it is "0" above, the asynchronous serial communication circuit 706 detects a break code and sets "1". , "0" is set as break code undetected. When "1" is set in the break code detection flag register BRK, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20) assuming that an error has occurred.

On the other hand, as shown in FIG. 22(a), the overrun detection flag register ORE indicates that when data is received by the asynchronous serial communication circuit 706, if the processing of the previously received data has not been completed, an overrun has occurred. , "1" is set in the asynchronous serial communication circuit 706, otherwise "0" is set. When "1" is set in the overrun detection flag register ORE, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20) assuming that an error has occurred.

As shown in FIG. 22(a), the noise detection flag register NF is set to "1" by the asynchronous serial communication circuit 706 when noise is detected when data is received by the asynchronous serial communication circuit 706. is set to "0" if no noise is detected.

On the other hand, as shown in FIG. 22A, the reception data flag register RDRF is a reception shift register 706c ( 20) to the receiving register 706a, "1" is set, otherwise "0" is set. Note that when "1" is set in the reception data flag register RDRF, the asynchronous serial communication circuit 706 outputs an interrupt request signal to the interrupt controller 705 (see FIG. 20).

Also, as shown in FIG. 22(a), the transmission data empty flag register TDBE is set to the asynchronous serial communication circuit 706 used when serially transmitting the data stored in the transmission register 706b (see FIG. 20). When the data is transferred to the built-in transmission shift register 706d (see FIG. 20), "1" is set, otherwise "0" is set. When "1" is set in the transmission data empty flag register TDBE, the asynchronous serial communication circuit 706 transmits an interrupt request signal to the interrupt controller 705 (see FIG. 20).

On the other hand, as shown in FIG. 22(a), the transmission completion flag register TC is set to "0" when data is being transmitted from the asynchronous serial communication circuit 706, and is set to "1" when data transmission is completed. be done.

On the other hand, the asynchronous serial communication circuit 706 further incorporates a serial communication data register SCDT shown in FIG. 22(b). This serial communication data register SCDT has an initial value of 00h, is readable and writable, and can store data from 00h to FFh. This serial communication data register SCDT functions as receive data when read, and functions as transmit data when written.

Thus, the one-chip microcomputer 600 has the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit shown in FIG. (CH1) 647 is used to serially transmit predetermined data.

<Description of serial communication settings>
By the way, the one-chip microcomputer 600 performs the following settings when serially transmitting predetermined data to the payout/launch control board 70 .

That is, the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648 incorporated in the one-chip microcomputer 600 are reset when the inside of the one-chip microcomputer 600 is reset. It is reset regardless of whether backup processing is performed or not. Therefore, the payout control command PAY_CMD is being serially transmitted to the payout/launch control board 70 using the asynchronous serial communication circuit (CH0) 646, or the payout control command PAY_CMD is being sent to the transmission buffer register TXBUF shown in FIG. If the power is cut off (power off) in the stored state, the asynchronous serial communication circuit (CH0) 646 is not backed up, so the payout control command PAY_CMD stored (set) before the power off is It will not be transmitted to the payout/launch control board 70 . Therefore, there is a problem that the payout/launch control board 70 cannot receive the payout control command PAY_CMD, and thus the payout/launch control board 70 cannot normally receive the payout number data.

Therefore, in this embodiment, when serial communication is performed using the asynchronous serial communication circuit (CH0) 646, the transmission time at the time of serial communication<the control of the game operation after the voltage abnormality signal ALARM becomes "L". The following processing is performed so that the time until the voltage becomes unexecutable.

That is, as shown in FIG. 23, when the AC 24V power supply, which is an external power supply supplied from a transformation transformer (not shown) installed in the amusement arcade, is interrupted (see timing T20), the voltage monitoring shown in FIG. The unit 1310 outputs the voltage abnormality signal ALARM of “L” level 20 to 30 ms (see timing T21) after the power is cut off (see timing T20). Then, 20 ms or more after the timing T21 (see timing T22), DC5V, which is the DC voltage generated by the voltage generator 1300 shown in FIG. becomes. As a result, the one-chip microcomputer 600 is not supplied with a voltage capable of executing the control of the game operation, so that the control of the game operation cannot be executed.

Therefore, in the present embodiment, the time from when the voltage abnormality signal ALARM becomes "L" to when it becomes a voltage at which game operation control cannot be executed (refer to timing T21 to timing T22 shown in FIG. 23), serial communication The baud rate is set in the transmission baud rate setting register TPR shown in FIG.

That is, the internal clock (clock generated by the clock generation circuit 640 shown in FIG. 15) has a frequency of 20 MHz, and the transmission baud rate setting register TPR shown in FIG. Baud rate is set low. At this time, the transmission baud rate (bps) is calculated by 20 (MHz)/(500×32) and becomes 1,250 (bps). Since this 1,250 (bps) means that 1250 bits can be transmitted in one second, 5 bits can be transmitted in 4 ms. Then, the payout control command PAY_CMD serially transmitted from the one-chip microcomputer 600 to the payout/launch control board 70 using the asynchronous serial communication circuit (CH0) 646 is 8 bits. One bit is added as a start bit and one bit is added as a parity bit, so that a total of 10 bits are transmitted. Therefore, if 5 bits can be transmitted in 4 ms, the transmission will be completed in two timer interrupt processes (8 ms) in the timer interrupt process started every 4 ms in the main control described later. Thus, the transmission time during serial communication is shorter than the time from when the voltage abnormality signal ALARM becomes "L" to when the voltage becomes such that the control of the game operation cannot be executed (see timing T21 to timing T22 shown in FIG. 23). can be short.

Thus, even if the baud rate setting is set low in order to improve the noise resistance, the time from when the voltage abnormality signal ALARM becomes "L" to when it reaches the voltage at which the game operation control cannot be executed (Fig. 23 (see timing T21 to timing T22 shown in ), the serial communication is completed. That is, since the payout/launch control board 70 executes a backup process in the same manner as the program in the main control described later, the payout operation will be performed normally if the serial communication is completed. Thus, even if a power failure occurs in a situation where prize ball information to be dispensed remains on the main control side, the dispensation operation will be performed normally.

On the other hand, when the baud rate setting is set high in order to increase the amount of data to be transmitted, for example, the internal clock (the clock generated by the clock generation circuit 640 shown in FIG. 15) has a frequency of 20 MHz, and FIG. Assuming that the shown transmission baud rate setting register TPR is set to 32h (=50), the transmission baud rate (bps) is calculated by 20 (MHz)/(50×32) and becomes 12,500 (bps). Since this 12,500 (bps) means that 12,500 bits can be transmitted in one second, 12.5 bits can be transmitted in 1 ms. Then, the payout control command PAY_CMD serially transmitted from the one-chip microcomputer 600 to the payout/launch control board 70 using the asynchronous serial communication circuit (CH0) 646 is 8 bits. One bit is added as a start bit and one bit is added as a parity bit, so that a total of 10 bits are transmitted. Therefore, if 12.5 bits can be transmitted in 1 ms, the transmission is completed in a shorter time than either of the timer interrupt processing started every 4 ms in the main control and the timer interrupt processing started every 1 ms in the payout control. It will be done.

Thus, even if the port rate setting is set high in order to increase the amount of data to be transmitted, the voltage becomes such that the control of the game operation cannot be executed after the voltage abnormality signal ALARM becomes "L". (See timing T21 to timing T22 shown in FIG. 23), serial communication is completed. Even if it occurs, the payout operation will be performed normally.

In this embodiment, the setting for the asynchronous serial communication circuit (CH0) 646 has been described, but the same setting is also applied to the asynchronous serial communication circuit (CH1) 647 for serially transmitting predetermined data to the sub-control board 80. It is possible to

By the way, when the WDT 643 shown in FIG. 15 generates an abnormal reset signal, the inside of the one-chip microcomputer 600 is reset. 647, the synchronous serial communication circuit 648 is also reset. That is, the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648 are reset regardless of whether or not there is transmission data. As a result, it is possible to reduce a situation in which abnormal data is transmitted. That is, when an abnormal reset occurs, the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648 may store abnormal data. Therefore, if the asynchronous serial communication circuit (CH0) 646, the asynchronous serial communication circuit (CH1) 647, and the synchronous serial communication circuit 648 are reset regardless of whether or not there is transmission data, abnormal data will be transmitted. It is possible to reduce the situation where it is lost.

On the other hand, in this embodiment, when the player's hand touches the touch sensor of the shooting handle 16, the touch sensor outputs a detection signal to the payout/shooting control board 70 as shown in FIG. In response to this, the payout/launch control board 70 will transmit the detection signal to the main control board 60 (main control CPU 600a). And the main control board 60 (main control CPU 600a) will transmit the detection signal to the sub control board 80 as the effect control command DI_CMD. This makes it possible to transmit information as to whether or not the player touched the handle 16 to play the game to the sub-control board 80 . In this way, as shown in FIG. 24(a), even if the movable accessory device 43 moves to the front of the liquid crystal display device 41 during the customer waiting demonstration, Also, when the sub-control board 80 receives information as to whether or not the player has touched the handle 16 to play a game, the sub-control board 80 sends the game ball to the special symbol 1 starting port 44 (see FIG. 5). Alternatively, as shown in FIG. 24(b), the movable accessory device 43 is controlled to return to the origin position (original position), and the liquid crystal display device 41 stops the customer waiting demonstration and displays special symbols. It is possible to perform control so that the normal screen display (see image P60A shown in FIG. 24(b)) is displayed. It should be noted that it is not possible to transmit the detection signal by the touch sensor of the shooting handle 16 directly to the sub-control board 80 due to game rules.

<Explanation of count-up effect>
Next, the count-up effect will be specifically described with reference to FIGS. 25 to 31. FIG.

When displaying the number of winning balls and the like from the big hit on the liquid crystal display device 41, a numerical count-up effect is performed. In this count-up effect, a change effect is often performed in which the previous number of balls is changed to a new number of balls. More specifically, as shown in FIG. 25(a), the liquid crystal display device 41 displays the ten thousand digit "0", the thousands digit "1", the hundred digit "5", the tens digit "3", When "01538" indicating the ones digit "8" is displayed, when a count-up effect such as +14 count-up shown in FIG. It changes to "01552" shown in FIG. 25(d). At this time, a change effect is performed to change from "01538" shown in FIG. 25(a) to "01552" shown in FIG. 25(d). Change should be smooth. Therefore, conventionally, when changing the ones digit from "8" to "2" and the tens digit from "3" to "5", variation animation control is performed. Specifically, when changing the ones digit from "8" to "2", as shown in FIG. AS1 (“2” in the figure) and numerical information ZS1 (“8” in the figure) of the previous number of balls, which is the previous variation action scenario of the number of balls, are prepared, and from the numerical information ZS1 of the previous number of balls , a variation animation is performed to change to the new numerical information AS1 of the number of balls. Then, in changing the tens place from "3" to "5", as shown in FIG. Then, "5") and the previous numerical information ZS2 of the number of balls ("3" in the figure), which is the action scenario of the previous change in the number of balls, are prepared, and from the numerical information ZS2 of the previous number of balls, a new A variation animation is performed to change the numerical information AS2 of the number of balls.

However, if two pieces of information, the previous number of pitches ZS1 and ZS2 and the new number of pitches AS1 and AS2, are prepared in this way and an attempt is made to perform a variation animation in accordance with them, the control load increases. I had a problem with the increase. That is, when performing a variation animation for changing the ones digit from "8" to "2" and the tens digit from "3" to "5", the area displayed on the liquid crystal display device 41 is determined in advance. . Specifically, as shown in FIGS. 26(a) to 26(d), four scenes and objects L0 and L1 are prepared, and numerical information ZS1 and ZS2 of the previous number of balls are set in the object L0, Numerical information AS1 and AS2 of the new number of pitches is set in the object L1. Thus, the variation animation is performed in this manner. That is, in the scene shown in FIG. 26(a), the numerical information ZS1 and ZS2 of the previous number of balls set in the object L0 is displayed in the central portion of the liquid crystal display device 41. FIG. Next, in the scene shown in FIG. 26(b), the upper half or more of the numerical information ZS1 and ZS2 of the previous number of balls set in the object L0 is displayed on the lower side of the liquid crystal display device 41, and is set in the object L1. The lower half of the numerical information AS1, AS2 of the new number of balls is displayed on the upper side of the liquid crystal display device 41. FIG. Next, in the scene shown in FIG. 26(c), the upper part of the numerical information ZS1 and ZS2 of the previous number of balls set in the object L0 is displayed slightly on the lower side of the liquid crystal display device 41, and is set in the object L1. Numerical information AS1 and AS2 of the new number of balls is displayed on the upper side of the liquid crystal display device 41. FIG. Next, in the scene shown in FIG. 26(d), the numerical information AS1 and AS2 of the new number of balls set in the object L1 is displayed in the central portion of the liquid crystal display device 41. FIG.

Thus, in this way, the variation animation is performed. Therefore, if such control is performed, it is necessary to set two pieces of numerical information ZS1 and ZS2 of the previous number of pitches and numerical information AS1 and AS2 of the new number of pitches in the objects L0 and L1. Control load will increase.

Therefore, in the present embodiment, the following processing is performed in order to solve the above problems. That is, as shown in FIG. 27(a), the liquid crystal display device 41 displays the ten thousand digit "0", the thousand digit "1", the hundred digit "5", the ten digit "3", and the one digit " When "01538" indicating "8" is displayed, when a count-up effect such as +14 count-up shown in FIG. 27(b) occurs, "01538" shown in FIG. ) is changed to “01552” shown in FIG. At this time, when changing the ones digit from "8" to "2" and the tens digit from "3" to "5", as shown in FIGS. 27(c-1) and (c-2), After displaying the common high-speed changing animation KAI of the same size as the number that does not change on the liquid crystal display device 41, as shown in FIG. ), the tens digit is changed to "5" (new number of balls number information AS2). By doing so, it is possible to cut off the relationship between the previous number of balls and the new number of balls, and change the numbers without making the player feel uncomfortable.

More specifically, as shown in FIGS. 28(a-1) to (a-4), four scenes and objects X1 to X3 and L1 are prepared. 28(b-1) is set in the scene shown in FIG. 28(a-1) by the VDP 803 (see FIG. 6). As a result, the common high-speed changing animation KAI is displayed in the central portion of the liquid crystal display device 41 .

Next, the VDP 803 (see FIG. 6) sets the common high-speed variation animation KAIa shown in FIG. 28(b-2) to the scene shown in FIG. 28(a-2). As a result, the common high-speed changing animation KAIa is displayed in the central portion of the liquid crystal display device 41 . It should be noted that this common high-speed variation animation KAIa is displayed in a larger scale than the common high-speed variation animation KAI shown in FIG.

Next, the VDP 803 (see FIG. 6) sets the scene shown in FIG. 28(a-3) to the common high-speed variation animation KAI shown in FIG. 28(b-3). As a result, the common high-speed changing animation KAI is displayed in the central portion of the liquid crystal display device 41 .

Next, the VDP 803 (see FIG. 6) sets the new pitch number numerical information AS1 shown in FIG. 28(b-4) in the scene shown in FIG. 28(a-4). As a result, new numerical information AS1 of the number of balls is displayed in the central portion of the liquid crystal display device 41 .

Thus, if a common high-speed variation animation is displayed regardless of the previous number of balls, the scenario is the common high-speed variation animation KAI ⇒ enlarged display. It is sufficient to prepare only 10 scenarios of the common high-speed variation animation KAIa -> the common high-speed variation animation KAI -> the numerical information "0" to "9" of the new number of balls. Therefore, it is not necessary to prepare the numerical information ZS1 and ZS2 of the number of previous pitches as in the conventional art, thereby reducing the control load. Further, by displaying the common high-speed changing animation KAI on the liquid crystal display device 41, the update of the accumulated display count value can be shown to the player in a natural expression.

In the present embodiment, an example of displaying the enlarged common high-speed variation animation KAIa on the liquid crystal display device 41 is shown. Also good. However, by displaying the enlarged common high-speed changing animation KAIa, it is possible to change the display, thereby preventing a situation in which the interest of the player is reduced.

On the other hand, in the present embodiment, after displaying the common high-speed variation animation KAI, the numerical information of the new number of balls is displayed. 4) may be used. That is, when the common high-speed variation animation KAI shown in FIG. 28(b-1) is set by the VDP 803 (see FIG. 6) in the scene shown in FIG. Numerical information AS1 of the new number of pitches shown in FIG. 28(b-4) is set in L1. In other words, the common high-speed variation animation KAI is displayed on the liquid crystal display device 41 overlaid on the numerical information AS1 of the new number of balls shown in FIG. 28(b-4). Thus, in this way, the player can only see the common high-speed changing animation KAI.

28 (b-2) by VDP 803 (see FIG. 6) to the scene shown in FIG. ) is set, then the common fast variation animation KAI shown in FIG. 28(b-3) is set in the scene shown in FIG. 28(c-3). After that, when the display of the high-speed variation animation KAI is erased by the VDP 803 (see FIG. 6), as shown in FIG. Numerical information AS1 of the new number of balls is displayed on the liquid crystal display device 41 .

Therefore, even if this is done, unlike the prior art, it is not necessary to prepare the numerical information ZS1 and ZS2 of the number of previous pitches, so that the control load can be reduced. Further, by displaying the common high-speed changing animation KAI on the liquid crystal display device 41, the update of the accumulated display count value can be shown to the player in a natural expression.

By the way, in the present embodiment, an example from the occurrence of the count-up effect such as +14 count-up shown in FIG. While the common high-speed changing animation KAI as shown in 2) is being displayed on the liquid crystal display device 41, a new count-up effect may occur. In such a case, as shown in FIG. 29, in a scenario where the new ball number numerical information is "2" (new ball number numerical information AS1), the common After the high-speed variation animation KAI is displayed on the liquid crystal display device 41, the enlarged common high-speed variation animation KAI shown in FIG. The common high-speed variation animation KAI shown in FIG.

However, a new count-up effect occurs, the new numerical information of the number of balls is replaced with "2" (new numerical information of the number of balls AS1), and the numerical information of the new number of balls is changed to "5" (new numerical information of the number of balls). If the numerical information of the number of balls is AS2), a scenario in which the numerical information of the new number of balls is "2" (the numerical information of the new number of balls AS1) is changed to " 5” (numeric information AS2 of the number of new pitches) is overwritten. Specifically, after the enlarged common high speed variation animation KAI shown in FIG. 29B is displayed on the liquid crystal display device 41, the common high speed variation animation KAI shown in FIG. to be displayed. After that, the enlarged common high-speed variation animation KAIa shown in FIG. 29D was displayed on the liquid crystal display device 41, and the common high-speed variation animation KAI shown in FIG. 29E was displayed on the liquid crystal display device 41. After that, numerical information AS2 of the new number of balls shown in FIG.

However, in this way, since the display time of the common high-speed variation animation is increased, a new count-up effect can be executed without making the player feel uncomfortable. Furthermore, since the scenario is simply overwritten, the control method becomes simple.

On the other hand, in this embodiment, when a count-up effect such as +14 count-up shown in FIG. However, as shown in FIG. 30, the liquid crystal display device 41 displays a common high-speed variation animation for the ones digit, and the tens digit increases one by one for the low-speed variation animation (player However, it is also possible to display a low-speed variation animation that allows the user to visually recognize that the number is increasing one by one. That is, as shown in FIG. 30(a), the liquid crystal display device 41 displays the ten thousand digit "0", the thousands digit "1", the hundred digit "0", the tens digit "1", and the one digit "1". When "01018" indicating "8" is displayed, when a count-up effect such as +14 count-up shown in FIG. 30(b) occurs, "01018" shown in FIG. ) is changed to “01032” shown in FIG. At this time, when the tens place is changed from "1" to "3", the VDP 803 (see FIG. 6) is used to change from "1" to "2" as shown in FIG. 30(c-2). The changing animation is displayed on the liquid crystal display device 41, and then the number "2" after the change is displayed on the liquid crystal display device 41 as shown in FIG. 30(d-2). After that, the VDP 803 (see FIG. 6) causes the liquid crystal display device 41 to display a slow variation animation of changing from "2" to "3" as shown in FIG. 30(e-2). 2), the liquid crystal display device 41 is caused to display the number "3" after the change. On the other hand, when changing the ones digit from "8" to "2", the VDP 803 (see FIG. 6) changes the tens digit to "3" as shown in FIG. The common high-speed changing animation KAI is repeatedly displayed on the liquid crystal display device 41 as shown in FIGS. 30(c-1) to (f-1). After that, as shown in FIG. 30(g), the liquid crystal display device 41 is caused to display the numerical information of the new number of balls ("2" in the drawing).

Thus, by doing so, it is possible to cause the liquid crystal display device 41 to display a common high-speed variation animation for the ones digit, and to display a low-speed variation animation for the tens digit to increase by one. At this time, when displaying the common high-speed changing animation KAI on the liquid crystal display device 41, as shown in FIGS. "2") may be superimposed behind a common fast-varying animation KAI. Further, the common high-speed variation animation KAI is repeatedly displayed on the liquid crystal display device 41 for a predetermined number of times or for a predetermined time until the tens digit changes to "3", and then the ones digit changes to "2" at a low speed. A variation animation may be performed, and as shown in FIG.

On the other hand, in the present embodiment, an example of a count-up effect has been shown, but the present invention is not limited to this, and can also be applied to a effect in which the count of a timer or the like is decremented. That is, when performing an effect of subtracting the count of a timer or the like, as shown in FIG. In this case, if the count is decremented and the speed at which the number changes is the same for all digits, the player will feel uncomfortable. Therefore, as shown in FIG. 31A, the liquid crystal display device 41 displays a common high-speed changing animation KAI for the second decimal place where the change is large. The liquid crystal display device 41 is caused to display a low-speed variation animation so that the player can visually recognize the digits of the first decimal place, which have a small change, one by one. Specifically, as shown in FIG. 31(b), the liquid crystal display device 41 displays a low-speed variation animation in which the first decimal place is subtracted from "3" to "2" by one. Thus, by doing so, it is possible to show the change of the numbers to the player in an easy-to-understand manner, and to reduce the control burden.

It should be noted that the common high-speed variation animation KAI described in this embodiment does not need to be an animation that uses all numbers from 0 to 9 because it is sufficient for the player to understand how the change occurs. 8⇒4⇒9⇒5” may be repeatedly displayed.

In addition, in the present embodiment, an example of applying the common high-speed changing animation KAI only to digits whose numbers change has been shown, but the present invention is not limited to this, and may be applied to digits whose numbers do not change.

<Explanation of background change effect>
Next, the background change rendering will be specifically described with reference to FIGS. 32 to 34. FIG.

The background change (mode change) is often performed by the advance notice effect. If the background change does not change at all, the player feels monotonous. In addition, when the ready-to-win effect occurs due to a variation in the background change, the background before the background change may be displayed unless the background information displayed after the ready-to-win effect ends is properly managed.

Therefore, in the present embodiment, the following processing is performed in order to solve the above problems. That is, tables as shown in FIGS. 32(a) to (e) are used. This point will be described in detail below.

The table HK_TBL shown in FIG. 32(a) is stored in the sub-control ROM 800b (see FIG. 6), and stores the number of fluctuations after background change and a sorting table to be referred to.

More specifically, the table HK_TBL shown in FIG. 32(a) is used as a sorting table to be referred to in the variations of the special symbols after the background change, in the variations of the special symbols in the 1st to 19th rotations, as the first sorting table. Table FR_TBL1 will be used. Then, the second sorting table FR_TBL2 is used as the sorting table to be referred to in the variations of the special symbols on the 20th to 39th rotations. Furthermore, in the variations of the special symbols on the 40th to 59th rotations, the third sorting table FR_TBL3 is used as the sorting table to be referred to. Further, the fourth distribution table FR_TBL4 is used as a reference distribution table in the variation of the special symbols from the 60th rotation.

By the way, the first sorting table FR_TBL1 to be referred to when changing the special symbols in the 1st to 19th rotations is as shown in FIG. 32(b). Specifically, when the effect control command DI_CMD, which is the lottery result of the special symbol sent from the main control board 60 (main control CPU 600a), is a normal variation (loss), the background is changed so that it is elected. there is When the performance control command DI_CMD, which is the special pattern lottery result transmitted from the main control board 60 (main control CPU 600a), is a normal reach (lost), the player wins without changing the background. Furthermore, when the effect control command DI_CMD, which is the result of the special symbol lottery sent from the main control board 60 (main control CPU 600a), is SP reach (lost), the game is won without changing the background. Furthermore, if the performance control command DI_CMD, which is the special pattern lottery result transmitted from the main control board 60 (main control CPU 600a), is a normal reach (win), the player wins without changing the background. Further, if the performance control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is SP reach (win), the background is won without changing.

Thus, the first sorting table FR_TBL1 is a sorting table in which the sorting values for executing the background change are all "0" (the background change is not won).

On the other hand, the second distribution table FR_TBL2 referred to in the variation of the special symbols on the 20th to 39th rotations is as shown in FIG. 32(c). Specifically, when the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is normal variation (loss), the probability shown in the figure is spring, summer, autumn. , winter, or no background change. Then, when the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is normal reach (loss), the probability shown in the figure is spring, summer, autumn, winter, background It is designed to win either without change. Furthermore, if the effect control command DI_CMD, which is the result of the special symbol lottery transmitted from the main control board 60 (main control CPU 600a), is SP reach (loss), the probability shown in the figure is spring, summer, autumn, winter, It is designed to be elected either without background change. Furthermore, if the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is a normal reach (hit), the probability shown in the figure is spring, summer, autumn, winter, It is designed to be elected either without background change. And further, if the effect control command DI_CMD, which is the result of the special symbol lottery transmitted from the main control board 60 (main control CPU 600a), is SP reach (hit), the probability shown in the figure is spring, summer, autumn, winter. , or without background change.

Thus, the second sorting table FR_TBL2 is a sorting table in which it is difficult to win the background change, as indicated by the probability shown in the figure.

On the other hand, the third sorting table FR_TBL3 referred to in the variations of the special symbols on the 40th to 59th rotations is as shown in FIG. 32(d). Specifically, when the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is normal variation (loss), the probability shown in the figure is spring, summer, autumn. , winter, or no background change. Then, when the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is normal reach (loss), the probability shown in the figure is spring, summer, autumn, winter, background It is designed to win either without change. Furthermore, if the effect control command DI_CMD, which is the result of the special symbol lottery transmitted from the main control board 60 (main control CPU 600a), is SP reach (loss), the probability shown in the figure is spring, summer, autumn, winter, It is designed to be elected either without background change. Furthermore, if the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is a normal reach (hit), the probability shown in the figure is spring, summer, autumn, winter, It is designed to be elected either without background change. And further, if the effect control command DI_CMD, which is the result of the special symbol lottery transmitted from the main control board 60 (main control CPU 600a), is SP reach (hit), the probability shown in the figure is spring, summer, autumn, winter. , or without background change.

Thus, the third sorting table FR_TBL3 is a sorting table in which it is easy to win the background change, as indicated by the probability shown in the figure.

On the other hand, the fourth sorting table FR_TBL4 referred to in the variation of the special symbols from the 60th spin onwards is as shown in FIG. 32(e). Specifically, when the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is normal variation (loss), the probability shown in the figure is spring, summer, autumn. , is set to win any of the winter. Then, if the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is normal reach (loss), the probability shown in the figure is either spring, summer, autumn, or winter. It is designed to be elected. In addition, when the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is SP reach (lost), the illustrated probability is spring, summer, autumn, winter It is supposed to be elected to something. Furthermore, if the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is a normal reach (hit), the probability shown in the figure is the spring, summer, autumn, winter It is supposed to be elected to something. And further, if the effect control command DI_CMD, which is the result of the special symbol lottery transmitted from the main control board 60 (main control CPU 600a), is SP reach (hit), the probability shown in the figure is spring, summer, autumn, winter. It is designed to be elected to one of the

Thus, the fourth sorting table FR_TBL4 is a sorting table with sorting values for which the background change is always executed (background change is always won).

Thus, if the first sorting table FR_TBL1, which is a sorting table in which the sorting values for executing the background change are all "0" (the background change is not won), is prepared and a lottery is performed, control can be performed. Therefore, it is possible to reduce the control load. Furthermore, in the debugging work related to the lottery for changing the background, which is the advance notice effect, it is sufficient to simply check the sorting table, so that the man-hours required for debugging can be reduced.

In the present embodiment, the background change was explained as an example, but the present invention is not limited to this, and can be applied to any advance notice effect.

By the way, the column (offset value) of the first sorting table FR_TBL1 to the fourth sorting table FR_TBL4 shown in FIG. 32 is the effect control command DI_CMD which is the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a). is based on Based on this content, after the branching variation pattern lottery is performed on the sub-control board 80 side, the subsequent announcement effect is performed with the variation pattern managed by the sub-control board 80 side as an offset value. will be A specific example will be described below.

The sub-control fluctuation pattern distribution table SUB_FR_TBL shown in FIG. 33(a) is stored in the sub-control ROM 800b (see FIG. 6), and the lottery result of the special symbol transmitted from the main control board 60 (main control CPU 600a). and the variation pattern on the sub-control side are stored.

Specifically, when the effect control command DI_CMD, which is the result of the special symbol lottery transmitted from the main control board 60 (main control CPU 600a), is normal variation (lost), the variation pattern wins without change. It's like Then, when the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is normal reach (loss), the variation pattern is normal reach 1 (loss) with the probability shown in the figure. , normal reach 2 (lost). Furthermore, if the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is SP reach (loss), the variation pattern is SP reach 1 ( Lost) or SP reach 2 (losing). Furthermore, if the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is normal reach (hit), the variation pattern is normal reach 1 (hit) with the probability shown in the figure. ), normal reach 2 (hit). Further, if the effect control command DI_CMD, which is the special symbol lottery result transmitted from the main control board 60 (main control CPU 600a), is SP reach (hit), the variation pattern is SP reach 1 with the probability shown. (Hit) or SP reach 2 (Hit).

Thus, by using such a sub-control variation pattern allocation table SUB_FR_TBL, the variation pattern on the sub-control side is determined. The result is the columns (offset values) of the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33(b) and the symbol change notice table ZH_TBL shown in FIG. 33(c). Specifically, in the left symbol lottery distribution table HC_FR_TBL shown in FIG. be elected to any of the Then, in the case of the normal reach 1 (loss) variation pattern, with the probability shown, the left symbol displayed on the liquid crystal display device 41 wins any of 1 to 8, and in the case of the normal reach 2 (loss) variation pattern, the illustration The left pattern displayed on the liquid crystal display device 41 wins any one of 1 to 8 with probability. Furthermore, in the case of the SP reach 1 (loss) variation pattern, with the probability shown, the left pattern displayed on the liquid crystal display device 41 wins any of 1 to 8, and in the case of the SP reach 2 (loss) variation pattern, The left pattern displayed on the liquid crystal display device 41 wins any one of 1 to 8 with the probability shown in the figure. Furthermore, in the case of the normal reach 1 (hit) variation pattern, the left pattern displayed on the liquid crystal display device 41 wins any one of 1 to 8 with the probability shown in the figure, and in the case of the normal reach 2 (hit) variation pattern, the illustration The left pattern displayed on the liquid crystal display device 41 wins any one of 1 to 8 with a probability of . And further, in the case of the SP reach 1 (hit) variation pattern, with the probability shown, the left pattern displayed on the liquid crystal display device 41 wins any of 1 to 8, and in the case of the normal reach 2 (hit) variation pattern, The left pattern displayed on the liquid crystal display device 41 wins any one of 1 to 8 with the probability shown in the figure.

On the other hand, in the symbol change notice table ZH_TBL shown in FIG. 33(c), in the case of the normal variation (loss) variation pattern, the winning pattern is not changed to another symbol. Then, in the case of normal reach 1 variation (loss) variation pattern, with the probability shown, it will be elected whether it will change to another pattern or change, and in the case of normal reach 2 variation (loss) variation pattern, with the probability shown, another It is elected whether it does not change to the pattern of or changes. In addition, in the case of SP reach 1 fluctuation (loss) fluctuation pattern, with the probability shown, it is elected whether it changes to another pattern or changes, and in the case of SP reach 2 fluctuation (loss) fluctuation pattern, with the probability shown , It is elected whether it does not change to another pattern or changes. Furthermore, in the case of normal reach 1 variation (hit) variation pattern, with the probability shown, it will be elected whether it will change to another pattern or change, and in the case of normal reach 2 variation (hit) variation pattern, with the probability shown, It is elected whether it does not change to another pattern or it changes. And further, in the case of SP reach 1 fluctuation (hit) fluctuation pattern, with the probability shown, it is elected whether it changes to another pattern or changes, and in the case of SP reach 2 fluctuation (hit) fluctuation pattern, the probability shown So, it is elected whether it does not change to another pattern or changes.

Thus, when the symbol change notice table ZH_TBL shown in FIG. 33(c) is used to select a different symbol, a lottery is conducted using the changed symbol lottery sorting table HZC_FR_TBL shown in FIG. 33(d). becomes. In addition, the pattern of the column of this changing symbol lottery distribution table HZC_FR_TBL becomes the horizontal row (variation) won by lottery using the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33(b).

More specifically, in the changing symbol lottery sorting table HZC_FR_TBL shown in FIG. 33(d), when winning the left symbol of "1" in the left symbol lottery sorting table HC_FR_TBL shown in FIG. Either change to the left pattern of "7" or change to the left pattern of "7". Then, when the left symbol "2" is won in the left symbol lottery sorting table HC_FR_TBL shown in FIG. Either change to the left pattern of "5" or change to the left pattern of "7" is won. Furthermore, when winning the left symbol of "3" in the left symbol lottery sorting table HC_FR_TBL shown in FIG. Furthermore, when the left symbol of "4" is won in the left symbol lottery sorting table HC_FR_TBL shown in FIG. , change to the left symbol of "5" or change to the left symbol of "7". Further, when the left symbol "5" is won in the left symbol lottery sorting table HC_FR_TBL shown in FIG. , change to the left symbol of "5" or change to the left symbol of "7". Furthermore, when the left symbol "6" is won in the left symbol lottery sorting table HC_FR_TBL shown in FIG. , change to the left symbol of "5" or change to the left symbol of "7". Further, when the left symbol of "7" is won in the left symbol lottery sorting table HC_FR_TBL shown in FIG. Furthermore, when the left symbol "8" is won in the left symbol lottery sorting table HC_FR_TBL shown in FIG. , change to the left symbol of "5" or change to the left symbol of "7".

Thus, the advance notice effect is performed using the table as shown in FIG.

Thus, the determined variation pattern is used as an offset value, and the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33B and the symbol change notice table ZH_TBL shown in FIG. 33C are based on the offset value. By performing a lottery using , it is possible to select a table according to the offset value, so that the control load can be reduced.

Furthermore, by performing a lottery on the changed symbol lottery distribution table HZC_FR_TBL shown in FIG. , a table corresponding to each row (variation) can be selected, so that the control load can be reduced.

By the way, in the above background change (mode change), I tried to manage the data that manages the background information (for example, spring: 0, summer: 1, autumn: 2, winter: 3) with one background data. In this case, if the background change lottery is won using the table shown in FIG. 32 and the background data is rewritten when the background changes, the background suddenly changes when the decorative pattern starts to change. rice field. In particular, it was necessary to pay attention to the background change that takes time, such as when the shutter is closed and the background changes when the shutter is opened. This point will be specifically explained using the screen examples shown in FIGS. 34(a-1) to 34(a-5). The screen examples shown in FIGS. 34(a-1) to 34(a-5) are conventional screen examples showing an example in which the background changes from spring to summer. That is, as shown in FIG. 34(a-1), the liquid crystal display device 41 displays a stopped decorative pattern (see image P100) in the center of the screen, and the number of start pending balls (image P101) is displayed, and the resident pattern (see image P102) is displayed in the lower right corner of the screen, and the background is the screen of spring. The resident symbols are reduced figures of the decorative symbols that are variably displayed, and are variably displayed in synchronism with the decorative symbols in principle.

Next, as shown in FIG. 34(a-2), the decorative pattern changes (see image P103), an effect such as a change of scene occurs due to reach, etc., and the left shutter positioned on the left side of the screen (see image P106a). Then, an effect such that the screen is closed by the right shutter (see image P106b) located on the right side of the screen is generated. At this time, originally, the decorative pattern according to the spring background (see image P100), the spring background, and the number of starting suspension balls according to the spring background (see image P101) should be the left shutter (image P106a ) and the screen that is hidden by the right shutter (see image P106b) is displayed on the liquid crystal display device 41 . However, when managed with one background data, as shown in FIG. The number of start pending balls (see image P104) according to the background of the is displayed on the liquid crystal display device 41 to the extent that the player can visually recognize it from the gap between the left shutter (see image P106a) and the right shutter (see image P106b). end up The resident pattern (see image P102) is displayed on the liquid crystal display device 41 without being hidden by the left shutter (see image P106a) and the right shutter (see image P106b).

Next, from the state shown in FIG. 34(a-2), as shown in FIG. ) is displayed on the liquid crystal display device 41 .

Next, as shown in FIG. 34(a-4), the left shutter (see image P106a) and the right shutter (see image P106b) are opened, and from the gap between the left shutter (see image P106a) and the right shutter (see image P106b) , a background of summer, a decorative pattern corresponding to the background of summer (see image P103), and the number of start pending balls corresponding to the background of summer (see image P104) are displayed on the liquid crystal display device 41. Then, as shown in FIG. 34(a-5), the left shutter (see image P106a) and the right shutter (see image P106b) are not displayed on the liquid crystal display device 41, and the summer background and the summer background The corresponding decorative pattern (see image P103), the number of starting pending balls (see image P104) corresponding to the summer background, and the resident pattern (see image P102) are displayed on the liquid crystal display device 41.

Therefore, if it is originally, for the first time in the case shown in FIG. number (see image P104) is displayed on the liquid crystal display device 41. When managed by one background data, as shown in FIG. (See image P106b) When closing, the summer background, the decorative pattern corresponding to the summer background (see image P103), and the number of starting pending balls (see image P104) corresponding to the summer background are displayed on the liquid crystal display device 41 There was a possibility that it would be displayed in Therefore, there is a problem of inappropriate background display.

Therefore, in the present embodiment, the following processing is performed in order to solve the above problems. That is, two pieces of first background data (current background) and second background data (changed background) are prepared, and the sub-control CPU 800a transfers the data at appropriate timing. This point will be specifically explained using the screen examples shown in FIGS. 34(b-1) to 34(b-5). If the background change lottery is won using the table shown in FIG. 32 and the background changes from spring to summer, the sub-control CPU 800a sets the first background data to 0 (=spring), Set the background data to 1 (=summer). At this time, since the first background data is data indicating the current background, the VDP 803 (see FIG. 6), based on this data, causes the liquid crystal display device 41 to display the following as shown in FIG. Display the spring screen as the background. At this time, a decorative pattern (see image P100) corresponding to the background of spring is displayed in the center of the screen of the liquid crystal display device 41, and the number of start pending balls (see image P101) corresponding to the background of spring is displayed in the lower left corner of the screen. , and a resident pattern (see image P102) is displayed in the lower right corner of the screen.

Next, since 0 (=spring) remains set in the first background data, the VDP 803 (see FIG. 6) causes the liquid crystal display device 41 to display the background as shown in FIG. 34(b-2). An image of closing the left shutter (see image P106a) and the right shutter (see image P106b) is displayed while the spring screen is displayed. As a result, as shown in FIG. 34(b-3), the screen other than the resident pattern (see image P102) is hidden by the left shutter (see image P106a) and the right shutter (see image P106b) on the liquid crystal display device 41. Is displayed. At this time, the sub-control CPU 800a sets 1 (=summer) set in the second background data to the first background data. As a result, 1 (=summer) is set to the first background data.

Next, since 1 (=summer) is set in the first background data, the VDP 803 (see FIG. 6) sets the left shutter (see image P106a) and the right shutter as shown in FIG. When the shutter (see image P106b) is opened, the summer screen is displayed as the background. At this time, the liquid crystal display device 41 displays the number of start pending balls corresponding to the summer background (see image P104) and the decoration pattern corresponding to the summer background (see image P103).

Next, since 1 (=summer) is still set in the first background data, the VDP 803 (see FIG. 6) sends the background data to the liquid crystal display device 41 as shown in FIG. 34(b-5). While the summer screen is displayed, the left shutter (see image P106a) and the right shutter (see image P106b) are not displayed, and the summer screen is displayed as the background. At this time, on the liquid crystal display device 41, the number of start pending balls (see image P104) corresponding to the summer background, a decorative pattern (see image P103) corresponding to the summer background, and a resident pattern (see image P102) are displayed. Is displayed.

Thus, by doing so, the data can be transferred at an appropriate timing, so that an appropriate background display can be performed. Furthermore, background control processing can also be simplified.

In addition, in this embodiment, when the left shutter (see image P106a) and the right shutter (see image P106b) are closed, the number of starting pending balls (see image P101) according to the spring background is hidden, and the left shutter (see image P106a) ) and the right shutter (see image P106b) are displayed, the number of start pending balls (see image P104) corresponding to the summer background is displayed, so that the player can recognize that the background has changed. can be made easier.

In the present embodiment, the number of starting pending balls is displayed on the liquid crystal display device 41 according to the background, but the number of starting pending balls can be displayed in common for each background. At this time, as shown in FIGS. 34 (c-2) to (c-4), the left shutter (see image P106a) and the right shutter (see image P106b) hide the number of starting pending balls (see image P110). avoid That is, as shown in FIGS. 34(c-1) to (c-5), the number of start-holding balls (see image P110) is kept displayed on the liquid crystal display device 41. FIG. In this way, it is possible to perform a look-ahead pending change notice for the prize-winning starting pending ball without affecting the transition state of the background.

<Description of production control commands in relief games and games with special electric support symbols>
Next, the effect control command in the relief game and the game of the special electric support symbol will be described.

As described above, in the relief game, as shown in FIG. 9(b), the number of times of time saving in the second time saving game state (state with low electric power support) exceeds 100 times, and in the game of the special electric power support symbol As shown in FIG. 9(c), the number of times of time saving in the second time saving game state (state with low power supply support) can exceed 100 times.

On the other hand, in the conventional game, as shown in FIG. 9A, the number of times of time saving in the time saving game state (state with low power supply support) was up to 100 times. Therefore, the effect control command DI_CMD transmitted from the main control board 60 (main control CPU 600a) to the sub-control board 80 (sub-control CPU 800a) should be one command (2 bytes). That is, as a command mechanism, the effect control command DI_CMD is composed of two bytes, an upper byte and a lower byte. The upper byte consists of 80H to FFH in which the 7th bit (most significant bit) is 1, and the lower byte consists of 01H to 7FH in which the 7th bit (most significant bit) is 0. As a result, the sub-control CPU 800a determines whether the 7th bit is 1 or 0, so that the sub-control CPU 800a can determine whether the effect control command DI_CMD is an upper byte or a lower byte. Therefore, when the sub-control CPU 800a receives the effect control command DI_CMD, if the command is missing or abnormal due to noise or the like, it is possible to detect an incorrect combination of the upper byte and the lower byte, Therefore, by controlling abnormal commands, it is possible to prevent problems from occurring.

Therefore, if the number of times of time saving is 100 times, the effect control command DI_CMD is one command, and can be expressed by 8001H to 64H. That is, the upper byte 80H is a type indicating that the transmission content is the number of times of time saving, and the lower byte indicates 1 time (01H) to 100 times (64H) of the number of times of time saving.

However, in the game of the special electric support symbol, the number of times of time saving can exceed 100 times. , the seventh bit (most significant bit) of the lower byte must be set to 0 so as not to cause any trouble, so 01H to 7FH (1 time to 127 times). Therefore, it is necessary to set it to 2 commands because the number of digits increases beyond this.

By the way, if two commands are used and 1000 commands are to be transmitted, 1000=03E8H expressed in hexadecimal can be divided into upper and lower bytes and transmitted as two commands of 8003H and 81E8H, respectively. In addition, 80xxH is a type command indicating that the transmission content is the high-order byte of the number of times of time saving, and 81xxH is a type command indicating that the transmission content is the low-order byte of the number of time saving.

However, in the 81E8H, since the 7th bit (most significant bit) of the lower byte is 1, it is not possible to control abnormal commands and prevent problems from occurring. Therefore, it is conceivable to divide 1000=“00111” and “1101000” expressed in binary into every 7 bits so that the 7th bit (most significant bit) of the lower byte becomes 0. However, in this case, the main control CPU 600a performs the dividing process, and the sub-control CPU 800a performs the combining process again.

Therefore, in this embodiment, as a method of holding data when using two commands, the lower byte of the first command is the decimal digits of thousands and hundreds (00 to 99), and the lower byte of the second command is a decimal number. The main control CPU 600a generates an effect control command DI_CMD such that it becomes the tens and ones place (00 to 99), and transmits it to the sub control board 80 (sub control CPU 800a). The sub-control CPU 800a that received the command multiplies the numerical value of the lower byte of the first command by 100 and adds the numerical value of the lower byte of the second command to it. As a result, it is possible to receive the count data composed of the original 2-byte data. In addition, the sub-control CPU 800a that has received the data uses the VDP 803 to display numbers on the liquid crystal display device 41, and converts the numerical value of the first command into thousands and hundreds, and the numerical value of the second command into tens and ones. It will be better if it is displayed as a number of digits.

By doing so, not only is it possible to make the command structure easier to understand, but also the control load can be reduced.

More specifically, if the number of times of time saving is 1000 times, it can be divided into "10" and "00", and the first command can be expressed as 800BH and the second command as 8101H. 0BH = 11 and 01H = 01, which are different from "10" and "00". It is represented by 01H to 64H.

Thus, the sub-control CPU 800a that receives such a command subtracts 1 from 0BH in the lower byte of the first command to make it 10, and subtracts 1 from 01H in the lower byte of the second command to make it 00. Then, the sub-control CPU 800a multiplies the numerical value obtained by subtracting 1 from the lower byte of the first command by 100 and adds the numerical value obtained by subtracting 1 from the lower byte of the second command. As a result, the sub-control CPU 800a can receive the content indicating the number of time reductions of 1000 times. Also, when displaying a number on the liquid crystal display device 41 using the VDP 803, the number obtained by subtracting 1 from the lower byte of the first command is used as the number in the 1000s and 100's digits, and the number obtained by subtracting 1 from the lower byte of the second command is used. It will be displayed as digits in the tens and ones digits.

Further details of the above processing method will be described later.

By the way, in the present embodiment, the number of times of time saving has been described as an example, but it is not limited to this, and the loss variation of the special symbol is executed a predetermined number of times (for example, 1000 times) in the relief game shown in FIG. It is also used for the production control command DI_CMD when counting the number of fluctuations of the special symbol until it shifts to the 2 o'clock short game state (low-accuracy power support state) and transmitting it to the sub-control CPU 800a.

<Main control: description of the program>
Here, the outline of the program stored in the main control ROM 600b (see FIG. 6) processed by the main control board 60 will be explained in more detail by explaining with reference to FIGS. do.

<Main control: Description of main processing>
First, when the pachinko game machine 1 is powered on, a power-on signal is sent to the effect that the DC voltage generated by the voltage generator 1300 of the power supply board 130 (see FIG. 6) is supplied to each control board. , upon receiving the signal, the main control CPU 600a (see FIG. 6) reads out the program stored in the main control ROM 600b (see FIG. 6), and performs the main control main processing shown in FIG. At this time, the main control CPU 600a first sets itself to an interrupt disabled state (step S1).

Next, the main control CPU 600a performs stack pointer setting processing for setting the value of the stack pointer inside the main control CPU 600a corresponding to the final address of the normal stack area (step S2).

Next, the main control CPU 600a clears the WDT 643 shown in FIG. 15 (step S3) and clears the output port for outputting the firing control signal (step S4).

Subsequently, the main control CPU 600a sets the activation waiting time of the sub-control board 80 (step S5), decrements (-1) the set waiting time (step S6), and clears the WDT 643 shown in FIG. 15 (step S7).

Next, the main control CPU 600a confirms whether or not the set waiting time has become "0" (step S8), and if it has not become "0" (step S8: ≠ 0), returns to the process of step S7. , "0" (step S8:=0), the process proceeds to step S9.

Next, the main control CPU 600a acquires the voltage abnormality signal ALARM (see FIG. 6) output from the power supply board 130 (voltage monitoring unit 1310) (see FIG. 6) twice, and are stored in an internal register of the main control CPU 600a (not shown), and the level of the voltage abnormality signal ALARM is confirmed (step S9). If the level of the voltage abnormality signal ALARM is "L" level (step S10: YES), the process returns to step S9. The process proceeds to step S11. That is, the main control CPU 600a repeats the same processing until the abnormal voltage signal ALARM changes to the normal level (that is, "H" level) (steps S9 to S10). By acquiring the abnormal voltage signal ALARM twice in this manner, an accurate signal can be read.

Next, the main control CPU 600a permits data writing to the main control RAM 600c (step S11), and initializes the work area of the main control RAM 600c (step S12). Specifically, 00H is set in the power failure check counter, and 01H is set in the system operation status. Then, the main control CPU 600a sets data in the reception baud rate setting register RPR (see FIG. 16(a)), sets the reception baud rate (bps), and sets the parity presence/absence setting register RPEN (see FIG. 16(a)). Set data, set whether parity is present or not, and if parity is set, set data in the parity odd/even setting register REVEN (see FIG. 16(a)) to set even parity or odd parity. I do. Also, data is set in the transmission baud rate setting register TPR (see FIG. 17(a)) to set the transmission baud rate (bps), and data is set in the parity presence/absence setting register TPEN (see FIG. 17(a)), If parity is set, data is set in the parity odd/even setting register TEVEN (see FIG. 17A) to set even parity or odd parity. Further, the main control CPU 600a sets the division ratio of the synchronous clock in the synchronous clock division ratio setting register CLK (see FIG. 19(a)), and sets the data length setting register LENG (see FIG. 19(a)). , set the data length.

Thus, by making such settings, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. It becomes possible to transmit predetermined data to the sub-control board 80 by serial transmission using the asynchronous serial communication circuit (CH1) 647 .

Thus, according to this embodiment, the main control CPU 600a (see FIG. 6) sets the reception baud rate and the transmission baud rate (bps) by initializing when the pachinko game machine 1 is powered on, or , the reception baud rate and the transmission baud rate (bps) are set without determining whether the initial setting is due to the reset of the inside of the one-chip microcomputer 600 by the abnormal reset signal. As a result, it is possible to reduce a situation in which abnormal data is transmitted. That is, there is a risk that abnormal data is stored in the asynchronous serial communication circuit (CH0) 646 and the asynchronous serial communication circuit (CH1) 647 when an abnormal reset occurs. Therefore, the initial setting is made by turning on the power of the asynchronous serial communication circuit (CH0) 646 and the pachinko game machine 1, or by resetting the inside of the one-chip microcomputer 600 by an abnormal reset signal. By setting the baud rate without judging, it is possible to reduce a situation in which abnormal data is transmitted.

Further, in step S12, the main control CPU 600a performs a process of setting initial values in the transmission buffer register TXBUF (see FIG. 17(b)) and the transmission data register TRBUF (see FIG. 19(b)). Thus, by doing so, it is possible to reduce a situation in which abnormal data is transmitted due to the influence of noise or the like immediately after the start of serial communication. That is, when the pachinko game machine 1 is powered on, the system reset signal RST generated by the system reset generator 1320 (see FIG. 6) causes the transmission buffer register TXBUF (see FIG. The credit data register TRBUF (see FIG. 19(b)) will be initialized. It is possible to reduce situations in which incorrect data is transmitted.

Next, the main control CPU 600a transmits to the sub-control board 80 a processing command (effect control command DI_CMD) for displaying a standby screen on the liquid crystal display device 41 (step S13).

Next, the main control CPU 600a clears the WDT 643 shown in FIG. 15 (step S14), and confirms whether or not a signal (power-on signal) indicating that power has been turned on from the payout control board 70 has come (step S15). . If the power-on signal has not been received (step S15: OFF), the process returns to step S14, and if the power-on signal has been received (step S15: ON), the process proceeds to step S16.

Next, the main control CPU 600a acquires the level data of the RAM clear switch 620 and the setting key switch 630, and saves them in the work area of the normal RAM area 600ca (see FIG. 7A) of the main control RAM 600c (step S16). .

Next, as shown in FIG. 2, the main control CPU 600a generates a door open signal indicating whether or not the upper open/close door 7 and the lower open door 8 are open, and the RAM clear switch retracted to the work area of the main control RAM 600c. The signal of 620 and the signal of the setting key switch 630 are acquired (step S17), and it is confirmed whether or not they are all ON (step S18). If all are ON (step S18: YES), the main control CPU 600a performs setting switching processing (step S19).

<Main control: Main processing: Description of setting switching processing>
Here, this setting switching process will be specifically described with reference to FIG.

First, the main control CPU 600a transmits a setting switching start command (effect control command DI_CMD) indicating that the setting is being changed to the sub control board 80 (step S50).

Next, the main control CPU 600a clears the backup flag (step S51). The backup flag is data indicating whether backup processing has been executed when a voltage drop due to a power failure or the like is detected in the power failure check processing shown in FIG. The reason why this backup flag is cleared is to detect in step S21 shown in FIG. is.

Next, the main control CPU 600a sets the system operation status to 02H (step S52), and sets the set value of the probability of generating a special game state advantageous to the player stored in the main control RAM 600c (see FIG. 6). It acquires it and sets it in the W register (step S53). Specifically, if the set values are, for example, "1" to "6", the program associates the set values "1" to "6" with the values "00H" to "05H". It will be set in the W register.

Next, the main control CPU 600a compares the value set in the W register with the set maximum value of the probability of generating a special game state advantageous to the player (for example, "05H" corresponding to "6") (step S54). . Then, the main control CPU 600a, if the value set in the W register is greater than the set maximum value of the probability of generating a special game state advantageous to the player (for example, "05H" corresponding to "6") (step S55 : YES), it is judged to be an abnormal value, and 00H is set in the W register (step S56).

On the other hand, if the value set in the W register is smaller than the set maximum value of the probability of generating a special game state advantageous to the player (for example, "05H" corresponding to "6") (step S55: NO), the normal value , and the process proceeds to step S57.

Next, the main control CPU 600a sets ON a security signal to be output to a hall computer (not shown) used for managing game islands of the game arcade via an external terminal (not shown), and the security signal is turned on. The data is output to a hall computer (not shown) via an external terminal (step S57).

Next, the main control CPU 600a sets 00H to the LED common port (step S58).

Next, the main control CPU 600a outputs the value set in the W register to the LED data port (step S59).

Next, the main control CPU 600a turns on the LED common port that displays the set value (step S60).

Next, the main control CPU 600a sets a predetermined value in a register in the main control CPU 600a so as to wait 4 ms, and performs a countdown process (step S61). In this process, when confirming changes in the level data of the RAM clear switch 620 (see FIG. 6) and the setting key switch 630 (see FIG. 6), it is possible to wait at least 4 ms after the previous acquisition of the switch level. , to confirm that the level data is not changed due to irregularities such as noise. Furthermore, when checking the change in the voltage abnormality signal in the subsequent power supply abnormality check process and counting the power supply abnormality confirmation counter, by setting a time of 4 ms, the "L" level of the voltage abnormality signal becomes noise. It is also a process for confirming that it is not irregular level data.

Next, the main control CPU 600a performs power supply abnormality check processing (step S62). This power supply abnormality check process will be specifically described with reference to FIG.

<Main control: Main processing: Description of power failure check processing>
As shown in FIG. 38, the main control CPU 600a acquires the voltage abnormality signal ALARM (see FIG. 6) output from the power supply board 130 (voltage monitoring unit 1310) (see FIG. 6) twice (step S80), It is checked whether or not the levels of the voltage abnormality signal ALARM obtained twice match (step S81). If they match (step S81: YES), the main control CPU 600a checks the level of the voltage abnormality signal ALARM (step S82), and if they do not match (step S81: NO), the process returns to step S80.

Next, if the level of the voltage abnormality signal ALARM is "H" level (step S82: OFF), the main control CPU 600a clears the power abnormality confirmation counter (step S83) and ends the power abnormality check process.

On the other hand, if the level of the voltage abnormality signal ALARM is "L" level (step S82: ON), the main control CPU 600a increments (+1) the power supply abnormality confirmation counter (step S84), and changes the value of the power supply abnormality confirmation counter to Confirm (step S85). If the value of the power supply abnormality confirmation counter is not 2 or more (step S85: NO), the power supply abnormality check process is finished.

On the other hand, if the value of the power supply abnormality confirmation counter is 2 or more (step S85: YES), the main control CPU 600a transmits a power interruption command (effect control command DI_CMD) indicating that the power supply has been cut off to the sub control board 80. (step S86).

Next, the main control CPU 600a confirms the value of the system operation status (step S87). If the value of the system operation status is 02H, it is determined that the setting change process is in progress (step S87: YES), the backup flag is not set to ON, and the process proceeds to step S89. In this way, it is possible to detect in step S21 shown in FIG. 36, which will be described later, a case where the main control RAM 600c is not backed up normally due to a power failure for some reason during the setting switching process.

On the other hand, if the value of the system operation status is not 02H, it is determined that the setting change process is not being performed (step S87: NO), and the backup flag is set to ON (step S88).

Next, the main control CPU 600a prohibits data writing to the main control RAM 600c (step S89), and clears the output data of all output ports (step S90). Then, timer interrupt is prohibited (step S91), and infinite loop processing is repeated to wait for the voltage to drop.

<Main control: Main processing: Description of setting switching processing>
Thus, after completing the power supply abnormality check process (step S62) through the above process, the main control CPU 600a determines from the previous and current level data of the RAM clear switch 620 and the level data of the setting key switch 630, The switch edge data of the RAM clear switch 620 signal and the switch edge data of the setting key switch 630 signal are created (step S63). The main control CPU 600a stores the created edge data in the main control RAM 600c.

Next, the main control CPU 600a confirms the edge data stored in the main control RAM 600c, and if the setting key switch 630 is ON (step S64: NO), the process proceeds to step S65, and the setting key switch 630 is OFF. If so (step S64: YES), the process proceeds to step S67.

Next, if the RAM clear switch 620 is ON (step S65: NO), the main control CPU 600a increments (+1) the value of the W register (step S66), and returns to the process of step S54.

On the other hand, if the RAM clear switch 620 is OFF (step S65: NO), the process returns to step S57.

Thus, the above processing is repeated until the setting key switch 630 is turned off, and when the setting key switch 630 is turned off, the main control CPU 600a stores the value of the W register in the main control RAM 600c (see FIG. 6). Overwrite the set value of the probability of generating a special game state advantageous to the player (for example, the set value of "00H" to "05H" corresponding to "1" to "6") and store it (step S67).

Next, the main control CPU 600a outputs a setting confirmation display to the LED data port (step S68).

Next, the main control CPU 600a transmits a setting switching end command (effect control command DI_CMD) reflecting the setting value to the sub control board 80 (step S69).

<Main control: Description of main processing>
Thus, after completing the setting switching process (step S19) shown in FIG. 35 through the processes described above, the main control CPU 600a proceeds to the process of step S26 shown in FIG.

On the other hand, the main control CPU 600a confirms whether or not the signals of the RAM clear switch 620 and the signals of the setting key switch 630 are all ON (step S18). : NO), the main control CPU 600a performs the process of step S20 shown in FIG.

That is, the main control CPU 600a stores the set value of the probability of generating a special game state advantageous to the player (for example, "00H to "05H"), and confirms whether or not it is equal to or less than the set maximum value (for example, "05H" corresponding to "6") (step S20). If it is equal to or less than the set maximum value (step S20: YES), it is checked whether or not the backup flag is set to ON (step S21).

<Main control: Main processing: Description of RAM error processing>
If it is equal to or less than the set maximum value (step S20: NO) or if the backup flag is not set to ON (step S21: NO), the main control CPU 600a indicates to the sub-control board 80 that there is a RAM error. An error command (effect control command DI_CMD) is transmitted (step S22).

Next, the main control CPU 600a outputs an error indication to the LED data port (step S23).

Next, the main control CPU 600a performs power failure check processing (step S24), returns to the processing of step S23, and repeats the processing. This power supply abnormality check process is the same as the power supply abnormality check process shown in FIG.

<Main control: Description of main processing>
On the other hand, if the backup flag is set to ON (step S21: YES), the signal of the RAM clear switch 620 is checked (step S25).

<Main control: Main processing: Description of RAM clear processing>
When the signal of the RAM clear switch 620 is ON (step S25: YES), or when the setting switching process (step S19) shown in FIG. The area is not cleared, but the normal RAM area and normal stack area of the main control RAM 600c are cleared (step S26). At this time, a relief number counter, which will be described later, is cleared (0000H is set).

Next, the main control CPU 600a sets the RAM clear notification timer to 30 seconds (30s) (step S27), and through an external terminal (not shown), a hall computer (not shown) used for game island management of the game hall. A timer for outputting a security signal to be output to is set to 30 seconds (30s) (step S28).

Next, the main control CPU 600a performs initial value setting in a part of the main control RAM 600c (step S29), and proceeds to the process of step S41. Incidentally, when setting the initial value, the initial value is set in a relief number counter, which will be described later.

<Main control: Description of main processing>
On the other hand, if the signal of the RAM clear switch 620 is OFF (step S25: NO), the main control CPU 600a outputs a door open signal indicating whether the upper open/close door 7 and the lower open door 8 are open, and a setting key. The signal of the switch 630 is obtained (step S30), and it is confirmed whether or not all of them are ON (step S31). If all are not ON (step S31: NO), the process proceeds to step S40.

<Main control: Main processing: Description of setting confirmation processing>
On the other hand, if all are ON (step S31: YES), the main control CPU 600a transmits a set value command (effect control command DI_CMD) reflecting the set value to the sub control board 80 (step S32).

Next, the main control CPU 600a sets a timer to 30 seconds for outputting a security signal to a hall computer (not shown) used for managing game islands of the game arcade through an external terminal (not shown). (step S33).

Next, the main control CPU 600a sets ON a security signal to be output to a hall computer (not shown) used for managing game islands of the game arcade via an external terminal (not shown), Then, a security signal is output to the hall computer (not shown) for 30 seconds (30s) set by the timer (step S34).

Next, the main control CPU 600a outputs the set value to the LED data port (step S35).

Next, the main control CPU 600a sets a predetermined value in a register in the main control CPU 600a so as to wait 4 ms, and performs a countdown process (step S36).

Next, the main control CPU 600a performs power supply abnormality check processing (step S37). This power supply abnormality check process is the same as the power supply abnormality check process shown in FIG.

Next, the main control CPU 600a creates switch edge data for the setting key switch 630 signal from the previous and current level data of the setting key switch 630 (step S38). The main control CPU 600a stores the created edge data in the main control RAM 600c.

Next, the main control CPU 600a checks the edge data stored in the main control RAM 600c (step S39), and if the setting key switch 630 is ON (step S39: NO), returns to the process of step S34.

<Main control: Description of main processing>
On the other hand, if the setting key switch 630 is OFF (step S39: YES), initial values such as a backup flag and an error detection timer are set in a part of the main control RAM 600c (step S40).

Next, the main control CPU 600a transmits to the sub-control board 80 a command (effect control command DI_CMD) indicating power failure recovery by RAM clearing or power failure recovery by backup (step S41). When a command (effect control command DI_CMD) indicating whether power is restored by backup is transmitted to the sub-control board 80, the sub-control board 80 uses the relief number command as the effect control command DI_CMD based on the value of the relief number counter described later. 80.

Next, the main control CPU 600a performs a game state notification information update process for updating the game state notification information (step S42).

Next, the main control CPU 600a sets the internal function register (step S43). Specifically, the firing control signal is set to ON and transmitted to the payout control board 70 . As a result, the payout control board 70 controls the launch control board 71 to start operating. In addition, the CTC 644 (see FIG. 15), which is provided inside the main control CPU 600a and has the function of generating a constant cycle pulse output and the function of measuring time, etc., is set. That is, the main control CPU 600a sets the time constant register of the CTC 644 so that timer interrupts are periodically applied every 4 ms.

Thus, the above processing is the initial processing in the main control main processing.

Next, the main control CPU 600a calculates performance such as the total number of game balls shot into the game area 40, including the number of winning balls and the number of non-winning balls, in a state in which interrupts to itself are set to a prohibited state (step S44). The processing of prize ball winning prize number management processing 1 is performed (step S45). Then, after performing various random number counter updating processes (step S46), the main control CPU 600a returns to the interrupt permission state (step S47), returns to step S44, and repeats the processing of steps S44 to S47. process. Note that this loop processing and interrupt processing, which will be described later, are regular processing.

Thus, according to the present embodiment, when the power is turned off for some reason during setting change and then the power is turned on again, if the setting switching process (step S19) shown in FIG. 35 is not performed, steps S22 to step As shown in the process of S24, the RAM is made to be abnormal, and only when the setting switching process (step S19) shown in FIG. 35 is performed, the normal game state is entered. Further, as shown in step S57 shown in FIG. 37, time is not monitored during the setting change, and if the setting is being changed, a security signal is output from the external terminal. As shown in steps S33 and S34, the security signal is output from the external terminal for a predetermined time by time monitoring. The reason why the time is not monitored while the settings are being changed is that the time required for the setting change operation is uncertain depending on the operator. This is because the processing load increases when the processing for extending the monitoring time during operation is included.

Thus, conventionally, when an abnormality occurs in the RAM value due to a power failure, there is a possibility that the game will be restarted from the setting change state while the setting value and the like may still affect the game. However, if the processing as in the present embodiment is performed, it is possible to reduce the possibility that the game will be restarted while the game may still be affected.

Further, in the processing of this embodiment, when the power is turned off for some reason during the setting change and then the power is turned on again, if the setting switching processing (step S19) shown in FIG. 35 is not performed, steps S22 to step In the power supply abnormality check process, the main control CPU 600a clears the output data of the output port but does not set the backup flag to ON so that the RAM abnormality occurs as shown in the process of S24. In addition, when clearing the output data of the output port, the main control CPU 600a clears the output data of the output port (for example, the LED data port and the LED common port) used when changing the setting, and also clears the output data used when changing the setting. The output data of no output port is also cleared.

In this embodiment, the set value of the probability of generating a special game state advantageous to the player (for example, the set value of "00H" to "05H" corresponding to "1" to "6") is set in six stages. Although an example that can be changed is shown, even if there is only one setting value (for example, the setting value of "00H" corresponding to "1"), the setting change function as described above is provided in order to share the components and programs. It's okay to be At this time, in the setting switching process shown in FIG. At step S56 shown in 37, the value of the W register is set to "00H". Thereby, the setting change process can be executed by the same program as the program when there are a plurality of setting values. Thus, even if the main control CPU 600a overwrites the setting value stored in the main control RAM 600c (see FIG. 6) in step S67 shown in FIG. I have nothing to do. This makes it possible to share members and programs.

<Main control: Description of timer interrupt processing>
Next, with reference to FIG. 39, a timer interrupt program that interrupts the above-described main processing and is started every 4 ms will be described.

When this timer interrupt occurs, save processing for saving the contents of the register group in the main control CPU 600a to the stack area of the main control RAM 600c is executed (step S100), and then voltage abnormality check processing is executed (step S101). This voltage abnormality check process is the same as the power supply abnormality check process shown in FIG.

Next, the main control CPU 600a controls the special symbol 1 start switch 44a (see FIG. 6), the special symbol 2 start switch 45a (see FIG. 6), the normal symbol start switch 47a (see FIG. 6), and the upper right general Winning gate switch 48a1 (see FIG. 6), upper left general winning gate switch 48b1 (see FIG. 6), middle left general winning gate switch 48c1 (see FIG. 6), lower left general winning gate switch 48d1 (see FIG. 6), and an out port. ON/OFF signals of various switches including the switch 49a (see FIG. 6) and the big winning opening switch 46c (see FIG. 6) are input, and the ON/OFF signal level and its rise are stored in the work area in the main control RAM 600c. The state is stored (step S102). At this time, the main control CPU 600a transmits information as to whether or not the player has played the game by touching the handle 16 to the sub-control board 80 as the effect control command DI_CMD. As a result, as shown in FIG. 24(a), even when the movable accessory device 43 is moving to the front of the liquid crystal display device 41 during the customer waiting demonstration, the sub-control board 80 can be used by the player. By receiving information as to whether or not the player has played a game by touching the handle 16, the sub-control board 80 can enter the game ball in FIG. As shown, the movable accessory device 43 is controlled to return to the origin position (original position), the liquid crystal display device 41 stops the customer waiting demonstration, and displays a normal screen ( (See image P60A shown in FIG. 24(b)). When transmitting the information as to whether or not the player touched the handle 16 to play the game as the effect control command DI_CMD to the sub-control board 80, the one-chip microcomputer 600 uses the asynchronous serial communication circuit ( CH1) 647 is used to transmit to the sub-control board 80 by serial transmission. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17(b)). Also, at this time, if the big winning opening switch 46c (see FIG. 6) is ON, the counter for counting the number of balls obtained by the big win is updated.

Next, the main control CPU 600a performs timer subtraction processing of various timers (normal symbol variation timer, normal symbol role timer, etc.) that manage the time of each game operation (step S103).

Next, the main control CPU 600a performs random number management processing (step S104). Specifically, it carries out a process of updating random numbers such as normal symbols and special symbols used in the lottery.

Next, the main control CPU 600a performs error management processing (step S105). In the error management process, the supply of game balls is stopped, or the game balls are jammed, the special symbol 1 start switch 44a (see FIG. 6), the special symbol 2 start switch 45a (see FIG. 6), Normal symbol start opening switch 47a (see FIG. 6), upper right general winning opening switch 48a1 (see FIG. 6), upper left general winning opening switch 48b1 (see FIG. 6), middle left general winning opening switch 48c1 (see FIG. 6), lower left It is to determine whether there is an abnormality inside the device, such as disconnection of the general winning opening switch 48d1 (see FIG. 6), the out opening switch 49a (see FIG. 6), and the big winning opening switch 46c (see FIG. 6). be. In addition, when some error occurs, a command (effect control command DI_CMD) corresponding to the error is transmitted to the sub-control board 80 . At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. 15 to perform serial transmission to the sub control board 80 . Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17(b)).

Next, the main control CPU 600a executes prize ball management processing (step S106). This prize ball management process outputs a payout control command PAY_CMD for causing the payout/launch control board 70 (see FIG. 6) to perform a payout operation. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17(b)). Also, a command (effect control command DI_CMD) corresponding to the value of a counter that counts the number of balls obtained by a big hit is transmitted to the sub-control board 80 . As a result, the sub-control CPU 800 a transmits to the VDP 803 a command list related to an image (video) to be displayed on the liquid crystal display device 41 according to the received counter value. As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41. , images as shown in FIGS. 27 to 31 are displayed.

Next, the main control CPU 600a executes normal symbol processing (step S107). In this normal design process, a winning lottery for normal symbols is executed, and based on the result of the lottery, the variation pattern of the normal symbols and the stop display state of the normal symbols are determined. The details of this processing will be described later.

Next, the main control CPU 600a executes normal electric accessory management processing (step S108). In this normal electric auditors management process, a signal relating to the control of the normal electric auditors solenoid 45c (see FIG. 6) necessary for generating the normal electric auditors open game is generated based on the lottery result of the normal symbol processing (step S107). It is a thing.

Next, the main control CPU 600a executes special symbol processing (step S109). In this special design process, a lottery for the special design is executed, and the variation pattern of the special design and the stop display mode of the special design are determined based on the result of the lottery. The details of this processing will be described later.

Next, the main control CPU 600a executes a special electric accessary product management process (step S110). In this special electric accessary product management process, when the jackpot lottery result is "big hit" or "small hit", setting processing necessary for executing and controlling the winning game corresponding to the hit is performed. be. At this time, a signal for controlling the special electric accessory solenoid 46b (see FIG. 6) is also generated. In addition, when the jackpot lottery result is “big hit” or “small hit”, a command (effect control command DI_CMD) related thereto is transmitted to the sub-control board 80 . In addition, the main control CPU 600a sets an initial value to a relief number counter, which will be described later, when the jackpot process starts or when the jackpot process ends in the process of step S110. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. 15 to perform serial transmission to the sub control board 80 . Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17(b)).

Next, the main control CPU 600a performs right-handed notification information management processing (step S111). In this right-handed informing information management process, right-handed is advantageous, such as when the opening/closing member 45b is opened a predetermined number of times for a predetermined period of time, or when the opening/closing door 46a is opened and a large winning opening (not shown) is opened. In , a process for displaying a "shooting position guidance effect (right hitting notification effect)" for notifying a right hitting instruction is performed. When a right-handed notification effect is performed, a command (effect control command DI_CMD) related to the right-handed notification effect is transmitted to the sub-control board 80 in this right-handed notification information management process. In addition, in the right-handed notification information management process, when the player hits right in the normal game state (no low-accuracy power support state), a command related to the left-handed warning notification (effect control command DI_CMD) is sent to the sub-control board 80. sent. As a result, the liquid crystal display device 41 is caused to display an image prompting the player to "hit left" or the like. However, as shown in FIG. 9(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and when shifting to the second time-saving gaming state (state with low-accuracy power support), the second When the player hits right from the variation of the special symbols before transitioning to the time-saving game state (state with low-accuracy power support), a command (production control command DI_CMD) related to left-handed warning notification is sent to the sub-control board 80. Or, a command (effect control command DI_CMD) related to left-handed warning notification is sent to the sub-control board 80, and the sub-control CPU 800a controls not to perform left-handed warning notification. As a result, it is possible to prevent a situation in which the interest of a player who knows the number of times until transition to the second time-saving game state (state with low-accuracy power support) shown in FIG. 9(b) is reduced. At this time, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. 15 to perform serial transmission to the sub control board 80 . Therefore, at this time, the main control CPU 600a stores the data to be transmitted in the transmission buffer register TXBUF (see FIG. 17(b)).

Next, the main control CPU 600a executes LED management processing (step S112).

Next, the main control CPU 600a executes external terminal management processing (step S113). In this external terminal management process, a hall computer (not shown) used for management of game islands in a game arcade stores, during a winning game, the number of occurrences of winning, the number of fluctuations of special symbols, winning ball detection information for winning openings, Predetermined game information such as time-saving game state information and security information is output from an external terminal (not shown). At this time, in the second time-saving game state (state with low-accuracy power support) shown in FIG. Or, after outputting the state transition time information from an external terminal (not shown), the information during the time saving game state is output from the external terminal (not shown). Then, in the first time-saving gaming state (with low-accuracy power support) shown in FIG. 9(b) and the first time-saving gaming state (with low-accuracy power support) shown in FIG. Output the information during the time saving game state from the external terminal (not shown), or output the information during the time saving game state from the external terminal (not shown) after outputting the jackpot information from the external terminal (not shown) . Thus, in this way, the second time-saving gaming state shown in FIG. Since it does not pass through the hit, it is possible to distinguish between those that have passed through the hit and those that have not passed through the hit. becomes possible. It should be noted that the information at the time of state transition is output based on the fact that a relief activation flag, which will be described later, is set to ON.

Next, the main control CPU 600a performs solenoid management processing (step S114). At this time, the main control CPU 600a checks the signal related to the control of the normal electric auditors product solenoid 45c (see FIG. 6) generated in the normal electric auditors product management process (step S108), and also confirms the special electric auditors product management process ( A signal relating to the control of the special electric accessory solenoid 46b (see FIG. 6) generated in step S110) is checked. Based on this signal, the operation/stop of the normal electric accessory solenoid 45c or the special electric accessory solenoid 46b is controlled to open or close the opening/closing member 45b (see FIG. 5), or open or close the big prize opening (not shown). The open/close door 46a (see FIG. 5) is operated so that the is opened or closed.

Next, the main control CPU 600a performs out-of-use area processing (step S115). In this process, a process of displaying the performance display value calculated in the winning ball number management process 1 of step S45 shown in FIG. 36 on the measurement/setting display device 610 (see FIG. 6) is performed. Further, in the certification test (testing test) of the game machine, processing for updating the test shooting test signal used when outputting various signals related to the game to the testing machine is performed.

Next, the main control CPU 600a clears the WDT 643 shown in FIG. 15 (step S116), returns it to the interrupt enabled state (step S117), restores the contents of the register saved in the stack area of the main control RAM 600c, and restores the contents of the timer interrupt. (step S118). As a result, the interrupt processing routine returns to the main processing (see FIG. 35).

Thus, as shown in FIG. 23, after 20 to 30 ms (see timing T21) after the power is cut off (see timing T20), the voltage abnormality signal ALARM becomes "L" level. When the timer interrupt occurs, the one-chip microcomputer 600 is supplied with a voltage (DC12V, DC5V) capable of executing control of the game operation shown in FIG. processing will be performed. Then, as shown in FIG. 23, the supply of the voltage (DC12V, DC5V) capable of executing the control of the game operation is stopped after 20 ms or more from the timing T21 (refer to the timing T22), so the second timer interrupt will occur. At this time, when the voltage abnormality check process of step S101 shown in FIG. 39 is executed, the value of the power supply abnormality confirmation counter becomes 2 or more, so the processes of steps S86 to S91 shown in FIG. is repeated to wait for the voltage to drop. Therefore, with the first timer interrupt, the main control CPU 600a stores data to be sent in the transmission buffer register TXBUF (see FIG. 17(b)). Data to be transmitted is not stored in the register TXBUF (see FIG. 17(b)).

Therefore, data to be transmitted is not stored (set) in the transmission buffer register TXBUF (see FIG. 17(b)) except for the first timer interrupt after the power is turned off. Therefore, the transmission time during serial communication is longer than the time from when the voltage abnormality signal ALARM becomes "L" to the voltage at which the control of the game operation cannot be executed (see timing T21 to timing T22 shown in FIG. 23). 17(a), the data stored (set) in the transmission buffer register TXBUF (see FIG. 17(b)) is , the serial communication is completed by the time (refer to timing T21 to timing T22 shown in FIG. 23) until the voltage reaches a level at which game operation control cannot be executed. As a result, the payout operation can be performed normally even if a power failure occurs in a situation where prize ball information to be paid out remains on the main control side.

In addition, the main control CPU 600a stores (sets) the data to the effect that the backup process will be shifted to the backup process due to the power shutdown in the transmission buffer register TXBUF (see FIG. 17(b)) at the first timer interrupt after the power shutdown. is possible, it becomes possible to transmit to the payout/launch control board 70 and the sub-control board 80 that the main control board 60 has been powered off and has shifted to backup processing. This enables these control boards to execute processing in preparation for power shutdown.

On the other hand, if the baud rate setting is set high in order to increase the amount of data to be transmitted, as described above, for example, 12.5 bits can be transmitted in 1 ms. 17(b)), the second timer interrupt occurs after the start of serial transmission, and the value of the power failure confirmation counter is 2 or more (step S85 shown in FIG. 38: YES), the serial communication will be completed. Thus, even in this case, the payout operation can be performed normally even if a power failure occurs in a situation where prize ball information to be paid out remains on the main control side.

On the other hand, as described in the timer interrupt processing shown in FIG. 39, within one timer interrupt processing, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH0) 646 shown in FIG. In transmitting the payout control command PAY_CMD to the payout/launch control board 70, only one payout control command PAY_CMD is stored (set) in the transmission buffer register TXBUF (see FIG. 17(b)). On the other hand, within one timer interrupt process, the one-chip microcomputer 600 uses the asynchronous serial communication circuit (CH1) 647 shown in FIG. In doing so, a plurality of effect control commands DI_CMD are stored (set) in the transmission buffer register TXBUF (see FIG. 17(b)).

Thus, if only one payout control command PAY_CMD is stored (set) in the transmission buffer register TXBUF (see FIG. 17(b)) in one timer interrupt process, one time With this timer interrupt, one payout control command PAY_CMD can be transmitted, so that untransmitted commands will not continue to be stored (set) in the transmission buffer register TXBUF (see FIG. 17(b)). . Therefore, even if the one-chip microcomputer 600 is reset due to power shutdown, the unsent payout control command PAY_CMD is not stored (set) in the transmission buffer register TXBUF (see FIG. 17(b)). Therefore, it is possible to prevent a situation in which the player is disadvantaged by clearing the unsent payout control command PAY_CMD.

<Main control: Description of normal symbol processing>
Next, referring to FIG. 40, the normal symbol processing will be described in detail.

As shown in FIG. 40, in the normal symbol processing, first, in the normal symbol starting port 47 (see FIG. 5) consisting of a gate, it is confirmed whether or not the passage of the game ball is detected. The signal level of the normal symbol starting port switch 47a (see FIG. 6) is confirmed (step S150). Then, when the passage of the game ball is detected (step S150: YES), the main control CPU 600a determines whether the number of start suspension balls of the normal symbol is, for example, 4 or more, so that the number of start suspension balls of the normal symbol is stored. Check the main control RAM 600c that is stored (step S151). At that time, if the number of starting reservation balls in the normal design is less than 4 (step S151: ≠MAX), the number of starting reservation balls in the normal design is added by 1 (step S152). After that, the main control CPU 600a stores the normal symbol hit determination random number value used in the normal symbol win/loss lottery in the main control RAM 600c in which the number of start suspension balls of the normal symbol is stored (step S153), and step S154. proceed to the processing of

On the other hand, in step S150, when the passage of the game ball is not detected (step S150: NO), in step S151, when it is determined that the number of start suspension balls in the normal design is 4 or more (step S151: = MAX), the process of steps S152 and S153 is not performed, and the process proceeds to step S154.

When proceeding to the process of step S154, the main control CPU 600a checks whether the normal symbol per operation flag is set to ON, that is, whether the normal symbol per operation flag is set to 5AH (step S154). If 5AH is set in the normal design winning operation flag (step S154: ON), it is determined that the normal design is in the process of winning, and after updating the display data of the normal design (step S163), normal design processing is performed. finish.

On the other hand, if 5AH is not set to the operation flag per normal symbol (step S154: OFF), the processing state indicating the behavior of the normal symbol, that is, the value of the normal symbol operation status flag is confirmed (step S155). Then, if the normal design operation status flag is 00H, the main control CPU 600a judges that it is in a state before the start of fluctuation of the normal design, proceeds to step S156, and determines whether the number of start suspension balls of the normal design is 0 or not. Confirm (step S156).

The main control CPU 600a confirms the main control RAM 600c in which the number of starting pending balls of the normal symbol is stored, and when it is determined that it is 0 (step S156:=0), updates the display data of the normal symbol. After performing (step S163), the normal design process is finished. On the other hand, if it is determined not to be 0 (step S156: ≠0), 1 is subtracted from the number of start-holding balls of normal symbols (step S157).

After that, the main control CPU 600a uses the normal symbol hit determination table NPP_TBL shown in FIG. 51(a) to perform a hit determination of a random value corresponding to the normal symbol starting hold ball number stored in the main control RAM 600c. That is, the main control CPU 600a, if the normal symbol probability variation flag indicating the game state is OFF, the random number is the lower limit value of the normal symbol hit determination table NPP_TBL (normal state) shown in FIG. 249) or more and the upper limit value (250 in the figure) or less is determined, and if the lower limit value or more and the upper limit value or less, the normal symbol hit determination flag is set to 5AH and turned ON. Otherwise, the normal symbol hit determination flag is turned OFF.

On the other hand, if the normal symbol probability variation flag indicating the game state is ON, the random number is the lower limit value (4 in the illustration) of the normal symbol hit determination table NPP_TBL (probability variation state) shown in FIG. 51 (a). A value (250 in the figure) is determined, and if it is equal to or more than the lower limit value and equal to or less than the upper limit value, 5AH is set to the normal symbol hit determination flag and turned ON. Otherwise, a process of setting the normal symbol hit determination flag to OFF is performed (step S158).

Then, the main control CPU 600a determines a stop symbol (normal symbol stop symbol) based on the lottery result determined in the random number lottery process (step S159).

Next, the main control CPU 600a confirms whether or not the normal symbol time saving flag for shortening the normal symbol variation time is set to ON, and if it is set to ON, sets the variation time corresponding to the normal symbol variation timer. However, if it is set to OFF, a process of setting a normal variation time to the normal symbol variation timer is performed (step S160).

In addition, in the present embodiment, in the electric sapo state, the winning probability of the normal symbol is described as an example with a high probability state. In the second time-saving game state, the game state is shifted to the second time-saving game state without going through a big hit, so there is a possibility that the rule prohibits making the winning probability of the normal symbol high probability state. In that case, the winning probability of the normal design remains the same as the normal game state, and the normal design time-saving game state in which the fluctuation time of the normal design is shortened is set. As a result, even if the normal patterns do not reach a high probability state, the fluctuation time of the normal patterns is shortened, the frequency of lottery of the normal patterns is increased, and the normal patterns are easily won. In addition, when shifting to the first time-saving game state, the winning probability of normal symbols may be set to a high probability state, and when shifting to the second time-saving game state, the winning probability of normal symbols may not be changed from the normal game state. . On the other hand, in both the case of shifting to the first time-saving game state and the case of shifting to the second time-saving game state, the winning probability of normal symbols may not be changed from the normal game state.

Next, the main control CPU 600a shifts the storage area of the main control RAM 600c storing the random number used for the winning lottery of the normal symbols corresponding to the number of start pending balls of the normal symbols (step S161). That is, assuming that the number of start-holding balls of the normal design can be reserved up to 4, the random number used for the lottery of the normal design corresponding to the number of start-holding balls of the normal design of 4 is set to the number of start-holding balls of the normal design of 3. The random number used for the lottery of the corresponding normal symbol is shifted to the main control RAM 600c storing the random number used for the lottery of the normal symbol corresponding to the number of start-holding balls 3 of the normal symbol. The random number used for the lottery for the normal pattern corresponding to the number of reserved balls 2 is shifted to the main control RAM 600c storing the random number used for the lottery for the normal pattern corresponding to the number of starting reserved balls 2 for the normal pattern. is shifted to the main control RAM 600c in which the random number used for the winning lottery of the normal symbol corresponding to the number of start-holding balls 1 of the normal symbol is stored.

After this process, the main control CPU 600a sets the normal symbol operation status flag used in step S155 to 01H, and the random number used for the normal symbol success/fail lottery corresponding to the normal symbol starting hold ball number 4 is 00H is set in the stored main control RAM 600c (step S162).

Then, after completing the process of step S162, the main control CPU 600a updates the display data of the normal symbol (step S163), and ends the normal symbol process.

On the other hand, the main control CPU600a, in the above step S155, the processing state indicating the behavior of the normal symbol, that is, if the value of the normal symbol operation status flag is 01H, the main control CPU600a determines that the normal symbol is fluctuating. It judges, it progresses to step S164, and it confirms whether a normal design variation timer is 0 (step S164). If the normal symbol fluctuation timer is not 0 (step S164: ≠0), the normal symbol display data is updated (step S163), and the normal symbol processing is finished. Then, if the normal symbol variation timer is 0 (step S164: = 0), the main control CPU 600a sets 02H to the normal symbol operation status flag used in step S155, and the normal symbol lottery result is fixed. In order to maintain the time, for example, a period of about 600 ms is set in the normal symbol variation timer (step S165).

After completing the process of step S165, the main control CPU 600a updates the display data of the normal symbol (step S163), and ends the normal symbol process.

On the other hand, in the above step S155, the main control CPU 600a is in a processing state that indicates the behavior of the normal symbol, that is, if the value of the normal symbol operation status flag is 02H, the main control CPU 600a determines that the normal symbol is during the confirmation time (normal The symbol variation is finished and stopped), and the process proceeds to step S166 to confirm whether or not the normal symbol variation timer is 0 (step S166). If the normal symbol fluctuation timer is not 0 (step S166: ≠0), the normal symbol display data is updated (step S163), and the normal symbol processing is finished. Then, if the normal symbol variation timer is 0 (step S166:=0), the main control CPU 600a sets the normal symbol operation status flag used in step S155 to 00H (step S167), and determines the normal symbol hit. It is checked whether the flag is set to ON (5AH is set) (step S168).

Thus, if the normal symbol hit determination flag is set to OFF (5AH is not set) (step S168: OFF), the main control CPU 600a updates the normal symbol display data (step S163), Finish normal design processing. Then, if the normal symbol hit determination flag is set to ON (5AH is set) (step S168: ON), the main control CPU 600a turns ON the normal symbol hit operation flag used in step S154 (sets 5AH). (step S169), the normal design process is finished.

<Main control: Explanation of special symbol processing>
Next, with reference to FIGS. 41 to 50, the special symbol processing will be described in detail.

As shown in FIG. 41, in the special symbol processing, first, a game ball enters (winning ball) at the special symbol 1 start port switch 44a (see FIG. 6) of the special symbol 1 start port 44 (see FIG. 5). It is confirmed whether or not it is detected (step S200), and furthermore, in the special symbol 2 start port switch 45a (see FIG. 6) of the special symbol 2 start port 45 (see FIG. 5), the entering ball (winning ball) of the game ball is detected. It is checked whether or not it has been detected (step S201).

<Main control: Special symbol processing: Description of starting port check processing>
This process will be described in detail with reference to FIG. 42. The main control CPU 600a confirms whether or not the game ball has entered (winning) the special symbol 1 start port 44 or the special symbol 2 start port 45, that is, the special The level of the special pattern 1 starting port switch 44a of the pattern 1 starting port 44 or the special pattern 2 starting port switch 45a of the special pattern 2 starting port 45 is confirmed (step S250). Thereby, if the entry of the game ball (winning a prize) is not detected (step S250: NO), the special symbol processing is finished.

On the other hand, if the entry of a game ball (winning a prize) is detected (step S250: YES), the main control CPU 600a determines whether or not a predetermined number of starting and holding balls that trigger the fluctuation of special symbols are stored in the main control RAM 600c. (step S251). If the starting pending ball number is less than 4 (step S251: ≠ MAX), the starting pending ball number is added by 1 (+1) (step S252).

Next, the main control CPU 600a stores the random number value used when stopping the special symbols, the random number value for the fluctuation pattern, and the random number value for judging the big hit in the main control RAM 600c, which stores the number of starting pending balls that trigger the variation of the special symbols. (step 253).

Next, the main control CPU 600a confirms the current gaming state (whether or not the special symbol jackpot determination flag is set to ON, etc.), and determines whether or not the prefetching is prohibited (step S254). Then, if it is not in the look-ahead prohibition state (step S254: NO), the main control CPU 600a acquires the big hit determination random value used for the special symbol lottery stored in the main control RAM 600c in step S253 (step S255 ), and further acquires a random number determination table (not shown) at the time of start-up winning (step S256).

Next, the main control CPU 600a performs a jackpot lottery using the random number value for jackpot determination acquired in step S255 and the random number determination table (not shown) at the time of start-up winning acquired in step S256. At step S253, the special symbol random number value stored in the main control RAM 600c is used to determine the type of jackpot (rank-up bonus hit, normal jackpot, etc.), and the variation pattern random number value is used to determine the variation pattern. Then, a special symbol start opening winning command is generated accordingly (step S257). In addition, at this time, not only the jackpot lottery, but also the small lottery and special electric support symbol lottery are performed, and either the random number for the special symbol described above is used, or a random number different from the random number for the special symbol is used. Use to determine the type of small hit and the type of special electric sapo symbol, use the random number for the variation pattern to determine the variation pattern, and generate a special symbol start opening winning command accordingly.

Next, the main control CPU 600a generates a start pending addition command of lower bytes according to the generated special symbol start opening winning command (step S258).

On the other hand, the main control CPU 600a finishes the processing of step S258, or the number of starting holding balls of special symbol 1 or 2 is 4 or more in step S251 (step S251:=MAX), or pre-reading If it is in the prohibited state (step S254: YES), a start suspension addition command of the upper byte corresponding to the increased number of start suspension balls is generated (step S259).

Next, the main control CPU 600a combines the low-order byte starting pending addition command generated in step S258 with the high-order byte starting pending addition command generated in step S259, and then outputs the starting pending addition command (effect A control command DI_CMD) is transmitted to the sub-control board 80 (step S260).

<Main control: Explanation of special symbol processing>
Thus, when the processing of step S200 and step S201 shown in FIG. 41 is completed, the main control CPU 600a determines whether the special symbol small hit operation flag is set to ON, that is, whether the special symbol small hit operation flag is set to 5AH. It is confirmed whether there is (step S202). If 5AH is set in the special symbol small hit operation flag (step S202: ON), it is determined that the special symbol is in the middle of a small hit, and after updating the display data of the special symbol (step S208), special Complete pattern processing.

On the other hand, if the special symbol small winning operation flag is not set to 5AH (step S202: OFF), is the special symbol big winning operation flag set to ON, that is, is the special symbol big winning operation flag set to 5AH? is confirmed (step S203). If 5AH is set in the special symbol big hit operation flag (step S203: ON), it is determined that the special symbol is in the midst of a big hit, and after updating the display data of the special symbol (step S208), special symbol processing is performed. finish.

On the other hand, if 5AH is not set in the special symbol jackpot operation flag (step S203: OFF), the processing state indicating the behavior of the special symbol, that is, the value of the special symbol operation status flag is confirmed (step S204). More specifically, if the value of the special symbol operation status flag is 00H or 01H, the main control CPU 600a is in a special symbol variation waiting state (a special symbol variation is not performed and it is in a standby state for the next variation. It indicates that there is), and performs special symbol variation start processing (step S205).

<Main control: Special symbol processing: Description of special symbol variation start processing>
This process will be described in detail with reference to FIG. 43. The main control CPU 600a confirms whether or not the number of starting pending balls, which triggers the variation of the special symbols, is 0 (step S300). That is, the main control CPU 600a confirms whether or not it is stored in the main control RAM 600c, and when it is determined that the number of starting pending balls is 0 (step S300:=0), the value of the special symbol operation status flag is 00H. (step S301). If the value of the special symbol operation status flag is 00H (step S301: YES), the special symbol variation start process is terminated.

On the other hand, if the value of the special symbol operation status flag is not 00H (step S301: NO), the main control CPU 600a transmits the customer waiting demo command as the effect control command DI_CMD to the sub control board 80 (see FIG. 6) (step S302).

Next, the main control CPU 600a sets the special symbol operation status flag to 00H (step S303), and ends the special symbol variation start process.

On the other hand, when the main control CPU 600a determines that the number of start-holding balls is not 0 (step S300: ≠ 0), it subtracts 1 (-1) from the number of start-holding balls (step S304), and controls the start-holding subtraction command. It is transmitted as a command DI_CMD to the sub-control board 80 (sub-control CPU 800a) (step S305).

Next, the main control CPU 600a confirms the value of the relief number counter, which will be described later, and transmits the relief number command as the effect control command DI_CMD to the sub control board 80 (sub control CPU 800a) (step S306). Thereby, the sub-control CPU 800a can grasp how many times the special symbol losing variation shown in FIG. 9(b) has been executed. Therefore, as shown in FIG. 9(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and before shifting to the second time-saving gaming state (low-accuracy power support state), If the power supply is interrupted (power cut off), when the power supply is turned on again and the game is resumed, the sub-control CPU 800a displays the remaining number of times up to the predetermined number of times (for example, 1000 times) on the liquid crystal display device 41. The background image (video) to be played is made different from the background image (video) when returning to the game, or part of the lighting of the decorative lamps is controlled to be different from the lighting of the decorative lamps when returning to the game. be able to. In addition, as shown in FIG. 9(b), a predetermined number of times (for example, 1000 times) special symbol loss variation is executed, and the power supply is interrupted (power cut), when the power is turned on again to return to the game, the sub-control CPU 800a determines the predetermined number of times (for example, 1000 times) in the fluctuation of the special symbol in the first rotation after returning to the game. It is possible to control to execute an effect according to the remaining number of times up to.

<Main control: Special symbol processing: Explanation of relief number command transmission>
This process will be described in detail with reference to FIG. 44. The main control CPU 600a acquires the value (2-byte data) of the relief number counter, which will be described later (step S350).

Next, the main control CPU 600a confirms the value of the acquired relief number counter (step S351). If the value is 0 (step S351: YES), the process of transmitting the relief count command ends.

On the other hand, if the value is not 0 (step S351: NO), the main control CPU 600a divides the acquired relief number counter value by 100. Then, the main control CPU 600a stores the quotient obtained by division in the L register inside the main control CPU 600a, and stores the remainder in the H register inside the main control CPU 600a (step S352).

Next, the main control CPU 600a adds (+1) the L register and adds (+1) the H register (step S353).

Next, the main control CPU 600a stores DBH in the D register inside the main control CPU 600a, and stores the value of the L register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub-control board 80 (sub-control CPU 800a) as the first command relief count command 1 (effect control command DI_CMD) (step S354).

Next, the main control CPU 600a stores DCH in the D register inside the main control CPU 600a, and stores the value of the H register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub-control board 80 (sub-control CPU 800a) as the second command, the number of relief command 2 (effect control command DI_CMD) (step S355), and transmits the number of relief command. finish processing.

Thus, by doing so, the sub-control CPU 800a subtracts 1 from the lower byte of the first command and subtracts 1 from the lower byte of the second command. Then, the value of the lower byte of the first command from which 1 has been subtracted is multiplied by 100, and the value of the lower byte of the second command from which 1 has been subtracted is added. As a result, the sub-control CPU 800a can grasp how many times the special symbol losing variation shown in FIG. 9(b) has been executed. Also, when displaying a number on the liquid crystal display device 41 using the VDP 803, the number obtained by subtracting 1 from the lower byte of the first command is used as the number in the thousands and hundreds digits, and the number obtained by subtracting 1 from the lower byte of the second command is displayed. It will be displayed as digits in the tens and ones digits.

By doing so, not only is it possible to make the command structure easier to understand, but also the control load can be reduced.

<Main control: Special symbol processing: Description of special symbol variation start processing>
Thus, after completing the process of sending the relief number command (step S306) as described above, the main control CPU 600a checks the value of the special symbol time saving number counter described later, and uses the time saving number command as the production control command DI_CMD. It is transmitted to the control board 80 (sub-control CPU 800a) (step S307). In response to this, the sub-control CPU 800a does not display the current number of times of time saving on the liquid crystal display device 41 until the number of times of time saving falls below the predetermined number of times, or displays a fixed number of times such as 100 times on the liquid crystal display device 41. A command list related to images (video) is transmitted to the VDP 803 . As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41. , the current number of times of time saving is not displayed, or a fixed number of times such as 100 times is displayed. Then, when the predetermined number of times of time saving has been reached, the sub-control CPU 800a transmits to the VDP 803 a command list related to an image (video) to be displayed on the liquid crystal display device 41 based on the received time saving number of times information. As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41. , the current number of time reductions will be displayed.

<Main control: Special pattern processing: Explanation of time saving command transmission>
This process will be described in detail with reference to FIG. 45. The main control CPU 600a acquires the value (2-byte data) of the special symbol time-saving counter, which will be described later (step S360).

Next, the main control CPU 600a confirms the value of the acquired special symbol time saving number counter (step S361). If the value is 0 (step S361: YES), the process of sending the number of times of working hours command is finished.

On the other hand, if the value is not 0 (step S361: NO), the main control CPU 600a confirms whether the value of the acquired special symbol time saving number counter exceeds 100 (step S362). If the value exceeds 100 (step S362: YES), the main control CPU 600a stores DDH in the D register inside the main control CPU 600a and stores 7FH in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub-control board 80 (sub-control CPU 800a) as a time saving command (effect control command DI_CMD) (step S363), and finishes the time saving command transmission process. In response to this, the sub-control CPU 800a can confirm that the predetermined number of times of time saving (100) is not reached or less, and thus either does not display on the liquid crystal display device 41 or displays a fixed number of times such as 100 times on the liquid crystal display. A command list relating to an image (video) to be displayed on the device 41 is sent to the VDP 803 . As a result, the VDP 803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41. , the current number of times of time saving is not displayed, or a fixed number of times such as 100 times is displayed.

On the other hand, if the value is 100 or less (step S362: NO), the main control CPU 600a stores DDH in the D register inside the main control CPU 600a, and stores the DDH in the E register inside the main control CPU 600a. Stores the value of the lower byte of the count counter. Then, the main control CPU 600a transmits the value of the DE register to the sub-control board 80 (sub-control CPU 800a) as a time saving command (effect control command DI_CMD) (step S364), and finishes the time saving command transmission process.

<Main control: Special symbol processing: Description of special symbol variation start processing>
Thus, after finishing the time-saving command transmission process (step S307) as described above, the main control CPU 600a generates the random value used when stopping the special symbol, the random value for the variation pattern, and the random value for judging the jackpot (Fig. 42 (see step S253 of step S253) is stored in the main control RAM 600c (step S308), and the random value used for the special symbol lottery corresponding to the start suspension 4 is stored in the main control RAM 600c is set to 0 (step S309).

Next, the main control CPU 600a performs hit determination processing (step S310).

<Main control: Special symbol processing: Description of hit determination processing>
This process will be described in detail with reference to FIG. 46. The main control CPU 600a acquires a random value for judging a big hit from the main control RAM 600c that stores a random number for judging a big hit (see step S253 in FIG. 42) ( step S370).

Next, the main control CPU 600a acquires the address address of the hit determination table corresponding to the fluctuating special figure. That is, the address addresses of the special symbol big hit determination table SDH_TBL shown in FIG. 51(b) and the special symbol small hit determination table SDP_TBL shown in FIG. 51(c) are acquired (step S371).

Next, the main control CPU 600a changes the acquired address address to the address address where the determination value is stored (step S372).

Next, the main control CPU 600a acquires information as to whether the determination value differs for each set value (step S373), and confirms the value of the acquired information (step S374). If the acquired value is "0" (step S374:=0), the process proceeds to step S377, and if the acquired value is not "0" (step S374: ≠0), the main control CPU 600a A set value of the probability of generating a special game state advantageous to the player stored in the RAM 600c (see FIG. 6) (for example, a set value of "00H" to "05H" corresponding to "1" to "6"). is obtained (step S375).

Next, the main control CPU 600a changes the address to the address in which the determination value corresponding to the acquired set value is stored (step S376). For example, when acquiring the determination value of the upper limit value of the game state normal state (low probability state), if the acquired setting value is "1", the address where the determination value "10164" of the setting value 1 is stored If the setting value is "6", the address address that stores the judgment value "10200" of the setting value 6 is changed, and the address address that refers to the data of the judgment table is changed.

Next, the main control CPU 600a acquires the judgment value from the current address. For example, if the information on whether the judgment value is different for each set value is "000H", it is related to the jackpot, and if the information is "000H", the judgment value of "10000" is acquired, and the information whether the judgment value is different for each set value is " 001H" and the set value is "1", a determination value of "10164" is obtained (step S377).

Next, the main control CPU 600a changes the address address to the leading address where the next determination value is stored (step S378), and compares the acquired random number value for judging a big hit with the acquired determination value (step S379).

Next, the main control CPU 600a returns to the process of step S373 if the acquired random number value for judging a big hit is not smaller than the acquired judgment value (step S380: NO), The processing from step S373 to step S380 is repeated until it becomes smaller (step S380: YES).

Next, the main control CPU 600a acquires a special symbol big hit determination flag and a special symbol small hit determination flag according to the game state when the acquired random value for judging a big hit is smaller than the acquired judgment value (step S380: YES). (Step S381), the hit determination process ends.

<Main control: Special symbol processing: Description of special symbol variation start processing>
Thus, after finishing the hit determination process (step S310) as described above, the main control CPU 600a performs the special electric support symbol hit determination process (step S311). In addition, this process is a process of performing a lottery using a big hit determination random number when playing a game with a special electric support symbol without using it as a small winning symbol.

<Main control: Special symbol processing: Explanation of special electric sapo symbol hit determination processing>
This process will be described in detail with reference to FIG. 47. The main control CPU 600a acquires a random value for judging a big hit from the main control RAM 600c that stores a random number for judging a big hit (see step S253 in FIG. 42) ( step S390).

Next, the main control CPU 600a acquires the address address of the special electric sapo per symbol determination table corresponding to the fluctuating special figure. Here, the address address of the special electric support symbol determination table D_RNDJDG2 shown in FIG. 48 corresponding to the fluctuating special figure 1 is acquired. FIG. 48 shows special electric sapo symbol winning determination table data corresponding to the special electric sapo symbol winning determination table TDS_TBL shown in FIG. 51(d). This special electric support symbol win determination table will be described with reference to FIG. 48. In this special electric support symbol win determination table, determination values and values of special electric support symbol win determination flags are stored.

Specifically, as can be easily understood by referring to the special electric support symbol hit determination table TDS_TBL shown in FIG.
DW 30000
DB 000H
is programmed with

Also, as can be easily understood by referring to the special electric support symbol hit determination table TDS_TBL shown in FIG.
DW 30218
DB 05AH
is programmed with

On the other hand, as shown in FIG. 48, the upper limit value (65535) of the random number value for judging the big hit is programmed as follows in the special electric sapo symbol hit determination table.
DW65535
DB 000H

Thus, if the determination value for winning the special electric support symbol does not overlap with the range of the winning determination value for either the big win or the small win, it can be used in the winning determination process in step S310 shown in FIG. A lottery can be performed using the random number for judging a big hit.

Thus, the main control CPU 600a acquires the address address of the special electric support symbol hit determination table as described above (step S391).

Next, the main control CPU 600a changes the acquired address address to the address address where the determination value shown in FIG. 48 is stored (step S392).

Next, the main control CPU 600a acquires the judgment value shown in FIG. 48 from the current address (step S393).

Next, the main control CPU 600a changes the address address to the leading address where the next determination value is stored (step S394), and compares the acquired random number value for judging a big hit with the acquired determination value (step S395).

Next, the main control CPU 600a returns to the process of step S393 if the acquired random number value for judging a big hit is not smaller than the acquired judgment value (step S396: NO), The processing of steps S393 to S396 is repeated until it becomes smaller (step S396: YES).

Next, the main control CPU 600a acquires the special electric support symbol hit determination flag shown in FIG. Finish the special electric sapo symbol hit determination process.

<Main control: Special symbol processing: Description of special symbol variation start processing>
Thus, after finishing the special electric support symbol hit determination process (step S311) as described above, the main control CPU 600a stores the random value used when stopping the special symbol stored in the main control RAM 600c in step S253 of FIG. is used to generate a special symbol stop symbol (step S312).

Next, the main control CPU 600a prepares to shift to a game state such as a normal state, a time saving state, a latent probability variable state, or a probability variable state (step S313). It should be noted that here, out of the normal symbol time reduction flag, normal symbol probability change flag, special symbol time reduction flag and special symbol probability change flag set after the big hit, the flag corresponding to the game state after the shift is turned ON. Prepare in advance flag data for In addition, the time saving frequency set to the special symbol time saving frequency counter and the probability variation frequency set to the special symbol probability variation frequency counter are also prepared.

Next, the main control CPU 600a generates a special symbol variation pattern using the variation pattern random number value stored in the main control RAM 600c in step S253 of FIG. The command is transmitted to the sub-control board 80 (sub-control CPU 800a) as the effect control command DI_CMD (step S314). At this time, the main control CPU 600a refers to the variation pattern table shown in FIGS. First, the main control CPU 600a refers to the table TBL shown in FIG. 10(a). In the normal game state, the variation pattern table NOR_TBL shown in FIG. 10(b) is used as the variation pattern table to be referred to. And further, in the first time-saving game state shown in FIG. 9(b), or in the first time-saving game state shown in FIG. The variation pattern table JT1_TBL1 shown in is used, and the variation pattern table JT1_TBL2 shown in FIG. A variation pattern table JT1_TBL3 shown in 12(a) is used. Furthermore, in the second time-saving game state shown in FIG. 9(b) or the second time-saving game state shown in FIG. 9(c), the fluctuation of the special symbol of the first rotation is shown in FIG. The variation pattern table JT2_TBL1 is used, and the variation pattern table JT2_TBL2 shown in FIG. A variation pattern table JT2_TBL3 shown in 13 is selected. Thus, the variation pattern of the special symbol is generated according to the variation pattern table selected in this way, and the variation pattern command of the generated special symbol variation pattern is used as the effect control command DI_CMD as the sub control board 80 ( It is transmitted to the sub-control CPU 800a). In response to this, as shown in FIG. 9B, the sub-control CPU 800a performs a predetermined number of times (for example, 1000 times) special symbol loss variation, and the second time-saving game state (low-accuracy power support state) ), immediately after shifting to the second time-saving game state (low-accuracy power support state) without executing the time-saving rush effect at the time of the deviation fluctuation of the special symbol for the predetermined number of times (for example, 1000th time) , at the time of the 1001st change of the special symbols, a time-saving rush effect is executed, such as displaying an image prompting the player to "hit to the right" on the liquid crystal display device 41.例文帳に追加

Also, as shown in FIG. 9(b), when shifting to the second time-saving gaming state (state with low-accuracy power support), even if a special symbol lottery is won and the jackpot is won, the liquid crystal display device At 41, a time-saving rush effect including a notification of hitting to the right such as displaying an image prompting the player to "hit to the right" is first executed, and the effect changes from the middle.

Furthermore, FIG. 9 (c), or the first time-saving state shown in FIG. When returning to the low-accuracy power support state), the sub-control CPU 800a displays the result effect on the liquid crystal display device 41 at the final variation (for example, 100th time) of a predetermined number of times (for example, 100th time). display of acquired number of points, etc.). However, the variation of the special symbol reaches a predetermined number of times (for example, 100 times or more) from the second time-saving game state (state with low-accuracy electric support) shown in FIG. ), or when the variation of the special symbol reaches a predetermined number of times (for example, 1000 times) from the second time-saving game state (state with low probability power support) shown in FIG. When returning to the state without electric support, since the same variation pattern table as before the final variation is used to select the variation pattern, the variation pattern command for executing the result production is not sent to the sub-control CPU 800a. The sub-control CPU 800a performs control so that the liquid crystal display device 41 does not display the result effect after the predetermined number of final fluctuations.

In addition, at this step S314, the main control CPU 600a sets the variable time to the special symbol variable timer.

Next, the main control CPU 600a sets the special symbol fluctuating flag to 5AH and turns it ON (step S315).

Next, the main control CPU 600a generates a symbol designation command for designating a special symbol to be displayed on the liquid crystal display device 41 (step S316), and uses the generated symbol designation command as the effect control command DI_CMD. A process of transmitting to the control CPU 800a) is performed (step S317).

Next, the main control CPU 600a sets the special symbol operation status flag to 02H (step S318), and ends the special symbol variation start process.

<Main control: Explanation of special symbol processing>
On the other hand, as shown in FIG. 41, when the value of the special symbol operation status flag is 02H, the main control CPU 600a determines that the special symbol is fluctuating (indicating that the special symbol is currently fluctuating). During symbol variation processing is performed (step S206).

<Main control: Special symbol processing: Explanation of special symbol fluctuation process>
This process will be explained in detail using FIG. 49. First, the main control CPU 600a determines whether the variation time set in the special symbol variation timer in step S314 of FIG. is confirmed (step S400). If the special symbol variation timer is not 0 (step S400: NO), the main control CPU 600a ends the special symbol variation process.

On the other hand, if the special symbol variation timer is 0 (step S400: YES), the main control CPU 600a transmits the symbol determination command as the effect control command DI_CMD to the sub control board 80 (sub control CPU 800a) (step S401).

Next, the main control CPU 600a sets the special symbol operation status flag to 03H, and sets the special symbol fluctuating flag to 00H. Further, the main control CPU 600a sets the special symbol variation timer to a time of about 500 ms, for example, in order to maintain the result of the special symbol lottery for a certain period of time (step S402). After that, the main control CPU 600a ends the special symbol fluctuation process.

<Main control: Explanation of special symbol processing>
On the other hand, as shown in FIG. 41, when the value of the special symbol operation status flag is 03H, the main control CPU 600a indicates that the special symbol is being confirmed (indicating that the special symbol variation is finished and is stopped). It judges and performs processing during special design confirmation time (Step S207).

<Main control: Special symbol processing: Explanation of processing during special symbol confirmation time>
This process will be explained in detail using FIG. 50. First, the main control CPU 600a determines whether the variation time set in the special symbol variation timer in step S314 of FIG. is confirmed (step S450). If the special symbol variation timer is not 0 (step S450≠0), the main control CPU 600a ends the special symbol confirmation time processing.

On the other hand, if the special symbol variation timer is 0 (step S450=0), the main control CPU 600a sets the special symbol operation status flag to 01H (step S451), and whether the special symbol jackpot determination flag is set to ON. (Whether 5AH is set) is confirmed (step S452). If the special symbol jackpot determination flag is set to ON (if 5AH is set) (step S452: YES), the special symbol jackpot determination flag is set to 00H, and the special symbol jackpot operation flag is set to 5AH. Then, the normal symbol time saving flag is set to 00H, the normal symbol probability change flag is set to 00H, the special symbol time saving flag is set to 00H, and the special symbol probability change flag is set to 00H. Further, a process of setting 0000H to a special symbol shortening time number counter and 00H to a special symbol probability variation number counter, which will be described later, is performed (step S453).

Next, the main control CPU 600a sets 0000H to the relief number counter, and sets 0FFH to the relief activation flag indicating that the special symbol loss variation has been executed a predetermined number of times (for example, 1000 times) in the relief game (step S454). ). After that, the main control CPU 600a ends the special symbol confirmation time processing.

On the other hand, if the special symbol big hit determination flag is not set to ON (if 5AH is not set) (step S452: NO), the main control CPU 600a determines whether the special symbol small hit determination flag is set to ON ( 5AH is set) (step S455). If the special symbol small hit determination flag is set to ON (if 5AH is set) (step S455: YES), the special symbol small hit determination flag is set to 00H, and the special symbol small hit operation flag is set to 5AH. is set (step S456). In addition, when the small winning design and the special electric sapo design are used together, in preparation for the transition to the second time saving game state, the normal design time saving flag, the normal design probability variable flag and the special design time saving flag are turned ON (5AH set ), and set the number of times of time saving in the special symbol time saving number counter. Alternatively, in step S110 shown in FIG. 39, when the jackpot process starts, or when the jackpot process ends, the normal symbol time saving flag, normal symbol probability change flag and special symbol time saving flag are turned ON (5AH is set), Set the number of times of time saving in the special pattern time saving number counter. On the other hand, if the small winning symbol and the special electric sapo symbol are not used together, if the special electric sapo symbol hit determination flag is set to ON as in step S455, the special electric sapo symbol determination flag is set to 00H, As a preparation for shifting to the second time-saving game state, a normal pattern time-saving flag, a normal pattern probability variable flag and a special pattern time-saving flag are turned ON (5AH is set), and the number of times of time-saving is set in a special pattern time-saving counter.

After finishing the processing of step S456, or if the special symbol small hit determination flag is not set to ON (if 5AH is not set) (step S455: NO), the main control CPU 600a special symbol time saving It is checked whether the value of the number counter is 0 (step S457).

If the value of the special symbol time saving number counter is not 0 (step S457: NO), the value of the special symbol time saving number counter is subtracted by 1 (-1) (step S458), and the main control CPU 600a again, the special symbol time saving number of times It is checked whether the value of the counter is 0 (step S459). Then, if the value of the special symbol time-reduction counter is 0 (step S459: YES), the normal symbol time-reduction flag is set to 00H, the normal symbol probability variation flag is set to 00H, and the normal symbol time-reduction flag is set to 00H. set. Further, an initial value is set in the relief number counter (step S460).

After finishing the process of step S460, or the value of the special symbol time saving number counter is 0 (step S457: YES), or the value of the special symbol time saving number counter is not 0 (step S459: NO), the main The control CPU 600a confirms whether or not the value of the special symbol probability variation counter is 0 (step S461). If the value of the special symbol probability variation counter is 0 (step S461: YES), the process proceeds to step S465.

On the other hand, if the value of the special symbol probability variation number counter is not 0 (step S461: NO), the main control CPU 600a subtracts 1 from the value of the special symbol probability variation number counter (-1) (step S462), and again special symbols It is checked whether the value of the probability variation number counter is 0 (step S463). If the value of the special symbol probability variation counter is not 0 (step S463: NO), the process proceeds to step S465.

On the other hand, if the value of the special symbol probability variation counter is 0 (step S463: YES), the main control CPU 600a sets the normal symbol probability variation flag to 00H, sets the normal symbol probability variation flag to 00H, and sets the special symbol probability variation flag to 00H. is set to 00H, the process of setting 00H to the special symbol probability variation flag is performed (step S464), and the process proceeds to step S465.

Next, the main control CPU 600a confirms whether or not the special symbol probability variation flag is ON (5AH is set) (step S465). If the special symbol probability variation flag is set to ON (if it is set to 5AH) (step S465: YES), the main control CPU 600a finishes the process during the special symbol confirmation time.

On the other hand, if the special symbol probability variation flag is not set to ON (if it is not set to 5AH) (step S465: NO), the main control CPU 600a determines whether the relief activation flag is set to ON (5AH is set). is confirmed (step S466). If the relief activation flag is set to ON (if set to 5AH) (step S466: YES), the main control CPU 600a ends the special symbol confirmation time processing.

On the other hand, if the relief activation flag is not set to ON (if not set to 5AH) (step S466: NO), the main control CPU 600a checks whether the value of the relief counter is 0 (step S467 ). If the value of the relief number counter is 0 (step S466: YES), the main control CPU 600a ends the special symbol confirmation time processing.

On the other hand, if the value of the relief number counter is not 0 (step S467: NO), the value of the relief number counter is subtracted by 1 (-1) (step S468), and the main control CPU 600a again determines that the value of the relief number counter is It is checked whether it is 0 (step S469). If the value of the relief number counter is not 0 (step S469: NO), the main control CPU 600a ends the special symbol confirmation time processing. On the other hand, if the value of the relief number counter is 0 (step S469: YES), the main control CPU 600a turns on the special symbol time saving flag (sets 5AH) and sets the time saving number to the special symbol time saving number counter. Furthermore, the main control CPU 600a turns the relief activation flag ON (sets 5AH), turns the right-handed state flag ON (sets 5AH) (step S470), and ends the special symbol confirmation time processing. As described above, when the relief activation flag is set to ON, state transition time information is output from an external terminal (not shown) in step S113 shown in FIG.

Thus, the repair number counter is set to 0000H and cleared at step S26 shown in FIG. 36, and then set to an initial value at step S29 shown in FIG. And, in the normal game state, the count is executed in step S468 shown in FIG. 50, FIG. 9 (b), or the second time-saving game state shown in FIG. 9 (c) (state of special symbol time-saving flag ON) In this case, as indicated by step S466: YES in FIG. 50, the repair number counter is not cleared (0000H is not set) and counting is not performed. And further, the number of relief counter is, at step S460 shown in FIG. 50, when the second time-saving game state (state of special symbol time-saving flag ON) shown in FIG. 9(b) or FIG. 9(c) ends. , An initial value is set according to the state of the relief activation flag, and in the normal game state shifted from the second time-saving game state shown in FIG. 9(b) or FIG. 9(c), step S468 shown in FIG. The count will be executed at . As a result, the relief number counter is set to a value at an appropriate location and counted, so that wasteful processing can be omitted, thereby simplifying the processing.

<Main control: Explanation of special symbol processing>
Thus, when any one of the steps S205, S206, and S207 shown in FIG. 41 is completed, the main control CPU 600a updates the special symbol display data (step S208), and then finishes the special symbol processing. .

By the way, in the present embodiment, an example of subtracting the number of relief counters has been shown, but it is also possible to add them. This point will be described in detail with reference to FIG. In addition, the same reference numerals are given to the same processes as those described above, and the description thereof will be omitted.

<Main control: Special symbol processing: Description of special symbol confirmation time processing (variant)>
As shown in Figure 52, the main control CPU600a, if the special symbol probability variation flag is not set to ON (if not set to 5AH) (step S465: NO), adds the value of the relief counter (+1) (step S500), and confirms whether or not the value of the relief number counter has reached the relief arrival number (for example, 1000) (step S501). If the number of relief arrival times (for example, 1000) is reached (step S501: YES), the process of step S470 is performed, and the process during the special symbol confirmation time is finished.

On the other hand, if the number of relief arrival times (for example, 1000) has not been reached (step S501: NO), the main control CPU 600a confirms whether or not the value of the relief number counter is 0000H (step S502). If the value of the relief number counter is not 0000H (step S502: NO), the process during the special symbol confirmation time is finished.

On the other hand, if the value of the relief number counter is 0000H (step S502: YES), the value of the relief number counter is decremented (-1) (step S503), and the process during the special symbol confirmation time ends. The reason for subtracting (-1) from the value of the relief number counter in step S503 is as follows. That is, if the special symbol definite change is not in progress, the relief number counter adds (+1) the value. Therefore, after the value of the relief number counter reaches the number of relief arrival times, the relief number counter continues to count up to FFFFH, which is the upper limit of 2 bytes, unless a big hit is made. Therefore, when the count value of the relief number counter is FFFFH, when the count value is added (+1), the count value becomes 0000H. ).

Thus, even in this way, the same effect as described above can be obtained.

By the way, in any case of subtracting or adding the relief number counter, once the relief activation flag is set to ON (5AH is set), the special symbol jackpot determination flag is set to ON (5AH is set) (step S452: YES), that is, unless a big win occurs, the relief activation flag remains ON. Therefore, the power is cut off (power cut), the power is turned on again to return to the game, the relief activation flag is ON, and if it is not in the second time-saving game state (with low-accuracy power support state), that is, the second time-saving game When the state (with low-accuracy power support state) is terminated and the state is normal game state, even if the special symbol loss variation is performed a predetermined number of times (for example, 1000 times), the relief activation flag remains ON. Therefore, it will not enter the second time-saving game state (state with low power supply support). Therefore, a command indicating this is transmitted to the sub-control board 80 as the effect control command DI_CMD in step S41 shown in FIG. As a result, the sub-control CPU 800a can recognize this fact, and thus can notify the player.

Further, the relief number command transmission shown in FIG. 44 and the time reduction number command transmission shown in FIG. 45 can be changed as shown in FIGS. This point will be specifically described below.

<Main control: Special symbol processing: Explanation of rescue number command transmission (modified example)>
As shown in FIG. 53, first, the main control CPU 600a confirms whether or not the relief activation flag is ON (step S510). If the relief activation flag is ON (step S510: YES), the process of transmitting the relief count command is finished. That is, if the relief activation flag is ON, it indicates that a predetermined number of times (for example, 1000 times) the special symbol loss variation has been executed. There is no need to send it to the CPU 800a). Therefore, if the relief activation flag is ON (step S510: YES), if the processing is terminated without transmitting the relief count command, it is necessary to transmit unnecessary commands to the sub-control board 80 (sub-control CPU 800a). is eliminated, and the burden on the sub-control board 80 (sub-control CPU 800a) can be reduced.

On the other hand, if the relief activation flag is not ON (step S510: NO), the main control CPU 600a stores the value of the relief counter (2-byte data) in the HL register inside the main control CPU 600a (step S511). .

Next, the main control CPU 600a confirms whether or not the value of the relief number counter stored in the HL register is 0 (step S512). If the value is 0 (step S512: YES), the process of transmitting the relief count command ends.

On the other hand, if the value is not 0 (step S512: NO), data division processing is performed (step S513).

<Main control: Special symbol processing: Description of data division processing>
This process will be described in detail with reference to FIG. 55. The main control CPU 600a divides the value of the HL register by 100. Then, the main control CPU 600a stores the quotient obtained by division in the L register inside the main control CPU 600a, and stores the remainder in the H register inside the main control CPU 600a (step S550).

Next, the main control CPU 600a adds (+1) the L register, adds (+1) the H register (step S551), and ends the data division processing.

<Main control: Special symbol processing: Explanation of rescue number command transmission (modified example)>
Thus, after completing the data division process (step S513) as described above, the main control CPU 600a stores DBH in the D register inside the main control CPU 600a, and stores the DBH in the E register inside the main control CPU 600a. store the value of Then, the main control CPU 600a transmits the value of the DE register to the sub-control board 80 (sub-control CPU 800a) as the first command relief count command 1 (effect control command DI_CMD) (step S514).

Next, the main control CPU 600a stores DCH in the D register inside the main control CPU 600a, and stores the value of the H register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub-control board 80 (sub-control CPU 800a) as the number-of-rescue command 2 (effect control command DI_CMD) of the second command (step S515), and transmits the number-of-rescue command. finish processing.

Thus, by doing so, the sub-control CPU 800a subtracts 1 from the lower byte of the first command and subtracts 1 from the lower byte of the second command. Then, the value of the lower byte of the first command from which 1 has been subtracted is multiplied by 100, and the value of the lower byte of the second command from which 1 has been subtracted is added. As a result, the sub-control CPU 800a can grasp how many times the special symbol losing variation shown in FIG. 9(b) has been executed. Also, when displaying a number on the liquid crystal display device 41 using the VDP 803, the number obtained by subtracting 1 from the lower byte of the first command is used as the number in the thousands and hundreds digits, and the number obtained by subtracting 1 from the lower byte of the second command is displayed. It will be displayed as digits in the tens and ones digits.

Thus, even in this way, not only is it possible to make the command structure easier to understand, but also the control load can be reduced.

<Main control: Special symbol processing: Description of time saving command transmission (variant example)>
On the other hand, as a modification of the time saving number command transmission, as shown in FIG. step S520).

Next, the main control CPU 600a confirms whether the value of the special symbol time saving number counter stored in the HL register is 0 (step S521). If the value is 0 (step S521: YES), the process of sending the number of times of working hours command is finished.

On the other hand, if the value is not 0 (step S521: NO), data division processing shown in FIG. 55 is performed (step S522).

Next, the main control CPU 600a stores DDH in the D register inside the main control CPU 600a, and stores the value of the L register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub-control board 80 (sub-control CPU 800a) as the first command time reduction command 1 (effect control command DI_CMD) (step S523).

Next, the main control CPU 600a stores DEH in the D register inside the main control CPU 600a, and stores the value of the H register in the E register inside the main control CPU 600a. Then, the main control CPU 600a transmits the value of the DE register to the sub-control board 80 (sub-control CPU 800a) as the second command time saving number command 2 (effect control command DI_CMD) (step S524), time saving number command transmission finish processing.

Thus, by doing so, the sub-control CPU 800a subtracts 1 from the lower byte of the first command and subtracts 1 from the lower byte of the second command. Then, the value of the lower byte of the first command from which 1 has been subtracted is multiplied by 100, and the value of the lower byte of the second command from which 1 has been subtracted is added. As a result, the sub-control CPU 800a can grasp the number of time-saving games in the second time-saving game state (state with low-accuracy power support) shown in FIGS. 9(b) and (c). Also, when displaying a number on the liquid crystal display device 41 using the VDP 803, the number obtained by subtracting 1 from the lower byte of the first command is used as the number in the thousands and hundreds digits, and the number obtained by subtracting 1 from the lower byte of the second command is displayed. It will be displayed as digits in the tens and ones digits.

Thus, even in this way, not only is it possible to make the command structure easier to understand, but also the control load can be reduced.

Also, as shown in FIG. 55, if a subroutine is used to divide the 2-byte data into 1000s and 100s digits, the time-saving number of times can also be specified by sending 1000s and 100s digits and 10s and 1s digits with two commands. In this case, a common subroutine can be used with the number-of-rescue command, thereby reducing the program capacity.

<Details of processing of the sub-control board>
Next, the method of processing the effects shown in FIGS. 25 to 34 will be specifically described with reference to the processing contents (outline of the program) of the sub-control board 80 shown in FIGS. 56 to 60. FIG.

First, when the pachinko game machine 1 is powered on, a power-on signal is sent from the power board 130 (see FIG. 6) to each control board to the effect that the power is turned on. Upon receiving the signal, the sub-control CPU 800a performs the main processing shown in FIG.

<Sub control: main processing>
As shown in FIG. 56, first, the sub-control CPU 800a initializes internal registers and sets the input/output direction of the input/output port. Further, the data transmitted from the output port set in the output direction is set to be serially transferred (step S1000).

Next, the sub-control CPU 800a initializes the memory area in the sub-control RAM 800c that stores the effect control command DI_CMD received from the main control board 60 (see FIG. 6) (step S1001). Then, the sub-control CPU 800a performs interrupt permission setting processing for the input port that receives the interrupt signal from the main control board 60 (step S1002).

Next, the sub-control CPU 800a initializes the memory area in the sub-control RAM 800c used as a work area and stack area (step S1003), and issues an initialization command to the sound LSI 801 (see FIG. 6). As a result, the sound LSI 801 initializes a register provided therein (step S1004).

Next, the sub-control CPU 800a determines whether or not an abnormality has occurred in the motor (not shown) that operates the upper/left/right/upper left movable accessories 43a to 43d (see FIG. 5). ) is stored in the memory area in the sub-control RAM 800c. If abnormal data is stored, the sub-control CPU 800a issues a command to return the motor to the origin position. As a result, the upper/left/right/upper left movable accessories 43a to 43d return to their initial positions (step S1005).

Next, the sub-control CPU 800a sets up a CTC (Counter Timer Circuit) having a function of generating a constant-cycle pulse output, a function of measuring time, and the like. That is, the sub-control CPU 800a sets the time constant register of the CTC so that the timer interrupt is periodically applied every 1 ms (step S1006).

Next, the sub-control CPU 800a performs a checksum operation, which is an 8-bit addition operation for the work area of the sub-control RAM 800c (step S1007), and stores the checksum operation value and a memory backup (see step S1015) described later. is compared with the checksum calculation value stored in the sub-control RAM 800c to confirm whether or not they match (step S1008). If they do not match (step S1008: NO), a process of clearing all areas in the sub-control RAM 800c is performed (step S1009).

On the other hand, after matching (step S1008: YES) or after completing the process of step S1009, the sub-control CPU 800a cancels the watchdog timer function (not shown) (step S1010), is refreshed (step S1011).

Next, the sub-control CPU 800a reads the effect control command DI_CMD received from the main control board 60 (see FIG. 6) stored in the memory area in the sub-control RAM 800c, and creates a effect pattern corresponding to the content of the command DI_CMD. It is determined by lottery from many production patterns stored in advance in the control ROM 800b (step S1012). At this time, the sub-control CPU 800a performs a lottery using the sub-control fluctuation pattern distribution table SUB_FR_TBL shown in FIG. A lottery is performed using the symbol change notice table ZH_TBL shown in (c). 33(c), the sub-control CPU 800a uses the symbol change notice table ZH_TBL shown in FIG. 33(c), and when a lottery for changing to another symbol is performed, the variable symbol lottery allocation shown in FIG. 33(d) is performed. A lottery is held using the table HZC_FR_TBL.

Thus, the determined variation pattern is used as an offset value, and the left symbol lottery distribution table HC_FR_TBL shown in FIG. 33B and the symbol change notice table ZH_TBL shown in FIG. 33C are based on the offset value. By performing a lottery using , it is possible to select a table according to the offset value, so that the control load can be reduced.

On the other hand, the sub-control CPU 800a refers to the table HK_TBL shown in FIG. 32(a), and refers to the first sorting table FR_TBL1 shown in FIG. and hold a lottery. At this time, regardless of the variation pattern, the winner is won without any background change.

In addition, the sub-control CPU 800a refers to the second sorting table FR_TBL2 shown in FIG. 32(c) and performs a lottery for the variation of the special symbol on the 20th to 39th rotations after the background change. Then, the sub-control CPU 800a refers to the third sorting table FR_TBL3 shown in FIG. 32(d) and conducts a lottery in the variation of the special symbol on the 40th to 59th rotations after the background change. Further, the sub-control CPU 800a refers to the fourth sorting table FR_TBL4 shown in FIG. 32(e) and performs a lottery in the variation of the special symbol from the 60th rotation after the background change. At this time, the background is always changed regardless of the variation pattern.

Thus, if the first sorting table FR_TBL1, which is a sorting table in which the sorting values for executing the background change are all "0" (the background change is not won), is prepared and a lottery is performed, control can be performed. Therefore, it is possible to reduce the control load. Furthermore, in the debugging work related to the lottery for changing the background, which is the advance notice effect, it is sufficient to simply check the sorting table, so that the man-hours required for debugging can be reduced.

On the other hand, when a command of 2-byte data is transmitted, the sub-control CPU 800a subtracts 1 from the lower byte of the first command and subtracts 1 from the lower byte of the second command. Then, the value of the lower byte of the first command from which 1 has been subtracted is multiplied by 100, and the value of the lower byte of the second command from which 1 has been subtracted is added.

Next, the sub-control CPU 800a performs a process of analyzing the input contents of the setting button 15 or the effect button device 13 acquired by the timer interrupt process (step S1013). Specifically, analysis is performed as to whether the setting button 15 or the effect button device 13 is pressed by the player, released, or kept pressed.

Next, the sub-control CPU 800a controls the operation of the upper/left/right/upper left movable accessories 43a to 43d (see FIG. 5) and the decorative lamp substrate 90 ( (see FIG. 6), controls the lighting or extinguishing of decorative lamps such as LED lamps, controls the speaker 17, and controls the image displayed on the liquid crystal display device 41 (step S1014). At this time, if the background change lottery is won, the sub-control CPU 800a sets the current background as the first background data, and sets the changing background as the second background data. Then, the sub-control CPU 800a counts the VSYNC interrupt signal, and as shown in FIGS. 34(b-3) and (c-3), the frame in which the left shutter (see image P106a) and the right shutter (see image P106b) are closed. is reached, the changing background set in the second background data is set in the first background data.

Next, the sub-control CPU 800a performs a checksum operation, which is an 8-bit addition operation, on the work area of the sub-control RAM 800c, and performs memory backup processing for storing the checksum operation value in the sub-control RAM 800c (step S1015).

Next, the sub-control CPU 800a confirms whether or not a VSYNC interrupt signal has been transmitted from the VDP 803 to the sub-control CPU 800a (step S1016). If the VSYNC interrupt signal has not been transmitted (step S1016: NO), the sub-control CPU 800a repeatedly executes the process of step S1016 until the VSYNC interrupt signal is transmitted. (Step S1016: YES), the process returns to step S1007, and the processes of steps S1007 to S1016 are repeated.

<Sub-control: data analysis processing>
Next, referring to FIG. 57, the data analysis processing in step S1014 of the main processing will be described in detail. First, the sub-control CPU 800a selects the effect scenario data PS_DATA (see FIG. 7A) corresponding to the effect pattern determined by lottery in step S1012 from the effect scenario table PR_TBL, and stores it in the selected effect scenario data PS_DATA. Based on various data (frame data PS_DATA10, control code data PS_DATA11, coordinate data PS_DATA12, pixel calculation data PS_DATA13, scaling data PS_DATA14) stored in the 1 layer data PS_DATA1 stored in the VDP 803, an image to be displayed on the liquid crystal display device 41 A command list for generating data is generated (step S1050). At this time, a command list for generating image data to be displayed on the liquid crystal display device 41 as described with reference to FIGS. 9B and 9C is also generated. Furthermore, a command list for generating image data to be displayed on the liquid crystal display device 41 as described with reference to FIGS. 27 to 31 is also generated. Further, image data corresponding to the contents set in the first background data, as specific examples, FIGS. 34(b-1) to (b-5) and FIGS. A command list for generating image data to be displayed on the liquid crystal display device 41 is also generated.

Next, the sub-control CPU 800a sets the button data PS_DATA113 (see FIG. 7(c)) stored in the selected effect scenario data PS_DATA to the effect that the pressing effect of the effect button device 13 is valid or the setting button 15. If the data indicating that the repeated hit effect is effective is stored, the data is stored in the memory area in the sub-control RAM 800c.

Further, the sub-control CPU 800a generates a light-related control signal based on the data content of the lamp data PS_DATA17 (see FIG. 7B) stored in the selected production scenario data PS_DATA, and stores it in the sub-control RAM 800c. , and store it in the At this time, a control signal relating to the lighting of the decoration lamp as described with reference to FIGS. 9(b) and 9(c) is also generated.

Further, the sub-control CPU 800a controls the top/left/right/upper left movable accessory 43a based on the data content of the movable accessory data PS_DATA16 (see FIG. 7(b)) stored in the selected production scenario data PS_DATA. 43d is determined, and motor data for the motor (not shown) of the movable accessory device 43 corresponding to the determined operation content is generated.

Furthermore, the sub-control CPU 800a generates a control signal regarding sound based on the data contents of the sound data PS_DATA15 (see FIG. 7(b)) stored in the selected effect scenario data PS_DATA (step S1051).

Thus, the sub-control CPU 800a repeats the processing of steps S1050 and S1051 until all the data based on the effect pattern determined by lottery in step S1012 shown in FIG. 56 is generated (step S1052: NO). When all the data have been generated (step S1052: YES), the process proceeds to step S1053.

Next, the sub-control CPU 800a performs the button valid time processing based on the contents stored in the sub-control RAM 800c in the above step S1051 and the input contents of the setting button 15 or effect button device 13 processed in step S1013 shown in FIG. (step S1053).

<Sub control: command reception interrupt processing>
Subsequently, with reference to FIG. 58, the processing when the effect control command DI_CMD and the interrupt signal are transmitted from the main control board 60 during execution of such main processing will be described.

As shown in FIG. 58, when the sub-control CPU 800a receives the interrupt signal, the sub-control CPU 800a executes save processing for saving the contents of each register to the stack area in the sub-control RAM 800c (step S1100). After that, the sub-control CPU 800a reads the register of the input port that received the effect control command DI_CMD (step S1101), and calculates a pointer indicating the address address of the command transmission/reception memory area in the sub-control RAM 800c (step S1102).

After that, the sub-control CPU 800a again reads the register of the input port that received the effect control command DI_CMD (step S1103), and determines whether the value read at step S1101 and the value read at step S1103 match. to confirm. If not matched (step S1104: NO), proceed to step S1107, if matched (step S1104: YES), the effect control command received from the main control board 60 to the address address corresponding to the pointer calculated above DI_CMD is stored (step S1105). It should be noted that this stored effect control command DI_CMD is read out to the sub-control CPU 800a during the process of step S1012 shown in FIG.

Next, the sub-control CPU 800a updates the pointer indicating the address of the command transmission/reception memory area in the sub-control RAM 800c (step S1106), and restores the register saved in the process of step S1100 (step S1107). As a result, the process returns to the main process shown in FIG.

<Sub control: timer interrupt processing>
Next, with reference to FIG. 59, processing when a timer interrupt occurs every 1 ms, which is set in the processing of step S1006 (see FIG. 56) of the main processing, will be described.

As shown in FIG. 59, the sub-control CPU 800a executes save processing for saving the contents of each register to the stack area in the sub-control RAM 800c when a timer interrupt occurs every 1 ms (step S1150).

Next, the sub-control CPU 800a acquires the data of the setting button 15, the data of the performance button device 13, the motor data of the movable accessory device 43, etc. twice (step S1151), and checks whether the data acquired twice match. Confirm whether or not (step S1152). If the data do not match (step S1152: NO), the sub-control CPU 800a repeats the process of step S1151 until the data match. (step S1153).

Next, the sub-control CPU 800a receives a signal from the setting button 15 or the effect button device 13 (step S1154). This received signal is analyzed by the button analysis processing in step S1013 shown in FIG.

Next, the sub-control CPU 800a transmits the light-related control signal stored in the sub-control RAM 800c in step S1051 shown in FIG. 57 to the decoration lamp board 90 (see FIG. 6) (step S1155). A control signal necessary to turn on or off the identification lamp device 50A (see FIG. 5) is also transmitted.

Next, the sub-control CPU 800a restores the register saved in the process of step S1150 (step S1156). As a result, the process returns to the main process shown in FIG.

<Sub control: command list>
Here, the command list generated in step S1050 shown in FIG. 57 will be explained in detail using FIG.

This command list is a command string listing commands for the VDP 803 (command parser 8035). differ.

When instructing the VDP 803 to draw a moving image, the initial command list shown in FIG. 60(a) and the regular command list shown in FIG. 60(b) are configured.

As shown in FIG. 60(a), the sub-control CPU 800a first generates a command for setting the memory area of the DDR2 SDRAM 804 in which the frame buffer area is set and the memory area for storing the video data of the DDR2 SDRAM 804 ( step S1200). In setting the memory area of the DDR2SDRAM 804 in which the frame buffer area is set, the image size data PS_DATA 112 shown in FIG. 7C is referred to. That is, if the size is 640×320, for example, a memory area is set accordingly.

Next, a command for instructing decoding of moving images is generated (step S1201). Specifically, it is an instruction which moving image compression data is to be decoded, together with the address address of the CG data storage area of the game ROM 805 in which the corresponding moving image is stored, the number of frames of the moving image, and the like. Address data PS_DATA111 shown in FIG. 7(c) is referred to for the address address of the CG data storage area in which the relevant moving image is stored, and the number of frames of the moving image is determined by frame data PS_DATA10 shown in FIG. 7(b). is referenced.

Next, a termination process command is entered to complete the generation of the initial command list (step S1202).

Subsequently, the sub-control CPU 800a generates a stationary command list shown in FIG. 60(b).

As shown in FIG. 60(b), this stationary command list is composed of moving image drawing instructions. A command is generated to indicate at which coordinate position drawing is to be performed (step S1203). Next, a termination process command is entered to complete the generation of the steady command list (step S1204). Note that frame data PS_DATA10, coordinate data PS_DATA12, pixel calculation data PS_DATA13, and enlargement/reduction data PS_DATA14 shown in FIG.

On the other hand, when instructing the VDP 803 to draw a still image, as shown in FIG. 60(c), the sub-control CPU 800a first stores the memory area of the DDR2 SDRAM 804 in which the frame buffer area is set and the still image data. A command for setting the memory area of the built-in VRAM 8040 is generated (step S1210). In setting the memory area of the DDR2SDRAM 804 in which the frame buffer area is set, the image size data PS_DATA 112 shown in FIG. 8C is referred to. That is, if the size is 640×320, for example, a memory area is set accordingly.

Next, a command for instructing decoding of a still image is generated (step S1211). Specifically, it is an instruction which compressed still image data is to be decoded, together with the address address and data size of the CG data storage area of the game ROM 805 in which the corresponding still image is stored. The address of the CG data storage area in which the corresponding still image is stored refers to the address data PS_DATA 111 shown in FIG. Referenced.

Next, a command is generated to indicate at which coordinate position on the liquid crystal display device 41 and in what manner (rotational angle, reduction/enlargement, etc.) the decoded still image data should be drawn (step S1212). Next, a termination processing command is entered to complete the generation of the command list for the still image (step S1213). Note that frame data PS_DATA10, coordinate data PS_DATA12, pixel calculation data PS_DATA13, and enlargement/reduction data PS_DATA14 shown in FIG.

Thus, the command list for moving images and the command list for still images are transmitted to the VDP 803 (see FIG. 9), processed as appropriate, and then transmitted to the liquid crystal display device 41 . As a result, desired images (for example, FIGS. 27 to 31, FIGS. 34(b-1) to (b-5), and FIGS. 34(c-1) to (c-5)) are displayed on the liquid crystal display device 41. It will be done.

By the way, such a command list instructs to draw a still image after instructing to draw a moving image. That is, the sub-control CPU 800a selects one of the plurality of effect scenario data PS_DATA stored in the effect scenario table PR_TBL shown in FIG. This is because the scenario data PS_DATA is selected, and the 1-layer data PS_DATA1 stored in the selected effect scenario data PS_DATA are referenced in descending order of priority to generate the command list. That is, according to the present embodiment, control code data such that the data PS_DATA110 (see FIG. 7(c)) indicating a moving image from the control table CH_TBL shown in FIG. PS_DATA11 is stored, and the control code data PS_DATA11 is stored at a position having a higher priority so that the data PS_DATA110 (see FIG. 7(c)) indicating a still image is referenced from the control table CH_TBL shown in FIG. 7(c). Therefore, a command list for instructing drawing of a moving image is generated first, and then a command list for instructing drawing of a still image is generated. Thus, after the moving image data is drawn, the still image data is overwritten on the drawn moving image data, and image data to be displayed on the liquid crystal display device 41 is generated.

Thus, the image data is generated by overwriting the drawn moving image data with the still image data, so that the characters can be clearly displayed even if the compressed image is used.

In the present embodiment, only an example of lighting display as a display method of the measurement/setting display device 610 is shown, but the display of the measurement/setting display device 610 is blinked during setting change. You can do it.

Also, in this embodiment, an example in which the sound LSI 801 and the VDP 803 are configured separately has been shown, but they may be integrated as one chip.

Also, in this embodiment, the frame buffer area is set in the DDR2 SDRAM 804, but the frame buffer area may be set in the built-in VRAM 8040 instead.

Also, in this embodiment, an example in which the sub-control CPU 800a is provided in the sub-one-chip microcomputer 800 is shown, but the present invention is not limited to this, and the sub-control CPU 800a may be provided in the VDP 803.

1 pachinko game machine 41 liquid crystal display device (count display means)
KAI common high-speed variation animation (common specific variation animation)

Claims (1)

count display means for displaying a predetermined count value by arranging a plurality of numbers;
and count updating means for updating the predetermined count value,
The count display means
displaying a variation animation indicating that the predetermined count value is updated;
The variation animation is
When the updated predetermined count value is displayed on the count display means, the count display displays a specific variation animation common to the plurality of numbers to be updated, regardless of the updated predetermined count value. display on the means, and then display the predetermined count value after the update,
A gaming machine in which the predetermined count value after updating is displayed on the count display means according to an effect scenario in which the numerical information after updating is displayed after the common specific variation animation is displayed.

Images