JP7024500B2 - Image reader - Google Patents

Description

The present invention relates to an image reader.

An image processing device that reads both sides of a document and processes storage and transfer of front side image data and back side image data sent from a front side scanner and a back side scanner by one double-sided reading control unit is disclosed. (See Patent Document 1).

Japanese Unexamined Patent Publication No. 2011-176515

In a device that reads both sides of a document, a device for further speeding up the processing has been required.

The image reading device includes a first sensor that reads the first surface of the document, a first control circuit that performs image processing on the output from the first sensor, and a surface opposite to the first surface of the document. A second sensor that reads a certain second surface and a second control circuit that is different from the first control circuit and performs image processing on the output from the second sensor are provided, and the first control circuit is provided. The control circuit includes a first clock circuit capable of generating a first clock signal, the second control circuit includes a second clock circuit capable of generating a second clock signal, and the first clock signal is used as the first clock signal. A clock signal line transmitted from the control circuit to the second control circuit is further provided, the first control circuit controls reading by the first sensor in synchronization with the first clock signal, and the second control circuit is , The reading by the second sensor is controlled in synchronization with the first clock signal transmitted from the first control circuit.

The image reading device includes a first light source that illuminates the first surface of the document, a first sensor that reads the first surface, a first control circuit that controls turning on and off of the first light source, and the document. A second light source that illuminates the second surface, which is the opposite surface of the first surface, a second sensor that reads the second surface, and a second light source that is a circuit different from the first control circuit. The first control circuit includes a first clock circuit capable of generating a first clock signal, and the second control circuit includes a second clock signal. The first clock signal is further provided with a clock signal line for transmitting the first clock signal from the first control circuit to the second control circuit, and the first control circuit comprises the first clock signal. The first light source is controlled in synchronization with the above, and the second control circuit controls the second light source in synchronization with the first clock signal transmitted from the first control circuit.

The figure which shows the structure of the image reader which concerns on 1st Embodiment simply. A timing chart showing the relationship between signals generated by the first control circuit and the second control circuit according to the first embodiment. The figure which shows the structure of the image reader which concerns on 2nd Embodiment simply. A timing chart showing an example of the relationship between signals generated by the first control circuit and the second control circuit in the second embodiment. A timing chart showing another example of the relationship between signals generated by the first control circuit and the second control circuit in the second embodiment. The figure which shows the structure of the image reading apparatus including a transport part and a transport path simply.

Hereinafter, embodiments of the present invention will be described with reference to each figure. Each figure is merely an example for explaining the present embodiment. Moreover, since each figure is an example, they may not be consistent with each other.

1. 1. First Embodiment:
FIG. 1 simply shows a part of the configuration of the image reading device 1 according to the present embodiment.
Further, FIG. 6 simply shows the configuration of the image reading device 1 including the transport unit and the transport path described later. FIG. 6 is a configuration common to the first embodiment and the second embodiment described later. The image reading device 1 is a device capable of simultaneously reading both sides of a document. Reading both sides of a document at the same time means not only when the period for scanning one side of the document coincides with the period for scanning the other side of the document, but also the period for scanning one side of the document and the period for scanning the other side of the document. It is meant to include the case where a part of the period for reading the surface overlaps. One side of the manuscript is also referred to as the first side, and the other side of the manuscript is also referred to as the second side.

The image reading device 1 includes a transport unit 30. As shown in FIG. 6, the transport unit 30 is a mechanism for transporting the document 70 along a predetermined transport direction FD. The transport unit 30 appropriately includes, for example, a roller 32 and a belt for transporting the original, a motor 31 for rotating the roller 32 and the belt, and the like. The document being transported by the transport unit 30 is read by the first sensor 15 and the second sensor 25 that are stationary. Therefore, the image reading device 1 corresponds to a sheet feed scanner.

The image reading device 1 includes a first sensor 15 for reading the first surface of the document and a first light source 17 for illuminating the first surface of the document. The first sensor 15 is, for example, a line sensor in which a plurality of image pickup elements are arranged in a direction orthogonal to the transport direction FD. In the present specification, orthogonality means not only strict orthogonality but also an error to the extent that it occurs due to actual component mounting accuracy and the like. The first sensor 15 receives the reflected light from the first surface of the document irradiated by the first light source 17 and outputs a photoelectrically converted signal. The first sensor 15 reads one line orthogonal to the transport direction on the first surface of the document by one reading operation by each image sensor.

The image reading device 1 includes a second sensor 25 for reading the second surface of the document and a second light source 27 for illuminating the second surface of the document. The second sensor 25 has the same configuration as the first sensor 15, and is, for example, a line sensor. The first sensor 15 and the second sensor 25 are provided at positions facing each other across a transport path 60 through which a document transported along the transport direction FD passes. The second sensor 25 receives the reflected light from the second surface of the document irradiated by the second light source 27 and outputs a photoelectrically converted signal. The second sensor 25 reads one line orthogonal to the transport direction on the second surface of the document by one reading operation by each image sensor. The first light source 17 and the second light source 27 are, for example, LEDs, respectively.

The image reading device 1 includes a first control circuit 10 that controls reading by the first sensor 15 and turning on / off the first light source 17. The first control circuit 10 is an electronic circuit including a CPU, a ROM, one or more ICs having RAM, and various other circuit elements. The first control circuit 10 may be a SoC (System on Chip) semiconductor chip. In the first control circuit 10, the hardware constituting the first control circuit 10 or the hardware cooperates with the program to generate the first clock generation unit 11, the first management unit 12, and the first image processing unit 13. , Each function such as the transfer control unit 18 is realized.

The first clock generation unit 11 corresponds to a first clock circuit capable of generating a clock signal. The clock signal generated by the first clock generation unit 11 is also referred to as a first clock signal. However, not only the clock signal itself generated by the first clock generation unit 11 but also the clock signal derived based on the clock signal generated by the first clock generation unit 11 is included in the concept of the first clock signal. The first management unit 12 is connected to the first sensor 15 via the first analog front end (AFE) 14. The first AFE 14 is an analog circuit connecting the first sensor 15 and the first control circuit 10 as a digital circuit, and includes an amplifier, various filters, an analog / digital converter, and the like. Further, the first management unit 12 is connected to the first light source 17 via the first light source drive circuit 16. The first light source drive circuit 16 is a circuit for driving the first light source 17 in response to a signal from the first control circuit 10.

The first image processing unit 13 inputs a signal as a reading result output from the first sensor 15 via the first AFE 14. The first image processing unit 13 performs correction processing (for example, shading correction) for the signal output from the first sensor 15, storage processing in memory, conversion processing, and a control circuit 80 outside the first control circuit 10. Various image processing such as transfer processing to (see FIG. 6) is executed. The transport control unit 18 controls the drive of the motor 31 and the like constituting the transport unit 30, so that the transport unit 30 can transport the original.

The image reading device 1 includes a second control circuit 20 that controls reading by the second sensor 25 and turning on / off the second light source 27. The second control circuit 20 includes a CPU, a ROM, one or more ICs having a RAM, and various other circuit elements, and is an electronic circuit different from the first control circuit 10. Similar to the first control circuit 10, the second control circuit 20 may be a SoC-ized semiconductor chip. In the second control circuit 20, the hardware constituting the second control circuit 20 or the hardware cooperates with the program to generate the second clock generation unit 21, the second management unit 22, and the second image processing unit 23. Each function such as is realized. Desirably, the first control circuit 10 and the second control circuit 20 are SoC chips of the same type. This can reduce the manufacturing cost.

The second clock generation unit 21 corresponds to a second clock circuit capable of generating a clock signal. The clock signal generated by the second clock generation unit 21 is also referred to as a second clock signal. However, in the present embodiment, the second clock generation unit 21 does not need to generate the second clock signal.

The second management unit 22 is connected to the second sensor 25 via the second AFE 24. As for the description of the second AFE24, the above description of the first AFE14 shall apply mutatis mutandis. Further, the second management unit 22 is connected to the second light source 27 via the second light source drive circuit 26. The second light source drive circuit 26 is a circuit for driving the second light source 27 in response to a signal from the second control circuit 20. The second image processing unit 23 inputs a signal as a reading result output from the second sensor 25 via the second AFE 24. Similar to the first image processing unit 13, the second image processing unit 23 executes various image processing on the signal output from the second sensor 25.

In the example of FIG. 1, the first AFE 14 and the first light source drive circuit 16 are shown as external configurations of the first control circuit 10, and similarly, the second AFE 24 and the second light source drive circuit 26 are shown in the second control circuit 20. It is shown as an external configuration. However, the first control circuit 10 may be configured to include the first AFE 14 and the first light source drive circuit 16, and similarly, the second control circuit 20 may be configured to include the second AFE 24 and the second light source drive circuit 26. It may be. In FIG. 6, the first AFE 14 and the first light source drive circuit 16 are included in the first control circuit 10, and similarly, the second AFE 24 and the second light source drive circuit 26 are included in the second control circuit 20. And.

The image reading device 1 appropriately includes a general configuration as a scanner. Although not shown in FIG. 1, the image reader 1 naturally has an optical system for guiding the reflected light from each of the first surface and the second surface of the document to the first sensor 15 and the second sensor 25. Further, the image reading device 1 may include an operation receiving unit for receiving an operation by the user, a display unit for visually presenting various information to the user, and the like. Further, the image reading device 1 may be a multifunction device having a plurality of functions such as a printing function and a facsimile communication function in addition to the function as a scanner. The control circuit 80 shown in FIG. 6 may be a control circuit that controls such a printing function, a facsimile communication function, and the like.

FIG. 2 is a timing chart showing the relationship between the signals generated by the first control circuit 10 and the second control circuit 20, respectively.
The clock signal CK-1 is a pulse signal generated by the first clock generation unit 11 of the first control circuit 10 and output to the terminal 12d of the first management unit 12. The first clock generation unit 11 starts generation and output of the clock signal CK-1 when the tip of the document conveyed by the transfer unit 30 passes through a predetermined position in the transfer path 60. Specifically, the transport unit 30 includes a document detection sensor 33 that detects a document at a predetermined position on the transport path 60 upstream of the position where the first sensor 15 and the second sensor 25 are arranged. ing. The transport control unit 18 grasps that the tip of the document being transported by the transport unit 30 has passed the predetermined position due to the change in the output from the document detection sensor 33, and the tip of the document has passed the predetermined position. Notify the first clock generation unit 11. The first clock generation unit 11 starts generation and output of the clock signal CK-1 in response to the notification from the transfer control unit 18. The cycle of the rising edge of the pulse in the clock signal CK-1 that periodically repeats the rising and falling edges of the pulse corresponds to the cycle of reading in line units by the first sensor 15.

The first management unit 12 that inputs the clock signal CK-1 from the terminal 12d detects the rising edge of the pulse of the clock signal CK-1, and at the timing of the rising edge of the pulse of the clock signal CK-1, the clock detection signal CK-R1 To generate. In FIG. 2, the generation timing of the clock detection signal CK-R1 is indicated by an upward arrow. Since the clock detection signal CK-R1 is a signal obtained by extracting the rising timing of the pulse of the clock signal CK-1, the clock signal CK-1 and the clock detection signal CK-R1 are interpreted as substantially the same signal. You may.

The first management unit 12 generates the sensor control signal ST-1, the light emission control signal LT-1, and the clock signal CK-12, respectively, with reference to the generation of the clock detection signal CK-R1. The sensor control signal ST-1 is a signal for instructing the first sensor 15 of the reading timing at the beginning of each line in the reading of each line. The reading timing at the beginning of each line is a timing at which the image pickup element located on the most end side of the line sensor among the plurality of image pickup elements included in the first sensor 15 as the line sensor starts reading. The first management unit 12 outputs the sensor control signal ST-1 from the terminal 12a toward the first AFE 14. Since the sensor control signal ST-1 is notified to the first sensor 15 via the first AFE 14, the first sensor 15 matches the read timing at the beginning of each line with the rising edge of the pulse of the sensor control signal ST-1. , Reads line by line can be performed repeatedly.

The light emission control signal LT-1 is a signal for causing the first light source 17 to execute light emission according to the line unit reading by the first sensor 15. The first management unit 12 outputs the light emission control signal LT-1 from the terminal 12b toward the first light source drive circuit 16. When the first light source 17 and the second light source 27 are LEDs, the first light source 17 and the second light source 27 have predetermined brightness by controlling the ratio of lighting and extinguishing by PWM (Pulse Width Modulation), respectively. It emits light at. Since the light emission control signal LT-1 includes the PWM signal for adjusting the brightness of the first light source 17 in this way, the shape is actually more complicated than the shape shown in FIG. 2, but the figure is shown. In No. 2, the light emission control signal LT-1 is shown in a simple shape. The first light source drive circuit 16 drives the first light source 17 according to the light emission control signal LT-1, so that the first light source 17 has a predetermined brightness during the period corresponding to the period of reading in line units by the first sensor 15. It emits light at.

In this way, the first management unit 12 of the first control circuit 10 controls the reading by the first sensor 15 based on the sensor control signal ST-1 synchronized with the clock signal CK-1 generated by the first clock generation unit 11. Moreover, the first light source 17 is controlled based on the light emission control signal LT-1 synchronized with the clock signal CK-1.

The clock signal CK-12 is a clock signal transmitted from the first control circuit 10 to the second control circuit 20. The first management unit 12 outputs the clock signal CK-12 from the terminal 12c toward the second management unit 22. The terminal 12c of the first management unit 12 and the terminal 22d of the second management unit 22 are connected by a clock signal line 40. As a result, the second management unit 22 inputs the clock signal CK-12, which is the reference of the control timing, not from the second clock generation unit 21 but from the first control unit 10. In FIG. 6, the description of the clock signal line 40 is omitted.

The second management unit 22 that inputs the clock signal CK-12 from the terminal 22d detects the rising edge of the pulse of the clock signal CK-12, and at the timing of the rising edge of the pulse of the clock signal CK-12, the clock detection signal CK-R2 To generate. In FIG. 2, the generation timing of the clock detection signal CK-R2 is indicated by an upward arrow. Since the clock detection signal CK-R2 is a signal obtained by extracting the rising timing of the pulse of the clock signal CK-12, the clock signal CK-12 and the clock detection signal CK-R2 are interpreted as substantially the same signal. You may. Further, the clock signal CK-12 is transmitted from the first management unit 12 to the second management unit 22 through the clock signal line 40, and when it is input to the second management unit 22, it becomes the clock detection signal CK-R1. Although it is slightly delayed, it is a signal generated in synchronization with the clock detection signal CK-R1 by the first management unit 12. Therefore, when the clock signal CK-12 is transmitted from the first management unit 12 to the second management unit 22 through the clock signal line 40, the first clock signal generated by the first clock generation unit 11 of the first control circuit 10 is generated. It can be said that (clock signal CK-1) has been transmitted to the second control circuit 20.

The second management unit 22 generates the sensor control signal ST-2 and the light emission control signal LT-2, respectively, with reference to the generation of the clock detection signal CK-R2. The description of the sensor control signal ST-2 and the light emission control signal LT-2 shall apply mutatis mutandis to the description of the sensor control signal ST-1 and the light emission control signal LT-1. That is, the sensor control signal ST-2 is a signal instructing the second sensor 25 of the reading timing at the beginning of each line in the reading of each line. The second management unit 22 outputs the sensor control signal ST-2 from the terminal 22a toward the second AFE 24. The sensor control signal ST-2 is notified to the second sensor 25 via the second AFE 24, and the second sensor 25 sets the read timing at the beginning of each line to match the rising edge of the pulse of the sensor control signal ST-2. Repeatedly read line by line.

The light emission control signal LT-2 is a signal for causing the second light source 27 to execute light emission according to the line unit reading by the second sensor 25. The second management unit 22 outputs the light emission control signal LT-2 from the terminal 22b toward the second light source drive circuit 26. The second light source drive circuit 26 drives the second light source 27 according to the light emission control signal LT-2, so that the second light source 27 has a predetermined brightness during the period corresponding to the period of reading in line units by the second sensor 25. It emits light at.

In this way, the second management unit 22 of the second control circuit 20 is second based on the sensor control signal ST-2 synchronized with the clock signal CK-1 generated by the first clock generation unit 11 of the first control circuit 10. The reading by the sensor 25 is controlled, and the second light source 27 is controlled based on the light emission control signal LT-2 synchronized with the clock signal CK-1.
As can be understood from FIG. 1, the first control circuit 10 and the second control circuit 20 have substantially the same hardware configuration, and the second management unit 22 corresponds to the terminal 12c of the first management unit 12. However, in the present embodiment, the terminal 22c of the second management unit 22 is not particularly used.

The first control unit 10 replaces the configuration in which the clock signal CK-12 is transmitted to the second control unit 20 through the clock signal line 40, and uses the clock signal CK-1 itself generated by the first clock generation unit 11 as a clock signal. It may be transmitted to the second control unit 20 through the line 40. In that case, the second management unit 22 of the second control unit 20 generates the clock detection signal CK-R2 based on the clock signal CK-1 input through the clock signal line 40.

As described above, according to the present embodiment, the image reading device 1 includes a first sensor 15 that reads the first surface of the original, a first control circuit 10 that performs image processing on the output from the first sensor 15. Image processing is performed on the output from the second sensor 25, which is a circuit different from the second sensor 25 that reads the second surface, which is the opposite surface of the first surface of the document, and the first control circuit 10. A second control circuit 20 is provided. The first control circuit 10 includes a first clock circuit (first clock generation unit 11) capable of generating a first clock signal, and the second control circuit 20 includes a second clock circuit (first clock generation unit 11) capable of generating a second clock signal. A second clock generation unit 21) is provided. Further, the image reading device 1 includes a clock signal line 40 for transmitting a first clock signal from the first control circuit 10 to the second control circuit 20. Then, the first control circuit 10 controls the reading by the first sensor 15 in synchronization with the first clock signal, and the second control circuit 20 synchronizes with the first clock signal transmitted from the first control circuit 10. Controls the reading by the second sensor 25.

Further, according to the present embodiment, the image reading device 1 turns on and off the first light source 17 that illuminates the first surface of the document, the first sensor 15 that reads the first surface, and the first light source 17. A first control circuit 10 to control, a second light source 27 that illuminates the second surface opposite to the first surface of the document, a second sensor 25 that reads the second surface, and a first control circuit 10. Is a separate circuit and includes a second control circuit 20 that controls turning on and off of the second light source 27. The first control circuit 10 includes a first clock circuit (first clock generation unit 11) capable of generating a first clock signal, and the second control circuit 20 includes a second clock circuit (first clock generation unit 11) capable of generating a second clock signal. A second clock generation unit 21) is provided. Further, the image reading device 1 includes a clock signal line 40 for transmitting a first clock signal from the first control circuit 10 to the second control circuit 20. Then, the first control circuit 10 controls the first light source 17 in synchronization with the first clock signal, and the second control circuit 20 synchronizes with the first clock signal transmitted from the first control circuit 10. 2 Controls the light source 27.

That is, in an image reading device that reads both sides (first side and second side) of a document, a control circuit such as a sensor and a light source required for reading the first side and SoC that controls image processing for the reading result of the first side. (1st control circuit 10) and a control circuit (2nd control circuit 20) such as SoC that controls image processing for the sensor and light source required for reading the second surface and the reading result of the second surface are separately separated. Provided. As a result, the processing related to double-sided reading of the original can be speeded up as compared with the configuration in which double-sided reading of the original is processed by one double-sided reading control unit as in Document 1.

Further, if the first control circuit 10 and the second control circuit 20 are provided separately, the first control circuit 10 and the second control circuit 20 each execute processing at their own timings, and the first control circuit 10 The problem remains that the processing by the second control circuit 20 and the processing by the second control circuit 20 are not synchronized. In response to such a problem, in the present embodiment, the first control circuit 10 has a read timing by the first sensor 15 with reference to the first clock signal generated by the first clock generation unit 11 owned by the first control circuit 10. 1 Controls the timing of light emission by the light source 17 (light emission due to repeated lighting and extinguishing). On the other hand, in the second control circuit 20, the timing of reading by the second sensor 25 and the light emission (lighting) by the second light source 27 with reference to the first clock signal generated by the first clock generation unit 11 of the first control circuit 10. , Controls the timing of light emission due to repeated extinguishing. As a result, high synchronization between the image processing for the irradiation / reading / reading result of the first surface and the image processing for the irradiation / reading / reading result of the second surface is ensured, and the higher speed is further realized. ..

Further, as in the present embodiment, by ensuring the synchrony between the processing by the first control circuit 10 and the processing by the second control circuit 20, the image quality of the reading result for each of the first surface and the second surface is also improved. Stabilize. If the synchrony is not ensured, the period during which the first light source 17 emits light for the first sensor 15 to read one line on the first surface and the second sensor 25 read one line on the second surface. Therefore, the period during which the second light source 27 emits light is different from each other. In that case, the brightness when the first sensor 15 reads one line on the first surface and the brightness when the second sensor 25 reads one line on the second surface vary, and the first surface and the second surface respectively. The image quality (brightness, etc.) of the reading result for each line varies. On the other hand, according to the present embodiment, by ensuring the synchrony, the period during which the first light source 17 emits light for the first sensor 15 to read one line on the first surface and the second sensor 25 are second. The period during which the second light source 27 emits light in order to read one line on two surfaces is substantially the same. Therefore, the brightness when the first sensor 15 reads one line on the first surface and the brightness when the second sensor 25 reads one line on the second surface are the same in both lines, and the first. The image quality of the reading result for each line of the surface and the second surface is stable.

2. 2. Second embodiment:
Next, the second embodiment will be described. The second embodiment is premised on the embodiment (first embodiment) described so far.
FIG. 3 simply shows a part of the configuration of the image reading device 1 according to the second embodiment. Comparing FIG. 3 with FIG. 1, in the example of FIG. 3, the first control circuit 10 includes the first setting control unit 19, and the second control circuit 20 includes the second setting control unit 29. .. Although the description of the transport unit 30 is omitted in FIG. 3 due to space limitations, the image reading device 1 includes the transport unit 30 in the second embodiment as in the first embodiment.

The first setting control unit 19 is a module that executes various settings related to reading each line of the first surface of the document, and similarly, the second setting control unit 29 relates to reading each line of the second surface of the document. It is a module that executes various settings. For example, the first light source 17 and the second light source 27 switch the emission color in the order of R (red), G (green), and B (blue) according to the switching of the line to be read of the document, and select the document. Irradiate. That is, when the document is read for three lines, the emission color of the light source is switched between R, G, and B, and such switching is repeated.

The first setting control unit 19 sets dimming parameters related to the emission degree of each emission color RGB switched by the first light source 17 according to the reading of each line on the first surface, and instructs the first management unit 12 to make the setting. do. As a result, the setting by the first setting control unit 19 is reflected in the PWM signal from the first management unit 12 to the first light source 17, and the emission degree of each of the emission colors RGB by the first light source 17 is optimized. Similarly, the second setting control unit 29 sets dimming parameters related to the emission degree of each emission color RGB switched by the second light source 27 according to the reading of each line on the second surface, and sets the setting in the second management unit. Instruct 22. As a result, the setting by the second setting control unit 29 is reflected in the PWM signal from the second management unit 22 to the second light source 27, and the emission degree of each of the emission colors RGB by the second light source 27 is optimized.

In the second embodiment, the above-mentioned functions of the first setting control unit 19 and the second setting control unit 29 are enabled from the first management unit 12 toward the first setting control unit 19 and the second setting control unit 29. A predetermined timing signal TI-1 is output. Specifically, the first management unit 12 has a timing signal TI-1 as a predetermined high-level signal from the terminal 12e during the period in which the document being conveyed by the transfer unit 30 is detected by the document detection sensor 33 described above. Is output. Since the transport control unit 18 knows whether or not the document detection sensor 33 is currently detecting the document based on the output from the document detection sensor 33, the document detection sensor 33 detects the document ( The first management unit 12 is notified that the manuscript is passing through the predetermined position on the upstream side in the transport direction. Therefore, the first management unit 12 can output the timing signal TI-1 from the terminal 12e during the period when the document is detected by the document detection sensor 33.

The first management unit 12 outputs the timing signal TI-1 from the terminal 12e to the outside of the first control circuit 10. As shown in FIG. 3, the signal line extending from the terminal 12e to the outside of the first control circuit 10 is connected to the terminal 19a of the first setting control unit 19 with the circuit 50 interposed in the middle. And the signal line connected to the terminal 29a of the second setting control unit 29 are connected to a branch point where the signal line branches. The wiring distance from the branch point to the terminal 19a and the wiring distance from the branch point to the terminal 29a are the same. The same wiring distance means that the difference between these wiring distances is shorter than the distance transmitted by one clock of the first clock signal.

Therefore, the timing signal TI-1 output from the terminal 12e of the first management unit 12 is once output to the outside of the first control circuit 10 and the outside of the second control circuit 20, and after passing through the circuit 50, the above-mentioned It is transmitted to the first control circuit 10 side and the second control circuit 20 side at the branch point, respectively. The timing signal TI-1 that has passed through the branch point and entered the first control circuit 10 is input from the terminal 19a to the first setting control unit 19. On the other hand, the timing signal TI-1 that has passed through the branch point and entered the second control circuit 20 is input from the terminal 29a to the second setting control unit 29.

The circuit 50 is a delay circuit that is interposed between the terminal 12e and the branch point outside the first control circuit 10 and outside the second control circuit 20, and includes a resistor R and a capacitor C. The resistance R and the capacitor C included in the circuit 50 are elements intentionally mounted in the signal line for transmitting the timing signal TI-1 from the first management unit 12 to the second setting control unit 29. Alternatively, it may be regarded as a resistance (wiring resistance) or a parasitic capacitance potentially existing in the signal line for transmitting the timing signal TI-1 from the first management unit 12 to the second setting control unit 29.

In any case, in order to transmit the timing signal TI-1 from the first management unit 12 to the second setting control unit 29, it is necessary to use a signal line that goes out of the first control circuit 10. Then, the timing signal TI-1 output from the first management unit 12 is set to the second setting due to the influence of the circuit 50 (resistor R, capacitor C) in the process of passing through the signal line going out to the outside of the first control circuit 10. Reaching the control unit 29 is somewhat delayed. On the other hand, when the timing signal TI-1 is transmitted from the first management unit 12 to the first setting control unit 19, it is possible to complete the transmission of the timing signal TI-1 in the first control circuit 10. 1 It is not necessary to use a signal line that goes out of the control circuit 10. However, if the timing signal TI-1 arriving from the first management unit 12 to the second setting control unit 29 is delayed with respect to the timing signal TI-1 arriving from the first management unit 12 to the first setting control unit 19. The synchronization between the movement of the first control circuit 10 including the first setting control unit 19 and the movement of the second control circuit 20 including the second setting control unit 29 cannot be maintained.

Therefore, in the second embodiment, the first control circuit 10 has a first output terminal (terminal 12e) that outputs the timing signal TI-1 to the outside of the first control circuit 10, and a timing signal TI- from outside the first control circuit 10. The second control circuit 20 includes a second input terminal (terminal 29a) for inputting a timing signal TI-1 and a first output terminal (terminal 12e). Is configured to be branched and connected to the first input terminal (terminal 19a) and the second input terminal (terminal 29a). Then, the first control circuit 10 performs the above-mentioned control according to the timing signal TI-1 input from the first input terminal (terminal 19a), and the second control circuit 20 performs the above-mentioned control, and the second control circuit 20 performs the second input terminal (terminal 29a). The above-mentioned control is performed according to the timing signal TI-1 input from. With such a configuration, the timing signal TI-1 output by the first control circuit 10 and input by the first control circuit 10 and the second control circuit 20 is similarly delayed, and as a result, the timing signal TI The synchronization between the processing by the first control circuit 10 according to -1 and the processing by the second control circuit 20 according to the timing signal TI-1 is ensured.

The signal line (signal line including the circuit 50) between the terminal 12e of the first management unit 12 and the terminal 19a of the first setting control unit 19 and the terminal 29a of the second setting control unit 29 is a second signal for convenience. Also called a line. The second management unit 22 has a terminal 22e corresponding to the terminal 12e of the first management unit 12 in terms of configuration, but in the present embodiment, the terminal 22e of the second management unit 22 is not particularly used. In FIG. 6, the description of the second signal line is omitted.

The second embodiment will be further described with reference to FIGS. 4 and 5.
4 and 5 are timing charts showing the relationship between the signals generated by the first control circuit 10 and the second control circuit 20 in the second embodiment. 4 and 5 are largely common.

The clock detection signal CK-R1 and the clock detection signal CK-R2 shown in FIGS. 4 and 5 are as described in the first embodiment. Further, in FIGS. 4 and 5, in the configuration shown in FIG. 3, the timing signal TI-1 (as the timing signal TI-1 that the first setting control unit 19 and the second setting control unit 29 simultaneously input through the second signal line) ( D), the timing signal TI-1 (ND) is shown. (D) attached to the timing signal TI-1 means a timing signal TI-1 having a relatively large delay as compared with the clock detection signal CK-R2 generated by the second management unit 22, and (ND) is. , (D) means a timing signal TI-1 with less delay than in the case of (D).

As described above, the clock detection signal CK-R2 generated by the second management unit 22 is a clock signal transmitted from the first control circuit 10 to the second control circuit 20 through the clock signal line 40 outside the first control circuit 10. It is a signal based on CK-12. As long as it passes through the clock signal line 40, the clock signal CK-12 also has some delay before reaching the second control circuit 20. How much each of the clock signal CK-12 passing through the clock signal line 40 and the timing signal TI-1 input to the second control circuit 20 from the terminal 12e of the first management unit 12 through the second signal line is delayed is determined. This is due to the characteristics such as the wiring resistance of each of the clock signal line 40 and the second signal line. Therefore, as shown by the timing signal TI-1 (D), the first setting control unit 19 and the second setting control unit 29 input the timing signal TI-1 (timing signal TI-1 as a predetermined high level signal). In some cases, the timing is later than the clock detection signal CK-R2 (second clock detection signal CK-R2 from the left in the examples of FIGS. 4 and 5) generated by the second management unit 22 for the predetermined number of times. As indicated by the timing signal TI-1 (ND), the timing at which the first setting control unit 19 and the second setting control unit 29 input the timing signal TI-1 is the predetermined number of clock detection signals CK-R2. It may be faster.

The timing at which the first setting control unit 19 and the second setting control unit 29 input the timing signal TI-1 becomes the timing signal TI-1 (D) or the timing signal TI-1 (ND). In the design of the image reader 1, it can be determined in advance by adjusting the setting of the circuit 50 (setting of the resistor R and the capacitor C) in the second signal line. Therefore, FIG. 4 is a chart in which the timing at which the first setting control unit 19 and the second setting control unit 29 input the timing signal TI-1 is the mode indicated by the solid timing signal TI-1 (D). be. On the other hand, FIG. 5 is a chart in which the timing at which the first setting control unit 19 and the second setting control unit 29 input the timing signal TI-1 is the mode indicated by the solid timing signal TI-1 (ND). be. In FIG. 4, the timing signal TI-1 (ND) is shown by a broken line for comparison with the timing signal TI-1 (D), and conversely, in FIG. 5, the timing signal TI-1 (ND) is shown. The timing signal TI-1 (D) is shown by a broken line for comparison.

The process by the first management unit 12 will be described with reference to FIG. The first management unit 12 is in a state where the first setting control unit 19 inputs the timing signal TI-1 at each timing of the generation of the clock detection signal CK-R1 after the clock detection signal CK-R1 is generated. It is determined whether or not, and when the first setting control unit 19 is in the state of inputting the timing signal TI-1, the enable adjustment signal SYNC-1 as a predetermined high level signal is generated. According to the example of FIG. 4, the first management unit 12 determines that the first setting control unit 19 has input the timing signal TI-1 at the timing of the third clock detection signal CK-R1 from the left. Since it can be done (see the broken line arrow A1), the enable adjustment signal SYNC-1 is generated according to the determination (see the broken line arrow A2).

The first management unit 12 generates the enable signal ENA-1 as a predetermined high-level signal at the timing of the generation of the Nth clock detection signal CK-R1 after the enable adjustment signal SYNC-1 is generated. (See dashed arrow A3). N is a preset number, and N = 1 as an example. N is also called the number of first clocks. Even after the enable signal ENA-1 is generated, the first management unit 12 is in a state where the first setting control unit 19 inputs the timing signal TI-1 at each timing of the generation of the clock detection signal CK-R1. It is determined whether or not, and when the first setting control unit 19 is in a state where the timing signal TI-1 is not input, the generation of the enable adjustment signal SYNC-1 is stopped. According to the example of FIG. 4, the first management unit 12 can determine that the first setting control unit 19 has not input the timing signal TI-1 at the timing of the ninth clock detection signal CK-R1 from the left. Therefore (see the broken line arrow A4), the enable adjustment signal SYNC-1 is stopped according to the determination (see the broken line arrow A5). Then, the first management unit 12 generates the enable signal ENA-1 at the timing of the generation of the Nth (N = 1) clock detection signal CK-R1 after stopping the enable adjustment signal SYNC-1. Stop (see dashed arrow A6).

The enable signal ENA-1 indicates a period during which the first management unit 12 permits reading by the first sensor 15 and light emission of the first light source 17. That is, in the first management unit 12, a module that generates a sensor control signal ST-1 for the first sensor 15 and outputs it from the terminal 12a, and a light emission control signal LT-1 for the first light source 17 are generated. The enable signal ENA-1 is notified to the modules output from the terminal 12b, and these modules have the sensor control signal ST-1 and the sensor control signal ST-1 as shown in FIG. 2 only during the period when the enable signal ENA-1 is generated. The light emission control signal LT-1 is output. As a result, the light emission of the first light source 17 and the reading by the first sensor 15 are repeatedly executed line by line only during the period when the enable signal ENA-1 is generated.

The period during which the enable signal ENA-1 is generated needs to substantially correspond to the period during which the document being conveyed by the transfer unit 30 passes through the arrangement position of the first sensor 15 in the transfer path 60. In the first control circuit 10, the first clock number N is set in advance so that the generation period of the enable signal ENA-1 includes the period during which the document passes through the arrangement position of the first sensor 15. As described above, the first management unit 12 transfers the document being conveyed by the transfer unit 30 from the terminal 12e to the first setting control unit 19 and the second setting control unit 29 during the period when the document is being detected by the document detection sensor 33. The timing signal TI-1 is output toward the target. Since the document detection sensor 33 is located upstream of the first sensor 15 and the second sensor 25 in the transport direction, the period during which the document is detected by the document detection sensor 33 and the document are the first sensor 15 and the second sensor 25. There is a time lag with the period of passing through the arrangement position of. This time difference is determined by the distance between the document detection sensor 33 and the first sensor 15 and the second sensor 25 in the transfer path 60, the transfer speed of the document by the transfer unit 30, and the like. Therefore, in the first control circuit 10, the degree of the time difference and the delay of the timing signal TI-1 input by the first setting control unit 19 and the second setting control unit 29 (for example, the timing signal TI-1 (D)). , Which of the timing signals TI-1 (ND) is used), and by setting the first clock number N to an appropriate value in advance, the generation period of the enable signal ENA-1 is eventually set to an appropriate value. The period during which the document passes through the arrangement position of the first sensor 15 is included. As a result, the first management unit 12 controls the light emission of the first light source 17 and the reading by the first sensor 15 only during the period when the enable signal ENA-1 is generated, so that the reading result of the first surface of the document is obtained. Can be obtained.

The process by the second management unit 22 will be described with reference to FIG. The second management unit 22 is in a state where the second setting control unit 29 inputs the timing signal TI-1 at each timing of the generation of the clock detection signal CK-R2 after the clock detection signal CK-R2 is generated. It is determined whether or not, and when the second setting control unit 29 is in the state of inputting the timing signal TI-1, the enable adjustment signal SYNC-2 as a predetermined high level signal is generated. According to the example of FIG. 4, the second management unit 22 determines that the second setting control unit 29 has input the timing signal TI-1 at the timing of the third clock detection signal CK-R2 from the left. Therefore, the enable adjustment signal SYNC-2 is generated according to the determination (see the broken line arrow A8).

The second management unit 22 generates the enable signal ENA-2 as a predetermined high-level signal at the timing of the generation of the Mth clock detection signal CK-R2 after the enable adjustment signal SYNC-2 is generated. (See dashed arrow A9). M is a preset number, and in the example of FIG. 4, M = 1. For convenience, M is also referred to as a second clock number. The second management unit 22 is in a state where the second setting control unit 29 inputs the timing signal TI-1 at each timing of the generation of the clock detection signal CK-R2 even after the enable signal ENA-2 is generated. It is determined whether or not, and when the second setting control unit 29 is in a state where the timing signal TI-1 is not input, the generation of the enable adjustment signal SYNC-2 is stopped. According to the example of FIG. 4, the second management unit 22 can determine that the second setting control unit 29 has not input the timing signal TI-1 at the timing of the ninth clock detection signal CK-R2 from the left. Therefore (see the broken line arrow A10), the enable adjustment signal SYNC-2 is stopped according to the determination (see the broken line arrow A11). Then, the second management unit 22 generates the enable signal ENA-2 at the timing of the generation of the Mth (M = 1) clock detection signal CK-R2 after stopping the enable adjustment signal SYNC-2. Stop (see dashed arrow A12).

The enable signal ENA-2 indicates a period during which the second management unit 22 permits reading by the second sensor 25 and light emission of the second light source 27. In the second management unit 22, a module that generates a sensor control signal ST-2 for the second sensor 25 and outputs it from the terminal 22a, and a light emission control signal LT-2 for the second light source 27 are generated and the terminal 22b. The enable signal ENA-2 is notified to the modules output from, and these modules are notified of the sensor control signal ST-2 and the light emission control as shown in FIG. 2 only during the period when the enable signal ENA-2 is generated. The signal LT-2 is output. As a result, the light emission of the second light source 27 and the reading by the second sensor 25 are repeatedly executed line by line only during the period when the enable signal ENA-2 is generated.

As can be seen from the description of the enable signal ENA-1, the period during which the enable signal ENA-2 is generated is approximately the period during which the document being transported by the transport unit 30 passes through the arrangement position of the second sensor 25 in the transport path 60. It needs to be equivalent. In the second control circuit 20, the second clock number M is set in advance so that the generation period of the enable signal ENA-2 includes the period during which the document passes through the arrangement position of the second sensor 25. That is, in the second control circuit 20, the time difference between the period in which the document is detected by the document detection sensor 33 and the period in which the document passes through the arrangement positions of the first sensor 15 and the second sensor 25, the first setting control. The degree of delay of the timing signal TI-1 input by the unit 19 and the second setting control unit 29 (for example, which of the timing signal TI-1 (D) and the timing signal TI-1 (ND)), and further. The second clock number M is set in advance to an appropriate value based on the generation period of the enable signal ENA-1. As a result, the generation period of the enable signal ENA-2 includes the period in which the document passes through the arrangement position of the second sensor 25, and the generation period of the enable signal ENA-1 is kept as close as possible. .. As a result, the second management unit 22 controls the light emission of the second light source 27 and the reading by the second sensor 25 only during the period when the enable signal ENA-2 is generated, so that the reading result of the second surface of the document is obtained. Can be acquired in synchronization with the acquisition of the reading result of the first surface.

The description of FIG. 5 basically applies mutatis mutandis to the description of FIG.
In the description of the process by the first management unit 12 based on FIG. 5, the above-mentioned arrow A1 is read as an arrow 13, the above-mentioned arrow A2 is read as an arrow 14, the above-mentioned arrow A3 is read as an arrow 15, and the above-mentioned arrow A4 is read as an arrow 15. It may be read as an arrow 16, the above-mentioned arrow A5 may be read as an arrow 17, and the above-mentioned arrow A6 may be read as an arrow 18.

The process by the second management unit 22 will be described with reference to FIG. According to the example of FIG. 5, the second management unit 22 determines that the second setting control unit 29 has input the timing signal TI-1 at the timing of the second clock detection signal CK-R2 from the left. (Refer to the broken line arrow A19), and the enable adjustment signal SYNC-2 is generated according to the determination (see the broken line arrow A20). The second management unit 22 generates the enable signal ENA-2 at the timing of the generation of the Mth clock detection signal CK-R2 after the enable adjustment signal SYNC-2 is generated (see the broken line arrow A21). In the example of FIG. 5, the second clock number M = 2. Further, according to the example of FIG. 5, the second management unit 22 determines that the second setting control unit 29 has not input the timing signal TI-1 at the timing of the eighth clock detection signal CK-R2 from the left. (See the broken line arrow A22), and stop the enable adjustment signal SYNC-2 according to the determination (see the broken line arrow A23). Then, the second management unit 22 generates the enable signal ENA-2 at the timing of the generation of the Mth (M = 2) clock detection signal CK-R2 after stopping the enable adjustment signal SYNC-2. Stop (see dashed arrow A24).

The number of clock detection signals CK-R1 during the generation period of the enable signal ENA-1 and the number of clock detection signals CK-R2 during the generation period of the enable signal ENA-2 shown in FIGS. This corresponds to the number of lines read by the first sensor 15 on the first surface and the number of lines read by the second sensor 25 on the second surface of the document. In FIGS. 4 and 5, the number of clock detection signals CK-R1 and CK-R2 within the generation period of such enable signals ENA-1 and ENA-2 is about 7 and very small due to space limitations. Actually, it is a large number such as hundreds or thousands.

Comparing the example of FIG. 5 and the example of FIG. 4, the timing at which the second setting control unit 29 inputs the timing signal TI-1 is earlier in the example of FIG. 5, and the second management unit 22 sets the second setting. The timing at which the control unit 29 determines that the timing signal TI-1 has been input is also earlier in the example of FIG. 5 by one clock detection signal CK-R2. Therefore, in the example of FIG. 5, when the second clock number M = 1 is set as in the example of FIG. 4, the generation period of the enable signal ENA-2 is the enable signal ENA-2 shown in FIG. The clock detection signal CK-R2 is one time earlier than the generation period, and the difference between the generation period of the enable signal ENA-1 and the generation period of the enable signal ENA-2 becomes large. Then, the processing related to the first surface by the first control circuit 10 (light emission of the first light source 17, reading by the first sensor 15, image processing for the reading result by the first sensor 15) and the second surface by the second control circuit 20. The synchronization with the processing (light emission of the second light source 27, reading by the second sensor 25, image processing for the reading result by the second sensor 25) is deteriorated.

In the second embodiment, in order to avoid such a decrease in synchronization, as described above, the degree of delay of the timing signal TI-1 input by the first setting control unit 19 and the second setting control unit 29 is set. A second clock number M is set accordingly, and the start and end of the generation period of the enable signal ENA-2 is controlled according to the set second clock number M. That is, the second control circuit 20 has a deviation (clock detection signal CK-) between the first clock signal transmitted from the first control circuit 10 and the timing signal TI-1 input from the second input terminal (terminal 29a). The control of the second sensor 25 and the second light source 27 is started at a preset timing according to the deviation of the timing signal TI-1 with respect to R2). According to such a configuration, it is easy to secure the synchrony between the processing on the first surface by the first control circuit 10 and the processing on the second surface by the second control circuit 20.

As can be understood from the above description, the first control circuit 10 generates the enable signal ENA-1 in response to the input of the timing signal TI-1 by the first setting control unit 19, and the second control circuit 20 Generates the enable signal ENA-2 in response to the input of the timing signal TI-1 by the second setting control unit 29. Therefore, the first control circuit 10 controls the first sensor 15 and the first light source 17 according to the timing signal TI-1 input from the first input terminal (terminal 19a), and the second control circuit 20 controls the first sensor 15 and the first light source 17. It can be said that the second sensor 25 and the second light source 27 are controlled according to the timing signal TI-1 input from the second input terminal (terminal 29a).

In the examples of FIGS. 4 and 5, the setting of the first clock number N is the same value (N = 1). However, also in the first control circuit 10, the value of the first clock number N to be set may differ depending on the degree of delay of the timing signal TI-1 input by the first setting control unit 19. For example, the timing at which the first management unit 12 determines that the first setting control unit 19 has input the timing signal TI-1 according to the degree of delay of the timing signal TI-1 input by the first setting control unit 19. Is shifted by the clock detection signal CK-R1 unit, in the first control circuit 10, the first clock is set according to the degree of delay of the timing signal TI-1 input by the first setting control unit 19. The value of the number N is different.

In FIGS. 4 and 5, a configuration in which the enable adjustment signals SYNC-1 and SYNC-2 are omitted may be adopted. That is, after the clock detection signal CK-R1 is generated by the first management unit 12, the first setting control unit 19 inputs the timing signal TI-1 at each timing of the generation of the clock detection signal CK-R1. When the first setting control unit 19 determines that the timing signal TI-1 has been input, the timing of the subsequent generation of the Nth clock detection signal CK-R1 is used. The enable signal ENA-1 may be generated. Then, after the enable signal ENA-1 is generated, the first management unit 12 is in a state where the first setting control unit 19 inputs the timing signal TI-1 at each timing of the generation of the clock detection signal CK-R1. When it is determined whether or not there is, and it is determined that the timing signal TI-1 is not input by the first setting control unit 19, the timing of the subsequent generation of the Nth clock detection signal CK-R1. May stop the generation of the enable signal ENA-1.

Similarly, after the second management unit 22 generates the clock detection signal CK-R2, the second setting control unit 29 inputs the timing signal TI-1 at each timing of the generation of the clock detection signal CK-R2. When it is determined whether or not it is in a state and it is determined that the second setting control unit 29 is in a state where the timing signal TI-1 is input, the timing of subsequent generation of the Mth clock detection signal CK-R2. May generate the enable signal ENA-2. Then, after the enable signal ENA-2 is generated, the second management unit 22 is in a state where the second setting control unit 29 inputs the timing signal TI-1 at each timing of the generation of the clock detection signal CK-R2. When it is determined whether or not there is, and it is determined that the timing signal TI-1 is not input to the second setting control unit 29, the timing of the subsequent generation of the Mth clock detection signal CK-R2. May stop the generation of the enable signal ENA-2.

The above-described embodiment discloses the configuration of the image reading device 1, each step (method) executed by the first control circuit 10 and the second control circuit 20 of the image reading device 1, and the first image reading device 1. It can be said that the program for causing the 1 control circuit 10 and the second control circuit 20 to execute each of the above steps is disclosed.

1 ... Image reader, 10 ... 1st control circuit, 11 ... 1st clock generation unit, 12 ... 1st management unit, 12a, 12b, 12c, 12d, 12e ... Terminal, 13 ... 1st image processing unit, 14 ... 1st AFE, 15 ... 1st sensor, 16 ... 1st light source drive circuit, 17 ... 1st light source, 18 ... transport control unit, 19 ... 1st setting control unit, 19a ... terminal, 20 ... 2nd control circuit, 21 ... 2nd clock generation unit, 22 ... 2nd management unit, 22a, 22b, 22c, 22d, 22e ... terminal, 23 ... 2nd image processing unit, 24 ... 2nd AFE, 25 ... 2nd sensor, 26 ... 2nd light source drive Circuit, 27 ... 2nd light source, 29 ... 2nd setting control unit, 29a ... terminal, 30 ... transport unit, 31 ... motor, 32 ... roller, 33 ... document detection sensor, 40 ... clock signal line, 50 ... circuit, 60 ... transport route, 70 ... manuscript

Claims (4)

The first sensor that reads the first side of the document and
A first control circuit that performs image processing on the output from the first sensor,
A second sensor that reads the second surface, which is the opposite surface of the first surface of the document,
A second control circuit, which is a circuit different from the first control circuit and performs image processing on the output from the second sensor, is provided.
The first control circuit includes a first clock circuit capable of generating a first clock signal , a first output terminal for outputting a predetermined timing signal to the outside of the first control circuit, and the timing from outside the first control circuit. Equipped with a first input terminal for inputting signals ,
The second control circuit includes a second clock circuit capable of generating a second clock signal , and a second input terminal for inputting the timing signal .
Further, a clock signal line for transmitting the first clock signal from the first control circuit to the second control circuit is provided.
The first output terminal is branched and connected to the first input terminal and the second input terminal.
The first control circuit controls reading by the first sensor in synchronization with the first clock signal according to the timing signal input from the first input terminal .
The second control circuit controls reading by the second sensor in synchronization with the first clock signal transmitted from the first control circuit according to the timing signal input from the second input terminal . An image reader characterized by this. The first light source that irradiates the first surface and
The first control circuit that controls turning on and off of the first light source, and
A second light source that illuminates the second surface and
The second control circuit for controlling the lighting and extinguishing of the second light source is provided .
The first control circuit controls the first light source in synchronization with the first clock signal according to the timing signal input from the first input terminal .
The second control circuit controls the second light source in synchronization with the first clock signal transmitted from the first control circuit in response to the timing signal input from the second input terminal . The image reading device according to claim 1 . 1 or claim 1 , wherein a delay circuit including a resistor and a capacitor is provided between the first output terminal and a branch point between the first input terminal and the second input terminal. 2. The image reader according to 2. The second control circuit starts the control at a preset timing according to the deviation between the first clock signal transmitted from the first control circuit and the timing signal input from the second input terminal. The image reading device according to any one of claims 1 to 3, wherein the image reading device is characterized in that.

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