JP2014045309A - Image reading device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress a temporary increase in load of a resource occurring irrespective of a small transfer amount of image data on a front face and a rear face in an image reading device.SOLUTION: An image reading unit 13 for a front face asserts a vertical synchronization signal VSYNC_1, thins out image data for each N line by M line at a timing based on the vertical synchronization signal VSYNC_1, and outputs the image data for the line after the thinning-out. An image reading unit 23 for a rear face asserts a vertical synchronization signal VSYNC_2, thins out the image data for each N line by M line at a timing based on the vertical synchronization signal VSYNC_2, and outputs the image data for the line after the thinning-out. The assertion timing of the vertical synchronization signal VSYNC_2 is delayed so that the amount of image data output from the image reading unit 23 is increased in a period during which the image data is not output from the image reading unit 13.

Description

  The present invention relates to an image reading apparatus.

  In an image reading apparatus capable of reading both sides of a document at the same time, when reading both sides simultaneously, twice as much image data as when reading one side is generated and transferred in the apparatus.

  In such a case, in a certain image reading apparatus, the transfer rate of the image data is doubled so that no delay occurs in subsequent processing (for example, see Patent Documents 1 and 2).

JP 2002-199170 A JP 2003-309705 A

  In an image reading apparatus, image data generated at a specific resolution (maximum resolution) may be thinned out. For example, when the resolution set by the user is lower than the maximum resolution, image data for a predetermined proportion of lines is thinned out according to the set resolution.

  For example, when the maximum resolution of the apparatus is 600 dpi and the set resolution is 300 dpi, one line of image data out of two lines of image data is thinned out, and after the thinned out The remaining one line of image data is transferred to a memory or the like via the bus. For this reason, image data is transferred intermittently.

  Therefore, when images on both sides of the document are read in parallel, the image data on the front side and the image data on the back side are intermittently transferred to a memory or the like via the bus.

  For this reason, although the amount of image data to be transferred is small, if the image data on the back side is also transferred during the period in which the image data on the front side is transferred, the load on resources such as the bus and memory during that period increases. The transfer of other data using the resource may be hindered.

  The present invention has been made in view of the above problems, and provides an image reading apparatus that suppresses a temporary increase in resource load that occurs despite the small amount of data transfer of front and back image data. For the purpose.

  In order to solve the above problems, the present invention is configured as follows.

  An image reading apparatus according to the present invention includes a first image reading unit for one of the front and back surfaces of a document, and a second image reading unit for the other of the front and back surfaces of the document. The first image reading unit includes a first timing signal generation unit that asserts a first vertical synchronization signal when the leading edge of the document is detected, and M data from image data for each N lines at a timing based on the first vertical synchronization signal. First thinning means for thinning out image data for lines and outputting image data for (NM) lines after thinning. The second image reading unit also includes a second timing signal generation unit that asserts a second vertical synchronization signal when the leading edge of the document is detected, and image data for each of N lines at a timing based on the second vertical synchronization signal. And second thinning means for thinning out the image data for M lines and outputting the image data for (N−M) lines after thinning. The second timing signal generation unit increases the amount of image data output from the second image reading unit during a period in which (NM) lines of image data are not output from the first image reading unit. The delay timing of the second vertical synchronization signal is delayed.

  As a result, the period in which the transfer of the image data on the front side and the transfer of the image data on the back side overlap is reduced, and a temporary increase in resource load that occurs despite the small amount of data transfer is suppressed. In addition, by controlling the timing of the second vertical synchronization signal, the timing of data output from the second image reading unit is controlled, so that a buffer for temporarily storing image data for controlling the timing of data output is provided. There is no need to provide it.

  In addition to the above image reading apparatus, the image reading apparatus according to the present invention may be as follows. In this case, the second thinning means is supplied with image data for each line in synchronization with the horizontal synchronizing signal. Then, the second timing signal generation unit (a) generates a horizontal synchronization signal, (b) counts the number of lines by the horizontal synchronization signal from the assertion of the first vertical synchronization signal based on the horizontal synchronization signal, (C) The assert timing of the second vertical synchronization signal is determined based on the number of lines.

  In addition to the above image reading apparatus, the image reading apparatus according to the present invention may be as follows. In this case, the image data for one line is supplied to the first thinning means in units of one line in synchronization with the first horizontal synchronizing signal, and the image for one line is supplied to the second thinning means in synchronization with the second horizontal synchronizing signal. Data is supplied. The first timing signal generation unit generates a first horizontal synchronization signal, and the second timing signal generation unit generates a second horizontal synchronization signal. The first horizontal synchronization signal and the second horizontal synchronization signal are synchronized.

  Thereby, the period in which the transfer of the image data on the front side and the transfer of the image data on the back side overlap is reduced.

  In addition to the above image reading apparatus, the image reading apparatus according to the present invention may be as follows. In this case, the first thinning unit and the second thinning unit thin out M line image data for resolution conversion.

  In addition to the above image reading apparatus, the image reading apparatus according to the present invention may be as follows. In this case, the image reading apparatus further includes a main memory connected to the bus. Then, the first image reading unit and the second image reading unit respectively output (NM) line image data after thinning to the main memory via the bus.

  As a result, a temporary increase in the load on the bus and the main memory is suppressed.

  In addition to the above image reading apparatus, the image reading apparatus according to the present invention may be as follows. In this case, the image reading apparatus further includes a lossy compression type image compression circuit connected to the bus. The first decimation unit and the second decimation unit decimate unnecessary M line image data by the lossy compression method, and the first image reading unit and the second image reading unit store (NM) lines after decimation. The image data is output to the image compression circuit via the bus.

  This suppresses a temporary increase in bus load when transferring image data on the front and back surfaces to the image compression circuit.

  In addition to the above image reading apparatus, the image reading apparatus according to the present invention may be as follows. In this case, the above-described lossy compression method is a JPEG method with a sampling factor of 4: 2: 0, and the first thinning unit and the second thinning unit use two lines for color data in the image data. Of these, the unnecessary color data for one line is thinned out, and the first image reading unit and the second image reading unit respectively output the thinned color data for one line to the image compression circuit. The second timing signal generator is configured to output the second line of color data from the second image reading unit during a period when the first line of color data is not output from the first image reading unit. A vertical synchronization signal is generated.

  According to the present invention, in the image reading apparatus, a temporary increase in resource load that occurs even though the data transfer amount of the front and back image data is small is suppressed.

FIG. 1 is a block diagram showing a configuration of an image reading apparatus according to Embodiment 1 of the present invention. FIG. 2 is a flowchart for explaining the operation of the timing signal generator in the image reading unit for the back surface in FIG. FIG. 3 is a timing chart for explaining the operation of the image reading unit in FIG. 1 when the resolution is converted to half. FIG. 4 is a block diagram showing the configuration of the image reading apparatus according to Embodiment 2 of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Embodiment 1 FIG.

  FIG. 1 is a block diagram showing a configuration of an image reading apparatus according to Embodiment 1 of the present invention. The image reading apparatus is a scanner, a copier, a facsimile machine, a multifunction machine, or the like, and reads images on both sides (front side and back side) of a document in parallel by one transport.

  The image reading apparatus shown in FIG. 1 includes a line sensor 11 that optically reads an image on the surface of a document, a drive circuit 12 that drives the line sensor 11 to generate image data on the document surface, and image data from the drive circuit 12. And an image reading unit 13 that performs various processing on the acquired image data and outputs the processed image data.

  The line sensor 11 optically reads a document image line by line. In the first embodiment, the line sensor 11 is a CCD (Charge Coupled Device) type line memory.

  The image reading apparatus shown in FIG. 1 includes a line sensor 21 that optically reads an image on the back side of a document, a drive circuit 22 that drives the line sensor 21 to generate image data on the back side of the document, and an image from the drive circuit 22. And an image reading unit 23 that acquires data, performs various processes on the image data, and outputs the processed image data.

  The line sensor 21 optically reads a document image line by line. In the first embodiment, the line sensor 21 is a CIS (Contact Image Sensor) line memory. In the first embodiment, the back surface line sensor 21 is arranged on the downstream side of the front surface line sensor 11 in the document transport path.

  The image reading units 13 and 23 are connected to the bus 31 and output image data via the bus 31. Further, a main memory 32, a CPU (Central Processing Unit) 33, a hard disk drive 34, a printing device 35, and a communication device 36 are connected to the bus 31.

  That is, the CPU 33, the hard disk drive 34, the printing device 35, and the communication device 36 are devices that share the bus 31 and / or the main memory 32 with the image reading units 13 and 23. Since these devices perform data transfer via the bus 31 asynchronously with the image reading units 13 and 23, the bandwidth usage of the bus 31 is leveled on the time axis by the image reading units 13 and 23. Is preferred.

  The main memory 32 is a volatile memory such as a DRAM (Dynamic Random Access Memory).

  The CPU 33 loads a program from a ROM (not shown) connected to the hard disk drive 34 or the bus 31 to the main memory 32 and executes the program to execute various processes. For example, the CPU 33 uses the main memory 32 as a work memory to execute processing for generating printing image data such as color conversion and screen processing. At that time, the CPU 33 accesses the main memory 32 via the bus 31.

  The hard disk drive 34 is a non-volatile storage device that stores image data supplied via the bus 31.

  The printing device 35 prints an image based on the printing image data supplied via the bus 31 on printing paper.

  The communication device 36 is a network interface, a peripheral device interface, or the like, and transmits image data supplied via the bus 31 to an external device.

  Here, the configuration of the image reading units 13 and 23 will be described.

  The image reading unit 13 includes a timing signal generation unit 41, a data reading unit 42, an image processing unit 43, a resolution conversion unit 44, and a direct memory access controller (DMAC) 45.

  The timing signal generator 41 generates a vertical synchronization signal VSYNC_1 and a horizontal synchronization signal HSYNC_1 for the image reading unit 13. The timing signal generation unit 41 periodically outputs a pulsed horizontal synchronization signal HSYNC_1 at a predetermined cycle, and when the leading edge of the document is detected, asserts the vertical synchronization signal VSYNC_1 in accordance with the horizontal synchronization signal HSYNC_1. The vertical synchronization signal VSYNC_1 and the horizontal synchronization signal HSYNC_1 are supplied to the data reading unit 42. The vertical synchronization signal VSYNC_1 is supplied to the timing signal generation unit 51 of the image reading unit 23.

  When the vertical synchronization signal VSYNC_1 is asserted, the data reading unit 42 repeatedly acquires image data for one line from the driving circuit 12 in synchronization with the horizontal synchronization signal HSYNC_1 and outputs the image data to the image processing unit 43.

  The image processing unit 43 performs predetermined image processing (such as shading correction) on the image data from the data reading unit 42, and outputs the image data after the image processing to the resolution conversion unit 44. Accordingly, the image data is supplied to the resolution conversion unit 44 line by line in synchronization with the horizontal synchronization signal HSYNC_1.

  The resolution conversion unit 44 converts the resolution of the image data from the image processing unit 43 to a resolution designated by setting by a user operation or the like, and outputs the converted image data to the main memory 32 by the DMAC 45.

  Specifically, when the resolution of the image data from the image processing unit 43 is reduced to (N−M) for N minutes (N> M, N and M are integers), the resolution conversion unit 44 is a vertical synchronization signal. At the timing based on VSYNC_1, image data for M lines is thinned out from image data for each N lines, and image data for (N−M) lines after thinning is output.

  The DMAC 45 is a circuit that transfers data to a device (such as the main memory 32) connected to the bus 31.

  As a result, the processed image data on the document surface is transferred to the main memory 32 via the bus 31 in synchronization with the horizontal synchronization signal HSYNC_1.

  The image reading unit 23 includes a timing signal generation unit 51, a data reading unit 52, an image processing unit 53, a resolution conversion unit 54, and a DMAC 55.

  The timing signal generator 51 generates a vertical synchronization signal VSYNC_2 and a horizontal synchronization signal HSYNC_2 for the image reading unit 23. The timing signal generation unit 51 periodically outputs a pulsed horizontal synchronization signal HSYNC_2 at a predetermined cycle, and when the leading edge of the document is detected, the timing signal generation unit 51 asserts the vertical synchronization signal VSYNC_2 in accordance with the horizontal synchronization signal HSYNC_2. The vertical synchronization signal VSYNC_2 and the horizontal synchronization signal HSYNC_2 are supplied to the data reading unit 52.

  In the first embodiment, the horizontal synchronization signal HSYNC_1 and the horizontal synchronization signal HSYNC_2 have the same period. Further, the horizontal synchronization signal HSYNC_1 and the horizontal synchronization signal HSYNC_2 are synchronized. Therefore, the horizontal synchronization signal HSYNC_1 may be supplied from the timing signal generation unit 41 to the timing signal generation unit 51 and used as the horizontal synchronization signal HSYNC_2.

  The timing signal generation unit 51 outputs the amount of image data output from the image reading unit 23 via the bus 31 during a period when the image data for (N−M) lines is not output via the bus 31 from the image reading unit 13. Is increased so that the assertion timing of the vertical synchronization signal VSYNC_2 is delayed.

  In the first embodiment, the timing signal generation unit 51 outputs (NM) lines from the image reading unit 23 during a period when image data for (NM) lines is not output from the image reading unit 13. A vertical synchronization signal VSYNC_2 is generated so that image data for at least one line is output.

  In the first embodiment, the timing signal generation unit 51 counts the number of lines by the horizontal synchronization signal HSYNC_2 from the assertion of the vertical synchronization signal VSYNC_1 based on the horizontal synchronization signal HSYNC_2, and based on the number of lines, the vertical synchronization The timing for asserting the signal VSYNC_2 is determined.

  When the vertical synchronization signal VSYNC_2 is asserted, the data reading unit 52 repeatedly acquires image data for one line from the drive circuit 22 in synchronization with the horizontal synchronization signal HSYNC_2 and outputs the image data to the image processing unit 53.

  The image processing unit 53 performs predetermined image processing (such as shading correction) on the image data from the data reading unit 52, and outputs the image data after the image processing to the resolution conversion unit 54. Therefore, the image data for each line is supplied to the resolution conversion unit 54 in synchronization with the horizontal synchronization signal HSYNC_2.

  The resolution conversion unit 54 converts the resolution of the image data from the image processing unit 53 to a resolution specified by setting by a user operation or the like, and outputs the converted image data to the main memory 32 by the DMAC 55.

  Specifically, when the resolution of the image data from the image processing unit 53 is reduced to (N−M) for N minutes (N> M, N and M are integers), the resolution conversion unit 54 is a vertical synchronization signal. At the timing based on VSYNC_2, image data for M lines is thinned out from image data for each N lines, and image data for (NM) lines after thinning is output.

  The DMAC 55 is a circuit that transfers data to a device (such as the main memory 32) connected to the bus 31.

  Thus, the processed image data on the back side of the document is transferred to the main memory 32 via the bus 31 in synchronization with the horizontal synchronization signal HSYNC_2 generated by the timing signal generation unit 51. At that time, the image reading unit 13 outputs image data mainly during a period in which no image data is output from the image reading unit 13, and the image reading unit 23 in a period in which image data is output from the image reading unit 13. Image data is not output from.

  Next, the operation of the image reading apparatus will be described.

  FIG. 2 is a flowchart for explaining the operation of the timing signal generation unit 51 in the image reading unit 23 for the back surface in FIG. FIG. 3 is a timing chart for explaining the operation of the image reading units 13 and 23 in FIG. 1 when the resolution is converted into half.

  In the image reading unit 13, when the vertical synchronization signal VSYNC_1 is asserted, the data reading unit 42 acquires image data for one line in synchronization with the vertical synchronization signal HSYNC_1, and the image processing unit 43 performs the processing on the image data. The image processing is performed, and the image data after the image processing is output to the resolution conversion unit 44. The resolution conversion unit 44 determines whether or not to thin out the image data of the line based on the resolution conversion rate (N−M) / N specified by the setting, and determines that the image data of the line is to be thinned out. When the image data of the line is discarded and it is determined that the image data of the line is not thinned, the image data of the line is output to the main memory 32 via the bus 31 by the DMAC 45.

  For example, as shown in FIG. 3, when the resolution conversion rate (N−M) / N is ½, the resolution conversion unit 44 outputs the processed image data DATA_1 for every other line every other line. .

  On the other hand, in the image reading unit 23, as shown in FIG. 2, the timing signal generation unit 51 first determines whether or not resolution conversion is set (step S1), and when resolution conversion is set, The vertical synchronization signal VSYNC_1 of the image reading unit 13 is monitored (step S2). When the vertical synchronization signal VSYNC_1 is asserted (time Tv1 in FIG. 3), the horizontal synchronization signal HSYNC_2 starts counting (step S3).

  Then, when the timing signal generation unit 51 reaches the default assertion timing (time Td1 or time Td2 in FIG. 3) of the vertical synchronization signal VSYNC_2 (step S4), the timing signal generation unit 51 ends the counting of the horizontal synchronization signal HSYNC_2 (step S5). Based on the count number of the synchronization signal HSYNC_2, it is determined whether or not the assert timing of the vertical synchronization signal VSYNC_2 is delayed from the default timing (step S6). The default assert timing is converted depending on the timing at which the leading edge of the document is detected.

  When it is determined that the assert timing of the vertical synchronization signal VSYNC_2 is not shifted from the default timing (at time Td1 in FIG. 3), the timing signal generation unit 51 immediately asserts the vertical synchronization signal VSYNC_2 (step S7).

  On the other hand, when it is determined that the assertion timing of the vertical synchronization signal VSYNC_2 is delayed from the default timing (at time Td2 in FIG. 3), the timing signal generator 51 delays the assertion timing of the vertical synchronization signal VSYNC_2 by one line. (Step S8).

  For example, when the resolution conversion rate (N−M) / N is ½, the timing signal generation unit 51 is equivalent to one cycle of the horizontal synchronization signal HSYNC_2 (that is, one line) when the count number is an even number. The assertion timing of the vertical synchronization signal VSYNC_2 is delayed, and when the count number is an odd number, the vertical synchronization signal VSYNC_2 is immediately asserted. As a result, as shown in FIG. 3, the processed image data DATA_2 for one line is sent via the bus 31 during the period when the processed image data DATA_1 for one line is not output from the image reading unit 13. The data is output to the memory 32.

  If resolution conversion is not set (step S1), the vertical synchronization signal VSYNC_2 is asserted (step S10) at the default timing of assertion of the vertical synchronization signal VSYNC_2 (step S9).

  As described above, the image reading apparatus according to the first embodiment includes the image reading unit 13 for one of the front side and the back side of the document and the image reading unit 23 for the other side.

  In the image reading unit 13, the timing signal generation unit 41 asserts the vertical synchronization signal VSYNC_1 when the leading edge of the document is detected, and the resolution conversion unit 44 performs the image for each N lines at a timing based on the vertical synchronization signal VSYNC_1. Image data for M lines is thinned out from the data, and image data for (NM) lines after thinning is output.

  In the image reading unit 23, the timing signal generation unit 51 asserts the vertical synchronization signal VSYNC_2 when the leading edge of the document is detected, and the resolution conversion unit 54 performs the image for each N lines at a timing based on the vertical synchronization signal VSYNC_2. Image data for M lines is thinned out from the data, and image data for (NM) lines after thinning is output.

  Then, the timing signal generation unit 51 performs vertical synchronization so that the amount of image data output from the image reading unit 23 increases during a period in which image data for (N−M) lines is not output from the image reading unit 13. The assert timing of the signal VSYNC_2 is delayed.

  As a result, the period in which the transfer of the image data on the front side and the transfer of the image data on the back side overlap is reduced, and a temporary increase in resource load that occurs despite the small amount of data transfer is suppressed. Further, in order to control the timing of data output from the image reading unit 23 by controlling the assert timing of the vertical synchronization signal VSYNC_2, a buffer for temporarily storing image data is provided to control the timing of data output. There is no need.

  Further, in the first embodiment, the resolution conversion units 44 and 54 thin out M line image data for resolution conversion, and the image data for (NM) lines after thinning out through the bus 31 is main. Each is output to the memory 32. Therefore, in the first embodiment, a temporary increase in the load on the bus 31 and the main memory 32 is suppressed.

Embodiment 2. FIG.

  In the image reading apparatus according to the second embodiment of the present invention, the image reading unit for the front surface and the image reading unit for the back surface are connected to the lossy compression method image compression circuit via the bus by the lossy compression method. The image data after thinning out the image data of unnecessary lines is transferred.

  FIG. 4 is a block diagram showing the configuration of the image reading apparatus according to Embodiment 2 of the present invention.

  In the second embodiment, the image compression circuit 71 is connected to the bus 31 and compresses the thinned image data supplied via the bus 31 by the lossy compression method. The image compression circuit 71 compresses the front side image data and the back side image data independently of each other by the lossy compression method. In Embodiment 2, this lossy compression method is a JPEG method with a sampling factor of 4: 2: 0.

  The image reading apparatus according to the second embodiment includes a front-side image reading unit 13a and a back-side image reading unit 23a.

  The image reading unit 13 a has the same components as the image reading unit 13, and has a line thinning unit 81 that thins out unnecessary M line image data by the lossy compression method at the subsequent stage of the resolution conversion unit 44. The line thinning unit 81 outputs the thinned image data to the image compression circuit 71 by the DMAC 45.

  The image reading unit 23a has the same components as the image reading unit 23, and has a line thinning unit 91 for thinning out unnecessary M line image data by the lossy compression method at the subsequent stage of the resolution conversion unit 54. The line thinning unit 91 outputs the thinned image data to the image compression circuit 71 by the DMAC 55.

  In the JPEG system with a sampling factor of 4: 2: 0, color data for one line (U data and V data in YUV data) is thinned out every other line. In the second embodiment, in the image reading units 13a and 23a, the line thinning units 81 and 91 thin out the color data for one line every other line, and the color data for one line every other line is compressed. It is transferred to the circuit 71.

  Similar to the timing signal generation unit 51, the timing signal generation unit 51a generates a horizontal synchronization signal HSYNC_2 and a vertical synchronization signal VSYNC_2. However, the timing signal generation unit 51a outputs the vertical synchronization signal VSYNC_2 so that the color data for one line is output from the image reading unit 23a during the period when the color data for one line is not output from the image reading unit 13a. Generate.

  Since the other configuration and operation of the image reading apparatus according to the second embodiment are the same as those of the first embodiment, description thereof is omitted.

  As described above, the image reading apparatus according to the second embodiment includes the lossy compression type image compression circuit 71 connected to the bus 31. The line thinning units 81 and 91 thin out unnecessary M line image data in the lossy compression method, and the image reading units 13a and 23a store the image data for (NM) lines after thinning out on the bus 31. Are output to the image compression circuit 71 respectively.

  Therefore, in the second embodiment, a temporary increase in the load on the bus 31 when the image data on the front surface and the back surface is transferred to the image compression circuit 71 is suppressed.

  Each embodiment described above is a preferred example of the present invention, but the present invention is not limited to these, and various modifications and changes can be made without departing from the scope of the present invention. It is.

  For example, in each of the above-described embodiments, the front surface line sensor 11 is disposed upstream of the back surface line sensor 21 in the document conveyance path, and the front surface vertical synchronization signal VSYNC_1 is earlier than the back surface vertical synchronization signal VSYNC_2. Asserted. In each of the above-described embodiments, the back surface line sensor is arranged upstream of the front surface line sensor in the document conveyance path, and the back surface vertical synchronization signal VSYNC is asserted earlier than the front surface vertical synchronization signal VSYNC. In the same manner, the amount of image data output from the image reading unit on the front surface increases during a period when (NM) lines of image data are not output from the image reading unit on the back surface. In addition, the assert timing of the vertical synchronization signal VSYNC on the surface is delayed.

  Further, in each of the above embodiments, an example in which the resolution is halved is shown, but the same processing can be performed with a resolution conversion rate such as 1/3 or 1/6.

  The present invention is applicable to, for example, an image reading apparatus that reads images on both sides of a document in parallel.

13 Image reading unit (an example of a first image reading unit)
23 Image reading unit (an example of a second image reading unit)
31 bus 32 main memory 41 timing signal generator (an example of a first timing signal generator)
44 Resolution converter (an example of first decimation means)
51, 51a Timing signal generator (an example of a second timing signal generator)
54 Resolution converter (an example of second thinning means)
71 Image compression circuit 81 Line thinning unit (an example of first thinning means)
91 Line thinning section (an example of second thinning means)

Claims (7)

A first timing signal generation unit that asserts a first vertical synchronization signal when the leading edge of the document is detected, and image data for M lines from image data for N lines at a timing based on the first vertical synchronization signal. A first image reading unit for one of the front side and the back side of the document, the first thinning unit outputting thinning and (NM) lines of image data after thinning;
A second timing signal generator that asserts a second vertical synchronization signal when the leading edge of the document is detected, and image data for M lines from image data for each N lines at a timing based on the second vertical synchronization signal. And a second image reading unit for the other of the front surface and the back surface of the document, and a second thinning means for outputting image data for (NM) lines after thinning.
The second timing signal generation unit increases the amount of image data output from the second image reading unit during a period in which the image data for the (N−M) lines is not output from the first image reading unit. Delaying the assertion timing of the second vertical synchronization signal,
An image reading apparatus. The second thinning means is supplied with image data line by line in synchronization with a horizontal synchronizing signal,
The second timing signal generation unit (a) generates the horizontal synchronization signal, and (b) determines the number of lines by the horizontal synchronization signal from the assertion of the first vertical synchronization signal based on the horizontal synchronization signal. Counting, and (c) determining assertion timing of the second vertical synchronization signal based on the number of lines;
The image reading apparatus according to claim 1. The first thinning means is supplied with image data line by line in synchronization with the first horizontal synchronizing signal,
The second thinning means is supplied with image data line by line in synchronization with the second horizontal synchronizing signal,
The first timing signal generator generates the first horizontal synchronization signal;
The second timing signal generation unit generates the second horizontal synchronization signal;
The first horizontal synchronizing signal and the second horizontal synchronizing signal are synchronized;
The image reading apparatus according to claim 1.   The image reading apparatus according to claim 1, wherein the first thinning unit and the second thinning unit thin out the image data of the M lines for resolution conversion. A main memory connected to the bus
The first image reading unit and the second image reading unit respectively output image data for the (NM) lines after thinning to the main memory via the bus;
The image reading apparatus according to claim 1, wherein the image reading apparatus is an image reading apparatus. Further comprising a lossy compression image compression circuit connected to the bus,
The first thinning means and the second thinning means thin out unnecessary M line image data in the lossy compression method,
The first image reading unit and the second image reading unit respectively output image data for the (N−M) lines after thinning to the image compression circuit via the bus;
The image reading apparatus according to claim 1. The lossy compression method is a JPEG method with a sampling factor of 4: 2: 0,
The first thinning means and the second thinning means thin out unnecessary color data for one line out of two lines for color data in the image data,
The first image reading unit and the second image reading unit respectively output the color data for the one line after thinning to the image compression circuit,
The second timing signal generator is configured to output the color data for one line from the second image reading unit during a period when the color data for the one line is not output from the first image reading unit. Generating the second vertical synchronization signal;
The image reading apparatus according to claim 6.

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