JP2017135572A - Image processing system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To remove a noise component of linear image data, resulting from spectrum spread, while avoiding a decrease in image reading speed even when the line image signal is processed using a modulation clock modulated by spectrum spread of a significant spreading factor.SOLUTION: A drive signal generating section 852 sets an output frequency for a drive signal Sd of an image sensor 13 to (m/n)Ts. Ts represents a modulation frequency of a modulation clock Ck1, n is a constant of an integer of 2 or greater, and m is a constant of a positive integer that is not a multiple of n. A correction part 87 sequentially selects some correction data Dc from n pairs of correction data Dc, and corrects line image data Id by using the selected correction data Dc.SELECTED DRAWING: Figure 2

Description

  The present invention relates to an image processing apparatus including an image sensor.

  An image processing apparatus having an image reading function such as a scanner, a copier, or a facsimile apparatus includes an image sensor such as a charge coupled device (CCD) or a contact image sensor (CIS). The image sensor reads a line image along the main scanning direction in synchronization with an input drive signal and outputs an analog line image signal. The image sensor may be referred to as a linear image sensor or a line sensor.

  In the image processing apparatus, unnecessary electromagnetic radiation (EMI) caused by a timing signal such as a high-speed clock associated with the image sensor becomes a problem. As a measure against EMI, a spread spectrum clock generator (SSCG) is used. The SSCG generates a modulation clock obtained by modulating a reference clock having a fixed period by spread spectrum. By adopting the SSCG, the peak level of the EMI per unit time is reduced.

  In general, the higher the spread rate of the spectrum spread, the more the peak level of the EMI per unit time is reduced.

  However, when a signal processing unit such as an analog front end (AFE) processes the analog line image signal at a timing based on the modulation clock, noise that fluctuates in accordance with fluctuations in the period of the modulation clock becomes image data. To occur.

  When the line period, which is the output period of the drive signal to the image sensor, is not synchronized with the modulation period of the spread spectrum, it is difficult to remove noise components included in the line image data. As a result, a striped pattern is formed in the output image.

  In the image processing apparatus, it is known that the line period is set to an integral multiple of the modulation period (see, for example, Patent Document 1). Accordingly, the modulation clock is synchronized every time the line image signal for one line is processed. In this case, correction for removing noise components included in the line image data is performed by using the line image data for one line when the image sensor reads a uniform light amount in advance.

JP 2002-281252 A

  By the way, when the line period is set to an integral multiple of the modulation period, there is a possibility that a wasteful waiting time may occur for each line in order to adjust the output timing of the drive signal to the image sensor. The waiting time causes a decrease in image reading speed.

  An object of the present invention is to reduce noise components of line image data caused by spectrum spreading while avoiding a decrease in image reading speed when a line image signal is processed using a modulation clock modulated by spectrum spreading. An object of the present invention is to provide an image processing apparatus that can be removed.

  An image processing apparatus according to one aspect of the present invention includes an image sensor, an analog front end, an image processing unit, a drive signal generation unit, a correction data storage unit, and a correction unit. The image sensor is an image sensor that reads a line image along the main scanning direction in synchronization with an input drive signal and outputs an analog line image signal. The analog front end converts the line image signal into digital line image data at a timing based on a modulation clock. The modulation clock is a clock obtained by modulating a reference clock having a fixed period by spread spectrum. The image processing unit processes the line image data at a timing based on the modulation clock. The drive signal generation unit generates the drive signal with an output cycle set to (m / n) Ts. Here, Ts is the modulation period of the modulation clock, n is an integer constant of 2 or more, and m is a positive integer constant that is not a multiple of n. The correction data storage unit is a storage unit that stores n sets of correction data. The correction unit corrects the line image data by sequentially applying each of the n sets of correction data to each of the line image data obtained continuously in the image processing unit.

  According to the present invention, when a line image signal is processed using a modulation clock modulated by spread spectrum, the noise component of the line image data caused by the spread spectrum is reduced while avoiding a decrease in image reading speed. It is possible to provide an image processing apparatus that can be removed.

FIG. 1 is a configuration diagram of an image processing apparatus according to the first embodiment. FIG. 2 is a block diagram of a data processing unit of the image processing apparatus according to the first embodiment. FIG. 3 is a diagram illustrating a modulation clock cycle, a drive signal time chart, and a correction data selection state during image reading of the image processing apparatus according to the first embodiment. FIG. 4 is a flowchart illustrating an example of a procedure of image reading processing in the image processing apparatus according to the first embodiment. FIG. 5 is a time chart of the modulation clock period, the drive signal, the optical black pixel data, and the synchronization detection signal during the synchronization adjustment process of the image processing apparatus according to the first embodiment. FIG. 6 is a configuration diagram of an image processing apparatus according to the second embodiment. FIG. 7 is a block diagram of a data processing unit of the image processing apparatus according to the second embodiment. FIG. 8 is a diagram illustrating a modulation clock cycle, a drive signal time chart, and a correction data selection state during image reading of the image processing apparatus according to the second embodiment. FIG. 9 is a time chart of a pixel clock, a sample hold signal, a sample hold synchronization signal, and a monotonic change signal during the synchronization adjustment process of the image processing apparatus according to the second embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, the following embodiment is an example which actualized this invention, Comprising: It does not have the character which limits the technical scope of this invention.

[First Embodiment]
First, the overall configuration of the image processing apparatus 10 according to the first embodiment will be described with reference to FIG.

  The image processing apparatus 10 includes an image reading apparatus 1 and an image forming apparatus 2. Further, the image processing apparatus 10 also includes a data processing unit 8 and an operation display unit 80 that are common to the image reading apparatus 1 and the image forming apparatus 2. The data processing unit 8 controls each device in the image reading apparatus 1 and the image forming apparatus 2 and performs other data processing.

  For example, the image processing apparatus 10 is a copying machine, a printer or a facsimile machine having a copying machine function, or a multifunction machine having a plurality of image processing functions including an image reading function.

[Image reading apparatus 1]
The image reading apparatus 1 includes a document scanning unit 11 and a document table cover 12. The document table cover 12 is supported so as to be rotatable with respect to the document scanning unit 11. The document scanning unit 11 includes a transparent document table 16, and the document table cover 12 covers the document table 16.

  The document table 16 is a portion on which a document 90 that is an image reading object is placed. Generally, the document table 16 is called platen glass.

  The document scanning unit 11 further includes an image sensor 13 and a scanning mechanism 110. The document scanning unit 11 in this embodiment also includes a light guide unit 111 including a mirror and a lens.

  The image sensor 13 is a linear image sensor that reads a one-dimensional line image along the main scanning direction D1 from the document 90 and outputs an analog line image signal Ia. The image sensor 13 in this embodiment is a CCD image sensor.

  The image sensor 13 reads the line image and outputs the line image signal Ia in synchronization with the input drive signal Sd (see FIG. 2).

  In the following description, one direction along the original 90 and a direction perpendicular thereto are referred to as a main scanning direction D1 and a sub-scanning direction D2, respectively. The line image is a one-dimensional image along the main scanning direction D1.

  The light emitting unit 14 is a light source such as an LED array that irradiates the original 90 with light. The light emitting unit 14 is formed extending in the main scanning direction D1, and illuminates a region of the document 90 that crosses the main scanning direction D1.

  The light guide unit 111 guides the reflected light from the document 90 to the image sensor 13 and condenses it on the light receiving unit of the image sensor 13. The light guide 111 includes a first light guide 112 supported by the scanning mechanism 110 and another second light guide 113.

  The scanning mechanism 110 is a mechanism that reciprocates the light emitting unit 14 and the movable light guide unit 112 along the sub-scanning direction D2 at a position close to the document table 16. As the light emitting unit 14 and the movable light guide unit 112 move along the sub-scanning direction D2, the image sensor 13 sequentially reads the line images at different positions on the document 90 in the sub-scanning direction D2.

  An ADF 120 is incorporated in the document table cover 12. The ADF 120 includes a document supply tray 121, a document delivery mechanism 122, a document transport mechanism 123, and a document discharge tray 124.

  The document delivery mechanism 122 sends the documents 90 set on the document supply tray 121 one by one to the document transport path R0. The document transport mechanism 123 transports the document 90 sent from the document delivery mechanism 122 along the document transport path R0 and further discharges it to the document discharge tray 124.

  The document conveyance path R0 is formed along a predetermined path that passes through the fixed reading position P0 along the transparent contact portion 160. For example, the contact portion 160 is a part of the document table 16.

  The scanning mechanism 110 can hold the movable light guide 112 at a position facing the fixed reading position P0. The ADF 120 operates in a state where the document table cover 12 is closed and the image sensor 13 faces the fixed reading position P0.

  When the ADF 120 operates, the movable light guide 112 is held at a position facing the fixed reading position P0. In this state, the light emitting unit 14 irradiates light toward the fixed reading position P0. Further, the image sensor 13 sequentially detects the amount of reflected light from a portion of one line passing through the fixed reading position P0 on the document 90, and sequentially outputs a line image signal Ia representing the line image.

  The contact portion 160 and the color reference portion 17 are arranged opposite to each other on the both sides of the fixed reading position P0 of the document transport path R0. The surface facing the fixed reading position P0 in the color reference unit 17 is a surface of a uniform reference color having a high light reflectance. Generally, the reference color is white. It is also conceivable that the reference color is a light yellowish color.

  The operation display unit 80 is, for example, an operation input unit including a touch panel and operation buttons, and is also a display unit including a liquid crystal display panel and a notification lamp.

  The data processing unit 8 controls various electric devices included in the image reading apparatus 1 and the image forming apparatus 2 based on input data input through the operation display unit 80 and detection results of various sensors.

  Further, the data processing unit 8 also executes various signal processing on the line image signal Ia output from the image sensor 13. For example, the data processing unit 8 includes an AFE 86 that performs predetermined signal processing on the line image signal Ia output from the image sensor 13.

  The AFE 86 converts the line image signal Ia into digital line image data Id (see FIG. 2). More specifically, the AFE 86 performs offset adjustment on the line image signal Ia, and further amplifies the signal subjected to the offset adjustment. Further, the AFE 86 generates line image data Id by digitally converting the amplified signal.

[Image forming apparatus 2]
The image forming apparatus 2 includes a device that forms an image on the sheet material 9 according to the image data output from the image reading apparatus 1. The sheet material 9 is a sheet-like image forming medium such as paper, coated paper, postcard, envelope, and OHP sheet.

  The image forming apparatus 2 includes a sheet supply unit 30, a sheet conveying unit 3, an image forming unit 4, an optical scanning unit 5, a fixing unit 6, and the like. An image forming apparatus 2 shown in FIG. 1 is an electrophotographic image forming apparatus. It is also conceivable that the image forming apparatus 2 is an image forming apparatus of another method such as an ink jet method.

  The sheet supply unit 30 is a portion on which a plurality of sheet materials 9 are stacked. The sheet conveying unit 3 includes a sheet feeding mechanism 31 and a sheet conveying mechanism 32.

  The sheet delivery mechanism 31 sends the sheet material 9 from the sheet supply unit 30 toward the sheet conveyance path 300. The sheet transport mechanism 32 transports the sheet material 9 along the sheet transport path 300. As a result, the sheet material 9 passes through the image forming unit 4 and the fixing unit 6 and then is discharged onto the sheet discharge tray 101 from the discharge port of the sheet conveyance path 300.

  The image forming unit 4 includes a drum-shaped photoconductor 41, a charging device 42, a developing device 43, a transfer device 45, a cleaning device 47, and the like. The photoreceptor 41 is an example of an image carrier that carries a developer image.

  The photoconductor 41 rotates, and the charging device 42 charges the surface of the photoconductor 41 uniformly. Further, an electrostatic latent image is written on the surface of the photoreceptor 41 charged by the optical scanning unit 5 scanning the laser beam. Further, the developing device 43 supplies the developer to the photoconductor 41 to develop the electrostatic latent image into the image of the developer.

  Further, the transfer device 45 transfers the developer image on the surface of the photoconductor 41 to the sheet material 9 moving between the photoconductor 41 and the transfer device 45. Further, the cleaning device 47 removes the developer remaining on the surface of the photoreceptor 41.

  The fixing unit 6 sends the sheet material 9 on which an image is formed between the heating roller 61 and the pressure roller 62 including the heater to the subsequent process. As a result, the fixing unit 6 heats the developer on the sheet material 9 to fix the image on the sheet material 9.

  As will be described later, the image processing apparatus 10 includes an SSCG 84 as a countermeasure against the EMI. The SSCG 84 generates a modulation clock Ck1 obtained by modulating the reference clock Ck0 having a constant period by spread spectrum (see FIG. 2). By adopting SSCG84, the peak level of EMI per unit time is reduced.

[Data processing unit 8]
Next, the data processing unit 8 of the image processing apparatus 10 will be described with reference to FIG.

  As shown in FIG. 2, the data processing unit 8 includes an MPU (Micro Processor Unit) 81, a data storage unit 82, an oscillator 83, an SSCG 84, a timing signal generation unit 85, an AFE 86, an image processing unit 87, an image storage unit 88, and the like. Prepare. The timing signal generation unit 85, the AFE 86, and the image processing unit 87 are configured by, for example, a DSP (Digital Signal Processor) or an ASIC (Application Specific Integrated Circuit).

  The MPU 81 is a processor that executes various arithmetic processes. The data storage unit 82 is a nonvolatile information storage medium in which a program for causing the MPU 81 to execute various processes and other information are stored in advance. The data storage unit 82 is also an information storage medium in which various information can be read and written by the MPU 81.

  The MPU 81 comprehensively controls the image processing apparatus 10 by executing various programs stored in advance in the data storage unit 82.

  The oscillator 83 is an element that generates a reference clock Ck0 having a constant period. The SSCG 84 generates a modulation clock Ck1 obtained by modulating the reference clock Ck0 having a constant period by spread spectrum. In this embodiment, the spread spectrum modulation period Ts is constant.

  The timing signal generation unit 85 is a circuit that generates various timing signals based on the modulation clock Ck1. The timing signal generation unit 85 generates the timing signal by frequency multiplication processing or frequency division processing for the modulation clock Ck1 and count processing.

  The timing signal generation unit 85 includes a pixel clock output unit 850, a sample hold signal generation unit 851, a drive signal generation unit 852, and the like.

  The pixel clock output unit 850 is a circuit that outputs a pixel clock Ckp. The pixel clock Ckp is a signal that defines the timing of capturing each image value of the line image data Id by the image processing unit 87.

  The sample hold signal generation unit 851 is a circuit that generates the sample hold signal Sh. The sample hold signal Sh is a signal that defines the timing at which the analog line image signal Ia is digitally converted into data of each pixel in the AFE 86. The pixel clock Ckp and the sample hold signal Sh are synchronized with each other.

  The pixel clock Ckp and the sample hold signal Sh are generated every time a predetermined number of multiplied clocks, which are clocks obtained by frequency multiplication of the modulation clock Ck1, are counted. For example, the timing signal generator 85 generates the 400 MHz multiplied clock by multiplying the 20 MHz modulated clock Ck1 by 20. Further, the timing signal generator 85 generates the pixel clock Ckp and the sample hold signal Sh at the rising or falling timing of the multiplied clock every time 20 400 MHz multiplied clocks are counted. As a result, the phase and duty can be set in units of time that is 1/20 of the period of the modulation clock Ck1.

  The drive signal generation unit 852 is a circuit that generates a drive signal Sd output to the image sensor 13. The drive signal generation unit 852 generates the drive signal Sd with reference to the modulation clock Ck1.

  As described above, the output period of the drive signal Sd is the line period Td. That is, every time the drive signal Sd changes from inactive to active, the image sensor 13 reads the line image and outputs a line image signal Ia for one line. Details of the drive signal generator 852 will be described later. 3, 5, and 8, the active and inactive states of the drive signal Sd are High and Low states, respectively. Note that the active and inactive states of the drive signal Sd may be opposite to the above.

  The AFE 86 is a circuit that processes the line image signal Ia in synchronization with a timing signal based on the modulation clock Ck1. The AFE 86 includes a sample hold unit 861, an amplification unit 862, an analog / digital converter 863, and the like.

  The sample hold unit 861 samples the line image signal Ia in synchronization with the sample hold signal Sh, and outputs a sampling signal. The level of the sampling signal is maintained until a new sampling signal is obtained. The sample hold signal Sh is an example of a timing signal based on the modulation clock Ck1.

  The amplifying unit 862 is a programmable gain amplifier that amplifies the sampling signal. The amplifying unit 862 amplifies the sampling signal with a gain according to an input not shown gain control signal. The gain control signal is supplied from the MPU 81.

  The analog / digital converter 863 converts the amplified sampling signal into digital data. The data string for one line output from the analog / digital converter 863 is line image data Id. As described above, the AFE 86 converts the line image signal Ia into the digital line image data Id at a timing synchronized with the sample hold signal Sh generated based on the modulation clock Ck1.

  The image processing unit 87 processes the line image data Id at a timing synchronized with the pixel clock Ckp. The pixel clock Ckp is an example of a timing signal based on the modulation clock Ck1.

  The image processing unit 87 performs known image processing such as shading correction processing, conversion processing from light amount equivalent data to density equivalent data, and gamma correction processing on the line image data Id. Thereby, the line image data Id after image processing is obtained.

  The image storage unit 88 stores the line image data Id after the image processing is performed. The image storage unit 88 is a so-called frame memory. The MPU 81 can acquire the pixel value included in the line image data Id output from the AFE 86 via the image processing unit 87 and the image storage unit 88.

  The image processing unit 87 can also calculate a representative value such as a peak value or an average value of the pixel values included in the line image data Id and store it in the image storage unit 88. Thereby, the MPU 81 can acquire the representative value via the image storage unit 88.

  In general, the higher the spread rate of the spectrum spread, the more the peak level of the EMI per unit time is reduced.

  When a signal processing unit such as the AFE 86 processes the analog line image signal Ia at a timing based on the modulation clock Ck1, noise that fluctuates according to the fluctuation of the cycle of the modulation clock Ck1 is generated in the line image data Id.

  When the line period Td that is the output period of the drive signal Sd to the image sensor 13 is not synchronized with the modulation period Ts, it is difficult to remove the noise component included in the line image data Id. As a result, a striped pattern is formed in the output image.

  By the way, when the line period Td is set to an integral multiple of the modulation period Ts, there is a possibility that a wasteful waiting time may occur for each line in order to adjust the output timing of the drive signal Sd to the image sensor 13. This waiting time causes a decrease in image reading speed.

  On the other hand, according to the image processing apparatus 10, even when the line image signal Ia is processed using the modulation clock Ck1 modulated by the spectrum spread, it is caused by the spectrum spread while avoiding a decrease in image reading speed. The noise component of the line image data Id to be removed can be removed.

  In the present embodiment, the image processing unit 87 includes a correction unit 871, a post-correction processing unit 872, and a correction data storage unit 873.

  The correction unit 871 performs shading correction of the line image data Id. The correction data storage unit 873 stores correction data Dc used for the shading correction. The correction data storage unit 873 is a storage unit that stores n sets of correction data Dc. For example, the correction data storage unit 873 may be n storage units that store n sets of correction data Dc. It is also conceivable that the correction data storage unit 873 is one storage unit including a storage area for each of the n sets of correction data Dc. Here, n is an integer of 2 or more. The post-correction processing unit 872 performs other image processing on the line image data Id that has been subjected to the shading correction.

  Further, the image processing unit 87 in this embodiment includes a black reference data recording unit 875, a white reference data recording unit 876, and a synchronization deviation detection unit 874.

  The black reference data recording unit 875 and the white reference data recording unit 876 execute processing for recording n sets of line image data Id obtained under a predetermined condition, which will be described later, in the correction data storage unit 873 as correction data Dc. To do.

  The synchronization deviation detection unit 874 detects a synchronization deviation between the modulation clock Ck1 and the drive signal Sd. The timing signal generation unit 85 includes a synchronization adjustment unit 853 that adjusts the output timing of the drive signal Sd by the detected amount of synchronization deviation. Details of the black reference data recording unit 875, the white reference data recording unit 876, the synchronization deviation detection unit 874, and the synchronization adjustment unit 853 will be described later.

[Output cycle of drive signal Sd]
Hereinafter, the details of the output cycle of the drive signal Sd in the first embodiment will be described with reference to FIG. The example shown in FIG. 3 is an example where the output period of the drive signal Sd is larger than the modulation period Ts of the modulation clock Ck1.

  FIG. 3 is a diagram illustrating a modulation clock cycle Tck1 and a time chart of the drive signal Sd during image reading by the image processing apparatus 10 and a selection state of the correction data Dc referred to. The modulation clock cycle Tck1 is the cycle of the modulation clock Ck1 that varies due to the spread spectrum process.

  In FIG. 3, the number added to the correction data Dc represents the identification number of each of the n sets of correction data Dc. Further, the fluctuation cycle of the modulation clock cycle Tck1 is the modulation cycle Ts.

  The drive signal generation unit 852 generates a drive signal Sd whose output cycle is set to (m / n) Ts. That is, the line period Td is set to (m / n) Ts. Ts is the modulation period of the modulation clock Ck1. n is an integer constant of 2 or more. m is a positive integer constant that is not a multiple of n.

  Setting the line cycle Td to (m / n) Ts means that the drive signal Sd is synchronized with a cycle that is an integral multiple of the output cycle of the drive signal Sd and a cycle that is an integral multiple of the modulation cycle Ts of the modulation clock Ck1. This is an example of setting the output cycle.

  FIG. 3 shows an example where n = 4 and m = 13. By setting the line cycle Td to (m / n) Ts, the modulation cycle Ts for m cycles matches the line cycle Td for n cycles. Note that setting Td to (m / n) Ts means setting the line period Td so that the drive signal Sd and the modulation clock Ck1 are synchronized every predetermined period (m · Ts). To do.

  In other words, if i is an integer greater than or equal to 1, the modulation clock cycle Tck1 when the i-th drive signal Sd is output and the modulation clock cycle when the (i + n) -th drive signal Sd is output. The phase matches that of Tck1.

  Therefore, assuming that k is an integer equal to or greater than 1, the correction data Dc for shading correction based on the line image data Id obtained in synchronization with the i-th output drive signal Sd is (i + k · n) th. It can be used for shading correction of line image data Id obtained in synchronization with each output drive signal Sd.

  The correction data Dc includes black reference data and white reference data for one line used for the shading correction. In the shading correction, a difference value obtained by subtracting each pixel value of the black reference data from each pixel value of the line image data Id is a difference obtained by subtracting each pixel value of the black reference data from each pixel value of the white reference data. Divide by value. The result of multiplying the division result by the maximum pixel value is the pixel value after shading correction.

  In the image processing unit 87, the correction unit 871 performs shading correction of each of the line image data Id by repeatedly applying each of the n sets of correction data Dc to each of the successively obtained line image data Id. That is, when the shading correction of each continuous line image data Id is performed, each of the n sets of correction data Dc is repeatedly used while being selected in order.

  In the above case, the line image data Id for n lines obtained in synchronization with the drive signal Sd output from the (i + k · n) th to the {i + (k + 1) · n−1} th is from the first. Each of the nth correction data Dc is applied in order. The shading correction can remove a noise component of the line image data Id caused by the spread spectrum.

  According to the present embodiment, the line period Td can be adjusted in units of Ts / n according to the required specification of the image reading speed. In this case, the waiting time for adjusting the output timing of the drive signal Sd is approximately Ts / n.

Therefore, according to the present embodiment, when the line image signal Ia is processed using the modulation clock Ck1 modulated by the spread spectrum, the line resulting from the spread spectrum is avoided while avoiding a decrease in the image reading speed. The noise component of the image data Id can be removed.

  Even when the line period Td is set to an integral multiple of the modulation period Ts, the waiting time may not be a problem. In that case, it is also conceivable that the drive signal generation unit 852 generates the drive signal Sd whose output cycle is set to n times the modulation cycle Ts. In this case, the line period Td is set to n · Ts.

  When the line period Td is set to n times the modulation period Ts, the correction data storage unit 873 stores one set of correction data Dc. Further, the correction unit 871 performs the shading correction of the line image data Id by repeatedly applying one set of correction data Dc to each of the line image data Id obtained continuously.

  By the way, even if the drive signal generation unit 852 performs the process of setting the line cycle Td to (m / n) Ts, a setting error of the line cycle Td may actually occur.

  For example, when the modulation period Ts is not an integral multiple of the period of the clock that counts the line period Td, a setting error of the line period Td occurs. When the modulation period Ts is a time that cannot be divided by n, the fraction of Ts / n becomes a setting error of the line period Td.

  When the number of lines for image reading increases, the setting error accumulates, and the accumulated setting error causes a synchronization shift dP between the modulation clock Ck1 for m cycles and the drive signal Sd for n cycles (see FIG. 5). ). If the synchronization deviation dP increases to a level that cannot be ignored, a striped pattern is formed in the output image.

  In this embodiment, the synchronization deviation detection unit 874 of the image processing unit 87 detects the synchronization deviation dP. Further, the synchronization adjustment unit 853 of the timing signal generation unit 85 adjusts the output timing of the drive signal Sd according to the detected synchronization deviation dP. Thereby, the synchronization shift dP is corrected. Details thereof will be described later.

[Image reading processing]
Next, an example of the procedure of the image reading process in the image reading apparatus 1 of the image processing apparatus 10 will be described with reference to the flowchart shown in FIG. In the following description, S1, S2,... Represent identification codes of respective steps executed by the data processing unit 8 in the image reading process.

  The MPU 81 of the data processing unit 8 starts the image reading process when detecting that a predetermined start operation has been performed on the operation display unit 80.

<Process S1>
First, the MPU 81 controls the scanning mechanism 110 to position the scanning mechanism 110 at the home position. The home position is a position where the movable light guide unit 112 faces the fixed reading position P0, that is, a position where the movable light guide unit 112 faces the color reference unit 17.

<Process S2>
Next, the timing signal generation unit 85 starts outputting each timing signal such as the pixel clock Ckp, the sample hold signal Sh, and the drive signal Sd. The output cycle of the pixel clock Ckp and the sample hold signal Sh output in step S2 is the same as the output cycle during image reading.

  In step S2, the synchronization adjustment unit 853 of the timing signal generation unit 85 sets the output cycle of the drive signal Sd to a predetermined cycle. For example, it is conceivable that the output cycle of the drive signal Sd in step S2 is set to an integral multiple of the modulation cycle Ts. In this case, it is conceivable that the output cycle of the drive signal Sd is set to the minimum cycle in which the line image for one line can be read in a cycle that is an integral multiple of the modulation cycle Ts.

<Process S3>
Next, the synchronization adjustment unit 853 of the timing signal generation unit 85 executes synchronization adjustment processing. The synchronization adjustment process is a process of adjusting the output timing of the drive signal Sd according to the detection result of the synchronization deviation detection unit 874 of the image processing unit 87.

  When the timing signal is output from the timing signal generation unit 85, the synchronization deviation detection unit 874 of the image processing unit 87 detects a synchronization deviation between the modulation clock Ck1 and the drive signal Sd. Specific examples thereof will be described below.

  In the present embodiment, a part of the light receiving portion of the image sensor 13 in the main scanning direction D1 is covered with a light shielding member (not shown). The partial area of the light receiving portion that is shielded from light at a predetermined position in the main scanning direction D1 is an optical black area located outside the effective pixel area corresponding to the image readable range.

  Therefore, the line image signal Ia includes signals of a plurality of optical black pixels corresponding to the optical black region of the light receiving unit. When the image sensor 13 is the CCD image sensor, the image sensor 13 often has the optical black region as a standard specification. In the following description, the plurality of pixel values in the optical black area are referred to as optical black pixel data Ish. A plurality of optical black pixels arranged in a row are referred to as an optical black pixel group.

  FIG. 5 is a time chart of the modulation clock cycle Tck1, the drive signal Sd, the optical black pixel data Ish, and the synchronization detection signal Ssy during the synchronization adjustment process. The synchronization detection signal Ssy is active when the modulation clock Ck1 and the drive signal Sd are synchronized, that is, when the synchronization deviation between the modulation clock Ck1 and the drive signal Sd falls within a predetermined allowable range. Is a signal. In the example shown in FIG. 5, the active state of the synchronization detection signal Ssy is a high state.

  The synchronization shift detection unit 874 detects a peak pixel Pp having a peak pixel value from the optical black pixel group in the line image data Id. Further, the synchronization shift detection unit 874 detects a shift in the position of the peak pixel Pp with respect to one fixed point pixel Pn in the optical black pixel group as a synchronization shift dP.

  For example, when the peak pixel Pp is shifted by one pixel upstream of the fixed point pixel Pn in the main scanning direction D1, the synchronization shift dP is −1 pixel. When the peak pixel Pp is shifted by one pixel downstream of the fixed point pixel Pn in the main scanning direction D1, the synchronization shift dP is +1 pixel.

  As shown in FIG. 5, each pixel value of the optical black pixel group varies according to the variation of the modulation clock cycle Tck1. More specifically, the pixel value of the optical black pixel decreases when the modulation clock cycle Tck1 is short, and the pixel value of the optical black pixel increases when the modulation clock cycle Tck1 is long.

  Therefore, the timing at which the modulation clock cycle Tck1 reaches its peak is synchronized with the timing at which the pixel value of the peak pixel Pp is obtained.

  Note that the timing at which the modulation clock period Tck1 reaches a peak is an example of a predetermined reference phase in the phase of the period variation of the modulation clock Ck1. The peak pixel Pp corresponds to a synchronous pixel that is synchronized with the reference phase of the modulation clock Ck1. The synchronization shift detection unit 874 is an example of a synchronization pixel detection unit that detects the synchronization pixel from a plurality of pixels.

  In step S3, the synchronization adjustment unit 853 adjusts the output timing of the drive signal Sd by the amount of the synchronization deviation dP when the synchronization deviation dP is detected. More specifically, the output timing of the drive signal Sd is adjusted during a period in which the output of the pixel clock Ckp is counted by the synchronization deviation dP, that is, the time obtained by multiplying the period of the pixel clock Ckp by the synchronization deviation dP.

  In the example shown in FIG. 5, the peak pixel Pp is not detected in the pixel value of the optical black pixel group obtained according to the output of the first drive signal Sd, and is obtained according to the output of the second drive signal Sd. The case where the peak pixel Pp is detected in the pixel value of the obtained optical black pixel group is shown.

  Since the width of the optical black region is narrow, the peak pixel Pp may not be detected in the optical black pixel group depending on the output timing of the drive signal Sd. In this case, the synchronization adjustment unit 853 adjusts the output timing of the next drive signal Sd by a predetermined adjustment time Tx that is a predetermined time.

  For example, it is assumed that the reference value of the line period Td before the start of reading the image of the document 90 is k times the modulation period Ts. k is a positive integer. In this case, if the peak pixel Pp is not detected in the optical black pixel group corresponding to the output of the previous drive signal Sd, the synchronization adjustment unit 853 causes the next drive signal Sd to be output from the output time of the previous drive signal Sd. The output is adjusted so that the time (k · Ts + Tx) has elapsed.

  For example, it is conceivable that the predetermined adjustment time Tx is less than Ts / 2. The example shown in FIG. 5 is an example when the default adjustment time Tx is Ts / 4.

  When the peak pixel Pp is detected in the optical black pixel group corresponding to the output of the previous drive signal Sd and the synchronization deviation dP is detected, the synchronization adjustment unit 853 determines that the next drive signal Sd is the previous drive signal Sd. The output is adjusted so that the time (k · Ts + dP · Tp) elapses from the time when the drive signal Sd is output. Here, Tp is the period of the pixel clock Ckp.

  FIG. 5 shows an example in which the output timing of the third drive signal Sd is adjusted according to the synchronization deviation dP detected in the pixel value of the optical black pixel group obtained according to the output of the second drive signal Sd. Represents.

  When the output timing of the drive signal Sd is adjusted according to the synchronization deviation dP, the peak pixel Pp detected according to the adjusted output of the drive signal Sd matches the fixed point pixel Pn. FIG. 5 shows that the peak pixel Pp is a fixed point pixel in the pixel value of the optical black pixel group obtained according to the output of the third drive signal Sd by adjusting the output timing of the third drive signal Sd. An example consistent with Pn is shown.

  When the peak pixel Pp matches the fixed point pixel Pn, the synchronization adjustment unit 853 activates the synchronization detection signal Ssy. Thus, the synchronization adjustment process before starting image reading ends.

  When the peak pixel Pp coincides with the fixed point pixel Pn, the synchronization adjustment unit 853 maintains the synchronization detection signal Ssy in an active state during execution of the document image reading process for at least one page. Note that the initial state of the synchronization detection signal Ssy is a negative state. In the synchronization detection signal Ssy shown in FIG. 5, the active state is the High state, and the negative state is the Low state.

  When the synchronization detection signal Ssy is in the active state, the drive signal generation unit 852 generates and outputs the drive signal Sd whose output cycle is set to (m / n) Ts.

<Step S4>
When the output of the drive signal Sd whose output cycle is set to (m / n) Ts starts, the black reference data recording unit 875 of the image processing unit 87 executes the black reference data recording process.

  The black reference data recording process is a process of storing n sets of line image data Id obtained continuously in the dark state where the light emitting unit 14 is turned off in the correction data storage unit 873 as n sets of black reference data. It is. When the image sensor 13 operates n times continuously, line image data Id for continuous n lines is obtained. Needless to say, the line period Td at this time is (m / n) Ts.

  That is, the black reference data recording unit 875 obtains the line image data Id obtained in synchronization with each of the i-th to (i + n−1) -th drive signals Sd in the dark state where the light-emitting unit 14 is turned off. To the n-th set of black reference data from the first to the n-th, it is recorded in the correction data storage unit 873. Here, the i-th is the order in which the first drive signal Sd whose output timing is adjusted by adjusting the synchronization deviation dP is counted as the first.

<Step S5>
Next, the MPU 81 lights the light emitting unit 14. When the light emitting unit 14 is turned on, the reading direction of the line image is illuminated.

<Step S6>
When the light emitting unit 14 is turned on, the white reference data recording unit 876 of the image processing unit 87 executes white reference data recording processing.

  In the white reference data recording process, n lines of line image data Id obtained in succession in a bright state in which the color reference unit 17 arranged in the line image reading direction is illuminated, This is a process of storing in the correction data storage unit 873 as reference data. The line period Td at this time is also (m / n) Ts.

  That is, the white reference data recording unit 876 drives from the (i + j · n) th to the (i + j · n−1) th in the bright state where the color reference unit 17 arranged in the line image reading direction is illuminated. The line image data Id obtained in synchronization with each signal Sd is recorded in the correction data storage unit 873 as the n sets of white reference data from the first to the nth.

  Note that j is an integer that is not zero. Further, j <k. The j-th is the order in which the first drive signal Sd whose output timing is adjusted by adjusting the synchronization shift dP is counted as the first.

<Step S7>
Next, the data processing unit 8 executes reading processing of the original image for one page. In the document image reading process, the correction unit 871 of the image processing unit 87 obtains n sets of correction data Dc recorded in the correction data storage unit 873 by the processes of steps S4 to S6 every time the line image data Id is obtained. The shading correction is executed while sequentially selecting one group at a time.

<Step S8>
When the document image reading process for one page is completed, the MPU 81 determines whether the image reading of the document 90 on the last page is completed. When the image reading of the document 90 of the last page is completed, the MPU 81 ends the image reading process.

<Step S9>
When the image reading of the document 90 of the last page has not been completed, the synchronization adjustment unit 853 of the timing signal generation unit 85 executes the synchronization adjustment process as in step S3. The process of step S9 is executed during a period when the image of the original 90 is not read.

  That is, when the document image reading process for a plurality of pages is continuously performed, the synchronization adjustment unit 853 drives the drive signal corresponding to the synchronization deviation dP during the period between the document image reading processes for each page. The output timing of Sd is adjusted.

  However, the reference value of the line period Td in the synchronization adjustment process in step S9 is (m / n) Ts. Further, the synchronization adjustment process in step S9 is executed based on the synchronization shift dP detected from the data of the optical black pixel group obtained in synchronization with the (n multiple of n + 1) th drive signal Sd. Here, (the integer multiple of n + 1) is the order in which the first drive signal Sd when the output timing is adjusted by adjusting the latest synchronization deviation dP is counted as the first.

  When the synchronization adjustment process in step S9 ends, the synchronization adjustment unit 853 maintains the synchronization detection signal Ssy in the active state during the reading process of the document image for at least the next one page. When the synchronization detection signal Ssy is in the active state, the drive signal generation unit 852 generates and outputs the drive signal Sd whose output cycle is set to (m / n) Ts.

  Further, when the synchronization adjustment process in step S9 is completed, the data processing unit 8 repeats the processes in steps S7 to S9 until the reading of the document image on the last page is completed.

  As described above, the synchronization adjustment unit 853 in step S3 adjusts the output timing of the drive signal Sd according to the synchronization shift dP before starting the document image reading process. Hereinafter, the adjustment in step S3 is referred to as initial adjustment.

  In the initial adjustment, the output timing of the drive signal Sd is adjusted so that the position of the peak pixel Pp in the optical black pixel group coincides with one fixed point pixel Pn.

  After the initial adjustment, if the drive signal Sd is output without error in the cycle of (m / n) Ts, the position of the peak pixel Pp is fixed point pixel Pn every time the drive signal Sd is output n times. Should match.

  However, as described above, an error may occur in the setting of the line period Td. When the number of lines for image reading increases, due to the error, a synchronization shift dP occurs between the modulation clock Ck1 for m cycles and the drive signal Sd for n cycles. The synchronization adjustment process in step S9 is a process for correcting the synchronization shift dP caused by the error.

  That is, when the document image reading process for a plurality of pages is continuously performed, the synchronization adjustment unit 853 drives the drive signal corresponding to the synchronization deviation dP during the period between the document image reading processes for each page. The output timing of Sd is adjusted (S9).

  Therefore, the synchronization shift dP is corrected before it becomes so large that a striped pattern appears in the image. Thereby, when the line cycle Td is set so that the drive signal Sd and the modulation clock Ck1 are synchronized with each other in a predetermined cycle, a stripe pattern appears in the output image due to the accumulation of the setting error of the line cycle Td. Can be prevented.

  In addition, the synchronization adjustment unit 853 does not adjust the output timing of the drive signal Sd during the reading process of the document image for one page (S7). Thereby, it is possible to avoid image noise caused by adjustment of the output timing of the drive signal Sd.

[Second Embodiment]
Next, an image processing apparatus 10A according to the second embodiment will be described with reference to FIGS. The image processing apparatus 10A includes an image reading apparatus 1A and an image forming apparatus 2.

[Image reading apparatus 1A]
Hereinafter, a configuration of the image reading apparatus 1A different from that of the image reading apparatus 1 will be described with reference to FIGS.

  The image reading apparatus 1A is different from the image reading apparatus 1 in that the image reading apparatus 1A includes an image sensor 13A having a different type from the image sensor 13. The image sensor 13A is a CIS in which a light amount detection element and a light emitting unit 14 are integrally formed. The CIS is an example of a linear image sensor.

  The image sensor 13A has a plurality of output channels for outputting a part of the line image signal Ia in parallel. Hereinafter, signals output from the respective output channels are referred to as partial line image signals Ia1 to Ia3. In the example of FIG. 7, the image sensor 13A is the CIS having the three output channels.

  Note that it is conceivable that the image sensor 13A has two output channels or four or more output channels.

  In FIG. 7, the first partial line image signal Ia1 is output from the first output channel Ch1, the second partial line image signal Ia2 is output from the second output channel Ch2, and the third partial line image signal is output from the third output channel Ch3. Ia3 is output.

  The data processing unit 8A of the image reading apparatus 1A includes a plurality of AFEs 86 corresponding to the plurality of output channels. In FIG. 7, a first AFE 86a, a second AFE 86b, and a third AFE 86c process a first partial line image signal Ia1, a second partial line image signal Ia2, and a third partial line image signal Ia3, respectively.

  The data processing unit 8A includes a monotonic change signal generation unit 891 and a multiplexer 892. Further, the synchronization deviation detection unit 874A in the image processing unit 87 of the data processing unit 8A detects the synchronization deviation dP by a method different from the synchronization deviation detection unit 874 in the image processing unit 87 of the data processing unit 8. The operation contents of the monotonic change signal generation unit 891, the multiplexer 892, and the synchronization shift detection unit 874A will be described later.

[Output cycle of drive signal Sd]
Hereinafter, the details of the output cycle of the drive signal Sd in the second embodiment will be described with reference to FIG. The example shown in FIG. 8 is an example where the line cycle Td, which is the output cycle of the drive signal Sd, is smaller than the modulation cycle Ts of the modulation clock Ck1.

  FIG. 8 is a diagram showing the modulation clock cycle Tck1 and the time chart of the drive signal Sd during the image reading of the image processing apparatus 10 and the selection state of the correction data Dc referred to, as in FIG.

  The drive signal generation unit 852 in the data processing unit 8A also generates the drive signal Sd with the output cycle set to (m / n) Ts. That is, the line period Td is set to (m / n) Ts. Ts is the modulation period of the modulation clock Ck1. n is an integer constant of 2 or more. m is a positive integer constant that is not a multiple of n.

  FIG. 8 shows an example where n = 4 and m = 1. By setting the line cycle Td to (m / n) Ts, the modulation cycle Ts for m cycles matches the line cycle Td for n cycles.

  Therefore, assuming that k is an integer equal to or greater than 1, the correction data Dc for shading correction based on the line image data Id obtained in synchronization with the i-th output drive signal Sd is (i + k · n) th. It can be used for shading correction of line image data Id obtained in synchronization with each output drive signal Sd. What has been described above is the same as that described in the first embodiment.

  Therefore, also in the present embodiment, the correction unit 871 sequentially selects one set of correction data Dc from the n sets of correction data Dc every time the line image data Id is obtained, and uses the selected correction data Dc to generate a line image. Shading correction is performed on the data Id. By the shading correction, the noise component of the line image signal data Id caused by the spectrum spread can be removed.

  Also in this embodiment, the line period Td can be adjusted in units of Ts / n according to the required specification of the image reading speed. In this case, the waiting time for adjusting the output timing of the drive signal Sd is approximately Ts / n.

  Therefore, even when the line image signal Ia is processed using the modulation clock Ck1 modulated by the spread spectrum having a large spreading factor, the line image data Id resulting from the spread spectrum is avoided while avoiding a decrease in the image reading speed. Noise components can be removed.

  In other words, the EMI peak level per unit time can be further reduced while avoiding a decrease in the image reading speed.

  In some cases, the image sensor 13A is the CIS that can read a color image. In this case, in the color image reading process, the three light emitting units 14 having different emission colors are sequentially turned on. Then, when the image sensor 13A operates three times in succession, a set of color line image signals Ia composed of monochromatic line image signals Ia for three different colors are obtained.

  That is, in the color image reading process, the reading direction of the line image is illuminated with one color light sequentially selected from three colors of light, and the image sensor 13A outputs a single line image signal Ia for each emission color. . In this case, the constant n is a multiple of 3 that is 6 or more.

  In the color image reading process, the image processing unit 87 may process the line image data Id of each color in parallel every time the line image data of three colors is obtained. In this case, the correction unit 871 sequentially selects the three sets of correction data Dc from the n sets of correction data every time the line image data of three colors is obtained. Further, the correction unit 871 corrects each of the three color line image data Id using each of the selected three sets of correction data Dc.

  Also in the present embodiment, an error in the line period Td can occur as in the first embodiment. In the present embodiment, the synchronization deviation detection unit 874A of the image processing unit 87 detects the synchronization deviation dP. Further, the synchronization adjustment unit 853 of the timing signal generation unit 85 adjusts the output timing of the drive signal Sd according to the detected synchronization deviation dP. Thereby, the synchronization shift dP is corrected.

  The synchronization adjustment unit 853 performs the same processing in the present embodiment and the first embodiment. On the other hand, the synchronization error dP is detected by a method different from that of the synchronization error detection unit 874A and the synchronization error detection unit 874. The synchronization shift detection unit 874A can detect the synchronization shift dP even when the image sensor 13A does not have the optical black area.

[Detection of synchronization deviation dP]
Hereinafter, the processing of the synchronization deviation detection unit 874A will be described with reference to FIG. FIG. 9 is a time chart of the pixel clock Ckp, the sample hold signal Sh, the sample hold synchronization signal Iap, and the monotonic change signal Iax during the synchronization adjustment process of the image processing apparatus 10A.

  The monotonic change signal generation unit 891 is a circuit that generates a monotone change signal Iax whose signal level monotonously increases or decreases monotonously at a predetermined pace. For example, the monotonous change signal generation unit 891 is a first-order lag filter circuit that generates a first-order lag signal from a pulsed sample-hold synchronization signal Iap. In this case, the first-order lag signal is a monotonic change signal Iax whose signal level monotonously increases at a predetermined pace.

  As described above, the sample hold signal Sh is a signal used for digital conversion of the line image signal Ia in synchronization with the modulation clock Ck1. The sample hold synchronization signal Iap is a pulse signal synchronized with the sample hold signal Sh. The sample hold synchronization signal generation unit 854 of the timing signal generation unit 85 generates the sample hold synchronization signal Iap. For example, the pulse width of the sample hold synchronization signal Iap is larger than the pulse width of the sample hold signal Sh.

  The sample hold signal Sh, the sample hold synchronization signal Iap, and the monotonic change signal Iax are generated corresponding to each pixel in the line image.

  In the present embodiment, the multiplexer 892 selectively transmits one of the output signal of the specific output channel of the image sensor 13 </ b> A and the monotonic change signal Iax to one AFE 86. The specific output channel is a predetermined one of the plurality of output channels in the image sensor 13A.

  In the example shown in FIG. 7, the first output channel Ch1 is the specific output channel. The multiplexer 892 selects a signal to be transmitted to the first AFE 86a according to the selection signal Ssw output from the MPU 81. More specifically, the multiplexer 892 transmits the monotonous change signal Iax to the first AFE 86a during the period when the synchronization adjustment process is performed, and transmits the signal of the first output channel Ch1 to the first AFE 86a during the other periods.

  In the following description, each of a plurality of pixels in the data obtained through the first AFE 86a during the period in which the synchronization adjustment process is performed is referred to as a target pixel. The plurality of target pixels are referred to as a target pixel group. The target pixel group is an example of a plurality of pixels that are continuous at a predetermined position.

  Further, the sample-and-hold signal Sh used for digital conversion of the line image signal Ia for the pixel-of-interest group is referred to as a sample-and-hold signal.

  The monotonic change signal Iax is a signal whose signal level monotonously increases or decreases monotonously at a predetermined pace from the time when the target sample hold signal changes from inactive to active. In the sample hold signal Sh shown in FIG. 9, the inactive state is the Low state, and the active state is the High state.

  During the period in which the synchronization adjustment process is performed, the first AFE 86a detects the arrival level Lx that is the level of the monotonous change signal at a specific time point. The specific time is a time when the sample hold signal of interest changes from the active to the inactive. That is, the first AFE 86a that digitally converts the signal of the specific output channel also serves as an arrival level detection unit that detects the arrival level Lx.

  The synchronization shift detection unit 874A detects a peak pixel Pp having a peak arrival level Lx from the target pixel group in the line image data Id. Further, the synchronization shift detection unit 874A detects a shift in the position of the peak pixel Pp with respect to one fixed point pixel Pn in the target pixel group as a synchronization shift dP.

  The pulse width of the sample hold signal Sh changes according to the change of the modulation clock cycle Tck1. Therefore, the arrival level Lx also changes according to the change of the modulation clock cycle Tck1. When the monotonous change signal Iax is a monotonically increasing signal, the arrival level Lx increases as the modulation clock period Tck1 increases.

  Therefore, the timing at which the modulation clock cycle Tck1 reaches a peak and the timing at which the pixel value of the peak pixel Pp at which the arrival level Lx reaches a peak are synchronized.

  Note that the timing at which the modulation clock period Tck1 reaches a peak is an example of a predetermined reference phase in the phase of the period variation of the modulation clock Ck1. The peak pixel Pp corresponds to a synchronous pixel that is synchronized with the reference phase of the modulation clock Ck1. The synchronization shift detection unit 874A is an example of a synchronization pixel detection unit that detects the synchronization pixel from a plurality of pixels.

  In the initial adjustment, the synchronization adjustment unit 853 adjusts the output timing of the drive signal Sd so that the position of the peak pixel Pp in the target pixel group matches one fixed point pixel Pn.

  After the initial adjustment, if the drive signal Sd is output without error in the cycle of (m / n) Ts, the position of the peak pixel Pp is fixed point pixel Pn every time the drive signal Sd is output n times. Should match.

  However, as described above, an error may occur in the setting of the line period Td. When the number of lines for image reading increases, due to the error, a synchronization shift dP occurs between the modulation clock Ck1 for m cycles and the drive signal Sd for n cycles.

  Therefore, when the document image reading process for a plurality of pages is continuously performed, the synchronization adjustment unit 853 generates a drive signal corresponding to the synchronization deviation dP during the period between the document image reading processes for each page. The output timing of Sd is adjusted (see S9 in FIG. 4).

  If the image processing apparatus 10A is employed, the same effects as those obtained when the image processing apparatus 10 is employed can be obtained. Further, by employing the multiplexer 892, the first AFE 86a serves as both a processing unit for the line image signal Ia and a processing unit for the monotonous change signal Iax. Thereby, the arrival level Lx of the monotonous change signal Iax can be detected without increasing the relatively expensive AFE 86.

  In the present embodiment, it is conceivable that the black reference data recording unit 875 stores the n sets of black reference data in the correction data storage unit 873 in the following manner. First, the black reference data recording unit 875 derives the first representative data for n lines from the line image data Id for the number of lines that is an integral multiple of n obtained continuously in the dark state. By continuously operating the image sensor 13 a number of times that is an integral multiple of n, line image data Id corresponding to the number of continuous lines that is an integral multiple of n is obtained. Needless to say, the line period Td at this time is (m / n) Ts.

  For example, the first representative data may be an average value or a minimum value of a plurality of pixel values corresponding to each other. Here, when i and j are integers of 1 or more, the i-th line image data Id and the (i + j · n) -th line image data Id are data corresponding to each other. The dark state is a state where the reading direction of the line image is not illuminated.

  Further, the black reference data recording unit 875 stores the derived first representative data for n lines in the correction data storage unit 873 as n sets of black reference data.

  In addition, the white reference data recording unit 876 is configured to obtain a second line image data Id corresponding to the number of lines that is an integral multiple of n continuously obtained in the bright state where the color reference unit 17 is illuminated. Derive representative data. The line period Td at this time is also (m / n) Ts.

  For example, the second representative data may be an average value or a maximum value of a plurality of pixel values corresponding to each other.

  Further, the white reference data recording unit 876 stores the derived second representative data for n lines in the correction data storage unit 873 as n sets of white reference data.

  In general, the CIS is an image sensor with relatively large variations in pixel values. Therefore, the representative data of the line image data Id for a plurality of lines corresponding to each other is recorded as the black reference data and the white reference data, thereby suppressing the influence of pixel value variations.

[Application example]
In the image processing apparatus 10 including the CCD image sensor, it may be considered that the monotonic change signal generation unit 891, the multiplexer 892, and the synchronization shift detection unit 874A in the image processing apparatus 10A are employed. In this case, the multiplexer 892 selectively transmits one of the entire line image signal Ia and the monotone change signal Iax to the AFE 86.

  Further, in the image processing apparatus 10A including the CIS, it is conceivable that the image sensor 13A includes a light receiving unit outside the effective pixel region. In this case, if the image processing apparatus 10A includes a light shielding member that covers the light receiving part outside the effective pixel region, the synchronization shift detection unit 874 of the image processing apparatus 10 may be employed in the image processing apparatus 10A. .

  In the first embodiment, the fixed point pixel Pn in the optical black pixel group is a pixel determined in advance before the initial adjustment (S3 in FIG. 4). In addition, the peak pixel Pp detected first in the initial adjustment may be set as the fixed point pixel Pn in the optical black pixel group. The fixed point pixel Pn set in this way is used in the synchronization adjustment process (S9 in FIG. 4) executed during the period between the original image reading processes of each page.

  Similarly, in the second embodiment, the fixed point pixel Pn in the target pixel group is a pixel determined in advance before the initial adjustment (S3 in FIG. 4). In addition, the peak pixel Pp detected first in the initial adjustment may be set as the fixed point pixel Pn in the target pixel group. The fixed point pixel Pn set in this way is used in the synchronization adjustment process (S9 in FIG. 4) executed in the period between the reading processes of the original image of each page.

  The image processing apparatus according to the present invention can be freely combined with the above-described embodiments and application examples, or can be appropriately modified within the scope of the invention described in each claim. Alternatively, it may be configured by omitting a part.

DESCRIPTION OF SYMBOLS 1,1A: Image reading apparatus 2: Image forming apparatus 3: Sheet conveying part 4: Image forming part 5: Optical scanning part 6: Fixing part 8, 8A: Data processing part 9: Sheet material 10, 10A: Image processing apparatus 11 : Document scanning unit 12: Document cover 13, 13A: Image sensor 14: Light emitting unit 16: Document table 17: Color reference unit 30: Sheet supply unit 31: Sheet feeding mechanism 32: Sheet transport mechanism 41: Photoconductor 42: Charging Device 43: Developing device 45: Transfer device 47: Cleaning device 61: Heating roller 62: Pressure roller 80: Operation display unit 81: MPU
82: Data storage unit 83: Oscillator 85: Timing signal generation unit 87: Image processing unit 88: Image storage unit 90: Document 101: Sheet discharge tray 110: Scanning mechanism 111: Light guide unit 112: Movable light guide unit 113: Fixed Light guide unit 121: Document supply tray 122: Document delivery mechanism 123: Document conveyance mechanism 124: Document discharge tray 160: Contact unit 300: Sheet conveyance path 850: Pixel clock output unit 851: Sample hold signal generation unit 852: Drive signal generation Unit 853: synchronization adjustment unit 854: sample hold synchronization signal generation unit 861: sample hold unit 862: amplification unit 863: digital converter 871: correction unit 872: post-correction processing unit 873: correction data storage unit 874, 874A: synchronization deviation detection Part 875: Black reference data recording part 876: White base Data recording unit 891: Monotonic change signal generation unit 892: Multiplexer Ch1: First output channel Ch2: Second output channel Ch3: Third output channel Ck0: Reference clock Ck1: Modulation clock Ckp: Pixel clock D1: Main scanning direction D2: Sub-scanning direction Dc: correction data Ia: line image signals Ia1, Ia2, Ia3: partial line image signal Iap: sample hold synchronization signal Iax: monotone change signal Id: line image data Ish: optical black pixel data Lx: arrival level P0: Fixed reading position Pn: Fixed point pixel Pp: Peak pixel R0: Document transport path Sd: Drive signal Sh: Sample hold signal Ssw: Selection signal Ssy: Synchronization detection signal Tck1: Modulation clock cycle Td: Line cycle (drive signal output cycle)
Ts: spread spectrum modulation period Tx: predetermined adjustment time dP: synchronization shift

Claims (9)

An image sensor that reads a line image along the main scanning direction in synchronization with an input drive signal and outputs an analog line image signal;
An analog front end that converts the line image signal into digital line image data at a timing based on a modulation clock obtained by modulating a spread-spectrum reference clock by spread spectrum;
An image processing unit that processes the line image data at a timing based on the modulation clock;
When the modulation period of the modulation clock is Ts, an integer constant of 2 or more is set to n, a positive integer constant that is not a multiple of n is set to m, and the output period is set to (m / n) Ts. A drive signal generator for generating a drive signal;
a correction data storage unit for storing n sets of correction data;
An image processing apparatus comprising: a correction unit that corrects the line image data by sequentially applying each of n sets of the correction data to each of the line image data obtained continuously in the image processing unit. .   The image processing apparatus according to claim 1, wherein the correction unit performs shading correction of the line image data using black reference data and white reference data included in each of the n sets of correction data. A color reference portion that forms a uniform color surface at an image reading position by the image sensor;
A light emitting unit that emits light that illuminates the reading position of the image by the image sensor;
A black reference data recording unit that stores the line image data for n lines continuously obtained in the correction data storage unit as n sets of the black reference data in a state where the light emitting unit is turned off;
White reference data recording in which the line image data for n lines successively obtained in a state where the color reference part is illuminated by the light emitting part is stored in the correction data storage part as n sets of white reference data And an image processing apparatus according to claim 2. A color reference portion that forms a uniform color surface at an image reading position by the image sensor;
A light emitting unit that emits light that illuminates the reading position of the image by the image sensor;
First representative data for n lines is derived from the line image data for the number of lines that is an integral multiple of n obtained continuously in a state where the light emitting unit is turned off, and the first representative data for n lines is derived. A black reference data recording unit that stores n sets of representative data as n sets of black reference data in the correction data storage unit;
In a state where the color reference portion is illuminated by the light emitting portion, second representative data for n lines is derived from the line image data corresponding to the number of lines that is an integral multiple of n that is obtained continuously, and n line portions are obtained. 3. The image processing apparatus according to claim 2, further comprising: a white reference data recording unit that stores the second representative data in the correction data storage unit as n sets of the white reference data. A synchronization pixel detection unit for detecting a synchronization pixel synchronized with a predetermined reference phase in a phase of a period variation of the modulation clock from a plurality of pixels;
5. A synchronization adjustment unit that adjusts an output timing of the drive signal by an amount corresponding to a shift between a fixed point pixel at a preset position in the line image data and the synchronization pixel. The image processing apparatus according to item. The line image signal includes a plurality of optical black pixel signals corresponding to a light receiving portion of the image sensor shielded from light at a predetermined position in the main scanning direction,
The image processing device according to claim 5, wherein the synchronization pixel detection unit detects a peak pixel having a peak pixel value from the plurality of optical black pixels as the synchronization pixel. For a plurality of pixels of interest that are continuous at a predetermined position, the signal level monotonously increases at a predetermined pace from the time when the sample hold signal used for digital conversion of the line image signal changes from inactive to active, or A monotonic change signal generating unit that generates a monotonous change signal that monotonously decreases;
An arrival level detection unit that detects an arrival level that is a level of the monotonous change signal at the time when the sample hold signal changes from the active to the inactive; and
The image processing apparatus according to claim 5, wherein the synchronization pixel detection unit detects, as the synchronization pixel, a peak pixel having the peak arrival level among a plurality of the target pixels. A multiplexer that selectively transmits one of a predetermined output channel output signal and a monotonic change signal of the plurality of output channels in the image sensor to the analog front end;
The image processing apparatus according to claim 7, wherein the analog front end that digitally converts the signal of the specific output channel also serves as the arrival level detection unit.   In a case where the document image reading process for a plurality of pages is continuously performed, the synchronization adjustment unit detects a shift between the fixed point pixel and the synchronization pixel during a period between the document image reading processes for each page. The image processing apparatus according to claim 5, wherein the output timing of the drive signal is adjusted according to the frequency.

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