JP7011685B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device in which a metal portion such as an electrode is exposed on the bottom.

A conventional structure in which a semiconductor element is mounted on a substrate for supporting the semiconductor element, the semiconductor element and a metal terminal for external derivation are connected by wiring, and the entire substrate including the semiconductor element is covered with a protective material such as resin. Due to the structure of semiconductor devices, there is a limit to miniaturization. On the other hand, a metal portion (lead) to be a semiconductor element mounting portion or an electrode portion is formed, the semiconductor element is mounted on the metal portion, and after processing such as wiring, the surface side of the metal portion having the semiconductor element or wiring or the like is formed. Is sealed with a sealing material such as resin, and the metal part is partially exposed at the bottom of the semiconductor device. It has the advantage of being able to release the heat generated in the above to the outside and being excellent in terms of heat dissipation, and is being used in the field of ultra-small semiconductor devices such as chip size.

Such semiconductor devices are mainly assembled by a method of forming a thick plating on a semiconductor element mounting portion or a metal portion to be an electrode portion on a conductive mother die substrate, so-called electrocasting, for the desired number of semiconductor devices. After the surface side of the metal part on which the semiconductor element is mounted and processed such as wiring is sealed with a sealing material, only the master substrate is removed, and a large number of semiconductor devices in an integrated state are individually separated. It is manufactured through a manufacturing process such as cutting into pieces. As an example of the method for manufacturing such a semiconductor device, there are those disclosed in JP-A-2002-9196 and JP-A-2004-214265.

Japanese Unexamined Patent Publication No. 2002-9196 Japanese Unexamined Patent Publication No. 2004-214265

The conventional method for manufacturing a semiconductor device has the configuration shown in the above patent document, and when forming a metal portion on a master substrate, a resist layer is previously formed on a non-arranged portion of the metal portion on the master substrate. , The metal part was formed at an appropriate position by the method of electrolytic plating. Metals such as nickel, which are suitable for forming a film by plating, are used for this metal part, and the surface of the metal part is generally gold-plated or silver-plated in order to improve conductivity and bondability of wiring wires. Was there. Also for this plating, the resist layer played a role of preventing the plating from adhering to places other than the required parts. Then, after the resist layer was dissolved and removed with a solvent or the like, the master substrate and the metal portion formed on the surface thereof were supplied as a substrate for a semiconductor device. Using this substrate for a semiconductor device, in the actual manufacturing process of the semiconductor device, the semiconductor element is attached, wired, and sealed with a sealing material.

In a conventional substrate for a semiconductor device, a metal portion having various shapes can be obtained by arranging a resist film on a matrix substrate, but due to the process of forming the metal portion on the substrate, the upper surface of the metal portion is flat. There is no choice but to have a plate shape with such a thickness, and there is a problem that it is difficult to make a shape with abundant three-dimensional changes in the vertical direction.

Further, the manufactured semiconductor device is required to have a low profile in order to realize further miniaturization of the electronic device in which the semiconductor device is used. However, in the conventional structure, the semiconductor element mounting portion and the electrode from the semiconductor device are required. There is a limit to the thinning of the metal part that forms the semiconductor element mounting part and the electrode part in order to prevent the part from falling off, and it is necessary to secure a certain thickness for the semiconductor element itself to give a predetermined strength. Therefore, there was a problem that it was difficult to further reduce the thickness and height.

The present invention has been made to solve the above-mentioned problems, and is a semiconductor device capable of providing recesses at appropriate positions in metal parts to optimize the structure of each part of the obtained semiconductor device and efficiently manufacturing the semiconductor device. It is an object of the present invention to provide a substrate and a method for manufacturing the substrate, a semiconductor device manufactured by using the substrate for the semiconductor device, and a method for manufacturing the same.

The substrate for a semiconductor device according to the disclosure of the present invention is used for manufacturing a semiconductor device in which a semiconductor element mounting portion and each metal portion to be an electrode portion are exposed on the bottom of the device, and the metal portions are formed on the master substrate. In a semiconductor device substrate, the metal portion is provided with a recess on the surface side.

As described above, according to the disclosure of the present invention, a recess is provided in the semiconductor element mounting portion and / or the electrode portion, which is a metal portion formed on the master substrate, and the recess in the semiconductor element mounting portion and / or the electrode portion. By reducing the thickness of the lower portion, it is possible to impart favorable features to the structure of the semiconductor device according to the surface shape of the metal portion changed in the recess in the manufacture of the semiconductor device using the substrate for the semiconductor device. For example, as the surface area of the metal portion increases in the recess, the contact area between the metal portion and the sealing material of the semiconductor device can be increased, and the strength of integration of the metal portion can be increased. Further, if the recess is provided in the semiconductor element mounting portion, flexibility is given to the setting of the arrangement position of the semiconductor element, and the degree of freedom in the structure of the manufactured semiconductor device can be increased. Further, if a recess is provided in the metal portion arranged at the separation position between the semiconductor devices, the amount of metal cut when the semiconductor device is separated can be reduced, and the wear of the cutting device can be suppressed.

Further, in the semiconductor device substrate according to the disclosure of the present invention, if necessary, the recess is at least in the semiconductor element mounting portion of the metal portion, the semiconductor element is inserted in the recess, and the semiconductor element is mounted on the bottom of the recess. It is provided as a size that can be placed.

As described above, according to the disclosure of the present invention, a recess is provided in the semiconductor element mounting portion of the metal portion, and the recess is made large enough to allow the semiconductor element to be inserted and placed in the semiconductor device manufacturing process. When the semiconductor element is inserted and disposed in the recess of the semiconductor element mounting portion during the manufacturing of the semiconductor device, the arrangement position can be lowered as compared with the case where the semiconductor element is mounted on the upper surface of the semiconductor element mounting portion as in the conventional case. Since the height of the upper surface of the semiconductor element and the wire for joining the electrode portion and the semiconductor element is also lowered, the thickness of the semiconductor device can be reduced and the height of the semiconductor device can be reduced. Further, the position of the semiconductor element is lowered, and the wire length can be shortened by the amount that the semiconductor element to which the wire is bonded and the upper surfaces of the electrode portions are brought closer to each other, so that the amount of wire used can be reduced and the cost can be reduced.

Further, in the semiconductor device substrate according to the disclosure of the present invention, if necessary, at least a part of the electrode portion in the metal portion is separated from each semiconductor device position among the semiconductor device positions designed on the substrate. It is formed on the substrate as an arrangement to be cut at the time of the cutting process, straddling the planned cutting position which is the side end position of each semiconductor device through the cutting process, and the recess is formed in the electrode portion located at the planned cutting point. It is provided as a predetermined size including the portion removed by the cutting process of the portion.

As described above, according to the disclosure of the present invention, a recess is provided in the electrode portion located at the planned cutting portion of the metal portion, and the recess of the electrode portion is formed during the cutting process for separating the semiconductor device in the manufacturing process of the semiconductor device. By cutting at a certain position, the cutting position is lowered by the depth of the recess of the electrode, the amount of metal cut in the cutting process can be reduced, and the burden on the cutting processing device due to cutting can be reduced. Deterioration of the blade can be suppressed. In addition, the upper surface of the electrode portion has a stepped shape due to the recess in the vicinity of the cut surface, so that the upper surface of the electrode portion and the sealing material of the semiconductor device are in wide contact with each other, and the electrode portion is supported in the semiconductor device. Strength is improved and durability is increased.

Further, in the substrate for a semiconductor device according to the disclosure of the present invention, if necessary, the metal portion has a surface metal layer formed by plating on at least the upper surface, while the surface facing the recess has the surface. It does not form a metal layer.

As described above, according to the disclosure of the present invention, the thickness of the lower portion of the recess is made larger than the thickness of the metal portion by not forming the surface metal layer formed on the upper surface of the metal portion around the recess. By preventing the thickness from becoming thick, the thickness of the lower portion of the recess is ensured, and even if the electrode portion is partially exposed on the side surface of the semiconductor device manufactured of the semiconductor device substrate due to cutting, the recess is formed. The surface metal layer is not exposed on the cut surface of the electrode portion to be cut at a certain position, and it is possible to prevent the occurrence of an event that leads to a decrease in reliability such as migration starting from the exposed portion of the surface metal layer. ..

Further, in the method for manufacturing a substrate for a semiconductor device according to the disclosure of the present invention, a resist layer is formed at a predetermined portion on a master substrate, and a semiconductor element mounting portion and an electrode portion of the semiconductor device are formed at a non-formed portion of the resist layer. In a method for manufacturing a substrate for a semiconductor device, the metal portion is formed by a plating method to obtain a substrate that can be used for manufacturing a semiconductor device having a structure in which the metal portion is exposed at the bottom. The process of forming to a predetermined height that does not exceed the resist layer, and the formed metal part and /
Alternatively, the step of newly forming another resist layer at a predetermined portion on the upper side of the resist layer and the formation of a metal portion on the formed other resist layer at the non-forming portion of the other resist layer are restarted. A predetermined shape set by the other resist layer is provided with a step of additionally forming a metal portion to a predetermined height not exceeding another resist layer and a step of removing the resist layer and another resist layer, respectively. Obtains the metal part that appears on the surface.

As described above, according to the disclosure of the present invention, in the formation of the metal portion, a different resist layer is used to partially restrict the formation region of the metal portion, and the surface of the metal portion after removing the resist has a shape based on another resist layer. By being able to impart the metal portion, the formation range of the metal portion can be more accurately defined by using not only the resist layer but also another resist layer on the upper side, so that the metal portion can be arranged more finely on the substrate and the metal can be arranged. The degree of freedom in the structure of the portion is increased, and the semiconductor device manufactured by using the substrate for the semiconductor device can be improved based on the structure of the metal portion.

Further, in the method for manufacturing a substrate for a semiconductor device according to the disclosure of the present invention, if necessary, the other resist layer is a predetermined portion on the upper side of the metal portion at the time of interruption, which is finally a semiconductor element mounting portion. After the formation of the other resist layer is resumed, the metal portion is formed with a portion in contact with the side surface of the other resist layer, and after the formation is completed, another resist layer is finally formed. After removing it, in the part where another resist layer was present in the semiconductor element mounting part of the metal part,
It creates holes or groove-shaped recesses.

As described above, according to the disclosure of the present invention, another resist layer is arranged in the portion of the metal portion to be the semiconductor element mounting portion, and the semiconductor element mounting portion of the finally formed metal portion is separated from the semiconductor element mounting portion. By creating recesses according to the arrangement range of the resist layer, the recesses can be freely arranged by setting the resist shape, and in addition, when the semiconductor device is manufactured using the obtained semiconductor device substrate, the semiconductor element is used. When inserted and placed in the recess of the semiconductor element mounting portion, the placement position of the semiconductor element can be lowered, and the height of the upper surface of the semiconductor element and the wire for joining the electrode portion and the semiconductor element is also lowered, so that the height of the semiconductor device is lowered. It can be manufactured with a small thickness, and the height of the semiconductor device can be reduced.

Further, in the method for manufacturing a substrate for a semiconductor device according to the disclosure of the present invention, if necessary, the other resist layer is placed on an upper predetermined portion of the metal portion at the time of interruption, which is finally an electrode portion.
It is formed in a substantially linear arrangement over a plurality of electrode portions, and after the formation of the other resist layer is resumed, the metal portion is formed with a portion in contact with the side surface of the other resist layer, and after the formation is completed. ,
Finally, another resist layer is removed to form groove-shaped recesses in the electrode portion of the metal portion where the other resist layer was present, which are arranged in series over a plurality of electrode portions. It is a thing.

As described above, according to the disclosure of the present invention, another resist layer is arranged at the portion of the metal portion to be the electrode portion, and is arranged at the position to be cut of the electrode portion of the finally formed metal portion. By creating the recesses, the desired recesses can be arranged by setting the resist shape, and when the semiconductor device is manufactured using the obtained semiconductor device substrate, the electrode portion having the recesses is cut. When each semiconductor device is separated, the load of the cutting process can be reduced by the amount that the portion under the concave portion of the electrode portion is thinned, and the wear of the cutting device can be suppressed.

Further, the semiconductor device according to the disclosure of the present invention has a semiconductor element mounting portion and each metal portion serving as an electrode portion, and a surface metal layer is formed by plating on at least a part of the surface of the metal portion, and the surface side of the metal portion is formed. In a semiconductor device in which the back surface side of the metal portion is exposed on the bottom of the device by mounting the semiconductor element on the semiconductor device, wiring, and sealing with a sealing material, the semiconductor is mounted on the front surface side of the semiconductor element mounting portion of the metal portion. A recess having a size wider than that of the element is provided, and the surface metal layer is not formed on the surface facing the recess. The recess is arranged by inserting a semiconductor element and is sealed together with the semiconductor element by a sealing material. Is to be done.

As described above, according to the disclosure of the present invention, among the metal portions constituting the semiconductor device, the recess is provided in the semiconductor element mounting portion on which the semiconductor element is mounted, so that the semiconductor element is formed into the recess in the semiconductor element mounting portion. When the semiconductor element is inserted and arranged, the arrangement position can be lowered as compared with the case where the semiconductor element is mounted on the upper surface of the semiconductor element mounting portion as in the conventional case. The thickness of the semiconductor device can be reduced by the amount that the height of the semiconductor device is lowered, and the height of the semiconductor device can be reduced. Further, the position of the semiconductor element is lowered, and the wire length can be shortened by the amount that the semiconductor element to which the wire is bonded and the upper surfaces of the electrode portions are brought closer to each other, so that the amount of wire used can be reduced and the cost of the semiconductor device can be reduced. ..

Further, the semiconductor device according to the disclosure of the present invention has a metal portion as a mounting portion for a semiconductor element and an electrode portion, and a surface metal layer is formed by plating on at least a part of the surface of the metal portion, and the surface side of the metal portion is formed. In a semiconductor device in which the back surface side of the metal portion is exposed on the bottom of the device by mounting the semiconductor element on the device, wiring, and sealing with a sealing material, at least one of the side surfaces is an aggregate formation of a plurality of semiconductor devices. It is a cut surface generated by a cutting process for separating individual semiconductor devices from a state, and has an electrode portion exposed as a part of the cut surface after the cutting process, and the electrode portion exposed on the side surface is the electrode portion exposed in the cutting process. A recess is provided in advance on the surface side of the electrode portion located at the planned cutting location, the surface metal layer is not formed on the surface facing the recess, and the surface of the electrode portion exposed on the side surface is the original. It is a cross section of the lower part of the position where the recess was located, and does not include the cross section of the surface metal layer at all.

As described above, according to the disclosure of the present invention, when a recess is provided in advance in the electrode portion of the metal portion constituting the semiconductor device and the recess is set as a cutting processing target position and separated into individual semiconductor devices, Since the cut surface at the concave portion position of the electrode portion appears at the end portion, the exposed portion of the electrode portion becomes a portion under the original concave portion, the surface metal layer does not appear, and the surface metal layer exposed portion is the starting point. In addition to being able to prevent migration, the electrode part located at the side end due to the cutting process has a recessed position, so the contact surface with the sealing part increases, so the strength is increased and the semiconductor device. Durability and reliability are also enhanced.

It is an enlarged view of the main part of the substrate for a semiconductor device which concerns on 1st Embodiment of this invention. It is explanatory drawing of the resist layer formation process in the manufacturing method of the substrate for a semiconductor device which concerns on 1st Embodiment of this invention. It is the first metal part formation process explanatory drawing in the manufacturing method of the substrate for a semiconductor device which concerns on 1st Embodiment of this invention. It is explanatory drawing of the formation process of the 2nd resist layer in the manufacturing method of the substrate for a semiconductor device which concerns on 1st Embodiment of this invention. It is explanatory drawing of each process of the subsequent metal part formation, surface metal layer formation, and resist layer removal in the manufacturing method of the substrate for a semiconductor device which concerns on 1st Embodiment of this invention. It is explanatory drawing of the manufacturing process of the semiconductor device which used the substrate for semiconductor device which concerns on 1st Embodiment of this invention. It is sectional drawing and bottom view of the semiconductor device which concerns on 1st Embodiment of this invention. It is an enlarged view of the main part of the substrate for a semiconductor device which concerns on 2nd Embodiment of this invention. It is the first metal part formation process explanatory drawing in the manufacturing method of the substrate for a semiconductor device which concerns on 2nd Embodiment of this invention. It is explanatory drawing of the formation process of the 2nd resist layer in the manufacturing method of the substrate for a semiconductor device which concerns on 2nd Embodiment of this invention. It is explanatory drawing of each process of the subsequent metal part formation, surface metal layer formation, and resist layer removal in the manufacturing method of the substrate for a semiconductor device which concerns on 2nd Embodiment of this invention. It is explanatory drawing of the manufacturing process of the semiconductor device which used the substrate for semiconductor device which concerns on 2nd Embodiment of this invention. It is a bottom side perspective view and sectional view of the semiconductor device which concerns on 2nd Embodiment of this invention. It is explanatory drawing of the formation process of the 2nd resist layer in the manufacturing method of the substrate for a semiconductor device which concerns on 3rd Embodiment of this invention. It is explanatory drawing of each process of the subsequent metal part formation, surface metal layer formation, and resist layer removal in the manufacturing method of the substrate for a semiconductor device which concerns on 3rd Embodiment of this invention. It is explanatory drawing of the reduced state of the metal part arrangement interval by the substrate for the semiconductor device which concerns on 3rd Embodiment of this invention. It is explanatory drawing of the formation process of the 2nd resist layer in the other manufacturing method of the substrate for semiconductor devices which concerns on 3rd Embodiment of this invention. It is explanatory drawing of the metal part formation process in the other manufacturing method of the substrate for a semiconductor device which concerns on 3rd Embodiment of this invention. It is explanatory drawing of each process of surface metal layer formation and resist layer removal in another manufacturing method of a substrate for a semiconductor device which concerns on 3rd Embodiment of this invention. It is a substrate state explanatory view before and after the resist layer removal step in the manufacture of the substrate for a semiconductor device which concerns on other embodiment of this invention, and is the schematic sectional drawing of the semiconductor device obtained by using the substrate for a semiconductor device.

(First Embodiment of the present invention)
Hereinafter, the substrate for a semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 7.
In each of the above figures, the semiconductor device substrate 1 according to the present embodiment is a master substrate 10 made of a conductive material and a semiconductor device 70 formed on the master substrate 10 and manufactured by using this substrate. It is configured to include a metal portion 11 serving as a semiconductor element mounting portion 11a or an electrode portion 11b, and a surface metal layer 13 formed by plating on the surface of the metal portion 11.

As shown in FIG. 7, the semiconductor device 70 manufactured by using the semiconductor device substrate 1 has a semiconductor among the metal portions 11 in addition to the metal portion 11 and the surface metal layer 13 obtained from the semiconductor device substrate 1. The semiconductor element 14 mounted on the element mounting portion 11a, the wire 15 for electrically connecting the semiconductor element 14 and the electrode portion 11b of the metal portion 11, and the metal portion 11 including the semiconductor element 14 and the wire 15 It is configured to include a sealing material 19 that covers and seals the surface side.

In the semiconductor device 70, the back surface side of the metal portion 11 is exposed as an electrode, a heat dissipation pad, or the like on the bottom portion (see FIG. 7B), and the back surface side of the exposed metal portion 11 and a part of the device exterior are used. The structure is such that the back surface side of the sealing material 19 that appears is located on substantially the same plane. On each surface of the semiconductor device 70 other than the bottom, only the encapsulant 19 forming the exterior of the device appears.

In the semiconductor device substrate 1, after the first resist layer 12 corresponding to the non-arranged portion of the metal portion 11 is formed on the master substrate 10, the metal portion 11 is formed by electrolytic plating, and then the metal portion 11 is formed.
After the second resist layer 16 different from the resist layer corresponding to the recess was formed, the metal portion 11 was additionally formed by electrolytic plating, and the surface metal layer 13 was further formed on the surface of the metal portion 11 by plating. After that, it is manufactured by removing the first resist layer 12 and the second resist layer 16.

Further, when manufacturing a semiconductor device using the semiconductor device substrate 1, the semiconductor device substrate 1 is mounted on the surface side of the metal portion 11 and sealed with wiring and a sealing material 19. After sealing, the master substrate 10 is separated and removed from the semiconductor device portion to obtain the semiconductor device 70.

The master substrate 10 is made of a conductive metal plate (thickness of about 0.1 mm) such as a stainless steel material (SUS430 or the like), aluminum, copper or the like, and is used for semiconductor devices until it is removed in the semiconductor device manufacturing process. It forms the main part of the substrate 1, and the first resist layer 12 and the metal portion 11 are formed on the front surface side and the resist layer 18 is arranged on the back surface side at each stage of the substrate manufacturing process for semiconductor devices. .. When the metal portion 11 is formed, the metal portion is energized through the master substrate 10 so that the energable portion of the surface of the master substrate 10 that is not covered by the first resist layer 12 is electrolytically plated. 11 will be formed. Further, also when plating the surface metal layer 13, in the case of electrolytic plating, energization is performed via the master substrate 10.

On the other hand, in the manufacturing process of the semiconductor device using the semiconductor device substrate 1, the surface side of the metal portion 11 on the master substrate 10 is covered with the encapsulant 19 (see FIG. 6B), and the master substrate 10 is made of metal. If sufficient strength is obtained without supporting the portion 11 and the encapsulant 19, the master substrate 10 is separated and removed from these (see FIG. 6C). When the master substrate 10 is made of stainless steel, a method of physically peeling it off from the semiconductor device side by applying force is adopted, and when the master substrate 10 is copper or the like, it is dissolved using a chemical solution. A method of etching to remove is used. In the case of etching, an etching solution having selective etching property is used so that the matrix substrate 10 is melted but the material such as nickel of the metal portion 11 is not affected.
When the master substrate 10 is removed, a state is obtained in which the semiconductor element mounting portion 11a and the electrode portion 11b of the metal portion 11 and the back surfaces of the encapsulant 19 are exposed on the same plane at the bottom of the semiconductor device.

The metal portion 11 is made of nickel or copper suitable for electrolytic plating, or a nickel alloy such as nickel-cobalt, and is formed by electrolytic plating on a portion of the master substrate 10 without a first resist layer 12. be. In the semiconductor device substrate 1, the metal portion 11 is the number of semiconductor devices manufactured on the surface of the master substrate 10 with a combination of a semiconductor element mounting portion 11a and a plurality of electrode portions 11b arranged in the vicinity thereof as one unit. However, the combination is formed in a form in which a large number of the combinations are arranged in an aligned state.

The metal portion 11 has a thickness exceeding the thickness of the first resist layer 12 (for example, a thickness of about 60 to 8).
0 μm), and on the upper peripheral edge, a substantially eaves-shaped overhanging portion 11c overhanging to the first resist layer 12 side.
Is formed as a shape having. During electrolytic plating, the overhanging portion 11c continues electrolytic plating even after the metal portion 11 is formed to the thickness of the first resist layer 12, and the growth of the metal portion is added in the thickness direction to the first resist layer 12. By advancing it in another direction without limitation, it can be obtained as a shape protruding from the upper end portion of the metal portion 11 beyond the first resist layer 12 toward the first resist layer 12. The overhanging portion 11c is sealed by the sealing material 19 and is sealed by the sealing material 19.
It will be in a fixed state by being sandwiched between.

In addition, among the metal portions 11, the semiconductor element mounting portion 11a is provided with a recess 11e into which the semiconductor element 14 can be inserted and mounted when manufacturing a semiconductor device. When the semiconductor element 14 is inserted and arranged in the recess 11e, the arrangement position of the semiconductor element 14 is lowered by the depth of the recess as compared with the case where the semiconductor element 14 is mounted on the upper surface of the semiconductor element mounting portion as in the conventional case. Can be done. The recess 11e is formed as a hole or a groove by arranging the second resist layer 16 at a position corresponding to the recess 11e in the semiconductor element mounting portion 11a in the middle of forming the metal portion 11.
The depth of the semiconductor element mounting portion 11a on the lower side of e is set to be sufficient to secure a thickness that maintains the required strength.

Most of the metal portion 11 is made of nickel, a nickel alloy, or the like suitable for electrolytic plating, but on the back surface side of the metal portion 11, in order to allow proper soldering at the time of mounting a semiconductor device, the metal portion 11 is formed. A metal having good solder wettability, for example, a thin film 11d such as gold, tin, palladium, or solder is arranged from the main material portion such as nickel. The thickness of this thin film 11d is 0.03 to 1.
It is preferably about μm.

When forming the metal portion 11, the thin film 11d is previously applied to the first resist layer 1 on the matrix substrate 10.
After being formed by plating or the like on the portion without 2 (see FIG. 3B), a main material portion such as nickel is further formed on the thin film 11d by electrolytic plating. This thin film 11d has
It is also possible to provide a function of preventing erosion deterioration of the metal portion 11 by the etching solution when the master substrate 10 is removed by etching, and in that case, it is preferable to dispose a thin film of gold, silver, tin or the like.

The thin film formation on the back surface side of the metal portion 11 is not limited to before the main material portion of the metal portion 11 is formed by electrolytic plating, but is not limited to the formation of the thin film on the back surface side of the metal portion 11 after the completion of the semiconductor device 70. A thin film may be formed on the exposed back surface side of the metal portion 11 by plating.

The first resist layer 12 is formed of an insulating material having solubility resistance to a plating solution used for electrolytic plating of the metal portion 11 and plating of the surface metal layer 13, and is preset on the master substrate 10. It is arranged so as to correspond to the non-arranged portion of the metal portion 11, and is removed after the metal portion 11 and the surface metal layer 13 are formed (see FIG. 5C).

The first resist layer 12 is arranged on the master substrate 10 prior to the formation of the metal portion 11.
Specifically, a known photosensitive resist agent is closely arranged on the master substrate 10 so as to have a predetermined thickness, for example, about 50 μm, and has a predetermined pattern corresponding to the position of the metal portion 11 of the semiconductor device 70. With the mask film 50 placed on it, it is cured by exposure to ultraviolet rays (see FIG. 2C), and is subjected to processing such as development to remove the photosensitive material in the non-irradiated portion, and then placed on the non-arranged portion of the metal portion 11. It is formed in a corresponding shape.

The second resist layer 16 is formed of an insulating material having solubility resistance to a plating solution like the first resist layer 12, and the metal portion 11 is set in advance in the middle of forming the metal portion 11. It is arranged so as to correspond to the recess 11e, and is removed after the metal portion 11 and the surface metal layer 13 are formed. As the second resist layer 16, a photosensitive resist agent or the like can be used as in the case of the first resist layer 12. Each surface of the metal portion 11 and the first resist layer 12 is coated with this resist agent so as to have a predetermined thickness, for example, a thickness exceeding about 60 μm, and a mask having a predetermined pattern corresponding to the position of the recess 11e of the metal portion 11. When the film 51 is placed and cured by exposure to ultraviolet rays, a fixed second resist layer 16 is formed on the metal portion 11. Due to the second resist layer 16 on the metal portion 11, electrolytic plating does not proceed in the portion corresponding to the recess 11e of the metal portion 11, and the chipped portion of the metal portion 11, that is, the recess 11e is formed.

The first resist layer 12 and the second resist layer 16 are not limited to the photosensitive resist, and a paint that does not deteriorate with respect to the plating solution and can obtain a high-strength coating film is applied on the master substrate 10. It is also possible to form the non-arranged portion of the metal portion 11 or the concave portion 11e of the metal portion 11 by coating the metal portion 11 so as to have a required coating thickness by electrodeposition coating or the like.

On the other hand, apart from the first resist layer 12 and the second resist layer 16 on the surface side, the master substrate 10
The resist layer 18 is also formed on the back surface side of the above (see FIG. 2). The resist layer 18 on the back surface side is a resist material that is resistant to the plating solution in a cured state and can be easily dissolved and removed when it is no longer needed, for example, an alkali-developed photosensitive film resist having a thickness of about 50 μm. It can be arranged by thermal pressure bonding or the like, and can be cured and formed over the entire back surface through a treatment such as exposure by ultraviolet irradiation without a mask as it is.

The surface metal layer 13 is formed as a plating film made of gold, silver, or the like having excellent bondability with a gold wire or the like forming the wiring wire 15.
The surface metal layer 13 has a predetermined thickness on the surface of the metal portion 11 by the plating bath for each master substrate 10, for example, about 0.1 to 1 μm in the case of gold plating and about 1 to 10 μm in the case of silver plating. Formed as a thick plating. When the surface metal layer 13 is plated, the back surface side of the master substrate 10 is covered with the resist layer 18, so that the plating does not adhere (see FIG. 5B).
When plating the surface metal layer 13, a plating solution corresponding to the metal to be plated is used, for example, the plating solution is different from that in the case of plating the metal portion 11.

When forming the plating of the surface metal layer 13, if the metal portion 11 is nickel, the plating does not easily adhere to the metal portion 11. Therefore, usually, the surface of the metal portion 11 is pre-plated (copper strike) before the plating of the surface metal layer 13. It is desirable to perform a silver strike or a gold strike) to improve the adhesion of the surface metal layer 13 to the metal portion 11.

The semiconductor element 14 is a so-called chip on which a fine electronic circuit is formed, and is a metal portion 1.
Of 1, the semiconductor element mounting portion 11a is inserted into the recess 11e, adhered to the recess 11e, and mounted. and,
The wire 15 for wiring (bonding) made of a conductive wire such as gold or copper is a semiconductor element 14.
An electrode provided on the surface and an electrode portion 11b formed independently of the semiconductor element mounting portion 11a of the metal portion 11 are bonded to each other, and the semiconductor element 14 and the electrode portion 11b are electrically connected to each other. Become.

Since the semiconductor element 14 is inserted and disposed in the recess 11e of the semiconductor element mounting portion 11a, the arrangement position can be lowered as compared with the case where the semiconductor element 14 is mounted on the upper surface of the semiconductor element mounting portion as in the conventional case. The thickness of the semiconductor device 70 can be reduced by the amount that the upper surface of the semiconductor element 14 and the wire 15 to be joined are lowered, and the height of the semiconductor device 70 can be reduced. Further, the position of the semiconductor element 14 is lowered, and the wire length can be shortened by the amount that the semiconductor element 14 to which the wire 15 is bonded and the upper surfaces of the electrode portions are brought closer to each other, so that the amount of wire used can be reduced and the cost can be reduced.

The sealing material 19 is a thermosetting epoxy resin or the like having high physical strength, and is sealed in a state of covering the semiconductor element 14 or the wire 15 on the surface side of the metal portion 11 to cover the semiconductor element 14 or the wire 15. The structurally weak part is protected from the outside. The semiconductor element 1
When 4 is a light emitting element such as an LED, a translucent material is used.

The sealing step using the sealing material 19 is performed on the semiconductor device substrate 1, and the master substrate 1 is used.
A range of a semiconductor device having a metal portion 11 or the like on the surface side of 0 is covered with a mold as an upper mold, and then a sealing material 19 before curing is press-fitted between the mold and the master substrate 10. Then, the sealing is completed by curing the sealing material 19. However, in the sealing step, since a large number of combinations of the semiconductor element mounting portion 11a and the plurality of electrode portions 11b, which are one semiconductor device, are uniformly sealed in the aligned state, the semiconductor device is a sealing material. Many are connected via 19.

The encapsulant 19 has sufficient physical strength, functions sufficiently to protect the inside as a part of the exterior of the semiconductor device 70, and peels off the master substrate 10 from the semiconductor device side. Even when the metal is physically removed by applying a force such as the above, the integrated state with the metal portion 11 is maintained without damage such as cracking.

Next, each process of manufacturing the semiconductor device substrate and manufacturing the semiconductor device using the semiconductor device substrate according to the present embodiment will be described.
As a manufacturing process of a substrate for a semiconductor device, first, a first resist layer 12 is arranged on a master substrate 10 so as to correspond to a non-arranged portion of a metal portion 11 preset on the master substrate 10. Specifically, the photosensitive resist agent 12a is closely arranged on the surface side of the master substrate 10 so as to have a predetermined thickness (for example, about 50 μm) corresponding to the height of the metal portion 11 to be formed (for example). FIG. 2 (B)
reference). The photosensitive resist agent is cured by exposure to ultraviolet irradiation with a mask film 50 having a predetermined pattern corresponding to the arrangement position of the metal portion 11 (see FIG. 2C).
, A known process such as development for removing the resist agent in the non-irradiated portion is performed to cure and form the first resist layer 12 corresponding to the non-arranged portion of the metal portion 11 (see FIG. 3A). Further, a photosensitive resist agent is also disposed on the back surface side of the master substrate 10 in the same manner as on the front surface side, and the resist layer 18 is cured and formed over the entire back surface by subjecting the entire surface to a treatment such as exposure. (Fig. 2)
See (C).

After forming the resist layers 12 and 18 having solubility resistance to the plating solution used for plating the metal portion 11 in this way, it is necessary for the exposed portion of the surface of the master substrate 10 that is not covered with the first resist layer 12. The surface oxide film is removed and the surface is activated according to the above conditions. After that, a gold thin film 11d for improving solder wettability is applied to the exposed portion by plating or the like, for example, 0.03 to 1μ.
It is formed with a thickness of m (see FIG. 3 (B)). Then, nickel is laminated on the thin film 11d by electrolytic plating to form the metal portion 11 (see FIG. 3C).

In this first step of forming the metal portion 11, the metal portion 11 is formed to have a predetermined thickness (for example, a thickness of less than 50 μm) that does not exceed the thickness of the first resist layer 12 (see FIG. 3C). .. In the metal portion 11, a large number of the combinations are arranged on the surface of the master substrate 10 by the number of semiconductor devices to be manufactured, with the combination of the semiconductor element mounting portion 11a and the plurality of electrode portions 11b arranged in the vicinity thereof as one unit. It will be formed in a form arranged in a state.

After the metal portion 11 is formed to a predetermined thickness, the metal portion forming work by electrolytic plating is temporarily interrupted, the surface is cleaned, and then the semiconductor element mounting portion in the metal portion 11 is placed on the metal portion 11 formed to the predetermined thickness. The second resist layer 16 is arranged so as to correspond to the recess 11e of 11a.
Specifically, the photosensitive resist agent 16a is applied to the surface side of the metal portion 11 and the first resist layer 12.
It is closely arranged so as to have a predetermined thickness (for example, about 50 μm) larger than the depth of the recess 11e (see FIG. 4 (A)). With respect to this photosensitive resist agent, the recess 1 of the semiconductor element mounting portion 11a
Known processing such as curing by exposure to ultraviolet irradiation (see FIG. 4B) and development to remove the resist agent in the non-irradiated portion with the mask film 51 having a predetermined pattern corresponding to the arrangement position of 1e placed on the film. Is performed to cure and form the second resist layer 16 corresponding to the portion where the recess 11e is generated (see FIG. 4C).

After forming the second resist layer 16, the metal portion 1 not covered by the second resist layer 16
The exposed portion of 1 is subjected to a known surface treatment, for example, a cleaning treatment or an adhesion treatment, if necessary, and then a step of laminating nickel by electrolytic plating to form the metal portion 11 is performed again, and the metal portion 11 is formed. Is formed into a predetermined thickness (for example, a thickness of about 60 μm) set in advance (FIG. 5 (FIG. 5).
A) See).

The metal portion 11 is formed to have a thickness that exceeds the thickness of the first resist layer 12 but does not exceed the upper surface of the second resist layer 16, and is accompanied by a portion in contact with the side surface of the second resist layer 16, while the first resist. A substantially eaves-shaped overhanging portion 11c overhanging toward the first resist layer 12 is formed on the peripheral edge of the upper end of the metal portion 11 near the layer 12. In the process of forming the metal portion 11 by this new electrolytic plating,
The metal portion 11 is not formed at the location where the second resist layer 16 is arranged.

Once the metal portion 11 having the desired thickness and shape is obtained, the plating bath for each master substrate 10 is used.
On the surface of the metal portion 11, the surface metal layer 13 has a predetermined thickness, for example, in the case of silver plating, the thickness is about 0.
It is formed so as to be 3 to 0.4 μm (see FIG. 5 (B)). Since the first resist layer 12 and the second resist layer 16 have sufficient resistance to the plating solution used in the plating bath,
No deterioration or the like occurs, the function as a resist layer can be maintained, and plating adhesion to other than necessary parts such as the metal portion 11 can be prevented. Further, when the surface metal layer 13 is plated, the back surface side of the master substrate 10 is covered with the resist layer 18, so that the plating does not adhere.

After forming the surface metal layer 13, the first resist layer 12 and the second resist layer 1 on the surface side of the master substrate 10
6 and the resist layer 18 on the back surface side are dissolved with a predetermined removing agent and removed (FIG. 5).
(See (C)), the semiconductor device substrate 1 is completed. After the second resist layer 16 is removed, a hole or a groove-shaped recess 11e is formed in the portion of the semiconductor element mounting portion 11a of the metal portion 11 where the second resist layer 16 was present.

Next, the manufacture of the semiconductor device using the obtained substrate 1 for the semiconductor device will be described.
First, of the metal portions 11 in the semiconductor device substrate 1, the recess 11 of the semiconductor element mounting portion 11a
The semiconductor element 14 is inserted into e with an adhesive interposed therebetween and mounted in an adhesively fixed state. Further, a gold wire or the like is attached to the electrodes on the surface of the semiconductor element 14 and the corresponding electrode portions 11b. Wire 15 is joined, and the semiconductor element 14 and each electrode portion 11b are in an electrically connected state (FIG. 6 (A).
)reference). The electrical connection by this wiring is carried out by a known ultrasonic bonding apparatus or the like. Since the surface metal layer 13 is formed on the surface of the electrode portion 11b, the bonding with the wire 15 can be ensured and the reliability of the connection can be enhanced.

After the connection between the semiconductor element 14 and each electrode portion 11b is completed, the range of the semiconductor device having the metal portion 11 or the like on the surface side of the master substrate 10 is sealed with a sealing material 19 such as a thermosetting epoxy resin. Then, the semiconductor element 14 and the wire 15 are in a protected state isolated from the outside (see FIG. 6B). Specifically, the surface side of the master substrate 10 is mounted on a mold mold as an upper mold, and the master substrate 1 is mounted.
Sealing is executed in the process of press-fitting the uncured epoxy resin to be the encapsulant 19 into the mold while letting 0 play the role of the lower mold, and one semiconductor device is placed on the master substrate 10. The combination of the semiconductor element mounting portion 11a and the plurality of electrode portions 11b is uniformly sealed in a state of being aligned in large numbers, and appears in a state in which a large number of semiconductor devices are connected.

When a large number of connected semiconductor devices are obtained, the master substrate 10 is removed to obtain a state in which the back surface side of the metal portion 11 is exposed at the bottom of each semiconductor device (see FIG. 6C). To remove the master substrate 10 made of stainless steel, a method of physically peeling the master substrate 10 from the semiconductor device side to remove it is used. By using a stainless steel material having excellent strength and peelability for the master substrate 10, the master substrate 10 can be peeled off from the semiconductor device side and quickly separated and removed.

In addition, when the master substrate is made of another metal material, a method of immersing the master substrate in an etching solution to dissolve the master substrate can also be used as a method of removing the master substrate. In the case of this etching, an etching solution having selective etching property is used so that the matrix substrate is melted but the materials of the metal portion 11 and the surface metal layer 13 are not affected. In the case of dissolving and removing
Since an excessive force is not applied to the semiconductor device side, the probability that an adverse effect will occur due to the removal of the master substrate can be reduced.

At the bottom of the semiconductor device from which the master substrate 10 has been removed, the back surface side of the exposed metal portion 11 and the back surface side of the encapsulant 19 are located on the same plane. After removing the master substrate 10,
If a large number of connected semiconductor devices are separated one by one, the semiconductor device 70 is completed.

Inside the obtained semiconductor device 70, the upper end peripheral edge of the metal portion 11 is formed as an overhanging portion 11c in a substantially eaves-like shape, and in a sealed state with the encapsulant 19, the overhanging portion 11c is hardened into the sealing material 19. Since it is surrounded and fixed, the overhanging portion 11 bites into the sealing material 19 which is firmly integrated with the resins, and acts as a resistor against an external force applied to the metal portion 11. Even if an external force that tries to separate from the exterior of the device is applied to the back surface side of the metal portion 11, such as when a stainless steel material is used for the mold substrate 10 and the master substrate 10 is physically peeled off from the semiconductor device side to remove it. The overhanging portion 11 hinders the movement of the metal portion 11, can eliminate deviation from other parts of the metal portion 11, improves the yield at the time of manufacturing, enhances the strength as a semiconductor device, and is durable during use. The reliability of the property and the operation of the semiconductor device are also improved.

As described above, in the semiconductor device substrate according to the present embodiment, the recess 11e is provided in the semiconductor element mounting portion 11a which is the metal portion 11 formed on the master substrate 10, and is below the recess 11e in the semiconductor element mounting portion 11a. Since the thickness of the side portion is reduced and the recess 11e is sized so that the semiconductor element 14 can be inserted and placed in the semiconductor device manufacturing process, the semiconductor device 70 using the semiconductor device substrate 1 is used. In manufacturing, the metal part 11 that has been changed in the recess 11e
A preferred feature can be imparted to the structure of the semiconductor device according to the surface shape of the semiconductor device. Compared to the case where it is mounted, the arrangement position can be lowered, and the height of the upper surface of the semiconductor element 14 and the wire 15 for joining the electrode portion 11b and the semiconductor element 14 is also lowered, so that the thickness of the semiconductor device 70 is reduced. It can be manufactured in a small size, and the height of the semiconductor device 70 can be reduced. Further, the position of the semiconductor element 14 is lowered, and the wire length can be shortened by the amount that the semiconductor element 14 to which the wire 15 is bonded and the upper surfaces of the electrode portions 11b are close to each other, so that the amount of wire used can be reduced and the cost can be reduced. can.

(Second Embodiment of the present invention)
In the semiconductor device substrate 1 according to the first embodiment, the recess 11e is provided in the semiconductor element mounting portion 11a of the metal portion 11, and in the manufacturing process of the semiconductor device using the semiconductor device substrate, the semiconductor is formed in the recess 11e. Although the element 14 is mounted, as a second embodiment, as shown in FIG. 8, the electrode portion 11f of the metal portion 11 in the semiconductor device substrate 2 is mounted.
Also, a recess 11g may be provided, and the recess position of the electrode portion may be cut in the manufacturing process of the semiconductor device to obtain the individual semiconductor device 71 that has been cut.

The semiconductor device substrate 2 according to the present embodiment includes the master substrate 10 and the master substrate 10 as in the first embodiment.
The metal portion 11 and the surface metal layer 13 are provided, and the difference is that the electrode portion 11f in the metal portion 11 is located at a planned cutting portion in the cutting process performed in the subsequent semiconductor device manufacturing process. It has a structure formed on a substrate as an arrangement that is cut in two at the time of cutting. The electrode portion 11f is provided with a recess 11g having a predetermined size including a portion to be removed during the cutting process.

As shown in FIG. 13, the semiconductor device 71 manufactured by using the semiconductor device substrate 2 is as shown in FIG.
Similar to the first embodiment, the metal portion 11, the surface metal layer 13, the semiconductor element 14, the wire 15, and the sealing material 19 are provided, but the difference is that the electrode portion 11f of the metal portion 11 is provided. , It has a configuration that is exposed not only on the bottom of the device but also on the side surface.

Each side surface of the semiconductor device 71 is a cut surface generated by a cutting process for separating each semiconductor device from the aggregated state of a plurality of semiconductor devices. Due to the need for mounting semiconductor devices, etc.
When a structure is adopted in which the electrode portion is exposed not only on the bottom portion but also on the side surface, the electrode portion is also cut because it is located on a part of the side surface which is the cut surface.

Therefore, in the semiconductor device substrate 2, among the semiconductor device positions designed on the substrate, the semiconductor device positions are adjacent to the planned cutting points Y, which are the side end positions of the semiconductor devices after the cutting process in the subsequent semiconductor device manufacturing. A metal part as an electrode part is formed on the substrate in such an arrangement and size that it straddles the positions of two semiconductor devices and is cut into two by a cutting process to form an electrode part at the side end of each semiconductor. (See FIG. 8).

When the electrode portion is positioned at the corner portion of the semiconductor device, the metal portion serving as the electrode portion is cut into four at the intersections of the linear cutting positions on the semiconductor device substrate, and each of them has no problem. It will be formed in a size and arrangement that forms an electrode portion.

In the semiconductor device substrate 2, in the metal portion forming step of forming the electrode portion, a groove-shaped recess 11g is provided on the surface side of the electrode portion so as to be located at the planned cutting portion. This recess 1
As in the case of the first embodiment, 1 g is provided with the second resist layer 16 corresponding to the recess 11 g in the middle of the formation of the metal portion 11 (see FIG. 10) to form the metal portion 11. This is caused by not forming the metal portion 11 at the position of the second resist layer 16 when restarting. Similar to the first embodiment, since the second resist layer 16 is present in the step of forming the surface metal layer 13, the surface metal layer is not formed in the portion of the metal portion 11 facing the recess 11g (FIG. 1
1 (B)).

The size of the recess 11g in the metal portion 11 serving as the electrode portion 11f on the semiconductor device substrate 2 overlaps with the planned cutting portion of the electrode portion 11f, and the cutting blade has a predetermined thickness other than 0 in the cutting process. The portion A to be removed by the action is set so as to surely fit in the range of the recess (see FIG. 12 (C)). Further, the recess 11g has an electrode portion 11 on the lower side thereof.
The depth is such that i can sufficiently secure a thickness that maintains the required strength until the cutting process in the semiconductor device manufacturing process.

The surface of the electrode portion 11f exposed on the side surface of each semiconductor device 71 after the cutting process in the semiconductor device manufacturing process is a cross section of the lower portion of the position where the original recess 11g was located, so that the surface metal layer is formed. (See FIG. 13 (B)).

Next, each process of manufacturing the semiconductor device substrate and manufacturing the semiconductor device using the semiconductor device substrate according to the present embodiment will be described.
As a manufacturing process of a substrate for a semiconductor device, first, a resist layer 12 is formed on the front and back of a master substrate 10.
, 18 and the step of forming the metal portion 11 to a predetermined thickness on the portion of the surface of the master substrate 10 that is not covered with the first resist layer 12 are executed, respectively. The formation position is the same as that of the first embodiment except that the forming position is partially changed based on the shape of the electrode portion 11f, and detailed description thereof will be omitted.

After the metal portion 11 is formed to a predetermined thickness (see FIG. 9), the metal portion forming work is interrupted, the surface is cleaned, and then the electrode portion 1 in the metal portion 11 is placed on the metal portion 11 formed to the predetermined thickness.
The second resist layer 16 is arranged so as to correspond to the position of the preset recess 11g of 1f (see FIG. 10). The second resist layer 16 is formed in a substantially linear arrangement extending over a plurality of electrode portions 11f at a predetermined upper portion of the metal portion 11 at the time of interruption of formation, which will eventually become the electrode portion 11f.

After forming the second resist layer 16, the metal portion 11 not covered with the second resist layer 16
A step of forming the metal portion 11 to a predetermined thickness with respect to the exposed portion of the metal portion 11 (see FIG. 11 (A)), a step of forming the surface metal layer 13 on the surface of the metal portion 11 (see FIG. 11 (B)), and , The first resist layer 12 on the front surface side of the master substrate 10, the second resist layer 16, and the resist layer 18 on the back surface side.
The same as in the first embodiment, the steps leading to the completion of the semiconductor device substrate 2 through the steps of removing each of the above (see FIG. 11C).

After removing the second resist layer 16, the groove-shaped recesses 11g in the electrode portion 11f of the metal portion 11 are arranged in series over a plurality of electrode portions 11f in the portion where the second resist layer 16 was present. (See FIG. 8).

Subsequently, in the manufacture of the semiconductor device using the semiconductor device substrate 2, the step of mounting and fixing the semiconductor element 14 on the semiconductor element mounting portion 11a of the metal portion 11 of the semiconductor device substrate 2 and the surface of the semiconductor element 14 The process of joining the wire 15 to the electrode of the above and the surface metal layer 13 portion of each electrode portion 11b to form an electrically connected state (see FIG. 12A), and the semiconductor device on the surface side of the master substrate 10. A step of sealing the range with the sealing material 19 (see FIG. 12B) and a step of removing the master substrate 10 from the semiconductor device in a connected state obtained by the sealing (see FIG. 12C). ) Are sequentially executed in the same manner as in the first embodiment, and detailed description thereof will be omitted.

After removing the master substrate 10, cutting processing is executed along a preset cutting position for a large number of connected semiconductor devices, and the semiconductor devices 71 are separated one by one. In the process of cutting this semiconductor device, the cutting position overlaps with the recess 11g of the electrode portion 11f.
During the cutting process, the cured encapsulant 19 is cut, and each electrode portion 11f has a concave portion 11.
It is sequentially cut at the position of g.

Since the recess 11g is the cutting position, the cutting position is lowered by the depth of the recess, and the amount of metal cut in the cutting process is reduced as compared with the case where the electrode portion is formed at a uniform height as in the conventional case. This makes it possible to reduce the wear of the blade portion (dicing blade) of the cutting processing device due to cutting.

Further, when cutting the semiconductor device by positioning the cutting position from the surface side covered with the sealing material 19 and performing cutting, if the sealing material 19 is a transparent material, the sealing material 19 is used. Since the recess 11g in the electrode portion 11f can be identified through the recess 11g, the recess 11g can be used as a mark of the cutting position, and the cutting process can be performed with high accuracy.

The cut electrode portion 11f is exposed on the side surface of the semiconductor device 71 obtained by cutting (the cut electrode portion 11f).
See FIG. 13). The portion of the electrode portion 11f exposed on the side surface of the semiconductor device corresponds to the lower portion of the portion where the recess 11g is provided so as to be located at the planned cutting portion in advance, and the recess 1
Since the surface metal layer of the electrode portion 11f is not formed on the surface of the electrode portion 11f at the position of 1 g,
The cross section of the surface metal layer is not included (see FIG. 13B).

In this way, although a part of the electrode portion 11f is exposed on the side surface of the semiconductor device, the surface metal layer does not appear. Therefore, when the surface metal layer is, for example, silver-plated, migration starting from the exposed surface metal layer portion. It is possible to prevent the occurrence of such an event that leads to a decrease in reliability.
Further, since the concave portion 11g was originally located on the upper side of the exposed portion of the electrode portion 11f on the side surface, the upper surface of the electrode portion 11f covered with the sealing material 19 in the vicinity thereof has a shape with a step 11h. (See FIG. 13B), the contact surface between the upper surface of the electrode portion and the encapsulant 19 is increased by that amount as compared with the case of a simple flat surface, so that the support strength of the electrode portion is improved and the durability as a semiconductor device is also improved. Be done.

(Third Embodiment of the present invention)
In the production of the substrate for a semiconductor device according to the first embodiment, in the first step of forming the metal portion 11, the metal portion 11 is formed to a predetermined thickness not exceeding the thickness of the first resist layer 12.
The formation of the metal portion is interrupted, the second resist layer 16 is formed and arranged on the metal portion 11 corresponding to the concave position, and further, the exposed portion of the metal portion 11 not covered by the second resist layer 16 is formed. On the other hand, the step of forming the metal portion 11 is performed again, and the shape of the metal portion 11 is controlled by the appropriately arranged second resist layer 16 to obtain the final shape of the metal portion 11. 3
As an embodiment of the above, a second resist layer 16 is formed in a predetermined range on the first resist layer 12 between two steps of forming the metal portion 11 (see FIG. 14), and in a later metal portion forming step. The formation range of the metal portion can be limited by the second resist layer 16 (see FIG. 15), and the upper portion of the metal portion 11 can be adjusted to a preset size.

For example, by forming the metal portion 11 beyond the thickness of the first resist layer 12, the peripheral edge of the upper end of the metal portion 11 near the first resist layer 12 has a substantially eave-like shape overhanging toward the first resist layer 12. The overhanging portion 11i is formed (see FIG. 15A). At this time, since the second resist layer 16 is arranged on the first resist layer 12, the overhanging portion 11i is restricted in its formation range by the second resist layer 16 and is placed on the side surface of the second resist layer 16. It is formed with a contacting part. As a result, the overhanging amount of the overhanging portion 11i is controlled to a predetermined amount based on the preset arrangement of the second resist layer 16.

In this case, since each of the metal portions 11 adjacent to each other on the master substrate 10 is provided with the overhanging portions 11i at the upper part, the overhanging portions 11i can be adjusted to form an appropriate preset distance from each other. The arrangement interval of the metal portions on the 10 can be made smaller than before. That is, since the overhanging amount of the overhanging portion on the upper part of the metal portion 11 cannot be strictly controlled in the conventional process, the arrangement spacing of the metal portions 11 is widened so that the spacing between the overhanging portions does not become narrow so as to prevent the resist removal later. However, in the present embodiment, the overhanging amount of the overhanging portion 11i can be adjusted by arranging the second resist layer 16, so that even when the arrangement interval of the metal portion 11 is narrowed, the overhanging portion 11i is overhanging. The amount can be suppressed to such an extent that resist removal can be performed without problems, and the minimum spacing between adjacent metal portions 11 can be set to an appropriate amount.

As for the arrangement interval of the metal portions, the overhanging portion 11i can secure the minimum necessary overhanging amount to obtain sufficient strength against disconnection, and the removing agent of the first resist layer 12 reaches between the metal portions. The size can be reduced as long as the state in which the resist layer 12 can be appropriately removed is maintained (see FIG. 16). As a result, the semiconductor device formed on the semiconductor device substrate 3 can be further miniaturized, the formation density of the semiconductor device on the semiconductor device substrate 3 can be increased, and the manufacturing efficiency of the semiconductor device can be improved.

In this way, the second resist layer 16 is arranged on the first resist layer 12, and the second resist layer 1
When adjusting and controlling the upper shape of the metal portion 11 in 6, in addition to the above, as shown in FIG. 17, after forming the first resist layer 12 on the master substrate, the second resist layer 16 is formed. It can also be performed by the procedure of forming the metal portion and then forming the metal portion, and the formation of the metal portion can be performed in one step, so that the manufacturing efficiency can be further improved.

In this case, as a method for manufacturing a substrate for a semiconductor device, a resist layer 1 is formed on the front and back of the master substrate 10.
In the steps of forming 2 and 18, respectively, and on the upper side of the first resist layer 12, the overhanging portion 11
The second resist layer 16 corresponds to the position where the formation of the metal portion 11 formed as i is desired to be suppressed.
A step of forming the metal portion 11 to a predetermined thickness on a portion of the surface of the master substrate 10 that is not covered with the first resist layer 12 or the second resist layer 16, and a step of forming a surface on the surface of the metal portion 11. It can be said that the process includes a step of forming the metal layer 13 and a step of removing the first resist layer 12, the second resist layer 16 on the front surface side of the master substrate 10, and the resist layer 18 on the back surface side, respectively.

Specifically, each step of manufacturing the substrate for a semiconductor device will be described. First, the steps of forming the resist layers 12 and 18 on the front and back of the master substrate 10 are executed, as in the first embodiment. Therefore, a detailed description thereof will be omitted.

Subsequently, in the step of forming the second resist layer 16, the first resist layer 1 formed first
The second resist layer 16 is arranged on the 2 so as to correspond to the range in which the formation of the metal portion 11 is desired to be suppressed. Specifically, the photosensitive resist agent 16a is placed on the surface side of the matrix substrate 10 and the first resist layer 12.
Are closely arranged so as to have a predetermined thickness (for example, about 50 μm) (see FIG. 17 (B)).
.. A mask film 51 having a predetermined pattern corresponding to a position where the formation of the metal portion 11 as the overhanging portion 11i is desired to be suppressed is placed on the photosensitive resist agent, and the film is cured by exposure to ultraviolet rays (FIG. 17 (C)). (See), a known process such as development for removing the resist agent in the non-irradiated portion is performed to cure and form the second resist layer 16 corresponding to the portion where the metal portion 11 is not formed (see FIG. 18 (A)).

After the second resist layer 16 is formed, known surface oxide film removal and surface activation are performed on the exposed portion of the surface of the master substrate 10 that is not covered with the first resist layer 12 and the second resist layer 16 as necessary. Perform processing. Then, a gold thin film 11d for improving solder wettability is formed on the exposed portion by plating or the like to have a thickness of, for example, 0.05 to 1 μm (see FIG. 18B). Then, nickel is laminated on the thin film 11d by electrolytic plating to form the metal portion 11 (see FIG. 18C).

In the process of forming the metal portion 11, the metal portion 11 is formed to have a predetermined thickness (for example, about 60 μm) that exceeds the thickness of the first resist layer 12 but does not exceed the upper surface of the second resist layer 16. On the peripheral edge of the upper end of the metal portion 11 near the first resist layer 12, a substantially eaves-shaped overhanging portion 11i extending toward the first resist layer 12 is formed with a portion in contact with the side surface of the second resist layer 16. (See FIG. 18 (C)). Since the forming range of the overhanging portion 11i is regulated by the second resist layer 16 arranged so that the metal portion 11 is not formed, the overhanging amount of the overhanging portion 11i is set in advance. Further, the metal portion 11 is a semiconductor manufactured by using a combination of a semiconductor element mounting portion 11a and a plurality of electrode portions 11b arranged in the vicinity thereof on the surface of the master substrate 10 as one unit, as in the first embodiment. As many combinations as the number of devices are arranged in an aligned state.

A step of forming a surface metal layer 13 on the surface of the metal portion 11 after forming the metal portion 11 to a predetermined thickness (see FIG. 19A), and a first resist layer 12 on the surface side of the master substrate 10. Similar to the first embodiment, the substrate 4 for a semiconductor device is completed through the steps of removing the second resist layer 16 and the resist layer 18 on the back surface side (see FIG. 19B). ..

In this way, following the step of forming the first resist layer 12 on the master substrate 10, the second resist layer 16 is formed, and then the metal portion 11 is formed, thereby forming the second resist layer 11 in the same manner as described above. In addition to being able to control the formation range of the metal portion 11 (overhanging portion 11i) that reaches the upper side of the resist layer 12, the resist layers are formed together first, and the metal portion 11 is formed in one step.
After the formation of the second resist layer 16, the process of resuming the formation of the metal portion after performing a treatment such as cleaning on the existing metal portion 11 can be omitted, and the production efficiency can be improved.

Following the step of forming the first resist layer 12 on the master substrate 10, the series of steps of forming the second resist layer 16 and then forming the metal portion 11 is performed on the semiconductor element mounting portion and the electrodes. It can also be applied to a part of the metal part to be a part to form a through hole in the metal part. Specifically, the first resist layer 12 is formed at a position where a through hole is desired to be provided in the metal portion, and the second resist layer 16 is further arranged on the first resist layer 12, and in the process of forming the metal portion, the periphery of each resist layer is formed. If a metal portion is formed in the metal portion, a through hole whose upper opening shape is adjusted by the appropriately arranged second resist layer 16 will be generated after the resist is removed. When the size of the hole is sufficiently larger than the amount of overhanging of the metal portion 11 toward the first resist layer 12, only the first resist layer 12 is formed at the hole position without providing the second resist layer 16. A hole may be formed.

In addition, a through hole may be provided so as to overlap the portion where the recess of the metal portion is provided.
As an example, to explain the case where a through hole is provided between the metal portions of the adjacent semiconductor devices, the first resist layer 12 is first formed on the master substrate 10 and then the metal portion 11 is formed to a predetermined thickness. The second resist layer 16 is formed in a recess and a portion to be a through hole. The second resist layer is formed so as to straddle the metal portion and the first resist layer at a position where both the recess and the through hole are generated.

After that, each step of additional formation of the metal portion and formation of the surface metal layer is executed (see FIG. 20A), and finally each resist layer is removed. The substrate 5 is obtained (see FIG. 20B). In the example shown in FIG. 20, in the manufacturing process of the semiconductor device, the through hole 11k is located exactly at the portion removed between the electrode portions 11l in the cutting process when separating the individual semiconductor devices after sealing. As a result of removing the sealing material 19 existing in the through hole portion at the time of cutting, a part of the electrode portion 11l is exposed on the side surface of the semiconductor device 72 obtained by cutting (FIG. 20 (C). )reference). By setting the through hole 11k at the cutting position, it is not necessary to cut the metal in the cutting process even when the electrode portion is exposed on the side surface of the semiconductor device as in the second embodiment. It is possible to reduce the wear of the blade portion (dicing blade) of the cutting processing device due to cutting.

1, 2, 3, 4 Semiconductor device substrate 10 Master substrate 11 Metal part 11a Semiconductor element mounting part 11b, 11f Electrode part 11c, 11i Overhanging part 11d Thin film 11e, 11g Recess 11h Step 11j Recess 11k Through hole 11l Electrode part 12 1st resist layer 12a Resistant 13 Surface metal layer 14 Semiconductor element 15 Wire 16 2nd resist layer 16a Resistant 18 Resist layer 19 Encapsulant 50, 51 Mask film 70, 71, 72 Semiconductor device

Claims (1)

A semiconductor element, a metal portion serving as a semiconductor element mounting portion and / or an electrode portion, and a sealing material that covers and seals the surface side of the semiconductor element and the metal portion are provided, and the metal portion of the metal portion is provided at the bottom of the device . A semiconductor device in which the back surface is exposed and the back surface of the metal portion and the back surface of the encapsulant are located on the same plane.
A recess is provided on the surface of the metal portion, and the recess is provided.
An overhanging portion is formed at the upper end of the metal portion, and the overhanging portion has an upper surface continuously formed on the surface of the metal portion and a lower surface parallel to the surface of the metal portion.
In the thickness direction of the metal portion, the lower surface of the overhanging portion is provided at a position higher than the bottom surface of the recess .
A semiconductor device characterized in that a surface metal layer is formed on the upper surface of the overhanging portion, and the surface metal layer is not formed on the surface facing the recess .

Images