JP7002985B2 - Power converter and control method of power converter - Google Patents

Description

An embodiment of the present invention relates to a power conversion device and a control method for the power conversion device.

Power converters that convert direct current and alternating current are also called inverters and converters, and are used in a wide range of fields in society. The most basic inverter is a two-level inverter with two semiconductor switching elements, which outputs two voltage levels on one leg.

On the other hand, as shown in FIG. 7, each phase is provided with four semiconductor switching elements and two diodes (semiconductor switching elements may be used) in one leg, and has a DC voltage dividing capacitor common to each phase. There is a point clamp type (NPC (Neutral-Point-Clamped)) inverter. FIG. 7 shows an example of a power conversion device 1 including a three-phase NPC inverter 100. The NPC inverter 100 can output three voltage levels in one leg, and is used in various inverters because it contributes to high withstand voltage, loss reduction, and harmonic reduction.

J. Pou, et al., "Fast-Processing Modulation Strategy for the Neutral-Point-Clamped Converter With Total Elimination of Low-Frequency Voltage Oscillations in the Neutral Point", IEEE Transactions on Industrial Electronics, vol. 54, no. 4 , 2007

In the example of FIG. 7, the NPC inverter 100 includes six semiconductor switching elements S ₁ to S ₆ on one leg for each phase, and has DC voltage dividing capacitors C ₁ and C ₂ for dividing the DC voltage v _PN . .. Here, let v _n be the potential of the neutral point NP of the DC voltage dividing capacitors C ₁ and C ₂ . The neutral point potential _vn of the NPC inverter 100 has a property of fluctuating three times as much as the fundamental wave according to the operation of the inverter. If the fluctuation of the neutral point potential _vn is large, the voltage applied to the semiconductor switching element fluctuates, and when the voltage is high, the withstand voltage may be exceeded and the element may be damaged. It can be modulated.

The magnitude of the fluctuation of the neutral point potential _vn is related to the modulation factor and the power factor, the capacitor capacity, and the load current. When the magnitude of the fluctuation of the neutral point potential _vn due to the modulation factor and the power factor is calculated with the capacitor capacity and the load current as constant values, it is expressed as shown in the graph of FIG. In FIG. 8, the power factor is represented as the phase difference between voltage and current. It can be seen that the higher the modulation factor and the lower the power factor (phase difference ₌ closer to π / 2), the larger the fluctuation of the neutral point potential vn.

The simplest way to suppress fluctuations in the neutral potential _vn is to increase the capacity of the capacitor. However, an increase in the capacity of the capacitor causes an increase in the volume and cost of the inverter, and the energy in the event of an accident also increases.

This fluctuation of the neutral point potential _vn can be suppressed by control (for example, Non-Patent Document 1). Generally, the command value for each phase of the NPC inverter is one, but as shown in FIG. 9, there is a method of using two of the upper arm voltage command value _vup and the lower arm voltage command value _vun . The voltage command value v _up for the upper arm is a command value given to the semiconductor switching elements S ₁ , S ₂ , S ₅ located in the upper half of each arm in FIG. 7, and the voltage command value v _un for the lower arm is It is a command value given to the semiconductor switching elements S ₃ , S ₄ , and S ₆ located in the lower half of each arm in FIG. 7.

FIG. 9 shows the command value of the u phase as an example. The voltage command value _vup for the upper arm is subjected to comparative processing with the upper carrier _carp to obtain a gate signal to be given to the semiconductor switching elements S1, _S2 , and _S5 of the _upper arm. On the other hand, the voltage command value _vn for the lower arm is subjected to comparative processing with the lower carrier car _n to obtain a gate signal to be given to the semiconductor switching elements S ₃ , S ₄ , and S ₆ of the lower arm. The upper carrier car _p changes between the modulation factors 0 and 1, and the lower carrier car _n changes between the modulation factors -1 and 0.

The voltage command value for the upper arm _vip and the voltage command value for the lower arm v _in (where i = u, v, w) for the three phases are obtained by the following equation (1).

Here, min is a function for finding the minimum value in the argument, and max is a function for finding the maximum value.

For example, when there are three-phase voltage command values v _u , v _v , v _w shown in FIG. 10 (a), the u-phase voltage command value v _u is as shown in FIG. 10 (b) from the equation (1). Will be converted. Further, after a comparison process of the upper carrier car _p and the voltage command value v _up for the upper arm shown in FIG. 10 (c) and a comparison process of the lower carrier car _n and the voltage command value v _un for the lower arm, FIG. A PWM-like u-phase output voltage v _uout as in (d) can be obtained.

When the magnitude of the fluctuation of the neutral point potential due to the modulation factor and the power factor when the modulation method by this control is applied is calculated, it is represented as shown in the graph of FIG. That is, it can be seen that the fluctuation of the neutral point potential can be completely suppressed in a certain operating region.

However, looking at the PWM waveform in FIG. 10D, there is a section in which both the switching element group of the upper arm and the switching element group of the lower arm are switching. In the normal modulation method, the NPC inverter switches only one of the switching element group of the upper arm and the switching element group of the lower arm, but since both are switched in this section, the switching frequency is doubled. Since this section is 1/3 of one cycle, the switching frequency of the inverter increases 1.33 times on average. Then, the switching loss is increased. Further, in order to solve this, the cooling device of the inverter becomes large and the cost increases. In addition, the running cost of the inverter also increases.

The problem to be solved by the present invention is to provide a power conversion device and a control method for the power conversion device, which can suppress the increase in switching loss while suppressing the fluctuation of the neutral point potential in a wider operating region. To do.

The power conversion device of the embodiment is the power converter of the neutral point clamp type, and the power of each of the first switching element group and the second switching element group of each phase constituting the power converter. By giving a first voltage command value and a second voltage command value generated by using the voltage command values of each phase of the converter, control is performed to suppress fluctuations in the neutral point potential of the power converter. The control means includes a control means, and the control means is the first from a new voltage command value of each phase obtained by superimposing the zero-phase voltage of the power converter on the voltage command value of each phase of the power converter. The first voltage is based on the first control mode that generates the voltage command value of the above and the second voltage command value, the voltage command value of each phase of the power converter, and the maximum and minimum values thereof. It has means for switching between a second control mode for generating a command value and the second voltage command value.

According to the present invention, it is possible to suppress an increase in switching loss while suppressing fluctuations in the neutral point potential in a wider operating region.

The figure which shows an example of the NPC inverter in 1st Embodiment. The figure which shows an example of the functional structure of the neutral point potential fluctuation suppression control in the same embodiment. The figure which shows an example of the operation of the neutral point potential fluctuation suppression control by the zero-phase voltage superimposition in the same embodiment. The figure which shows an example of the fluctuation of the neutral point potential by the zero-phase voltage superimposition in the same embodiment. The block diagram which shows an example of the functional structure of the carrier comparison processing in 3rd Embodiment. The figure which shows an example of the waveform of the carrier comparison processing in the same embodiment. The figure which shows an example of the circuit of the NPC inverter in the prior art. The figure which shows an example of the fluctuation of the neutral point potential in the prior art. The figure which shows an example of the modulation method by the neutral point potential fluctuation suppression control of the prior art. The figure which shows an example of the modulation waveform by the neutral point potential fluctuation suppression control of the prior art. The figure which shows an example of the neutral point potential fluctuation by the neutral point potential fluctuation suppression control of the prior art.

Hereinafter, embodiments will be described with reference to the drawings.

[First Embodiment]
First, the first embodiment will be described. In the following, the description of the parts common to the conventional configuration described above will be omitted, and the parts different from the above will be mainly described.

FIG. 1 is a diagram showing an example of the configuration of the power conversion device according to the first embodiment. In FIG. 1, the same reference numerals are given to the elements common to those in FIG. 7 described above.

The NPC inverter 100 constituting the power conversion device 1 is a general three-phase NPC inverter similar to that shown in FIG. 7. However, the present invention is not limited to this example. For example, in the present embodiment, an NPC inverter is exemplified as a neutral point clamp type power converter, but this may be implemented instead of the NPC converter. Further, the neutral point clamp may be a T-shaped midpoint clamp or may be another type.

The power conversion device 1 is further controlled to control the normal operation of the NPC inverter 100 and to suppress fluctuations in the neutral point potential _vn (hereinafter, referred to as “neutral point potential fluctuation suppression control”). The device 10 is provided.

The control device 10 includes semiconductor switching elements S ₁ , S ₂ , S ₅ (first switching element group located in the upper half of each arm) and semiconductor switching elements S ₃ , S ₄ of each phase constituting the NPC inverter 100. , S ₆ (second switching element group located in the lower half of each arm), respectively, the first generated using the voltage command values v _u , v _v , v _w of each phase of the NPC inverter 100. By giving the voltage command value of 1 and the voltage command value of the second voltage, the control of the normal operation of the NPC inverter 100 and the control of suppressing the fluctuation of the neutral point potential _vn are performed.

In particular, this control device 10 is based on a new voltage command value of each phase obtained by superimposing the zero-phase voltage of the NPC inverter 100 on the voltage command values v _u , v _v , v _w of each phase of the NPC inverter 100. The voltage command value for the upper arm (first voltage command value) v _up , v _vp , v _pp and the voltage command value for the lower arm (second voltage command value) v _un , v _vn , v _wn are generated. Based on the control mode of 1 and the voltage command values v _u , v _v , v _w of each phase of the NPC inverter 100 and their maximum and minimum values, the voltage command value for the upper arm is used using the above-mentioned equation (1). It has a function to switch between a second control mode for generating v _up , v _vp , v _pp and a lower arm voltage command value v _un , v v _n , v w _n .

For example, in the control device 10, in the first control mode, the modulation factor of any of the voltage command values of each phase on which the zero-phase voltage is superimposed is within a predetermined range (for example, the modulation factor is smaller than 1 and more than -1). If it exceeds a large range), the second control mode is switched to. On the other hand, in the second control mode, if all the modulation factors of the voltage command values of the respective phases on which the zero-phase voltage is superimposed are within a predetermined range, the mode is switched to the first control mode.

In the neutral point potential fluctuation suppression control by the second control mode using the equation (1), as described above, the neutral point potential fluctuation can be completely suppressed in a certain operating region, but this control alone is above. Since the switching frequency increases in the section where the switching element group S ₁ , S ₂ , S ₅ of the arm and the switching element group S ₃ , S ₄ , S ₆ of the lower arm are both switched, the switching loss increases. .. Therefore, in the present embodiment, the period during which the modulation rate of the voltage command value of each phase on which the zero-phase voltage is superimposed is within a predetermined range (period without overmodulation) is the neutral point according to the first control mode. Controls to suppress potential fluctuations. In the first control mode, there is no section in which the switching element groups S ₁ , S ₂ , S ₅ of the upper arm and the switching element groups S ₃ , S ₄ , S ₆ of the lower arm are both switched. This makes it possible to suppress the increase in the loss to the minimum while suppressing the fluctuation of the neutral point potential in a wider operating region.

FIG. 2 is a diagram showing an example of the functional configuration of the neutral point potential fluctuation suppression control of the NPC inverter 100 by the control device 10 provided in the power conversion device 1 according to the present embodiment. However, this configuration example is an example and is not limited to this example.

As shown in FIG. 2, the control device 10 has a zero-phase voltage superimposition processing unit 11, determination units 12, 13, calculation units 14 to 17, and switching units SW11, SW12, SW21, and SW22 as various functions.

Among these elements, the switching units SW21 and SW22 switch so that one of the first control mode and the second control mode is selected.

The neutral point potential fluctuation suppression control by the first control mode is realized by using the zero-phase voltage superimposition processing unit 11, the determination units 12, 13, the switching units SW11, SW12, and the switching units SW21, SW22. On the other hand, the neutral point potential fluctuation suppression control by the second control mode is realized by using the calculation units 14 to 18 and the switching units SW21 and SW22.

The zero-phase voltage superimposition processing unit 11 calculates the zero-phase voltage of the NPC inverter 100 using the equation (2) shown below, and sets the zero-phase voltage to the voltage command values v _u , v _v , v _w of each phase. It has a function to superimpose and output as voltage command values v _u0 , v _v0 , v _w0 . When there is a voltage command value whose sign changes due to superimposition of the zero-phase voltage, the control device 10 inverts the sign of the voltage command value to recalculate the zero-phase voltage, and obtains the recalculated zero-phase voltage. It also has a function to superimpose on the voltage command value of each phase and output it as the voltage command value v _u0 , v _v0 , v _w0 . This makes it possible to suppress fluctuations in the neutral point potential _vn in a wider operating region. Further, the control device 10 has an intermediate value when the denominator of the above-mentioned equation (2) changes across 0 even when there is no voltage command value whose sign has changed due to the superposition of the zero-phase voltage. It also has a function to recalculate the zero-phase voltage by inverting the sign of the voltage command value of. This prevents an excessive zero-phase voltage from being generated when the denominator of the equation (2) straddles 0, and makes it possible to operate the fluctuation suppression control normally.

In the zero-phase voltage superimposition processing unit 11, the following equation (2) is used.

However, v _u , v _v , v _w represent the voltage command value for each phase leg standardized by 1, and i _u , iv _v , i _w represent the current output from each phase leg. sign represents a sign function.

Here, an example of the operation of the zero-phase voltage superimposition processing unit 11 will be described with reference to FIG.

The zero-phase voltage superimposition processing unit 11 uses equation (2) based on the voltage command values v _u , v _v , v _w and the output currents i _u , i _v , i _w obtained from the NPC inverter 100. The voltage is calculated to obtain the zero-phase voltage v ₀ (S11). Since the voltage command values v _u , v _v , v _w may be used for the calculation of the intermediate value as well as the recalculation of the zero-phase voltage v _0re , they are temporarily stored in a predetermined storage area. Keep it (S12).

Further, the zero-phase voltage superimposition processing unit 11 obtains an intermediate value between the voltage command values v _u , v _v , and v _w (S13).

On the other hand, the zero-phase voltage superimposition processing unit 11 adds the obtained zero-phase voltage v ₀ to each of the voltage command values v _u , v _v , v _w , and _obtains the voltage command values v _u 0, v _v 0, v w 0. Find (S14). For these voltage command values v _u0 , v _v0 , and v _w0 , the intermediate values of the voltage command values v _u0 , v _v0 , and v _w0 are obtained.

Next, the zero-phase voltage superimposition processing unit 11 determines whether or not the sign of the intermediate value has changed before and after adding the zero-phase voltage v ₀ (S15). That is, it is determined whether or not the sign of the intermediate value matches before and after adding the zero-phase voltage v ₀ . When the signs match between the two, it can be considered that the sign of the intermediate value has not changed before and after the addition of the zero-phase voltage v ₀ (No in S15). On the other hand, if the signs do not match between the two, it can be considered that the sign of the intermediate value has changed before and after the addition of the zero-phase voltage v ₀ (Yes in S15).

If the intermediate value has changed in step S15 (Yes in S15), the process proceeds to step S16.

On the other hand, if the intermediate value has not changed in step S15 (No in S15), the zero-phase voltage superimposition processing unit 11 determines whether or not the denominator of the equation (2) has changed across 0. (S21 to S23).

Here, unless the power factor is greater than 0 and the denominator is 0 or less (Yes in S21, No in S22), the zero-phase voltage superimposition processing unit 11 states that the denominator does not change across 0. Deemed, the voltage command values v _u0 , v _v0 , and v _w0 obtained in step S14 are output. On the other hand, if the power factor is greater than 0 and the denominator is 0 or less (Yes in S21, Yes in S22), the zero-phase voltage superimposition processing unit 11 considers that the denominator has changed across 0, and steps. Proceed to the process of S16.

Further, if the power factor is not greater than 0 and the denominator is not 0 or more (No in S21, No in S23), the zero-phase voltage superimposition processing unit 11 states that the denominator does not change across 0. Deemed, the voltage command values v _u0 , v _v0 , and v _w0 obtained in step S14 are output. On the other hand, if the power factor is not greater than 0 and the denominator is 0 or more (No in S21, Yes in S23), the zero-phase voltage superimposition processing unit 11 considers that the denominator has changed across 0. The process proceeds to step S16.

In step S16, the zero-phase voltage superimposition processing unit 11 recalculates the zero-phase voltage after inverting the sign of the intermediate value of the voltage command values v _u , v _v , v _w obtained in step S13. The zero-phase voltage v _0re is obtained (S16), and the obtained zero-phase voltage v _0re is added to each of the voltage command values v _u , v _v , v _w saved in step S12, and the voltage command value v The _u0 , v _v0 , and v _w0 are obtained (S17), and the obtained voltage command values v _u0 , v _v0 , and v _w0 are output.

The above-mentioned processes S21 to S23 are not always required, and their implementation may be omitted. In that case, if the intermediate value has not changed in step S15 (No in S15), the zero-phase voltage superimposition processing unit 11 does not recalculate the zero-phase voltage, and the voltage command value v _u0 obtained in step S14. , V _v0 , v _w0 are output.

In this way, when the sign of the intermediate value changes by superimposing the zero-phase voltage, the sign is inverted and the zero-phase voltage is recalculated to obtain the zero-phase voltage v _0re , and this zero-phase voltage v. _0re is superimposed on the voltage command values v _u , v _v , v _w of each phase. As a result, the effect of suppressing fluctuations is properly exhibited.

Since the voltage command values v _u0 , v _v0 , and v _w0 output from the zero-phase voltage superimposition processing unit 11 are command values for one leg of each phase, the voltage command values are determined by the determination unit 12, SW11, and SW12. Is divided into upper arm voltage command values _vup , _vvp , _vwp and lower arm voltage command values _vun , _vvn , _vwn .

Specifically, the determination unit 12 determines whether the modulation factor is positive or negative, and if the modulation factor is positive, the voltage command values v _u0 , v _v0 , and v _w0 are the voltage command values for the upper arm. The switching units SW11 and SW12 are operated so that they are output as _vup , _vvp , and _vwp , and the fixed value "0" is output as the lower arm voltage command values _vun , _vvn , and _vwn , respectively. On the other hand, if the modulation factor is not positive (if it is negative), the fixed value "0" is output as the voltage command values for the upper arm v _up , v v p, v _wp , and the voltage command values _{v u0 ,} v _v0 , v. The switching units SW11 and SW12 are operated so that _w0 is output as the lower arm voltage command values v _un , v v _n , and v w _n , respectively.

Further, the modulation factor of any one of the voltage command values v _u0 , v _v0 , and v _w0 output from the zero-phase voltage superimposition processing unit 11 by the determination unit 13, SW21, and SW22 is smaller than 1, for example, and larger than -1. The first control mode or the second control mode is selected depending on whether or not the range is exceeded.

Specifically, the determination unit 13 determines whether or not the absolute value of the modulation factor of any of the voltage command values v _u0 , v _v0 , and v _w0 is smaller than 1, and if it is smaller, it is output from the switching unit SW11. The value is output as the upper arm voltage command value v _up , v _vp , v _wp through the switching unit SW21, and the value output from the switching unit SW12 is the lower arm voltage command value v _un , v _vn , v through the switching unit SW 22. The switching units SW21 and SW22 are operated so as to be output as _wn . In this case, the first control mode is set.

On the other hand, if the absolute value of any of the voltage command values v _u0 , v _v0 , and v _w0 is not smaller than 1, the value output from the calculation unit 16 is the voltage command value v for the upper arm through the switching unit SW21. Switching units SW21, SW22 so that the values output as _up , v _vp , v _wp and output from the arithmetic unit 18 are output as lower arm voltage command values v _un , v _vn , v w _n through the switching unit SW 22. Operate each. In this case, the second control mode is set.

The calculation units 14 to 18 are elements for performing the calculation of the above-mentioned equation (1). Calculation units 14, 15 and 16 calculate "( _{vi / 2)-(min (v u ,} v _v , v _w ) / 2)" (however, i = u, v, w) for the upper arm. While obtaining the voltage command value _vip (that is, _vup , _vvp , _vwp ), the arithmetic units 14, 17, and 18 "( _vi / 2)-(max ( _vu , _vv , _vw )). / 2) ”is calculated, and the voltage command value for the lower arm _vin (that is, v _un , v v _n , v w _n ) is obtained.

When the fluctuation of the neutral point potential _vn when the neutral point potential fluctuation suppression control by the zero-phase voltage is applied is calculated for each modulation factor and power factor (phase difference between voltage and current) and graphed, It becomes as shown in FIG. That is, it can be seen that in the operating region where the modulation factor is low and the power factor is low (phase difference = close to π / 2), the fluctuation of the neutral point potential can be completely suppressed.

In the neutral point potential fluctuation suppression control by the zero-phase voltage, both the _upper arm switching element groups S1, S2, _S5 and the _lower arm switching element groups S3 _{, S4} , _S6 are switched. Since there is no section and the switching frequency does not increase, the loss can be made smaller than that of the control using only the equation (1). Further, by applying this embodiment, since the control using the equation (1) is applied in the operating region where the fluctuation appears in FIG. 4, the fluctuation of the neutral point potential is suppressed in a wider operating region. be able to. In this case, the graph of the fluctuation of the neutral point potential _vn becomes the same as in FIG.

As described above, according to the second embodiment, it is possible to suppress the increase in the neutral point potential while suppressing the increase in the loss to the minimum in a wider operating region. Further, it becomes possible to provide a compact and low-cost power conversion device by suppressing an increase in switching loss while preventing an increase in capacitor capacity.

In the present embodiment, since the sign of the intermediate value among the voltage command values v _u , v _v , and v _w changes when the zero-phase voltage is superimposed, the change in the sign is determined for the intermediate value. The case is illustrated, but the case is not limited to this example. For example, the change in the code is determined for each of the voltage command values v _u , v _v , v _w of each phase without performing the process of determining the intermediate value of the voltage command values v _u , v _v , v _w . You may do it. Further, the determination of the voltage command value whose sign changes may be performed by a method other than the above.

Further, whether or not the sign of the voltage command value before and after the zero-phase voltage is superimposed may be determined based on the subtraction result of the two voltage command values before and after the zero-phase voltage is superimposed. The determination is not limited to this, and the determination may be made using another method (for example, another type of logic circuit).

[Second Embodiment]
Next, the second embodiment will be described. In the following, the description of the parts common to the first embodiment will be omitted, and the parts different from the first embodiment will be mainly described.

The configuration of the power conversion device according to the second embodiment is the same as that shown in FIG. However, the control device 10 in the second embodiment includes a determination unit (not shown) different from the determination unit 13 shown in FIG. 2 of the first embodiment, and is controlled by a determination standard different from that in the first embodiment. Switch the mode.

The control device 10 in the second embodiment switches from the second control mode to the first control mode (or from the first control mode to the second control mode) depending on the operating conditions of the NPC inverter 100. conduct. The operating conditions to which the first control mode is applied or the operating conditions to which the second control mode is applied are predetermined, for example, using a modulation factor and a power factor. Not limited to this, it may be determined by using an active power command, an ineffective power command, or the like. The information indicating the operating conditions is stored in a predetermined storage area and is used as a determination criterion for switching the control mode during the operation of the NPC inverter 100.

For example, the boundary between the first operating range according to the first control mode and the second operating range according to the second control mode is predetermined by using, for example, a modulation factor and a power factor, and the first operating region is set. The first control mode is applied to the operation in the second operation area, and the second control mode is applied to the operation in the second operation area.

According to the second embodiment, as compared with the first embodiment, the determination criteria for switching the control mode can be set more finely, so that the balance between the loss suppression and the neutral point potential fluctuation suppression is improved. , It is possible to realize the operation in a more appropriate control mode according to the operating condition.

[Third Embodiment]
Next, a third embodiment will be described. In the following, the description of the parts common to the first embodiment will be omitted, and the parts different from the first embodiment will be mainly described.

The configuration of the power conversion device according to the second embodiment is the same as that shown in FIG. However, the control device 10 in the second embodiment further, in the second control mode, the NPC inverter 100 is based on the respective states of the upper arm voltage command value _vup and the lower arm voltage command value _vun . It has a function to change the carrier frequency of the inverter.

For example, the control device 10 has a function of lowering the carrier frequency to, for example, half the normal frequency when both the upper arm voltage command value _vup and the lower arm voltage command value _vun are not 0. During the period when the switching frequency of the element group including the semiconductor switching elements S ₁ , S ₂ , S ₅ of the upper arm and the semiconductor switching elements S ₃ , S ₄ , S ₆ of the lower arm increases by a certain amount or more, the NPC inverter 100 It has a function of lowering the carrier frequency to, for example, half the normal frequency.

FIG. 5 is a diagram showing an example of a functional configuration of carrier frequency switching control provided in the control device 10 provided in the power conversion device 1 according to the present embodiment. However, this configuration example is an example and is not limited to this example.

There are two types of carriers, car1 and car2. Car1 is a normal carrier and car2 is a switching carrier. Here, it is assumed that car2 has a frequency that is ½ of the frequency of car1, for example, but the frequency is not limited to this. car2 may be, for example, a frequency of 1/3 of the frequency of car1.

The control device 10 has a comparison unit 31, 32, a calculation unit 33, 34, a determination unit 35, 36, a calculation unit 37, and a switching unit SW31, SW32.

The comparison unit 31 displays the comparison result between the upper arm voltage command value _vup and the normal carrier car1 or the comparison result between the upper arm voltage command value _vup and the switching carrier car2, and the gate signal g for the upper arm element. Output as _up .

The comparison unit 32 has a comparison result between the lower arm voltage command value v _un and the difference between the normal carrier car 1 calculated by the calculation unit 33 and the value "1", or the lower arm voltage command value v _un . The comparison result between the switching carrier _car2 calculated by the calculation unit 34 and the difference between the value "1" is output as the gate signal gun of the lower arm element.

The determination unit 35 determines whether or not the voltage command value _vup for the upper arm is 0, outputs 1 if it is 0, and outputs 0 if it is not 0.

The determination unit 36 determines whether or not the lower arm voltage command value _vn is 0, outputs 1 if it is 0, and outputs 0 if it is not 0.

If at least one of the outputs of the determination units 35 and 36 is not 0 (that is, if at least one of the voltage command value _vup for the upper arm and the voltage command value v _un for the lower arm is 0), the calculation unit 37 may use the calculation unit 37. The switching units SW31 and SW32 are operated so as to select contact 0, respectively. On the other hand, if the outputs of the determination units 35 and 36 are both 0 (that is, if both the upper arm voltage command value _vup and the lower arm voltage command value _vun are not 0), the switching unit SW31, Operate so that each SW32 selects one contact.

In such a configuration, the normal carrier car1 is applied during the period in which at least one of the upper arm voltage command value _vup and the lower arm voltage command value _vun is 0. On the other hand, the switching carrier car2 is applied during the period when both the upper arm voltage command value _vup and the lower arm voltage command value _vun are not 0. This is shown in a waveform diagram as shown in FIG.

If the normal carrier car1 is applied during the period when both the upper arm voltage command value _vup and the lower arm voltage command value _vun are not 0, the total number of switchings between the upper arm and the lower arm is doubled, but In the present embodiment, since the carrier car2 is applied, the carrier frequency is halved, and the total number of switchings does not change as compared with that before switching. That is, the increase in switching loss is suppressed.

According to the third embodiment, it is possible to further suppress the increase in switching loss as compared with the first embodiment.

As described in detail above, according to each embodiment, it is possible to suppress the increase in the switching loss while suppressing the fluctuation of the neutral point potential in a wider operating region.

Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other embodiments, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and variations thereof are included in the scope and gist of the invention, and are also included in the scope of the invention described in the claims and the equivalent scope thereof.

10 ... Control device, 11 ... Zero-phase voltage superimposition processing unit, 12, 13 ... Judgment unit, 14 to 17 ... Calculation unit, 31, 32 ... Comparison unit, 33, 34 ... Calculation unit, 35, 36 ... Judgment unit, 37 ... Calculation unit, 100 ... NPC inverter, SW11, SW12, SW21, SW22, SW31, SW32 ... Switching unit.

Claims (6)

Neutral point clamp type power converter and
A first voltage generated by using the voltage command value of each phase of the power converter for the first switching element group and the second switching element group of each phase constituting the power converter. It is provided with a control means for controlling the fluctuation of the neutral point potential of the power converter by giving a command value and a second voltage command value.
The control means is
The first voltage command value and the second voltage command value from the new voltage command values of each phase obtained by superimposing the zero-phase voltage of the power converter on the voltage command values of each phase of the power converter. The first control mode to generate and
A second control mode that generates the first voltage command value and the second voltage command value based on the voltage command value of each phase of the power converter and its maximum and minimum values.
A power conversion device having means for switching and implementing. The control means is
In the first control mode, when the modulation factor of any of the voltage command values of each phase on which the zero-phase voltage is superimposed exceeds a predetermined range, switching to the second control mode is performed.
The power conversion device according to claim 1. The control means is
Switching between the first control mode and the second control mode is performed according to the operating conditions of the power converter.
The power conversion device according to claim 1. The control means is
In the second control mode, the carrier frequency of the power converter is changed according to the respective states of the first voltage command value and the second voltage command value.
The power conversion device according to claim 1. The control means is
In the second control mode, the carrier frequency of the power converter is lowered during a period in which the switching frequency of the element group including the first switching element group and the second switching element group increases by a certain amount or more.
The power conversion device according to claim 4. It is a control method of a power converter having a neutral point clamp type power converter.
By the control means, the first switching element group and the second switching element group of each phase constituting the power converter are generated by using the voltage command value of each phase of the power converter. The control includes controlling the fluctuation of the neutral point potential of the power converter by giving a first voltage command value and a second voltage command value.
The first voltage command value and the second voltage command value from the new voltage command values of each phase obtained by superimposing the zero-phase voltage of the power converter on the voltage command values of each phase of the power converter. The first control mode to generate and
A second control mode that generates the first voltage command value and the second voltage command value based on the voltage command value of each phase of the power converter and its maximum and minimum values.
A method of controlling a power converter, including switching between the two.

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