JP6985080B2 - Semiconductor optical device and its manufacturing method - Google Patents

Description

The present invention relates to a semiconductor optical device and a method for manufacturing the same.

A large number of semiconductor optical devices are manufactured on a wafer and then chipped for each device (Patent Document 1). In the chipping process, scribe scratches are made between adjacent elements using a diamond cutter, laser, etc., a groove is formed from the beginning, and in some cases, the groove is further scribed to cleavage. By forming the starting point of the scribe and applying pressure to it, it is cleaved and made into a chip. Further, a two-step chipping process is also known in which a wafer is cut into a bar shape in which elements are arranged in a row, and then chips are formed for each element.

Japanese Unexamined Patent Publication No. 2007-180522

When forming a scribe wound, the crystal may crack from the starting point of cleavage. Cracks occur not only on the light emitting end face but also inside the crystal, and when the cracks extend to the vicinity of the active layer, the absorbing layer, etc., the optical characteristics deteriorate and the reliability deteriorates.

Patent Document 1 discloses that a recess is formed at a position sandwiching a light emitting portion on the light emitting end face so that a crack (crystal step) generated on the light emitting end face does not reach the active layer. However, in the recess at this position, it is not possible to prevent cracks from progressing in the depth direction from the light emitting end face. Further, it is not possible to prevent the progress of cracks in the depth direction from the side surface orthogonal to the light emitting end surface.

An object of the present invention is to prevent the progress of cracks.

(1) The semiconductor optical device according to the present invention includes a laminated body composed of a plurality of semiconductor layers laminated so as to include an active layer extending in a stripe shape in the first direction, and the laminated body is in the first direction. It has an upper surface having a groove extending in the first direction away from the active layer in a second orthogonal direction, and a side surface adjacent to the upper surface in the second direction, wherein the side surface is another of the side surface. A rough surface region that is rougher than the region is adjacent to the upper surface, and the groove is adjacent to the entire width of the rough surface region in the first direction, and the lower surface of the active layer is formed. It has a depth exceeding that and is characterized by being closer to the side surface than the active layer. According to the present invention, even if a crack occurs in the rough surface region, the progress is stopped in a groove deeper than the active layer, so that the influence on the active layer can be prevented.

(2) The semiconductor optical device according to (1) may be characterized in that the rough surface region is formed so as to avoid both ends of the side surface in the first direction.

(3) The semiconductor optical device according to (1) or (2), wherein the laminated body is adjacent to the front surface adjacent to the upper surface in the first direction and adjacent to the upper surface on the side opposite to the front surface. It may be characterized in that the groove reaches both ends of the upper surface in the first direction and opens to the front surface and the back surface.

(4) The semiconductor optical device according to any one of (1) to (3), further comprising an electrode provided on the upper surface so as to overlap the active layer, and the electrode is the electrode. It may be characterized by having an end portion between the active layer and the groove.

(5) The semiconductor optical device according to any one of (1) to (4), wherein the laminated body has a mesa stripe structure including the active layer, and the upper surface thereof is the mesa stripe. It may be characterized by constituting the surface of the structure and having a recess adjacent to the mesa stripe structure.

(6) The semiconductor optical device according to any one of (1) to (4), wherein the laminated body has a mesa stripe structure including the active layer and the mesa stripe structure in the second direction. It may be characterized by having an embedded layer adjacent to the above.

(7) The semiconductor optical device according to any one of (1) to (6), which may be characterized in that the groove is provided on both sides of the active layer in the second direction. ..

(8) The semiconductor optical device according to any one of (1) to (7), which may be characterized in that the side surfaces are provided on both sides of the upper surface in the second direction.

(9) In the method for manufacturing a semiconductor optical device according to the present invention, a plurality of semiconductor optical elements are manufactured, and each of the plurality of semiconductor optical elements is laminated so as to include an active layer extending in a stripe shape in the first direction. The upper surface of the laminated body has a groove extending in the first direction away from the active layer in the second direction orthogonal to the first direction, including the laminated body composed of the plurality of semiconductor layers. Is a step of preparing an intermediate product having a depth exceeding the lower surface of the active layer, and a groove on the upper surface of the laminate on a line extending in the first direction in the contours of each of the plurality of semiconductor optical devices. It is characterized by including a step of forming a scribing scratch so as to be within the range of the length of the above, and a step of breaking the intermediate product with the scribing scratch for each of the plurality of semiconductor optical elements. do. According to the present invention, even if a crack is generated on the surface of the scribe wound, its progress is stopped in a groove deeper than the active layer, so that the influence on the active layer can be prevented.

(10) The method for manufacturing a semiconductor optical element according to (9), wherein the intermediate product may be characterized in a strip shape in which the plurality of semiconductor optical elements are arranged in a row in the second direction. ..

(11) The method for manufacturing a semiconductor optical device according to (9) or (10), wherein, before the step of preparing the intermediate product, a plurality of regions corresponding to the intermediate product are formed in the first. It may be characterized by further including a step of preparing semiconductor substrates having the semiconductor substrates arranged in one direction and a step of cutting out the intermediate product from the semiconductor substrate.

(12) The method for manufacturing a semiconductor optical device according to (11), wherein the semiconductor substrate has the groove so as to be continuous with the plurality of regions arranged in the first direction. good.

(13) In the method for manufacturing a semiconductor optical device according to (11) or (12), the step of cutting out the intermediate product from the semiconductor substrate is performed on both ends of the second direction on the upper surface of the semiconductor substrate. At least one of them may be characterized by including a step of forming a leading scribing scratch so as to extend in the second direction, and a step of breaking the semiconductor substrate with the leading scribing scratch.

(14) The method for manufacturing a semiconductor optical device according to (13), wherein in the step of cutting out the intermediate product from the semiconductor substrate, the preceding scribe scratch is formed on a line intersecting the groove extending in the first direction. In addition, it may be characterized in that it is formed so as not to reach the groove.

(15) The method for manufacturing a semiconductor optical device according to any one of (11) to (14), wherein each of a plurality of semiconductor optical elements corresponds to the semiconductor substrate before the step of preparing the semiconductor substrate. It may be characterized by further including a step of preparing a semiconductor wafer having regions arranged in the first direction and the second direction, and a step of cutting out the semiconductor substrate from the semiconductor wafer.

It is a perspective view of the semiconductor optical element which concerns on 1st Embodiment of this invention. It is a figure which shows the semiconductor wafer. It is a figure which shows the semiconductor substrate. It is a partially enlarged view which shows the detail of a semiconductor substrate. It is a figure which shows the intermediate product. It is a figure which shows the process of forming a reflective film. It is a figure which shows the process of forming a scribe scratch on an intermediate product. It is a perspective view of the semiconductor optical element which concerns on 2nd Embodiment of this invention. It is sectional drawing of the semiconductor optical element which concerns on 3rd Embodiment of this invention.

Hereinafter, embodiments of the present invention will be described in detail and in detail with reference to the drawings. In all the drawings for explaining the embodiment, the members having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted. It should be noted that the figures shown below merely explain the embodiments of the embodiments, and the sizes of the figures and the scales described in the present examples do not always match.

[First Embodiment]
FIG. 1 is a perspective view of a semiconductor optical device according to the first embodiment of the present invention. The semiconductor optical element 10 is a ridge waveguide type DFB laser (Distributed Feedback Laser), and includes a laminated body 12 composed of a plurality of semiconductor layers. The laminate 12 includes a passivation film 24 composed of an n-type InP substrate 14, an n-InP layer 16, a first semiconductor multilayer 18, a p-InGaAlAs layer 66, a p-InP layer 20, a p-InGaAs layer 22, and a SiO _{2 film.} These are laminated in the thickness direction. The first semiconductor multilayer 18 includes multiple quantum wells in a band of at least 1.3 μm or a band of 1.55 μm. The multiple quantum well is formed of InGaAlAs, InGaAsP, or a mixture of both. Further, the first semiconductor multilayer 18 may include a light confinement layer. Further, a first electrode 40 (for example, an anode) is formed on the upper surface of the laminated body 12.

The laminate 12 has a mesa stripe structure 26. The uppermost surface of the mesastrive structure 26 is a p-InGaAs layer 22. Recesses 30 are formed on both sides of the mesa stripe structure 26 in the width direction. The recess 30 has a two-step depth structure. The p-InP layer 20 and the p-InGaAs layer 22 are removed from the upper surface 28 of the laminate 12 on the shallow bottom side of the recess 30, and the p-InGaAlAs layer 66 is below the passivation film 24. On the deep side, the layer above the n-type InP substrate 14 is removed, and the passivation film 28 is on the n-type InP substrate 14. The first semiconductor multilayer 18, the p-InGaAlAs layer 66, and the n-InP layer 16 are separated by a groove on the deep side of the recess, and this region becomes the active layer 32. With this configuration, the active layer can be electrically and optically confined, and the effect of improving the characteristics can be obtained. Here, the active layer 32 is a region that emits light or absorbs light by injecting a current (applying a voltage). The active layer 32 extends in stripes in the first direction D1. The side surface of the mesa stripe structure 26 and the inner surface of the recess 30 are covered with the passivation film 24.

The first electrode 40 is in contact with the upper surface of the p-InGaAs layer 22 (contact layer 38) in the upper part of the mesa stripe structure 26. The first electrode 40 is also provided on the passivation film 24 on the side surface of the mesa stripe structure 26 and the bottom surface of the recess 30. The first electrode 40 extends from the mesa stripe structure 26 to a position beyond the recess 30 in the second direction D2 orthogonal to the first direction D1. The first electrode 40 covers the entire mesa stripe structure 26 and covers the entire inner surface of the recess 30. Adjacent to the recess 30, on both sides of the mesa stripe structure 26 in the second direction D2, the ends of the first electrodes 40 rest on the upper surface 28 of the laminate 12. On one side of the mesa stripe structure 26 to the second direction D2, the first electrode 40 has a pad portion 42. The pad portion 42 has a smaller width in the first direction D1 than the other portions of the first electrode 40. The pad portion 42 is electrically connected to the outside.

The upper surface 28 of the laminated body 12 has a groove 44 in addition to the recess 30. The groove 44 is separated from the active layer 32 in the second direction D2 orthogonal to the first direction D1 and extends in the first direction D1. Grooves 44 are provided on both sides of the active layer 32 in the second direction D2. The grooves 44 reach both ends of the upper surface 28 in the first direction D1 and open to the front surface 46 and the back surface 48 of the laminated body 12. The groove 44 is closer to the side surface 50 of the laminated body 12 than the active layer 32.

The groove 44 is formed of two regions, one having a depth from the upper surface 28 to the p-InGaAlAs layer 66 and the other having a depth reaching the n-InP layer 16. That is, it has a two-step depth structure similar to that of the recess 30. The deeper groove has an upper surface 28 depth D. The first semiconductor multilayer 18 is separated on both sides of the second direction D2 by a groove 44. That is, the first semiconductor multilayer 18 has a portion continuous from the side surface 50 of the laminated body 12 and a portion continuous from the groove on the deep side of the recess 30 toward the side surface 50, and a groove is formed between these portions. There are 44. Further, the groove 44 separates the n-InP layer 16, the first semiconductor multilayer 18, the p-InGaAlAs layer 66, the p-InP layer 20 and the p-InGaAs layer 22 at intervals, and separates them from these layers. A part of the upper surface of the n-type InP substrate 14 is exposed. The passivation film 24 resting on the end faces of these layers and the exposed upper surface of the n-type InP substrate 14 constitutes the inner surface of the groove 44. The first electrode 40 has an end portion between the active layer 32 and the groove 44. In the second direction D2, one end is a pad portion 42.

A second electrode 52 (for example, a cathode) is formed on the lower surface of the laminated body 12 (the surface opposite to the upper surface 28). By passing a current between the first electrode 40 and the second electrode 52, light is generated in the active layer 32, and light is emitted from the front surface 46 of the laminated body 12.

The front surface 46 of the laminate 12 is adjacent to the top surface 28 in the first direction D1. The back surface 48 of the laminate 12 is opposite to the front surface 46 and adjacent to the top surface 28. An antireflection film 54 and a reflection film 56 that reflect light are formed on the front surface 46 and the back surface 48, respectively. Specifically, an antireflection film 54 having a reflectance of 1% or less is formed on the front surface 46, and a reflection film 56 having a reflectance of 90% or more is formed on the back surface 48, whereby a resonator is formed.

The side surface 50 of the laminate 12 is adjacent to the top surface 28 in the second direction D2. There are side surfaces 50 on both sides of the upper surface 28 in the second direction D2. The side surface 50 has a rough surface region 58. The rough surface region 58 is formed by a scribe step described later, and is rougher than the other regions of the side surface 50. The rough surface region 58 is adjacent to the upper surface 28. The rough surface region 58 is formed so as to avoid both ends of the side surface 50 in the first direction D1. The groove 44 is adjacent to the entire width W that the rough surface region 58 has in the first direction D1, and in this example, has a length L that exceeds the width.

According to the present embodiment, even if a crack occurs in the rough surface region 58, its progress is stopped in the groove 44 deeper than the active layer 32, so that the influence on the active layer 32 can be prevented.

[Production method]
2 to 7 are diagrams for explaining a method for manufacturing the semiconductor optical device 10 according to the first embodiment of the present invention.

As shown in FIG. 2, the semiconductor wafer 60 is prepared. A plurality of semiconductor optical elements 10 are built in the semiconductor wafer 60. That is, the semiconductor wafer 60 is an aggregate of a plurality of semiconductor optical elements 10, and is cut into the plurality of semiconductor optical elements 10 in a later step. The structure of the semiconductor optical device 10 is as described above with reference to FIG.

In the process of forming the laminate 12 composed of a plurality of semiconductor layers, the n-InP layer 16, the first semiconductor multilayer 18, the p-InGaAlAs layer 66, are formed on the n-type InP substrate 14 by MOCVD (metalorganic vapor phase growth method). The p-InP layer 20 and the p-InGaAs layer 22 are formed. A diffraction grating (not shown) for oscillating light having a specific wavelength is formed between the first semiconductor multilayer 18 and the p-InP layer 20.

A mask is applied to the areas other than the recesses 30 and the grooves 44, and the upper part of the p-InGaAlAs layer 66 is removed by dry etching. This forms a shallow depth region of the recess 30 and the groove 44. Further, masking other than the inside of the recess 30 and the groove 44, and removing up to the n-InP layer 16 by wet etching. This forms a deep region of the recess 30 and the groove 44. That is, the process of forming the groove 44 can be performed at the same time as the process of forming the recess 30, and it is not necessary to increase the number of steps. Then, the passivation film 24 is formed, and the first electrode 40 and the second electrode 52 are formed by a vapor deposition method. The etching when forming the groove 44 may be only dry etching or only wet etching, or both may be used in combination. The recess 30 and the groove 44 may be created in different steps, or the groove 44 may have a depth of one step.

The semiconductor wafer 60 has a plurality of regions R1 (semiconductor substrate 62 shown in FIG. 3) so as to be arranged in the first direction D1 and the second direction D2. As shown in FIG. 3, the semiconductor substrate 62 is prepared by cutting the semiconductor wafer 60 corresponding to each of the plurality of regions R1 and cutting out the plurality of semiconductor substrates 62.

FIG. 4 is a partially enlarged view showing the details of the semiconductor substrate 62. The semiconductor substrate 62 has a plurality of regions R2 (intermediate product 64 shown in FIG. 5) so as to be arranged in the first direction D1. The semiconductor substrate 62 has a groove 44. The groove 44 is continuous with a plurality of regions R2 arranged in the first direction D1.

The semiconductor substrate 62 is cut corresponding to each of the plurality of regions R2. Specifically, on the upper surface 28 of the semiconductor substrate 62, a leading scribe scratch SC1 is formed on at least one of both ends of the second direction D2 by a laser or a diamond cutter so as to extend in the second direction D2. The leading scribe scratch SC1 is formed on a line intersecting the groove 44 extending in the first direction D1 so as not to reach the groove 44.

Then, the semiconductor substrate 62 is broken by the preceding scribe scratch SC1. By cutting out the intermediate product 64 from the semiconductor substrate 62 in this way, the intermediate product 64 is prepared as shown in FIG. A plurality of semiconductor optical elements 10 are built in the intermediate product 64. The intermediate product 64 includes a laminated body 12 composed of a plurality of laminated semiconductor layers (see FIG. 1). The intermediate product 64 is in the shape of a strip in which a plurality of semiconductor optical elements 10 are arranged in a row in the second direction D2. The intermediate product 64 continuously has the front surface 46 of the plurality of laminates 12, and continuously has the back surface 48 of the plurality of laminates 12.

As shown in FIG. 6, the antireflection film 54 and the reflection film 56 are formed on the front surface 46 and the back surface 48 of the laminated body 12, respectively. Specifically, the antireflection film 54 is continuously provided on the front surface 46 of the plurality of laminated bodies 12, and the reflective film 56 is continuously provided on the back surface 48 of the plurality of laminated bodies 12.

As shown in FIG. 7, a scribe scratch SC2 is formed on the intermediate product 64. The scribe scratch SC2 is formed on the upper surface 28 of the laminated body 12. The scribe scratch SC2 is formed so as to be within the range of the length L of the groove 44 on the line extending in the first direction D1 in the contour of each semiconductor optical element 10. Then, the intermediate product 64 is broken by the scribe scratch SC2 for each of the plurality of semiconductor optical elements 10. When forming the scribe scratch SC2, the rough surface region 58 shown in FIG. 1 is formed.

According to the present embodiment, even if a crack occurs on the surface of the scribe wound SC2, its progress is stopped in the groove 44 deeper than the active layer 32, so that the influence on the active layer 32 can be prevented. The groove 44 may have a depth exceeding the active layer 32 (first semiconductor layer 18) and may extend to the n-InP layer 16.

[Second Embodiment]
FIG. 8 is a perspective view of the semiconductor optical device according to the second embodiment of the present invention. In the present embodiment, the laminate 212 includes a passivation film 224 composed of an n-type InP substrate 214, an n-InP layer 216, a first semiconductor multilayer 218, a p-InP layer 220, a p-InGaAs layer 222, and a SiO _{2 film.} , These are laminated in the thickness direction. This embodiment is different from the first embodiment in that the p-InGaAlAs layer 66 is not interposed between the first semiconductor multilayer 218 and the p-InP layer 220.

In the process of forming the grooves 244 and the recesses 230, after laminating the n-InP layer 216, the first semiconductor multilayer 218, the p-InP layer 220, and the p-InGaAs layer 222, the regions other than the grooves 244 and the recesses 230 are masked. , Dry etching and / and wet etching are used to remove the region up to the middle of the n-InP layer 216. After that, a passivation film 224 is formed.

The difference from the first embodiment is that the groove 244 does not have a two-step depth structure, but the deepest part is deeper than the active layer 232 when viewed from the upper surface 228, and the crack is formed. The effect can be prevented. The other contents correspond to the contents described in the first embodiment, and the side surface 250 has a rough surface region 258.

[Third Embodiment]
FIG. 9 is a cross-sectional view of the semiconductor optical device according to the third embodiment of the present invention. In the present embodiment, on the n-type InP substrate 314, an n-InP layer 316, an active layer 332 including a multiple quantum well made of InGaAlAs, an upper clad layer 336 made of p-InP, and a contact layer 338 made of p-InGaAs. Are laminated. The n-InP layer 316 has a convex portion 368 as a lower clad layer 334. The lower clad layer 334, the active layer 332, the upper clad layer 336 and the contact layer 338 form a mesa stripe structure 326.

Embedded layers 370 are provided on both sides of the convex portion 368 of the n-InP layer 316 so as to be adjacent to the mesa stripe structure 326 in the second direction D2. Therefore, this embodiment is different from the first and second embodiments in that it does not have a recess.

_{A passivation film 324 made of a SiO 2} film is provided on the embedded layer 370, and a first electrode 340 is provided on the passivation film 324. Further, a second electrode 352 is provided on the lower surface of the n-type InP substrate 314.

Also in this embodiment, the groove 344 is formed on the upper surface 328 of the laminated body 312. The groove 344 separates the embedded layer 370 and the n-InP layer 316. The groove 344 reaches the n-type InP substrate 314. That is, the bottom surface of the groove 344 is formed of the surface of the n-type InP substrate 314, and a recess is formed in the n-type InP substrate 314. The other contents correspond to the contents described in the first embodiment, and the side surface 350 has a rough surface region 358.

The present invention is not limited to the above-described embodiment, and various modifications are possible. For example, the configurations described in the embodiments can be replaced with substantially the same configuration, a configuration that exhibits the same action and effect, or a configuration that can achieve the same purpose.

10 semiconductor optical element, 12 laminate, 14 n-type InP substrate, 16 n-InP layer, 18 first semiconductor multilayer, 20 p-InP layer, 22 p-InGaAs layer, 24 passionation film, 26 mesa stripe structure, 28 top surface , 30 concave, 32 active layer, 38 contact layer, 40 first electrode, 42 pad part, 44 groove, 46 front surface, 48 back surface, 50 side surface, 52 second electrode, 54 antireflection film, 56 reflection film, 58 rough surface Region, 60 semiconductor wafers, 62 semiconductor substrates, 64 intermediate products, 66 p-InGaAlAs layers, 212 laminates, 214 n-type InP substrates, 216 n-InP layers, 218 first semiconductor multilayers, 220 p-InP layers, 222 p. -InGaAs layer, 224 passion film, 228 top surface, 230 recesses, 232 active layers, 244 grooves, 250 side surfaces, 258 rough surface areas, 312 laminates, 314 n-type InP substrate, 316 n-InP layer, 324 passion film, 326 Mesa stripe structure, 328 upper surface, 332 active layer, 334 lower clad layer, 336 upper clad layer, 338 contact layer, 340 first electrode, 344 groove, 350 side surface, 352 second electrode, 358 rough surface region, 368 convex part, 370 Embedded layer, D depth, D1 first direction, D2 second direction, L length, R1 region, R2 region, SC1 leading scribing scratch, SC2 scribing scratch, W width.

Claims (16)

A laminate composed of a plurality of semiconductor layers laminated so as to include an active layer extending in a stripe shape in a first direction is included.
The laminated body is
An upper surface having a groove extending in the first direction away from the active layer in the second direction orthogonal to the first direction, and
A side surface adjacent to the upper surface in the second direction,
Have,
The side surface has a rough surface region adjacent to the upper surface, which is rougher than the other regions of the side surface.
The groove is adjacent to the entire width of the rough surface region in the first direction, has a depth exceeding the lower surface of the active layer in a two-step depth structure, and has a side surface of the active layer more than the active layer. A semiconductor optical device characterized by being close to. The semiconductor optical device according to claim 1.
The semiconductor optical device is characterized in that the rough surface region is formed so as to avoid both ends of the side surface in the first direction. The semiconductor optical device according to claim 1 or 2.
The laminate has a front surface adjacent to the upper surface in the first direction and a back surface adjacent to the upper surface on the side opposite to the front surface.
A semiconductor optical device characterized in that the groove reaches both ends of the upper surface in the first direction and opens to the front surface and the back surface. The semiconductor optical device according to any one of claims 1 to 3.
Further having an electrode provided on the upper surface so as to overlap the active layer,
The electrode is a semiconductor optical device having an end portion between the active layer and the groove. The semiconductor optical device according to any one of claims 1 to 4.
The laminated body has a mesa stripe structure including the active layer, and has a mesa stripe structure.
A semiconductor optical device characterized in that the upper surface constitutes the surface of the mesa stripe structure and has a recess adjacent to the mesa stripe structure. The semiconductor optical device according to any one of claims 1 to 4.
The semiconductor optical device is characterized by having a mesa-stripe structure including the active layer and an embedded layer adjacent to the mesa-stripe structure in the second direction. The semiconductor optical device according to any one of claims 1 to 6.
A semiconductor optical device having the grooves on both sides of the active layer in the second direction. The semiconductor optical device according to any one of claims 1 to 7.
A semiconductor optical device characterized in that the side surfaces are provided on both sides of the upper surface in the second direction. A laminate comprising a plurality of semiconductor layers laminated so that a plurality of semiconductor optical elements are built and each of the plurality of semiconductor optical elements includes an active layer extending in a stripe shape in a first direction is included. A groove extending in the first direction away from the active layer in a second direction orthogonal to one direction is provided on the upper surface of the laminated body, and the groove has a two-step depth structure on the lower surface of the active layer. The process of preparing an intermediate product with a depth exceeding that,
A step of forming a scribe scratch on the upper surface of the laminate so as to be within the range of the length of the groove on a line extending in the first direction in the contour of each of the plurality of semiconductor optical elements.
A step of breaking the intermediate product with the scribe scratches for each of the plurality of semiconductor optical elements.
A method for manufacturing a semiconductor optical device, which comprises. The method for manufacturing a semiconductor optical device according to claim 9.
The intermediate product is a method for manufacturing a semiconductor optical element, characterized in that the plurality of semiconductor optical elements are arranged in a row in a strip shape in the second direction. The method for manufacturing a semiconductor optical device according to claim 9 or 10.
Before the process of preparing the intermediate product,
A step of preparing a semiconductor substrate having a plurality of regions corresponding to the intermediate products so as to be arranged in the first direction.
The process of cutting out the intermediate product from the semiconductor substrate and
A method for manufacturing a semiconductor optical device, which further comprises. The method for manufacturing a semiconductor optical device according to claim 11.
A method for manufacturing a semiconductor optical device, wherein the semiconductor substrate has the grooves so as to be continuous with the plurality of regions arranged in the first direction. The method for manufacturing a semiconductor optical device according to claim 11 or 12.
The process of cutting out the intermediate product from the semiconductor substrate is
A step of forming a preceding scribe scratch so as to extend in the second direction on at least one of both ends in the second direction on the upper surface of the semiconductor substrate.
The process of breaking the semiconductor substrate with the preceding scribe scratch and
A method for manufacturing a semiconductor optical device, which comprises. The method for manufacturing a semiconductor optical device according to claim 13.
A semiconductor optical device characterized in that, in a step of cutting out the intermediate product from the semiconductor substrate, the preceding scribe scratch is formed on a line intersecting the groove extending in the first direction so as not to reach the groove. Production method. The method for manufacturing a semiconductor optical device according to any one of claims 11 to 14.
Before the process of preparing the semiconductor substrate,
A step of preparing a semiconductor wafer having a plurality of regions corresponding to the semiconductor substrate so as to be arranged in the first direction and the second direction.
The process of cutting out the semiconductor substrate from the semiconductor wafer and
A method for manufacturing a semiconductor optical device, which further comprises. The method for manufacturing a semiconductor optical device according to any one of claims 9 to 15.
The laminated body has a mesa stripe structure including the active layer, and has a mesa stripe structure.
The upper surface of the laminate constitutes the surface of the mesa stripe structure and has a recess adjacent to the mesa stripe structure.
A method for manufacturing a semiconductor optical device, which comprises performing the process of forming the groove at the same time as the process of forming the recess.

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