JP6936774B2 - Wiring board and its manufacturing method - Google Patents

Wiring board and its manufacturing method Download PDF

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JP6936774B2
JP6936774B2 JP2018132838A JP2018132838A JP6936774B2 JP 6936774 B2 JP6936774 B2 JP 6936774B2 JP 2018132838 A JP2018132838 A JP 2018132838A JP 2018132838 A JP2018132838 A JP 2018132838A JP 6936774 B2 JP6936774 B2 JP 6936774B2
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electrode pad
external connection
connection terminal
wiring board
hole
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JP2020013805A (en
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秀哉 水野
秀哉 水野
敏徳 肥田
敏徳 肥田
一範 福永
一範 福永
憲 溝口
憲 溝口
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NGK Spark Plug Co Ltd
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Description

本発明は、絶縁材からなる基板本体の表面に設けられた電子部品実装用の電極パッド、前記基板本体の裏面に設けられた外部接続端子、および前記電極パッドと前記外部接続端子との間を接続する貫通導体を有し、実装性および放熱性に優れた配線基板、およびその製造方法に関する。 In the present invention, an electrode pad for mounting an electronic component provided on the surface of a substrate body made of an insulating material, an external connection terminal provided on the back surface of the substrate body, and between the electrode pad and the external connection terminal. The present invention relates to a wiring board having a through conductor to be connected and having excellent mountability and heat dissipation, and a method for manufacturing the same.

例えば、絶縁基体における一方の主面に位置する一対の搭載部と重なる表面を有する一対の接続電極が、前記表面を除いて前記絶縁基体に埋め込まれ、該絶縁基体における他方の主面に形成された外部接続端子と電気的に接続されていると共に、上記一対の接続電極の側面は、上記絶縁基体内で互いに対向し、且つ該側面同士間の間隔が一方の主面よりも他方の主面の方が大きくなる傾斜あるいは湾曲している半導体素子搭載用基板が提案されている(例えば、特許文献1参照)。
上記半導体素子搭載用基板によれば、上記一対の接続電極が、上記表面(搭載部)を除いて上記絶縁基体に埋め込まれているので、上記搭載部の上方に搭載する半導体素子から発生する熱の放熱性が向上し、且つ上記絶縁基体にクラック等が発生するのを抑制できる。
For example, a pair of connecting electrodes having a surface overlapping a pair of mounting portions located on one main surface of the insulating substrate are embedded in the insulating substrate except for the surface and formed on the other main surface of the insulating substrate. The side surfaces of the pair of connection electrodes are electrically connected to each other in the insulating substrate, and the distance between the side surfaces is larger than that of one main surface. A substrate for mounting a semiconductor element having a larger inclination or curvature has been proposed (see, for example, Patent Document 1).
According to the semiconductor element mounting substrate, since the pair of connection electrodes are embedded in the insulating substrate except for the surface (mounting portion), heat generated from the semiconductor element mounted above the mounting portion is generated. The heat dissipation property of the above can be improved, and the occurrence of cracks or the like in the insulating substrate can be suppressed.

しかし、前記一対の接続電極のように、半導体素子を搭載するために、広い面積の搭載部を電解金属メッキにより形成する場合、該搭載面となる表面の中央側に前記絶縁基体側に窪んだ凹部が生じる場合には、搭載すべき半導体素子との電気的接続が不安定になり得る。また、上記絶縁基体における一対の主面間を貫通する比較的太径のビア導体(スルーホール導体)を電解金属メッキによって形成した場合にも、該ビア導体の両端面の中央側に上記同様の凹部が生じ易くなる。
更に、上記一対の接続電極をそれらの表面を除いて上記絶縁基体に埋め込む構造とした場合、該絶縁基体の厚みが過度に厚くなり得る、という問題もあった。
However, when a mounting portion having a large area is formed by electrolytic metal plating in order to mount a semiconductor element like the pair of connecting electrodes, the mounting portion is recessed toward the insulating substrate on the center side of the surface to be the mounting surface. When a recess is formed, the electrical connection with the semiconductor element to be mounted may become unstable. Further, even when a relatively large-diameter via conductor (through-hole conductor) penetrating between the pair of main surfaces of the insulating substrate is formed by electrolytic metal plating, the same applies to the center side of both end surfaces of the via conductor. Recesses are likely to occur.
Further, when the pair of connection electrodes are embedded in the insulating substrate except for their surfaces, there is a problem that the thickness of the insulating substrate may become excessively thick.

特開2015−50259号公報(第1〜11頁、図1〜4)Japanese Unexamined Patent Publication No. 2015-50259 (pages 1 to 11, FIGS. 1 to 4)

本発明は、背景技術で説明した問題点を解決し、配線基板全体の厚みを増加させず、絶縁材からなる基板本体の表面に実装性に優れた電極パッドを有し、且つ前記基板本体を貫通する貫通導体および裏面側に設ける外部接続端子により放熱性にも優れた配線基板、およびその製造方法を提供する、ことを課題とする。 The present invention solves the problems described in the background art, does not increase the thickness of the entire wiring board, has an electrode pad having excellent mountability on the surface of the substrate body made of an insulating material, and provides the substrate body. An object of the present invention is to provide a wiring board having excellent heat dissipation by means of a penetrating conductor and an external connection terminal provided on the back surface side, and a method for manufacturing the same.

課題を解決するための手段および発明の効果Means for Solving Problems and Effects of Invention

本発明は、前記課題を解決するため、電解金属メッキによって基板本体を貫通する貫通導体を形成するに際し、その該両端側に形成される表面側の電極パッドと裏面側の外部接続端子との間における平面視の面積等と、それらの表面に生じる凹部の面積や深さとを一定の関係にする、ことに着想して成されたものである。
即ち、本発明の配線基板(請求項1)は、絶縁材からなり、且つ対向する表面および裏面を有する基板本体と、該基板本体の表面と裏面との間を貫通する貫通孔と、該貫通孔内に形成された貫通導体と、上記基板本体の表面における上記貫通孔の開口部を囲む位置に形成された電極パッドと、上記基板本体の裏面における上記貫通孔の開口部を囲む位置に形成された外部接続端子と、を備えた配線基板であって、平面視で上記電極パッドの面積は、上記外部接続端子の面積よりも小さく、且つ前記電極パッドの厚みは、前記外部接続端子の厚みよりも大であると共に、前記電極パッドおよび前記外部接続端子の表面には、凹部が個別に形成されており、前記電極パッドの表面に位置する凹部の深さは、前記外部接続端子の表面に位置する凹部の深さよりも浅い、ことを特徴とする。
In order to solve the above problems, the present invention solves the above problems by forming a through conductor penetrating a substrate body by electrolytic metal plating, between the electrode pads on the front surface side and the external connection terminals on the back surface side formed on both end sides thereof. It was conceived to make a certain relationship between the area in the plan view and the area and depth of the recesses formed on their surfaces.
That is, the wiring board (claim 1) of the present invention is made of an insulating material and has a front surface and a back surface facing each other, a through hole penetrating between the front surface and the back surface of the substrate body, and the penetration. A through conductor formed in the hole, an electrode pad formed at a position surrounding the opening of the through hole on the surface of the substrate body, and a position surrounding the opening of the through hole on the back surface of the substrate body. The area of the electrode pad is smaller than the area of the external connection terminal in a plan view, and the thickness of the electrode pad is the thickness of the external connection terminal. In addition to being larger than, recesses are individually formed on the surfaces of the electrode pad and the external connection terminal, and the depth of the recess located on the surface of the electrode pad is set on the surface of the external connection terminal. It is characterized by being shallower than the depth of the recess in which it is located.

前記配線基板によれば、以下の効果(1)〜(4)を得ることが可能である。
(1)前記電極パッドは、平面視における面積を前記外部接続端子の面積よりも小さく、且つ該ッドの厚みを外部接続端子の厚みよりも大きくしたので、製造時の電解金属メッキの際に形成され且つ該電極パッドの表面に位置する凹部の深さが、上記外部接続端子の表面に位置する凹部の深さよりも浅くなっている。従って、該電極パッドの表面における平坦度を向上させることができるので、該表面の上方に、追ってハンダを介して電子部品を電気的に良好に実装することが可能となる。
(2)前記外部接続端子は、平面視での面積を前記電極パッドの面積よりも大きく、且つその厚みを前記電極パッドの厚みよりも小さくしたので、製造時の電解金属メッキの際に形成される該外部接続端子の表面に位置する凹部の深さを上記電極パッドの表面に位置する凹部の深さよりも深くなっている。その結果、本配線基板自体をプリント基板などのマザーボードに追って実装する際に、前記凹部により外部接続端子の表面が広い面積を有するため、接合用のハンダとの接触面積を増やすことができる。従って、本配線基板をプリント基板などに強固に実装することが可能となる。
(3)前記電極パッドの厚みを厚くし且つ外部接続端子の厚みを薄くしているので、これらと前記基板本体とを含む本配線基板全体の厚みの増加を抑制できる。
(4)前記電極パッドの表面上に追って実装される電子部品から発生する熱を、厚みが大きい前記電極パッド、該電極パッドに隣接する前記貫通導体、および該貫通導体に隣接する前記外部接続端子を介して、前記基板本体内部の絶縁材側や、該基板本体の裏面側から外部へ、迅速且つ効果的に放熱することが可能となる。
According to the wiring board, the following effects (1) to (4) can be obtained.
(1) the electrode pad, reduce the area in plan view than the area of the external connection terminals, and since the thickness of the Pas head larger than the thickness of the external connection terminals, during the electrolytic metal plating at the time of manufacture The depth of the recess formed on the surface of the electrode pad and located on the surface of the electrode pad is shallower than the depth of the recess located on the surface of the external connection terminal. Therefore, since the flatness on the surface of the electrode pad can be improved, it becomes possible to electrically satisfactorily mount the electronic component on the surface above the surface via solder.
(2) The external connection terminal is formed at the time of electrolytic metal plating at the time of manufacturing because the area in a plan view is larger than the area of the electrode pad and the thickness thereof is smaller than the thickness of the electrode pad. The depth of the recess located on the surface of the external connection terminal is deeper than the depth of the recess located on the surface of the electrode pad. As a result, when the wiring board itself is mounted on a motherboard such as a printed circuit board, the surface of the external connection terminal has a large area due to the recesses, so that the contact area with the solder for joining can be increased. Therefore, this wiring board can be firmly mounted on a printed circuit board or the like.
(3) Since the thickness of the electrode pad is increased and the thickness of the external connection terminal is reduced, it is possible to suppress an increase in the thickness of the entire wiring board including these and the substrate main body.
(4) The heat generated from the electronic component mounted on the surface of the electrode pad is transferred to the electrode pad having a large thickness, the through conductor adjacent to the electrode pad, and the external connection terminal adjacent to the through conductor. It is possible to quickly and effectively dissipate heat from the insulating material side inside the substrate body and the back surface side of the substrate body to the outside.

尚、前記絶縁材は、単層または複数層のセラミック層や樹脂層、またはセラミック層と樹脂層との積層体からなる。複数層のセラミック層や樹脂層または前記積層体からなる形態では、これらの層間に内層配線が形成されていても良く、該内層配線の一部は、前記貫通孔の内壁面で前記貫通導体と接続していても良い。
また、前記貫通孔の軸方向と直交する方向の断面形状と、平面視における前記電極パッドおよび外部接続端子の形状とは、円形状や、矩形(正方形または長方形)状などを呈する。
更に、前記電極パッド、外部接続端子、および貫通導体は、主に銅または銀からなり、何れも複数個が前記基板本体において形成される。
また、前記凹部は、平面視が円形状で且つ側面視が円弧形状である。
加えて、前記電極パッドの表面上に追って実装される電子部品には、例えば、発光ダイオード(以下、単にLEDと略記する)やパワー半導体が例示される。
The insulating material is composed of a single-layer or a plurality of layers of a ceramic layer or a resin layer, or a laminate of a ceramic layer and a resin layer. In the form of a plurality of ceramic layers, resin layers, or the laminated body, inner layer wiring may be formed between these layers, and a part of the inner layer wiring may be formed on the inner wall surface of the through hole with the through conductor. It may be connected.
Further, the cross-sectional shape in the direction orthogonal to the axial direction of the through hole and the shape of the electrode pad and the external connection terminal in a plan view are circular, rectangular (square or rectangular), or the like.
Further, the electrode pad, the external connection terminal, and the through conductor are mainly made of copper or silver, and a plurality of all of them are formed in the substrate main body.
Further, the recess has a circular shape in a plan view and an arc shape in a side view.
In addition, examples of electronic components mounted on the surface of the electrode pad include a light emitting diode (hereinafter, simply abbreviated as LED) and a power semiconductor.

また、本発明には、平面視において、前記電極パッドの表面に位置する凹部の面積は、前記外部接続端子の表面に位置する凹部の面積よりも小さい、配線基板(請求項2)も含まれる。
これによれば、前記電極パッドの表面に位置する凹部は、平面視の面積が前記外部接続端子の表面に位置する凹部の面積よりも小さく、且つ前記のように、該凹部の深さが上記外部接続端子側の凹部の深さよりも浅いため、上記電極パッドの表面における平坦性が確保されるので、前記効果(1)を一層確実に得られる。
The present invention also includes a wiring board (claim 2) in which the area of the recess located on the surface of the electrode pad is smaller than the area of the recess located on the surface of the external connection terminal in a plan view. ..
According to this, the area of the recess located on the surface of the electrode pad is smaller than the area of the recess located on the surface of the external connection terminal, and the depth of the recess is as described above. Since it is shallower than the depth of the recess on the external connection terminal side, the flatness on the surface of the electrode pad is ensured, so that the effect (1) can be obtained more reliably.

更に、本発明には、前記貫通導体、前記電極パッド、および前記外部接続端子は、一体の金属から構成されているか、あるいは、互いに異なる金属部分から構成されている、配線基板(請求項3)も含まれる。
上記のうち、上記貫通導体、電極パッド、および外部接続端子が、一体の金属から構成されている形態によれば、前記効果(4)を顕著に得ることができる。
尚、前記貫通導体、前記電極パッド、および前記外部接続端子が、一体の銅または銀(金属)から構成されている場合、上記貫通導体は、通電用のビア導体と放熱ビアとを兼ねている。
また、前記形態のうち、上記貫通導体、電極パッド、および外部接続端子が、互いに異なる金属部分により構成されている形態にした場合には、各部位ごとに熱伝導率や熱膨張率など、各金属の特性を考慮して、上記貫通導体、電極パッド、および外部接続端子を形成することができる。
Further, in the present invention, the through conductor, the electrode pad, and the external connection terminal are made of an integral metal or different metal parts from each other, that is, a wiring board (claim 3). Is also included.
Among the above, according to the form in which the through conductor, the electrode pad, and the external connection terminal are made of an integral metal, the effect (4) can be remarkably obtained.
When the through conductor, the electrode pad, and the external connection terminal are made of one piece of copper or silver (metal), the through conductor also serves as a via conductor for energization and a heat radiation via. ..
Further, in the above-mentioned form, when the through conductor, the electrode pad, and the external connection terminal are formed of different metal parts, the thermal conductivity, the thermal expansion rate, and the like are set for each part. The through conductor, the electrode pad, and the external connection terminal can be formed in consideration of the characteristics of the metal.

加えて、本発明には、前記貫通孔の内壁面と前記貫通導体の外周面との間、前記基板本体の表面と前記電極パッドの底面との間、および、前記基板本体の裏面と前記外部接続端子の底面との間には、メタライズ層が形成されている、配線基板(請求項4)も含まれる。
これによれば、本配線基板の製造時における電解金属メッキにおいて、前記貫通導体、電極パッド、および外部接続端子を一体で緻密な金属からなるものに形成できるので、前記効果(4)をより確実に得ることが可能となる。
尚、前記メタライズ層や前記内層配線は、前記絶縁材や絶縁板がアルミナなどの高温同時焼成セラミックである場合には、タングステン(以下、単にWと略記する)またはモリブデン(以下、単にMoと略記する)からなり、ガラス−セラミックや樹脂である場合には、銅(Cu)または銀(Ag)からなる。
In addition, in the present invention, between the inner wall surface of the through hole and the outer peripheral surface of the through conductor, between the surface of the substrate body and the bottom surface of the electrode pad, and between the back surface of the substrate body and the outside. A wiring board (claim 4) in which a metallized layer is formed is also included between the bottom surface of the connection terminal and the bottom surface of the connection terminal.
According to this, in the electrolytic metal plating at the time of manufacturing the main wiring board, the through conductor, the electrode pad, and the external connection terminal can be integrally formed of a dense metal, so that the effect (4) is more reliable. It becomes possible to obtain.
When the insulating material or the insulating plate is a high-temperature simultaneous firing ceramic such as alumina, the metallized layer and the inner layer wiring are either tungsten (hereinafter, simply abbreviated as W) or molybdenum (hereinafter, simply abbreviated as Mo). In the case of glass-ceramic or resin, it is composed of copper (Cu) or silver (Ag).

一方、本発明による配線基板の製造方法(請求項5)は、絶縁材からなり、且つ対向する表面および裏面を有する基板本体と、該基板本体の表面と裏面との間を貫通する貫通孔と、該貫通孔内に形成された貫通導体と、上記基板本体の表面における上記貫通孔の開口部を囲む位置に形成された電極パッドと、上記基板本体の裏面における上記貫通孔の開口部を囲む位置に形成された外部接続端子と、を備えた配線基板の製造方法であって、対向する表面および裏面を有する絶縁板に打ち抜き加工またはレーザー加工を施し、前記表面と裏面との間を貫通する貫通孔を形成する貫通孔の形成工程と、上記絶縁板の貫通孔の内壁面と、前記絶縁板の表面および裏面における前記貫通孔の両端側の開口部を囲む位置ごとに亘って、メタライズ層を形成するメタライズ層の形成工程と、上記絶縁板の表面および裏面に配置され、且つ上記貫通孔の開口部ごとを囲む空間を有する表面側レジスト層と、裏面側レジスト層とを形成するレジスト層の形成工程と、上記貫通孔の内壁面に形成された筒形メタライズ層の内側面と、表面側レジスト層および裏面側レジスト層の上記各空間内の底面に位置する表面側メタライズ層および裏面側メタライズ層の上面に対し、電解金属メッキを同時に施して、上記貫通導体、上記電極パッド、および上記外部接続端子を形成するメッキ工程と、を含み、前記メッキ工程において、上記電極パッドおよび上記外部接続端子は、該電極パッドの表面に位置する凹部の深さが、該外部接続端子の表面に位置する凹部の深さよりも浅くなるように形成される、ことを特徴とする。
On the other hand, manufacturing method of the wiring substrate according to the present invention (claim 5) is made of insulation material, and faces the substrate main body having a front surface and a back surface to a through hole penetrating between the surface and the back surface of the substrate body The through conductor formed in the through hole, the electrode pad formed at a position surrounding the opening of the through hole on the surface of the substrate body, and the opening of the through hole on the back surface of the substrate body. A method of manufacturing a wiring board including an external connection terminal formed at a surrounding position, in which an insulating plate having an opposing front surface and a back surface is punched or laser processed to penetrate between the front surface and the back surface. Metallize the steps of forming the through hole to form the through hole, the inner wall surface of the through hole of the insulating plate, and the positions surrounding the openings on both ends of the through hole on the front surface and the back surface of the insulating plate. A step of forming a metallized layer for forming a layer, a resist layer arranged on the front surface and the back surface of the insulating plate and having a space surrounding each opening of the through hole, and a resist forming a back surface side resist layer. and formation of the layer process, the inner surface of the cylindrical metallized layer formed on the inner wall surface of the through-hole, the surface-side resist layer and the back-side resist layer front side metallization layer you position the bottom surface of the in each space And the upper surface of the back surface side metallized layer is simultaneously subjected to electrolytic metal plating to form the through conductor, the electrode pad, and the external connection terminal, and the plating step includes the electrode pad and the electrode pad. The external connection terminal is characterized in that the depth of the recess located on the surface of the electrode pad is formed to be shallower than the depth of the recess located on the surface of the external connection terminal.

前記配線基板の製造方法によれば、以下の効果(5),(6)を奏し得る。
(5)前記レジスト層の形成工程および前記メッキ工程を併有しているので、前記電極パッドの表面に位置する凹部の深さが、前記外部接続端子の表面に位置する凹部の深さよりも浅い前記配線基板を確実に製造することができる。
(6)前記効果(1)〜(4)に加えて、更に上記効果(5)を奏し得る前記配線基板を確実に製造することができる。
According to the method for manufacturing a wiring board, the following effects (5) and (6) can be obtained.
(5) Since the resist layer forming step and the plating step are combined, the depth of the recess located on the surface of the electrode pad is shallower than the depth of the recess located on the surface of the external connection terminal. The wiring board can be reliably manufactured.
(6) In addition to the effects (1) to (4), the wiring board capable of further exerting the effect (5) can be reliably manufactured.

尚、前記絶縁板は、単層または複層のグリーンシート、またはこれを焼成したセラミック層、単層または複層の樹脂層、あるいは、セラミック層と樹脂層との複合積層体からなる。
また、前記レジスト層は、感光性の樹脂を塗布することにより樹脂層を形成する方法の他、感光性の樹脂フィルムを貼り付ける方法で形成しても良い。
更に、前記表面側レジスト層の厚みは、前記裏面側レジスト層の厚みよりも大とされ、両者の厚みは、前記電極パッドと外部接続端子との厚みに連動している。
また、電解金属メッキは、主に前記電解銅メッキあるいは前記電解銀メッキが用いられる。
加えて、前記配線基板の製造方法は、多数個取りの形態により行っても良い。
The insulating plate is composed of a single-layer or multi-layer green sheet, a ceramic layer obtained by firing the insulating plate, a single-layer or multi-layer resin layer, or a composite laminate of a ceramic layer and a resin layer.
Further, the resist layer may be formed by a method of forming a resin layer by applying a photosensitive resin or a method of attaching a photosensitive resin film.
Further, the thickness of the front surface side resist layer is made larger than the thickness of the back surface side resist layer, and the thickness of both is linked to the thickness of the electrode pad and the external connection terminal.
Further, as the electrolytic metal plating, the electrolytic copper plating or the electrolytic silver plating is mainly used.
In addition, the method for manufacturing the wiring board may be performed in the form of a large number of pieces.

また、本発明には、前記レジスト層の形成工程において、前記表面側レジスト層の平面視における前記空間の面積は、前記裏面側レジスト層の平面視における前記空間の面積よりも小さい、配線基板の製造方法(請求項6)も含まれる。
これによれば、前記メッキ工程において、前記表面側レジスト層における前記空間内に形成される前記電極パッドの平面視での面積を、前記裏面側レジスト層における前記空間内に形成される前記外部接続端子の面積よりも小さくできるので、前記効果(2)を奏する配線基板をより確実に製造できることに関連して、前記効果(6)を得ることができる。
Further, in the present invention, in the step of forming the resist layer, the area of the space in the plan view of the front surface side resist layer is smaller than the area of the space in the plan view of the back surface side resist layer. The manufacturing method (claim 6) is also included.
According to this, in the plating step, the area of the electrode pad formed in the space in the front surface side resist layer in a plan view is changed to the external connection formed in the space in the back surface side resist layer. Since the area can be made smaller than the area of the terminals, the effect (6) can be obtained in relation to the fact that the wiring board that exhibits the effect (2) can be manufactured more reliably.

更に、本発明には、前記レジスト層の形成工程は、前記貫通孔が形成された前記絶縁板の表面と裏面とに対し、感光性樹脂からなる平坦なレジスト層を個別に形成した後、該2つのレジスト層に対し、平面視の面積の異なる露光を個別に行うものである、配線基板の製造方法(請求項7)も含まれる。
これによれば、前記電極パッドの平面視における面積を、前記外部接続端子の面積よりも小さくできるので、前記効果(2)を奏する配線基板をより確実に製造できることに関して、前記効果(6)を得ることが可能となる。
Further, in the present invention, in the step of forming the resist layer, a flat resist layer made of a photosensitive resin is individually formed on the front surface and the back surface of the insulating plate in which the through holes are formed, and then the resist layer is formed. A method for manufacturing a wiring board (claim 7) is also included, in which the two resist layers are individually exposed to different areas in a plan view.
According to this, since the area of the electrode pad in a plan view can be made smaller than the area of the external connection terminal, the effect (6) can be obtained with respect to the fact that the wiring board exhibiting the effect (2) can be manufactured more reliably. It becomes possible to obtain.

加えて、本発明には、前記メッキ工程の後に、前記表面側レジスト層および裏面側レジスト層をエッチングして、前記絶縁板から剥離するエッチング工程を有する、配線基板の製造方法(請求項8)も含まれる。
これによれば、前記効果(6)を一層確実に得ることができる。
尚、前記エッチングには、例えば、NaOHの水溶液などのエッチング剤が用いられる。
また、前記エッチング工程の後には、前記電極パッドと外部接続端子との外部に露出する表面には、ニッケル層を介して、極薄の金層が被覆される。
In addition, the present invention comprises a method for manufacturing a wiring substrate, which comprises an etching step of etching the front surface side resist layer and the back surface side resist layer and peeling from the insulating plate after the plating step (claim 8). Is also included.
According to this, the effect (6) can be obtained more reliably.
For the etching, for example, an etching agent such as an aqueous solution of NaOH is used.
Further, after the etching step, the surface of the electrode pad and the external connection terminal exposed to the outside is coated with an ultrathin gold layer via a nickel layer.

(A)は本発明による一形態の配線基板を示す垂直断面図、(B)は(A)中の部分拡大図。(A) is a vertical cross-sectional view showing one form of a wiring board according to the present invention, and (B) is a partially enlarged view in (A). (A)は上記配線基板の平面図、(B)は該配線基板の底面図。(A) is a plan view of the wiring board, and (B) is a bottom view of the wiring board. (A)〜(H)は上記配線基板を得るための製造工程を示す概略図。(A) to (H) are schematic views which show the manufacturing process for obtaining the said wiring board. (A)〜(F)は図3(H)に続く製造工程を示す概略図。(A) to (F) are schematic views showing a manufacturing process following FIG. 3 (H).

以下において、本発明を実施するための形態について説明する。
図1(A)は、本発明による一形態の配線基板1を示す垂直断面図であり、図1(B)は、前記(A)中の部分拡大図である。
上記配線基板1は、図1(A)に示すように、複数のセラミック層(絶縁材)c1,c2を積層してなり、対向する表面3および裏面4を有する基板本体2と、該基板本体2の表面3と裏面4との間を貫通する一対の貫通孔5と、該貫通孔5の内側ごとに形成された一対の貫通導体10と、上記基板本体2の表面3における前記貫通孔5ごとの開口部を囲む位置に形成された一対の電極パッド12と、上記基板本体2の裏面4における前記貫通孔5ごとの開口部を囲む位置に形成された一対の外部接続端子13とを備えている。
尚、上記基板本体2の表面3と裏面4とは、平面視が矩形(正方形または長方形)状である。
また、前記貫通孔5、貫通導体10、電極パッド12、および、外部接続端子13は、図1(A)の前後方向に沿って2対ずつ以上が形成された形態としても良い。
Hereinafter, embodiments for carrying out the present invention will be described.
FIG. 1 (A) is a vertical cross-sectional view showing one form of the wiring board 1 according to the present invention, and FIG. 1 (B) is a partially enlarged view of the above (A).
As shown in FIG. 1A, the wiring board 1 is formed by laminating a plurality of ceramic layers (insulating materials) c1 and c2, and has a substrate main body 2 having a front surface 3 and a back surface 4 facing each other, and the substrate main body. A pair of through holes 5 penetrating between the front surface 3 and the back surface 4 of 2, a pair of through conductors 10 formed inside each of the through holes 5, and the through holes 5 on the surface 3 of the substrate main body 2. A pair of electrode pads 12 formed at a position surrounding each opening and a pair of external connection terminals 13 formed at a position surrounding each opening of each through hole 5 on the back surface 4 of the substrate main body 2 are provided. ing.
The front surface 3 and the back surface 4 of the substrate body 2 have a rectangular (square or rectangular) shape in a plan view.
Further, the through hole 5, the through conductor 10, the electrode pad 12, and the external connection terminal 13 may be formed in a form in which two or more pairs are formed along the front-rear direction of FIG. 1 (A).

前記セラミック層c1,c2は、例えば、アルミナからなり、これらにより構成される前記基板本体2の厚みは、例えば、約400μmである。
また、前記貫通孔5は、径方向の断面が円形状であり、その内径は、例えば、約200μmである。
更に、図2(A),(B)に示すように、前記電極パッド12および外部接続端子13は、平面視の形状が何れも矩形状であり、図1(B)および図2(A),(B)に示すように、平面視において、上記電極パッド12の面積A1は、上記外部接続端子13の面積A2よりも小さい反面、電極パッド12の厚みt1は、約150μmであり、外部接続端子13の厚みt2の約50μmよりも大である。
加えて、前記貫通導体5、電極パッド12、および外部接続端子13は、何れも銅(金属)からなり、図示のように、一体物として形成されている。
The ceramic layers c1 and c2 are made of, for example, alumina, and the thickness of the substrate body 2 composed of these is, for example, about 400 μm.
Further, the through hole 5 has a circular cross section in the radial direction, and the inner diameter thereof is, for example, about 200 μm.
Further, as shown in FIGS. 2 (A) and 2 (B), the electrode pad 12 and the external connection terminal 13 are both rectangular in plan view, and are shown in FIGS. 1 (B) and 2 (A). As shown in (B), in a plan view, the area A1 of the electrode pad 12 is smaller than the area A2 of the external connection terminal 13, while the thickness t1 of the electrode pad 12 is about 150 μm and is externally connected. It is larger than about 50 μm of the thickness t2 of the terminal 13.
In addition, the through conductor 5, the electrode pad 12, and the external connection terminal 13 are all made of copper (metal) and are formed as an integral body as shown in the drawing.

図1(A),(B)および図2(A),(B)に示すように、前記電極パッド12の表面(図示で上面)における中央側には、平面視が円形状で且つ側面視が浅い円弧形状の凹部14が位置していると共に、前記外部接続端子13の表面(図示で下面)における中央側にも、平面視が円形状で且つ側面視の深さd2が上記凹部14の深さd1よりも深い円弧形状の凹部15が位置している。
また、前記図1および図2に示すように、上記電極パッド12側の凹部14は、平面視におけるその面積a1が、上記外部接続端子13側の凹部15の面積a2よりも小さく、且つ前記凹部14の深さd1は、前記凹部15の深さd2よりも浅くなっている。尚、前記深さd1,d2は、上記凹部14,15における最深部におけるものである。
As shown in FIGS. 1 (A) and 1 (B) and FIGS. 2 (A) and 2 (B), the central side of the surface (upper surface in the drawing) of the electrode pad 12 has a circular plan view and a side view. The concave portion 14 having a shallow arc shape is located, and the concave portion 14 having a circular shape in a plan view and a depth d2 in a side view is also located on the central side of the surface (lower surface in the drawing) of the external connection terminal 13. An arc-shaped recess 15 deeper than the depth d1 is located.
Further, as shown in FIGS. 1 and 2, the area a1 of the recess 14 on the electrode pad 12 side is smaller than the area a2 of the recess 15 on the external connection terminal 13 side in a plan view, and the recess 14 is the recess. The depth d1 of 14 is shallower than the depth d2 of the recess 15. The depths d1 and d2 are the deepest portions of the recesses 14 and 15.

図1(A),(B)に示すように、前記貫通孔5の内壁面と前記貫通導体10の外周面との間には、円筒形状である筒形メタライズ層6が形成されており、前記基板本体2の表面3と前記電極パッド12の底面との間には、該電極パッド12の形状に合わせた板形状の表面側メタライズ層7が形成されていると共に、前記基板本体2の裏面4と前記外部接続端子13の底面(図示で上面)との間には、該外部接続端子13の形状に合わせた板形状の裏面側メタライズ層8が各々形成されている。
上記メタライズ層6〜8は、例えば、何れも厚みが数10μmのWあるいはMoからなると共に、互いに電気的に接続されている。
更に、前記基板本体2を構成する前記セラミック層c1,c2間には、WまたはMoからなり、平面視が所要パターンを呈し且つ上記同様の厚みの内層配線9が形成され、その一部が円筒形状の前記筒形メタライズ層6に接続されている。
As shown in FIGS. 1A and 1B, a cylindrical metallized layer 6 having a cylindrical shape is formed between the inner wall surface of the through hole 5 and the outer peripheral surface of the through conductor 10. A plate-shaped surface-side metallized layer 7 that matches the shape of the electrode pad 12 is formed between the surface 3 of the substrate body 2 and the bottom surface of the electrode pad 12, and the back surface of the substrate body 2. A plate-shaped back surface side metallize layer 8 that matches the shape of the external connection terminal 13 is formed between 4 and the bottom surface (upper surface in the drawing) of the external connection terminal 13.
The metallized layers 6 to 8 are made of W or Mo having a thickness of several tens of μm, and are electrically connected to each other, for example.
Further, between the ceramic layers c1 and c2 constituting the substrate main body 2, an inner layer wiring 9 is formed of W or Mo, has a required pattern in a plan view, and has the same thickness as described above, and a part of the inner layer wiring 9 is cylindrical. It is connected to the cylindrical metallize layer 6 having a shape.

上述のような形態の配線基板1では、前記電極パッド12が、平面視での面積A1を前記外部接続端子13の面積A2よりも小さく、且つ該電極パッド12の厚みt1が外部接続端子13の厚みt2よりも大きいので、製造時の電解金属メッキの際に形成され且つ該電極パッド12の表面に位置する凹部14の深さd1を、外部接続端子13の表面に位置する凹部15の深さd2よりも浅く形成されている。そのため、図1(A)に示すように、上記電極パッド12ごとの平坦度を向上させた表面の上方に、追ってハンダ(図示せず)を介して、LEDなどの電子部品16を電気的に良好に接続して実装することが可能となる。 In the wiring substrate 1 having the above-described form, the electrode pad 12 has an area A1 in a plan view smaller than the area A2 of the external connection terminal 13, and the thickness t1 of the electrode pad 12 is the external connection terminal 13. Since it is larger than the thickness t2, the depth d1 of the recess 14 formed at the time of electrolytic metal plating at the time of manufacturing and located on the surface of the electrode pad 12 is changed to the depth d1 of the recess 15 located on the surface of the external connection terminal 13. It is formed shallower than d2. Therefore, as shown in FIG. 1A, the electronic component 16 such as the LED is electrically mounted above the surface of each of the electrode pads 12 with improved flatness via solder (not shown). It is possible to connect and implement well.

また、前記外部接続端子13が、平面視での面積A2を前記電極パッド12の面積A1よりも大きく、且つその厚みt2が電極パッド12の厚みt1よりも小さいので、製造時の電解金属メッキの際に形成される該外部接続端子13の表面に位置する凹部15の深さd2を上記電極パッド12の表面に位置する凹部14の深さd1よりも深く形成されている。そのため、図1(A)に示すように、本配線基板1をプリント基板17の表面に追って実装する際に、上記凹部15により外部接続端子13の表面が広い面積を有することにより、接合用のハンダ(図示せず)との接触面積を増やすことができるため、強固な実装が可能となる。 Further, since the area A2 of the external connection terminal 13 in a plan view is larger than the area A1 of the electrode pad 12 and the thickness t2 thereof is smaller than the thickness t1 of the electrode pad 12, the electrolytic metal plating at the time of manufacture is used. The depth d2 of the recess 15 located on the surface of the external connection terminal 13 is formed deeper than the depth d1 of the recess 14 located on the surface of the electrode pad 12. Therefore, as shown in FIG. 1A, when the main wiring board 1 is mounted on the surface of the printed circuit board 17, the surface of the external connection terminal 13 has a large area due to the recess 15 for joining. Since the contact area with solder (not shown) can be increased, robust mounting is possible.

更に、前記電極パッド12の厚みt1を厚くし、且つ前記外部接続端子13の厚みt2を薄くしているので、これらと前記基板本体2とを含む本配線基板1全体の厚みが過度に増加することを容易に抑制することができる。
加えて、前記電極パッド12の表面上に追って実装されるLEDなどの電子部品16から発生する熱を、厚みが大きい前記電極パッド12、該電極パッド12と連続する前記貫通導体10、および該貫通導体10と連続する前記外部接続端子13を介して、前記基板本体2の内部のセラミック層c1,c2内や、該基板本体1の裏面4側から、迅速且つ効果的に放熱することが可能となる。
従って、前記配線基板1によれば、前記効果(1)〜(4)が確実に得られる。
Further, since the thickness t1 of the electrode pad 12 is thickened and the thickness t2 of the external connection terminal 13 is thinned, the thickness of the entire wiring board 1 including these and the board body 2 is excessively increased. Can be easily suppressed.
In addition, the heat generated from the electronic component 16 such as the LED mounted on the surface of the electrode pad 12 is transferred to the electrode pad 12 having a large thickness, the through conductor 10 continuous with the electrode pad 12, and the penetration. It is possible to quickly and effectively dissipate heat from the inside of the ceramic layers c1 and c2 inside the substrate body 2 and the back surface 4 side of the substrate body 1 via the external connection terminal 13 continuous with the conductor 10. Become.
Therefore, according to the wiring board 1, the effects (1) to (4) can be surely obtained.

以下において、前記配線基板1の製造方法について説明する。
予め、アルミナ粉末、バインダ樹脂、可塑剤、および溶剤などを適量ずつ配合して、セラミックスラリー(図示せず)を制作し、該スラリーをドクターブレード法によって、図3(A)に示すように、厚みが約200μm超ずつである2層のグリーンシート(絶縁板)g1,g2を用意した。
次いで、上記グリーンシートg1,g2の適所ごとに対し、ポンチとダイとによる打ち抜き加工、あるいは、レーザー照射によるレーザー加工を行って、図3(B)に示すように、上記グリーンシートg1,g2の表面と裏面との間を個別に貫通し、且つ内径が約200μmの貫通孔5a,5bを形成した。
Hereinafter, a method for manufacturing the wiring board 1 will be described.
A ceramic slurry (not shown) is prepared in advance by blending an appropriate amount of alumina powder, binder resin, plasticizer, solvent, etc., and the slurry is prepared by the doctor blade method as shown in FIG. 3 (A). Two layers of green sheets (insulating plates) g1 and g2 having a thickness of more than about 200 μm were prepared.
Next, punching processing with a punch and a die or laser processing by laser irradiation is performed on each appropriate place of the green sheet g1 and g2, and as shown in FIG. 3B, the green sheet g1 and g2 Through holes 5a and 5b were formed so as to individually penetrate between the front surface and the back surface and have an inner diameter of about 200 μm.

次に、前記グリーンシートg1,g2の表面および裏面の少なくとも一方における所定の位置ごとに、W粉末またはMo粉末を含む導電性ペーストを、スクリーン印刷して、図3(C)に示すように、上層側のグリーンシートg1の表面における前記貫通孔5aの開口部を囲む位置と、下層側のグリーンシートg2の表面および裏面における前記貫通孔5bの開口部を囲む位置とに対し、平面視が矩形状を呈する未焼成の表面側メタライズ層7および裏面側メタライズ層8と、平面視が所要のパターンを呈する未焼成の内層配線9とを形成した。尚、上記グリーンシートg2の表面における図示しない位置においても、未焼成の内層配線9を上記と同時に形成した。
更に、図3(D)に示すように、前記グリーンシートg1,g2の貫通孔5a,5bの内壁面ごとに対して、前記同様の導電性ペーストを、負圧を利用した状態下で、全体が円筒形状を呈する未焼成のメタライズ層6a,6bを形成した。
尚、上記メタライズ層6〜8と内層配線9との厚みは、約20μmであった。
Next, a conductive paste containing W powder or Mo powder is screen-printed at predetermined positions on at least one of the front surface and the back surface of the green sheets g1 and g2, and as shown in FIG. 3 (C). The plan view is rectangular with respect to the position surrounding the opening of the through hole 5a on the surface of the green sheet g1 on the upper layer side and the position surrounding the opening of the through hole 5b on the front surface and the back surface of the green sheet g2 on the lower layer side. An unfired front surface side metallized layer 7 and a back surface side metallized layer 8 exhibiting a shape, and an unfired inner layer wiring 9 exhibiting a pattern required in a plan view were formed. The unfired inner layer wiring 9 was formed at the same time as the above even at a position (not shown) on the surface of the green sheet g2.
Further, as shown in FIG. 3D, the same conductive paste as described above is applied to each of the inner wall surfaces of the through holes 5a and 5b of the green sheets g1 and g2 under a state of utilizing negative pressure. Formed unfired metallized layers 6a and 6b having a cylindrical shape.
The thickness of the metallized layers 6 to 8 and the inner layer wiring 9 was about 20 μm.

次いで、前記メタライズ層6〜8や内層配線9が形成された前記グリーンシートg1,g2を、前記貫通孔5a,5bが同軸心によって互いに連通するように、積層し且つ圧着した。
その結果、図3(E)に示すように、上記グリーンシートg1,g2が積層され、上記貫通孔5a,5bが同軸心で連通し、且つ前記メタライズ層6a,6bが連続するように接続された筒形メタライズ層6を含有するグリーンシート積層体18が得られた。
次に、上記グリーンシート積層体18を加熱し更に保持する焼成を行った。
その結果、図3(F)に示すように、前記グリーンシートg1,g2がセラミック層(絶縁材)c1,c2となり、且つ互いに一体とされた前記基板本体2になると同時に、前記メタライズ層6〜8や内層配線9も焼成されると共に、これらが互いに接続されていた。
Next, the green sheets g1 and g2 on which the metallized layers 6 to 8 and the inner layer wiring 9 were formed were laminated and crimped so that the through holes 5a and 5b communicate with each other by a coaxial center.
As a result, as shown in FIG. 3 (E), the green sheets g1 and g2 are laminated, the through holes 5a and 5b are coaxially communicated, and the metallized layers 6a and 6b are connected so as to be continuous. A green sheet laminate 18 containing a tubular metallized layer 6 was obtained.
Next, the green sheet laminate 18 was heated and further held by firing.
As a result, as shown in FIG. 3 (F), the green sheets g1 and g2 become ceramic layers (insulating materials) c1 and c2 and become the substrate main body 2 integrated with each other, and at the same time, the metallized layers 6 to 6 to 8 and the inner layer wiring 9 were also fired, and they were connected to each other.

更に、図3(G)に示すように、前記基板本体2の表面3の全面に対し、厚みが約150μmの表面側レジスト層20を形成し、且つ上記基板本体2の裏面4の全面に対し、厚みが約50μmの裏面側レジスト層22を形成した。尚、前記レジスト層20,22は、例えば、エポキシ系などの感光性樹脂からなるフィルムを貼り付けることによって形成した。
次いで、前記レジスト層20,22における前記貫通孔5における両端の開口部を含む位置ごとに対し、面積が異なる矩形パターンで紫外線を個別に露光した後、該露光部分ごとに対して、公知のエッチング液を個別に接触させた。
Further, as shown in FIG. 3 (G), a surface-side resist layer 20 having a thickness of about 150 μm is formed on the entire surface of the surface 3 of the substrate body 2, and the entire surface of the back surface 4 of the substrate body 2 is formed. , A back surface side resist layer 22 having a thickness of about 50 μm was formed. The resist layers 20 and 22 were formed by, for example, attaching a film made of a photosensitive resin such as an epoxy type.
Next, ultraviolet rays are individually exposed to the resist layers 20 and 22 in a rectangular pattern having a different area for each position including the openings at both ends in the through hole 5, and then known etching is performed on each exposed portion. The liquids were brought into contact individually.

その結果、図4(A)に示すように、前記表面側レジスト層20における前記貫通孔5の開口部を囲む位置に、該開口部を中心側に有し且つ平面視の面積がA1である円筒形状の空間21が形成された。同時に、前記裏面側レジスト層22における前記貫通孔5の開口部を囲む位置に、該開口部を中心側に有し且つ平面視の面積A2が上記面積A1よりも大で且つ薄い円筒形状の空間23が形成された。上記面積A1は、平面視における前記電極パッド12の面積A1に対応し、上記面積A2は、平面視における前記外部接続端子13の面積A2に対応している。上記空間21,23は、図示のように、前記貫通孔5を介して連通している。
更に、前記貫通孔5の内壁面に形成された前記筒形メタライズ層6の内側面と、前記表面側レジスト層20および裏面側レジスト層22の空間21,23内の底面に位置する前記メタライズ層7,8ごとの上面に対し、電解銅(金属)メッキを同時に施すメッキ工程を行った。
As a result, as shown in FIG. 4A, the surface side resist layer 20 has the opening at the position surrounding the opening of the through hole 5 on the center side, and the area in a plan view is A1. A cylindrical space 21 was formed. At the same time, a cylindrical space having the opening on the center side and having an area A2 in a plan view larger and thinner than the area A1 at a position surrounding the opening of the through hole 5 in the back surface side resist layer 22. 23 was formed. The area A1 corresponds to the area A1 of the electrode pad 12 in the plan view, and the area A2 corresponds to the area A2 of the external connection terminal 13 in the plan view. As shown in the figure, the spaces 21 and 23 communicate with each other through the through holes 5.
Further, the metallizing layer located on the inner side surface of the tubular metallizing layer 6 formed on the inner wall surface of the through hole 5 and the bottom surface in the spaces 21 and 23 of the front surface side resist layer 20 and the back surface side resist layer 22. A plating step was performed in which electrolytic copper (metal) plating was simultaneously applied to the upper surfaces of each of 7 and 8.

具体的には、図4(A)に示す前記レジスト層20,22および前記空間21,23を有する前記基板本体2を、図示しない電解銅メッキ浴中に浸漬した状態で、前記筒形メタライズ層6および前記メタライズ層7,8を陰極側とし、対向する陽極(図示せず)との間において、所定のメッキ用電流を通電した。この際、前記内層配線9をメッキ用配線として活用した。
上記電解銅メッキ浴中において、上記陽極から前記メッキ浴中に溶出した銅イオン(Cu2+)は、前記筒形メタライズ層6の内側面と、前記メタライズ層7,8の上面とに対し、順次析出し且つ堆積して行った。その結果、図4(B)に示すように、上記筒形メタライズ層6の内側面に沿っており、全体が円筒形状の銅メッキ部分10aと、前記メタライズ層7,8の上面に沿っており、平面視がリング形状の銅メッキ部分12a,13aとが形成された。
Specifically, the tubular metallized layer in a state where the substrate main body 2 having the resist layers 20 and 22 and the spaces 21 and 23 shown in FIG. 4A is immersed in an electrolytic copper plating bath (not shown). 6 and the metallized layers 7 and 8 were on the cathode side, and a predetermined plating current was applied between the metallized layers 7 and 8 and the opposing anodes (not shown). At this time, the inner layer wiring 9 was used as the plating wiring.
In the electrolytic copper plating bath, copper ions (Cu 2+ ) eluted from the anode into the plating bath with respect to the inner surface of the tubular metallize layer 6 and the upper surfaces of the metallize layers 7 and 8. It was sequentially deposited and deposited. As a result, as shown in FIG. 4B, it is along the inner side surface of the tubular metallize layer 6, and is entirely along the cylindrical copper-plated portion 10a and the upper surfaces of the metallize layers 7 and 8. , Copper-plated portions 12a and 13a having a ring shape in a plan view were formed.

引き続いて、前記電解銅メッキを続行した結果、図4(C)に示すように、前記円筒形状の銅メッキ部分10aは、更に成長して前記貫通孔5の内側を埋め、前記貫通導体10となった。平行して、前記メタライズ層7,8の上面における前記銅メッキ部分12a,13aは、それぞれ厚みを増した銅メッキ部分12b,13bに成長すると共に、これらの表面における中心側ごとには、中心部が凹んだ円錐形状の凹部14a,15aが個別に形成されていた。
更に引き続いて、前記電解銅メッキを続行した結果、図4(D)に示すように、前記銅メッキ部分12b,13bは、前記空間21,23内ごとにおいて、これらの厚み方向に沿って成長すると共に、これらの表面における中心側ごとには、中心部が浅く凹んだ円錐形状の凹部14b,15bが個別に形成されていた。
Subsequently, as a result of continuing the electrolytic copper plating, as shown in FIG. 4C, the cylindrical copper-plated portion 10a further grows to fill the inside of the through hole 5 and becomes the through conductor 10. became. In parallel, the copper-plated portions 12a and 13a on the upper surfaces of the metallized layers 7 and 8 grow into thickened copper-plated portions 12b and 13b, respectively, and each center side on these surfaces has a central portion. Conical recesses 14a and 15a with recesses were individually formed.
Further, as a result of continuing the electrolytic copper plating, as shown in FIG. 4D, the copper-plated portions 12b and 13b grow along the thickness direction in each of the spaces 21 and 23. At the same time, conical recesses 14b and 15b having a shallowly recessed central portion were individually formed on each central side of these surfaces.

そして、前記のような電解銅メッキは、図4(E)に示すように、前記銅メッキ部分12bが、前記表面側レジスト層20の空間21全体を満たす電極パッド12になると共に、前記銅メッキ部分13bが、前記裏面側レジスト層22の空間23全体を満たす外部接続端子13となった時点で終了した。
この際、図示のように、上記電極パッド12の表面における中央側には、前記凹部14bの跡であり、平面視が小径で且つ浅い円弧形状の凹部14が形成されていた。一方、上記外部接続端子13の表面における中央側には、前記凹部15bの跡であり、平面視が大径で且つ上記凹部14よりも深い円弧形状の凹部15が形成されていた。
Then, in the electrolytic copper plating as described above, as shown in FIG. 4 (E), the copper plating portion 12b becomes an electrode pad 12 that fills the entire space 21 of the surface side resist layer 20, and the copper plating is performed. It ended when the portion 13b became the external connection terminal 13 that filled the entire space 23 of the back surface side resist layer 22.
At this time, as shown in the drawing, on the central side of the surface of the electrode pad 12, a concave portion 14 having a small diameter in a plan view and a shallow arc shape, which is a trace of the concave portion 14b, was formed. On the other hand, on the central side of the surface of the external connection terminal 13, a concave portion 15 having an arc shape, which is a trace of the concave portion 15b and has a large diameter in a plan view and is deeper than the concave portion 14, is formed.

更に、前記表面側レジスト層20と前記裏面側レジスト層22とを、例えば、NaOHの水溶液からなるエッチング剤によりエッチングして、前記基板本体2の表面3や裏面4から剥離するエッチング工程を行った。
最後に、上記基板本体2において、外部に露出している前記電極パッド12および外部接続端子13の表面に対し、電解ニッケルメッキと電解金メッキとを順次施し、下地のニッケル層を介して極薄の金層を個別に被覆した。
その結果、図4(F)に示すように、前記図1(B)で示した形態と同じ前記配線基板1を得ることができた。
尚、以上の各工程は、複数の配線基板1を同時に製造するべく、多数個取りの形態によって行っても良い。
Further, an etching step was performed in which the front surface side resist layer 20 and the back surface side resist layer 22 were etched with, for example, an etching agent composed of an aqueous solution of NaOH to be peeled off from the front surface 3 and the back surface 4 of the substrate body 2. ..
Finally, in the substrate main body 2, electrolytic nickel plating and electrolytic gold plating are sequentially applied to the surfaces of the electrode pad 12 and the external connection terminal 13 exposed to the outside, and the surface is made ultra-thin through the underlying nickel layer. The gold layers were individually coated.
As a result, as shown in FIG. 4 (F), the wiring board 1 having the same form as that shown in FIG. 1 (B) could be obtained.
In addition, each of the above steps may be performed in the form of taking a large number of wiring boards 1 in order to manufacture the plurality of wiring boards 1 at the same time.

前記のような配線基板1の製造方法は、前記レジスト層の形成工程および前記メッキ工程を併有しているので、前記電極パッド12の表面に位置する凹部14の深さd1が、前記外部接続端子13の表面に位置する凹部15の深さd2よりも浅く、且つ平面視における上記凹部14の面積a1が上記凹部15の面積a2よりも小さいと共に、上記電極パッド12の厚みt1が上記外部接続端子13の厚みt2よりも大きく、且つ平面視における該電極パッド12の面積A1が該外部接続端子13の面積A2より小さい前記配線基板1を確実に製造することができた。その結果、前記効果(1)〜(4)を奏する前記配線基板1を確実に製造することができた。
従って、前記配線基板1の製造方法によれば、前記(5),(6)が得られた。
Since the method for manufacturing the wiring substrate 1 as described above includes the resist layer forming step and the plating step, the depth d1 of the recess 14 located on the surface of the electrode pad 12 is connected to the outside. It is shallower than the depth d2 of the recess 15 located on the surface of the terminal 13, the area a1 of the recess 14 in a plan view is smaller than the area a2 of the recess 15, and the thickness t1 of the electrode pad 12 is the external connection. It was possible to reliably manufacture the wiring substrate 1 which is larger than the thickness t2 of the terminal 13 and whose area A1 of the electrode pad 12 in a plan view is smaller than the area A2 of the external connection terminal 13. As a result, the wiring board 1 exhibiting the effects (1) to (4) could be reliably manufactured.
Therefore, according to the manufacturing method of the wiring board 1, the above (5) and (6) were obtained.

尚、本発明は、以上において説明した形態に限定されるものではない。
例えば、前記基板本体2は、単層のセラミック層、単層または複層の樹脂層、あるいは、セラミック層と樹脂層とを適宜の層数で積層した形態としても良い。
また、複層のセラミック層、複層の樹脂層、およびセラミック層と樹脂層とを積層した基板本体において、最上層のセラミック層または樹脂層を平面視で矩形枠状の形態とし、その内側にキャビティを有する形態としても良い。この場合には、該キャビティの底面が前記基板本体2の表面3となる。
更に、前記基板本体を構成するセラミック層がガラス−セラミックなどの低温同時焼成セラミックからなる場合、あるいは樹脂層からなる場合、前記メタライズ層6〜8や内層配線9は、銅または銀によって形成される。
The present invention is not limited to the forms described above.
For example, the substrate main body 2 may be in the form of a single-layer ceramic layer, a single-layer or multi-layer resin layer, or a form in which a ceramic layer and a resin layer are laminated in an appropriate number of layers.
Further, in a substrate body in which a multi-layered ceramic layer, a multi-layered resin layer, and a ceramic layer and a resin layer are laminated, the uppermost ceramic layer or the resin layer is formed into a rectangular frame shape in a plan view, and inside the ceramic layer or the resin layer. It may have a cavity. In this case, the bottom surface of the cavity becomes the surface 3 of the substrate body 2.
Further, when the ceramic layer constituting the substrate body is made of low-temperature co-fired ceramic such as glass-ceramic, or is made of a resin layer, the metallized layers 6 to 8 and the inner layer wiring 9 are formed of copper or silver. ..

また、前記貫通導体5、電極パッド12、および外部接続端子13は、銀からなるものとしても良いし、前記銅からなる形態を含めて互いに独立した金属部分からなり、且つ相互に密着して配置された形態としても良い。
更に、前記貫通孔5および貫通導体10の径方向における断面を、四角形以上の正多角形あるいは変形多角形とし、且つ各角部にアールを付けた形態としても良い。この場合、前記筒形メタライズ層6は、前記に倣った多角筒形状となる。
また、前記貫通導体10は、1つの電極パッド12および1つの外部接続端子13に対して、複数個が接続している形態としても良い。
加えて、前記電極パッド12および外部接続端子13の平面視における形状は、円形状や長円形状とした形態としても良い。これらの形態の場合、前記表面側レジスト層20や裏面側レジスト層22に設ける前記空間も、平面視で上記形状と相似形とされる。
以上のほか、本発明の趣旨を逸脱しない範囲において、適宜変更しても良い。
Further, the through conductor 5, the electrode pad 12, and the external connection terminal 13 may be made of silver, or may be made of metal portions independent of each other including the form made of copper, and may be arranged in close contact with each other. It may be in the form of a copper.
Further, the cross section of the through hole 5 and the through conductor 10 in the radial direction may be a regular polygon or a deformed polygon of a quadrangle or more, and each corner may be rounded. In this case, the tubular metallize layer 6 has a polygonal tubular shape following the above.
Further, a plurality of the through conductors 10 may be connected to one electrode pad 12 and one external connection terminal 13.
In addition, the shape of the electrode pad 12 and the external connection terminal 13 in a plan view may be circular or oval. In the case of these forms, the space provided in the front surface side resist layer 20 and the back surface side resist layer 22 is also similar to the above shape in a plan view.
In addition to the above, changes may be made as appropriate without departing from the spirit of the present invention.

本発明によれば、配線基板全体の厚みを増加させず、絶運材からなる基板本体の表面に実装性に優れた電極パッドを有し、且つ前記基板本体を貫通する貫通導体および裏面側に設ける外部接続端子により放熱性にも優れた他配線基板、およびその製造方法を確実に提供できる。 According to the present invention, the thickness of the entire wiring board is not increased, the electrode pad having excellent mountability is provided on the surface of the substrate body made of a lucky material, and the penetrating conductor penetrating the substrate body and the back surface side. The external connection terminal provided can reliably provide another wiring board having excellent heat dissipation and a manufacturing method thereof.

1……………………………配線基板
2……………………………基板本体
3……………………………表面
4……………………………裏面
5……………………………貫通孔
6〜8………………………メタライズ層
10…………………………貫通導体
12…………………………電極パッド
13…………………………外部接続端子
14,15…………………凹部
20…………………………表面側レジスト層
21,23…………………空間
22…………………………裏面側レジスト層
A1,A2,a1,a2…面積
d1,d2…………………深さ
t1,t2…………………厚み
c1,c2…………………セラミック層(絶縁材、絶縁板)
g1,g2…………………グリーンシート(絶縁板)
1 ……………………………… Wiring board 2 ……………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………… ……… Back side 5 ……………………………… Through hole 6-8 ………………………… Metallized layer 10 ………………………… Through conductor 12 ………… ……………… Electrode pad 13 ………………………… External connection terminals 14, 15 …………………… Recessed 20 ………………………… Surface side resist layer 21, 23 …………………… Space 22 ………………………… Back side resist layer A1, A2, a1, a2… Area d1, d2 …………………… Depth t1, t2 …… …………… Thickness c1, c2 ………………… Ceramic layer (insulating material, insulating plate)
g1, g2 …………………… Green sheet (insulation plate)

Claims (8)

絶縁材からなり、且つ対向する表面および裏面を有する基板本体と、
上記基板本体の表面と裏面との間を貫通する貫通孔と、
上記貫通孔内に形成された貫通導体と、
上記基板本体の表面における上記貫通孔の開口部を囲む位置に形成された電極パッドと、
上記基板本体の裏面における上記貫通孔の開口部を囲む位置に形成された外部接続端子と、を備えた配線基板であって、
平面視で上記電極パッドの面積は、上記外部接続端子の面積よりも小さく、且つ前記電極パッドの厚みは、前記外部接続端子の厚みよりも大であると共に、
上記電極パッドおよび上記外部接続端子の表面には、凹部が個別に形成されており、前記電極パッドの表面に位置する凹部の深さは、前記外部接続端子の表面に位置する凹部の深さよりも浅い、
ことを特徴とする配線基板。
A substrate body made of an insulating material and having opposite front and back surfaces,
Through holes that penetrate between the front and back surfaces of the substrate body,
With the through conductor formed in the through hole,
An electrode pad formed at a position surrounding the opening of the through hole on the surface of the substrate body, and
A wiring board provided with an external connection terminal formed at a position surrounding the opening of the through hole on the back surface of the board body.
In a plan view, the area of the electrode pad is smaller than the area of the external connection terminal, and the thickness of the electrode pad is larger than the thickness of the external connection terminal.
Recesses are individually formed on the surfaces of the electrode pad and the external connection terminal, and the depth of the recess located on the surface of the electrode pad is larger than the depth of the recess located on the surface of the external connection terminal. shallow,
A wiring board characterized by that.
平面視において、前記電極パッドの表面に位置する凹部の面積は、前記外部接続端子の表面に位置する凹部の面積よりも小さい、
ことを特徴とする請求項1に記載の配線基板。
In a plan view, the area of the recess located on the surface of the electrode pad is smaller than the area of the recess located on the surface of the external connection terminal.
The wiring board according to claim 1.
前記貫通導体、前記電極パッド、および前記外部接続端子は、一体の金属から構成されているか、あるいは、互いに異なる金属部分から構成されている、
ことを特徴とする請求項1または2に記載の配線基板。
The through conductor, the electrode pad, and the external connection terminal are made of an integral metal or are made of different metal parts.
The wiring board according to claim 1 or 2.
前記貫通孔の内壁面と前記貫通導体の外周面との間、前記基板本体の表面と前記電極パッドの底面との間、および、前記基板本体の裏面と前記外部接続端子の底面との間には、メタライズ層が形成されている、
ことを特徴とする請求項1乃至3の何れか一項に記載の配線基板。
Between the inner wall surface of the through hole and the outer peripheral surface of the through conductor, between the surface of the substrate body and the bottom surface of the electrode pad, and between the back surface of the substrate body and the bottom surface of the external connection terminal. Is formed with a metallized layer,
The wiring board according to any one of claims 1 to 3, wherein the wiring board is characterized by this.
縁材からなり、且つ対向する表面および裏面を有する基板本体と、該基板本体の表面と裏面との間を貫通する貫通孔と、該貫通孔内に形成された貫通導体と、上記基板本体の表面における上記貫通孔の開口部を囲む位置に形成された電極パッドと、上記基板本体の裏面における上記貫通孔の開口部を囲む位置に形成された外部接続端子と、を備えた配線基板の製造方法であって、
対向する表面および裏面を有する絶縁板に打ち抜き加工またはレーザー加工を施し、前記表面と裏面との間を貫通する貫通孔を形成する貫通孔の形成工程と、
上記絶縁板の貫通孔の内壁面と、前記絶縁板の表面および裏面における前記貫通孔の両端側の開口部を囲む位置ごとに亘って、メタライズ層を形成するメタライズ層の形成工程と、
上記絶縁板の表面および裏面に配置され、且つ上記貫通孔の開口部ごとを囲む空間を有する表面側レジスト層と、裏面側レジスト層とを形成するレジスト層の形成工程と、
上記貫通孔の内壁面に形成された筒形メタライズ層の内側面と、表面側レジスト層および裏面側レジスト層の上記各空間内の底面に位置する表面側メタライズ層および裏面側メタライズ層の上面に対し、電解金属メッキを同時に施して、上記貫通導体、上記電極パッド、および上記外部接続端子を形成するメッキ工程と、を含み、
上記メッキ工程において、上記電極パッドおよび上記外部接続端子は、該電極パッドの表面に位置する凹部の深さが、該外部接続端子の表面に位置する凹部の深さよりも浅くなるように形成される、
ことを特徴とする配線基板の製造方法。
It consists insulation material, and the substrate body and having opposite front and rear surfaces, a through hole passing through between the front and back surfaces of the substrate main body, a through conductor formed in the through hole, the substrate body A wiring board comprising an electrode pad formed at a position surrounding the opening of the through hole on the front surface of the substrate and an external connection terminal formed at a position surrounding the opening of the through hole on the back surface of the substrate main body. It ’s a manufacturing method,
A step of forming a through hole by punching or laser processing an insulating plate having an opposing front surface and a back surface to form a through hole penetrating between the front surface and the back surface.
A step of forming a metallized layer for forming a metallized layer over the inner wall surface of the through hole of the insulating plate and the positions surrounding the openings on both ends of the through hole on the front surface and the back surface of the insulating plate.
A step of forming a resist layer, which is arranged on the front surface and the back surface of the insulating plate and has a space surrounding each opening of the through hole, and a resist layer forming a back surface side resist layer.
And the inner surface of the cylindrical metallized layer formed on the inner wall surface of the through hole, the surface-side resist layer and the back-side resist front side metallization layer you position the bottom surface of the in each space layer and the back-side metallization layer A plating step of simultaneously applying electrolytic metal plating to the upper surface to form the through conductor, the electrode pad, and the external connection terminal is included.
In the plating step, the electrode pad and the external connection terminal are formed so that the depth of the recess located on the surface of the electrode pad is shallower than the depth of the recess located on the surface of the external connection terminal. ,
A method for manufacturing a wiring board, which is characterized in that.
前記レジスト層の形成工程において、前記表面側レジスト層の平面視における前記空間の面積は、前記裏面側レジスト層の平面視における前記空間の面積よりも小さい、
ことを特徴とする請求項5に記載の配線基板の製造方法。
In the step of forming the resist layer, the area of the space in the plan view of the front surface side resist layer is smaller than the area of the space in the plan view of the back surface side resist layer.
The method for manufacturing a wiring board according to claim 5, wherein the wiring board is manufactured.
前記レジスト層の形成工程は、前記貫通孔が形成された前記絶縁板の表面と裏面とに対し、感光性樹脂からなる平坦なレジスト層を個別に形成した後、該2つのレジスト層に対し、平面視の面積の異なる露光を個別に行うものである、
ことを特徴とする請求項5または6に記載の配線基板の製造方法。
In the step of forming the resist layer, a flat resist layer made of a photosensitive resin is individually formed on the front surface and the back surface of the insulating plate in which the through holes are formed, and then the two resist layers are subjected to the process. Exposure with different areas in plan view is performed individually.
The method for manufacturing a wiring board according to claim 5 or 6, wherein the wiring board is manufactured.
前記メッキ工程の後に、前記表面側レジスト層および裏面側レジスト層をエッチングして、前記絶縁板から剥離するエッチング工程を有する、
ことを特徴とする請求項5乃至7の何れか一項に記載配線基板の製造方法。
After the plating step, there is an etching step of etching the front surface side resist layer and the back surface side resist layer and peeling them from the insulating plate.
A method for manufacturing a wiring board according to any one of claims 5乃optimum 7, characterized in that.
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