JP6871055B2 - Frequency modulator - Google Patents

Description

The present invention relates to a frequency modulation device, and more particularly to a device for simplifying a configuration, improving signal accuracy, and the like.

Since the spread spectrum clock signal generation circuit, which is a device that modulates the frequency, can remove EMI noise generated by the clock signal, for example, it is used in various devices and the like in which EMI noise is a problem. This is as is well known from the past (see, for example, Patent Document 1 and the like).

For example, FIG. 6 shows a circuit configuration example of a conventional spread spectrum clock signal generation circuit, and the conventional circuit will be described below with reference to the same figure.
This spectrum diffusion clock signal generation circuit includes a phase comparator 61 that compares the phase of an input clock signal and an output clock signal, a low-pass filter 62 that generates a voltage corresponding to the phase difference obtained by the phase comparator 61, and a low-pass filter. It is configured to include a voltage-current conversion circuit 63 that converts the voltage output of the filter 62 into a current, and a frequency oscillation circuit 64 that oscillates according to the output current of the voltage-current conversion circuit 63.

In such a spread spectrum clock signal generation circuit, the output frequency fout is obtained by the following equation.

fout = i / 2CV

Here, i is the current flowing through the MOS transistors 64-1 and 64-2 at the final stage of the frequency oscillation circuit 64, C is the capacitance value of the oscillation capacitor 64-3 provided in the frequency oscillation circuit 64, and V is the frequency oscillation. This is the comparator voltage applied to the comparators 64-4 and 64-5 provided in the circuit 64.

Frequency modulation in this conventional spread spectrum clock signal generation circuit is performed by superimposing a voltage having an amplitude dVR, which is a modulated wave, on a voltage V (see FIG. 7).
In this case, the modulation depth and the modulation period can be set to desired values by appropriately setting the amplitude and frequency of the superimposed signals.

Japanese Unexamined Patent Publication No. 2004-207846

However, in the above-mentioned conventional circuit, when the modulation depth (modulation degree) is small, the dVR may be several μv, and there is a risk that sufficient accuracy of the superimposed voltage cannot be ensured. If sufficient accuracy of the superimposed voltage cannot be ensured, it becomes difficult to generate a desired voltage. Therefore, there is a problem that a desired modulated wave cannot be obtained and a satisfactory frequency-modulated signal cannot be obtained.

The present invention has been made in view of the above circumstances, and provides a frequency modulation device capable of obtaining a desired frequency modulation signal with a simple configuration while ensuring the accuracy of the generated signal.

In order to achieve the above object of the present invention, the frequency modulation device according to the present invention is
A phase frequency comparison circuit that detects the phase difference and frequency between the input frequency signal and the generated output frequency signal,
A charge pump circuit that generates a charge / discharge current according to the phase difference detected by the phase frequency comparison circuit, and a charge pump circuit.
A filter that smoothes the charge / discharge current generated in the charge pump circuit and generates a smoothing voltage.
A modulated wave generation circuit that modulates the smoothing voltage to generate a modulated wave,
A voltage-current conversion circuit that adds voltage to the smoothing voltage and the output of the modulation wave generation circuit, converts the added voltage into a current value modulated according to the modulation wave, and outputs it as an output current.
A frequency oscillation circuit that oscillates according to the output current of the voltage-current conversion circuit,
Equipped with,
The modulated wave generation circuit includes a resistance ladder circuit that divides the smoothing voltage, a switch circuit that selects the voltage dividing voltage of the resistance ladder circuit and outputs the selected voltage dividing voltage, and the component in the switch circuit. It has an output code generation circuit that controls the selection operation of the pressure voltage, and the output code generation circuit uses an up / down counter that generates a divided signal of the input frequency signal, and the up / down Depending on the counter operation of the counter, the operation of sequentially increasing or decreasing the counter value is repeated to generate a triangular modulated wave, or the operation of sequentially increasing or decreasing the weighted counter value is repeated. It is configured to be switchable so that it produces a non-linear modulated wave.
The voltage-current conversion circuit includes a first amplifier that buffer-amplifies the smoothing voltage, a second amplifier that buffer-amplifies the output voltage of the modulation wave generation circuit, an output voltage of the first amplifier, and the first amplifier. It is provided with a voltage addition of the output voltage of the amplifier of No. 2 and a resistance block for a conversion circuit using a plurality of resistors provided so as to be able to convert the added voltage to a current .

According to the present invention, unlike the conventional case, the smoothing voltage and the output of the modulated wave generation circuit are voltage-added with a simple configuration, so that it is surely avoided that the desired signal accuracy cannot be secured depending on the degree of modulation. This has the effect of being able to obtain a frequency-modulated signal with the required accuracy.

It is a block diagram which shows the basic structure example of the frequency modulation apparatus in embodiment of this invention. It is a circuit diagram which shows the specific circuit configuration example of the frequency modulation apparatus in embodiment of this invention. It is a schematic diagram which shows typically the change characteristic of the output code output from the output code generation circuit in the specific circuit example shown in FIG. It is a timing chart which shows the outline of generating the modulated wave of a triangular wave. It is a timing chart which shows the outline which generates a nonlinear modulated wave. It is a circuit diagram which shows the circuit structure example of the conventional spread spectrum clock signal generation circuit. It is a characteristic diagram which shows the modulation characteristic of a conventional circuit schematicly.

Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 5.
The members, arrangements, etc. described below are not limited to the present invention, and can be variously modified within the scope of the gist of the present invention.
First, the basic configuration of the frequency modulation device according to the embodiment of the present invention will be described with reference to FIG.

The frequency modulation device according to the embodiment of the present invention includes a phase frequency comparison circuit 1, a charge pump circuit 2, a voltage / current conversion circuit 3, a frequency oscillation circuit 4, a modulation wave generation circuit 5, and a filter 6. It is configured to have.

In the phase frequency comparison circuit 1, the phase difference between the frequency of the input signal and the frequency of the output signal is detected, and the detected phase difference is input to the charge pump circuit 2. In the following description, for convenience of explanation, the signal input to the input terminal 11 will be referred to as an “input frequency signal”, and the output signal output to the output terminal 12 will be referred to as a “generated output frequency signal”.
The charge pump circuit 2 generates a charge / discharge current according to the phase difference input from the phase frequency comparison circuit 1.

The filter 6 includes a filter resistor 61 and first and second filter capacitors 62 and 63.
The filter resistor 61 and the first filter capacitor 62 are connected in series, and between the output stage of the charge pump circuit 2 and the ground, from the output stage of the charge pump circuit 2 to the filter resistor 61 and the filter. The first capacitors 62 are provided in this order.

Further, the filter second capacitor 63 is provided between the output stage of the charge pump circuit 2 and the ground so as to be connected in parallel to the filter resistor 61 and the filter first capacitor 62. There is.

In the filter 6, the voltage output from the charge pump circuit 2 is smoothed to be substantially a DC voltage (hereinafter, referred to as “smoothing voltage” for convenience of explanation), and the voltage-current conversion circuit 3 and the modulated wave generation circuit are used. It is input to 5.
In the modulated wave generation circuit 5, the voltage that has passed through the filter 6 is divided based on the frequency of the input signal and input to the voltage-current conversion circuit 3.

In the voltage-current conversion circuit 3, the output voltage Vm from the modulation wave generation circuit 5 is added to the smoothing voltage Vc obtained by the filter 6, and the current corresponding to the addition result is output as the modulation current. ing.
In the frequency oscillation circuit 4, an oscillation signal is generated by the modulation current input from the voltage-current conversion circuit 3 and the capacitor.

Here, the time constant of the filter 6 is set to a value sufficiently large with respect to the frequency modulation period. With such a setting, it is not possible to follow the fluctuation of the smoothing voltage obtained by comparing the frequency-modulated output frequency fOUT and the input frequency fIN, so that the smoothing voltage is generally maintained by the voltage due to the input frequency signal. ..
The frequency modulation cycle is a cycle in which the modulation output code changes in the output code generation circuit 54.

Next, a more specific circuit configuration example of the frequency modulation device according to the above-described embodiment will be described with reference to FIG.
The same components as those shown in FIG. 1 are designated by the same reference numerals, detailed description thereof will be omitted, and different points will be mainly described below.
First, since the phase frequency comparison circuit 1 and the charge pump circuit 2 are basically the same as the circuit configurations used conventionally, the detailed circuit configurations thereof will be omitted.

The modulated wave generation circuit 5 is roughly divided into a first operational amplifier for the generation circuit (denoted as “ZM1” in FIG. 2) 51, a resistance ladder circuit 52, a switch circuit 53, and an output code generation circuit 54. It is composed of.
In the first operational amplifier 51 for the generation circuit, the non-inverting input terminal is connected to the output stage of the charge pump circuit 2, while the inverting input terminal is for the ladder located on the input terminal side of the resistance ladder circuit 52 together with the output terminal. It is connected to one end of the resistor 52-1.

The resistance ladder circuit 52 includes a plurality of ladder resistors 52-1 to 52-n.
The number of ladder resistors 52-1 to 52-n, that is, the number of bits, in other words, does not have to be limited to a specific numerical value and is arbitrary.

The ladder resistors 52-1 to 52-n are provided so as to be connected in series between the output terminal of the first operational amplifier 51 for the generation circuit and the ground.
One end of the ladder resistor 52-1 located on the input end side is connected to the output terminal of the first operational amplifier 51 for the generation circuit, while one end of the ladder resistor 52-n located on the ground side is connected. It is connected to the ground.

Further, in the resistance ladder circuit 52, one end of the open / close switch 53-1 to 53-n corresponding to each of the switch circuits 53 described below is connected to the connection point with the adjacent ladder resistors 52-1 to 52-n. Is connected.
The switch circuit 53 is configured to have the same number of open / close switches 53-1 to 53-n as the number of ladder resistors 52-1 to 52-n provided in the resistance ladder circuit 52. As will be described later, the switch circuit 53 selects and outputs the voltage divider of the resistance ladder circuit 52.

As the open / close switch 53-1 to 53-n, for example, a semiconductor switch represented by a transistor is suitable. When a transistor is used, the function as a switch can be realized by controlling its on / off (conduction / non-conduction).
The output code generation circuit 54 controls on / off of the open / close switches 53-1 to 53-n. The output code generation circuit 54 generates and outputs an output code that serves as a signal for turning on / off the open / close switches 53-1 to 53-n based on the input frequency signal (details will be described later). ).

The on / off of each of the open / close switches 53-1 to 53-n is controlled to be turned on and off between two terminals (nodes), and one of the two terminals is a corresponding rudder resistor. The other one is connected in common to the connection points of 52-1 to 52-n, and is also connected to the non-inverting input terminal of the second operational amplifier 32 for the conversion circuit constituting the voltage-current conversion circuit 3 described below. It is connected.

The voltage-current conversion circuit 3 includes first and second operational amplifiers for conversion circuits (denoted as "ZD1" and "ZD2" in FIG. 2, respectively) 31 and 32, and first to third MOSs for conversion circuits. Transistors (denoted as "QD1", "QD2", and "QD3" in FIG. 2) 33 to 35 and first to third resistors for conversion circuits (in FIG. 2, "RD1" and "RD1" and "RD3", respectively). RD2 ”and“ RD3 ”) 36 to 38 are included.

A P-channel MOS transistor is used for the first and second MOS transistors 33 and 34 for the conversion circuit, and an N-channel MOS transistor is used for the third MOS transistor 35 for the conversion circuit.

The output terminal of the first operational amplifier 31 for the conversion circuit is connected to the gates of the first and second MOS transistors 33 and 34 for the conversion circuit, and the source of the first MOS transistor 33 for the conversion circuit is required. The power supply voltage is applied. Further, the drain of the first MOS transistor 33 for the conversion circuit is connected to the non-inverting input terminal of the first operational amplifier 31 for the conversion circuit.
The smoothing voltage obtained by the filter 6 is applied to the inverting input terminal of the first operational amplifier 31 for the conversion circuit.

Between the drain and the ground of the first MOS transistor 33 for the conversion circuit, the second and third resistors 37 and 38 for the conversion circuit are converted from the drain side of the first MOS transistor 33 for the conversion circuit. The second resistor 37 for use and the third resistor 38 for conversion circuit are connected in series in this order.

The mutual connection points of the second and third resistors 37 and 38 for the conversion circuit are connected to the output terminal of the second operational amplifier 32 for the conversion circuit via the first resistor 36 for the conversion circuit. ..
As described above, the output stage of the switch circuit 53 is connected to the non-inverting input terminal of the second operational amplifier 32 for the conversion circuit, and the output voltage Vm of the switch circuit 53 is applied, while the inverting input terminal. Is connected to the output terminal.
The first to third resistors 36 to 38 for converting circuit provided as described above, constitutes a conversion circuit resistor block 39, together with the use for the voltage adding, a resistor used as a current converter It has become.

A required power supply voltage is applied to the source of the second MOS transistor 34 for the conversion circuit, while the drain is connected to the drain and gate of the third MOS transistor 35 for the conversion circuit and has the frequency described below. It is connected to the gates of the second and sixth MOS transistors 45-2 and 45-6 for the oscillation circuit of the oscillation circuit 4.
The source of the third MOS transistor 35 for the conversion circuit is connected to the ground.

The frequency oscillation circuit 4 has the same configuration as the conventional circuit. The circuit configuration shown in FIG. 2 is one of the conventional circuit configurations, and of course, the circuit configuration is not limited to this, and any other circuit configuration can be used as long as it can perform the same operation and function. May be used.

The frequency oscillation circuit 4 shown in FIG. 2 is the first to sixth MOS transistors for the oscillation circuit (in FIG. 2, "QF1", "QF2", "QF3", "QF4", respectively. "QF5" and "QF6") 45-1 to 45-6, and the first and second comparators for oscillator circuits ("ZF1" and "ZF2" in FIG. 2, respectively) 41 and 42, and the first The first and second negative logic sum circuits 43 and 44 are configured as main components.

In this circuit configuration example, the P-channel MOS transistors are attached to the first, third, and fourth MOS transistors 45-1, 45-3, and 45-5 for the oscillation circuit, and the second and third MOS transistors for the oscillation circuit are used. N-channel MOS transistors are used in the 5th and 6th MOS transistors 45-2, 45-5, 45-6, respectively.

In the first MOS transistor 45-1 for the oscillation circuit, the required power supply voltage is applied to the source, while the drain is interconnected with the gate, and the drain and the drain of the second MOS transistor 45-2 for the oscillation circuit are connected. It is connected to the gate of the third MOS transistor 45-3 for the oscillation circuit.
The source of the second MOS transistor 45-2 for the oscillation circuit is connected to the ground.

The third to sixth MOS transistors 45-3 to 45-6 for the oscillation circuit are the third, fourth, fifth, and sixth MOS transistors for the oscillation circuit from the power supply side between the power supply and the ground. 45-3, 45-4, 45-5, 45-6 are connected in series in this order.

That is, the required power supply voltage is applied to the source of the third MOS transistor 45-3 for the oscillation circuit, while the drain is connected to the source of the fourth MOS transistor 45-4 for the oscillation circuit, so that the oscillation circuit The drain of the fourth MOS transistor 45-4 for oscillation is connected to the drain of the fifth MOS transistor 45-5 for the oscillation circuit.

Then, the source of the fifth MOS transistor 45-5 for the oscillation circuit is connected to the drain of the sixth MOS transistor 45-6 for the oscillation circuit, and the source of the sixth MOS transistor 45-6 for the oscillation circuit is ground. It is connected to the.
An oscillation capacitor 46 is connected between the drain and the ground of the fourth and fifth MOS transistors 45-4, 45-5 for the oscillation circuit.

Further, the gate of the fourth MOS transistor 45-4 for the oscillation circuit and the gate of the fifth MOS transistor 45-5 for the oscillation circuit are connected to each other and connected to the output terminal 12, and the first denial. It is connected to the output terminal of the logical sum circuit 43 and one input terminal of the second NOR circuit 44.
The output terminal 12 is connected to the other input stage of the phase frequency comparison circuit 1 so that the generated output frequency signal is fed back.

The inverting input terminal of the first comparator 41 for the oscillation circuit and the non-inverting input terminal of the second comparator 42 for the oscillation circuit are connected to each other, and the fourth and fifth MOS transistors 45-4 for the oscillation circuit, While connected to the drain of 45-5, a predetermined voltage V is applied between the non-inverting input terminal of the first comparator 41 for the oscillation circuit and the inverting input terminal of the second comparator 42 for the oscillation circuit. It has become.

Further, the output terminal of the first comparator 41 for the oscillation circuit is connected to one input terminal of the first negative logic sum circuit 43, and the output terminal of the second comparator 42 for the oscillation circuit is the second negative logic. It is connected to one input terminal of the sum circuit 44.
The first and second NOR circuits 43 and 44 are connected as described above to form a latch circuit.

Next, the operation in such a configuration will be described.
As described in the basic circuit configuration example of FIG. 1, the output voltage of the charge pump circuit 2 smoothed to a DC voltage by the filter 6 is buffer-amplified by the first operational amplifier 51 for the generation circuit of the modulation wave generation circuit 5. Is applied to the resistance ladder circuit 52.

The output code generation circuit 54 controls the on / off of the open / close switches 53-1 to 53-n of the switch circuit 53 according to the frequency fIN of the input frequency signal, and from the resistance ladder circuit 52, the open / close switch 53- The voltage Vm corresponding to the on / off of 1 to 53-n is selected and output via the switch circuit 53.

The voltage Vm output from the resistance ladder circuit 52 via the switch circuit 53 is buffer-amplified by the second arithmetic amplifier 32 for the conversion circuit of the voltage-current conversion circuit 3, and is amplified via the first resistor 36 for the conversion circuit. It is applied to the connection points of the second and third resistors 37 and 38 for the conversion circuit.

On the other hand, the smoothing voltage Vc obtained by the filter 6 is also input to the first operational amplifier 31 for the conversion circuit, is buffer-amplified, and is applied to the gates of the first and second MOS transistors 33 and 34 for the conversion circuit. Will be done.

As a result, a voltage-current-converted and modulated current Ir is generated by the smoothing voltage Vc and flows to the drain of the first MOS transistor 33 for the conversion circuit.
In this way, the voltage-current conversion circuit 3 outputs the current Ir modulated by the smoothing voltage Vc whose current value is the modulated wave by the voltage-current conversion.
This current Ir is approximately a value obtained by Equation 1 below.

Ir = {(1 + R1 / R) Vc-Vm} / (R + 2R1) ... Equation 1

Here, R = R2 = R3 and Vm are the output voltage of the resistance ladder circuit 52 (hereinafter, referred to as “ladder output voltage” for convenience of explanation), and Vc is the smoothing voltage. Further, R1 is the resistance value of the first resistor 36 for the conversion circuit, R2 is the resistance value of the second resistor 37 for the conversion circuit, and R3 is the resistance value of the third resistor 38 for the conversion circuit.

Further, since the ladder output voltage Vm is a voltage obtained by dividing the smoothing voltage Vc by the resistance ladder circuit 52, if the resistance ratio of the resistance ladder circuit 52 is N, the above equation 1 becomes the following equation 2. It can be rewritten.

Ir = Vc × (1 + R1 / RN) / (R + 2R1) ... Equation 2

This current Ir is mirrored by the second MOS transistor 34 for the conversion circuit and becomes the current of the frequency oscillation circuit 4.
Since the current Ir is a modulated current, the frequency signal generated in the frequency oscillation circuit 4 is output as a modulated frequency signal.
The frequency of the generated output frequency signal output from the frequency oscillation circuit 4 is obtained by the following equation 3.

fOUT = Ir / 2CV ... Equation 3

Here, V is the voltage applied between the non-inverting input terminal of the first comparator 41 for the oscillation circuit and the inverting input terminal of the second comparator 42 for the oscillation circuit, and C is the capacitance value of the oscillation capacitor 46. is there.

From the above equation 1, if the current Ir is Ir'when the ladder output voltage Vm changes to Vm', the following equation 4 can be obtained.

Ir'= {(1 + R1 / R) Vc-Vm'} / (R + 2R1) ... Equation 4

When the ladder output voltage Vm is Vm = 0V, it is assumed that Ir = Io, and the following equation 5 is obtained from equations 1 and 4.

R1 = R {(Vm'/ Vc) / (1-Ir' / Io) -1} ... Equation 5

In this equation 5, the values of R1 and R to be set by substituting desired values for Io, Ir', Vc, and Vm', which are the modulation depths (modulation degree). Can be obtained, and an arbitrary modulation depth (modulation degree) can be set.

To give a specific numerical example, for example, assuming that Vc = 2V is the center value of the smoothing voltage (however, when Vm = 1V) and the amount of current change is 3% when Vm'= 1V, the following from Equation 5 (The change in ladder output voltage Vm from 0V to 1V results in a current change of 3%, and the change from 1V to 2V results in a current change of 3%, resulting in a modulation depth of ± 3%). ..

R1 = R [1 / {2 (1-1.03)} -1] ... Equation 6

Further, when this equation 6 is rearranged, it becomes the following equation 7.

R1 = (94/6) R ... Equation 7

After all, the constant of the resistor can be set.

Next, the operation of generating the modulated wave (output code) in the output code generation circuit 54 will be described with reference to FIGS. 3 to 5.
As described below, the output code generation circuit 54 according to the embodiment of the present invention is capable of selectively outputting a triangular modulated wave and a non-linear modulated wave.

First, the generation and output operation of the modulated wave of the triangular wave will be described.
The output code generation circuit 54 divides the input frequency fIN according to the period of the input frequency signal and the number of bits of the resistance ladder circuit 52, and the output code is divided by an up / down counter (not shown) based on the divided signal. Is configured to occur. That is, the output code generation circuit 54 is configured so that the modulation cycle can be changed by dividing the frequency by a desired value based on the input frequency signal.

More specifically, in the output code generation circuit 54, the counter values of the up / down counters (not shown) are sequentially increased with respect to the frequency fIN of the input frequency signal, and when the maximum bit is reached, conversely. By repeating the operation of down-counting and lowering the counter value, a triangular modulated wave as shown by the dotted characteristic line in FIG. 3 is output.

FIG. 4 shows a timing chart in the above-mentioned counter operation, which will be described below.
In the output code generation circuit 54, two types of clocks, an input clock and an output code generation clock, are internally generated.

The input clock is required for the counter operation of the up / down counter (not shown), and is the basic clock for all counter operations.
The output code generation clock is generated based on the above-mentioned input clock, and is used as a clock for determining the timing of generating and outputting the output code.

That is, the up / down counter (not shown) up / down count operations are performed in synchronization with the input clock, while the output code is output in synchronization with the output code generation clock. ..
In this case, the code of the modulated wave (modulated output code) finally obtained each time the count value (counter output code) output from the up / down counter (not shown) increases or decreases by 1 count. Is changing (see FIG. 4).

Further, in the output code generation circuit 54, the counter values of the up / down counters (not shown) can be weighted as desired by performing a predetermined operation switching setting.
In this case, in the output code generation circuit 54, the up / down counter (not shown) raises the counter value while giving a predetermined weight to the counter value, and when it reaches the maximum bit, it counts down on the contrary. By repeating the operation of gradually lowering the counter value, it is possible to generate a predetermined non-linear modulated wave showing a stepwise change as shown by the solid characteristic line in FIG. ..

The weighting in the counter operation in the output code generation circuit 54 described above can be realized without requiring a separate microcomputer or memory by setting a predetermined value in advance, and the circuit becomes a small-scale circuit. ..
Further, by enabling the selection between the triangle and the non-linear as described above, the range of selection of the modulated wave is widened, and a highly versatile circuit is provided.

When generating this non-linear modulated wave, the up-counting and down-counting operations of the up / down counter (not shown) are performed in synchronization with the input clock, while the output code is synchronized with the output code generation clock. The output is the same as in the case of generating the modulated wave of the above triangle (see FIG. 5).

However, the change of the modulation output code with respect to the increase or decrease of the count value (counter output code) output from the up / down counter (not shown) by 1 count is the generation of the modulated wave of the previous triangle. Unlike the case, it is not uniform and changes according to the above-mentioned weighting (see FIG. 5).

It can be applied to a spread spectrum clock signal generation circuit in which an output of a frequency modulated signal having a simple configuration and good accuracy is desired, and is also applicable to an FM modulator for communication.

1 ... Phase frequency comparison circuit 2 ... Charge pump circuit 3 ... Voltage / current conversion circuit 4 ... Frequency oscillation circuit 5 ... Modulation wave generation circuit 6 ... Filter

Claims (2)

A phase frequency comparison circuit that detects the phase difference and frequency between the input frequency signal and the generated output frequency signal,
A charge pump circuit that generates a charge / discharge current according to the phase difference detected by the phase frequency comparison circuit, and a charge pump circuit.
A filter that smoothes the charge / discharge current generated in the charge pump circuit and generates a smoothing voltage.
A modulated wave generation circuit that modulates the smoothing voltage to generate a modulated wave,
A voltage-current conversion circuit that adds voltage to the smoothing voltage and the output of the modulation wave generation circuit, converts the added voltage into a current value modulated according to the modulation wave, and outputs it as an output current.
A frequency oscillation circuit that oscillates according to the output current of the voltage-current conversion circuit,
Equipped with
The modulated wave generation circuit includes a resistance ladder circuit that divides the smoothing voltage, a switch circuit that selects the voltage dividing voltage of the resistance ladder circuit and outputs the selected voltage dividing voltage, and the component in the switch circuit. It has an output code generation circuit that controls the selection operation of the pressure voltage, and the output code generation circuit uses an up / down counter that generates a divided signal of the input frequency signal, and the up / down Depending on the counter operation of the counter, the operation of sequentially increasing or decreasing the counter value is repeated to generate a triangular modulated wave, or the operation of sequentially increasing or decreasing the weighted counter value is repeated. It is configured to be switchable so that it produces a non-linear modulated wave.
The voltage-current conversion circuit includes a first amplifier that buffer-amplifies the smoothing voltage, a second amplifier that buffer-amplifies the output voltage of the modulation wave generation circuit, an output voltage of the first amplifier, and the first amplifier. and voltage addition of the output voltage of the second amplifier, and becomes converter resistor block by using a plurality of resistors which are provided with current convertible to the sum voltage, and characterized by having a circumferential Wave frequency modulator. Frequency modulation apparatus according to claim 1, characterized in that a settable modulation depth of the frequency modulated by the setting of the resistance value of the resistor constituting the converter circuit resistor block.

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