JP6807659B2 - Systems and methods for synchronizing recipe set execution - Google Patents

Description

The present embodiment relates to a system and a method for synchronizing the execution of a recipe set.

Plasma systems are used to perform a variety of operations. For example, a plasma system has a plurality of stations for cleaning the wafer, depositing material on the wafer, etching the wafer, and the like. Each station is controlled by one or more processing devices for performing the operation.

Information is transferred between processing devices to perform the operation. However, in order to transfer information, each processing device is under a tight schedule. For example, each processing device needs to process data within a predetermined time frame and then provide the processed data to another processing device.

Such time frame requirements increase the cost of processing equipment. In addition, when using processing equipment, there is a limit to the data transfer speed between processing equipment.

It is in this context that the embodiments described in this disclosure are raised.

Embodiments of the present disclosure provide devices, methods, and computer programs for synchronizing recipe set execution. It can be seen that these embodiments are feasible in a number of forms, such as, for example, processes or devices, or systems, or hardware, or methods, or computer-readable media. Some embodiments are described below.

In one embodiment, the recipe set to be executed is transmitted from one controller to another before sending a signal to execute the recipe set. For example, the master controller sends a recipe set to the slave controller before sending a pulse indicating that the slave controller has executed the recipe set. Such pre-transmission of the recipe set gives the slave controller time to prepare for execution of the recipe set. As soon as a pulse indicating the execution of the recipe set by the slave controller is received, the slave controller executes the recipe set by sending the recipe set for processing.

By sending a plurality of recipe sets to a plurality of slave controllers before transmitting a pulse indicating the execution of the recipe set, each slave controller does not need to execute the recipe set within one time frame. For example, in EtherCAT (Ethernet® for Control Automation Technology), one slave controller receives multiple recipe sets, identifies one of the multiple recipe sets, and the identified recipes. Run the set before sending multiple recipe sets to another slave controller. Identification and execution should be done within one time frame, which is constrained and leads to increased costs. Also, such EtherCAT slave controllers are difficult to obtain due to their high cost and low volume. In addition, EtherCAT slave controllers are speed limited, for example, in megabits per second. By using systems and methods for synchronizing recipe set execution, multiple recipe set transmissions can be made at gigabits per second (Gbps) or faster, with slave controllers performing identification and execution by then. There is no time frame to do. The slave controller executes the recipe set immediately after receiving the pulse indicating the execution of the recipe set by the slave controller.

In one embodiment, a method for synchronizing recipe set execution is described. The method includes sending the recipe set to the master controller by the command controller and sending the recipe set by the master controller for execution by the subsystem controller of the plasma system. The operation of transmitting the recipe set from the master controller to the subsystem controller is performed during the first clock cycle of the clock signal. The method includes generating a recipe event signal by the command controller and sending the recipe event signal to the subsystem controller by the command controller to indicate the time of execution of the recipe set by the subsystem controller. The time of execution occurs during the second clock cycle following the first clock cycle. The second clock cycle is the cycle of the clock signal.

In one embodiment, a method for synchronizing recipe set execution is described. The method comprises transmitting the recipe set for execution by the subsystem controller during the first clock cycle of the clock signal by the master controller. Subsystem controller is configured to control the components of the plasma machine stems. The method further includes the master controller, and generating a recipe event signal, the master controller sends the recipe event signal, and indicate the time of the execution of a recipe set by subsystem controller plasma machines stem, the .. The time of execution occurs during the second clock cycle following the first clock cycle in which the recipe set is transmitted. The second clock cycle is the cycle of the clock signal.

In one embodiment, a method for synchronizing recipe set execution is provided. Method, the master controller comprises transmitting the recipes set to the processor subsystem of plasma machine stems. The operation transmitted from the master controller occurs during the first clock cycle of the clock signal. The method further includes generating a recipe event signal by the master controller and transmitting the recipe event signal by the master controller to indicate the time of execution of the recipe set to the subsystem processor. The operation of transmitting the recipe event signal occurs during the second clock cycle following the first clock cycle.

An advantage of some of the embodiments described above is the synchronization of recipe set execution across multiple controllers. For example, the (n + 1) th recipe set is transmitted synchronously from one source controller to one or more destination controllers. After sending the (n + 1) th recipe set to the recipient controller, the source controller or another controller provides a recipe event signal to signal the recipient controller to start executing the recipe set. The time between the transmission of the (n + 1) th recipe set and the transmission of the recipe event signal allows the recipient controller to prepare for execution of the (n + 1) th recipe set. For example, the (n + 1) th recipe set is transmitted to the recipient controller while the wafer is mounted in the plasma chamber. When the recipe event signal is transmitted to the destination controller, the wafer is already mounted. Further, the receiving controller executes the recipe set to start processing the wafer as soon as it receives the recipe event signal.

Other advantages include, for example, Ethernet protocol, Universal Datagram Protocol (UDP), UDP over Internet Protocol (UDP over IP), UDP over IP over Ethernet, customized protocols, etc., at or above gigabit per second. Examples include the use of communication protocols with high data transfer rates. The (n + 1) th recipe set is embedded in the packet as the payload of the packet generated by applying the communication protocol to transfer the (n + 1) th recipe set. The use of such communication protocols allows the realization of gigabit per second or faster transfer rates. The use of communication protocols saves time and is more cost effective than the EtherCAT protocol.

The following detailed description in connection with the accompanying drawings reveals other aspects.

Embodiments are understood by reference to the following detailed description described in connection with the accompanying drawings.

FIG. 5 is a diagram of an embodiment of a system for explaining synchronization of recipe set execution across a plurality of subsystem controllers.

It is a figure of one Embodiment of the system similar to the system of FIG. 1A-1.

FIG. 5 is a diagram of an embodiment of a system for explaining synchronization between a subsystem controller and a master controller without receiving an input signal from a user through an input device.

It is a figure of one Embodiment of the system similar to the system of FIG. 1B-1.

FIG. 5 is a diagram of an embodiment of a system for explaining synchronization of subsystems according to a recipe event signal received from a master controller.

FIG. 5 is a diagram of an embodiment of a system for explaining synchronization between a subsystem controller and a subsystem.

FIG. 5 is a diagram of an embodiment of a system to illustrate the use of a user interface (UI) computer to achieve synchronization between a master controller and an RF generator controller.

It is an embodiment of the timing diagram for explaining the synchronization between the transmission of the (n + 1) th recipe set to the controller and the execution time of the recipe set by the controller.

To explain that the time of packet execution by the controller changes from the time the packet is received by the controller to the time after which a digital pulse indicating that the packet is executed is received. This is an embodiment of the timing diagram.

It is an embodiment of the timing diagram used to explain the function of the system of FIG. 1E.

It is a figure of one Embodiment of an Ethernet packet.

It is a figure for demonstrating the packet according to one Embodiment described in this disclosure.

It is a figure of one Embodiment of a plasma processing system.

It is a figure of one Embodiment of the system for demonstrating a subsystem.

It is a figure of one Embodiment of a plasma chamber.

The following embodiments describe systems and methods for synchronizing recipe set execution. The present embodiment may be obtained Rukoto be practiced without some or all of these specific details are apparent. Further, in order not to unnecessarily obscure the present embodiment, a detailed description of the well-known process operation is omitted.

FIG. 1A-1 is a diagram of an embodiment of the system 100 for explaining the synchronization of recipe set execution among a plurality of subsystem controllers. System 100 includes a command controller 102 located within computing device 108. The controller referred to herein includes one or more processors and one or more memory devices. A processor as used herein refers to a central processing unit (CPU), an application specific integrated circuit (ASIC), or a programmable logic device (PLD), and these terms are used interchangeably herein. .. Examples of memory devices include read-only memory (ROM), random access memory (RAM), hard disk, volatile memory, non-volatile memory, redundant array of storage disks, flash memory and the like. Examples of these computing devices 108 include laptop computers, desktop computers, tablet terminals, or mobile phones.

The system 100 further includes a master controller 106 connected to the command controller 102 through the transfer medium 112. Examples of the transfer medium referred to in the present specification include a coaxial cable, a conductor cable, a wired medium, a twisted pair, an optical fiber cable, a cable, an Ethernet cable, a wireless medium, and a combination of a wired medium and a wireless medium. Examples of communication protocols include Universal Datagram Protocol (UDP), UDP (UDP over IP) on the Internet protocol, UDP over IP over Ethernet, customized protocols, serial transfer protocols, parallel transfer protocols, and universal serial buses (USB). ) Protocols, customized communication protocols, etc. Examples of serial protocols include RS232 protocol, RS422 protocol, RS423 protocol, RS385 protocol and the like. In various embodiments, in a serial protocol, data is transferred in a serial fashion. For example, one bit is transferred sequentially after another bit is transferred. An example of a parallel protocol is to transfer data in a parallel manner. As an example, in the parallel protocol, a plurality of bits are transferred at the same time. In the present specification, the transfer medium and the link are used without distinction depending on the embodiment. In some embodiments, serial or parallel protocols are referred to herein as non-packeting protocols.

The system 100 includes a subsystem controller A, a subsystem controller B, and a subsystem controller C. The subsystem controller A is connected to the master controller 106 through the transfer medium 110A, the subsystem controller B is connected to the master controller 106 through the transfer medium 110B, and the subsystem controller C is connected to the master controller 106 through the transfer medium 110C. To.

In addition, each subsystem controller is connected to the corresponding subsystem through one or more corresponding physical media. The physical medium is described as a physical communication medium in US Patent Application No. 14 / 974,915. For example, subsystem controller A is connected to subsystem A through a dedicated physical medium, subsystem controller B is connected to subsystem B through a dedicated physical medium, and subsystem controller C is subordinated through a dedicated physical medium. Connected to system C.

It should be noted that the term subsystem and the term component may be used interchangeably herein in some embodiments.

Examples of subsystems are radio frequency (RF) generators, or pressure subsystems, or temperature subsystems, or gap (interval) subsystems, or gas flow subsystems, or coolant flow subsystems, or impedance matching circuits. The net is mentioned. To give an example, subsystem A is a x megahertz (MHz) high frequency (RF) generator, such as 2 MHz, subsystem B is a y megahertz RF generator, and subsystem C is a z megahertz RF. It is a generator. An example of y is 2 or 27, and an example of z is 27 or 60. In one embodiment, a kilohertz (kHz) RF generator, such as 400 kHz, is used instead of the xMHz RF generator.

The pressure subsystem includes a plurality of parts such as a pressure controller, a driver, a motor, one or more rods, a confinement ring, and the like. The pressure controller is connected to the motor through a driver, which is further connected to a confinement ring in the plasma chamber through one or more rods. The plasma chamber will be described further later. Examples of drivers include one or a group of transistors. The processor of the pressure controller sends a signal to the driver to drive the motor and rotate the rotor of the motor. Rotation of the rotor controls the amount of movement of the confinement ring through one or more rods, thus further varying the pressure in the plasma chamber.

In one embodiment, the pressure controller is an example of subsystem controller A instead of being located within the pressure subsystem, with the remaining parts of the pressure subsystem described above located within the pressure subsystem.

The temperature subsystem includes a plurality of parts such as a temperature controller, a driver, a heater, and the like. Temperature controller is connected to the heater motor through the driver. The temperature processor of the temperature controller sends a signal to the driver to generate a certain amount of current. The driver generates the above amount of current and provides that current to the heater. The heater produces heat to heat the plasma chamber.

In one embodiment, the temperature controller is an example of subsystem controller B instead of being located within the temperature subsystem, with the remaining parts of the temperature subsystem described above located within the temperature subsystem.

The gap subsystem includes parts such as a gap controller, a gap driver, a motor, and one or more rods. The gap controller is connected to the motor through a gap driver, and the motor is connected to the top electrode of the plasma chamber through one or more rods. The gap processor of the gap controller sends a signal to the driver to generate a certain amount of current, which is provided to the motor to rotate the rotor of the motor. Rotation of the rotor rotates one or more rods, thus changing the gap between the upper and lower electrodes of the plasma chamber.

In one embodiment, the gap controller is an example of subsystem controller C instead of being located within the gap subsystem, with the remaining parts of the gap subsystem described above located within the gap subsystem.

The gas flow subsystem includes a plurality of parts such as a gas flow controller, a driver, a motor, a valve, a pipe, one or more rods, a gas source, and the like. The gas source stores process gas for performing processes such as depositing a material on a substrate such as a semiconductor wafer, sputtering the material, etching, and cleaning in a plasma chamber. Examples of the process gas include oxygen-containing gas and fluorine-containing gas. The gas flow processor of the gas flow controller sends a signal to the driver, which generates an electric current to drive the motor. The motor rotates and changes the position of the valve in the tube through one or more rods, thus further achieving a certain amount of gas flow from the gas source through the tube to the plasma chamber.

In one embodiment, the gas flow controller is an example of subsystem controller A instead of being located within the gas flow subsystem, with the remaining parts of the gas flow subsystem described above located within the gas flow subsystem. doing.

In one embodiment, the electromagnetic current generated by the driver of the gas flow subsystem, instead of the motor in the gas flow subsystem, controls the amount by which the valve of the gas flow subsystem opens or closes.

The cooling flow subsystem has the same parts as that of the gas flow subsystem, except that a liquid source that stores the coolant is used instead of the gas source, and operates like the gas flow subsystem. The output of the cooling flow subsystem is connected to a component such as the upper electrode, lower electrode, upper electrode extension, lower electrode extension of the plasma chamber to supply coolant and cool the component. To.

An impedance matching network includes a plurality of parts such as an impedance matching controller, one or more drivers, one or more motors, one or more capacitors, one or more inductors, and one or more registers. The processor of the impedance matching controller causes one of the drivers to generate a signal to generate an electric current. An electric current is provided to one of the motors to rotate the rotor of that motor, thus further changing the area between one plate of one or more capacitors, thus changing the capacitance of that capacitor. Similarly, the processor of the impedance matching controller sends a signal to another one of the drivers to generate current. The current is provided to another one of the motors to rotate the rotor of that motor and thus further rotate the core of one of the inductors to change the inductance of that inductor or one of the inductors. The inductance is further changed by changing the distance between the two coils. For example, the inductance of an inductor in an impedance matching network is modified by sliding the inductor core into or out of the inductor coil. The core is attached to a motor in an impedance matching network to slide the magnetic core.

The command controller 102 is connected to an input device such as a mouse, keyboard, stylus, or touch screen through an input / output (I / O) interface. Examples of I / O interfaces include serial ports, parallel ports, and USB ports. Upon receiving a signal from the user through the input device and I / O interface, the command controller 102 has the (n + 1) th recipe set to be executed by subsystem A and the (n + 1) th to be executed by subsystem B. And the (n + 1) th recipe set to be executed by subsystem C are transmitted to the master controller 106 through the transfer medium 112. For example, the command controller should apply a communication protocol to generate a packet containing the (n + 1) th recipe set to be executed by subsystem A, apply the communication protocol, and be executed by subsystem B. Generate packets containing the (n + 1) th recipe set, apply a communication protocol, generate packets containing the (n + 1) th recipe set to be executed by subsystem C, and transfer those packets to the transfer medium. It is transmitted to the master controller 106 through 112. As another example, the command controller 102 transmits the (n + 1) th recipe set by applying a non-packeting protocol, for example in parallel or serial fashion. In some embodiments, the command controller simultaneously performs the (n + 1) th recipe set, for example, within the same clock cycle of the clock signal, at the rising edge of the clock cycle, at the falling edge of the clock cycle, and so on. It is transmitted to the master controller through the transfer medium 112.

It should be noted that in various embodiments, the (n + 1) th is used to indicate that a recipe set is the recipe set to be executed next to the nth recipe set previously sent. Is Rukoto. Here, n is an integer greater than or equal to zero. For example, the nth recipe set is transmitted prior to the transmission of the (n + 1) th recipe set. The (n + 1) th recipe set is transmitted following the transmission of the nth recipe set. In some embodiments, the nth recipe set is executed when the (n + 1) th recipe set is transmitted.

Upon receiving the (n + 1) th recipe set for subsystems A, B, and C from the command controller 102, the master controller 106 receives, for example, media access in a packet containing one of the (n + 1) th recipe sets. Identifying from a destination address, such as a control (MAC) address, determines that one of the (n + 1) th recipe sets is for subsystem A, and another of the (n + 1) th recipe sets. Identification from the destination address in the packet containing one determines that the other one of the (n + 1) th recipe set is for subsystem B, and of the (n + 1) th recipe set. Identification is made from the destination address in the packet containing yet another one to determine that yet another one of the (n + 1) th recipe set is for subsystem C. The master controller 106 transmits a packet containing the (n + 1) th recipe set for subsystem A to subsystem controller A through the transfer medium 110A and includes the (n + 1) th recipe set for subsystem B. The packet is transmitted to the subsystem controller B through the transfer medium 110B, and the packet containing the (n + 1) th recipe set for the subsystem C is transmitted to the subsystem controller C through the transfer medium 110C.

In some embodiments to which the non-packaging protocol is applied, upon receiving the (n + 1) th recipe set for subsystems A, B, and C from the command controller 102, the master controller 106 receives the (n + 1) th recipe set. From the destination address in one of the recipe sets of, one of the (n + 1) th recipe sets is identified as being for subsystem A, and in another one of the (n + 1) th recipe sets. From the destination address, identify that another one of the (n + 1) th recipe set is for subsystem B, and from the destination address in yet another one of the (n + 1) th recipe set, ( n + 1) Identify that yet another one of the th-th recipe set is for subsystem C. The master controller 106 transmits the (n + 1) th recipe set for subsystem A to subsystem controller A through the transfer medium 110A in parallel or serial fashion, and the (n + 1) th recipe set for subsystem B. The recipe set is transmitted to the subsystem controller B through the transfer medium 110B in parallel or serial mode, and the (n + 1) th recipe set for subsystem C is subordinated through the transfer medium 110C in parallel or serial mode. Send to system controller C.

The (n + 1) th recipe set for the A, B, and C subsystems is provided by the master controller 106 to the corresponding subsystem controllers A, B, and C, eg, during the first clock cycle of the clock signal. Etc. are sent at the same time. Examples of the first clock cycle include clock cycle C1 and time ts. By way of example, the (n + 1) th recipe set for the A, B, and C subsystems synchronously sends the (n + 1) th recipe set to the corresponding subsystem controllers A, B, and C. Therefore, it is transmitted during the rising edge or the falling edge of the first clock cycle. The clock signal is generated by a clock source, such as an oscillator or an oscillator with a phase-locked loop.

In one embodiment, the clock signal is generated by a clock source located within the computing device 108. In this embodiment, the clock signal is from the clock source to the command controller 102, the master controller 106, the subsystem controller A, the subsystem controller B, the subsystem controller C, and / or any of the subsystems A, B, and C. Sent to the controller or processor of.

In one embodiment, the clock signal is generated by a clock source located outside the computing device 108 and connected to the master controller 106. In this embodiment, the clock signal is from the clock source to the command controller 102, the master controller 106, the subsystem controller A, the subsystem controller B, the subsystem controller C, and / or any of the subsystems A, B, and C. Sent to the controller or processor of.

In some embodiments, the clock signal is generated by a clock source located within the master controller 106. In this embodiment, the clock signal is sourced from the clock source within the command controller 102, the processor of the master controller 106, the subsystem controller A, the subsystem controller B, the subsystem controller C, and / or the subsystems A, B, and C. Sent to any controller or processor in.

Upon receiving an input from the user through the input device, the command controller 102 generates a recipe event signal 104. An example of the recipe event signal 104 is a digital output signal or an analog output signal. The recipe event signal 104 is transmitted from the command controller 102 to the master controller 106 through the communication medium 126 and the communication medium 120, and is transmitted to the subsystem controller A through the communication medium 126, the communication medium 124, and the communication medium 122A, and is transmitted to the subsystem controller A through the communication medium 126, the communication medium 124, and the communication medium 122A. Is transmitted to the subsystem controller B through the communication medium 124 and the communication medium 122B, and is transmitted to the subsystem controller C through the communication medium 126, the communication medium 124, and the communication medium 122C. An example of a communication medium is a wire or cable, or a combination of a wired medium and a wireless medium.

The recipe event signal 104 indicates the time te of execution of the (n + 1) th recipe set by the corresponding subsystem controllers A, B, and C. For example, upon receiving the recipe event signal 104, the subsystem controller A links the (n + 1) th recipe set for subsystem A and the (n + 1) th recipe set for that subsystem A 114A. It is executed by transmitting to subsystem A through. Further, upon receiving the recipe event signal 104, the subsystem controller B links the (n + 1) th recipe set for subsystem B and the (n + 1) th recipe set for that subsystem B 114B. It is executed by transmitting to subsystem B through. Further, upon receiving the recipe event signal 104, the subsystem controller C links the (n + 1) th recipe set for subsystem A and the (n + 1) th recipe set for the subsystem C 114C. It is executed by transmitting to subsystem C through. The execution time of the (n + 1) th recipe set by the corresponding subsystem controllers A, B, and C follows the first clock cycle, eg, a second such as C2, C3, C4, C5, C6, time te. Occurs during the clock cycle of. For example, the first clock cycle precedes the second clock cycle. As another example, the second clock cycle occurs after one or more clock cycles following the first clock cycle. This one or more clock cycles precedes a second clock cycle. The second clock cycle, and any clock cycle between the first clock cycle and the second clock cycle, is the cycle of the clock signal.

The recipe event signal 104 serves to trigger execution of, for example, transmission of the (n + 1) th recipe set from the subsystem controller to the corresponding subsystem. For example, after receiving the (n + 1) th recipe set for subsystem A, subsystem controller A waits for receipt of the recipe event signal 104 from command controller 102. Upon receiving the recipe event signal 104 after waiting, the subsystem controller A immediately sends the (n + 1) th recipe set for subsystem A to subsystem A. To give an example, during the same clock cycle in which the subsystem controller A receives the recipe event signal 104 from the command controller 102, the subsystem controller A is at the (n + 1) th position for subsystem A through link 114A. Send the recipe set to subsystem A. As another example, after receiving the (n + 1) th recipe set for subsystem A, subsystem controller A waits for receipt of the recipe event signal 104 from command controller 102. During the wait time, subsystem controller A performs error checking according to the bits in the frame clock sequence (FCS) field in the packet containing the (n + 1) th recipe set for subsystem A. For example, subsystem controller A calculates a sequence from the bits of the (n + 1) th recipe set stored in the payload field of the Ethernet packet, and does the calculated sequence match the bits in the FCS field? Decide if. If it is determined that they do not match, the subsystem controller A generates an error flag and sends it to the master controller 106 and / or the command controller 102. On the contrary, if it is determined to match, the subsystem controller A transfers the Ethernet packet from the receive buffer of the subsystem controller A to the transmit buffer of the subsystem controller A, and waits for the reception of the recipe event signal 104. During the clock cycle in which the recipe event signal is received, the subsystem controller A transmits an Ethernet packet to the subsystem A, for example, by transmitting it.

The recipe event signal 104 instructs the execution of the (n + 1) th recipe set. For example, when a recipe event signal 104 is received from the command controller 102 or master controller 106 by the subsystem controller, for example during a clock cycle, the subsystem controller processes the (n + 1) th recipe set for processing. Send to the corresponding subsystem.

The recipe event signal 104 indicates the immediate activation of recipe set processing when received by the subsystem controller for the subsystem. For example, when the recipe event signal 104 is received from the command controller 102 or the master controller 106 by the subsystem controller A at some point, such as during a clock cycle, the subsystem controller A clock cycles, for example, during the same clock cycle. Immediately during the rising edge of the clock cycle, during the falling edge of the clock cycle, etc., the (n + 1) th recipe set for the corresponding subsystem is sent for processing by that subsystem.

An example of a communication scheme between a subsystem controller and a corresponding subsystem is provided in US Patent Application No. 14 / 974,915. For example, the communication protocol is applied by subsystem controller A to transfer the (n + 1) th recipe set for subsystem A to subsystem A through link 114A. As another example, the communication protocol is applied by subsystem controller B to transfer the (n + 1) th recipe set for subsystem B to subsystem B through link 114B.

Upon receiving the (n + 1) th recipe set for the subsystem, the subsystem processes the (n + 1) th recipe set for the subsystem to facilitate the processing of the substrate. For example, when subsystem A is an RF generator, a processor such as a processor PA of the RF generator transmits an RF signal of a certain amount and frequency to the driver and amplifier of the RF signal. The driver generates a current signal from the signal received from the processor, and the amplifier amplifies the current signal to generate an amplified current signal. The amplified current signal is provided to the RF power supply to generate an RF signal having the above electric energy and frequency. The above electric energy and frequency are in the (n + 1) th recipe set for subsystem A. As another example, when subsystem B is a pressure subsystem, a processor, such as the pressure controller processor PB, drives the motor of the pressure subsystem to rotate the rotor of the motor, the driver of the pressure subsystem. Send a signal to. Rotation of the rotor controls the amount of movement of the confinement ring, thus providing a certain amount of pressure in the plasma chamber. The above pressure magnitudes are provided in the (n + 1) th recipe set for subsystem B. As yet another example, when subsystem C is a temperature subsystem, a temperature processor, such as a processor PC, sends a signal to the temperature subsystem driver to generate a certain amount of current. To do. The driver generates the above amount of current and provides that current to the heater. Upon receiving the electric current, the heater generates heat to heat the plasma chamber, bringing the inside of the plasma chamber to a certain temperature. The above temperatures are provided in the (n + 1) th recipe set for subsystem C.

As another example, when subsystem A is a gap subsystem, the gap processor, such as the processor PA of the gap controller, signals the gap subsystem driver to generate a certain amount of current. The generated current is provided to the motor of subsystem A to rotate the rotor of the motor. Rotation of the rotor rotates one or more rods of subsystem A to achieve a gap of some size between the upper and lower electrodes. The above gap size is provided in the (n + 1) th recipe set for subsystem A. As yet another example, when subsystem B is a gas flow subsystem, a gas flow processor, such as a gas flow controller, eg processor PB, sends a signal to the driver, which drives the motor of subsystem B. Generate a current to do. The rotor of the motor rotates to change the position of the valve, thus further providing a certain amount of gas flow from the gas source of subsystem B through the tube of subsystem B to the plasma chamber. The amount of gas flow described above is provided in the (n + 1) th recipe set for subsystem B.

As another example, when the subsystem C is the impedance matching network, Lee processor such as impedance matching network, for example, the processor PC in order to generate a current signal to one of the impedance matching network driver To send. The current is provided to one of the motors in the impedance matching network to rotate the rotor of that motor, thus further varying the area between one plate of one or more capacitors in the impedance matching network. To make the capacitor a certain capacitance. Similarly, the impedance matching network processor sends a signal to another driver in the impedance matching network to generate the current . The current is provided to another motor in the impedance matching network to rotate the rotor of that motor, and thus to change the position of the core of the inductor in the impedance matching network to make the inductor. Inductance. Capacitance and inductance are provided in the (n + 1) th recipe set for subsystem C.

It should be noted that although FIG. 1A-1 shows three subsystems A, B, and C, in one embodiment any number of subsystems are used. For example, instead of three subsystems, two subsystems and two corresponding subsystem controllers are used. As another example, one subsystem and one subsystem controller are used.

In one embodiment, the command controller 102, master controller 106, subsystem controller A, subsystem controller B, and subsystem controller C include one or more transceivers, which implement a gigabit physical layer. One or more transceivers are used to send and receive packets.

In some embodiments, the controller transceiver is connected to the controller processor.

In some embodiments, the functions described herein as performed by the controller are performed by the processor of the controller.

In various embodiments, a recipe event signal 1 0 4 is transmitted to the subsystem controller A through the first transfer medium similar to transfer medium 110A. The first transfer medium connects the command controller 102 to the subsystem controller A. Further, recipes event signal 1 0 4 is transmitted to the subsystem controller B through a second transfer medium similar to transfer medium 110B. The second transfer medium connects the command controller 102 to the subsystem controller B. Further, recipes event signal 1 0 4 is transmitted to the subsystem controller A through the third transfer medium similar to transfer media 110C. The third transfer medium connects the command controller 102 to the subsystem controller C.

In some embodiments, subsystem controller A sends confirmation of receipt of each recipe set, such as the (n + 1) th recipe set, to master controller 106 through transfer medium 110A, which causes master controller 106 to confirm. Upon receiving the reception, the confirmation is transmitted to the command controller 102 through the transfer medium 112. Similarly, the subsystem controller B transmits confirmation of reception of each recipe set such as the (n + 1) th recipe set to the master controller 106 through the transfer medium 110B, and the master controller 106 receives the confirmation. , The confirmation is transmitted to the command controller 102 through the transfer medium 112. Further, the subsystem controller C transmits confirmation of reception of each recipe set such as the (n + 1) th recipe set to the master controller 106 through the transfer medium 110C, and the master controller 106 receives the confirmation and receives the confirmation. The confirmation is transmitted to the command controller 102 through the transfer medium 112.

In various embodiments, the confirmation is sent by the subsystem to the master controller 106 after receiving the recipe set. For example, one confirmation is sent by the subsystem controller to the master controller 106 after receiving the (n + 1) th recipe set, and another confirmation is sent by the subsystem controller after receiving the (n + 2) th recipe set to the master. It is transmitted to the controller 106, and so on.

In some embodiments, the recipe set is transmitted as a payload in a packet, and each recipe set is transmitted in a different packet. For example, the (n + 1) th recipe set is transmitted in the (n + 1) th packet, and the (n + 2) th recipe set is transmitted in the (n + 2) th packet. The (n + 2) th packet follows the (n + 1) th packet.

FIG. 1A-2 is a diagram of an embodiment of system 150 that is similar to system 100 of FIG. 1A-1 except that subsystems A, B, and C are not shown. System 150 is used to explain that links 110A, 110B, and 110C are links to which the communication protocol is applied. For example, an Ethernet packet containing the (n + 1) th recipe set for subsystems A, B, and C is communicated from the master controller 106 to the corresponding subsystem controllers A, B, and C, which are slave controllers. ..

FIG. 1B-1 is an implementation of system 160 for explaining synchronization between subsystem controllers A, B, and C and the master controller 106 without receiving an input signal from the user through the input device. It is a figure of a form. During the first clock, the master controller 106 transmits the (n + 1) th recipe set for subsystem A to subsystem controller A through the communication medium 110A and the (n + 1) th recipe set for subsystem B. The recipe set is transmitted to the subsystem controller B through the communication medium 110B, and the (n + 1) th recipe set for subsystem C is transmitted to the subsystem controller C through the communication medium 110C. For example, the master controller 106 applies a communication protocol to generate a packet containing the (n + 1) th recipe set for subsystem A, which is the first clock cycle of the clock signal, eg cycle C1. It is transmitted to the subsystem controller A through the transfer medium 110A. As another example, master controller 106 applies a communication protocol to generate a packet containing the (n + 1) th recipe set for subsystem B, which is then delivered during the first clock cycle of the clock signal. , Transmit to the subsystem controller B through the transfer medium 110B. Yet another example, the master controller 106 applies a communication protocol to generate a packet containing the (n + 1) th recipe set for subsystem C, which is the first clock signal. During the clock cycle of, transmission is performed to the subsystem controller C through the transfer medium 110C. As another example, the master controller 106 applies a non-packetized communication protocol and transmits the (n + 1) th recipe set to subsystem controller A through the transfer medium 110A in a serial or parallel manner, and the non-packetized communication protocol. Is applied, the (n + 1) th recipe set is transmitted to the subsystem controller B through the transfer medium 110B by the serial method or the parallel method, the non-packet communication protocol is applied, and the (n + 1) th recipe set is serialized. Alternatively, it is transmitted to the subsystem controller C through the transfer medium 110C in a parallel manner.

Upon receiving the (n + 1) th recipe set from the master controller 106, subsystem controllers A, B, and C receive the (n + 1) th recipe set before transmitting it to the corresponding subsystems A, B, and C. Waits for the receipt of the recipe event signal 104. The master controller 106 generates a recipe event signal 104, and transmits the recipe event signal 104 to the subsystem controller A through the communication medium 162 and the communication medium 164A. Further, the master controller 106 transmits the recipe event signal 104 to the subsystem controller B through the communication medium 162 and the communication medium 164B, and transmits the recipe event signal 104 to the subsystem controller C through the communication medium 162 and the communication medium 164C. .. The recipe event signal 104 indicates the time of execution of the (n + 1) th recipe set by the subsystem controllers A, B, and C. The master controller 106 transmits a recipe event signal 104 to subsystem controllers A, B, and C during a second clock cycle, such as a clock signal such as clock cycle C2.

The execution time of the (n + 1) th recipe set by the subsystem controllers A, B, and C is the time when the recipe event signal 104 is received from the master controller 106 by the subsystem controllers A, B, and C. For example, during a clock cycle such as clock cycle C2 in which the recipe event signal 104 is received by subsystem controllers A, B, and C, subsystem controllers A, B, and C select the (n + 1) th recipe set. Execute.

Subsystem controllers A, B, and C execute the (n + 1) th recipe set by transmitting the (n + 1) th recipe set to the corresponding subsystems A, B, and C. For example, upon receiving the recipe event signal 104, the subsystem controller A immediately sends the (n + 1) th recipe set for subsystem A through link 114A to subsystem A. By way of example, during clock cycle C2 when the recipe event signal 104 is received, subsystem controller A processes the (n + 1) th recipe set for subsystem A through link 114A for processing by subsystem A. Send to subsystem A. As another example, upon receiving the recipe event signal 104, subsystem controller B immediately subsubscribes the (n + 1) th recipe set for subsystem B through link 114B for processing by subsystem B. Send to system B. By way of example, during clock cycle C2 when the recipe event signal 104 is received, subsystem controller B transmits the (n + 1) th recipe set for subsystem B through link 114 B to subsystem B. As yet another example, upon receiving the recipe event signal 104, subsystem controller C immediately processes the (n + 1) th recipe set for subsystem C through link 114C for processing by subsystem C. Send to subsystem C. For example, during clock cycle C2 when the recipe event signal 104 is received, subsystem controller C transmits the (n + 1) th recipe set for subsystem C through link 114C to subsystem C.

In various embodiments, a recipe event signal 1 0 4 are sent from the master controller 106 through the transfer medium 110A to the subsystem controller A. Further, recipes event signal 1 0 4 is transmitted from the master controller 106 through the transfer medium 110B to the subsystem controller B, sent from the master controller 106 through the transfer medium 110C to the subsystem controller C.

FIG. 1B-2 is a diagram of an embodiment of system 180 that is similar to system 160 in FIG. 1B-1 except that subsystems A, B, and C are not shown. System 180 is used to explain that links 110A, 110B, and 110C apply the communication protocol. For example, a packet containing the (n + 1) th recipe set for subsystems A, B, and C is communicated from the master controller 106 to the corresponding subsystem controllers A, B, and C, which are slave controllers. Further, the recipe event signal 104 is generated by the master controller 106 and transmitted to the subsystem controllers A, B, and C.

FIG. 1C is a diagram of an embodiment of system 190 for explaining synchronization of subsystems A, B, and C according to a recipe event signal received from the master controller 106. The master controller 106 is connected to subsystem A through transfer medium 172A, to subsystem B through transfer medium 172B, and to subsystem C through transfer medium 172C. Further, the master controller 106 is connected to subsystem A through communication medium 192 and communication medium 194A, is connected to subsystem B through communication medium 192 and communication medium 194B, and is connected to subsystem C through communication medium 192 and communication medium 194C. Will be done.

The master controller 106 transmits the (n + 1) th recipe set for execution and processing by subsystem A to the processor PA of subsystem A, and the (n + 1) th recipe set for execution and processing by subsystem B. Is transmitted to the processor PB of subsystem B, and the (n + 1) th recipe set for execution and processing by subsystem C is transmitted to the processor PC of subsystem C. For example, the master controller 106 applies a communication protocol to generate a packet containing the (n + 1) th recipe set for subsystem A and sends the packet through transfer medium 172A to subsystem A. The (n + 1) th recipe set for system A is transmitted through transfer medium 172A. As another example, the master controller 106 applies a communication protocol to generate a packet containing the (n + 1) th recipe set for subsystem B and sends the packet through transfer medium 172B to subsystem B. Transmits the (n + 1) th recipe set for subsystem B through transfer medium 172B. As another example, the master controller 106 applies a communication protocol to generate a packet containing the (n + 1) th recipe set for subsystem C and transmits the packet to subsystem C through transfer medium 172C. Transmits the (n + 1) th recipe set for subsystem C through transfer medium 172C. As yet another example, the master controller 106 transmits the (n + 1) th recipe set for subsystem A through transfer medium 172A to subsystem A in serial or parallel fashion, and in serial or parallel fashion. The (n + 1) th recipe set for subsystem B is transmitted through transfer medium 172B to subsystem B, and the (n + 1) th recipe set for subsystem C is transmitted through transfer medium 172C in a serial or parallel manner. Send to subsystem C. Transmission of the (n + 1) th recipe set to subsystems A, B, and C occurs during the first clock cycle of the clock signal, such as time ts or clock cycle C1. For example, the (n + 1) th recipe set is transmitted during the rising or falling edge of the first clock cycle.

Upon receiving the (n + 1) th recipe set, the processors PA, PB, and PC transmit parameters identified using, for example, the recipe set and / or the recipe set to the corresponding parts of subsystems A, B, and C. Waits for the receipt of the recipe event signal 104 before executing the recipe set such as. For example, during the wait time, processor PA parses a packet containing the (n + 1) th recipe set for subsystem A and extracts the (n + 1) th recipe set from that packet. To unpacket. A communication protocol is applied to depacketize packets. Further, the processor PA identifies one or more parameters from the mapping of one or more variables in the (n + 1) th recipe set for subsystem A and one or more parameters. The mapping between one or more variables in the (n + 1) th recipe set for subsystem A and one or more parameters is stored in the memory device of subsystem A. An example of a parameter is the amount of current. Examples of variables are the frequency of the RF signal and / or the power of the RF signal, or the pressure in the plasma chamber, or the gas flow into the plasma chamber, the temperature in the plasma chamber, or between the upper and lower electrodes. Examples include the gap, the capacitance of the capacitor in the impedance matching network, and the inductance of the inductor in the impedance matching network. By way of example, the processor PA identifies the current that should be provided to the driver of subsystem A to generate an RF signal with a certain amount of power or frequency. As another example, the processor PA is in the plasma chamber to form a gap of some size between the upper and lower electrodes, or to achieve some pressure in the plasma chamber. To achieve temperature, or to achieve a certain flow of gas flow into the plasma chamber, to make the capacitors in the impedance matching network a certain capacitance, or to make some inductors in an impedance matching network. Identify the current that should be provided to the driver of subsystem A for inductance.

Similarly, during the wait period, the processor PB parses a packet containing the (n + 1) th recipe set for subsystem B and extracts the (n + 1) th recipe set from the packet. Depacketize packets. Further, the processor PB identifies one or more parameters from the mapping of one or more variables in the (n + 1) th recipe set for subsystem B and one or more parameters. The mapping between one or more variables in the (n + 1) th recipe set for subsystem B and one or more parameters is stored in the memory device of subsystem B. Also, during the wait period, the processor PC parses the packet containing the (n + 1) th recipe set for subsystem C and extracts the (n + 1) th recipe set from the packet to extract the packet. To unpacket. Further, the processor PC identifies one or more parameters from the mapping of one or more variables in the (n + 1) th recipe set for subsystem C and one or more parameters. The mapping between one or more variables in the (n + 1) th recipe set for subsystem C and one or more parameters is stored in the memory device of subsystem C.

In one embodiment, from parsing the packet by the subsystem processor, extracting the (n + 1) th recipe set from the packet, and mapping to one or more variables in the extracted (n + 1) th recipe set. The identification of one or more parameters of is performed by the processor after the recipe event signal 104 is received, not during the waiting time waiting for the recipe event signal 104 to be received.

In some embodiments where the depacketization protocol is applied, depacketization must be performed by processors PA, PB, and PC to parse the packet and extract the (n + 1) th recipe set from the packet. There is no.

The master controller 106 generates the recipe event signal 104. The recipe event signal 104 is transmitted from the master controller 106 to the processor PA through the communication media 192 and 194A, is transmitted from the master controller 106 to the processor PB through the communication media 192 and 194B, and is transmitted from the master controller 106 to the processor PC through the communication media 192 and 194C. Will be sent to.

The recipe event signal 104 indicates the time te of execution of the (n + 1) th recipe set by the processors PA, PB, and PC. The execution time is the time when the recipe event signal 104 is received by the processors PA, PB, and PC. For example, upon receiving the recipe event signal 104, the processors PA, PB, and PC send the (n + 1) th recipe set to the drivers of the corresponding subsystems A, B, and C to signal one of the subsystems. By driving the unit, it executes immediately. Sending a signal to the corresponding driver is an example of the execution of the (n + 1) th recipe set by the processors PA, PB, and PC. By way of example, upon receiving the recipe event signal 104, the processor PA immediately sends a signal to the driver of subsystem A such that subsystem A produces an RF signal with a certain amount and / or frequency. To do. The signal contains a parameter value identified from the mapping stored in subsystem A. As another example, the recipe event signal acts as a trigger for the processor PA to send a signal to the driver of subsystem A, for example a start signal, which is identified from the mapping stored in subsystem A. Contains the parameter values to be used. As an example, during the same clock cycle, such as clock cycle C2, where the recipe event signal 104 is received by processor PA and / or transmitted to processor PA by master controller 106, processor PA is a driver of subsystem A. Send a signal to. This signal contains a parameter value identified from the mapping stored in subsystem A.

As another example, upon receiving the recipe event signal 104, the processor PB sends a signal to the driver of subsystem B to achieve some pressure or temperature in the plasma chamber. The signal contains a parameter value identified from the mapping stored in subsystem B. As another example, the recipe event signal acts as a trigger for the processor PB to send a signal to the driver of subsystem B, such as a start signal, which is identified from the mapping stored in subsystem B. Contains the parameter values to be used. As another example, during the same clock cycle, such as clock cycle C2, where the recipe event signal 104 is received by processor PB, processor PB sends a signal to the driver of subsystem B. This signal contains a parameter value identified from the mapping stored in subsystem B.

Still another example, upon receiving the recipe event signal 104, the processor PC sends a signal to the driver of subsystem C to achieve a large gap between the upper and lower electrodes. .. The signal contains a parameter value identified from the mapping stored in subsystem C. As another example, the recipe event signal acts as a trigger for the processor PC to send a signal to the driver of subsystem C, such as a start signal, which signal is identified from the mapping stored in subsystem C. Contains the parameter values to be used. As another example, during the same clock cycle, such as clock cycle C2, where the recipe event signal 104 is received by the processor PC, the processor PC transmits the signal to the driver of subsystem C. This signal contains a parameter value identified from the mapping stored in subsystem C.

Signals from processors PA, PB, and PC are transmitted to the drivers of the corresponding subsystems A, B, and C during a second clock cycle, such as clock cycle C2 or time te. The second clock cycle follows the first clock cycle. For example, the first clock cycle precedes the second clock cycle. As another example, the second clock cycle occurs after one or more clock cycles following the first clock cycle. This one or more clock cycles precedes a second clock cycle. The second clock cycle, and any clock cycle between the first clock cycle and the second clock cycle, is the cycle of the clock signal.

The recipe event signal 104 instructs the execution of the (n + 1) th recipe set. For example, at a time when a recipe event signal 104 from the master controller 106 is received by the subsystem processor, for example during a clock cycle, the processor processes the parameters identified based on the (n + 1) th recipe set. To send to the subsystem driver. As an example, the driver of a subsystem uses a signal received from a processor of the subsystem to realize a certain pressure in the plasma chamber and a certain flow of gas flow into the plasma chamber. Achieve a certain temperature inside, form a gap of a certain size between the upper electrode and the lower electrode, make the capacitor of the impedance matching network a certain capacitance, or make the inductor of the impedance matching network a certain capacitance. It is processed by driving the motor so that the inductance becomes the same. As another example, the driver of an RF generator generates a drive signal for the signal received from the digital signal processor (DSP) of the RF generator to promote the generation of an RF signal having a certain electric energy and frequency. Process by. The RF signal is generated by the RF power supply of the RF generator. The RF power supply is connected to the driver. In some embodiments, the RF power supply is connected to the driver through an amplifier, which amplifier amplifies the current signal generated by the driver and provides the amplified current signal to the RF power supply. The RF power supply receives the amplified current signal and generates the RF signal.

The recipe event signal 104, when received by the subsystem processor, indicates the immediate activation of the recipe set execution by the processor. For example, when the recipe event signal 104 is received from the master controller 106 by the processor PA at some point, for example during a clock cycle, the processor PA immediately for subsystem A, for example during the same clock cycle. A signal for realizing the variable extracted from the (n + 1) th recipe set is sent to the subsystem driver.

In some embodiments, the "first clock cycle" described above with reference to FIGS. 1A-1 and 1B-1 and the "first clock cycle" described above with reference to FIG. 1C. There is no connection between them. Similarly, the association between the "second clock cycle" described above with reference to FIGS. 1A-1 and 1B-1 and the "second clock cycle" described above with reference to FIG. 1C. There is no. The "first clock cycle" described with reference to FIG. 1C is irrelevant to the "first clock cycle" described with reference to FIGS. 1A-1 and 1B-1 and similarly. The "second clock cycle" described with reference to FIG. 1C is irrelevant to the "second clock cycle" described with reference to FIGS. 1A-1 and 1B-1.

In one embodiment, instead of the reception and transmission described above as performed by the processors PA, PB, and PC, the transceivers of subsystems A, B, and C each perform their reception and transmission. Processors PA, PB, and PC perform the remaining operations described above related to identifying parameters from subsystem memory devices based on received variables contained in the (n + 1) th recipe set. .. Subsystem transceivers are connected to subsystem processors. The transceiver implements the physical layer for executing the communication protocol.

In various embodiments, the recipe event signal 104 is transmitted from the master controller 106 to subsystem A through transfer medium 172A. Further, the recipe event signal 104 is transmitted from the master controller 106 to the subsystem B through the transfer medium 172B, and is transmitted from the master controller 106 to the subsystem C through the transfer medium 172C.

In some embodiments, the processor PA transmits confirmation of receipt of each recipe set, such as the (n + 1) th recipe set, to the master controller 106 through transfer medium 172A. Similarly, subsystem B transmits confirmation of receipt of the recipe set to master controller 106 through transfer medium 172B. Further, the subsystem controller C transmits the confirmation of receipt of the recipe set to the master controller 106 through the transfer medium 172C.

In various embodiments, the confirmation is sent by the subsystem to the master controller 106 after receiving the recipe set. For example, a confirmation is sent by the subsystem to the master controller 106 after receiving the (n + 1) th recipe set, and another confirmation is sent by the subsystem to the master controller 106 after receiving the (n + 2) th recipe set. And so on.

FIG. 1D is a diagram of an embodiment of system 190 for explaining synchronization between subsystem controllers A, B, and C and subsystems A, B, and C. Processors PA, PB, and PC receive the (n + 1) th recipe set from the corresponding subsystem controllers A, B, and C during a first clock cycle, such as cycle C1 or time ts. For example, processor PA receives the (n + 1) th recipe set for subsystem A from subsystem controller A, and processor PB receives the (n + 1) th recipe set for subsystem B from subsystem controller B. The processor PC receives the (n + 1) th recipe set for subsystem C from subsystem controller C.

In some embodiments, subsystem controllers A, B, and C transmit the (n + 1) th recipe set to the corresponding subsystems A, B, and C by subsystem controllers A, B, and C. to synchronize, for example, master controller 106, another controller, such as a command controller 102 (FIG. 1A-1) or, for example an oscillator and, from a clock source such as an oscillator with a phase locked loop, a clock signal Provided. In various embodiments, the clock source is located within one subsystem controller of subsystem controllers A, B, and C and of subsystem controllers A, B, and C through one or more communication media. Connected to the rest of the subsystem controller.

Processor PA, PB, and PC, for example from another controller, such as master controller 106 or the command controller 102 to recipe event signal 104 is received, (n + 1) -th one or more parameters identified from the recipe set Waits to be sent to the corresponding subsystems A, B, and C drivers. It should be noted that the other controller transmits the recipe event signal 104 to the processor PA through one or more communication media, to the processor PB through one or more communication media, and to the processor PC through one or more communication media. It is to be. Upon receiving the recipe event signal 104, the processor PA transmits a signal containing the parameters identified using the mapping stored in the memory device of subsystem A to the driver of subsystem A. For example, during a second clock cycle, such as clock cycle C or time te, where the recipe event signal 104 is received by processor PA, processor PA was identified using a mapping stored in subsystem A. A signal containing the parameters is sent to the driver of subsystem A. Further, upon receiving the recipe event signal 104, the processor PB sends a signal containing the parameters identified using the mapping stored in the memory device of subsystem B to the driver of subsystem B. For example, during a second clock cycle in which the recipe event signal 104 is received by the processor PB, the processor PB sends a signal containing the parameters identified using the mapping stored in subsystem B to subsystem B. Send to the driver. Further, upon receiving the recipe event signal 104, the processor PC transmits a signal including the parameter identified by using the mapping stored in the memory device of the subsystem C to the driver of the subsystem C. For example, during a second clock cycle in which the recipe event signal 104 is received by the processor PC, the processor PC sends a signal containing the parameters identified using the mapping stored in subsystem A to subsystem C. Send to the driver. The recipe event signal 104 functions as a trigger, for example, activation for transmitting a signal including parameter values from the processors PA, PB, and PC to the corresponding drivers of the corresponding subsystems A, B, and C, respectively.

It should be noted that in some embodiments, the "first clock cycle" described above with reference to FIGS. 1A-1 and 1B-1 or 1C and the "first clock cycle" described above with reference to FIG. 1D. There is no relevance to the "first clock cycle". Similarly, between the "second clock cycle" described above with reference to FIGS. 1A-1 and 1B-1 or 1C and the "second clock cycle" described above with reference to FIG. 1D. Is not relevant. The "first clock cycle" described with reference to FIG. 1D is irrelevant to the "first clock cycle" described with reference to FIGS. 1A-1 and 1B-1 or FIG. 1C. Similarly, the "second clock cycle" described with reference to FIG. 1D is independent of the "second clock cycle" described with reference to FIGS. 1A-1 and 1B-1 or FIG. 1C. Is.

In some embodiments, the processor PA transmits a confirmation of receipt of each recipe set, such as the (n + 1) th recipe set, to the subsystem controller A through the transfer medium 114A. Similarly, the processor PB transmits a confirmation of receipt of the recipe set to the subsystem controller B through the transfer medium 114B. Further, the processor PC transmits the confirmation of receipt of the recipe set to the subsystem controller C through the transfer medium 114C.

In various embodiments, the confirmation is transmitted by the subsystem to the corresponding subsystem controller connected to that subsystem. Confirmations are sent after receiving each recipe set. For example, a confirmation is sent by the processor PA of subsystem A to subsystem controller A after receiving the (n + 1) th recipe set, and another confirmation is sent by the processor PA after receiving the (n + 2) th recipe set. It is transmitted to the subsystem controller A, and so on.

FIG. 1E is a diagram of an embodiment of system 151 for showing synchronization between a user interface (UI) computer 153 and RF generator controllers 155A, 155B, and 155C. The UI computer 153 is an example of the computing device 108 of FIG. 1A-1. Further, the RF generator controller 155A is an example of the subsystem controller A (FIG. 1A-1), and the RF generator controller 155B is an example of the subsystem controller B (FIG. 1A-1), and the RF generator controller controller. Reference numeral 155C is an example of subsystem controller C (FIG. 1A-1). System 151 further includes RF generators 1, 2, and 3. The RF generator 1 is displayed as RFG1, the RF generator 2 is displayed as RFG2, and the RF generator 3 is displayed as RFG3. The RF generator 1 is an example of an xMHz RF generator, the RF generator 2 is an example of a yMHz RF generator, and the RF generator 3 is an example of a zMHz RF generator.

The function of system 151 will be described with reference to FIG. 2B. As shown in FIG. 2B, the UI computer 153 masters by applying the Ethernet protocol and the Transmission Control Protocol (TCP) / Internet Protocol (IP) or User Datagram Protocol (UDP) / IP through the transfer medium. The (n + 1) th recipe set is transmitted to the master controller 106 through the master controller. In one embodiment, system 151 excludes the master-master controller. In one embodiment, the master controller 106 implements the functions performed by the master-master controller.

The master controller 106 sends the (n + 1) th recipe set for the RF generator 2 to the RF generator controller 155A in order to send the (n + 1) th recipe set for the RF generator 1 to the RF generator controller 155A. Apply the TCP / IP protocol or UDP / IP protocol and the Ethernet protocol to send the (n + 1) th recipe set for RF generator 3 to RF generator controller 155C to send to 155B. .. For example, returning to FIG. 1E, the (n + 1) th recipe set for RF generator 1 is transmitted from master controller 106 through switch 157 to RF generator controller 155A. As another example, as shown in FIG. 1E, the (n + 1) th recipe set for RF generator 2 is transmitted from master controller 106 through switch 157 to RF generator controller 155B. Still another example, as shown in FIG. 1E, the (n + 1) th recipe set for the RF generator 3 is transmitted from the master controller 106 through the switch 157 to the RF generator controller 155C. An example of Switch 157 is described in US Patent Application No. 14 / 974,915.

Referring to FIG. 2B, when the RF generator controllers 155A, 155B, and 155C receive the (n + 1) th recipe set from the master controller 106, the RF generator controllers 1, 2, 2, which correspond to the (n + 1) th recipe set. And 3 Before the transmission, the reception of the recipe event signal 104 from the UI computer 153 is awaited. Returning to FIG. 1E, a signal generator 159 such as a digital pulse signal generator, an analog pulse signal generator, and a processor is connected to the UI computer 153 through an input / output interface (I / O). The signal generator 159 generates a general purpose I / O (GPIO) signal such as a digital signal or an analog signal, and uses the signal as a correspondence between the master-master controller and the corresponding RF generator controllers 155A, 155B, and 155C. Provided to RF generator controllers 155A, 155B, and 155C through GPIO pins. The GPIO signal is an example of the recipe event signal 104. In some embodiments, the signal generator 159 is located within the UI computer 153. In some embodiments, the GPIO signal is generated when an input, such as a selection or click, is received by the UI computer 153 through an input device from the user. The input device is a peripheral device connected to the UI computer 153.

Referring to FIG. 2B, upon receiving the GPIO signal, the RF generator controller 155A applies the Ethernet protocol and the UDP / IP protocol, for example, during the same clock cycle as the reception of the GPIO signal. The (n + 1) th recipe set for RF generator 1 is transmitted to RF generator 1, and RF generator controller 155B applies Ethernet protocol and UDP / IP protocol to (n + 1) for RF generator 2. The n + 1) th recipe set is transmitted to the RF generator 2, and the RF generator controller 155C applies the Ethernet protocol and the UDP / IP protocol to RF the (n + 1) th recipe set for the RF generator 3. It is transmitted to the generator 3.

FIG. 2A-1 is an embodiment of timing diagram 200 for explaining synchronization between the transmission of the (n + 1) th recipe set to the controller and the time of execution of the recipe set by the controller. Timing diagram 200 shows a series of 202A in which the (n + 1) th packet, the (n + 2) th packet, and the (n + 3) th packet are transmitted from the master controller 106 to the subsystem controller A (FIG. 1A-1). There is. Further, the timing diagram 200 shows a series of 202B in which the (n + 1) th packet, the (n + 2) th packet, and the (n + 3) th packet are transmitted from the master controller 106 to the subsystem controller B (FIG. 1A-1). Shown. Further, the timing diagram 200 shows a series of 202Cs in which the (n + 1) th packet, the (n + 2) th packet, and the (n + 3) th packet are transmitted from the master controller 106 to the subsystem controller C (FIG. 1A-1). Shown.

In one embodiment described with reference to FIG. 1C, a series of 202A packets are transmitted from the master controller 106 to subsystem A, a series of 202B packets are transmitted from the master controller 106 to subsystem B, and the series 202C. Packet is transmitted from the master controller 106 to subsystem C.

In one embodiment described with reference to FIG. 1D, a series of 202A packets are transmitted from subsystem controller A to subsystem A, and a series of 202B packets are transmitted from subsystem controller B to subsystem B. A series of 202C packets is transmitted from the subsystem controller C to the subsystem C.

The timing diagram 200 further includes a pulse signal 204A, which is an example of the recipe event signal 104. The timing diagram 200 includes a clock signal 202, which is a clock source located outside the master controller 106, or the command controller 102, or the master controller 106, or a clock source located outside the command controller 102. Is generated by (Fig. 1A-1).

In some embodiments, the pulse at time te1 of the pulse signal 204A is an example of the recipe event signal 104.

At time ts1, one or more controllers transmit the (n + 1) th packet for subsystems A, B, and C, as described herein. At execution time te1, as described herein, a digital pulse is received by one or more controllers to indicate that the (n + 1) th packet is being executed. Further, at time ts2, which occurs at the same time as time te1, the (n + 2) th packet for subsystems A, B, and C is transmitted by one or more controllers, as described herein. During execution time te2, as described herein, a digital pulse is provided to indicate that the (n + 2) th packet is being executed by one or more controllers as described herein. Received by one or more controllers. Further, at time ts3, which occurs at the same time as time te2, the (n + 3) th packet for subsystems A, B, and C is transmitted by one or more controllers, as described herein. During the execution time te3, a digital pulse is received by the one or more controllers to indicate that the (n + 3) th packet is executed by the one or more controllers, as described herein. ..

In some embodiments, a processor, such as a processor PA, or processor PB, or processor PC, is positioned within the controller.

It should be noted that the time ts1 occurs during the first clock cycle C1 of the clock signal 202, the times te1 and ts2 occur during the second clock cycle C2 of the clock signal 202, and the times te2 and ts3 , Occurs during the third clock cycle C3 of the clock signal 202, and the time te3 occurs during the fourth clock cycle C4 of the clock signal 202.

It should be further noted that in some embodiments, the first clock cycle described with reference to FIGS. 1A-1, 1B-1, 1C, and 1D is FIG. 2A-1. It is an example of the first clock cycle described with reference to. Further, in these embodiments, the 21st clock cycle described with reference to FIGS. 1A-1, 1B-1, 1C, and 1D will be described with reference to FIG. 2A-1. This is an example of the second clock cycle performed.

It should be noted that in various embodiments, the size of the packet shown in FIG. 2A-1 varies. For example, the (n + 1) th packet in the sequence 202A for subsystem A has a payload smaller or larger in size than the (n + 1) th packet in the sequence 202B for subsystem B. Further, the (n + 1) th packet in the sequence 202B for subsystem B has a smaller or larger payload than the (n + 1) th packet in the sequence 202C for subsystem C.

FIG. 2A-2 shows that the execution time of the packet by the controller changes from the time when the packet is received by the controller to the time when the digital pulse indicating that the packet is executed is received after that. Is an embodiment of the timing diagram 210 for explaining the above. The digital pulse is a pulse of the digital pulse signal 212, which is an example of the recipe event signal 104. In some embodiments, the pulse of the pulse signal 212 at time te1 is an example of the recipe event signal 104.

As shown in the timing diagram, the execution time te2 shown in FIG. 2A-2 occurs before the execution time te2 shown in the timing diagram 200 (FIG. 2A-1). For example, the execution time te2 shown in FIG. 2A-2 does not occur at the same time as the time ts3, but occurs before the ts3 occurs. As another example, the execution time te2 occurs between the time when the (n + 2) th packet is received and the time when the reception of the (n + 3) th packet ends.

In some embodiments, the execution time te1 shown in FIG. 2A-2 occurs before the execution time te1 shown in timing diagram 200 (FIG. 2A-1). For example, the execution time te1 shown in FIG. 2A-2 does not occur at the same time as the time ts2, but occurs before the ts2 occurs. As another example, the execution time te1 occurs between the time when the (n + 1) th packet is received and the time when the reception of the (n + 2) th packet ends.

In some embodiments, the digital pulse of the pulse signal 212 is transmitted within a predetermined time interval after receiving confirmation of receipt of those recipe sets from all controllers that have received the recipe sets. For example, the digital pulse of the pulse signal 212 is transmitted between the reception of confirmation of reception of the (n + 1) th recipe set and the reception of confirmation of reception of the (n + 2) th recipe set. To give an example, the command controller 102 receives confirmation of receipt of the (n + 1) th recipe set from subsystem controllers A, B, and C through the master controller 106, and then at time te1 within a predetermined time interval. The first digital pulse of the recipe event signal 104 is transmitted to the master controller 106. The (n + 1) th recipe set is received from the master controller 106 by subsystem controllers A, B, and C. The confirmation of the reception of the (n + 1) th recipe set is transmitted from the subsystem controllers A, B, and C to the master controller 106, and the master controller 106 confirms the reception of the (n + 1) th recipe set with the command controller 102. Send to. To give an example, the confirmation of receipt of the recipe set is transmitted from the subsystem controller A to the master controller 106 through the transfer medium, and the master controller 106 transmits the confirmation to the command controller 102 through the transfer medium 112. Further, the command controller 102 receives a confirmation of receipt of the (n + 2) th recipe set from the subsystem controllers A, B, and C through the master controller 106, and then receives a recipe event signal at time te2 within a predetermined time interval. The second digital pulse of 104 is transmitted to the master controller 106. The (n + 2) th recipe set is received from the master controller 106 by subsystem controllers A, B, and C. Confirmation of reception of the (n + 2) th recipe set is transmitted from subsystem controllers A, B, and C to the master controller 106, and the master controller 106 confirms reception of the (n + 2) th recipe set with command controller 102. Send to . In an embodiment of the part, confirmation of receipt of the recipe set is transmitted over a communication medium 122A, 124, and 126 from the subsystem controller A to the command controller 102, confirmation of receipt of the recipe set, communication media 122B, 124, And 126 are transmitted from subsystem controller B to command controller 102, and confirmation of receipt of the recipe set is transmitted from subsystem controller C to command controller 102 through communication media 122C, 124, and 126.

As another example, the master controller 106 receives a confirmation of receipt of the (n + 1) th recipe set from subsystem controllers A, B, and C, and then at time te1 within a predetermined time interval, the recipe event signal 104. First digital pulse is transmitted to subsystem controllers A, B, and C. Further, the master controller 106 receives the confirmation of the reception of the (n + 2) th recipe set from the subsystem controllers A, B, and C, and then at the time te2 within a predetermined time interval, the second recipe event signal 104 is displayed. Digital pulse is transmitted to subsystem controllers A, B, and C. In some embodiments, the confirmation is transmitted from the subsystem controller to the master controller 106 through a transfer medium that connects the subsystem controller to the master controller 106. In various embodiments, the confirmation is transmitted from the subsystem controller to the master controller 106 through one or more communication media that connects the subsystem controller to the master controller 106. As another example, the master controller 106 receives confirmation of receipt of the (n + 1) th recipe set from the processors PA, PB, and PC, and then at time te1 within a predetermined time interval, the recipe event signal 104th. The digital pulse of 1 is transmitted to the processors PA, PB, and PC. Further, the master controller 106 receives the confirmation of the reception of the (n + 2) th recipe set from the processors PA, PB, P and C, and then at the time te2 within a predetermined time interval, the second recipe event signal 104 Digital pulses are transmitted to processors PA, PB, and PC. In some embodiments, the confirmation is transmitted from the subsystem to the master controller 106 through a transfer medium that connects the subsystem to the master controller 106. In various embodiments, confirmations are transmitted from the subsystem to the master controller 106 through one or more communication media that connect the subsystem to the master controller 106. Still another example, the subsystem controller receives confirmation of receipt of the (n + 1) th recipe set from the subsystem processor, and then at time te1 within a predetermined time interval, the first recipe event signal 104. Digital pulse is sent to the processor. Further, the subsystem controller transmits a second digital pulse of the recipe event signal 104 to the processor at time te2 within a predetermined time interval after receiving confirmation of receipt of the (n + 2) th recipe set from the processor. ..

In some embodiments, a predetermined time interval is received from the user through the input device. For example, the predetermined time interval is the time interval between receipts of confirmation of receipt of two consecutive packets, such as the (n + 1) th packet and the (n + 2) th packet.

In various embodiments, the digital pulse of the pulse signal 212 receives one or more from the source controller without the source controller receiving one or more confirmations from the corresponding one or more destination controllers. It is transmitted from the source controller based on a predetermined length of time it takes to transmit the recipe set to the destination controller. One or more recipient controllers are connected to the source controller. For example, a source controller may take a predetermined length of time to communicate a recipe set from a source controller to one or more recipient controllers, such as x microseconds or x milliseconds or x nanoseconds. It is provided by the user through the input device that it is in x units. Each time x units elapse, the source controller transmits the pulse of the pulse signal 212 to one or more destination controllers. An example of a source controller is a command controller 102 when one or more recipient controllers are subsystem controllers A, B, and C. Another example of a source controller is the master controller 106 when one or more recipient controllers are subsystem controllers A, B, and C. Yet another example of a source controller is the master controller 106 when one or more recipient controllers are processors PA, PB, and PC.

In various embodiments, a predetermined length of time taken from the source controller to send the recipe set to one or more recipient controllers is determined by the source controller during the learning routine. For example, the source controller sends packets of various sizes to one or more destination controllers, for example having recipe sets with different bit numbers as payloads. The source controller determines the longest time it takes to transmit the largest size packet among packets of various sizes, and determines the longest time as a predetermined length of time.

In some embodiments, the time te2 is between the time ts3 and the time the (n + 2) th packet is received by one or more recipient controllers.

FIG. 2B is the timing diagram 230 described above with reference to FIG. 1E.

FIG. 3A is a diagram of an embodiment of the Ethernet packet 300. The Ethernet packet 300 includes a preamble field, a frame start delimiter field, a destination media access control (MAC) address field, a source MAC address field, an Ethernet type field, a payload field, and a frame check sequence (FCS) field. , Includes inter-packet gaps. The preamble field and the frame start delimiter field are filled to indicate the start of an Ethernet frame. The Ethernet frame includes a destination MAC address field, a source MAC address field, an Ethernet type field, a payload field, and an FCS field.

The MAC destination address field may be, for example, the network interface of the master controller 106, or the network interface of subsystem controller A, or the network interface of subsystem controller B, or the network interface of subsystem controller C, or the network interface of subsystem A. Alternatively, it includes an address that uniquely identifies the network interface that will receive the Ethernet packet 300, such as the network interface of subsystem B or the network interface of subsystem C.

The network interface of the master controller 106 is connected to one or more transfer media and to the processor of the master controller 106. For example, the network interface of the master controller 106 is connected to the transfer media 110A, 110B, and 110C (FIG. 1A-1). As another example, the network interface of the master controller 106 is connected to the transfer media 164A, 164B, and 164C (FIG. 1B-1). As yet another example, the network of master controller 106 is connected to transfer media 172A, 172B, and 172C (FIG. 1C).

Similarly, the subsystem controller's network interface is connected to one or more transfer media and to the subsystem controller's processor. For example, the network interface of subsystem controller A is connected to transfer media 110A and 114A (FIG. 1A-1), and the network interface of subsystem controller B is connected to transfer media 110B and 114B (FIG. 1A-1). The network interface of the subsystem controller C is connected to the transfer media 110C and 114C (FIG. 1A-1).

In addition, the subsystem's network interface is connected to one or more transfer media and to the subsystem's processor. For example, the network interface of subsystem A is connected to transfer medium 114A (FIG. 1A-1), the network interface of subsystem B is connected to transfer medium 114B (FIG. 1A-1), and the network interface of subsystem C. Is connected to the transfer medium 114C (FIG. 1A-1). As another example, the network interface of subsystem A is connected to transfer medium 172A (FIG. 1C), the network interface of subsystem B is connected to transfer medium 172B (FIG. 1C), and the network interface of subsystem C is. , Connected to transfer medium 172C (FIG. 1C).

In one embodiment, the network interface is, for example, the master controller 106, or subsystem controller A, or subsystem controller B, or subsystem controller C, or processor PA, or processor PB, or processor described herein. It is implemented in a controller such as a PC.

The MAC source address field contains an address that uniquely identifies the network interface that sends the Ethernet packet 300. The Ethernet type field contains data indicating either the length of the payload or a protocol such as Internet Protocol Version 4, AppleTalk ™ encapsulated within the payload. Payload fields are various bits of one or more recipe sets, such as the (n + 1) th recipe set, the (n + 2) th recipe set, the (n + 3) th recipe set, for example, 42 octets to 1500 octets. Can be adapted to numbers. The FCS field is used to check the integrity of the frame. The packet-to-packet gap is the idle time between two consecutive packets.

FIG. 3B is a diagram of an embodiment for explaining a packet 320 such as a datagram. Packet 3 20 includes a header field and a payload field such as a field containing a recipe set or the like. The header field is a field for the ID of the source address, such as the address of the network interface, which is the source of the packet 320, and the destination address, such as the address of the network interface, which is specified to receive the packet 320. Includes a field for the ID of the, a field for the total length of the header and the payload attached to the header, and a field for the checksum value.

In various embodiments, packet 320 is generated using, for example, a customized communication protocol to exclude a source address field for identifying a source address and a destination address field for identifying a destination address. Customized such as being done. In two-point communication, it is not necessary to identify the source address and the destination address. This exclusion, the master controller 106, between the connected subsystem controller to the master controller 106, or a subsystem controller, between the subsystem connected to the subsystem controller or a master controller, the master controller Increase the data speed to and from the connected subsystem.

In some embodiments, the header is generated using, for example, a customized communication protocol to exclude fields for the checksum value and / or for the total length of the header and payload. Customized such as being done. This exclusion, the master controller 106, between the connected subsystem controller to the master controller 106, or a subsystem controller, between the subsystem connected to the subsystem controller or a master controller, the master controller Increase the data speed to and from the connected subsystem.

In various embodiments, the checksum value is generated by the network interface transmitting packet 320. The checksum value is generated from the payload of packet 320, from the header of packet 320, or a combination thereof. The checksum value determines whether the payload and / or header of packet 320 has changed while being transferred from the source network interface to the destination network interface, eg, the destination of packet 320. Compared to another checksum value calculated by the receiver, such as a network interface.

In some embodiments, a datagram, such as a UDP datagram, is embedded in the IP packet, which is further embedded in the Ethernet packet.

In various embodiments, the packet 320 is customized such that the fields are in different positions as shown in FIG. 3B, for example, generated using a customized protocol. For example, the field for payload precedes the field for length. As another example, the field for the destination address is before the field for the source address or after the field for the length. The customized protocol is applied by the physical layer that produces one or more customized packets.

FIG. 4 is a diagram of an embodiment of the plasma processing system 400. The plasma processing system 400 includes a master controller 106, an xMHz RF generator, a yMHz RF generator, a zMHz RF generator, a subsystem controller A, a subsystem controller B, and a subsystem controller C. Further, the plasma processing system 400 includes an impedance matching network 402 and a plasma chamber 404.

In one embodiment, a kHz RF generator is used instead of the xMHz RF generator.

Upon receiving the (n + 1) th recipe set, the xMHz RF generator produces an RF signal. For example, the RF signal generated by the xMHz RF generator has the energy and / or frequency specified in the (n + 1) th recipe set received by the xMHz RF generator. Similarly, upon receiving the (n + 1) th recipe set, the yMHz RF generator generates an RF signal, and upon receiving the (n + 1) th recipe set, the zMHz RF generator produces an RF signal. Generate. For example, the RF signal generated by the yMHz RF generator has the energy and / or frequency specified in the (n + 1) th recipe set received by the yMHz RF generator. As another example, the RF signal produced by the zMHz RF generator has the quantity and / or frequency specified in the (n + 1) th recipe set received by the zMHz RF generator. The RF signal is provided to the impedance matching network 402 through the corresponding RF cables 406A, 406B, and 406C. Impedance matching network 402 connects the impedance of the load connected to the output of impedance matching network 402 to one or more inputs of impedance matching network 402 in order to generate a modified RF signal. Match the impedance of. For example, the impedance matching network 402 matches the impedance of the plasma chamber 404 and the RF transmission line 408 with the impedances of the RF cables 406A, 406B, and 406C, xMHz RF generator, yMHz RF generator, and zMHz RF generator. ..

The modified RF signal is transmitted to the lower electrode 410 of the plasma chamber 404 through the RF transmission line 408. The lower electrode 410 is a part of a chuck such as an electrostatic chuck (ESC). On the opposite side of the lower electrode 410, the upper electrode 412 of the plasma chamber 404 is positioned relative to the lower electrode 410. The upper electrode 412 and the lower electrode 410 are each made of a metal such as aluminum or an aluminum alloy.

When the process gas is supplied to the plasma chamber 404 and the modified RF signal is supplied to the lower electrode, plasma is generated in the plasma chamber 404 to process the wafer 416 sitting on the upper surface of the lower electrode 410. It is launched or maintained.

FIG. 5 is a diagram of an embodiment of a system for explaining a subsystem 500 such as, for example, subsystem A, subsystem B, or subsystem C. Subsystem 500 includes, for example, processor PA, or processor PB, or processor 502 such as processor PC. The processor 502 is connected to the driver 50 4, such as for example one or more transistors and one or more current generators. The driver is connected to mechanical or electrical part 506. Examples of parts 506 include motors or amplifiers.

When subsystem 500 is an RF generator, part 506 includes an amplifier connected to an RF power supply. Further, when the subsystem 500 is a pressure subsystem, or gap subsystem, or gas flow subsystem, or coolant flow subsystem, the part 506 is a motor.

Processor 502 produces the signal provided to driver 504. Upon receiving the signal from the processor 502, the driver 504 generates a drive signal, which is provided to the part 506 to operate the part 506. When part 506 is a motor, the motor is the amount by which the valve of the cooling flow subsystem opens or closes, or the amount by which the valve of the gas flow subsystem opens or closes, or the amount by which the confinement ring opens or closes, or the top electrode 412. The size of the gap between (FIG. 4) and the lower electrode 410 (FIG. 4) is controlled. When part 506 is a heater, the heater becomes hot as the driver 504 supplies a current signal to the heater. When part 506 is an amplifier, when the amplifier receives a current signal from driver 504, it produces an amplified signal, which is provided to the RF power supply to generate the RF signal.

6, illustrating a plasma chamber 626 which is an example of the plasma chamber 404 (FIG. 4), a diagram of one embodiment of a system. System includes a plasma reactor 620, the RF transmission line 624 is an example of a RF transmission path 408 (FIG. 4). The RF transmission line 624 is connected to the plasma reactor 620. The RF transmission line 624 includes an RF rod 661 and an RF tunnel 662. The RF rod 661 is used to facilitate the transfer of the modified RF signal received from the impedance matching network 402 (FIG. 4).

The plasma reactor 620 includes a plasma chamber 626 and an RF cylinder 610 connected to an RF rod 661 through an RF strap 668. The plasma reactor 620 further includes RF straps 674 and 677, a ground shield 680, and a bottom electrode case 676.

The plasma chamber 626 includes an upper electrode 660, an upper electrode extension 628, a C shroud 670, a ground ring 672, and a chuck assembly. The chuck assembly includes a chuck 658 and an equipment plate 630. The upper electrode 660 is an example of the upper electrode 412 (FIG. 4). The substrate 416 is placed on the chuck 658 to process the substrate 416. Examples of processing the substrate 416 include cleaning the substrate 416, etching the substrate 416, etching the oxides on the substrate 416, or using materials such as oxides, dioxides, photoresist materials, etc. These can be deposited on top or a combination thereof.

The C shroud 670 includes a slot used to control the pressure in the plasma chamber 626. For example, the slots are opened to increase the flow of gas through the slots and reduce the gas pressure in the gap 671 of the plasma chamber 626. The slots are closed to reduce the flow of gas and increase the gas pressure in the gap 671.

In various embodiments, the bottom electrode case 676 has any shape, such as a cylinder, a quadrangle, or a polygon.

In various embodiments, the RF cylinder 610 is not a cylinder but has a polygonal shape such as a rectangle or a quadrangle.

The upper electrode extension portion 628 surrounds the upper electrode 660. The C shroud 670 includes portions 670A and 670B. The ground ring 672 includes a ground ring portion 672A and another ground ring portion 672B. The bottom electrode case 676 includes a bottom electrode case portion 676A, another bottom electrode case portion 676B, and yet another bottom electrode case portion 676C. The bottom electrode case portions 676A and 676B each form a side wall of the bottom electrode case 676. The bottom electrode case portion 676C forms the bottom wall of the bottom electrode case 676. The ground shield 680 includes a shield portion 680A and another shield portion 680B.

The upper surface of the chuck 658 faces the bottom surface 636 of the upper electrode 660. The plasma chamber 626 is surrounded by an upper electrode 660 and an upper electrode extension portion 628. The plasma chamber 626 is further surrounded by a C shroud 670 and a chuck 658.

The ground ring 672 is positioned below the C shroud 670. In some embodiments, the ground ring 672 is positioned below the C shroud 670 and adjacent to the C shroud 670. The feedback RF strap 674 is connected to the ground ring portion 672A and the feedback RF strap 677 is connected to the ground ring portion 672B. The feedback RF strap 674 is connected to the bottom electrode case portion 676A and the feedback RF strap 677 is connected to the bottom electrode case portion 676B. The bottom electrode case portion 676A is connected to the shield portion 680A, and the bottom electrode case portion 676B is connected to the shield portion 680B. The shield portion 680A is connected to the RF tunnel 662 through the bottom electrode case portion 676A, and the shield portion 680B is connected to the grounded RF tunnel 662 through the bottom electrode case portion 676C.

In some embodiments, the bottom electrode case portion 676 is a cylinder that surrounds the RF cylinder 610 . The RF cylinder 610 is a medium for passing the modified RF signal. The modified RF signal is fed to the lower electrode of chuck 658 through the RF rod 661, RF strap 668, and RF cylinder 610 to generate or maintain plasma in gap 671 of plasma chamber 626. The gap 671 is formed between the upper electrode 660 and the lower electrode of the chuck 658.

In some embodiments, the top electrode 660 is grounded.

In various embodiments, a plurality of RF straps are used instead of the RF straps 668 to connect the RF cylinder 610 to the RF rod 661.

In one embodiment, a confinement ring is provided instead of the C shroud 670 to control the gas exiting the plasma chamber 626 and further control the pressure in the plasma chamber 626.

It should be noted that in some of the embodiments described above, the modified RF signal is provided to the lower electrode 410 (FIG. 4) and the upper electrode 412 (FIG. 4) is grounded. In various embodiments, the modified RF signal is provided to the upper electrode 412 and the lower electrode 410 is grounded.

In one embodiment, the functions described herein as being performed by one processor are performed by a plurality of processors, for example distributed among the plurality of processors.

In one embodiment, the functions described herein as being performed by one controller are performed by a plurality of controllers, for example distributed among the plurality of controllers.

In one embodiment, the functions described herein as being performed by multiple controllers are performed by one controller.

The embodiments described herein are in various computer system configurations such as handheld hardware units, microprocessor systems, microprocessor-based or programmable home electronics, minicomputers, mainframe computers, and the like. It may be carried out. The embodiments described herein can also be implemented in a distributed computing environment in which tasks are performed by remote processing hardware units linked through a computer network.

In some implementations, the controller is part of the system and the system may be part of the example described above. The system is a semiconductor process such as one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (such as wafer pedestals and gas flow systems). Including equipment. The system may be integrated with electronics to control its operation before, during, and after processing the semiconductor wafer or substrate. Electronic devices are called "controllers" and may control various components or sub-components of the system. The controller can supply process gas, set temperature (heating and / or cooling), set pressure, set vacuum, set power, set RF generator, RF match, depending on processing requirements and / or type of system. In and out of wafers for circuit settings, frequency settings, flow rate settings, fluid supply settings, position and operation settings, system-connected or interface-connected tools and other transfer tools and / or load locks. It is programmed to control any process disclosed herein, such as a wafer transfer.

In general, in a wide variety of embodiments, the controller receives instructions, issues instructions, controls operations, enables cleaning operations, enables end point measurements, and various other integrated circuits, logic, and memory. And / or defined as an electronic device with software. An integrated circuit includes a chip in the form of firmware for storing program instructions, a digital DSP, a chip defined as an ASIC, a PLD, one or more microprocessors, and a microcontroller for executing program instructions (eg, software). A program instruction is an instruction transmitted to a controller in the form of various individual settings (or program files) to define an operating parameter for executing a process for or for a semiconductor wafer. The operating parameters are, in some embodiments, to implement one or more processing steps in the manufacture of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies. Is part of a recipe defined by a process engineer.

The controller is, in some embodiments, part of a computer that is integrated with the system, connected to the system, otherwise networked to the system, or a combination thereof. Connected to a computer. For example, the controller is in the "cloud" or in whole or in part of the fab host computer system, which allows remote access for wafer processing. The computer monitors the current progress of the production operation, investigates the history of the past production operation, investigates the tendency or performance standard from multiple production operations, or changes the parameters of the current processing, or Allows remote access to the system to set up a process to track the current process or to start a new process.

In some embodiments, a remote computer (eg, a server) provides a process recipe to the system through a local network or a computer network that includes the Internet. The remote computer includes a user interface that allows input or programming of parameters and / or settings, and these parameters and / or settings are then transmitted from the remote computer to the system. In some examples, the controller receives instructions in the form of settings for processing wafers. It should be understood that the settings are specific to the type of process performed on the wafer and to the type of tool configured to interface or control the controller. Thus, as described above, controllers are distributed, such as by including one or more individual controllers that are networked together and work towards a common purpose, such as performing the processes described herein. .. As an example of a distributed controller for this purpose, a chamber that is remotely installed (at the platform level or as part of a remote computer) and communicates with one or more integrated circuits that coordinately control processes within the chamber. One or more integrated circuits above may be mentioned.

In various embodiments without limitation, the system is a plasma etching chamber, a deposition chamber, a spin rinse chamber, a metal plating chamber, a cleaning chamber, a bevel edge etching chamber, a physical vapor deposition (PVD) chamber, a chemical vapor deposition (CVD) chamber. , Atomic Layer Deposition (ALD) Chamber, Atomic Layer Etching (ALE) Chamber, Ion Injection Chamber, Tracking Chamber, and any other semiconductor processing chamber associated with or used in the manufacture and / or manufacture of semiconductor wafers. ..

It should be further noted that the above-mentioned operations are described with reference to a parallel plate plasma chamber, such as a capacitively coupled plasma chamber, but in some embodiments, for example, inductively coupled plasma (ICP). It is applicable to other types of plasma chambers such as plasma chambers including reactors and inductively coupled plasma (TCP) reactors, conductor tools, dielectric tools, plasma chambers including electron cyclotron resonance (ECR) reactors. For example, an xMHz RF generator, a yMHz RF generator, and a zMHz RF generator are coupled to an inductor in an ICP plasma chamber through an impedance matching network.

As mentioned above, depending on one or more process actions performed by the tool, the controller may include other tool circuits or module modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools. Of the tools used throughout the factory, the main computer, another controller, or the tools used to transport materials to and from the tool location and / or loading port in the semiconductor manufacturing plant. Interact with one or more.

With the above embodiments in mind, it should be understood that some embodiments use various computer execution actions with data stored in the computer system. These computer execution operations are operations that require physical operations of physical quantities.

Some embodiments also relate to hardware units or devices for performing these operations. The device is specially constructed for a dedicated computer. When defined as a dedicated computer, a computer performs other processing, program execution, or routine that is operational for a special purpose but is not part of that special purpose.

In some embodiments, the operations described herein are performed by a computer that is selectively activated, or consist of one or more computer programs stored in computer memory, or a computer. Obtained through the network. When data is obtained through a computer network, the data may be processed by other computers on the computer network, for example in the cloud of computing resources.

One or more embodiments described herein can also be created as computer-readable code on non-transient computer-readable media. A non-transient computer-readable medium is any data storage hardware unit, such as a memory device, that stores data that is later read by a computer system. Examples of non-transient computer readable media include hard drives, networked storage (NAS), ROMs, RAMs, compact disc ROMs (CD-ROMs), writable CDs (CD-Rs), and rewritable CDs (rewritable CDs). There are CD-RWs), magnetic tapes, and other optical and non-optical data storage hardware units. In some embodiments, the non-transient computer readable media is tangible computer readable distributed in a networked computer system so that computer readable code is stored and executed in a distributed manner. Including media.

Some of the operations of the methods described above are presented in a particular order, but in various embodiments, other housekeeping operations are performed between the operations of the method, or slightly. The behavior of the method is adjusted to occur at different time points, or distributed within the system to allow the behavior of the method to occur at various time intervals, or performed in a different order than described above. It should be understood.

It should be further noted that in one embodiment, one or more features from any of the embodiments described above do not deviate from the scope described in the various embodiments described herein. To be combined with one or more features of the embodiment of.

Although the above embodiments have been described in some detail for the purpose of clarifying understanding, it is clear that specific changes and amendments are possible within the scope of the appended claims. Accordingly, the present embodiment is varied within the scope of the exemplary, there are limiting is considered that there is no, not to be limited to the details given herein, appended claims and their equivalents of the appended obtained To.
The present invention can also be realized as the following application example.
[Application example 1]
The way
Sending the recipe set to the master controller by the command controller,
The master controller transmits the recipe set for execution by the subsystem controller of the plasma system, and transmitting the recipe set from the master controller to the subsystem controller is the first clock signal. To be carried out during the clock cycle of
Using the command controller to generate a recipe event signal
The command controller transmits the recipe event signal to the subsystem controller to indicate the time of execution of the recipe set by the subsystem controller, and the execution time is set to the first clock cycle. It occurs during the subsequent second clock cycle, and the second cycle is a cycle of the clock signal.
How to prepare.
[Application example 2]
The method described in Application Example 1
Sending the recipe set from the command controller to the master controller includes sending packets to the master controller through a transfer medium, and transmitting the recipe set from the master controller to the subsystem controller. A method comprising transmitting the packet to the subsystem controller through a transfer medium.
[Application example 3]
The method described in Application Example 1, further
The master controller comprises transmitting another recipe set for execution by another subsystem controller of the plasma system during the first clock cycle.
The time is the time for the execution of the other recipe set by the other subsystem controller of the plasma system.
[Application example 4]
The method described in Application Example 1
A method in which the command controller is located within a computing device, the computing device comprising a laptop computer, or a desktop computer, or a tablet terminal, or a mobile phone.
[Application example 5]
The method described in Application Example 1
The recipe set includes the power of a radio frequency (RF) signal generated by an RF generator, or the frequency of the RF signal, or the pressure in the plasma chamber of the plasma system, or the temperature in the plasma chamber, or the plasma. Includes gaps between electrodes in the chamber, or gas flow into the plasma chamber, or capacitance of capacitors in the impedance matching network of the plasma processing system, or inductance of inductors in the impedance matching network, or a combination thereof. ,Method.
[Application example 6]
The method described in Application Example 1
The method, wherein the recipe set is executed by the subsystem controller when the recipe set is transmitted from the subsystem controller to the subsystem, and the subsystem controller is connected to the master controller.
[Application 7]
The method described in Application Example 6
The method, wherein the subsystem is a radio frequency (RF) generator, or pressure subsystem, or temperature subsystem, or gap subsystem, or gas flow subsystem, or impedance matching network.
[Application Example 8]
The method described in Application Example 1
The plasma system includes one or more radio frequency (RF) generators, an impedance matching network, and a plasma chamber, wherein the one or more RF generators are routed through one or more corresponding RF cables. A method of connecting to an impedance matching network, wherein the impedance matching network is connected to the plasma chamber through an RF transmission line.
[Application 9]
The method described in Application Example 1
The execution time is the time when the recipe event signal is received from the command controller by the subsystem controller, and the subsystem controller is connected to the master controller to control the subsystem and the subsystem controller. The method in which the recipe event signal received by causes immediate execution of the recipe set.
[Application Example 10]
The method described in Application Example 1
The execution time is the time when the recipe set is transmitted from the subsystem controller to the subsystem, and the subsystem controller is connected to the master controller in order to receive the recipe set from the master controller. ,Method.
[Application Example 11]
The method described in Application Example 1
A method in which the recipe event signal triggers execution of the recipe set.
[Application 12]
The method described in Application Example 1
A method, wherein the recipe event signal indicates an immediate activation of execution of the recipe set when received by the subsystem controller for the subsystem.
[Application 13]
The way
The master controller is to send a recipe set for execution by the subsystem controller during the first clock cycle of the clock signal, the subsystem controller being configured to control components of the plasma system. Ru, that,
The recipe event signal is generated by the master controller, and
The master controller transmits the recipe event signal to indicate the time of execution of the recipe set by the subsystem controller of the plasma system, and the time of execution of the recipe set is determined by the recipe set. It occurs during a second clock cycle following the first clock cycle transmitted, and the second cycle is a cycle of the clock signal.
How to prepare.
[Application 14]
The method according to application example 13.
Sending the recipe set involves sending a packet to the subsystem controller through a cable. Method.
[Application Example 15]
The method according to application example 13.
The plasma system includes one or more radio frequency (RF) generators, an impedance matching network, and a plasma chamber, the one or more RF generators being connected to the impedance matching network. A method in which an impedance matching network is connected to the plasma chamber.
[Application 16]
The method according to Application Example 13, further
The master controller is transmitting another set of recipes for execution by another subsystem controller during the first clock cycle of the clock signal, wherein the other subsystem controller is the plasma. Being configured to control another component of the system,
The time is the time for the execution of the other recipe set by the other subsystem controller of the plasma system.
[Application example 17]
The method according to application example 13.
A method in which the recipe set is executed by the subsystem controller by sending the recipe set to the component.
[Application Example 18]
The method according to application example 13.
The execution time is the time when the recipe event signal is received from the master controller by the subsystem controller, and the subsystem controller is connected to the master controller to control the component.
[Application Example 19]
The method according to application example 13.
The method, wherein the execution time is the time during which the recipe set is transmitted from the subsystem controller to the component.
[Application 20]
The method according to application example 13.
A method in which the recipe event signal triggers execution of the recipe set.
[Application 21]
The method according to application example 13.
A method, wherein the recipe event signal indicates an immediate activation of execution of the recipe set when received by the subsystem controller for the subsystem.
[Application 22]
The way
The master controller transmits a recipe set to a processor of a subsystem of the plasma processing system, and the transmission from the master controller occurs during the first clock cycle of the clock signal.
The recipe event signal is generated by the master controller, and
The master controller transmits the recipe event signal to indicate the time of execution of the recipe set to the processor of the subsystem, and transmitting the time of execution is the first clock cycle. What happens during the second clock cycle that follows,
How to prepare.
[Application 23]
The method according to application example 22.
Sending the recipe set involves sending a packet through a cable to the processor of the subsystem. Method.
[Application 24]
The method according to Application Example 22, further
The master controller is to send another set of recipes for execution by another processor in another subsystem, such that the other processor controls said another subsystem in the plasma system. Configured and transmitting the other recipe set comprises occurring during the first clock cycle.
The time is the time for execution of the other recipe set by the other processor of the other subsystem.
[Application 25]
The method according to application example 22.
The method, wherein the recipe set is performed by the processor when the processor in the subsystem sends a signal to the driver to generate a signal.
[Application 26]
The method according to application example 22.
The time of execution is the time when the recipe event signal is received from the master controller by the processor, and the processor is connected to the master controller to control the subsystem.
[Application 27]
The method according to application example 22.
The time of execution is the time from which the processor sends the recipe set to the driver to drive a portion of the plasma processing system.
[Application 28]
The method according to application example 22.
A method in which the recipe event signal triggers execution of the recipe set.
[Application 29]
The method according to application example 22.
A method, wherein the recipe event signal, when received by the processor, indicates an immediate activation of execution of the recipe set.

Claims (30)

The way
Sending the recipe set to the master controller by the command controller,
The master controller transmits the recipe set for execution by the subsystem controller of the plasma system, and transmitting the recipe set from the master controller to the subsystem controller is the first clock signal. To be carried out during the clock cycle of
Using the command controller to generate a recipe event signal
The command controller transmits the recipe event signal indicating the time of execution of the recipe set by the subsystem controller to the subsystem controller, and the execution time follows the first clock cycle. The second clock cycle occurs during the second clock cycle, and the second clock cycle is a cycle of the clock signal.
Sending an additional recipe set to the master controller by the command controller
The master controller is to send the additional recipe set to the subsystem controller for execution by the subsystem controller of the plasma system, the additional recipe set being transmitted from the master controller to the subsystem controller. Is transmitted to the clock signal during the second clock cycle of the clock signal.
How to prepare. The method according to claim 1.
Sending the recipe set from the command controller to the master controller includes sending packets to the master controller through a transfer medium, and transmitting the recipe set from the master controller to the subsystem controller. A method comprising transmitting the packet to the subsystem controller through a transfer medium. The method according to claim 1, further
The master controller comprises transmitting another recipe set for execution by another subsystem controller of the plasma system during the first clock cycle.
The time of execution is the time for the execution of the other recipe set by the other subsystem controller of the plasma system. The method according to claim 1.
A method in which the command controller is located within a computing device, the computing device comprising a laptop computer, or a desktop computer, or a tablet terminal, or a mobile phone. The method according to claim 1.
The recipe set includes the power of a radio frequency (RF) signal generated by an RF generator, or the frequency of the RF signal, or the pressure in the plasma chamber of the plasma system, or the temperature in the plasma chamber, or the plasma. Includes gaps between electrodes in the chamber, or gas flow into the plasma chamber, or capacitance of capacitors in the impedance matching network of the plasma system, or inductance of inductors in the impedance matching network, or a combination thereof. Method. The method according to claim 1.
The method, wherein the recipe set is executed by the subsystem controller when the recipe set is transmitted from the subsystem controller to the subsystem, and the subsystem controller is connected to the master controller. The method according to claim 6.
The method, wherein the subsystem is a radio frequency (RF) generator, or pressure subsystem, or temperature subsystem, or gap subsystem, or gas flow subsystem, or impedance matching network. The method according to claim 1.
The plasma system includes one or more radio frequency (RF) generators, an impedance matching network, and a plasma chamber, wherein the one or more RF generators are routed through one or more corresponding RF cables. A method of connecting to an impedance matching network, wherein the impedance matching network is connected to the plasma chamber through an RF transmission line. The method according to claim 1.
The execution time is the time when the recipe event signal is received from the command controller by the subsystem controller, and the subsystem controller is connected to the master controller to control the subsystem and the subsystem controller. The method in which the recipe event signal received by causes an immediate execution of the recipe set. The method according to claim 1.
The execution time is the time when the recipe set is transmitted from the subsystem controller to the subsystem, and the subsystem controller is connected to the master controller in order to receive the recipe set from the master controller. ,Method. The method according to claim 1.
A method in which the recipe event signal triggers execution of the recipe set. The method according to claim 1.
A method, wherein the recipe event signal indicates an immediate activation of execution of the recipe set when received by the subsystem controller for the subsystem. The way
The master controller is to send a recipe set for execution by the subsystem controller during the first clock cycle of the clock signal, the subsystem controller being configured to control components of the plasma system. Ru, that,
The recipe event signal is generated by the master controller, and
The master controller transmits the recipe event signal indicating the time of execution of the recipe set by the subsystem controller of the plasma system, and the recipe set transmits the time of execution of the recipe set. The second clock cycle occurs during the second clock cycle following the first clock cycle to be performed, and the second clock cycle is a cycle of the clock signal.
The master controller is to send an additional recipe set to the subsystem controller for execution by the subsystem controller of the plasma system, the additional recipe set being transmitted from the master controller to the subsystem controller. The transmission is carried out during the second clock cycle of the clock signal.
How to prepare. The method according to claim 13.
Sending the recipe set comprises sending a packet through a cable to the subsystem controller. The method according to claim 13.
The plasma system includes one or more radio frequency (RF) generators, an impedance matching network, and a plasma chamber, the one or more RF generators being connected to the impedance matching network. A method in which an impedance matching network is connected to the plasma chamber. The method according to claim 13, further
The master controller is transmitting another set of recipes for execution by another subsystem controller during the first clock cycle of the clock signal, wherein the other subsystem controller is the plasma. Being configured to control another component of the system,
The time of execution is the time for the execution of the other recipe set by the other subsystem controller of the plasma system. The method according to claim 13.
A method in which the recipe set is executed by the subsystem controller by sending the recipe set to the component. The method according to claim 13.
The execution time is the time when the recipe event signal is received from the master controller by the subsystem controller, and the subsystem controller is connected to the master controller to control the component. The method according to claim 13.
The method, wherein the execution time is the time during which the recipe set is transmitted from the subsystem controller to the component. The method according to claim 13.
A method in which the recipe event signal triggers execution of the recipe set. The method according to claim 13.
A method, wherein the recipe event signal indicates an immediate activation of execution of the recipe set when received by the subsystem controller for the subsystem. The way
The master controller transmits a recipe set to a processor of a subsystem of the plasma processing system, and the transmission from the master controller occurs during the first clock cycle of the clock signal.
The recipe event signal is generated by the master controller, and
The master controller transmits the recipe event signal indicating the time of execution of the recipe set to the processor of the subsystem, the transmission of the time of execution following the first clock cycle. What happens during the second clock cycle and
The master controller is to send an additional set of recipes from the master controller to the processor of the subsystem by transmitting an additional recipe set to the processor of the subsystem for execution by the processor of the subsystem. The transmission to the processor is performed during the second clock cycle of the clock signal.
How to prepare. The method according to claim 22.
A method of transmitting the recipe set comprises transmitting a packet through a cable to the processor of the subsystem. The method according to claim 22, further
The master controller is to send another set of recipes for execution by another processor in another subsystem, such that the other processor controls said another subsystem of the plasma processing system. The transmission of the other recipe set is configured to occur during the first clock cycle.
The time of execution is the time for the execution of the other recipe set by the other processor of the other subsystem. The method according to claim 22.
The method, wherein the recipe set is performed by the processor when the processor in the subsystem sends a signal to the driver to generate a signal. The method according to claim 22.
The time of execution is the time when the recipe event signal is received from the master controller by the processor, and the processor is connected to the master controller to control the subsystem. The method according to claim 22.
The time of execution is the time from which the processor sends the recipe set to the driver to drive a portion of the plasma processing system. The method according to claim 22.
A method in which the recipe event signal triggers execution of the recipe set. The method according to claim 22.
A method, wherein the recipe event signal, when received by the processor, indicates an immediate activation of execution of the recipe set. The method according to claim 1, further
Using the command controller to generate additional recipe event signals,
The command controller is to transmit the additional recipe event signal indicating the time of execution of the additional recipe set by the subsystem controller to the subsystem controller, and the execution time is the second. The third clock cycle occurs during the third clock cycle following the clock cycle of, and the third clock cycle is the cycle of the clock signal.
How to prepare.

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