KR20080040070A - Semiconductor memory apparatus using sputtering - Google Patents

Abstract

A semiconductor memory apparatus using sputtering is provided to enhance productivity by performing a low-temperature SIP process. A wafer cassette is loaded into load lock chambers(232,234). A slit valve is formed between the load lock chambers and a first wafer transfer chamber(236). A first robot(238) is arranged in the first transfer chamber to transfer the wafer to one of two exhaustion/orientation chambers(240,242) and to transfer the wafer from the exhaustion/orientation chambers to first plasma pre-cleaning chambers(244,246) and a pass-through chamber(248). A second robot(250) transfers the wafer to a second transfer chamber(252). A first, second, third, and fourth sputter chambers(260,254,256,258) are high temperature SIP chambers to perform a Ti or TiN deposition process. A thermal process for the wafer is performed in a cooling chamber(262). A computer-based controller(270) controls all operations.

Description

Semiconductor manufacturing apparatus using sputtering {Semiconductor memory apparatus using sputtering}

1 is a schematic diagram of a semiconductor manufacturing apparatus using a conventional high temperature SIP sputtering,

2 is a schematic diagram of a semiconductor manufacturing apparatus using low temperature sputtering according to an embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

232,234: load lock chamber 236,252: transfer chamber

260; First sputter chamber 254; 2nd sputter chamber

256: third sputter chamber 258; 4th sputter chamber

The present invention relates to a semiconductor manufacturing apparatus using sputtering, and more particularly, to a semiconductor manufacturing apparatus using sputtering that can perform deposition of metals by performing SIP sputtering even at low temperature.

Current research on semiconductor devices is progressing toward high integration and high performance in order to process more data in a short time. In order to achieve high integration and high performance of a semiconductor device, a thin film deposition technology for accurately forming a thin film pattern on a semiconductor substrate is important.

In general, a technique for forming a thin film on a wafer may be classified into a physical vapor deposition (PVD) method using a physical method and a chemical vapor deposition (CVD) method using a chemical method.

In the above physical vapor deposition method, a heater in which a source material to be deposited is placed is installed on top of a chamber in which a high vacuum is maintained, and a wafer is disposed in the chamber to be spaced apart from the heater. When the heater heats the source material to a high temperature, the source material vaporizes and moves onto the wafer and then solidifies on the wafer to form a thin film.

In the above physical vapor deposition method, an Argon gas ionized by a high voltage is used to separate metal particles from a target to form a metal thin film on a wafer. However, the physical vapor deposition method is currently used only in extremely limited processes due to uneven film quality.

According to the chemical vapor deposition method, a single crystal semiconductor film, an insulating film, or the like is formed on the wafer surface by chemical reaction of the source material. Chemical vapor deposition methods include low pressure chemical vapor deposition (LPCVD), atmospheric pressure chemical vapor deposition (APCVD), plasma enhanced chemical vapor deposition (PECVD), and high pressure chemical vapor deposition (HPCVD). Are distinguished.

This chemical vapor deposition method is currently used to deposit various thin films such as amorphous silicon films, silicon oxide films, silicon nitride films, silicon oxynitride films, and the like on a wafer.

According to the plasma enhanced chemical vapor deposition method, electrons having high energy collide with gas molecules in a neutral state to decompose gas molecules, and the thin film is deposited using a reaction in which decomposed gas atoms are deposited on a semiconductor substrate.

In this case, in order to deposit the thin film at a relatively high deposition rate at low temperature, a plasma is formed from the precursor gas in the chamber during the deposition of the thin film. However, in the plasma enhanced chemical vapor deposition method, even if the step coverage of the thin film is slightly poor, the possibility of forming voids in the thin film becomes very high.

As such, the voids increase as the thin film deposition process proceeds, and the patterns appear more markedly as the gap between the patterns becomes smaller. The voids formed in the thin film cause a number of problems such as deterioration of the quality of the film and increase in the defective rate of subsequent processes.

In order to improve the problems of the plasma enhanced chemical vapor deposition method, a chemical vapor deposition method (HDP-CVD) using a high density plasma (HPD) has been developed. According to the high-density plasma chemical vapor deposition method, since etching by sputtering occurs simultaneously during the deposition process of the thin film, the thin film can be effectively formed without voids in a gap having a high aspect ratio.

Chemical vapor deposition equipment, such as the Novellus High Density Plasma (CVD) CVD facility for performing this high density plasma chemical vapor deposition method, is used to form a specific thin film on top of a small substrate, such as a silicon substrate for semiconductor manufacturing. Recently, it is also applied to a relatively large substrate such as a liquid crystal plate.

Plasma chemical vapor deposition facilities have been mainly used in a batch type processing a plurality of substrates at the same time, but recently, a single sheet is a unit of the process by automating the processing of the substrate is also widely used.

1 is a schematic diagram of a semiconductor manufacturing apparatus in which a conventional high temperature self-ionized plasma (SIP) chamber is installed.

The operation of the semiconductor manufacturing equipment shown in FIG. 1 will be briefly described.

Firstly, wafers pre-etched with via holes or other structures in the dielectric layer may have two independently operated load lock chambers 132 and 134 configured to transfer wafers into and out of the equipment from wafer cassettes loaded into each load lock chamber. Are loaded into and out of the machine.

After the wafer cassette is loaded into the load lock chambers 132, 134, the chamber is pumped to low pressure, for example in the range of 10-3 to 10-4 Torr, between the load lock chamber and the first wafer transfer chamber 136. The slit valve is opened. Thereafter, the pressure of the first wafer transfer chamber 136 is maintained at a low pressure.

The first robot 138 disposed in the first transfer chamber 136 transfers the wafer from the cassette to one of the two gas exhaust chambers 140, 142 and then to the first plasma pre-clean chamber 144, 146. Transfer, where hydrogen or argon plasma cleans the wafer surface.

After the wafer surface is cleaned, the robot 138 passes the wafer to the pass through chamber 148, where the second robot 150 delivers the wafer to the second transfer chamber 152. Slit valves separate chambers 144, 146, 148 from first transfer chamber 136 to isolate processing and pressure levels.

The second robot 150 selectively transfers wafers to and from reaction chambers arranged around the periphery. The first sputter chamber 160, the second sputter chamber 154, the third sputter chamber 156, and the fourth sputter chamber 158 are installed as high temperature SIP chambers to deposit Ti or TiN. . In the SIP sputtering operation, the temperature is usually 200 ° C or 350 ° C.

Each of the chambers 154, 156, 158, 160 is selectively opened to the second transfer chambers 152 by slit valves. It is possible to use multiple configurations.

After the processing process is performed, the second robot 150 transfers the wafer to the cooling chamber 162 disposed in the middle to perform thermal processing. That is, it can cool the chamber if it is a rapid heat treatment (RTP) chamber or a hot treatment, which is a metal annealing treatment that requires a pretreatment.

After the thermal treatment, the first robot 138 removes the wafer and transfers it back to the cassette of one of the load lock chambers 132, 134.

The entire equipment is controlled by the controller 170 to be in communication with the sub controllers associated with each of the chambers.

In the conventional semiconductor manufacturing equipment as described above, in the case of the SIP equipment, the SIP chambers are all set to a high temperature (200 or 350 ° C.) process, and thus, the process of the SIP chamber cannot be performed at a low temperature. Thus, when many deposition processes are required, there is a lack of equipment to handle them.

Accordingly, an object of the present invention is to provide a semiconductor manufacturing apparatus using sputtering that can overcome the above-mentioned conventional problems.

Another object of the present invention is to provide a semiconductor manufacturing apparatus using sputtering, which can contribute to productivity improvement.

Still another object of the present invention is to provide a semiconductor manufacturing apparatus using sputtering capable of depositing titanium using a SIP chamber even at a low temperature.

According to an embodiment of the present invention for achieving some of the above technical problems, the semiconductor manufacturing apparatus using sputtering according to the present invention, it characterized in that using a low-temperature SIP sputtering method for the deposition of titanium or titanium nitride.

The semiconductor manufacturing apparatus may be a device for deposition of aluminum, and the temperature during SIP sputtering may be 30 ° C.

According to the above structure, it can contribute to productivity improvement.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, without any other intention than to provide a thorough understanding of the present invention to those skilled in the art.

Semiconductor manufacturing equipment using a self-ionized plasma (SIP) sputtering technology according to an embodiment of the present invention is to obtain an effective metal filling in the hole at a high aspect ratio in a low temperature, low pressure process, A schematic is shown and its structure and operation are described.

As shown in FIG. 2, wafers pre-etched with via holes or other structures in the dielectric layer are two independently operated rods configured to transfer wafers into and out of the equipment from wafer cassettes loaded into each loadlock chamber. It is loaded into and out of the equipment through lock chambers 232 and 234.

After the wafer cassette is loaded into the load lock chambers 232, 234, the slit valve between the load lock chamber and the first wafer transfer chamber 236 is opened. The pressure of the first wafer transfer chamber 236 is then maintained at a low pressure.

The first robot 238 disposed in the first transfer chamber 236 transfers the wafer from the cassette to one of the two exhaust / directing chambers 240, 242 and then to the first plasma preclean chamber 244, 246. Transfer, where hydrogen or argon plasma cleans the wafer surface.

The first robot 238 passes the wafer to the pass through chamber 248, where the second robot 250 transfers the wafer to the second transfer chamber 252. Slit valves separate the chambers 244, 246, 248 from the first transfer chamber 236 to isolate processing and pressure levels.

The second robot 250 selectively delivers wafers to and from reaction chambers arranged around the periphery. The first sputter chamber 260 and the fourth sputter chamber 258 are used exclusively for aluminum low pressure seed (ALPS) process. The second sputter chamber 254 is used for the deposition of a titanium (Ti) or titanium nitride (TiN) layer that performs a SIP process at low temperature (eg, 30 ° C.). And the third chamber 256 is used for the reflow process.

 Each of the chambers 254, 256, 258, 260 is selectively opened to the second transfer chambers 252 by slit valves. It is possible to use several configurations of the respective chambers 254, 256, 258, 260. For example, a second sputter chamber 254 can be used for aluminum deposition.

After the low pressure treatment, the second robot 250 delivers the wafer to the intermediate cooling chamber 262, which cools the chamber if it is a rapid thermal treatment (RTP) chamber or hot treatment, which is a metal annealing treatment that requires a pretreatment. can do. After thermal processing, the first robot 238 removes the wafer and transfers it back to the cassette of one of the load lock chambers 232 and 234. Of course, other configurations can be implemented in accordance with the integrated processing steps of the present invention.

The entire equipment is controlled by the computer desktop controller 270.

When the SIP process of titanium (Ti) or titanium nitride (TiN) is performed in the second sputter chamber 254, there is no difference in quality, and it is confirmed through experiments that the characteristics have better characteristics in terms of uniformity. Do.

By providing the above-mentioned semiconductor manufacturing apparatus, it becomes possible to contribute to productivity improvement.

The description of the above embodiments is merely given by way of example with reference to the drawings for a more thorough understanding of the present invention, and should not be construed as limiting the present invention. In addition, it will be apparent to those skilled in the art that various changes and modifications can be made without departing from the basic principles of the present invention.

As described above, according to the present invention, it is possible to contribute to the productivity improvement by replacing the high temperature SIP process using the low temperature SIP process.

Claims (3)

In a semiconductor manufacturing apparatus using sputtering: A semiconductor manufacturing apparatus, characterized by using a low temperature SIP sputtering method for the deposition of titanium or titanium nitride. The method of claim 1, The semiconductor manufacturing apparatus is a semiconductor manufacturing apparatus, characterized in that the device for the deposition of aluminum. The method of claim 1, The SIP sputtering at the time of the semiconductor manufacturing apparatus characterized in that the temperature.

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