JP6805703B2 - Thin film capacitor - Google Patents

Description

The present invention relates to thin film capacitors.

A multilayer thin-film capacitor in which dielectric layers and electrode layers are alternately laminated on a lower electrode layer and an upper electrode layer is formed on the dielectric layer is known (see, for example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2010-258406

In thin film capacitors, dielectric breakdown may occur due to the application of high voltage. In particular, in a thin film capacitor, the electric field is often concentrated at the end of the dielectric layer continuous from the end of the electrode. Therefore, dielectric breakdown may occur especially at the end of the dielectric layer.

The present invention has been made in view of the above, and an object of the present invention is to provide a thin film capacitor in which the occurrence of dielectric breakdown is suppressed.

In order to achieve the above object, the thin film capacitor according to one embodiment of the present invention has a pair of electrode layers and

It has a dielectric layer sandwiched between the pair of electrode layers and a cover layer made of a ferroelectric material that covers the end face while being in contact with the end face of the dielectric layer, and has a thickness of the dielectric layer. When T1 (nm) is used and the thickness of the cover layer 18 at the interface with the dielectric layer is T2 (nm),
2500 <T1 x T2 <40000
Satisfy the relationship.

According to the above-mentioned thin film capacitor, since the cover layer made of the ferroelectric material is in contact with the end face of the dielectric layer, it is possible to suppress the concentration of the electric field on the end portion of the dielectric layer. it can. Further, by configuring the thickness T1 (nm) of the dielectric layer and the thickness T2 (nm) of the cover layer to satisfy the above relationship, the risk of dielectric breakdown due to the concentration of the electric field can be effectively reduced. Can be done.

Here, the cover layer may have a relative permittivity (ε _r ) of 200 or more.

When the relative permittivity of the cover layer is set to 200 or more as described above, the risk of dielectric breakdown due to the concentration of electric fields in the dielectric layer can be further reduced.

Further, the thickness T1 (nm) of the dielectric layer and the thickness T2 (nm) of the cover layer are
T1 ≤ T2
It can be an aspect that satisfies the relationship of.

When the thickness T2 of the cover layer is the same as or greater than the thickness T1 of the dielectric layer, it is possible to suppress dielectric breakdown while preventing an increase in the thickness of the thin film capacitor.

According to the present invention, there is provided a thin film capacitor in which the occurrence of dielectric breakdown is suppressed.

It is the schematic sectional drawing of the thin film capacitor which concerns on one embodiment of this invention. It is a figure explaining the inclined surface of a thin film capacitor. It is a figure explaining the manufacturing method of a thin film capacitor. It is a figure explaining the end shape of the conventional thin film capacitor. It is a figure explaining the inclined surface of the thin film capacitor which concerns on a modification.

Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are designated by the same reference numerals, and duplicate description will be omitted.

FIG. 1 is a schematic cross-sectional view showing a thin film capacitor according to the present embodiment. As shown in FIG. 1, the thin film capacitor 100 according to the present embodiment includes a lower electrode layer 1, three dielectric layers 2, 4 and 6 laminated on the lower electrode layer 1, and a dielectric layer 2. The internal electrode layer 3 laminated between the dielectric layer 4 and the internal electrode layer 5 laminated between the dielectric layer 4 and the dielectric layer 6, the dielectric layers 2, 4, 6 and the internal electrodes An upper electrode layer 7 laminated on the opposite side of the lower electrode layer 1 with the layers 3 and 5 interposed therebetween is provided. The lower electrode layer 1 and the dielectric layer 2, the internal electrode layer 3, the dielectric layer 4, the internal electrode layer 5, the dielectric layer 6, and the upper electrode layer 7 which are sequentially laminated on the lower electrode layer 1 are put together. It is called a laminate 10. In the following, the direction in which the dielectric layer and the internal electrode layer are sequentially overlapped from the lower electrode layer 1 to the upper electrode layer 7 such as the lower electrode layer 1, the dielectric layer 2, and the internal electrode layer 3 is “laminated”. "Direction". Further, the upper side (upper side) along the stacking direction refers to the upper electrode layer 7 side, and the lower side (lower side) along the stacking direction refers to the lower electrode layer 1 side.

The thin film capacitor 100 includes a pair of terminal electrodes 11 and 12 on the opposite side of the lower electrode layer 1 with the dielectric layers 2, 4 and 6, the internal electrode layers 3 and 5, and the upper electrode layer 7 interposed therebetween. The terminal electrode 11 is electrically connected to the lower electrode layer 1 via the via 13 and is electrically connected to the internal electrode layer 5 via the via 14. Further, the terminal electrode 12 is electrically connected to the internal electrode layer 3 via the via 15 and is electrically connected to the upper electrode layer 7 via the via 16. Further, the pair of terminal electrodes 11 and 12 are electrically insulated from each other.

The thin film capacitor 100 has a cover layer 18 that covers the side surfaces and the upper surface of the laminate composed of the lower electrode layer 1, the dielectric layers 2, 4 and 6, the internal electrode layers 3 and 5, and the upper electrode layer 7. That is, the cover layer 18 is in contact with the end faces of the dielectric layers 2, 4 and 6 and covers the dielectric layers 2, 4 and 6. Further, the thin film capacitor 100 includes a protective layer 20 that covers between the terminal electrodes 11 and 12 and the cover layer 18. Hereinafter, each part constituting the thin film capacitor 100 will be described.

The lower electrode layer 1 is formed of a conductive material. Specifically, as the conductive material forming the lower electrode layer 1, an alloy containing nickel (Ni) or platinum (Pt) as a main component is preferable, and an alloy containing Ni as a main component is particularly preferable. Used. The higher the purity of Ni constituting the lower electrode layer 1, the more preferable it is, and it is preferable that it is 99.99% by weight or more. The lower electrode layer 1 may contain a small amount of impurities. Examples of impurities that can be contained in the lower electrode layer 1 made of an alloy containing Ni as a main component include iron (Fe), titanium (Ti), copper (Cu), aluminum (Al), magnesium (Mg), and manganese. (Mn), silicon (Si) or chromium (Cr), vanadium (V), zinc (Zn), niobium (Nb), tantalum (Ta), ittrium (Y), lanthanum (La), cesium (Ce), etc. Examples thereof include transition metal elements, rare earth elements, chlorine (Cl), sulfur (S), phosphorus (P) and the like.

The thickness of the lower electrode layer 1 is preferably 10 nm to 100 μm, more preferably 1 μm to 70 μm, and even more preferably about 10 μm to 30 μm. If the thickness of the lower electrode layer 1 is too thin, it tends to be difficult to hand link the lower electrode layer 1 during the manufacture of the thin film capacitor 100, and if the thickness of the lower electrode layer 1 is too thick, the effect of suppressing the leakage current. Tends to be smaller. The area of the lower electrode layer 1 is, for example, about 1 × 0.5 mm ² . Further, the lower electrode layer 1 described above is preferably made of a metal foil, and serves both as a substrate and an electrode. As described above, it is preferable that the lower electrode layer 1 according to the present embodiment also serves as a substrate, but a substrate / electrode film structure in which the lower electrode layer 1 is provided on a substrate made of Si, alumina, or the like is adopted. You may.

On the dielectric layers 2, 4 and 6, Badio ₃ (barium titanate), (Ba _1-X Sr _X ) TiO ₃ (barium titanate strontium), (Ba _1-X Ca _X ) TiO ₃ , PbTIO ₃ , A (strong) ferroelectric material having a perovskite structure such as Pb (Zr _X Ti _1-X ) O ₃ or a composite perovskite relaxer type ferroelectric material represented by Pb (Mg _1/3 Nb _2/3 ) O ₃ or the like. Body materials, bismuth layered compounds typified by Bi ₄ Ti ₃ O ₁₂ , SrBi ₂ Ta ₂ O _{9 and the} like, tungsten bronze typified by (Sr _1-X Ba _X ) Nb ₂ O ₆ and PbNb ₂ O _{6 and the} like. It is composed of a type ferroelectric material and the like. Here, in the perovskite structure, the perovskite relaxer type ferroelectric material, the bismuth layered compound, and the tungsten bronze type ferroelectric material, the A-site to B-site ratio is usually an integer ratio, but it is intentionally made to improve the characteristics. It may be deviated from the integer ratio. In addition, in order to control the characteristics of the dielectric layers 2, 4 and 6, the dielectric layers 2, 4 and 6 may appropriately contain an additive substance as an auxiliary component.

The thickness of each of the dielectric layers 2, 4 and 6 is, for example, 10 nm to 1000 nm. The areas of the dielectric layers 2, 4 and 6 are, for example, about 0.9 × 0.5 mm ² .

The internal electrode layers 3 and 5 provided between the dielectric layers 2, 4 and 6 described above are formed of a conductive material. Specifically, a material containing nickel (Ni) or platinum (Pt) as a main component is preferably used as the internal electrode layers 3 and 5, and Ni is particularly preferably used. When a material containing Ni as a main component is used for the internal electrode layers 3 and 5, the content thereof is preferably 50 mol% or more with respect to the entire internal electrode layers 3 and 5. When the main components of the internal electrode layers 3 and 5 are Ni, platinum (Pt), palladium (Pd), iridium (Ir), rhodium (Rh), ruthenium (Ru), osmium (Os), and rhenium (Re). ), Tungsten (W), chromium (Cr), tantalum (Ta) and silver (Ag), at least one selected from the group (hereinafter, referred to as "additive element") is further contained. By containing the additive element in the internal electrode layers 3 and 5, the interruption of the internal electrode layers 3 and 5 is prevented. The internal electrode layers 3 and 5 may contain a plurality of types of additive elements.

The thickness of the internal electrode layers 3 and 5 is, for example, about 10 nm to 1000 nm. The area of the internal electrode layers 3 and 5 is, for example, about 0.9 × 0.4 mm ² .

The upper electrode layer 7 is preferably made of an alloy containing Ni as a main component. The upper electrode layer 7 may contain a small amount of impurities. Examples of impurities that can be contained in the upper electrode layer 7 include iron (Fe), titanium (Ti), copper (Cu), aluminum (Al), magnesium (Mg), manganese (Mn), silicon (Si), and chromium. Transition metal elements such as (Cr), vanadium (V), zinc (Zn), niobium (Nb), tantalum (Ta), yttrium (Y), lanthanum (La), cesium (Ce), or rare earth elements, chlorine ( Cl), sulfur (S), phosphorus (P) and the like can be mentioned. As the upper electrode layer 7, in addition to an alloy containing Ni as a main component, aluminum (Al), dynamic (Cu), tungsten (W), and chromium (Cr) used in wiring of Si semiconductors and display panels, etc. , Tantal (Ta), Niobium (Nb), etc., Platinum (Pt), Lead (Pd), Iridium (Ir), Rhodium (Rh), Ruthenium (Ru), Osmium (Os), Rhenium (Re), Titanium (Ti), manganese (Mn), silver (Ag) and the like can also be used.

The dielectric layers 2, 4 and 6 are interrupted in the cross section of the thin film capacitor 100 shown in FIG. 1, but are continuous in a plane perpendicular to the stacking direction. Similarly, the internal electrode layers 3 and 5 and the upper electrode layer 7 are also continuous in a plane perpendicular to the stacking direction.

The terminal electrodes 11 and 12 are made of a conductive material such as copper (Cu). Further, the vias 13, 14, 15 and 16 connected to the terminal electrodes 11 and 12 are also made of a conductive material such as copper (Cu).

Further, the cover layer 18 can be made of a ferroelectric material. That is, BaTIO ₃ (barium titanate), (Ba _1-X Sr _X ) TiO ₃ (barium titanate strontium), (Ba _1-X Ca _X ) TiO ₃ , PbTIO ₃ , Pb (Zr _X Ti _1-X ). strength and dielectric materials having a perovskite structure of the O ₃ or the _like, or Pb _{(Mg 1/3 Nb} 2/3) complex perovskite relaxer type ferroelectric material represented by _{O 3} or the _like, Bi ₄ Ti _{3 O 12,} The dielectric layer 2 is a bismuth layered compound represented by SrBi ₂ Ta ₂ O ₉ or the like, a tungsten bronze type ferroelectric material represented by (Sr _1-X Ba _X ) Nb ₂ O ₆ , PbNb ₂ O ₆ or the like. , 4, 6 are preferably used. Similar to the dielectric layers 2, 4 and 6, the cover layer 18 may also appropriately contain an additive substance as a sub-component. The fact that the cover layer 18 is made of a dielectric material means that the ratio of the dielectric material in the constituent components of the cover layer 18 is 70% or more. By selecting a ferroelectric material as the material of the cover layer 18, damage to the thin film capacitor 100 can be effectively suppressed, and this point will be described later. A ferroelectric substance is a substance that undergoes dielectric polarization when an electric field is applied, and exhibits spontaneous polarization. Further, the ferroelectric substance has a feature that the polarization is reversed by an electric field. Further, the ferroelectric material in the present embodiment is preferably a material having a relative permittivity (ε _r ) of 200 or more. However, if the relative permittivity is 100 or more, it can be used as a ferroelectric material for the cover layer 18 according to the present embodiment. The ferroelectric material may be used as a mixture with other materials (for example, an inorganic insulating material such as SiO ₂ or an organic insulating material such as polyimide). Even when the ferroelectric substance is mixed with the other materials described above, the proportion of the dielectric material is preferably 70% or more.

Further, the same material as the dielectric layers 2, 4 and 6 can be selected as the cover layer 18. In this case, since it is possible to suppress the generation of stress with other layers (particularly the dielectric layers 2, 4, 6 and the like) in contact with the cover layer 18, the increase in capacitance and the suppression of leakage current can be suppressed. The effect is played.

The thickness of the cover layer 18 can be, for example, about 50 nm to 1000 nm. However, the thickness of the cover layer 18 is also set based on the thickness of the dielectric layer. This point will be described later.

The insulating protective layer 20 provided between the terminal electrodes 11 and 12 and the cover layer 18 is, for example, an organic material such as polyimide, silicon oxide (SiO ₂ ), aluminum oxide (Al ₂ O ₃ ), or silicon nitride. It is composed of an inorganic material such as (SiN) or an insulating material obtained by mixing or laminating these. By covering the cover layer 18 with the protective layer 20, the leakage current between the cover layer 18 and the terminal electrodes 11 and 12 is suppressed. From the viewpoint of leakage current, it is preferable to provide the protective layer 20 between the terminal electrodes 11 and 12 and the cover layer 18, but the protective layer 20 may not be provided.

In the thin film capacitor 100, an opening 10A is provided in the laminated body 10 around the via 13 connecting the terminal electrode 11 and the lower electrode layer 1. On the bottom surface of the opening 10A, the lower electrode layer 1 that is electrically connected to the via 13 is exposed. The bottom surface of the opening 10A is the lower electrode layer 1, and the opening 10A opens upward (on the upper electrode layer 7 side) along the stacking direction. Further, on the side surface of the opening 10A, the dielectric layer 2, the internal electrode layer 3, the dielectric layer 4, and the inside of the laminated body 10 above the lower electrode layer 1 electrically connected to the via 13 in the stacking direction. The end faces of the electrode layer 5, the dielectric layer 6, and the upper electrode layer 7 form an inclined surface.

Further, an opening 10B is provided in the laminated body 10 around the via 14 connecting the terminal electrode 11 and the internal electrode layer 5. The bottom surface of the opening 10B is exposed with an internal electrode layer 5 that is electrically connected to the via 14. The bottom surface of the opening 10B is the internal electrode layer 5, and the opening 10B opens upward (on the upper electrode layer 7 side) along the stacking direction. Further, on the side surface of the opening 10B, the end faces of the dielectric layer 6 and the upper electrode layer 7 above the internal electrode layer 5 electrically connected to the via 14 in the laminated body 10 along the stacking direction form an inclined surface. doing.

Similarly, an opening 10C is provided in the laminated body 10 around the via 15 connecting the terminal electrode 12 and the internal electrode layer 3. An internal electrode layer 3 electrically connected to the via 15 is exposed on the bottom surface of the opening 10C. The bottom surface of the opening 10C is the internal electrode layer 3, and the opening 10C opens upward (on the upper electrode layer 7 side) along the stacking direction. Further, on the side surface of the opening 10C, the dielectric layer 4, the internal electrode layer 5, the dielectric layer 6, and the dielectric layer 4 above the internal electrode layer 3 electrically connected to the via 15 in the laminated body 10 along the stacking direction. , The end face of the upper electrode layer 7 forms an inclined surface.

The thin film capacitor 100 according to the present embodiment is characterized by the material and thickness of the cover layer 18. This point will be further described with reference to FIG. FIG. 2 is an enlarged view schematically showing the laminated body 10 around the opening 10C. In FIG. 2, for the sake of simplicity, the description below the internal electrode layer 3 is omitted. Further, the description of the protective layer 20 is also omitted. Further, in FIG. 2, the periphery of the openings 10C among the openings 10A to 10C will be described, but the openings 10A and 10B are also provided with the same structure as the openings 10C.

As shown in FIG. 2, the side surface of the opening 10C has an inclined surface formed by the end faces of the dielectric layer 4, the internal electrode layer 5, the dielectric layer 6, and the upper electrode layer 7. Then, on the inclined surface, the end faces of the dielectric layer 4, the internal electrode layer 5, the dielectric layer 6, and the upper electrode layer 7 are in contact with the cover layer 18, respectively.

Here, in the thin film capacitor 100, when the thickness of the dielectric layer is T1 (nm) and the thickness of the cover layer 18 at the interface with the dielectric layer is T2 (nm),
2500 <T1 x T2 <40000
Satisfy the relationship. This point will be described with reference to FIG.

In the example of FIG. 2, the thickness T1 of the dielectric layers 4 and 6 can be defined as the length in the stacking direction. Generally, the dielectric layers 4 and 6 in the thin film capacitor 100 are manufactured so as to have uniform thicknesses, but when the thicknesses are not uniform, the average value of the thicknesses of the respective layers is T1. To do. In the example of FIG. 2, it is assumed that the thicknesses of the dielectric layers 4 and 6 are both T1.

Further, the thickness T2 of the cover layer 18 is defined based on the position of the interface with the dielectric layer. For example, for the dielectric layer 4, the thickness T2 ₄ of the cover layer when the interface A4 with the dielectric layer 4 is used as a reference is defined as the thickness T2 of the cover layer 18. Further, with respect to the dielectric layer 6, the thickness T2 of the cover layer 18 the thickness T2 ₆ of the cover layer when a reference interface A6 between the dielectric layer 6. In this way, the thickness T2 of the cover layer 18 is obtained based on the interface with the target dielectric layer. The cover layer 18 is also manufactured so that its thickness is basically uniform, but if the thickness is not uniform, the minimum value of the cover layer thickness in the interface region with the dielectric layer is set to T2. And.

It is preferable that the thickness of the dielectric layer T1 and the thickness T2 of the cover layer 18 at the interface with the dielectric layer satisfy the relationship of T1 ≦ T2. This point will be described later.

The method for manufacturing the thin film capacitor 100 will be described with reference to FIG. The method for manufacturing the thin film capacitor 100 includes a step of forming a laminate having an opening, a step of forming a cover layer, a firing step, and a step of forming and connecting terminal electrodes.

First, in the step of forming the laminate, a metal foil to be the lower electrode layer 1 is prepared. If necessary, the metal foil is polished so that its surface has a predetermined arithmetic mean roughness Ra. This polishing can be performed by a method such as CMP (Chemical Mechanical Polishing), electrolytic polishing, or buffing. Next, the dielectric films 2a, 4a, 6a to be the dielectric layers and the internal electrode layers 3a, 5a to be the internal electrode layers are alternately formed on the lower electrode layer 1a.

The composition of the dielectric films 2a, 4a, 6a is selected according to the dielectric layers 2, 4, 6 of the thin film capacitor 100 after completion. Further, as a method for forming the dielectric films 2a, 4a, 6a, a film forming technique such as a PVD (Physical Vapor Deposition) method such as a solution method or a sputtering method or a CVD (Chemical Vapor Deposition) method can be used. The sputtering method is a more preferable method.

The composition of the internal electrode layers 3a and 5a is selected according to the internal electrode layers 3 and 5 included in the completed thin film capacitor 100. Further, as a method for forming the internal electrode layers 3a and 5a, DC sputtering and the like can be mentioned.

As shown in FIG. 3A, after the dielectric films 2a, 4a, 6a and the internal electrode layers 3a, 5a are alternately laminated, an upper electrode layer 7a made of a Ni alloy is formed on the surface of the dielectric film 6a. To do.
As a result, a laminated body 101 formed by sequentially laminating the lower electrode layer 1, the dielectric film 2a, the internal electrode layer 3a, the dielectric film 4a, the internal electrode layer 5a, the dielectric film 6a, and the upper electrode layer 7a is obtained. Examples of the method for forming the upper electrode layer 7a include DC sputtering and the like.

Next, as shown in FIG. 3B, openings 102 to 104 are formed in the laminated body 101. The opening is formed by dry etching in pairs of an upper electrode layer (upper electrode layer or internal electrode layer) and a dielectric film laminated under the electrode layer. This pair layer corresponds to the pair layer in the thin film capacitor 100. A resist pattern having through holes formed in a predetermined portion is formed on the laminated body 101. After that, etching processing for the uppermost pair of layers is performed by a method such as RIE processing (Reactive Ion Etching) or ion milling via a resist pattern. After the etching process for one layer is completed, the remaining etching pattern is removed.

After that, the cover film 18a is formed so as to cover the surfaces of the lower electrode layer 1a, the dielectric films 2a, 4a, 6a, the internal electrode layers 3a, 5a, and the upper electrode layer 7a. The material of the cover film 18a is selected according to the material of the cover layer 18. As shown in FIG. 3C, the cover film 18a covers the surfaces of the openings 102 to 104 of the laminated body 101 and the upper electrode layer 7a.

Then, the laminate 101 covered with the cover film 18a is fired. The temperature at the time of firing is preferably a temperature at which the dielectric films 2a, 4a, and 6a are sintered (crystallized), and specifically, it is preferably 500 to 1000 ° C. The firing time may be about 5 minutes to 2 hours. The atmosphere at the time of firing is not particularly limited and may be an oxidizing atmosphere, a reducing atmosphere, or a neutral atmosphere, but at least the electrode layers (lower electrode layer 1a, internal electrode layers 3a, 5a, upper electrode layer). It is preferable to bake under a partial pressure of oxygen that does not oxidize 7a). As a result, the dielectric layers 2, 4 and 6 and the cover layer 18 are formed. By firing the dielectric film after forming the cover film 18a, the formation of an oxide film at the interface between the electrode layer and the dielectric layer and the interface between the electrode layer and the cover layer is suppressed.

Next, a protective layer and terminal electrodes are formed and connected to the fired laminate. Specifically, the protective layer 20 is laminated above the cover layer 18 of the laminated body after firing. After that, vias 13, 14, 15, and 16 (see FIG. 1) penetrating the protective layer and the cover layer are formed. Then, the terminal electrodes 11 and 12 (see FIG. 1) are formed so as to be electrically connected to the via on the protective layer 20. The laminate on which the terminal electrodes are arranged may be annealed. The annealing treatment may be carried out in a reduced pressure atmosphere and in an atmosphere where the temperature is 200 to 400 ° C. Here, the decompressed atmosphere means an atmosphere having a pressure lower than 1 atm (= 101325 Pa). By performing the annealing treatment, the electrical characteristics can be stabilized. As a result, the thin film capacitor 100 according to the present embodiment shown in FIG. 1 is obtained.

In the thin film capacitor 100, the following effects are obtained when the thickness T1 of the dielectric layer and the thickness T2 of the cover layer satisfy the above relationship. That is, the cover layer 18 made of the dielectric material is provided in contact with the dielectric layers 4 and 6, so that the electric field is concentrated on the dielectric layer near the end of the electrode layer, resulting in dielectric breakdown. Can be suppressed. This point will be described with reference to FIG.

FIG. 4 is a diagram schematically illustrating a dielectric layer and an electrode layer end portion in a conventional thin film capacitor. The thin film capacitor 300 shown in FIG. 4 shows a dielectric layer 4 sandwiched between the internal electrode layers 3 and 5 and the internal electrode layers 3 and 5, corresponding to FIG. 2. As shown in FIG. 4, in the conventional thin film capacitor, the dielectric layer 4 laminated on the internal electrode layer 3 and the internal electrode layer 5 laminated on the dielectric layer 4 are manufactured in the same shape. Often. Therefore, the end portion of the internal electrode layer 5 is laminated on the end portion of the dielectric layer 4.

When a voltage is applied to the thin film capacitor 300 of FIG. 4 in this state, the end region of the dielectric layer 4 continuous from the end of the internal electrode layer 5 due to its shape (near the region R4 of FIG. 4). The electric field is concentrated on. Ideally, the electric field distribution in the dielectric layer 4 is uniform, but in reality, it is concentrated at the end of the dielectric layer 4. As a result, dielectric breakdown may occur at the four ends of the dielectric layer. Dielectric breakdown occurs when the electric field in the dielectric layer exceeds a predetermined value (dielectric breakdown electric field). Therefore, the concentration of the electric field in the dielectric layer increases the possibility of dielectric breakdown.

On the other hand, in the thin film capacitor 100 according to the present embodiment, the cover layer 18 made of a dielectric material is in contact with the ends of the dielectric layers 2, 4 and 6 in the vicinity of the end of the electrode layer. Therefore, the electric field concentration in the dielectric layer can be suppressed. That is, since the electric field acts not only on the dielectric layer sandwiched between the electrode layers but also on the cover layer, it is possible to prevent the electric field from concentrating at the ends of the dielectric layers 2, 4 and 6. .. That is, it is possible to prevent dielectric breakdown from occurring in the dielectric layers 2, 4 and 6 due to the concentration of the electric field.

In particular, as the thicknesses of the dielectric layers 2, 4 and 6 become smaller, the risk of dielectric breakdown due to the concentration of the electric field increases, so that it is required to secure a larger cover layer 18. On the other hand, as the thickness of the dielectric layers 2, 4 and 6 increases, the risk of electric field concentration decreases. Therefore, the cover is covered according to the thickness T1 of the dielectric layer so that the thickness T1 (nm) of the dielectric layer and the thickness T2 (nm) of the cover layer satisfy the relationship of 2500 <T1 × T2 <40000. By selecting the layer thickness T2, the risk of dielectric breakdown due to the concentration of the electric field can be effectively reduced. When the above T1 × T2 is 2500 or less, the effect of reducing the risk of dielectric breakdown cannot be sufficiently achieved. Further, when T1 × T2 is 40,000 or more, the effect of reducing the risk of dielectric breakdown is sufficiently secured, but one or both of the dielectric layer and the cover layer become large, so that the thin film capacitor becomes large. It ends up.

Further, the cover layer made of a dielectric material provided so as to be in contact with the end face of the dielectric layer and to cover the end face is particularly effective when the inclination angle (inclination angle with respect to the horizontal direction) of the end surface of the dielectric layer is large. It becomes. The inclination angle can be controlled at the time of manufacturing the laminated body 10, but it is considered that when the inclination angle becomes large, that is, when the end faces are close to vertical, the ratio of the electric field concentrated on the end faces of the dielectric layer increases. .. Therefore, when the inclination angle becomes large (preferably larger than 30 °), it is considered that dielectric breakdown can be suppressed more effectively by providing a cover layer satisfying the above relationship. ..

Further, it is preferable that the thickness T1 (nm) of the dielectric layer and the thickness T2 (nm) of the cover layer satisfy the relationship of T1 ≦ T2. When the thickness T1 of the dielectric layer becomes larger than the thickness T2 of the cover layer, the thickness of the entire thin film capacitor becomes large. That is, by satisfying the relationship of T1 ≦ T2, it is possible to suppress dielectric breakdown while preventing an increase in the thickness of the thin film capacitor.

Further, by selecting a ferroelectric material as the material of the cover layer 18, it is possible to effectively prevent the concentration of electric fields in the dielectric layers 2, 4 and 6. Specifically, since polarization is likely to occur in the cover layer 18 instead of the dielectric layer constituting the laminate 10, even if the electric field is concentrated on the fragile end of the laminate 10, the electric field is still in the cover layer 18. Is consumed to induce polarization of. Therefore, the concentration of the electric field is less likely to occur at the end of the laminated body 10. Further, when the material of the cover layer 18 is a ferroelectric material having ε _r of 200 or more, the induction of polarization in the cover layer 18 is further promoted, so that the concentration of the electric field at the end of the laminated body 10 is effective. Is suppressed. When a dielectric material different from the ferroelectric material is used, the above action cannot be obtained. Therefore, dielectric breakdown can be suppressed by selecting a ferroelectric material as the material of the cover layer 18 and controlling the thickness thereof so as to satisfy the above relationship.

In the above embodiment, a case where an inclined surface is formed by the dielectric layers 2, 4 and 6, the internal electrode layers 3 and 5, and the upper electrode layer 7 in the openings 10A to 10C of the thin film capacitor 100 will be described. However, the shape of the side wall of the openings 10A to 10C is not limited to the inclined surface.

FIG. 5 shows a thin film capacitor in which the curved surface of the inclined surface of the opening is a vertical type along the stacking direction as a modification. FIG. 5 shows the number of openings 10C in the thin film capacitor 200 of the modified example. That is, it corresponds to FIG. 2 in which the thin film capacitor 100 is described.

In the thin film capacitor 200, similarly to the conventional thin film capacitor 300 shown in FIG. 4, the dielectric layers 4 and 6 and the internal electrode layer 5 and the upper electrode layer 7 laminated on the dielectric layers 4 and 6 are formed. , Are manufactured in the same shape. Therefore, the end faces of the dielectric layer 4 and the internal electrode layer 5 are continuous in the stacking direction (vertical direction), and the end faces of the dielectric layer 6 and the upper electrode layer 7 are continuous in the stacking direction (vertical direction). In such a thin film capacitor 200 as well, similarly to the thin film capacitor 100, a cover layer made of a ferroelectric material is provided so as to be in contact with the end face of the dielectric layer, and the thickness of the dielectric layer is T1 (nm). And the thickness T2 (nm) of the cover layer satisfy 2500 <T1 × T2 <40000, so that dielectric breakdown in the dielectric layer can be suppressed and damage to the thin film capacitor can be prevented.

In the thin film capacitor 200 shown in FIG. 5, the minimum value of the cover layer thickness T2 when the interface A6 with the dielectric layer 6 is used as a reference is selected, and therefore, as shown in FIG. the thickness T2 ₆ of the upper side of the cover layer 18 is a thickness T2 of the cover layer 18 to the interface A6. Further, with respect to the dielectric layer 4, the thickness T2 ₄ of the cover layer when the interface A4 with the dielectric layer 4 is used as a reference becomes the thickness T2 of the cover layer 18.

Although the embodiment of the present invention has been described above, the thin film capacitor according to the present invention is not limited to the above embodiment, and various modifications can be made.

For example, in the above embodiment, a plurality of dielectric layers 2, 4, 6 are laminated on the upper portion of the lower electrode layer 1, and internal electrode layers 3, 5 are provided between the dielectric layers 2, 4, 6. Although the configuration is described, the present invention can also be applied to a so-called single layer thin film capacitor having at least one dielectric layer. In the case of a single-layer thin film capacitor, a lower electrode, an upper electrode, and the like are provided with a dielectric layer interposed therebetween. At this time, by providing the cover layer 18 made of a ferroelectric material so as to be in contact with the end face of the dielectric layer and to cover the end face, dielectric breakdown due to electric field concentration can be suppressed. Further, the number of dielectric layers may be two or more. The presence / absence and the number of internal electrode layers are changed according to the number of dielectric layers. Further, the number of openings provided is also changed according to the number of lower electrode layers and internal electrode layers.

Further, the arrangement of the terminal electrodes 11 and 12 and the arrangement of the vias can be changed as appropriate. Further, the arrangement of the openings is appropriately changed according to the arrangement of the vias. Further, the inclination angle of the inclined surface and the like can be appropriately changed according to the arrangement and shape of the opening.

Further, in the above embodiment, the case where the cover layer 18 also covers the upper surface of the upper electrode layer 7 has been described, but the cover layer 18 made of a ferroelectric material is at least in contact with the end face of the dielectric layer and is a dielectric layer. It suffices if it is provided so as to cover. That is, the cover layer 18 may be configured not to cover the upper surface of the upper electrode layer 7.

Further, the method for manufacturing the thin film capacitor is not limited to the one described in the above embodiment. In the above embodiment, a mode in which the plurality of dielectric layers 2, 4, 6 and the cover layer 18 laminated on the upper portion of the lower electrode layer 1 are fired at once is described, but the firing is repeated many times. It may be performed (performed for each dielectric layer).

1 ... Lower electrode layer, 2, 4, 6 ... Dielectric layer, 3, 5 ... Internal electrode layer, 7 ... Upper electrode layer, 10 ... Laminated body, 11, 12 ... Terminal electrode, 18 ... Cover layer, 20 ... Protection Layer, 100, 200, 300 ... Thin film capacitor.

Claims (3)

A pair of electrode layers and
A dielectric layer sandwiched between the pair of electrode layers and
It has a cover layer made of barium titanate that covers the end face while being in contact with the end face of the dielectric layer.
The cover layer is obtained by crystallizing the barium titanate.
The thickness of the dielectric layer and T1 (nm), the thickness of the cover layer 18 at the interface between the dielectric layer is taken as T2 (nm),
2500 <T1 x T2 <40000
A thin film capacitor that satisfies the relationship. The thin film capacitor according to claim 1, wherein the cover layer has a relative permittivity (εr) of 200 or more. The thickness T1 (nm) of the dielectric layer and the thickness T2 (nm) of the cover layer are
T1 ≤ T2
The thin film capacitor according to claim 1 or 2, which satisfies the above relationship.

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