JP6739163B2 - Semiconductor device - Google Patents

Description

One embodiment of the present invention relates to a semiconductor device, a display panel, and an electronic device.

Note that one embodiment of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter). Therefore, as a technical field of one embodiment of the present invention disclosed more specifically in this specification, a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, a driving method thereof, or a manufacturing method thereof, Can be mentioned as an example.

Note that in this specification and the like, a semiconductor device refers to an element, a circuit, a device, or the like which can function by utilizing semiconductor characteristics. As an example, semiconductor elements such as transistors and diodes are semiconductor devices. As another example, the circuit including the semiconductor element is a semiconductor device. As another example, a device including a circuit having a semiconductor element is a semiconductor device.

The display device is provided with a source driver IC (Integrated Circuit) including a reference voltage generation circuit that generates a gradation voltage for expressing a luminance level corresponding to an input video signal. Patent Document 1 discloses a source driver IC including a plurality of reference voltage generation circuits.

U.S. Patent Application Publication No. 2014/0085349

The plurality of voltages generated by the reference voltage generation circuit are output by the selector as gradation voltages according to the video signal. However, the provision of the plurality of reference voltage generation circuits increases the area occupied by the wiring for transmitting the plurality of voltages. Therefore, there arises a problem that the circuit area of the source driver IC increases. In particular, when a plurality of wirings extending from different reference voltage generation circuits are provided so as to overlap each other along the long axis direction of the source driver IC, the increase in the circuit area due to the increase in the number of wirings becomes remarkable.

An object of one embodiment of the present invention is to provide a novel semiconductor device, an electronic component, a novel electronic device, or the like having a structure different from that of a semiconductor device which functions as an existing source driver IC. Alternatively, it is an object of one embodiment of the present invention to provide a semiconductor device or the like having a novel structure in which a circuit area is reduced in a semiconductor device including a plurality of reference voltage generation circuits.

Note that the problem of one embodiment of the present invention is not limited to the problems listed above. The issues listed above do not preclude the existence of other issues. The other issues are the ones not mentioned in this item, which will be described below. Problems that are not mentioned in this item can be derived from descriptions in the specification, drawings, and the like by those skilled in the art, and can be appropriately extracted from these descriptions. Note that one embodiment of the present invention is to solve at least one of the above-listed description and/or other problems.

One embodiment of the present invention includes a first reference voltage generation circuit, a second reference voltage generation circuit, a first selector, a second selector, a first wiring, and a second wiring. In the semiconductor device having the first reference voltage generation circuit, the first reference voltage generation circuit has a function of generating a first plurality of voltages, and the second reference voltage generation circuit generates a second plurality of voltages. The first wiring has a function of transmitting any one of the first plurality of voltages generated by the first reference voltage generation circuit, and the second wiring has , And has a function of transmitting any one of the second plurality of voltages generated by the second reference voltage generation circuit, and the first selector selects one of the first plurality of voltages. The second selector has a function of outputting, and the second selector has a function of selecting and outputting any one of the second plurality of voltages, and the first wiring and the second wiring are The semiconductor device is provided along the long axis direction of the semiconductor device without overlapping.

One embodiment of the present invention is a first reference voltage generation circuit, a second reference voltage generation circuit, a third reference voltage generation circuit, a first selector, a second selector, and a third selector. And a first wiring, a second wiring, and a third wiring, wherein the first reference voltage generation circuit is capable of generating a first plurality of voltages. And the second reference voltage generation circuit has a function of generating a second plurality of voltages, and the third reference voltage generation circuit can generate a third plurality of voltages. The first wiring has a function capable of transmitting any one of the first plurality of voltages generated by the first reference voltage generation circuit, and the second wiring has a second function. Has a function of transmitting any one of the second plurality of voltages generated by the reference voltage generation circuit, and the third wiring has a third plurality of voltages generated by the third reference voltage generation circuit. Of the first plurality of voltages, the first selector has a function of selecting and outputting any one of the first plurality of voltages, and the second selector has a function of transmitting 2 has a function of selecting and outputting any one of the plurality of voltages, and the third selector has a function of selecting and outputting any one of the third plurality of voltages. The first wiring, the second wiring, and the third wiring are semiconductor devices provided along the long axis direction of the semiconductor device without overlapping.

In one embodiment of the present invention, the first reference voltage generation circuit is a circuit which generates a gray scale voltage supplied to a pixel having a display element which exhibits a red color, and the second reference voltage generation circuit is a display which exhibits a green color. A semiconductor device which is a circuit that generates a grayscale voltage to be supplied to a pixel having an element, and the third reference voltage generation circuit is a circuit that generates a grayscale voltage to be supplied to a pixel having a display element that exhibits blue color is preferable. ..

Note that other aspects of the present invention are described in the description of the embodiment below and the drawings.

One embodiment of the present invention can provide a novel semiconductor device, a novel electronic device, or the like. Alternatively, according to one embodiment of the present invention, a semiconductor device or the like having a novel structure in which a circuit area is reduced can be provided.

Note that the effects of one embodiment of the present invention are not limited to the effects listed above. The effects listed above do not prevent the existence of other effects. The other effects are the effects which are not mentioned in this item, which will be described below. The effects not mentioned in this item can be derived from the description in the specification or the drawings by those skilled in the art, and can be appropriately extracted from these descriptions. Note that one embodiment of the present invention has at least one of the above-listed effects and/or other effects. Therefore, one embodiment of the present invention may not have the effects listed above in some cases.

The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a circuit diagram. The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a block diagram. The figure explaining an example of a circuit diagram. The figure explaining an example of a cross-sectional schematic diagram. FIG. 6 illustrates an example of a display panel. FIG. 6 illustrates an example of a display module. 7A to 7C each illustrate an example of an electronic device.

Hereinafter, embodiments will be described with reference to the drawings. However, it is easily understood by those skilled in the art that the embodiment can be implemented in many different modes, and that the form and details can be variously changed without departing from the spirit and the scope thereof. .. Therefore, the present invention should not be construed as being limited to the description of the embodiments below.

Note that in this specification and the like, the ordinal numbers “first”, “second”, and “third” are added to avoid confusion among components. Therefore, the number of components is not limited. It does not limit the order of the components. For example, a constituent element referred to as “first” in one of the embodiments of the present specification and the like is a constituent element referred to as “second” in another embodiment or in the claims. There is also a possibility. For example, a component referred to as “first” in one of the embodiments of the present specification and the like may be omitted in another embodiment or the claims.

In the drawings, the same elements, elements having the same function, elements made of the same material, elements formed at the same time, and the like may be denoted by the same reference numerals, and repeated description thereof may be omitted.

(Embodiment 1)
In this embodiment, an example of a semiconductor device having a function as a source driver IC will be described.

FIG. 1 is an example of a block diagram schematically showing the configuration of a semiconductor device.

The semiconductor device 100 shown in FIG. 1 includes a shift register 110 (denoted by SR in the figure), a data register 120 (denoted by DATA REGISTER in the figure), and a digital/analog (Digital/Analog) conversion circuit 130 (denoted by DAC in the figure). And a buffer amplifier 140 (shown as BUFFER AMP. in the figure). In FIG. 1, source lines SL_1 to SL_n (n is a natural number of 2 or more) from which signals are output from the semiconductor device 100 are illustrated.

The digital-analog conversion circuit 130 includes a plurality of reference voltage generation circuits 132_1 and 132_2 (indicated as VGEN in the drawing), wiring groups 134_1 and 134_2, and a selector 136.

A source clock and a source start pulse, for example, are input to the shift register 110. The shift register 110 generates a sampling pulse and outputs it to the data register 120.

The data register 120 receives, for example, digital signal data DATA. The data register 120 samples and holds the data DATA according to the sampling pulse of the shift register 110.

The digital-analog conversion circuit 130 receives data DATA (also referred to as digital data) of a digital signal held in the data register 120, for example. The digital-analog conversion circuit 130 generates a plurality of voltages according to digital data. The wiring group having a plurality of wirings is arranged along the direction in which the source lines SL_1 to SL_n are arranged, that is, along the long axis direction of the semiconductor device 100. The selector selects one of a plurality of voltages supplied to the wiring group according to digital data and outputs it as data DATA (also referred to as analog data) of an analog signal. The voltage based on the analog data corresponds to the gradation voltage.

Note that the direction in which the source lines SL_1 to SL_n are arranged is a direction parallel to the arrow D _SL in FIG. The long-axis direction of the semiconductor device 100 is the direction in which the source lines SL_1 to SL_n are arranged in ascending or descending order, that is, the x direction in FIG. 1, and the short-axis direction of the semiconductor device 100 is that the source lines SL_1 to SL_n extend. This is the direction in which it is provided, that is, the y direction in FIG. The semiconductor device 100 is arranged such that the long axis direction of the semiconductor device 100 is parallel to the side of the substrate on which the display section is formed. Therefore, it can be said that the wiring group having a plurality of wirings in the digital-analog conversion circuit 130 is provided without overlapping along the side of the substrate on which the display portion is formed.

The buffer amplifier 140 amplifies the analog data output by the digital-analog conversion circuit 130. The buffer amplifier 140 outputs the amplified analog data to the source lines SL[1] to SL[n].

The reference voltage generation circuit 132_1 generates a plurality of voltages. The wiring group 134_1 has a plurality of wirings. The plurality of voltages generated by the reference voltage generation circuit 132_1 are supplied to the plurality of wirings of the wiring group 134_1 arranged along the long axis direction of the semiconductor device 100. The reference voltage generation circuit 132_2 generates a plurality of voltages different from the plurality of voltages generated by the reference voltage generation circuit 132_1. The wiring group 134_2 has a plurality of wirings. The wiring group 134_2 is provided along the major axis direction of the semiconductor device 100 so as not to overlap with the wiring group 134_1. The plurality of voltages generated by the reference voltage generation circuit 132_2 are supplied to the plurality of wirings in the wiring group 134_2. The selector 136 can be provided on the wiring group as shown in FIG. The selector 136 can convert digital data into analog data based on the plurality of voltages generated by the reference voltage generation circuits 132_1 and 132_2 by using a tournament method, a decoder method, or the like.

The reference voltage generation circuits 132_1 and 132_2 are effective in the case of a configuration that supplies different voltages. For example, when the pixels of the display section have red, green, and blue display elements, and each display element expresses gradation by different voltages, reference voltage generation corresponding to each color of red, green, and blue is generated. The circuit produces multiple voltages. By converting the digital data of each color into analog data based on different voltages, it is possible to perform gradation display of the brightness by the voltage according to the characteristics of the display element of each color.

The plurality of voltages generated by the plurality of reference voltage generation circuits are voltages for expressing the gradation of brightness corresponding to the number of bits of digital data. In the case of the configuration in which a plurality of reference voltage generation circuits are provided as in FIG. 1, the number of voltages increases exponentially as the number of bits of digital data increases. For example, when converting 12-bit digital data into analog data, a 4096-value voltage and 4096 wires are required.

When the wiring groups 134_1 and 134_2 are provided so as to overlap each other along the long axis direction of the semiconductor device 100, that is, when provided as in the semiconductor device 100A illustrated in FIG. 2, in the semiconductor device 100A, the long axis of the semiconductor device 100 is almost the same. Since the wirings of the wiring groups 134_1 and 134_2 having the same length are provided, the area for arranging the wiring groups 134_1 and 134_2 increases.

On the other hand, in the structure of one embodiment of the present invention, the wiring group 134_1 and the wiring group 134_2 are provided so as not to overlap with each other in the long axis direction of the semiconductor device 100. With such a structure, it is not necessary to provide the wirings of the wiring groups 134_1 and 134_2 so as to have substantially the same length as the long axis of the semiconductor device 100. Therefore, the area for arranging the wiring groups 134_1 and 134_2 can be reduced. In other words, the length of the wiring that transmits the voltage generated by the reference voltage generation circuit can be shortened. Therefore, it is possible to reduce the influence of resistance and/or parasitic capacitance in the wiring that draws the voltage generated by the reference voltage generation circuit.

Note that in FIG. 1, the reference voltage generation circuits 132_1 and 132_2 are provided near the center and the end portion of the long axis of the semiconductor device 100, respectively, and the wiring groups 134_1 and 134_2 are arranged in one direction of the reference voltage generation circuits 132_1 and 132_2. Although the structure is provided so as to extend, another structure may be used. For example, the configuration of the semiconductor device 100B shown in FIG. 3 may be used.

In the semiconductor device 100B shown in FIG. 3, the reference voltage generation circuits 132_1 and 132_2 are provided at both ends of the long axis of the semiconductor device 100B, and the wiring groups 134_1 and 134_2 extend near the center of the long axis of the semiconductor device 100B. The configuration is provided. With such a structure, the selector 136 provided over the wiring groups 134_1 and 134_2 can be efficiently arranged.

As another configuration, for example, the configuration of the semiconductor device 100C shown in FIG. 4 may be used.

In the semiconductor device 100C shown in FIG. 4, the reference voltage generation circuits 132_1 and 132_2 are respectively provided from both ends of the long axis of the semiconductor device 100C toward the central portion, and the wiring groups 134_1 and 134_2 are provided on both sides of the long axis of the semiconductor device 100C. It is configured so as to be extended to. With such a structure, the influence of wiring resistance or the like on the voltage supplied from the reference voltage generation circuits 132_1 and 132_2 to the wiring groups 134_1 and 134_2 can be reduced.

Although FIG. 1 shows the configuration in which the two reference voltage generation circuits are provided, the number may be three. For example, the configuration of the semiconductor device 100D shown in FIG. 5 may be used.

In the semiconductor device 100D illustrated in FIG. 5, the digital-analog conversion circuit 130 includes reference voltage generation circuits 132_1, 132_2, and 132_3. The plurality of voltages generated by the reference voltage generation circuits 132_1, 132_2, 132_3 are supplied to the wiring groups 134_1, 134_2, 134_3, and output by the selector 136 as analog data based on digital data. Even in the configuration in which the three reference voltage generation circuits are provided, the wiring group 134_1 and the wiring group 134_2 are provided so as not to overlap each other in the major axis direction of the semiconductor device 100, thereby providing an area for arranging the wiring groups 134_1 and 134_2. Can be reduced.

The reference voltage generation circuits 132_1, 132_2, 132_3 are effective in the case of a configuration that supplies three or more separate voltages. For example, when the pixels of the display section have red, green, and blue display elements, and each display element expresses gradation by different voltages, reference voltage generation corresponding to each color of red, green, and blue is generated. By generating a plurality of voltages in the circuits 132_1, 132_2, and 132_3 and converting them into analog data in accordance with digital data, it is possible to perform gradation display of brightness with a voltage according to the characteristics of the display element of each color.

As a configuration different from that of FIG. 5, for example, the configuration of the semiconductor device 100E shown in FIG. 6 may be used.

In the semiconductor device 100E shown in FIG. 6, the reference voltage generation circuits 132_1 and 132_3 are provided at both ends of the long axis of the semiconductor device 100E, and the reference voltage generation circuit 132_2 is provided near the center of the long axis of the semiconductor device 100E. The wiring groups 134_1 and 134_3 are provided so as to extend near the center of the long axis of the semiconductor device 100E, and the wiring groups 134_2 are provided so as to extend at both ends of the long axis of the semiconductor device 100E. With such a structure, the influence of wiring resistance or the like on the voltage supplied from the reference voltage generation circuit 132_2 to the wiring group 134_2 can be reduced and the selector 136 provided over the wiring groups 134_1 and 134_3 can be efficiently arranged. it can.

FIG. 7 is a circuit diagram showing a configuration example of a reference voltage generation circuit, a selector, and a wiring group included in the analog-digital conversion circuit. In FIG. 7, the reference voltage generation circuit 132 has a plurality of resistors 133. In FIG. 7, a wiring group 134 is provided so as to extend from the reference voltage generation circuit 132. An example in which two selectors 136_1 and 136_2 are connected to the wiring group 134 is shown. The selectors 136_1 and 136_2 are composed of a p-channel type transistor 137 and an n-channel type transistor 138. The selectors 136_1 and 136_2 respectively select a voltage supplied to one of the wiring groups 134 and output it as analog data V _{O_1} and V _{O_2} .

The arrangement of the transistors forming the selectors 136_1 and 136_2 has been described by taking the tournament method as an example, but other methods such as a decoder method may be used.

Although FIG. 1 shows the configuration in which the selector 136 selects and outputs the analog data according to the number of bits of the digital data, another configuration may be adopted. For example, FIG. 8 illustrates a configuration in which the selector 136 selects the voltage corresponding to the upper bit of the digital data and provides the interpolation circuit 139 that generates the voltage or the current corresponding to the lower bit of the digital data. The interpolation circuit 139 may be configured to generate desired analog data using an operational amplifier, a voltage-current conversion circuit, or the like.

A configuration example in which the semiconductor device which supplies analog data described in FIG. 6 is applied to a display portion which performs color display will be described with reference to FIGS.

When three or more reference voltage generation circuits like the reference voltage generation circuits 132_1, 132_2, and 132_3 described in FIG. 6 are provided, each voltage is supplied separately. For example, when the pixels of the display section have red, green, and blue display elements, and each display element expresses gradations with different voltages, the reference voltage generation circuits 132_1, 132_2, and 132_3 are respectively set to red and green. , Or a voltage corresponding to each color of blue is generated. With such a structure, gradation display of brightness according to the characteristics of the display element of each color can be performed.

In FIG. 9, in addition to the digital-analog conversion circuit 130 and the buffer amplifier 140, the display unit 170 that performs color display is illustrated. In FIG. 9, for simplification of the description, the source lines SL_1 to SL_12 in 12 columns are illustrated as an example. The pixels 172 in the display portion 170 are connected to the source lines SL_1 to SL_12 in each column. The pixel 172 is a pixel including a display element which exhibits any one of three colors of red, green, and blue for performing color display. For the purpose of explanation, in FIG. 9, pixels 172 having display elements exhibiting red are R1 to R4, pixels 172 having display elements exhibiting green are G1 to G4, and pixels 172 having display elements exhibiting blue are B1 to B4. Illustrated. In FIG. 9, the reference voltage generation circuit 131_R that generates a voltage to be supplied to the pixels (R1 to R4) is illustrated as VGEN_R. A reference voltage generation circuit 131_G that generates a voltage to be supplied to the pixels (G1 to G4) is shown as VGEN_G. The reference voltage generation circuit 131_B that generates a voltage to be supplied to the pixels (B1 to B4) is shown as VGEN_B. In FIG. 9, the buffer 142 included in the buffer amplifier 140 is illustrated in each column.

In FIG. 9, digital data corresponding to red is shown as DATA_R1 to DATA_R4. In FIG. 9, digital data corresponding to green is illustrated as DATA_G1 to DATA_G4. In FIG. 9, digital data corresponding to blue is shown as DATA_B1 to DATA_B4. DATA_R1 to DATA_R4, DATA_G1 to DATA_G4, and DATA_B1 to DATA_B4 are sequentially input along the long axis direction of the semiconductor device. This is because the reference voltage generation circuits 132_1, 132_2, and 132_3 corresponding to the respective colors are input in order of digital data.

9 illustrates the analog data corresponding to red as _{V R1} to _{V R4.} In FIG. 9, analog data corresponding to green is shown as V _{G1 to} V _G4 . In FIG. 9, analog data corresponding to blue is shown as V _{B1 to} V _B4 . V _{R1 to} V _R4 , V _{G1 to} V _G4 , and V _{B1 to} V _B4 output from the digital-analog conversion circuit 130 are sequentially input along the long axis direction of the semiconductor device. This is because the reference voltage generation circuits 132_1, 132_2, and 132_3 corresponding to the respective colors are input together in order of the digital data.

In FIG. 9, the connection switching unit 160 is provided after the buffer amplifier 140. V _{R1 to} V _R4 , V _{G1 to} V _G4 , and V _{B1 to} V _B4 output from the digital-analog conversion circuit 130 described above correspond to the colors of the pixels connected to the source lines SL_1 to SL_12 in each column. A connection switching unit 160 is provided in order to rearrange. The connection switching unit 160, an analog data applied to the source line SL_1 to SL_12 _{is, V R1, V G1, V} B1, V R2, V G2, V B2, V R3, V G3, V B3, V R4, V G4 , V _B4 can be rearranged in this order. That is, by including the connection switching unit 160, analog data generated by different reference voltage generation circuits can be supplied to pixels in which display elements each of which represents each color for color display are arranged in a fixed order. It is possible to display on the display unit by the voltage generated differently for each.

Although the connection switching unit 160 is provided between the buffer amplifier 140 and the source lines SL_1 to SL_12 in each column in FIG. 9, another configuration may be used. For example, as shown in FIG. 10, the connection switching unit 160 may be provided between the digital-analog conversion circuit 130 and the buffer amplifier 140.

When performing inversion driving in the configurations of the block diagrams shown in FIGS. 9 and 10, as shown in FIG. 11, two selectors 136 corresponding to the digital data DATA_R1 are provided to generate different analog data. Separate analog data can be output as analog data V _R1 to the buffer amplifier 140 and the like in the subsequent stage by switching and outputting by the switching circuit 135.

As described above, in the configuration of this embodiment, when the voltages generated by the plurality of reference voltage generation circuits are supplied to the respective columns of the source lines, the wirings extending from the different reference voltage generation circuits are connected in the long axis direction of the semiconductor device. The structure is provided so that they do not overlap along the line. With such a structure, an area occupied by wirings for supplying a plurality of voltages output from different reference voltage generation circuits can be reduced, so that a semiconductor device with a reduced circuit area can be obtained.

(Embodiment 2)
In this embodiment mode, a circuit block diagram of a display device including the semiconductor device functioning as a source driver IC described in the above embodiment modes will be described.

The circuit block diagram of the display device illustrated in FIG. 12 includes a source driver 200, a gate driver 180, and a display portion 170. In FIG. 12, the pixel 172 is shown in the display unit 170.

As the source driver 200, the source driver IC which is the semiconductor device 100 described in Embodiment 1 can be used. The source driver 200 illustrated in FIG. 12 includes a shift register 110, a data register 120, a digital-analog conversion circuit 130, and a buffer amplifier 140, like the semiconductor device 100 of FIG. Therefore, the source driver IC can reduce the circuit area corresponding to the wiring.

The source driver 200 has a function of outputting an analog signal to the source lines SL[1] to SL[n] (n is a natural number of 2 or more) similarly to the semiconductor device 100 described in Embodiment 1.

The gate driver 180 has, for example, a shift register, a buffer amplifier, and the like. The gate driver 180 receives a gate start pulse, a gate clock, etc. and outputs a pulse signal. The circuit forming the gate driver 180 may be integrated into an IC like the source driver 200, or the same transistor as the transistor included in the pixel 172 of the display portion 170 may be used.

The gate driver 180 outputs a scanning signal to the gate lines GL[1] to GL[m] (m is a natural number of 2 or more). Note that a plurality of gate drivers 180 may be provided and the gate lines GL[1] to GL[m] may be divided and controlled by the plurality of gate drivers 180. For example, the gate drivers 180 may be arranged on the left and right of the display unit 170, and the gate lines GL[1] to GL[m] may be divided and controlled for each row.

The display portion 170 is provided so that the gate lines GL[1] to GL[m] and the source lines SL[1] to SL[n] are substantially orthogonal to each other. A pixel 203 is provided at the intersection of the gate line and the source line. In the case of color display, the pixels 172 are arranged in the display portion 170 in order of pixels corresponding to each color of RGB (red, green, blue). Note that the RGB pixel array can be appropriately used such as a stripe array, a mosaic array, or a delta array. Not limited to RGB, a color such as white or yellow may be added to perform color display.

Note that when a function of a touch sensor is added to the display portion 170, the touch sensor 190 may be added as illustrated in FIG. The touch sensor 190 may be combined with the display unit 170 to form an in-cell touch panel. The signal obtained by the touch sensor 190 may be processed by the touch driver IC 192 formed integrally with the source driver 200.

An example of the structure of the pixel 172 is described with reference to FIGS. 14A and 14B.

A pixel 172A in FIG. 14A is an example of a pixel included in a liquid crystal display device and includes a transistor 231, a capacitor 232, and a liquid crystal element 233.

The transistor 231 has a function as a switching element which controls connection between the liquid crystal element 233 and the source line SL. The conduction state of the transistor 231 is controlled by the scanning signal input from the gate of the transistor 231 via the gate line GL.

The capacitor 232 is, for example, an element formed by stacking conductive layers.

The liquid crystal element 233 is, for example, an element including a common electrode, a pixel electrode, and a liquid crystal layer. The orientation of the liquid crystal material of the liquid crystal layer is changed by the action of the electric field formed between the common electrode and the pixel electrode.

A pixel 172B in FIG. 14B is an example of a pixel included in an EL display device and includes a transistor 221, a transistor 222, and an EL element 223. Note that in FIG. 14B, the power supply line VL is illustrated in addition to the gate line GL and the source line SL. The power supply line VL is a wiring for supplying a current to the EL element 223.

The transistor 221 has a function as a switching element which controls connection between the gate of the transistor 222 and the source line SL. The transistor 221 is controlled to be turned on and off by a scanning signal input from its gate via the gate line GL.

The transistor 222 has a function of controlling a current flowing between the power supply line VL and the EL element 223 according to the voltage applied to the gate.

The EL element 223 is, for example, an element including a light emitting layer sandwiched between electrodes. The EL element 223 can control the luminance according to the amount of current flowing through the light emitting layer.

The circuit block diagram of the display device described above includes the semiconductor device 1000 described in any of the above embodiments. Therefore, the circuit area can be reduced.

(Embodiment 3)
In this embodiment, an example of a cross-sectional structure of the semiconductor device of one embodiment of the present invention will be described with reference to FIGS.

The semiconductor device described in any of the above embodiments includes the shift register 110, the data register 120, the digital-analog conversion circuit 130, the buffer amplifier 140, and the like, and can be formed using a transistor including silicon or the like. Note that as silicon, polycrystalline silicon, microcrystalline silicon, or amorphous silicon can be used. Note that an oxide semiconductor or the like can be used instead of silicon.

FIG. 15 is a schematic cross-sectional view of a semiconductor device according to one embodiment of the present invention. The schematic cross-sectional view illustrated in FIG. 15 includes an n-channel transistor and a p-channel transistor each including a semiconductor material (eg, silicon).

The n-channel transistor 510 includes a channel formation region 501 provided in a substrate 500 containing a semiconductor material, a low concentration impurity region 502 and a high concentration impurity region 503 provided so as to sandwich the channel formation region 501 (these are combined). (Also simply referred to as an impurity region), an intermetallic compound region 507 provided in contact with the impurity region, a gate insulating film 504a provided on the channel formation region 501, and a gate provided on the gate insulating film 504a. It has an electrode layer 505a and a source electrode layer 506a and a drain electrode layer 506b which are provided in contact with the intermetallic compound region 507. A sidewall insulating film 508a is provided on a side surface of the gate electrode layer 505a. An interlayer insulating film 521 and an interlayer insulating film 522 are provided so as to cover the transistor 510. The source electrode layer 506a and the drain electrode layer 506b are connected to the intermetallic compound region 507 through the openings formed in the interlayer insulating film 521 and the interlayer insulating film 522.

The p-channel transistor 520 includes a channel formation region 511 provided in a substrate 500 containing a semiconductor material, a low concentration impurity region 512 and a high concentration impurity region 513 provided so as to sandwich the channel formation region 511 (these are combined). (Also simply referred to as an impurity region), an intermetallic compound region 517 provided in contact with the impurity region, a gate insulating film 504b provided over the channel formation region 511, and a gate provided over the gate insulating film 504b. It has an electrode layer 505b and a source electrode layer 506c and a drain electrode layer 506d which are provided in contact with the intermetallic compound region 517. A sidewall insulating film 508b is provided on a side surface of the gate electrode layer 505b. An interlayer insulating film 521 and an interlayer insulating film 522 are provided so as to cover the transistor 520. The source electrode layer 506c and the drain electrode layer 506d are connected to the intermetallic compound region 517 through the openings formed in the interlayer insulating film 521 and the interlayer insulating film 522.

An element isolation insulating film 509 is provided over the substrate 500 so as to surround the transistor 510 and the transistor 520, respectively.

Note that although FIG. 15 illustrates the case where the transistor 510 and the transistor 520 are transistors in which a channel is formed in a semiconductor substrate, the transistor 510 and the transistor 520 have a plurality of amorphous semiconductor films formed over an insulating surface. A transistor in which a channel is formed in a crystalline semiconductor film may be used. A transistor in which a channel is formed in a single crystal semiconductor film like an SOI substrate may be used.

By using a single crystal semiconductor substrate as the semiconductor substrate, the transistors 510 and 520 can operate at high speed. Therefore, it is preferable to form the transistors included in each of the circuits described in the above embodiments over the single crystal semiconductor substrate.

The transistor 510 and the transistor 520 are connected to each other by a wiring 523. Note that an interlayer insulating film and an electrode layer may be provided over the wiring 523, and a transistor may be stacked and provided.

(Embodiment 4)
In this embodiment, as an application example using the semiconductor device described in the above embodiment, an example of application to a display panel, an example of application of the display panel to a display module, an application example of the display module, and an electronic device Application examples to devices will be described with reference to FIGS. 16 to 18.

<Example of mounting on display panel>
An example in which a semiconductor device functioning as a source driver IC is applied to a display panel will be described with reference to FIGS.

In the case of FIG. 16A, a source driver 712 and gate drivers 712A and 712B are provided around a display portion 711 included in a display panel, and a source driver IC 714 including a semiconductor device over a substrate 713 is provided as the source driver 712. It shows an example that is implemented.

The source driver IC 714 is mounted on the substrate 713 using an anisotropic conductive adhesive and an anisotropic conductive film.

The source driver IC 714 is connected to the external circuit board 716 via the FPC 715.

In the case of FIG. 16B, the source driver 712 and the gate drivers 712A and 712B are provided around the display portion 711, and the source driver IC 714 is mounted on the FPC 715 as the source driver 712.

By mounting the source driver IC 714 on the FPC 715, the display portion 711 can be provided in a large size on the substrate 713 and a narrow frame can be achieved.

<Application example of display module>
Next, an application example of a display module including the display panel in FIGS. 16A and 16B will be described with reference to FIGS.

A display module 8000 illustrated in FIG. 17 includes a touch panel 8004 connected to an FPC 8003, a display panel 8006 connected to an FPC 8005, a frame 8009, a printed board 8010, and a battery 8011 between an upper cover 8001 and a lower cover 8002. Note that the battery 8011, the touch panel 8004, and the like may not be provided.

The display panel described in FIGS. 16A and 16B can be used as the display panel 8006 in FIG.

The shape and/or size of the upper cover 8001 and the lower cover 8002 can be changed as appropriate in accordance with the sizes of the touch panel 8004 and the display panel 8006.

As the touch panel 8004, a touch panel of a resistance film type or a capacitance type can be used by being superimposed on the display panel 8006. The counter substrate (sealing substrate) of the display panel 8006 can have a touch panel function. Alternatively, an optical sensor can be provided in each pixel of the display panel 8006 to form an optical touch panel. Alternatively, an electrode for a touch sensor may be provided in each pixel of the display panel 8006 so that a touch panel of a capacitance type can be obtained. In this case, the touch panel 8004 can be omitted.

The frame 8009 has a function of protecting the display panel 8006 and a function of an electromagnetic shield for blocking an electromagnetic wave generated by the operation of the printed circuit board 8010. The frame 8009 may have a function as a heat dissipation plate.

The printed circuit board 8010 has a power supply circuit and a signal processing circuit for outputting a video signal and a clock signal. The power supply for supplying power to the power supply circuit may be an external commercial power supply or a power supply by a battery 8011 provided separately. The battery 8011 can be omitted when a commercial power source is used.

The display module 8000 may be additionally provided with members such as a polarizing plate, a retardation plate, and a prism sheet.

<Application example to electronic equipment>
Next, electronic devices such as a computer, a personal digital assistant (including a mobile phone, a portable game machine, and a sound reproducing device), electronic paper, a television device (also referred to as a television or a television receiver), a digital video camera, etc. A case where the display panel is a display panel to which the above-mentioned display module is applied will be described.

FIG. 18A illustrates a portable information terminal including a housing 901, a housing 902, a first display portion 903a, a second display portion 903b, and the like. At least part of the housings 901 and 902 is provided with the display module including the semiconductor device described in any of the above embodiments. Therefore, a portable information terminal with a reduced circuit area is realized.

Note that the first display portion 903a is a panel having a touch input function. For example, as shown in the left diagram in FIG. 18A, a “touch input” is performed by a selection button 904 displayed on the first display portion 903a. , Or "keyboard input" can be selected. The selection buttons can be displayed in various sizes, making it easy for people of all ages to experience. Here, for example, when “keyboard input” is selected, a keyboard 905 is displayed on the first display unit 903a as shown in the right diagram of FIG. As a result, like the conventional information terminal, quick character input by key input can be performed.

In the portable information terminal illustrated in FIG. 18A, one of the first display portion 903a and the second display portion 903b can be removed as illustrated in the right view of FIG. 18A. The second display portion 903b is also a panel having a touch input function, which makes it possible to further reduce the weight when carrying, and it is convenient because the housing 902 can be held with one hand and operated with the other hand. is there.

18A shows a function of displaying various pieces of information (still images, moving images, text images, and the like), a function of displaying a calendar, date, time, and the like on the display portion, and operating or editing information displayed on the display portion. It can have a function, a function of controlling processing by various software (programs), and the like. An external connection terminal (earphone terminal, USB terminal, etc.), a recording medium insertion portion, etc. may be provided on the back surface or side surface of the housing.

The portable information terminal illustrated in FIG. 18A may have a structure capable of wirelessly transmitting and receiving data. It is also possible to purchase desired book data and the like from an electronic book server wirelessly and download them.

Further, the housing 902 illustrated in FIG. 18A may be provided with an antenna, a microphone function, and/or a wireless function and used as a mobile phone.

FIG. 18B illustrates an electronic book terminal 910 in which electronic paper is mounted, which includes two housings, a housing 911 and a housing 912. The housing 911 and the housing 912 are provided with a display portion 913 and a display portion 914, respectively. The housing 911 and the housing 912 are connected by a shaft portion 915, and an opening/closing operation can be performed around the shaft portion 915. The housing 911 includes a power source 916, operation keys 917, a speaker 918, and the like. At least one of the housings 911 and 912 is provided with the display module including the semiconductor device described in any of the above embodiments. Therefore, an electronic book terminal with a reduced circuit area is realized.

FIG. 18C illustrates a television device including a housing 921, a display portion 922, a stand 923, and the like. The television device 920 can be operated with a switch and/or a remote controller 924 provided in the housing 921. A display module including the semiconductor device described in any of the above embodiments is mounted on the housing 921 and the remote controller 924. Therefore, a television device with a reduced circuit area is realized.

FIG. 18D is a smartphone, and a main body 930 is provided with a display portion 931, a speaker 932, a microphone 933, operation buttons 934, and the like. A display module including the semiconductor device described in any of the above embodiments is provided in the main body 930. Therefore, a smartphone with a reduced circuit area is realized.

FIG. 18E illustrates a digital camera, which includes a main body 941, a display portion 942, operation switches 943, and the like. A display module including the semiconductor device described in any of the above embodiments is provided in the main body 941. Therefore, a digital camera with a reduced circuit area is realized.

As described above, the electronic device described in this embodiment includes the display module including the semiconductor device described in any of the above embodiments. Therefore, an electronic device with a reduced circuit area is realized.

(Additional notes regarding the description in this specification, etc.)
The above embodiments and the description of each configuration in the above embodiments will be added below.

<Additional Notes on One Aspect of the Present Invention Described in Embodiments>
The structure described in each embodiment can be combined with a structure described in any of the other embodiments as appropriate to be one embodiment of the present invention. When a plurality of configuration examples are shown in one embodiment, the configuration examples can be appropriately combined with each other.

In addition, the content (may be part of the content) described in one embodiment is another content (may be part of the content) described in the embodiment, and/or one or a plurality of contents. Application, combination, replacement, or the like can be performed with respect to the content (may be part of the content) described in another embodiment.

Note that the content described in the embodiments means the content described using various drawings or the content described in the specification in each embodiment.

Note that a diagram (or part of it) described in one embodiment is another part of the diagram, another diagram (or part) described in the embodiment, and/or one or more. More drawings can be configured by combining the drawings (which may be a part) described in another embodiment of 1.

<Additional remarks regarding the description of the drawings>
In this specification and the like, terms such as “above” and “below” are used for convenience in order to describe the positional relationship between components with reference to the drawings. The positional relationship between the components changes as appropriate according to the direction in which each component is drawn. Therefore, the term indicating the arrangement is not limited to the description described in the specification, and can be appropriately paraphrased according to the situation.

The terms "above" or "below" do not limit that the positional relationship of the components is directly above or below and in direct contact with each other. For example, in the expression “electrode B on insulating layer A”, it is not necessary that the electrode B is formed directly on the insulating layer A, and another structure is provided between the insulating layer A and the electrode B. Do not exclude those that contain elements.

In the present specification and the like, in the block diagram, the constituent elements are classified by function and shown as independent blocks. However, in an actual circuit or the like, it is difficult to divide the constituent elements by function, and there may be a case where a plurality of functions are involved in one circuit or a case where one function is involved over a plurality of circuits. Therefore, the blocks in the block diagram are not limited to the components described in the specification, and can be rephrased appropriately according to the situation.

In the drawings, the size, the layer thickness, or the region is shown as an arbitrary size for convenience of description. Therefore, it is not necessarily limited to that scale. Note that the drawings are schematically shown for the sake of clarity, and are not limited to the shapes or values shown in the drawings. For example, it may include a signal, voltage, or current variation due to noise, or a signal, voltage, or current variation due to a timing shift.

<Additional remark regarding the description in other words>
In this specification and the like, when describing a connection relation of a transistor, one of a source and a drain is referred to as “one of a source and a drain” (or a first electrode or a first terminal) and a source and a drain are referred to. The other is described as "the other of the source and the drain" (or the second electrode or the second terminal). This is because the source and drain of the transistor change depending on the structure of the transistor, operating conditions, or the like. Note that the names of a source and a drain of a transistor can be appropriately referred to as a source (drain) terminal, a source (drain) electrode, or the like depending on circumstances.

In this specification and the like, the term “electrode” or “wiring” does not functionally limit these components. For example, "electrode" may be used as part of "wiring" and vice versa. Furthermore, the term “electrode” or “wiring” includes a case where a plurality of “electrodes” or “wirings” are integrally formed.

In this specification and the like, voltage and potential can be paraphrased as appropriate. The voltage is a potential difference from a reference potential, and for example, when the reference potential is a ground voltage (ground voltage), the voltage can be paraphrased into a potential. The ground potential does not always mean 0V. Note that the potentials are relative, and the potential applied to wiring or the like may be changed depending on the reference potential.

In this specification and the like, the terms “film”, “layer”, and the like can be replaced with each other depending on the case or circumstances. For example, it may be possible to change the term "conductive layer" to the term "conductive film". Alternatively, for example, it may be possible to change the term “insulating film” to the term “insulating layer”.

Note that in this specification and the like, a 1T-1C circuit structure in which one pixel includes one transistor and one capacitor, or a 2T-1C structure including two transistors and one capacitor in one pixel Although a circuit configuration is shown, this embodiment is not limited to this. A circuit configuration having three or more transistors and two or more capacitor elements in one pixel may be used, and a separate wiring may be further formed to have various circuit configurations.

<Additional notes regarding the definition of terms>
The definitions of the terms referred to in the above embodiment will be described below.

<< About switches >>
In this specification and the like, a switch refers to a switch which is in a conductive state (on state) or a non-conductive state (off state) and has a function of controlling whether or not to flow current. Alternatively, the switch has a function of selecting and switching a path through which current flows.

As an example, an electrical switch or a mechanical switch can be used. That is, the switch is not limited to a particular one as long as it can control the current.

Examples of electrical switches include transistors (for example, bipolar transistors, MOS transistors, etc.), diodes (for example, PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, and MIS (Metal Insulator Semiconductor) diodes. , A diode-connected transistor, or the like, or a logic circuit in which these are combined.

Note that when a transistor is used as a switch, the “conductive state” of the transistor means a state where the source and the drain of the transistor can be regarded as being electrically short-circuited. The “non-conduction state” of a transistor means a state in which the source and the drain of the transistor can be regarded as being electrically cut off. Note that when the transistor is operated as a simple switch, the polarity (conductivity type) of the transistor is not particularly limited.

An example of a mechanical switch is a switch using MEMS (micro electro mechanical system) technology, such as a digital micromirror device (DMD). The switch has a mechanically movable electrode, and movement of the electrode controls conduction and non-conduction.

<<About pixels>>
In this specification and the like, a pixel refers to, for example, one element whose brightness can be controlled. Therefore, as an example, one pixel indicates one color element, and the brightness is expressed by the one color element. Therefore, in that case, in the case of a color display device including color elements of R (red), G (green), and B (blue), the minimum unit of the image is the R pixel, the G pixel, and the B pixel. It is composed of three pixels.

The color elements are not limited to three colors, and may be more than three colors. For example, RGBW (W is white) may be used, or yellow, cyan, and magenta may be added to RGB.

<< about display element >>
In this specification and the like, a display element includes a display medium whose contrast, luminance, reflectance, transmittance, or the like is changed by an electric action or a magnetic action. Examples of display elements include EL (electroluminescence) elements, LED chips (white LED chips, red LED chips, green LED chips, blue LED chips, etc.), transistors (transistors that emit light in response to current), electron-emitting devices, Display element using carbon nanotube, liquid crystal element, electronic ink, electrowetting element, electrophoretic element, plasma display (PDP), display element using MEMS (micro electro mechanical system) (eg, grating light valve) (GLV), digital micro mirror device (DMD), DMS (digital micro shutter), MIRASOL (registered trademark), IMOD (interference modulation) element, shutter-type MEMS display element, optical interference-type MEMS display Devices, piezoceramic displays, etc.), carbon nanotubes, or quantum dots. An example of a display device using an EL element is an EL display. Examples of a display device using an electron-emitting device include a field emission display (FED) or a SED-type flat-panel display (SED: Surface-conduction Electron-emitter Display). A liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display) is an example of a display device using a liquid crystal element. An example of a display device using electronic ink, electronic powder fluid (registered trademark), or an electrophoretic element is electronic paper. An example of a display device using quantum dots for each pixel is a quantum dot display. Note that the quantum dots may be provided not in the display element but in a part of the backlight. By using quantum dots, display with high color purity can be performed. In the case of realizing a semi-transmissive liquid crystal display or a reflective liquid crystal display, part or all of the pixel electrodes may have a function as a reflective electrode. For example, part or all of the pixel electrode may include aluminum, silver, or the like. Further, in that case, a memory circuit such as SRAM can be provided below the reflective electrode. Thereby, the power consumption can be further reduced. When the LED chip is used, graphene or graphite may be arranged below the electrode of the LED chip or the nitride semiconductor. Graphene or graphite may be a multilayer film in which a plurality of layers are stacked. By providing graphene or graphite in this manner, a nitride semiconductor, for example, an n-type GaN semiconductor layer having a crystal or the like can be easily formed thereover. Further, a p-type GaN semiconductor layer having crystals or the like may be provided thereon to form an LED chip. Note that an AlN layer may be provided between the graphene or graphite and the n-type GaN semiconductor layer having crystals. The GaN semiconductor layer of the LED chip may be formed by MOCVD. However, by providing graphene, the GaN semiconductor layer of the LED chip can be formed by a sputtering method. In a display element using a MEMS (micro electro mechanical system), a space in which the display element is sealed (for example, an element substrate on which the display element is arranged and an element substrate opposed to the element substrate are arranged). A desiccant may be disposed between the counter substrate and the counter substrate. By disposing the desiccant, it is possible to prevent the MEMS and the like from becoming difficult to move due to moisture and/or from easily becoming deteriorated.

<<About connection>>
In this specification and the like, the phrase “A and B are connected” includes the ones in which A and B are directly connected, and the ones that are electrically connected. Here, “A and B are electrically connected” means that when an object having some electric action exists between A and B, transmission and reception of an electric signal between A and B is possible. And what to say.

Note that, for example, the source (or the first terminal or the like) of the transistor is electrically connected to X through (or not) Z1, and the drain of the transistor (or the second terminal or the like) is connected to Z2. Through (or without) electrically connected to Y, or the source of the transistor (or the first terminal, etc.) is directly connected to one part of Z1 and another part of Z1 Is directly connected to X, the drain (or the second terminal, etc.) of the transistor is directly connected to part of Z2, and another part of Z2 is directly connected to Y. Then, it can be expressed as follows.

For example, “X and Y, the source (or the first terminal or the like) of the transistor, and the drain (or the second terminal or the like) are electrically connected to each other, and X, the source (or the first terminal) of the transistor, or the like. Terminal, etc.), the drain of the transistor (or the second terminal, etc.), and Y are electrically connected in this order.” Alternatively, “the source of the transistor (or the first terminal or the like) is electrically connected to X, the drain of the transistor (or the second terminal or the like) is electrically connected to Y, and X, the source of the transistor (or the like). Alternatively, the first terminal or the like), the drain of the transistor (or the second terminal, or the like), and Y are electrically connected in this order”. Alternatively, “X is electrically connected to Y through a source (or a first terminal or the like) and a drain (or a second terminal or the like) of the transistor, and X or the source (or the first terminal) of the transistor is connected. Terminal, etc.), the drain of the transistor (or the second terminal, etc.), and Y are provided in this connection order”. The source (or the first terminal or the like) of the transistor and the drain (or the second terminal or the like) are separated from each other by defining the order of connection in the circuit structure by using the expression method similar to these examples. Apart from this, the technical scope can be determined.

Alternatively, as another expression method, for example, “the source of the transistor (or the first terminal or the like) is electrically connected to X via at least the first connection path, and the first connection path is The second connection path does not have a second connection path, and the second connection path is provided between the source (or the first terminal or the like) of the transistor and the drain (or the second terminal or the like) of the transistor through the transistor. The first connection path is a path via Z1, and the drain (or the second terminal or the like) of the transistor is electrically connected to Y via at least the third connection path. Connected, the third connection path does not have the second connection path, and the third connection path is a path via Z2.” Alternatively, "the source (or the first terminal or the like) of the transistor is electrically connected to X through at least the first connection path via Z1, and the first connection path is the second connection path. And the second connection path has a connection path through a transistor, and the drain (or the second terminal or the like) of the transistor has at least a third connection path through Z2. , Y, and the third connection path does not have the second connection path.” Or “the source of the transistor (or the first terminal or the like) is electrically connected to X via at least a first electrical path via Z1, and the first electrical path is a second electrical path; The second electrical path is an electrical path from a source (or a first terminal or the like) of the transistor to a drain (or a second terminal or the like) of the transistor, which has no electrical path; A drain (or a second terminal or the like) of the transistor is electrically connected to Y through at least a third electrical path via Z2, and the third electrical path is a fourth electrical path. And the fourth electrical path is an electrical path from the drain of the transistor (or the second terminal or the like) to the source of the transistor (or the first terminal or the like).” can do. By defining the connection path in the circuit configuration using the expression method similar to these examples, the source (or the first terminal or the like) and the drain (or the second terminal or the like) of the transistor can be distinguished from each other. , The technical scope can be determined.

Note that these expression methods are examples and are not limited to these expression methods. Here, X, Y, Z1, and Z2 are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

SL_n source line SL_1 source line SL_12 source line 100 semiconductor device 100A semiconductor device 100B semiconductor device 100C semiconductor device 100D semiconductor device 100E semiconductor device 110 shift register 120 data register 130 digital-analog conversion circuit 131_B reference voltage generation circuit 131_G reference voltage generation circuit 131_R reference Voltage generation circuit 132 Reference voltage generation circuit 132_1 Reference voltage generation circuit 132_2 Reference voltage generation circuit 132_3 Reference voltage generation circuit 133 Resistance 134 Wiring group 134_1 Wiring group 134_2 Wiring group 134_3 Wiring group 135 Switching circuit 136 Selector 136_1 Selector 136_2 Selector 137 Transistor 138 Transistor 139 interpolation circuit 140 buffer amplifier 142 buffer 160 section 170 display section 172 pixel 172A pixel 172B pixel 180 gate driver 190 touch panel 192 touch panel IC
200 source driver 203 pixel 221 transistor 222 transistor 223 EL element 231 transistor 232 capacitor element 233 liquid crystal element 500 substrate 501 channel formation region 502 low concentration impurity region 503 high concentration impurity region 504a gate insulating film 504b gate insulating film 505a gate electrode layer 505b gate Electrode layer 506a Source electrode layer 506b Drain electrode layer 506c Source electrode layer 506d Drain electrode layer 507 Intermetallic compound region 508a Side wall insulating film 508b Side wall insulating film 509 Element isolation insulating film 510 Transistor 511 Channel forming region 512 Low concentration impurity region 513 High concentration impurity region 517 Intermetallic compound region 520 Transistor 521 Interlayer insulating film 522 Interlayer insulating film 523 Wiring 711 Display unit 712 Source driver 712A Gate driver 712B Gate driver 713 Substrate 714 Source driver IC
715 FPC
716 External circuit board 901 Housing 902 Housing 903a Display 903b Display 904 Selection button 905 Keyboard 910 E-book terminal 911 Housing 912 Housing 913 Display 914 Display 915 Shaft 916 Power supply 917 Operation keys 918 Speaker 920 Television Device 921 Housing 922 Display unit 923 Stand 924 Remote controller 930 Main body 931 Display unit 932 Speaker 933 Microphone 934 Operation button 941 Main body 942 Display unit 943 Operation switch 1000 Semiconductor device 8000 Display module 8001 Upper cover 8002 Lower cover 8003 FPC
8004 Touch panel 8005 FPC
8006 Display panel 8009 Frame 8010 Printed circuit board 8011 Battery

Claims (1)

A display section having display elements of red, green, and blue ;
A digital-analog conversion circuit for driving the display unit,
The digital-analog conversion circuit,
A first reference voltage generation circuit for generating a plurality of first voltages according to input digital data;
A first wiring group for supplying the plurality of first voltages;
Selecting one of said plurality of first voltage supplied from the first line group, a first selector for outputting a first analog signal,
A second reference voltage generation circuit that generates a plurality of second voltages in accordance with input digital data;
A second wiring group for supplying the plurality of second voltages;
Select one of the plurality of second voltage supplied from the second wiring group includes a second selector for outputting a second analog signal, and
A third reference voltage generation circuit that generates a plurality of third voltages according to input digital data;
A third wiring group that supplies the plurality of third voltages;
A third selector that selects one of the plurality of third voltages supplied from the third wiring group and outputs a third analog signal,
The first analog signal output from the first selector is electrically connected to a pixel having a red display element among a plurality of source lines included in the display section via a buffer amplifier . Output to source line 1
The second analog signal output from the second selector is electrically connected to the second source of the plurality of source lines to the pixel having the green display element via the buffer amplifier. Output to a line ,
The third analog signal output from the third selector is electrically connected to the third source line of the plurality of source lines to the pixel having the blue display element via the buffer amplifier. Output to a line,
The first wiring group, the second wiring group, and the third wiring group extend in a direction intersecting a direction in which the plurality of source lines extend,
A semiconductor device in which the first wiring group, the second wiring group, and the third wiring group are provided without overlapping along a direction in which the plurality of source lines extend, respectively.

Images