JP2017090873A - Semiconductor device, display panel, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device of a novel structure, and reduce an area occupied by wires when selectively outputting voltages of a plurality of reference voltage generation circuits with a selector, to achieve reduction in circuit area.SOLUTION: In a structure that functions as a source driver IC, having a plurality of reference voltage generation circuits, wires for transmitting a plurality of voltages generated at different reference voltage generation circuits are provided without overlapping along the longitudinal direction of the source driver IC. The structure makes it possible to reduce an area occupied by wires.SELECTED DRAWING: Figure 1

Description

One embodiment of the present invention relates to a semiconductor device, a display panel, and an electronic device.

Note that one embodiment of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter). Therefore, as a technical field of one embodiment of the present invention disclosed more specifically in this specification, a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, a driving method thereof, or a manufacturing method thereof, Can be cited as an example.

Note that in this specification and the like, a semiconductor device refers to an element, a circuit, a device, or the like that can function by utilizing semiconductor characteristics. As an example, a semiconductor device such as a transistor or a diode is a semiconductor device. As another example, the circuit including a semiconductor element is a semiconductor device. As another example, a device including a circuit including a semiconductor element is a semiconductor device.

The display device is provided with a source driver IC (Integrated Circuit) including a reference voltage generation circuit that generates a gradation voltage for expressing a luminance level corresponding to an input video signal. Patent Document 1 discloses a source driver IC including a plurality of reference voltage generation circuits.

US Patent Application Publication No. 2014/0085349

The plurality of voltages generated by the reference voltage generation circuit are output as gradation voltages according to the video signal by the selector. However, the provision of the plurality of reference voltage generation circuits increases the area occupied by the wiring for transmitting the plurality of voltages. Therefore, there arises a problem that the circuit area of the source driver IC increases. In particular, when a plurality of wirings extending from different reference voltage generation circuits are provided so as to overlap in the major axis direction of the source driver IC, an increase in circuit area due to an increase in the number of wirings becomes remarkable.

An object of one embodiment of the present invention is to provide a novel semiconductor device, an electronic component, a novel electronic device, or the like having a structure different from that of a semiconductor device that functions as an existing source driver IC. Another object of one embodiment of the present invention is to provide a semiconductor device or the like having a novel structure in which a circuit area is reduced in a semiconductor device including a plurality of reference voltage generation circuits.

Note that the problems of one embodiment of the present invention are not limited to the problems listed above. The problems listed above do not disturb the existence of other problems. Other issues are issues not mentioned in this section, which are described in the following description. Problems not mentioned in this item can be derived from descriptions of the specification or drawings by those skilled in the art, and can be appropriately extracted from these descriptions. Note that one embodiment of the present invention solves at least one of the above-described description and / or other problems.

One embodiment of the present invention includes a first reference voltage generation circuit, a second reference voltage generation circuit, a first selector, a second selector, a first wiring, and a second wiring. The first reference voltage generation circuit has a function of generating a first plurality of voltages, and the second reference voltage generation circuit generates a second plurality of voltages. The first wiring has a function capable of transmitting any one of the first plurality of voltages generated by the first reference voltage generation circuit, and the second wiring The second reference voltage generation circuit has a function of transmitting any one of the second plurality of voltages generated by the second reference voltage generation circuit, and the first selector selects any one of the first plurality of voltages. The second selector selects one of the second plurality of voltages. It has a function capable of force, the first wiring and the second wiring, a semiconductor device provided without overlapping along the longitudinal direction of the semiconductor device.

One embodiment of the present invention includes a first reference voltage generation circuit, a second reference voltage generation circuit, a third reference voltage generation circuit, a first selector, a second selector, and a third selector. A first wiring, a second wiring, and a third wiring, wherein the first reference voltage generation circuit is capable of generating a first plurality of voltages. The second reference voltage generation circuit has a function capable of generating the second plurality of voltages, and the third reference voltage generation circuit can generate the third plurality of voltages. The first wiring has a function capable of transmitting any one of the first plurality of voltages generated by the first reference voltage generation circuit, and the second wiring includes the second wiring A function of transmitting any one of the second plurality of voltages generated by the reference voltage generation circuit of The line has a function of transmitting any one of the third plurality of voltages generated by the third reference voltage generation circuit, and the first selector outputs any one of the first plurality of voltages. The second selector has a function capable of selecting and outputting any one of the second plurality of voltages, and the third selector has a third function. The first wiring, the second wiring, and the third wiring have a function of selecting and outputting any one of a plurality of voltages, and do not overlap along the major axis direction of the semiconductor device. A semiconductor device is provided.

In one embodiment of the present invention, the first reference voltage generation circuit is a circuit that generates a gradation voltage to be supplied to a pixel having a display element that exhibits red, and the second reference voltage generation circuit is a display that exhibits green. Preferably, the semiconductor device is a circuit that generates a gradation voltage to be supplied to a pixel having an element, and the third reference voltage generation circuit is a circuit that generates a gradation voltage to be supplied to a pixel having a blue display element. .

Note that other aspects of the present invention are described in the following embodiments and drawings.

One embodiment of the present invention can provide a novel semiconductor device, a novel electronic device, or the like. Alternatively, according to one embodiment of the present invention, a semiconductor device or the like having a novel structure with reduced circuit area can be provided.

Note that the effects of one embodiment of the present invention are not limited to the effects listed above. The effects listed above do not preclude the existence of other effects. The other effects are effects not mentioned in this item described in the following description. Effects not mentioned in this item can be derived from the description of the specification or drawings by those skilled in the art, and can be appropriately extracted from these descriptions. Note that one embodiment of the present invention has at least one of the above effects and / or other effects. Accordingly, one embodiment of the present invention may not have the above-described effects depending on circumstances.

FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a circuit diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a block diagram. FIG. 6 illustrates an example of a circuit diagram. The figure explaining an example of a cross-sectional schematic diagram. FIG. 10 illustrates an example of a display panel. FIG. 6 illustrates an example of a display module. 10A and 10B each illustrate an example of an electronic device.

Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different modes, and it is easily understood by those skilled in the art that the modes and details can be variously changed without departing from the spirit and scope thereof. . Therefore, the present invention should not be construed as being limited to the description of the following embodiments.

In the present specification and the like, the ordinal numbers “first”, “second”, and “third” are given to avoid confusion between components. Therefore, the number of components is not limited. The order of the components is not limited. For example, a component referred to as “first” in one embodiment of the present specification is assumed to be a component referred to as “second” in another embodiment or in the claims. There is also a possibility. For example, a component referred to as “first” in one embodiment of the present specification and the like may be omitted in another embodiment or in the claims.

Note that in the drawings, the same element, an element having a similar function, an element of the same material, an element formed at the same time, or the like may be denoted by the same reference numeral, and repeated description thereof may be omitted.

(Embodiment 1)
In this embodiment, an example of a semiconductor device having a function as a source driver IC will be described.

FIG. 1 is an example of a block diagram schematically illustrating a configuration of a semiconductor device.

1 includes a shift register 110 (shown as SR in the figure), a data register 120 (shown as DATA REGISTER in the figure), a digital analog (Digital / Analog) conversion circuit 130 (shown as DAC in the figure). And a buffer amplifier 140 (shown as BUFFER AMP. In the figure). In FIG. 1, source lines SL_1 to SL_n (n is a natural number of 2 or more) from which signals are output from the semiconductor device 100 are illustrated.

The digital-analog conversion circuit 130 includes a plurality of reference voltage generation circuits 132_1 and 132_2 (shown as VGEN in the drawing), wiring groups 134_1 and 134_2, and a selector 136.

For example, a source clock and a source start pulse are input to the shift register 110. The shift register 110 generates a sampling pulse and outputs it to the data register 120.

The data register 120 receives, for example, digital signal data DATA. The data register 120 samples and holds data DATA by the sampling pulse of the shift register 110.

For example, digital signal data DATA (also referred to as digital data) held in the data register 120 is input to the digital-analog conversion circuit 130. The digital-analog conversion circuit 130 generates a plurality of voltages according to digital data. A wiring group having a plurality of wirings is arranged along the direction in which the source lines SL_1 to SL_n are arranged, that is, along the long axis direction of the semiconductor device 100. The selector selects any one of a plurality of voltages supplied to the wiring group according to the digital data, and outputs the selected data as analog signal data DATA (also referred to as analog data). A voltage based on analog data corresponds to a gradation voltage.

Note that the direction in which the source line SL_1 to SL_n are arranged is a direction parallel to the arrow _{D SL} in FIG. The major axis direction of the semiconductor device 100 is the direction in which the source lines SL_1 to SL_n are arranged in ascending or descending order, that is, the x direction in FIG. 1, and the minor axis direction of the semiconductor device 100 is the source line SL_1 to SL_n extending. The direction in which it is provided, that is, the y direction in FIG. Note that the semiconductor device 100 is disposed so that the major axis direction of the semiconductor device 100 is parallel to the side of the substrate on which the display portion is formed. Therefore, it can be said that the wiring group having a plurality of wirings in the digital-analog converter circuit 130 is provided without overlapping along the side of the substrate on which the display portion is formed.

The buffer amplifier 140 amplifies the analog data output from the digital / analog conversion circuit 130. The buffer amplifier 140 outputs the amplified analog data to the source lines SL [1] to [n].

The reference voltage generation circuit 132_1 generates a plurality of voltages. The wiring group 134_1 includes a plurality of wirings. The plurality of voltages generated by the reference voltage generation circuit 132_1 is supplied to the plurality of wirings of the wiring group 134_1 arranged along the long axis direction of the semiconductor device 100. The reference voltage generation circuit 132_2 generates a plurality of voltages different from the plurality of voltages generated by the reference voltage generation circuit 132_1. The wiring group 134_2 includes a plurality of wirings. The wiring group 134_2 is provided along the long axis direction of the semiconductor device 100 so as not to overlap with the wiring group 134_1. The plurality of voltages generated by the reference voltage generation circuit 132_2 is supplied to the plurality of wirings in the wiring group 134_2. The selector 136 can be provided on the wiring group as shown in FIG. The selector 136 can convert digital data into analog data based on a plurality of voltages generated by the reference voltage generation circuits 132_1 and 132_2 using a tournament method, a decoder method, or the like.

The reference voltage generation circuits 132_1 and 132_2 are effective in the case of a configuration in which different voltages are supplied. For example, if the pixels in the display unit have red, green, and blue display elements, and each display element expresses a gradation with different voltages, the reference voltage generation corresponding to each color of red, green, and blue A circuit generates a plurality of voltages. By converting the digital data of each color into analog data based on different voltages, it is possible to perform gradation display of brightness by a voltage corresponding to the characteristics of the display element of each color.

The plurality of voltages generated by the plurality of reference voltage generation circuits are voltages for expressing brightness gradations corresponding to the number of bits of digital data. In the case where a plurality of reference voltage generation circuits are provided as shown in FIG. 1, the number of voltages increases exponentially as the number of bits of digital data increases. For example, when converting 12-bit digital data into analog data, a voltage of 4096 values and 4096 wires are required.

When the wiring groups 134_1 and 134_2 are provided so as to overlap along the long axis direction of the semiconductor device 100, that is, when provided as in the semiconductor device 100A illustrated in FIG. Since the wirings of the wiring groups 134_1 and 134_2 having the same length are provided, the area for arranging the wiring groups 134_1 and 134_2 increases.

On the other hand, in the structure of one embodiment of the present invention, the wiring group 134_1 and the wiring group 134_2 are provided so as not to overlap with each other along the long axis direction of the semiconductor device 100. With such a configuration, it is not necessary to provide the wirings of the wiring groups 134_1 and 134_2 so as to have substantially the same length as the major axis of the semiconductor device 100. Therefore, the area for arranging the wiring groups 134_1 and 134_2 can be reduced. In other words, the length of the wiring that transmits the voltage generated by the reference voltage generation circuit can be shortened. Therefore, it is possible to make it less susceptible to the influence of resistance and / or parasitic capacitance in the wiring that draws the voltage generated by the reference voltage generation circuit.

In FIG. 1, the reference voltage generation circuits 132_1 and 132_2 are provided near the center of the major axis of the semiconductor device 100 and at the end thereof, respectively, and the wiring groups 134_1 and 134_2 are arranged in one direction of the reference voltage generation circuits 132_1 and 132_2. Although it is configured to extend, other configurations may be used. For example, the configuration of the semiconductor device 100B illustrated in FIG. 3 may be employed.

In the semiconductor device 100B illustrated in FIG. 3, the reference voltage generation circuits 132_1 and 132_2 are provided at both ends of the long axis of the semiconductor device 100B, and the wiring groups 134_1 and 134_2 extend near the center of the long axis of the semiconductor device 100B. It is set as the structure provided. With this structure, the selector 136 provided over the wiring groups 134_1 and 134_2 can be efficiently arranged.

As another configuration, for example, the configuration of the semiconductor device 100C illustrated in FIG. 4 may be used.

In the semiconductor device 100C illustrated in FIG. 4, the reference voltage generation circuits 132_1 and 132_2 are provided near both ends of the long axis of the semiconductor device 100C and closer to the center, and the wiring groups 134_1 and 134_2 are on both sides of the long axis of the semiconductor device 100C. It is set as the structure extended in this. With this structure, influence of wiring resistance or the like on voltages supplied from the reference voltage generation circuits 132_1 and 132_2 to the wiring groups 134_1 and 134_2 can be reduced.

Although FIG. 1 shows a configuration in which two reference voltage generation circuits are provided, three reference voltage generation circuits may be provided. For example, the configuration of the semiconductor device 100D illustrated in FIG. 5 may be employed.

In the semiconductor device 100D illustrated in FIG. 5, the digital-analog conversion circuit 130 includes reference voltage generation circuits 132_1, 132_2, and 132_3. A plurality of voltages generated by the reference voltage generation circuits 132_1, 132_2, and 132_3 are supplied to the wiring groups 134_1, 134_2, and 134_3, and are output as analog data based on the digital data by the selector 136. Even in the configuration in which three reference voltage generation circuits are provided, the wiring group 134_1 and the wiring group 134_2 are provided so as not to overlap with each other in the major axis direction of the semiconductor device 100, so that the area for arranging the wiring groups 134_1 and 134_2 is reduced. Reduction can be achieved.

The reference voltage generation circuits 132_1, 132_2, and 132_3 are effective in a configuration that supplies three or more separate voltages. For example, if the pixels in the display unit have red, green, and blue display elements, and each display element expresses a gradation with different voltages, the reference voltage generation corresponding to each color of red, green, and blue By generating a plurality of voltages in the circuits 132_1, 132_2, and 132_3 and converting them into analog data in accordance with digital data, it is possible to perform gradation display of brightness using voltages according to the characteristics of the display elements of the respective colors.

As a configuration different from FIG. 5, for example, the configuration of the semiconductor device 100E illustrated in FIG. 6 may be used.

In the semiconductor device 100E illustrated in FIG. 6, the reference voltage generation circuits 132_1 and 132_3 are provided at both ends of the major axis of the semiconductor device 100E, and the reference voltage generation circuit 132_2 is provided near the center of the major axis of the semiconductor device 100E. The wiring groups 134_1 and 134_3 are provided to extend near the center of the long axis of the semiconductor device 100E, and the wiring group 134_2 is provided to extend to both ends of the long axis of the semiconductor device 100E. With this structure, the influence of the wiring resistance and the like on the voltage supplied from the reference voltage generation circuit 132_2 to the wiring group 134_2 can be reduced, and the selector 136 provided over the wiring groups 134_1 and 134_3 can be efficiently arranged. it can.

FIG. 7 is a circuit diagram illustrating a configuration example of a reference voltage generation circuit, a selector, and a wiring group included in the analog-digital conversion circuit. In FIG. 7, the reference voltage generation circuit 132 has a plurality of resistors 133. In FIG. 7, a wiring group 134 extends from the reference voltage generation circuit 132. In the example, two selectors 136_1 and 136_2 are connected to the wiring group 134. The selectors 136_1 and 136_2 are formed by a p-channel transistor 137 and an n-channel transistor 138. The selectors 136_1 and 136_2 each select a voltage supplied to any one of the wiring groups 134 and output as analog data V _{O_1} and V _{O_2} .

Note that the arrangement of the transistors included in the selectors 136_1 and 136_2 has been described using the tournament method as an example, but other methods such as a decoder method may be used.

Although FIG. 1 shows a configuration in which analog data corresponding to the number of bits of digital data is selected and output by the selector 136, other configurations may be used. For example, FIG. 8 illustrates a configuration in which the selector 136 selects a voltage corresponding to the upper bits of the digital data and includes an interpolation circuit 139 that generates a voltage or current corresponding to the lower bits of the digital data. The interpolation circuit 139 may be configured to generate desired analog data using an operational amplifier or a voltage-current conversion circuit.

A configuration example in which the semiconductor device that supplies analog data described in FIG. 6 is applied to a display portion that performs color display will be described with reference to FIGS.

In the case where three or more reference voltage generation circuits are provided like the reference voltage generation circuits 132_1, 132_2, and 132_3 described with reference to FIGS. For example, when the pixel in the display portion includes display elements of red, green, and blue, and each display element expresses a gradation with different voltages, the reference voltage generation circuits 132_1, 132_2, and 132_3 are set to red, green, respectively. Or a voltage corresponding to each color of blue. With this configuration, it is possible to perform gradation display with brightness according to the characteristics of the display elements of the respective colors.

In FIG. 9, in addition to the digital-analog conversion circuit 130 and the buffer amplifier 140, a display unit 170 that performs color display is illustrated. In FIG. 9, for simplicity of description, 12 columns of source lines SL_1 to SL_12 are illustrated as an example. A pixel 172 is connected to the source lines SL_1 to SL_12 of each column in the display portion 170. The pixel 172 is a pixel having a display element that exhibits any one of three colors of red, green, and blue for performing color display. For the sake of explanation, in FIG. 9, the pixels 172 having a display element exhibiting red are R1 to R4, the pixels 172 having a display element exhibiting green are G1 to G4, and the pixels 172 having a display element exhibiting blue are B1 to B4. It is shown. In FIG. 9, a reference voltage generation circuit 131_R that generates a voltage to be supplied to the pixels (R1 to R4) is illustrated as VGEN_R. A reference voltage generation circuit 131_G that generates a voltage to be supplied to the pixels (G1 to G4) is illustrated as VGEN_G. A reference voltage generation circuit 131_B that generates a voltage to be supplied to the pixels (B1 to B4) is illustrated as VGEN_B. In FIG. 9, the buffer 142 included in the buffer amplifier 140 is illustrated in each column.

In FIG. 9, digital data corresponding to red is illustrated as DATA_R1 to DATA_R4. In FIG. 9, digital data corresponding to green is shown as DATA_G1 to DATA_G4. In FIG. 9, digital data corresponding to blue is shown as DATA_B1 to DATA_B4. DATA_R1 to DATA_R4, DATA_G1 to DATA_G4, and DATA_B1 to DATA_B4 are sequentially input along the long axis direction of the semiconductor device. This is because digital data is input together in the order of the reference voltage generation circuits 132_1, 132_2, and 132_3 corresponding to each color.

9 illustrates the analog data corresponding to red as _{V R1} to _{V R4.} In FIG. 9, analog data corresponding to green is illustrated as V _{G1 to} V _G4 . In FIG. 9, analog data corresponding to blue is illustrated as V _{B1 to} V _B4 . V _{R1 to} V _R4 , V _{G1 to} V _G4 , and V _{B1 to} V _B4 output from the digital-analog conversion circuit 130 are sequentially input along the major axis direction of the semiconductor device. This is because digital data is input together in the order of the reference voltage generation circuits 132_1, 132_2, and 132_3 corresponding to each color.

In FIG. 9, a connection switching unit 160 is provided at the subsequent stage of the buffer amplifier 140. V _{R1 to} V _R4 , V _{G1 to} V _G4 , and V _{B1 to} V _B4 output from the digital-analog conversion circuit 130 correspond to the colors exhibited by the pixels connected to the source lines SL_1 to SL_12 of each column. In order to rearrange them, a connection switching unit 160 is provided. The analog data given to the source lines SL_1 to SL_12 by the connection switching unit 160 is V _R1 , V _G1 , V _B1 , V _R2 , V _G2 , V _B2 , V _R3 , V _G3 , V _B3 , V _R4 , V _G4. , V _B4 can be rearranged in this order. In other words, by including the connection switching unit 160, analog data generated by different reference voltage generation circuits can be supplied to pixels in which display elements exhibiting each color are arranged in a certain order for performing color display. It is possible to display the display unit with voltages generated differently for each.

In FIG. 9, the connection switching unit 160 is provided between the buffer amplifier 140 and the source lines SL_1 to SL_12 of each column, but other configurations may be used. For example, as illustrated in FIG. 10, a connection switching unit 160 may be provided between the digital-analog conversion circuit 130 and the buffer amplifier 140.

9 and 10, when inversion driving is performed, two selectors 136 corresponding to the digital data DATA_R1 are provided as shown in FIG. 11, and separate analog data is generated. Separate analog data can be output to the subsequent stage of the buffer amplifier 140 or the like as analog data V _R1 by switching and outputting the switching circuit 135.

As described above, in the configuration of this embodiment, when voltages generated by a plurality of reference voltage generation circuits are supplied to each column of source lines, wiring extending from different reference voltage generation circuits is arranged in the long axis direction of the semiconductor device. It is set as the structure provided so that it may not overlap along. With this structure, the area occupied by wirings for supplying a plurality of voltages output from different reference voltage generation circuits can be reduced, so that a semiconductor device with a reduced circuit area can be obtained.

(Embodiment 2)
In this embodiment, a circuit block diagram of a display device including the semiconductor device functioning as a source driver IC described in the above embodiment will be described.

The circuit block diagram of the display device illustrated in FIG. 12 includes a source driver 200, a gate driver 180, and a display portion 170. In FIG. 12, the pixel 172 is shown in the display portion 170.

As the source driver 200, the source driver IC that is the semiconductor device 100 described in Embodiment 1 can be used. A source driver 200 illustrated in FIG. 12 includes a shift register 110, a data register 120, a digital / analog conversion circuit 130, and a buffer amplifier 140, as in the semiconductor device 100 of FIG. Therefore, the source driver IC can reduce the circuit area occupied by the wiring.

Similar to the semiconductor device 100 described in Embodiment 1, the source driver 200 has a function of outputting an analog signal to the source lines SL [1] to [n] (n is a natural number of 2 or more).

As an example, the gate driver 180 includes a shift register, a buffer amplifier, and the like. The gate driver 180 receives a gate start pulse, a gate clock, and the like and outputs a pulse signal. A circuit included in the gate driver 180 may be formed as an IC similarly to the source driver 200, or the same transistor as the transistor included in the pixel 172 of the display portion 170 may be used.

The gate driver 180 outputs a scanning signal to the gate lines GL [1] to GL [m] (m is a natural number of 2 or more). Note that a plurality of gate drivers 180 may be provided, and the gate lines GL [1] to GL [m] may be divided and controlled by the plurality of gate drivers 180. For example, the gate driver 180 may be disposed on the left and right of the display unit 170, and the gate lines GL [1] to GL [m] may be divided and controlled for each row.

The display portion 170 is provided so that the gate lines GL [1] to GL [m] and the source lines SL [1] to SL [n] are substantially orthogonal to each other. A pixel 203 is provided at an intersection of the gate line and the source line. Note that the pixel 172 in the display unit 170 is provided with pixels corresponding to each color of RGB (red, green, and blue) in order for color display. Note that the RGB pixel array can be used as appropriate, such as a stripe array, a mosaic array, or a delta array. Not only RGB but also a color display such as white or yellow may be added.

Note that in the case where the function of the touch sensor is added to the display unit 170, the touch sensor 190 may be added as illustrated in FIG. Note that the touch sensor 190 can be combined with the display portion 170 to form an in-cell touch panel. Note that a signal obtained by the touch sensor 190 can be processed by a touch driver IC 192 formed integrally with the source driver 200.

An example of a structure of the pixel 172 is described with reference to FIGS. 14A and 14B.

A pixel 172A in FIG. 14A is an example of a pixel included in the liquid crystal display device, and includes a transistor 231, a capacitor 232, and a liquid crystal element 233.

The transistor 231 functions as a switching element that controls connection between the liquid crystal element 233 and the source line SL. The conduction state of the transistor 231 is controlled by a scanning signal input from its gate through the gate line GL.

As an example, the capacitor 232 is an element formed by stacking conductive layers.

As an example, the liquid crystal element 233 is an element including a common electrode, a pixel electrode, and a liquid crystal layer. The orientation of the liquid crystal material of the liquid crystal layer is changed by the action of an electric field formed between the common electrode and the pixel electrode.

A pixel 172B in FIG. 14B is an example of a pixel included in the EL display device, and includes a transistor 221, a transistor 222, and an EL element 223. Note that FIG. 14B illustrates the power supply line VL in addition to the gate line GL and the source line SL. The power supply line VL is a wiring for supplying current to the EL element 223.

The transistor 221 functions as a switching element that controls connection between the gate of the transistor 222 and the source line SL. The transistor 221 is controlled to be turned on / off by a scanning signal input from the gate through the gate line GL.

The transistor 222 has a function of controlling a current flowing between the power supply line VL and the EL element 223 in accordance with a voltage applied to the gate.

As an example, the EL element 223 is an element including a light-emitting layer sandwiched between electrodes. The EL element 223 can control luminance in accordance with the amount of current flowing through the light emitting layer.

The circuit block diagram of the display device described above includes the semiconductor device 1000 described in the above embodiment. Therefore, the circuit area can be reduced.

(Embodiment 3)
In this embodiment, an example of a cross-sectional structure of a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS.

The semiconductor device described in the above embodiment includes the shift register 110, the data register 120, the digital-analog converter circuit 130, the buffer amplifier 140, and the like, and can be formed using a transistor using silicon or the like. Note that as the silicon, polycrystalline silicon, microcrystalline silicon, or amorphous silicon can be used. Note that an oxide semiconductor or the like can be used instead of silicon.

FIG. 15 is a schematic cross-sectional view of a semiconductor device according to one embodiment of the present invention. The cross-sectional schematic diagram shown in FIG. 15 includes an n-channel transistor and a p-channel transistor using a semiconductor material (eg, silicon).

An n-channel transistor 510 includes a channel formation region 501 provided in a substrate 500 containing a semiconductor material, a low-concentration impurity region 502 and a high-concentration impurity region 503 provided so as to sandwich the channel formation region 501 (a combination thereof) And an intermetallic compound region 507 provided in contact with the impurity region, a gate insulating film 504a provided over the channel formation region 501, and a gate provided over the gate insulating film 504a. The electrode layer 505a includes a source electrode layer 506a and a drain electrode layer 506b provided in contact with the intermetallic compound region 507. A sidewall insulating film 508a is provided on a side surface of the gate electrode layer 505a. An interlayer insulating film 521 and an interlayer insulating film 522 are provided so as to cover the transistor 510. Through the openings formed in the interlayer insulating film 521 and the interlayer insulating film 522, the source electrode layer 506a and the drain electrode layer 506b are connected to the intermetallic compound region 507.

A p-channel transistor 520 includes a channel formation region 511 provided in a substrate 500 containing a semiconductor material, a low-concentration impurity region 512 and a high-concentration impurity region 513 provided so as to sandwich the channel formation region 511 (a combination thereof) And an intermetallic compound region 517 provided in contact with the impurity region, a gate insulating film 504b provided over the channel formation region 511, and a gate provided over the gate insulating film 504b. The electrode layer 505b includes a source electrode layer 506c and a drain electrode layer 506d provided in contact with the intermetallic compound region 517. A sidewall insulating film 508b is provided on a side surface of the gate electrode layer 505b. An interlayer insulating film 521 and an interlayer insulating film 522 are provided so as to cover the transistor 520. Through the openings formed in the interlayer insulating film 521 and the interlayer insulating film 522, the source electrode layer 506c and the drain electrode layer 506d are connected to the intermetallic compound region 517.

An element isolation insulating film 509 is provided over the substrate 500 so as to surround each of the transistor 510 and the transistor 520.

Note that FIG. 15 illustrates the case where the transistor 510 and the transistor 520 are transistors in which a channel is formed in a semiconductor substrate; however, the transistor 510 and the transistor 520 include an amorphous semiconductor film formed over an insulating surface, A transistor in which a channel is formed in the crystalline semiconductor film may be used. A transistor in which a channel is formed in a single crystal semiconductor film may be used like an SOI substrate.

By using a single crystal semiconductor substrate as the semiconductor substrate, the transistor 510 and the transistor 520 can be operated at high speed. Therefore, the transistor included in each circuit described in the above embodiment is preferably formed over a single crystal semiconductor substrate.

The transistor 510 and the transistor 520 are connected to each other by a wiring 523. Note that an interlayer insulating film and an electrode layer may be provided over the wiring 523 and a transistor may be stacked.

(Embodiment 4)
In this embodiment, as application examples using the semiconductor device described in the above embodiment, an example applied to a display panel, an example where the display panel is applied to a display module, an application example of the display module, and an electronic device Application examples to the device will be described with reference to FIGS.

<Example of mounting on display panel>
An example in which a semiconductor device functioning as a source driver IC is applied to a display panel will be described with reference to FIGS.

In the case of FIG. 16A, a source driver 712 and gate drivers 712A and 712B are provided around a display portion 711 included in the display panel, and a source driver IC 714 including a semiconductor device over a substrate 713 is provided as the source driver 712. An example to be implemented is shown.

The source driver IC 714 is mounted on the substrate 713 using an anisotropic conductive adhesive and an anisotropic conductive film.

The source driver IC 714 is connected to the external circuit board 716 via the FPC 715.

16B illustrates an example in which a source driver 712 and gate drivers 712A and 712B are provided around the display portion 711, and the source driver IC 714 is mounted on the FPC 715 as the source driver 712.

By mounting the source driver IC 714 on the FPC 715, the display portion 711 can be provided large on the substrate 713, and a narrow frame can be achieved.

<Application examples of display modules>
Next, an application example of the display module using the display panel of FIGS. 16A and 16B will be described with reference to FIGS.

A display module 8000 illustrated in FIG. 17 includes a touch panel 8004 connected to the FPC 8003, a display panel 8006 connected to the FPC 8005, a frame 8009, a printed board 8010, and a battery 8011 between an upper cover 8001 and a lower cover 8002. Note that the battery 8011, the touch panel 8004, and the like may not be provided.

The display panel described in FIGS. 16A and 16B can be used for the display panel 8006 in FIG.

The shapes and / or dimensions of the upper cover 8001 and the lower cover 8002 can be changed as appropriate in accordance with the sizes of the touch panel 8004 and the display panel 8006.

As the touch panel 8004, a resistive touch panel or a capacitive touch panel can be used by being superimposed on the display panel 8006. The counter substrate (sealing substrate) of the display panel 8006 can have a touch panel function. Alternatively, an optical sensor can be provided in each pixel of the display panel 8006 to provide an optical touch panel. Alternatively, a touch sensor electrode may be provided in each pixel of the display panel 8006 to form a capacitive touch panel. In this case, the touch panel 8004 can be omitted.

The frame 8009 has a function as an electromagnetic shield for blocking electromagnetic waves generated by the operation of the printed board 8010 in addition to a protective function of the display panel 8006. The frame 8009 may have a function as a heat sink.

The printed board 8010 includes a power supply circuit, a signal processing circuit for outputting a video signal and a clock signal. As a power supply for supplying power to the power supply circuit, an external commercial power supply may be used, or a power supply using a battery 8011 provided separately may be used. The battery 8011 can be omitted when a commercial power source is used.

The display module 8000 may be additionally provided with a member such as a polarizing plate, a retardation plate, or a prism sheet.

<Application examples to electronic devices>
Next, electronic devices such as computers, portable information terminals (including mobile phones, portable game machines, sound playback devices, etc.), electronic paper, television devices (also referred to as televisions or television receivers), digital video cameras, etc. A case where the display panel is a display panel to which the above-described display module is applied will be described.

FIG. 18A illustrates a portable information terminal, which includes a housing 901, a housing 902, a first display portion 903a, a second display portion 903b, and the like. At least part of the housing 901 and the housing 902 is provided with a display module including the semiconductor device described in the above embodiment. Therefore, a portable information terminal whose circuit area is reduced is realized.

Note that the first display portion 903a is a panel having a touch input function. For example, as illustrated in the left diagram of FIG. 18A, a “touch input” is displayed by a selection button 904 displayed on the first display portion 903a. "Or" keyboard input "can be selected. Since the selection buttons can be displayed in various sizes, a wide range of people can feel ease of use. Here, for example, when “keyboard input” is selected, the keyboard 905 is displayed on the first display portion 903a as shown in the right diagram of FIG. As a result, as in the conventional information terminal, quick character input by key input and the like are possible.

In the portable information terminal illustrated in FIG. 18A, one of the first display portion 903a and the second display portion 903b can be detached as illustrated on the right in FIG. The second display portion 903b is also a panel having a touch input function, and can be further reduced in weight when carried, and can be operated with the other hand while holding the housing 902 with one hand. is there.

FIG. 18A illustrates a function for displaying various types of information (still images, moving images, text images, etc.), a function for displaying a calendar, date, time, or the like on the display unit, and operating or editing information displayed on the display unit. A function, a function of controlling processing by various software (programs), and the like can be provided. An external connection terminal (such as an earphone terminal or a USB terminal), a recording medium insertion portion, or the like may be provided on the back surface or side surface of the housing.

The portable information terminal illustrated in FIG. 18A may be configured to transmit and receive information wirelessly. It is also possible to adopt a configuration in which desired book data or the like is purchased and downloaded from an electronic book server wirelessly.

Further, the housing 902 illustrated in FIG. 18A may have an antenna, a microphone function, and / or a wireless function, and may be used as a mobile phone.

FIG. 18B illustrates an electronic book terminal 910 mounted with electronic paper, which includes two housings, a housing 911 and a housing 912. A display portion 913 and a display portion 914 are provided in the housing 911 and the housing 912, respectively. The housing 911 and the housing 912 are connected by a shaft portion 915 and can be opened and closed with the shaft portion 915 as an axis. The housing 911 includes a power source 916, operation keys 917, a speaker 918, and the like. At least one of the housing 911 and the housing 912 is provided with a display module including the semiconductor device described in the above embodiment. Therefore, an electronic book terminal whose circuit area is reduced is realized.

FIG. 18C illustrates a television device, which includes a housing 921, a display portion 922, a stand 923, and the like. The television device 920 can be operated with a switch and / or a remote controller 924 provided in the housing 921. A display module including the semiconductor device described in any of the above embodiments is mounted on the housing 921 and the remote controller 924. Therefore, a television device with a reduced circuit area is realized.

FIG. 18D illustrates a smartphone. A main body 930 is provided with a display portion 931, a speaker 932, a microphone 933, operation buttons 934, and the like. In the main body 930, a display module including the semiconductor device described in the above embodiment is provided. Therefore, a smartphone with a reduced circuit area is realized.

FIG. 18E illustrates a digital camera, which includes a main body 941, a display portion 942, operation switches 943, and the like. In the main body 941, a display module including the semiconductor device described in the above embodiment is provided. Therefore, a digital camera with a reduced circuit area is realized.

As described above, a display module including the semiconductor device described in any of the above embodiments is mounted on the electronic device described in this embodiment. Therefore, an electronic device whose circuit area is reduced is realized.

(Additional notes regarding the description of this specification etc.)
The above embodiment and description of each component in the embodiment will be added below.

<Supplementary Note on One Aspect of the Invention described in Embodiment>
The structure described in each embodiment can be combined with the structure described in any of the other embodiments as appropriate, for one embodiment of the present invention. In the case where a plurality of structure examples are given in one embodiment, any of the structure examples can be combined as appropriate.

Note that the content (may be a part of content) described in one embodiment is different from the content (may be a part of content) described in the embodiment and / or one or more Application, combination, replacement, or the like can be performed on the content described in another embodiment (or part of the content).

Note that the contents described in the embodiments are the contents described using various drawings or the contents described in the specification in each embodiment.

Note that a drawing (or a part thereof) described in one embodiment may be another part of the drawing, another drawing (may be a part) described in the embodiment, and / or one or more. More diagrams can be formed by combining the diagrams (may be a part) described in another embodiment.

<Additional notes regarding the description explaining the drawings>
In this specification and the like, terms indicating arrangement such as “above” and “below” are used for convenience in describing the positional relationship between components with reference to the drawings. The positional relationship between the components appropriately changes depending on the direction in which each component is drawn. Therefore, the phrase indicating the arrangement is not limited to the description described in the specification, and can be appropriately rephrased depending on the situation.

The terms “upper” or “lower” do not limit that the positional relationship between the components is directly above or directly below and is in direct contact. For example, the expression “electrode B on the insulating layer A” does not require the electrode B to be formed in direct contact with the insulating layer A, and another configuration between the insulating layer A and the electrode B. Do not exclude things that contain elements.

In the present specification and the like, in the block diagram, components are classified by function and shown as blocks independent of each other. However, in an actual circuit or the like, it is difficult to separate the constituent elements for each function, and there may be a case where a plurality of functions are related to one circuit or a case where one function is related to a plurality of circuits. Therefore, the blocks in the block diagram are not limited to the components described in the specification, and can be appropriately rephrased depending on the situation.

In the drawings, the size, the layer thickness, or the region is shown in an arbitrary size for convenience of explanation. Therefore, it is not necessarily limited to the scale. Note that the drawings are schematically shown for the sake of clarity, and are not limited to the shapes or values shown in the drawings. For example, variation in signal, voltage, or current due to noise, variation in signal, voltage, or current due to timing shift can be included.

<Additional notes on paraphrased descriptions>
In this specification and the like, when describing a connection relation of a transistor, one of a source and a drain is referred to as “one of a source and a drain” (or a first electrode or a first terminal), and the source and the drain The other is referred to as “the other of the source and the drain” (or the second electrode or the second terminal). This is because the source and drain of a transistor vary depending on the structure or operating conditions of the transistor. Note that the names of the source and the drain of the transistor can be appropriately changed according to the situation, such as a source (drain) terminal or a source (drain) electrode.

In this specification and the like, the terms “electrode” or “wiring” do not functionally limit these components. For example, an “electrode” may be used as part of a “wiring” and vice versa. Furthermore, the term “electrode” or “wiring” includes a case where a plurality of “electrodes” or “wirings” are integrally formed.

In this specification and the like, voltage and potential can be described as appropriate. The voltage is a potential difference from a reference potential. For example, when the reference potential is a ground voltage (ground voltage), the voltage can be rephrased as a potential. The ground potential does not necessarily mean 0V. Note that the potential is relative, and the potential applied to the wiring or the like may be changed depending on the reference potential.

Note that in this specification and the like, terms such as “film” and “layer” can be interchanged with each other depending on the case or circumstances. For example, the term “conductive layer” may be changed to the term “conductive film”. Alternatively, for example, the term “insulating film” may be changed to the term “insulating layer” in some cases.

Note that in this specification and the like, a 1T-1C circuit configuration including one transistor and one capacitor in one pixel or a 2T-1C structure including two transistors and one capacitor in one pixel is used. Although a circuit configuration is shown, this embodiment is not limited to this. A circuit configuration in which one pixel includes three or more transistors and two or more capacitor elements may be used, and a separate wiring may be further formed to have various circuit configurations.

<Notes on the definition of words>
Below, the definition of the phrase referred in the said embodiment is demonstrated.

<< About the switch >>
In this specification and the like, a switch refers to a switch that is in a conductive state (on state) or a non-conductive state (off state) and has a function of controlling whether or not to pass current. Alternatively, the switch refers to a switch having a function of selecting and switching a current flow path.

As an example, an electrical switch or a mechanical switch can be used. That is, the switch is not limited to a specific one as long as it can control the current.

Examples of electrical switches include transistors (for example, bipolar transistors, MOS transistors, etc.), diodes (for example, PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes. , Diode-connected transistors, etc.), or a logic circuit combining these.

Note that in the case where a transistor is used as the switch, the “conducting state” of the transistor means a state where the source and the drain of the transistor can be regarded as being electrically short-circuited. A “non-conducting state” of a transistor refers to a state where the source and drain of the transistor can be regarded as being electrically disconnected. Note that when a transistor is operated as a simple switch, the polarity (conductivity type) of the transistor is not particularly limited.

An example of a mechanical switch is a switch using MEMS (micro electro mechanical system) technology, such as a digital micromirror device (DMD). The switch has an electrode that can be moved mechanically, and operates by controlling conduction and non-conduction by moving the electrode.

<< About Pixels >>
In this specification and the like, a pixel means, for example, one element whose brightness can be controlled. Therefore, as an example, one pixel represents one color element, and brightness is expressed by one color element. Therefore, at that time, in the case of a color display device composed of R (red), G (green), and B (blue) color elements, the minimum unit of an image is an R pixel, a G pixel, and a B pixel. It is assumed to be composed of three pixels.

The color elements are not limited to three colors and may be more than that. For example, RGBW (W is white) may be used, or yellow, cyan, and magenta may be added to RGB.

<< About display elements >>
In this specification and the like, a display element includes a display medium whose contrast, luminance, reflectance, transmittance, and the like change due to an electric action or a magnetic action. Examples of display elements include EL (electroluminescence) elements, LED chips (white LED chips, red LED chips, green LED chips, blue LED chips, etc.), transistors (transistors that emit light in response to current), electron-emitting devices, Display elements using carbon nanotubes, liquid crystal elements, electronic ink, electrowetting elements, electrophoretic elements, plasma display (PDP), display elements using MEMS (micro electro mechanical system) (for example, grating light valves) (GLV), digital micromirror device (DMD), DMS (digital micro shutter), MIRASOL (registered trademark), IMOD (interference modulation) element, shutter type MEMS table Element, MEMS display device employing optical interferometry, such as a piezoelectric ceramic display), a carbon nanotube, or the like quantum dots, there is. An example of a display device using an EL element is an EL display. As an example of a display device using an electron-emitting device, there is a field emission display (FED), a SED type flat display (SED: Surface-Conduction Electron-Emitter Display), or the like. As an example of a display device using a liquid crystal element, there is a liquid crystal display (a transmissive liquid crystal display, a transflective liquid crystal display, a reflective liquid crystal display, a direct view liquid crystal display, a projection liquid crystal display) and the like. An example of a display device using electronic ink, electronic powder fluid (registered trademark), or an electrophoretic element is electronic paper. An example of a display device using a quantum dot for each pixel is a quantum dot display. Note that the quantum dots may be provided not in the display element but in part of the backlight. By using quantum dots, display with high color purity can be performed. Note that in the case of realizing a transflective liquid crystal display or a reflective liquid crystal display, a part or all of the pixel electrode may have a function as a reflective electrode. For example, part or all of the pixel electrode may have aluminum, silver, or the like. Further, in that case, a memory circuit such as an SRAM can be provided under the reflective electrode. Thereby, power consumption can be further reduced. In addition, when using an LED chip, you may arrange | position a graphene or a graphite under the electrode or nitride semiconductor of an LED chip. Graphene or graphite may be a multilayer film in which a plurality of layers are stacked. Thus, by providing graphene or graphite, a nitride semiconductor, for example, an n-type GaN semiconductor layer having a crystal can be easily formed thereon. Furthermore, a p-type GaN semiconductor layer having a crystal or the like can be provided thereon to form an LED chip. Note that an AlN layer may be provided between graphene or graphite and an n-type GaN semiconductor layer having a crystal. Note that the GaN semiconductor layer of the LED chip may be formed by MOCVD. However, by providing graphene, the GaN semiconductor layer of the LED chip can be formed by a sputtering method. In a display element using a MEMS (micro electro mechanical system), a space in which the display element is sealed (for example, an element substrate on which the display element is disposed, and an element substrate disposed opposite to the element substrate). A desiccant may be disposed between the opposite substrate). By disposing the desiccant, it is possible to prevent the MEMS and the like from being easily moved by moisture and / or from being easily deteriorated.

<< About connection >>
In this specification and the like, “A and B are connected” includes not only those in which A and B are directly connected but also those that are electrically connected. Here, A and B are electrically connected. When there is an object having some electrical action between A and B, it is possible to send and receive electrical signals between A and B. It says that.

Note that for example, the source (or the first terminal) of the transistor is electrically connected to X through (or not through) Z1, and the drain (or the second terminal or the like) of the transistor is connected to Z2. Through (or without), when electrically connected to Y, or the source of the transistor (or the first terminal or the like) is directly connected to a part of Z1, and another part of Z1 Is directly connected to X, and the drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2, and another part of Z2 is directly connected to Y. Then, it can be expressed as follows.

For example, “X and Y, and the source (or the first terminal or the like) and the drain (or the second terminal or the like) of the transistor are electrically connected to each other. The drain of the transistor (or the second terminal, etc.) and the Y are electrically connected in this order. ” Or “the source (or the first terminal or the like) of the transistor is electrically connected to X, the drain (or the second terminal or the like) of the transistor is electrically connected to Y, and X or the source ( Or the first terminal or the like, the drain of the transistor (or the second terminal, or the like) and Y are electrically connected in this order. Or “X is electrically connected to Y through the source (or the first terminal) and the drain (or the second terminal) of the transistor, and X is the source of the transistor (or the first terminal). Terminal, etc.), the drain of the transistor (or the second terminal, etc.), and Y are provided in this connection order. By using the same expression method as in these examples and defining the order of connection in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor are separated. Apart from that, the technical scope can be determined.

Alternatively, as another expression method, for example, “a source (or a first terminal or the like of a transistor) is electrically connected to X through at least a first connection path, and the first connection path is The second connection path does not have a second connection path, and the second connection path includes a transistor source (or first terminal or the like) and a transistor drain (or second terminal or the like) through the transistor. The first connection path is a path through Z1, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y through at least the third connection path. The third connection path is connected and does not have the second connection path, and the third connection path is a path through Z2. " Or, “the source (or the first terminal or the like) of the transistor is electrically connected to X via Z1 by at least a first connection path, and the first connection path is a second connection path. The second connection path has a connection path through the transistor, and the drain (or the second terminal, etc.) of the transistor is at least connected to Z2 by the third connection path. , Y, and the third connection path does not have the second connection path. Or “the source of the transistor (or the first terminal or the like) is electrically connected to X through Z1 by at least a first electrical path, and the first electrical path is a second electrical path Does not have an electrical path, and the second electrical path is an electrical path from the source (or first terminal or the like) of the transistor to the drain (or second terminal or the like) of the transistor; The drain (or the second terminal or the like) of the transistor is electrically connected to Y through Z2 by at least a third electrical path, and the third electrical path is a fourth electrical path. The fourth electrical path is an electrical path from the drain (or second terminal or the like) of the transistor to the source (or first terminal or the like) of the transistor. can do. Using the same expression method as those examples, by defining the connection path in the circuit configuration, the source (or the first terminal or the like) of the transistor and the drain (or the second terminal or the like) are distinguished. The technical scope can be determined.

In addition, these expression methods are examples, and are not limited to these expression methods. Here, it is assumed that X, Y, Z1, and Z2 are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, and the like).

SL_n Source line SL_1 Source line SL_12 Source line 100 Semiconductor device 100A Semiconductor device 100B Semiconductor device 100C Semiconductor device 100D Semiconductor device 100E Semiconductor device 110 Shift register 120 Data register 130 Digital analog conversion circuit 131_B Reference voltage generation circuit 131_G Reference voltage generation circuit 131_R Reference Voltage generation circuit 132 Reference voltage generation circuit 132_1 Reference voltage generation circuit 132_2 Reference voltage generation circuit 132_3 Reference voltage generation circuit 133 Resistor 134 Wiring group 134_1 Wiring group 134_2 Wiring group 134_3 Wiring group 135 Switching circuit 136 Selector 136_1 Selector 136_2 Selector 137 Transistor 138 Transistor 139 Interpolation circuit 140 Buffer amplifier 142 Buffer 160 Unit 170 Table Part 172 pixels 172A pixel 172B pixel 180 gate driver 190 touch 192 panel IC
200 source driver 203 pixel 221 transistor 222 transistor 223 EL element 231 transistor 232 capacitor element 233 liquid crystal element 500 substrate 501 channel formation region 502 low concentration impurity region 503 high concentration impurity region 504a gate insulating film 504b gate insulating film 505a gate electrode layer 505b gate Electrode layer 506a Source electrode layer 506b Drain electrode layer 506c Source electrode layer 506d Drain electrode layer 507 Intermetallic compound region 508a Side wall insulating film 508b Side wall insulating film 509 Element isolation insulating film 510 Transistor 511 Channel forming region 512 Low concentration impurity region 513 High-concentration impurity region 517 Intermetallic compound region 520 Transistor 521 Interlayer insulating film 522 Interlayer insulating film 523 Wiring 711 Display portion 7 12 Source Driver 712A Gate Driver 712B Gate Driver 713 Substrate 714 Source Driver IC
715 FPC
716 External circuit board 901 Case 902 Case 903a Display unit 903b Display unit 904 Select button 905 Keyboard 910 Electronic book terminal 911 Case 912 Case 913 Display unit 914 Display unit 915 Shaft unit 916 Power supply 917 Operation key 918 Speaker 920 Television Device 921 Housing 922 Display unit 923 Stand 924 Remote controller 930 Main unit 931 Display unit 932 Speaker 933 Microphone 934 Operation button 941 Main unit 942 Display unit 943 Operation switch 1000 Semiconductor device 8000 Display module 8001 Upper cover 8002 Lower cover 8003 FPC
8004 Touch panel 8005 FPC
8006 Display panel 8009 Frame 8010 Printed circuit board 8011 Battery

Claims (5)

A first reference voltage generation circuit;
A second reference voltage generation circuit;
A first selector;
A second selector;
A first wiring;
A semiconductor device having a second wiring,
The first reference voltage generation circuit has a function of generating a first plurality of voltages,
The second reference voltage generation circuit has a function of generating a second plurality of voltages,
The first wiring has a function of transmitting any one of the first plurality of voltages generated by the first reference voltage generation circuit;
The second wiring has a function of transmitting any one of the second plurality of voltages generated by the second reference voltage generation circuit,
The first selector has a function of selecting and outputting any one of the first plurality of voltages;
The second selector has a function of selecting and outputting any one of the second plurality of voltages;
The semiconductor device, wherein the first wiring and the second wiring are provided so as not to overlap along a major axis direction of the semiconductor device. A first reference voltage generation circuit;
A second reference voltage generation circuit;
A third reference voltage generation circuit;
A first selector;
A second selector;
A third selector;
A first wiring;
A second wiring;
A semiconductor device having a third wiring,
The first reference voltage generation circuit has a function of generating a first plurality of voltages,
The second reference voltage generation circuit has a function of generating a second plurality of voltages,
The third reference voltage generation circuit has a function of generating a third plurality of voltages;
The first wiring has a function of transmitting any one of the first plurality of voltages generated by the first reference voltage generation circuit;
The second wiring has a function of transmitting any one of the second plurality of voltages generated by the second reference voltage generation circuit,
The third wiring has a function of transmitting any one of the third plurality of voltages generated by the third reference voltage generation circuit,
The first selector has a function of selecting and outputting any one of the first plurality of voltages;
The second selector has a function of selecting and outputting any one of the second plurality of voltages;
The third selector has a function of selecting and outputting any one of the third plurality of voltages;
The semiconductor device, wherein the first wiring, the second wiring, and the third wiring are provided so as not to overlap along a major axis direction of the semiconductor device. In claim 2,
The first reference voltage generation circuit is a circuit that generates a gradation voltage to be supplied to a pixel having a display element that exhibits red color.
The second reference voltage generation circuit is a circuit that generates a gradation voltage to be supplied to a pixel having a display element exhibiting a green color.
The semiconductor device, wherein the third reference voltage generation circuit is a circuit that generates a gradation voltage to be supplied to a pixel having a blue display element. A semiconductor device according to any one of claims 1 to 3;
And a display device. A display device according to claim 4;
And an operation unit.

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