JP6715790B2 - Reference current source circuit - Google Patents

Description

The present invention relates to a reference current source circuit incorporated in an integrated circuit, and more particularly to a reference current correction method.

As a background art of this technical field, there is Japanese Patent Laid-Open No. 2015-1745 (Patent Document 1). In this announcement, "The frequency of the first clock signal is calculated using the oscillator that generates the first clock and the second clock signal that is input from outside the display driver IC, and the target frequency and the calculated frequency are A frequency compensation circuit for generating an adjustment signal using the oscillator, the oscillator adjusting the frequency of the first clock signal based on the adjustment signal.” (see summary).

JP2015-1745

In a mixed signal LSI, a reference voltage source and a reference current source, which have small characteristic fluctuations due to environmental changes and deterioration over time, are important in order to ensure the absolute value accuracy of analog circuits. Further, in order to ensure the timing accuracy of the digital signal, the clock source that becomes the reference time is important.

FIG. 2 is an example of a circuit diagram of a conventional reference current source. In the reference current source circuit shown in the example, a reference voltage source 101 for supplying a reference voltage V1, a resistance element 103 for converting the reference voltage into a current, and a voltage V2 applied to the resistance element 103 are made equal to the reference voltage V1. Error amplifier 102 and NMOS 104, and a current mirror circuit 105 for distributing the current flowing through the resistor 103 to the oscillation circuit and other analog circuits.

Here, when the resistance value of the resistance element 103 is R and the reference current is I, the reference current is represented by I=V1/R.

Among them, for the reference voltage V1, a circuit configuration generally known as a bandgap reference is used to generate a voltage with a small fluctuation in which the temperature dependence of the element is canceled.

However, the value of the reference current fluctuates due to the environmental temperature of the resistance element or deterioration due to long-term operation.

Therefore, the accuracy of the reference current in the reference circuit and the accuracy of the reference clock by the oscillation circuit using the reference current are more affected by the characteristic variation of the resistance element than in the reference voltage, and it is difficult to improve the accuracy.

Patent Document 1 describes a method of using an external clock to obtain a clock source that is stable with respect to manufacturing errors of used elements and temperature changes. However, the method of Patent Document 1 is intended only for correction of the clock source in the reference circuit, and cannot correct the reference current.

Therefore, the present invention provides a correction method that corrects not only the clock source but also the reference current source by using an external clock.

In order to solve the above problems, the present invention provides an oscillation circuit driven by a current, a reference current source for supplying a current to the oscillation circuit, an input of a reference period supplied from the outside of an integrated circuit, and the oscillation. A comparator that adjusts the reference current so that the output cycle of the circuit is the first input, the reference cycle is the second input, and the first second cycle difference is within the adjustable minimum range, Have.

According to the present invention, an external clock can be used to provide a reference current source that does not depend on temperature changes or deterioration of the device over time.

Problems, configurations, and effects other than those described above will be clarified by the following description of the embodiments.

It is an example of the block diagram showing the correction system of this invention. It is an example of a schematic diagram of a circuit showing the first embodiment. It is an example of an oscillator circuit used in the first embodiment. 3 is an example of a timing chart of the oscillator circuit used in the first embodiment. It is an example of a circuit configuration showing a second embodiment. It is an example of a circuit configuration showing a third embodiment. It is an example of a circuit configuration showing a fourth embodiment. It is an example of a timing chart illustrating a fourth embodiment.

Examples will be described below with reference to the drawings.

FIG. 1 is an example of a configuration diagram showing a correction method of the present invention. The current source correction circuit 1 includes an oscillator circuit 200 driven by a current, a reference current source 100 for supplying a current to the oscillator circuit, an input of a reference cycle supplied from outside the integrated circuit, and an output of the oscillator circuit. A period comparator 300 that adjusts the reference current so that the first and second period differences fall within an adjustable minimum range, with the period as a first input, the reference period as a second input, and The reference current source 100 has a variable current value to be supplied, and has a function of controlling the current value by a control signal from a comparator 300 described later.

The oscillation circuit 200 uses an output clock cycle that is inversely proportional to the current value supplied by the reference current source 100. That is, assuming that the clock cycle is T1, the supply current value of the reference current source is I1, and the proportional coefficient between the two is A, the relationship is T1=A/I1.

When the reference period acquired from the outside of the current source correction circuit 1 is T2, the comparator 300 compares T1 and T2, and outputs a control signal for decreasing I1 if T1<T2, and T1> If it is T2, a control signal for increasing I1 is output.

Further, the proportional coefficient A has a function of selecting a value in advance so that the reference current I1 is set to a desired value when T1=T2.

The effects of this embodiment are shown below.

Now, assuming that the target desired current value is Iref, it is assumed that the proportional coefficient A is selected so that the relationship of T2=A/Iref is established.

Here, consider a case where the reference current I1 fluctuates by ΔI due to the influence of the environmental temperature, the change with time of the element, etc., and I1=(Iref+ΔI).

At this time, T1=T2/(1+ΔI/Iref) is derived from the relationship of T1=A/I1=A/(Iref+ΔI). Therefore, if ΔI is positive, T1<T2, and if ΔI is negative, T1>T2. If ΔI=0, then T1=T2.

On the other hand, the comparator 300 controls the reference current source 100 to decrease I1 if T1<T2, and conversely controls the reference current source 100 to increase I1 if T1>T2. To do.

Therefore, when I1 increases from Iref by ΔI, T1<T2, and I1 decreases until T1=T2. On the contrary, when I1 decreases from Iref by ΔI, T1>T2, again T1. I1 increases until =T2.

As described above, since negative feedback is applied so that the relationship of T1=T2 is maintained, the relationship of T2=A/Iref can be maintained. Here, when the formula for Iref is summarized, Iref=A/T2, and the value of Iref is determined by the proportional coefficient A and the reference period T2 acquired from the outside. In addition, it is sufficient to select highly accurate ones, which can be selected independently of the resistance element of the reference current source.

Here, a specific example of the proportional coefficient A will be described using an example of the oscillation circuit 200. FIG. 3 is an example of the oscillator circuit 200.

The oscillator circuit 200 has a configuration in which the reference voltage V1 and the reference current I1 are input and a clock cycle is output to the OUT terminal. This circuit is composed of capacitive elements C1 and C2, a current mirror circuit 201 for copying the reference current I1 into a charging current I2 and a discharging current I3 of the capacitor, a switch circuit SW1 for switching the I2 and I3, and a V4 A relaxation oscillation circuit unit composed of a non-inverting comparator circuit CMP1 for monitoring the voltage and switching the switch, and a non-inverting circuit composed of OPA1 and R1 and R2 for generating an operating voltage V3 of the oscillation circuit from the VIN. It has an amplifier circuit section.

FIG. 4 is an example of a timing chart of the oscillation circuit 200.

In the above circuit configuration, assuming that I1=I2=I3, the output oscillation cycle T1 is expressed by T1=V3×2×C1/I1. Further, V3=V1×(R1+R2)/R1 by the non-inverting amplifier circuit, and now, if the ratio of R1 and R2 is set to 1:α and V3 is substituted into the equation of T1, T1=V1× It can be expressed as (1+α)/α×2×C1/I1. From the above, the relationship of A=V1×(1+α)/α×2×C1 is obtained.

Since the reference voltage V1 is constant in the above relational expression, the value of A can be arbitrarily changed by switching the R1:R2 ratio or the value of C1.

The switching method can be realized by electrically switching a plurality of resistance elements or capacitance elements connected in series or in parallel by a MOS switch.

At this time, the final reference current is Iref=A/T2=V1×β×C1/T2, where β is the constant (1+α)/α×2 determined by the R1:R2 ratio. For comparison, it can be said that R is replaced with T2/C1.

In the above, for example, a communication signal can be used as the reference cycle T2. Taking a network of in-vehicle control units as an example, protocols such as CAN and SPI are used for communication between units and ICs, and the basic cycle used in these communication is based on the oscillation cycle of the crystal unit. ing. And, as the crystal oscillator, for example, a crystal oscillator having ±0.3% or less for CAN use is commercially available.

Further, as C1, for example, a capacitive element built in an integrated circuit can be used. The capacitance element has a temperature dependence coefficient of value lower than that of a resistance element also incorporated in an integrated circuit by one digit or more. For example, an accuracy of about ±0.3% in the range of -40°C to 175°C is obtained. can get.

Here, if the minimum unit of the reference current I1 that can be adjusted is designed in 0.1% steps, for example, a reference current I1 with an accuracy of about ±0.7% can be obtained with reference to the reference voltage V1.

In this embodiment, a method of adjusting the current of the reference current source 100 will be described.

FIG. 5 is an example of the configuration of the current source correction circuit 1 for switching the current of the reference current source 100.

The reference current source 100 has a reference voltage source 101 for supplying a reference voltage V1, a variable resistor R10 for converting the reference voltage into a current I10, and a voltage V2 applied to the resistor R10 to be equal to the reference voltage V1. The error amplifier 102 and the NMOS 104, and a current mirror circuit 105 for distributing the current I10 flowing through the resistor 103 to the oscillation circuit and other analog circuits.

The variable resistor R10 is composed of, for example, a plurality of resistance elements connected in series or in parallel, and the resistance value can be switched stepwise by electrically switching the number of resistors connected by a MOS switch or the like. A circuit can be realized.

The period comparator 300 compares T1 and T2 described in the first embodiment. If T1<T2, the resistance value of the variable resistor R10 is increased by one step from the current setting, and T1>T2. For example, on the contrary, a control signal that reduces the resistance value by one step is output.

Since the current I10 has a relation of I10=V2/R10, increasing R10 decreases the reference current, and decreasing R10 increases the reference current. Therefore, the effect described in the first embodiment can be obtained.

In this embodiment, another example of the method for adjusting the current of the reference current source 100 will be described.

FIG. 6 is an example of the configuration of the current source correction circuit 1 for switching the current of the reference current source 100.

The reference current source 100 has a resistance element R20 for converting a reference voltage into a current I10, PMOS elements 601 to 603 forming a current mirror circuit, and 106 and 107. The PMOS devices 602 to 603 are provided with switches SW61 to 62 that can be switched ON/OFF.

The current mirror circuit receives the current I10 as an input and outputs I1 and I4 as currents to be supplied to the oscillation circuit and various analog circuits, respectively. At this time, the input/output current ratio, that is, the mirror ratio is Of the PMOS elements 601 to 603 that are ON, the total gate width of the elements that are ON and the gate width of each of the PMOS elements 106 and 108 that are mirror destinations are determined. Here, by weighting the gate widths of the ON/OFF switchable PMOS elements 602 and 603, for example, 1:2, a four-step mirror ratio combination can be set by the ON/OFF combination of each switch. That is, the setting of the supply current of the reference current source can be set in four steps.

The frequency comparator 300 compares T1 and T2 shown in the first embodiment. If T1<T2, the supply current is increased by one step from the current setting, and if T1>T2, the opposite is done. The ON/OFF combination of the SW 61 to 62 is changed so that the supply current is reduced by one step.

Therefore, the effect described in the first embodiment can be obtained.

In the present invention, the number of combinations of mirror ratios shown in the present embodiment is not limited to this, and the number of elements and combinations can be changed according to the required current accuracy. Further, although the mirror source is variable in the present embodiment, the same effect can be obtained even if the mirror destination is variable.

In this embodiment, a circuit configuration example capable of extracting a reference cycle from a communication signal will be described.

FIG. 7 shows a configuration in which a reference period is extracted from a communication signal and a function of generating a comparison period for comparison with the reference period from the oscillation period is added to the configuration of the first embodiment.

The current source correction circuit 1 determines a data length of a communication signal, sets a count number of an oscillation cycle and outputs a count reset signal, and a reference cycle generation circuit 702 that generates a reference cycle from the communication signal. A cycle counter 703 that receives the setting signal from the 701 and counts the oscillation cycle, and a comparison cycle generation circuit 704 that outputs the count period of the cycle counter.

Since the other configurations in FIG. 7 have the same functions as the configurations denoted by the same reference numerals shown in FIG. 1 which have already been described, the description thereof will be omitted.

FIG. 8 is an example of a timing chart for explaining the operation of this embodiment.

The communication signal includes a recognition pattern S indicating the start of a communication frame, a pattern E indicating the end, information L on the data length to be transmitted, and the data to be communicated, as represented by CAN communication, for example. I shall.

The reference cycle generation circuit 702 extracts the period of the data itself of the communication signal and outputs it in the reference cycle T2.

The data determination circuit 701 receives the information of the data length L and sets the count number of the cycle counter 703. The count number set here is set so that a desired Iref can be obtained when T1=T2.

When the count number is set, the cycle counter 703 counts the oscillation cycle T10 up to the set count number and outputs the count period as the comparison cycle T1.

The period comparator 300 compares the reference periods T2 and T1 after the comparison period T1 is output, and controls the supply current value of the reference current source 100 as in the first embodiment.

According to the present embodiment, if the device is connected to a communication network that can obtain a desired T2 cycle accuracy, it is not necessary to prepare an element such as a crystal oscillator for exclusive use, and the number of parts can be reduced.

It should be noted that the present invention is not limited to the above-described embodiments, but includes various modifications. For example, the above-described embodiments have been described in detail in order to explain the present invention in an easy-to-understand manner, and are not necessarily limited to those having all the configurations described. Further, a part of the configuration of a certain embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of a certain embodiment. Further, it is possible to add/delete/replace other configurations with respect to a part of the configurations of the respective embodiments. Further, the signal polarities shown in the timing chart are examples, and the present invention is not limited to this. Further, each of the above-described configurations, functions, processing units, processing means, etc. may be realized by hardware, for example, by designing a part or all of them with one integrated circuit, or with a plurality of integrated circuits. May be realized.

1 current source correction circuit 100 period comparator 101 bandgap reference circuit 102 error amplifier 103 resistance element 104 NMOS
105 Current Mirror Circuit 200 Oscillation Circuit 201 Current Mirror Circuit 300 Reference Current Source 701 Data Judgment Circuit 702 Reference Cycle Generation Circuit 703 Cycle Counter 704 Comparison Cycle Generation Circuit
Proportional coefficient having the relationship of A T1 =A/I1
C1 to C2 Oscillator charge/discharge capacity
CMP1 non-inverting comparator
I10 Reference current generated by voltage-current converter
Reference current supplied to I1 oscillator
I2 oscillator charging current
I3 oscillator circuit discharge current
I4 Reference current supplied to analog circuit
Iref desired current value
OPA1 operational amplifier
R1 to R2 Feedback resistance of non-inverting amplifier circuit
R10 variable resistor
R20 resistance element
Oscillation period for T1 period comparison
Reference period for T2 period comparison
V1 reference voltage
V2 Voltage applied to the resistance element of the voltage-current converter
Operating voltage of V3 oscillator
V4 Oscillator circuit comparator input voltage

Claims (4)

A reference current source built in an integrated circuit and outputting a reference current to an analog circuit,
An oscillator circuit driven by a current generated by the reference current source and capable of arbitrarily setting an oscillation cycle,
A cycle comparator having an output cycle of the oscillator circuit as a first input and a reference cycle input from the outside of the integrated circuit as a second input;
The period comparator adjusts the reference current so that a period difference between the first input and the second input falls within a predetermined range,
The reference current source, the reference current source circuit which outputs the adjusted reference current to the analog circuit and the oscillation circuit. The reference current source includes a variable resistance element,
The reference current source circuit according to claim 1, wherein the reference current is adjusted by changing a resistance value of the variable resistance element. The reference current source includes a current mirror circuit,
The reference current source circuit according to claim 1, wherein the reference current is adjusted by changing a mirror ratio of the current mirror circuit. The reference current source circuit according to claim 1, wherein the input of the reference period is extracted from a communication signal with the outside of the integrated circuit.

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