JP6704003B2 - Nitride semiconductor component manufacturing method and nitride semiconductor component - Google Patents

Description

The present invention relates to a method for manufacturing a nitride semiconductor component, in particular an optoelectronic nitride semiconductor component.

This patent application claims the priority of German patent application 102015109761.3, the disclosure content of which is incorporated herein by reference.

For the manufacture of nitride semiconductor components such as LEDs, the functional layers of the component are usually epitaxially deposited on a suitable growth substrate. Sapphire substrates are particularly suitable as substrates for growing nitride compound semiconductor layers. When a nitride compound semiconductor is grown on sapphire by heteroepitaxial growth, defects in the semiconductor material can occur due to the lattice mismatch present in the semiconductor material. These defects occur especially in the growth zone of the nitride semiconductor material at the interface with the growth substrate. This may reduce the efficiency of the parts. In the operation of the radiation emission type nitride semiconductor component, such a high defect density in the grown portion allows radiation to be absorbed particularly at the interface between the growth substrate and the semiconductor stacked body.

It is one of the objectives to be achieved to provide an improved method for manufacturing a nitride semiconductor component with reduced defect density at the interface with the growth substrate. Further provided is, for example, a nitride semiconductor component having a reduced defect density such that absorption at an interface with a growth substrate is reduced.

These objects are achieved by the method for manufacturing a nitride semiconductor component and the nitride semiconductor component specified in the present independent claims. Advantageous embodiments and further developments of the method are the subject of the present dependent claims.

In at least one embodiment of the method, a growth substrate having a growth surface formed from planar regions having a plurality of three-dimensional surface structures is provided. The growth substrate has a growth surface on which a semiconductor layer is deposited in a later method step. The growth surface is formed by a planar area in which a plurality of three-dimensional surface structures are formed. In other words, the growth surface has a two-dimensional area constituted by a flat surface and a three-dimensional area constituted by a surface structure projecting from a plane defined by the plane area. Considering the three-dimensional surface structure of the planar area of the growth surface, the substrate can also be referred to as a prestructured substrate.

The surface structure can be constituted, for example, by a projection extending away from the planar area. These protrusions have a conical shape, and thus an annular cross section in a plan view of the growth surface, or a pyramidal shape, and thus have a polygonal cross section in a plan view of the growth surface (for example, a triangle, Squares, hexagons, or other polygons) are particularly preferred.

In another embodiment, a semiconductor stack is grown on the growth surface in a further step of the method. In particular, an epitaxial growth method (for example, metal organic vapor phase epitaxy (MOVPE)) can be used to grow the semiconductor stacked body.

The semiconductor stack can in particular be a nitride-based semiconductor stack. The term "nitride-based" refers in particular to InxAlyGa1-x-yN (0≤x≤1,0≤y≤1, x+y≤1) III-V compound semiconductor material systems (eg GaN, AlN, A semiconductor layer and a semiconductor stack including AlGaN, InGaN, AlInGaN) are included. The semiconductor stack can include dopants and additional components. However, for the sake of simplicity, the major constituents of the crystal lattice of the semiconductor stack (ie Al, Ga, In, N) can be partially replaced and/or supplemented by small amounts of further substances. Only these components are shown, if at all.

Advantageously in the method, the growth of the semiconductor stack is selectively initiated in the growth region of the growth substrate, which is only part of the growth surface of the growth substrate. Specifically, the growth area is preferably less than 45% of the growth surface, more preferably less than 25% of the growth surface, and most preferably less than 5% of the growth surface.

In particular, the method utilizes the fact that the defect density is high in the region where the nitride semiconductor material of the semiconductor laminated body starts to grow. The method reduces the defect density at the interface between the growth substrate and the semiconductor stack by minimizing the growth region so that the growth region is significantly smaller than the total area of the growth substrate and, in some cases, subsequent growth. It also reduces the defect density in the layer. This advantageously reduces the absorption at the interface between the growth substrate and the nitride-based semiconductor stack in a radiation emitting component. This is particularly advantageous in the case of nitride semiconductor components, where the growth substrate is not removed during manufacturing and remains in the finished component.

In at least one embodiment, the growth region is constituted by the planar region itself, or a portion of the planar region. When growing a nitride semiconductor material on a growth substrate having a planar region and a plurality of three-dimensional surface structures formed in the planar region, the growth is selectively initiated within the planar region. The nitride semiconductor material does not substantially grow on the three-dimensional surface structure. Rather, the three-dimensional surface structure only grows laterally in a later growth stage of the nitride semiconductor material. Therefore, the growth region can be minimized by reducing the ratio of the planar region that at least partially constitutes the growth region to the region having the three-dimensional surface structure in the planar region. The planar area is preferably less than 45% of the growth surface, more preferably less than 25% of the growth surface, and most preferably less than 5% of the growth surface.

In yet another preferred embodiment, the growth area is smaller than the planar area. The growth area is preferably less than 90% of the planar area, more preferably less than 60% of the planar area, and most preferably less than 30% of the planar area. This can be achieved in particular by growing a layer of material in which the nitride semiconductor material is substantially incapable of growing in a portion of the planar area to reduce the growth area. In this case, the nitride semiconductor material is not grown in the entire planar region between the three-dimensional structures, but only in the portion of the planar region that is not covered by the layer.

An oxide compound or a nitride compound is suitable for the material in which the nitride semiconductor material cannot substantially grow. The material is preferably silicon oxide, silicon nitride or titanium nitride.

In at least one embodiment, the growth region is composed of non-interconnected portions of the planar region. The non-interconnecting portions of the planar area may in particular adjoin the three-dimensional structure. These parts can be, for example, annular regions, in particular circular regions, in which the planar regions of the growth substrate are exposed between the three-dimensional structures. The shape of these parts can also be other geometric shapes, such as polygons, especially squares or hexagons.

Alternatively or additionally, the non-interconnecting portions of these planar regions can be openings in a layer of material in which the nitride semiconductor material cannot substantially grow. Again, these parts can be, for example, annular regions, in particular circular regions, or polygonal, in particular square or hexagonal regions.

In at least one other embodiment, the nucleation layer is partially deposited in the planar area. The nucleation layer promotes the growth of nitride semiconductor material on the nucleation layer. The material of the nucleation layer can be, for example, aluminum nitride, in particular oxygen-containing aluminum nitride (AlN:O). Oxygen can be present as a dopant in the nucleation layer or even in the range of percentages. Nucleation layers can be used to increase growth selectivity. In particular, oxygen-containing AlN can be used to influence the selectivity of the growth surface with respect to the particular surface area on which the semiconductor layer deposited in the nucleation layer grows.

In the method, the growth substrate preferably comprises or consists of sapphire. Sapphire is preferred in that it transmits at least some of the radiation emitted by the optoelectronic component so that it can be extracted through the growth substrate. If the radiation is to be emitted to the radiation emitting surface of the nitride semiconductor stack which is remote from the growth substrate, a mirror layer can be provided on the rear surface of the growth substrate which is remote from the semiconductor stack. Alternatively, the mirror layer can be dispensed with, for example by placing the semiconductor chip on a reflective lead frame.

The nitride-based semiconductor stack deposited on the growth substrate is preferably an n-doped semiconductor region, a p-doped semiconductor region, and an active layer disposed between the n-doped semiconductor region and the p-doped semiconductor region. Including layers. A layer suitable for emitting electromagnetic radiation is suitable for the active layer. More specifically, the nitride semiconductor component can be a light emitting diode.

One embodiment of the nitride semiconductor component preferably comprises a growth substrate having a growth surface formed from planar regions having a plurality of three-dimensional surface structures. The nitride-based semiconductor stack is arranged on the growth surface. The nitride-based semiconductor stack has a first region located at the growth surface at the interface with the growth substrate. The first region has a higher defect density than the second region laterally surrounding the first region, and the growth region is less than 45% of the growth surface, more preferably less than 25% of the growth surface. Yes, and most preferably less than 5% of the growth surface.
In a preferred embodiment, the nitride semiconductor component is a radiation emitting optoelectronic component in which the growth substrate is a transparent substrate. The transparent substrate can in particular be a sapphire substrate.

Further advantageous embodiments of the nitride semiconductor component can be inferred from the above description of the method for manufacturing the nitride semiconductor component and vice versa.

FIG. 1 is a schematic view of a nitride semiconductor component. FIG. 2A is a schematic sectional view of a growth substrate. FIG. 2B is a schematic plan view of the growth substrate. FIG. 2C is a schematic plan view of the growth substrate. FIG. 3A is a schematic diagram of the intermediate steps of one embodiment of the method. FIG. 3B is a schematic diagram of the intermediate steps of one embodiment of the method. FIG. 3C is a schematic diagram of the intermediate steps of one embodiment of the method. FIG. 4A is a schematic diagram of the intermediate steps of one embodiment of the method. FIG. 4B is a schematic diagram of the intermediate steps of one embodiment of the method. FIG. 4C is a schematic diagram of the intermediate steps of one embodiment of the method. FIG. 5A is a schematic plan view of the growth substrate. FIG. 5B is a schematic plan view of the growth substrate. FIG. 5C is a schematic plan view of the growth substrate.

Hereinafter, the present invention will be described in more detail with reference to FIGS. In each drawing, the same or identically acting elements are respectively provided with the same reference numerals. The illustrated parts and their size ratios to one another should not be considered to be to scale.

FIG. 1 is a diagram of an embodiment of a nitride semiconductor component 100. In this embodiment, the nitride semiconductor component 100 is a radiation emitting optoelectronic component (particularly a light emitting diode).

The nitride semiconductor component 100 includes the growth substrate 1, and the semiconductor stacked body 30 is formed on the growth substrate 1. The semiconductor laminated body 30 can be epitaxially formed on the growth substrate 1 by MOVPE, for example.

The semiconductor laminated body 30 includes, for example, only the n-type doped semiconductor region 3, the p-type doped semiconductor region 5, and the radiation emitting active layer 4 disposed between the n-type doped semiconductor region 3 and the p-type doped semiconductor region 5. However, the buffer layer 2 formed on the growth substrate 1 is also provided. The buffer layer 2, the n-type doped semiconductor region 3, the active layer 4, and the p-type doped semiconductor region 5 can each include one or more individual layers.

The semiconductor stack 30 is preferably a nitride-based semiconductor stack. The semiconductor layers 2, 3, 4, and 5 of the semiconductor stacked body 30 are, in particular, InxAlyGa1-x-yN (0≦x≦1, 0≦y≦1, x+y≦1 (for example, GaN, AlN, AlGaN, InGaN, AlInGaN)). The semiconductor stack can include dopants and additional components.

Furthermore, the semiconductor stack 30 can be provided with electrical contacts 6, 7 for supplying a current to the semiconductor stack 30. For example, the nitride semiconductor component 100 can have a p-type contact 6 and an n-type contact 7.

The growth substrate 1 of the nitride semiconductor component 100 has a growth surface 10 on which a semiconductor stack 30 is grown. The growth surface 10 comprises a two-dimensional flat area 11, in which a plurality of three-dimensional surface structures 12 are arranged.

For greater clarity, possible embodiments of growth substrate 1 are illustrated in the cross-sectional view of FIG. 2A and the plan views of FIGS. 2B and 2C. As can be seen from the cross-sectional view of FIG. 2A, the surface structure 12 projects from the plane formed by the planar area 11. The three-dimensional surface structure 12 is in the form of a protrusion extending upward from the planar area 11 in the vertical direction.

As shown in FIG. 2B, the cross section of the surface structure 12 can be annular, especially circular. For example, the surface structure 12 can be formed as a conical protrusion. Alternatively, as shown in FIG. 2C, the cross section of the surface structure can also be polygonal, in particular hexagonal, ie the surface structure 12 can be formed in the planar area 11 as a pyramidal protrusion. The planar area 11 extends between the surface structures 12 shaped as protrusions.

The growth substrate 1 can in particular also comprise aluminum oxide or can be made of aluminum oxide. More specifically, the growth substrate 1 can be a sapphire substrate. The planar region 11 is particularly preferably constituted by the crystallographic C-plane or -C-plane of aluminum oxide, which is particularly suitable for growing nitride-based semiconductor materials. Therefore, the surface of the surface structure 12 is constituted by a plurality of other crystal planes depending on the orientation of the surface structure 12 with respect to the planar region 11.

Referring back to FIG. The semiconductor stacked body 30 has a grown portion 20. These growth parts 20 only cover a part of the growth surface 10. This is because the nitride semiconductor material grows selectively in the growth region 13 of the growth surface 10 at the start of epitaxial growth. In particular, the growth of the nitride semiconductor material on the structured growth substrate 1 formed by the planar region 11 and the surface structure 12 arranged on the planar region 11 is selectively initiated in the planar region 11. I know that Therefore, in the embodiment of FIG. 1, the growth region 13 is constituted by the planar region 11.

It has been found that the defect density is higher in the grown portion 20 than in the nitride-based semiconductor stack 30 other than the grown portion 20. As the surface structure 12 grows laterally, the defect density decreases. Therefore, a relatively low defect density can be realized in the regions of the functional layers 3, 4, 5 of the nitride-based semiconductor laminated body 30. Therefore, the quality of the functional layers 3, 4, 5 of the nitride semiconductor component 100 is hardly impaired by the high defect density in the grown portion 20.

The method and the present nitride semiconductor component described in the present specification are particularly applicable to the high defect density of the grown portion 20 because at least many of the rays 9 emitted by the active layer 4 are grown due to the high defect density of the grown portion 20. The fact that 20 is absorbed in the nitride semiconductor component may have an adverse effect on the efficiency of the nitride semiconductor component.

A light ray 9 emitted from the active layer 4 toward the growth substrate 1 is illustrated in FIG. The light beam 9 passes, for example, through one of the growth parts 20 and a growth substrate 1, which is preferably transparent, which can have a mirror layer 8 deposited on its rear surface. For example, after reflection at the mirror layer 8, the light beam 9 can then pass again through the growth substrate 1 and one of the growth parts 20. In the example shown, the light rays 9 reflected by the mirror layer 8 impinge on the radiation-exiting surface 31 of the nitride semiconductor component on the side opposite to the mirror layer 8 at an angle of incidence which is greater than the critical angle for total internal reflection. Therefore, the light beam 9 is not directly emitted, but is deflected again toward the growth substrate 1 by total internal reflection. Then, in the region of the growth substrate 1, the ray 9 hits, for example, one of the surface structures 12, and the ray 9 is reflected or refracted so that it strikes the radiation extraction surface 31 at an angle of incidence smaller than the critical angle of total internal reflection. .. As a result, light rays are extracted from the nitride semiconductor component 100.

The high absorption effect due to the high defect density in the grown portion 20 reduces the efficiency of the nitride semiconductor component. Based on this understanding, in the present method and the present nitride semiconductor component, the growth region 13 is preferably less than 45% of the growth surface 10, more preferably less than 25% of the growth surface 10, and most preferably 5% of the growth surface 10. It is advantageously minimized to less than. This advantageously reduces the volume of the growing portion 20. Since the absorption is correlated with the volume, the absorption effect is reduced by reducing the growth portion 20, and the brightness of the radiation emission type nitride semiconductor component 100 is increased.

Furthermore, the low absorption in the growing part 20 has the advantage that the absorption-related changes in the chromaticity point of the emitted radiation are reduced. Due to absorption, the energy of the absorbed light can be emitted as heat or as radiation by luminescent defects without emission, which can cause a change in the emission spectrum and thus a change in the chromaticity point.

The reduction of the growth region 13 can be achieved, for example, by reducing the planar region 11 portion in the total area of the growth surface 10 by less than 90%, more preferably by less than 60%, most preferably by less than 30%. This is achieved in the embodiment schematically illustrated in FIG. 1 by adjusting the size and/or density of the three-dimensional surface structures 12 so that the planar areas 11 in the spaces between the surface structures 12 are appropriately small. It is possible.

In order to increase the surface structure 12 portion in the total area of the growth surface 10, it may be advantageous for the surface structure 12 to be at least partially different in size and/or shape. By using the three-dimensional surface structures 12 each having various lateral extents, for example, the growth surface 10 can be densely packed with the three-dimensional surface structures 12. For example, in this case, the small surface structures 12 can at least partially fill the spaces between the large surface structures 12.

In order to reduce the size of the growth portion 20, the process conditions for epitaxial growth can be set to enhance the growth selectivity between the planar region 11 and the three-dimensional structure 12. This can be done, for example, during growth by MOVPE by adjusting the ratio of hydride (H2, NH3) and metal organyl (eg TMGa, TEGa, TMAl). In particular, the supply of H2 can be increased or the supply of NH3, TMGa, TEGa, or TMAl can be decreased for the purpose of improving selectivity. Furthermore, the selectivity can be improved by increasing the growth temperature.

3A to 3C are diagrams showing intermediate steps of one embodiment of the method. In this embodiment, the growth substrate 1 has a planar region 11 and a three-dimensional surface structure 12 is arranged in the planar region 11 as in the previous embodiments, and the three-dimensional surface structure 12 has, for example, a conical shape. Or may be a pyramid. As shown in FIG. 3A, layer 14 is partially deposited in planar area 11. These layers 14 are formed from a material that does not allow nitride compound semiconductor material to grow on the layer 14 at all or barely. For example, layer 14 can include silicon nitride, silicon oxide, or titanium nitride.

By depositing layer 14, the size of growth region 13 is advantageously reduced. The growth region 13 is advantageously defined by the openings in the layer 14, which expose a part of the planar area 11 of the growth substrate 1. As a result, the growth region 13 becomes smaller than the flat region 11.

As shown in FIG. 3B, the growth of the nitride semiconductor stack is started in the growth portion 20 arranged in the growth region 13. In contrast, in the three-dimensional surface structure 12 and layer 14, substantially no nitride semiconductor material is grown.

In the intermediate step illustrated in FIG. 3C, the buffer layer 2 is grown on the entire surface. Layer 14 and surface structure 12 grow substantially laterally from growth portion 20 during growth of buffer layer 2, thereby reducing defect density. Therefore, advantageously, only relatively small growth portion 20 has a high defect density. After the growth of the buffer layer 2, which may include a plurality of partial layers, is completed, a functional semiconductor stack of, for example, optoelectronic components can then be grown in further steps.

4A to 4C are diagrams showing intermediate steps of another embodiment of the method. Similar to the embodiment of FIG. 3A, the growth substrate 1 has a planar area 11, in which the three-dimensional surface structure 12 is arranged. As can be seen from FIG. 4A, the nucleation layer 15 is formed on a part of the planar region 11. The nucleation layer 15 preferably comprises oxygen containing aluminum nitride (AlN:O). The growth region is substantially constituted by the surface of the nucleation layer 15, because the nucleation layer 15 promotes the growth of the nitride semiconductor material on the nucleation layer 15. Therefore, the growth region 13 is smaller than the planar region 11 as in the above-described embodiment.

As can be seen in FIG. 4B, the growth substantially takes place on the surface of the nucleation layer 15 where the growth portion 20 is formed. After the buffer layer 2 is completely grown, a further region of the growth surface, in particular the three-dimensional surface structure 12, is grown with semiconductor material, as shown in FIG. 4C.

5A-5C are plan views of an exemplary growth substrate 1, respectively. These schematics, although not shown to scale, illustrate various configurations of planar area 11 and three-dimensional surface structures.

In the exemplary embodiment of FIG. 5A, the planar area 11 of the growth substrate 1 is a continuous area surrounding a plurality of three-dimensional surface structures 12 which may be conical.

In the exemplary embodiment of FIG. 5B, in contrast, the growth substrate 1 has a plurality of non-continuous planar regions 11 surrounded by a continuous region of a three-dimensional surface structure 12. The plane region 11 may have a circular cross section or another shape. Because the planar area 11 of this embodiment is not continuous, the planar area 11 portion of the entire surface of the growth substrate 1 can be kept relatively small compared to the exemplary embodiment of FIG. 5A.

The growth substrate 1 of the embodiment of FIG. 5C has a plurality of non-continuous growth regions 13, which can be constituted by openings in the layer 14, for example in which the nitride semiconductor material cannot substantially grow. Furthermore, the growth substrate 1 has, for example, a three-dimensional surface structure 12 protruding from the layer 14. In the finished part, the three-dimensional surface structure 12 is advantageously adapted to reflect or scatter radiation emitted towards the growth substrate 1 in the direction of the radiation exit surface.

The present invention is not limited to such exemplary embodiments by the description made with reference to the exemplary embodiments. Rather, the invention includes any novel feature and combination of features, including in particular any combination of features in the claims, as such features or combinations of features themselves are defined in the claims or in the exemplary embodiments. It is included even if not specified in.

DESCRIPTION OF SYMBOLS 1 Growth substrate 2 Buffer layer 3 n-type semiconductor region 4 Active layer 5 p-type semiconductor region 6 p-type contact 7 n-type contact 8 Mirror layer 9 Light rays 10 Growth surface 11 Planar area 12 Surface structure 13 Growth area 14 Layer 15 Nucleation layer 20 Growth part 30 Semiconductor laminated body 31 Radiation extraction surface 100 Nitride semiconductor component

Claims (15)

- a planar area of the C plane (11), said having a planar region (11) on a plurality of three-dimensional surface structure (12) and formed from the growth surface (10), sapphire Anal length substrate structured Providing (1),
-Growing a nitride-based semiconductor stack (30) on said growth surface (10), said growing step being selectively initiated on a growth region (13) of said growth substrate (1). is, the growth region (13), said less than 45% of the growth surface (10), viewed including the steps of growing, a,
The growth region (13) is the planar region (11) or is a part of the planar region (11),
A layer (14) of a material in which the growth of the nitride semiconductor material is difficult or impossible is deposited on a part of the planar area (11) so that the growth area (13) is reduced.
A method for manufacturing a nitride semiconductor component (100). The growth area (13) is less than 25% of the growth surface (10),
The method of claim 1. The growth area (13) is less than 5% of the growth surface (10),
The method according to claim 1 or 2. The growth region (13) is smaller than the planar region (11),
The method according to any one of claims 1-3. The material includes silicon oxide, silicon nitride, or titanium nitride,
The method according to any one of claims 1 to 4 . The growth region (13) is constituted by a plurality of non-interconnecting portions of the planar region (11),
The method according to any one of claims 1-5. The non-interconnecting portion of the planar area (11) is adjacent to the three-dimensional surface structure (12),
The method of claim 6 . The non-interconnecting portion of the planar region (11) is an opening in the layer (14) of the material where growth of a nitride semiconductor material is difficult or impossible.
The method of claim 6 . A nucleation layer (15) is deposited on at least a portion of the planar region (11), the nucleation layer (15) promoting growth of a nitride semiconductor material on the nucleation layer (15). To do
The method according to any one of claims 1-8. The nucleation layer (15) contains oxygen-containing aluminum nitride,
The method according to claim 9 . The three-dimensional surface structure (12) is a conical or pyramidal protrusion extending in a direction away from the planar region (11),
The method according to any one of claims 1 to 10. - a planar area of the C plane (11), said having a planar region (11) on a plurality of three-dimensional surface structure (12) and formed from the growth surface (10), sapphire Anal length substrate structured (1),
A nitride-based semiconductor stack (30) disposed on the growth surface (10),
The nitride-based semiconductor stack (30) has a growth portion (20) located in a growth region (13) at the interface with the growth substrate (1),
The defect density of the grown portion (20) is higher than the defect density of a portion of the semiconductor laminate (30) other than the grown portion (20),
- said growth region (13), Ri less than 45% der of the growth surface (10),
The growth region (13) is the planar region (11) or is a part of the planar region (11),
A layer (14) of a material in which the growth of the nitride semiconductor material is difficult or impossible is deposited on a part of the planar area (11) so that the growth area (13) is reduced.
Nitride semiconductor component (100). The nitride semiconductor component (100) is a radiation emitting optoelectronic component,
The growth substrate (1) is transparent,
A nitride semiconductor component (100) according to claim 12 . The three-dimensional surface structure (12) is a conical or pyramidal protrusion extending in a direction away from the planar region (11),
A nitride semiconductor component (100) according to claim 12 or 13 . A mirror layer (8) is provided on the rear surface of the growth substrate (1) opposite to the semiconductor laminate (30),
The nitride semiconductor component according to any one of claims 12 to 14 (100).

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